Question Bank Unit 4-1

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Question Bank Based on UNIT 4

SUBJECT NAME: DIGITAL ELECTRONICS SUBJECT CODE: BOE310

Synchronous & Asynchronous Sequential Circuits: Analysis of clocked sequential circuits with state machine designing, State
reduction and assignments, Design procedure. Analysis procedure of Asynchronous sequential circuits, circuit with latches, Design
procedure, Reduction of state and flow table, Race-free state assignment, Hazards.

1. Derive the transition table for the asynchronous sequential circuit shown in the given figure. Determine the sequence of
internal states. Determine the sequence of internal states Y1Y2 for the following sequence of inputs x1x2:
00,10,11,01,11,10,00.

2. Distinguish between static and dynamic hazard. How will you determine hazard in combinational circuits?
3. Draw the logic diagram of the product-of-sums expression 𝑌 = (𝑥1 + 𝑥2, )(𝑥2 + 𝑥3 ) Show that there is a static 0 hazard
when 𝑥1 𝑎𝑛𝑑 𝑥3 are equal to 0 and 𝑥2 foes from 0 to 1. Find a way to remove the hazard by adding one more OR gate.
4. Design a primitive state diagram and state table for a circuit with two asynchronous inputs (X and Y) and one output Z.
This circuit is to be designed so that if any change takes place on X and Y, Z is to change states. Assume initially that the
two inputs never change simultaneously.
5. Define critical and non-critical race.
6. What is the significance of state assignment?
7. Explain the term synchronous circuits
8. Illustrate the term sequential logic.
9. Illustrate the State reduction technique for Digital Circuits.
10. Illustrate the working and applications of Asynchronous sequential circuits
11. Differentiate synchronous and asynchronous sequential circuits.
12. An asynchronous sequential circuit with two excitation functions with two feedback loop is given as:
𝑌1 = 𝑥𝑦1 + 𝑥̅ 𝑦2 ; 𝑌2 = 𝑥𝑦̅1 + 𝑥̅ 𝑦2
i. Draw the logic diagram of the circuit.
ii. Derive the transition table & obtain the flow table
13. Implement the circuit defined by the following transition table with a NOR SR Latch. Also show the implementation with
NAND SR latch.
Question Bank Based on UNIT 4

SUBJECT NAME: DIGITAL ELECTRONICS SUBJECT CODE: BOE310

14. Write the design procedure for clocked sequential circuits and implement the following state diagram.

15. Design a sequential circuit with two flip flops A & B and one input x. when x = 0, the state of the circuit remains
the same and when x = 1 the circuit passes through the state transitions from 00 to 01 to 11 to 10 back to 00
and repeat.
16. A sequential circuit has two J K flip flops A & B, two inputs X & Y, and one output Z. The equations defining this system
are as following:
𝐽𝐴 = 𝐵𝑋 + 𝐵′ 𝑌 ′ 𝐾𝐴 = 𝐵′ 𝑋𝑌 ′ 𝐽𝐵 = 𝐴′ 𝑋 𝐾𝐵 = 𝐴 + 𝑋𝑌 ′ 𝑍 = 𝐴𝑋𝑌 + 𝐵𝑋′𝑌 ′
Design the circuit.
17. Compare Moore and Mealy circuit model.
18. Drive the transition table, state table and state diagram for Moore Sequential circuit shown in figure below:

19. Design the sequential circuit for the given state diagram:

20. Explain Races and cycles with examples.


21. Derive the state table and state diagram of the synchronous sequential circuit shown below(X is an input to the circuit).
Question Bank Based on UNIT 4

SUBJECT NAME: DIGITAL ELECTRONICS SUBJECT CODE: BOE310

22. What do you mean by state reduction? Reduce the state diagram shown in figure below:

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