CXA1645P/M

RGB Encoder

Description 24 pin DIP (Plastic) 24 pin SOP (Plastic)

The CXA1645P/M is an encoder IC that converts analog
RGB signals to a composite video signal. This IC has
various pulse generators necessary for encoding.
Composite video outputs and Y/C outputs for the S terminal
are obtained by inputting composite sync, subcarrier and
analog RGB signals.
It is best suited to image processing of personal
computers and video games. Applications
Image processing of video games and personal
Features computers
• Single 5V power supply
• Compatible with both NTSC and PAL systems Structure
• Built-in 75Ω drivers Bipolar silicon monolithic IC
(RGB output, composite video output, Y output, C
output) Absolute Maximum Ratings
• Both sine wave and pulse can be input as a • Supply voltage VCC 14 V
subcarrier • Operating temperature Topr –20 to +75 °C
• Built-in band pass filter for the C signal and delay line • Storage temperature Tstg –65 to +150 °C
for the Y signal • Allowable power PD CXA1645P 1250 mW
• Built-in R-Y and B-Y modulator circuits dissipation CXA1645M 780 mW
• Built-in PAL alternate circuit
• Burst flag generator circuit Recommended Operating Condition
• Half H killer circuit Supply voltage VCC1, 2 5.0 ±0.25 V
Block Diagram and Pin Configuration
GND2 ROUT GOUT BOUT CVOUT VCC2 FO YTRAP YOUT COUT VREF IREF
24 23 22 21 20 19 18 17 16 15 14 13

VIDEO Y/C 75 75
OUT MIX DRIVER DRIVER
R-OUT G-OUT B-OUT REGULATOR

SYNC
DELAY CLAMP ADD
MATRIX

BPF
R-Y
Modulator
+

B-Y
Modulator

PHASE PULSE
CLAMP CLAMP CLAMP SIN-PULSE SHIFTER GEN

1 2 3 4 5 6 7 8 9 10 11 12
GND1 RIN GIN BIN NC SCIN NPIN BFOUT YCLPC SYNCIN NC VCC1

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication
or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony
cannot assume responsibility for any problems arising out of the use of these circuits.

–1– E93411A41-ST
 CXA1645P/M

Pin Description *Externally applied voltage

Pin
Symbol Pin Voltage Equivalent Circuit Description
No.
Ground for all circuits other than RGB,
composite video and Y/C output circuits.
1 GND1 0V*
The leads to GND2 should be as short and
wide as possible.
Vcc1

Analog RGB signal inputs. Input

Black level
2 RIN 100%, =1Vp-p (max.). To minimize clamp
when
3 GIN error, input at as low impedance as
clamped 2
4 BIN possible.
2.0V 3
ICLP turns ON only in the burst flag period.

100
180
100

4
GND1
I CLP

5 NC NO CONNECTION

Vcc1

Subcarrier input.
Input 0.4 to 0.5 Vp-p sine wave or pulse.
6 SCIN — 20P 20k
6
129 20k
Refer to Notes on Operation, Nos. 3 and 5.
100
GND1

Vcc1

68k Pin for switching between NTSC and PAL

7 NPIN 1.7V 7 modes
3k NTSC: VCC, PAL: GND

32k
GND1

Vcc1

H : 3.6V BF pulse monitoring output. Incapable of

8 BFOUT
L : 3.2V 8 driving a 75Ω load.
129

25
25

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 CXA1645P/M

Pin
Symbol Pin Voltage Equivalent Circuit Description
No.

VCC1
129

Pin to determine the Y signal clamp time

9 YCLPC 2.5V 9 constant.
Connect to GND via a 0.1µF capacitor.

5µ 1.6V

GND1

VCC1

40k
Composite sync signal input. Input TTL-
SYNC level voltages.
10 2.2V 10
IN 4k L (≤0.8V): SYNC period
H (≥2.0V)

2.2V
GND1

Power supply for all circuits other than RGB,

12 VCC1 5.0V* composite video and Y/C output circuits.
Refer to Notes on Operation. Nos. 4 and 10.

VCC1

Pin to determine the internal reference

13 IREF 2.0V current.
13 Connect to GND via a 47kΩ resistor.
129

50µ

GND1

VCC1

Internal reference voltage.

Connect a decoupling capacitor of
14 VREF 4.0V approximately 10µF.
14

Refer to Notes on Operation, Nos. 4 and 7.

GND1

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 CXA1645P/M

Pin
Symbol Pin Voltage Equivalent Circuit Description
No.

VCC2
VCC1
600µ
Chroma signal output. Capable of driving a
75Ω load.
15 COUT 2.2V
15
20k Refer to Notes on Operation, Nos. 6 and

10k
9.

GND2

VCC2
VCC1
600µ

Y signal output. Capable of driving a 75Ω

Black level load.
16 YOUT 16
1.3V 20k
10k

Refer to Notes on Operation, Nos. 6 and 9.

GND2

VCC1 Pin for reducing cross color caused by the

subcarrier frequency component of the Y
signal. When the CVOUT pin is in use,
connect a capacitor or a capacitor and an
8.5k inductor in series between YTRAP and
Black level 17
17 YTRAP GND. Decide capacitance and inductance,
1.6V
1.5k 0.5P giving consideration to cross color and the
required resolution.
No influence on the YOUT pin.
GND1
Input resistance 1.5kΩ Refer to Notes on Operation, No. 8.

VCC1

Internal filter fo adjustment pin.

Connect to GND via the following resistor
18 FO 2.0V according to the NTSC or PAL mode.
18
129 NTSC: 20kΩ (±1%)
PAL : 16kΩ (±1%)
50µ

GND1

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 CXA1645P/M

Pin
Symbol Pin Voltage Equivalent Circuit Description
No.
Power supply for RGB, composite video and
Y/C output circuits. Decouple this pin with a
large capacitor of 10µF or above as a high
19 VCC2 5.0V* current flows.

Refer to Notes on Operation, Nos. 4 and 10.

VCC2
VCC1
600µ
Composite video signal output. Capable of
Black level driving a 75Ω load.
20 CVOUT
1.2V 20
20k

10k
Refer to Notes on Operation, Nos. 6 and 9.

GND2

VCC2
500µ VCC1

21 Analog RGB signal outputs. Capable of

21 BOUT
Black level 22 driving a 75Ω load.
22 GOUT 5.5k
1.7V 23
23 ROUT
Refer to Notes on Operation, Nos. 6 and 9.
200µ
GND1
GND2

Ground for RGB, composite video and Y/C

24 GND2 0V* output circuits. The leads to GND1 should
be as short and wide as possible.

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 CXA1645P/M

Electrical Characteristics (Ta = +25°C, VCC = 5V, See the Electrical Characteristics Measurement Circuit.)

S1 S2 S3 S4 S5
Measure Measurement
Item Symbol RIN ment Min. Typ. Max. Unit
SYNC Point Conditions
GIN SCIN NPIN FO
IN
BIN
No input signal,
Current ICC1 ICC1 SG5: CSYNC 31
consumption 1 TTL level,
2V SG4 5V SG5 20k SG4: SIN wave mA
Current 3.58MHz
consumption 2 ICC2 ICC2 0.5Vp-p 12
Fig. 1
(R, G, BOUT)

D SG1 to SG3:
VO (R) SG1
DC direct
coupling 2.5VDC,
RGB output 1.0Vp-p
VO (G) SG2 2V E 0.64 0.71 0.78 Vp-p
voltage f=200kHz
Pin 9=Clamp
SG3 F voltage
VO (B)
Fig. 2

SG1 to SG3:
fC (R) SG1 D
DC direct
RGB output coupling 2.5VDC,
1.0Vp-p
frequency fC (G) SG2 2V E –3.0 dB
f=200kHz/5MHz
characteristics Pin 9=Clamp
voltage
fC (B) SG3 F
Fig. 3

(YOUT & CVOUT)

Output sync level VO (YS1/2) 0.26 0.29 0.33 Vp-p
SG1 to SG3:
R100%: Y level VO (YR1/2) 100% color bar 0.17 0.21 0.26 V
SG1 input,
G100%: Y level VO (YG1/2) to 0V 5V SG5 20k 1.0Vp-p (Max.) 0.35 0.42 0.49 V
SG3 SG5: CSYNC
B100%: Y level VO (YB1/2) TTL level 0.065 0.08 0.095 V
Fig. 4
White 100%: Y level VO (YW1/2) B/C 0.6 0.71 0.82 V

SG1 to SG3:
DC direct
SG1 coupling 2.5VDC,
Output frequency
fC (Y1/2) to 0V 5V 2V 20k 1.0Vp-p –3.0 dB
characteristics f=200kHz/5MHz
SG3
Pin 9=Clamp voltage
Fig. 3

* Clamp voltage: voltage appearing at Pin 9 when CSYNC is input.

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 CXA1645P/M

S1 S2 S3 S4 S5
Measure Measurement
Item Symbol RIN ment Min. Typ. Max. Unit
SYNC Point Conditions
GIN SCIN NPIN FO
IN
BIN
(COUT & CVOUT)

Burst level VO (BN1/2) 0.2 0.25 0.3 Vp-p

R chroma ratio R/BN1/2 SG1 to SG3: 2.84 3.16 3.48
100% color bar
R phase θR1/2 94 104 114 deg
input,
G chroma ratio G/BN1/2 1.0Vp-p (Max.) 2.65 2.95 3.25
SG1 SG4: SIN wave,
G phase θG1/2 to SG4 5V SG5 20k 3.58MHz 231 241 251 deg
SG3 0.5Vp-p
B chroma ratio B/BN1/2 SG5: CSYNC 2.01 2.24 2.47
TTL level
B phase θB1/2 Fig. 5 337 347 357 deg
Burst width tW (B) 1/2 2.5 2.75 3.2 µs
Burst position tD (B) 1/2 0.4 0.6 0.75 µs
A/C SG1 to SG3:
No signal,
SG4: SIN wave,
SG1 3.58MHz mVp-p
Carrier leak VL1/2 to SG4 5V SG5 20k 0.5Vp-p 20
SG3 SG5: CSYNC
TTL level
3.58MHz component
measured. Fig. 6
PAL burst SG1 to SG3:
K (BP1/2) 0.9 1.0 1.1
level ratio No signal,
SG1 SG4: SIN wave,
θPAL1/2 to SG4 GND SG5 16k 4.43MHz 125 135 145
0.5Vp-p
PAL burst phase SG3 SG5: CSYNC deg
θPAL1/2 TTL level
215 225 235
Fig. 6

* Clamp voltage: voltage appearing at Pin 9 when CSYNC is input.

–7–
 75 F 75 E 75 D 75 C 75 B 75 A

5V
220µ 220µ 220µ 220µ 16k 20k 220µ 220µ 10µ 47k 0.1µ
0.01µ 47µ
A
75 75 75 75 PAL NTSC 75 75
S5 NC
ICC2
24 23 22 21 20 19 18 17 16 15 14 13

VIDEO Y/C 75 75
OUT MIX DRIVER DRIVER
R-OUT G-OUT B-OUT REGULATOR

DELAY SYNC
CLAMP
Electrical Characteristics Measurement Circuit

ADD
BPF
R-Y
Modulator

MATRIX
+

–8–
B-Y
Modulator

CLAMP CLAMP CLAMP SIN-PULSE PHASE PULSE

SHIFTER GEN

1 2 3 4 5 6 7 8 9 10 11 12
NC NC 0.1µ NC
S1 S1 S1
S2 S3 S4
PAL NTSC ICC1 A
0.01µ 47µ
0.1µ 0.1µ 0.1µ
SG4
SG1 SG2 SG3 SIN 5V 2V SG5
2V 0.5Vp-p CSYNC 5V

SG1 to SG3 100% color bar (1Vp-p max.)

CXA1645P/M
 CXA1645P/M

Measuring Signals and Output Waveforms

SG4 SG5 2.0V

0.5Vp-p SYNC 64µ s 0.8V
SCIN IN 4.5µ s
f=3.58MHz 10µ s
SG5 2.0V
SG1 1.0Vp-p
SYNC 64µ s 0.8V RIN
IN
4.5µ s
SG2 1.0Vp-p
Fig. 1 GIN

SG3
1.0Vp-p
BIN
SG1 to 3
RIN 2.5V 1.0Vp-p Vo (YB)
BC point
GIN
YOUT
BIN f=200kHz Vo (YW) Vo (YG) Vo (YS)
CVOUT
Vo (YR)
DEF point
Fig. 4
ROUT VO
GOUT
BOUT
Fig. 2
SG4
0.5Vp-p
SCIN
f=3.58MHz
SG1 to 3
SG5 2.0V
RIN 2.5V 1.0Vp-p
SYNC 64µ s 0.8V
GIN IN 4.5µ s
BIN f=200kHz/5MHz
DEF 10µ s
BC point SG1
ROUT VO 1.0Vp-p
GOUT RIN
BOUT Vo (5MHz)
YOUT fc=20log SG2
Fig. 3 Vo (200kHz) 1.0Vp-p
CVOUT GIN

SG3 1.0Vp-p
BIN

SG4
C point
0.5Vp-p VO (CR)
SCIN CVOUT R/BN=
VO (BN)
f=3.58MHz/ VO (BN)
tD(B) VO (CG) VO (CB) VO (CG)
4.43MHz VO (CR) G/BN=
tW(B) VO (BN)
SG4 2.0V
VO (CB)
64µ s 0.8V VO (BN) B/BN=
SYNC A point VO (BN)
IN 4.5µ s COUT
Vo (BN) VL Vo (BN) VO (CB)
C point tW (B) VO (CG) VO (CR)
Vo (BN)
CVOUT K (BP) =
Vo (BN) Fig. 5
Vo (BN) VL Vo (BN)
A point
COUT

Fig. 6

–9–
 CXA1645P/M

Application Circuit (NTSC mode)

VCC

R G B CV C Y +5V
OUT OUT OUT OUT OUT OUT

220µ 220µ 220µ 220µ 220µ 220µ 10µ 47k 0.1µ

0.01µ 47µ *
75 75 75 75 20k 1% 75 75
NC
24 23 22 21 20 19 18 17 16 15 14 13

VIDEO Y/C 75 75
OUT MIX DRIVER DRIVER
R-OUT G-OUT B-OUT REGULATOR

SYNC
MATRIX DELAY CLAMP ADD
BPF
R-Y
Modulator
+

B-Y
Modulator

PHASE PULSE
CLAMP CLAMP CLAMP SIN-PULSE SHIFTER GEN

1 2 3 4 5 6 7 8 9 10 11 12
NC NC NC
0.1µ
0.1µ 0.1µ 0.1µ 0.01µ 47µ
SCIN SYNC
IN

R G B
IN IN IN * Metal film resistor ±1%

Application Circuit (PAL mode)

R G B CV C Y +5V
OUT OUT OUT OUT OUT OUT

220µ 220µ 220µ 220µ 220µ 220µ 10µ 47k 0.1µ

0.01µ 47µ *
75 75 75 75 16k 1% 75 75
NC
24 23 22 21 20 19 18 17 16 15 14 13

VIDEO Y/C 75 75
OUT MIX DRIVER DRIVER
R-OUT G-OUT B-OUT REGULATOR

SYNC
DELAY CLAMP ADD
MATRIX

BPF
R-Y
Modulator
+

B-Y
Modulator

PHASE PULSE
CLAMP CLAMP CLAMP SIN-PULSE SHIFTER GEN

1 2 3 4 5 6 7 8 9 10 11 12
NC NC NC
0.1µ
0.1µ 0.1µ 0.1µ
SCIN SYNC 0.01µ 47µ
IN

R G B
IN IN IN * Metal film resistor ±1%

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems
arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

–10–
 CXA1645P/M

Description of Operation the R-Y signal and the B-Y signal. Modulated subcarriers
Analog RGB signals input from pins 2, 3 and 4 are are mixed, sent to the band pass filter to eliminate higher
clamped in the clamping circuit and output from pins 23, harmonic components and finally output from Pin 15 as
22 and 21, respectively. the C signal. At the same time, Y and C signals are
The matrix circuit performs operations on each input mixed and output from Pin 20 as the composite video
signal, generating luminance signal Y and color signal.
difference signals R-Y and B-Y. The Y signal enters the
delay line to adjust delay time with the color signal C.
Then, after addition of the CSYNC signal input from pin Burst Signal
10, the Y signal is output from Pin 16. The CXA1645P/M generates burst signals at the
A subcarrier input from Pin 6 is input to the phase timing shown below according to the composite sync
shifter, where its phase is shifted 90°. Then, the signal input.
subcarrier is input to the modulators and modulated by

H synchronization

SYNC
IN
(TTL level)

tD (B) tW (B)

C VIDEO
OUT

Burst signal

COUT

tD (B) tW (B)
V synchronization

ODD
SYNC
IN
EVEN

ODD
C VIDEO
OUT
EVEN

Burst signal
Synchronizing signal

–11–
 CXA1645P/M

Notes on Operation 5. SC and SYNC input pulses

Be careful of the following when using the Attach a resistor and a capacitor to eliminate high-
CXA1645P/M. frequency components of SC (Figure A) and SYNC
1. This IC is designed for image processing of (Figure B) before input.
personal computers and video games. When using
the IC in other video devices, make thorough Fig. A Fig. B
investigations on image quality.
2.2k 47P 2.2k 5P
2. Be sure that analog RGB signals are input at
1.0Vp-p maximum and have low enough
impedance. High impedance may affect color Be careful not to input pulses containing high-
saturation, hue, etc. Inputting RGB signals in frequency components. Otherwise, high-frequency
excess of 1.3Vp-p may disable the clamp components may flow into VCC, GND and
operation. peripheral parts, resulting in malfunctions.

3. The SC input (Pin 6) can be either a sine wave or 6. Use care when connecting an external resistor to
a pulse in the range from 0.4 to 5.0Vp-p. However, the 75Ω driver output pin. A capacitance of several
when a pulse is input, its phase may be shifted dozen picofarads at each pin may start oscillation.
several degrees from that of the sine wave input. To prevent oscillation, design the pattern so that a
In the IC, the SC input is biased to 1/2 VCC. 75Ω resistor is mounted near the pin (see Figure
Accordingly, when a 5.0Vp-p pulse is input and the C).
duty factor deviates from 50%, high- and low-level Fig. C
pulse voltages may exceed VCC and GND in the * *

IC, which causes subcarrier distortion. In such a 75

case, be very careful that the duty factor keeps to * Make these leads short.
50%.
When any of the 75Ω driver output pins are not in
4. When designing a printed circuit board pattern, use, leave them unconnected and design the
pay careful attention to the routing of the VCC and pattern so that no parasitic capacitance is
GND leads. To decouple the VCC and VREF pins, generated on the printed circuit board.
use tantalum, ceramic or other capacitors with
good frequency characteristics. Ground the 7. VREF pin (Pin 14)
capacitors by connections shown below as closely Do not connect this pin to an external load that
to each IC pin as possible. Try to design the leads might cause AC signals to flow, which will cause IC
as short and wide as possible. malfunctions. When connecting a DC load, make
sure that the current flowing from this pin is kept
VCC1, VREF ••• GND1 below 2mA.
VCC2 ••• GND2

Design the pattern so that VCC (or VREF) is

connected to GND via a capacitor at the shortest
distance.

–12–
 CXA1645P/M

8. YTRAP pin (Pin 17)

(Pin 20), and B.G.R OUT (pins 21, 22 and 23)
There are the following two means of reducing
outputs. In Pin Description, "Capable of driving a
cross color generated by subcarrier frequency
75Ω load" means that the pin can drive a capacitor
components contained in the Y signal.
+75Ω+75Ω load shown in the figure below. In other
words, the pin is capable of driving a 150Ω load in
(1) Install a capacitor of 30 to 68pF between
AC.
YTRAP and GND. Decide the capacitance by
conducting image evaluation, etc., giving
75Ω 220µ F
consideration to both cross color and resolution. PIN
Relations between capacitance and image
75Ω
quality are as follows:

17 Keep in mind that the pin is incapable of driving a

Capacitance 30pF ↔ 68pF
150Ω load in DC load in DC direct coupling.
Cross color Large ↔ Small C
Resolution High ↔ Low
10. This IC employs a number of 75Ω driver pins, so
oscillation is likely to occur when the measures
(2) Connect a capacitor C and an inductor L
described in Nos. 4 and 6 are not thoroughly
in series between YTRAP and GND. When the
observed. Be very careful of oscillation in printed
subcarrier frequency is fo, the values C and L
1 circuit board design and carry out thorough
are determined by the equation fo = .
2π√LC investigations in the actual driving condition.
Decide the values in image evaluation, etc.,
giving consideration to both cross color and
resolution. Relations between inductor values
and image quality are as follows:

Inductor value Small ↔ Large 17

C
Cross color Large ↔ Small
Resolution High ↔ Low L

For instance, L=68µH and C=28pF are

recommended for NTSC. It is necessary to
select an inductor L with a sufficiently small DC
resistance. Method (2) is more useful for
achieving a higher resoluation than method (1).
When an even higher resolution is necessary,
use of the S terminal (YOUT and COUT) is
recommended.

9. Driving COUT (pin 15), YOUT (Pin 16), CVOUT

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 CXA1645P/M

Package Outline Unit : mm

CXA1645P

CXA1645M

–14–