LTN154P1-L03 Samsung Asi
LTN154P1-L03 Samsung Asi
LTN154P1-L03 Samsung Asi
www.DataSheet4U.com
Product Information
SAMSUNG
SAMSUNGTFT-LCD
TFT-LCD
MODEL
MODEL NO.
NO. :: LTN154P1-L03
LTN154P1-L03
6. Interface Timing - - - - - - - - - - - - - - - - - - - ( 10 )
6.1 Timing Parameters
6.2 Timing Diagrams of interface Signal
6.3 Power ON/OFF Sequence
7. Outline Dimension - - - - - - - - - - - - - - - - - - - ( 12 )
FEATURES
• High contrast ratio, high aperture structure
• Fast Response Time
• Wide SXGA+(1680 X 1050) resolution
• Low power consumption
• DE (Data enable) only mode.
• 3.3V LVDS Interface
• On board EDID chip
• Green product (Complied with RoHS requirement)
APPLICATIONS
• Notebook PC
• If the usage of this product is not for PC application, but for others, please contact SEC
GENERAL INFORMATION
Note 1) Permanent damage to the device may occur if maximum values are exceeded
Functional operation should be restricted to the conditions described under normal operating conditions.
Contrast Ratio
CR 200 300 - -
(5 Points)
φ = 0,
Response θ = 0
Time at Rising TR + TF 25 35 msec
Ta
Average Luminance
YL,AVE 160 185 - cd/m2
of White (center)
θL 60 65
Hor.
θH 60 65
Viewing Degrees
CR ≥ 10
Angle
φH 45 50
Ver.
φL 45 50
13 Points
δL - - 2.2 -
White Variation
Vsync Frequency fv - 60 - Hz
The backlight system is an edge-lighting type with a single CCFT ( Cold Cathode Fluorescent Tube ).
The characteristics of a single lamp are shown in the following table.
- INVERTER : SEM SIC 130T
Ta= 25 ± 2 °C
Frequency fL 45 55 65 KHz
I2 C bus EDID
EEPROM
LVDS
Input- RSDS
Connector LVDS Input/RSDS Output
FI-XB30SL-HF10 Timing Controller
or Compatible
Source
Driver
IC 15.4” WSXGA+
TFT-LCD Panel
DC-DC Gamma
Converter
Generator
VCOM
Video Signal Generator
Control Signal
VCOM
Gamma
DVDD SOURCE PCB
Gate Driver IC
AVDD
Von/Voff
Reflector
1 HOT (Black)
LAMP
2 COLD(White)
5.1. Input Signal & Power (LVDS, Connector : JAE FI-XB30SL-HF10 or compatible )
Mating Connector : JAE FI-X30M or compatible)
1 GND Ground
2 VDD POWER SUPPLY +3.3V
3 VDD POWER SUPPLY +3.3V
4 VEEDID DDC 3.3V Power
5 GND Ground
6 CLKEDID DDC Clock
7 DATAEDID DDC data
8 O_RxIN0- LVDS Differential Data INPUT (Odd R0-R5,G0) Negative
9 O_RxIN0+ LVDS Differential Data INPUT (Odd R0-R5,G0) Positive
10 GND Ground
11 O_RxIN1- LVDS Differential Data INPUT (Odd G1-G5,B0-B1) Negative
12 O_RxIN1+ LVDS Differential Data INPUT (Odd G1-G5,B0-B1) Positive
13 GND Ground
14 O_RxIN2- LVDS Differential Data INPUT (Odd B2-B5,Sync,DE) Negative
15 O_RxIN2+ LVDS Differential Data INPUT (Odd B2-B5,Sync,DE) Positive
16 GND Ground
17 O_RxCLK- LVDS Differential Data INPUT (Odd Clock) Negative
18 O_RxCLK+ LVDS Differential Data INPUT (Odd Clock) Positive
19 GND Ground
20 E_RxIN0- LVDS Differential Data INPUT (Even R0-R5,G0) Negative
21 E_RxIN0+ LVDS Differential Data INPUT (Even R0-R5,G0) Positive
22 GND Ground
23 E_RxIN1- LVDS Differential Data INPUT (Even G1-G5,B0-B1) Negative
24 E_RxIN1+ LVDS Differential Data INPUT (Even G1-G5,B0-B1) Positive
25 GND Ground
26 E_RxIN2- LVDS Differential Data INPUT (Even B2-B5,Sync,DE) Negative
27 E_RxIN2+ LVDS Differential Data INPUT (Even B2-B5,Sync,DE) Positive
28 GND Ground
29 E_RxCLK- LVDS Differential Data INPUT (Even Clock) Negative
30 E_RxCLK+ LVDS Differential Data INPUT (Even Clock) Positive
T/7
DE Vsync Hsync B5 B4 B3 B2
B1 B0 G5 G4 G3 G2 G1
G0 R5 R4 R3 R2 R1 R0
E_TxCLK OUT
E_RxCLK IN
T/7
DE Vsync Hsync B5 B4 B3 B2
B1 B0 G5 G4 G3 G2 G1
G0 R5 R4 R3 R2 R1 R0
Vertical Active
Display Period TV D - 1050 - lines
Display Term
One Line
Cycle TH 900 920 1050 clocks
Scanning Time
TV
TVD
DE
TH
DCLK
TC
THD
DE
Back-light
200 msec ≤ T5 50% 50%
200 msec ≤ T6
T5 T6
NOTE.
(1) The supply voltage of the external system for the module input should be the same
as the definition of VDD.
(2) Apply the lamp voltage within the LCD operation range. When the back-light turns on
before the LCD operation or the LCD turns off before the back-light turns off, the
display may momentarily become white.
(3) In case of VDD = off level, please keep the level of input signals on the low or keep
a high impedance.
(4) T4 should be measured after the module has been fully discharged between power
off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.