For Distec Only: Model
For Distec Only: Model
For Distec Only: Model
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MODEL : LTM270DL02
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F Note : This is Product Information is subject to change after 3 months of issuing date.
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3.2 Back Light Unit
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4. Block Diagram ------------------------------------------------------------------------------------ (14)
4.1 TFT LCD Module
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4.2 Back Light Unit
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5. Input Terminal Pin Assignment ---------------------------------------------------------------- (15)
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5.2 Input Power
5.3 Back Light Unit
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5.4 LVDS Interface
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5.5 Input Signals, Basic Display Colors and Gray Scale of Each Color
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6. Interface Timing ----------------------------------------------------------------------------------- (25)
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6.1 Timing Parameters (DE only mode)
6.2 Timing Diagrams of interface Signal (DE only mode)
6.3 Power ON/OFF Sequence
6.4 VDD Power Dip Condition
Description
LTM270DL02 is a color active matrix liquid crystal display (LCD) that uses amorphous
silicon TFT (Thin Film Transistor) as switching components. This model is composed of
a TFT LCD panel, a driver circuit and a back light unit. The resolution of a 27.0” is 2560
x 1440 and this model can display up to 16.7 millions colors.
Features
High Color Saturation, high aperture structure
PLS mode
Wide Viewing Angle
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QHD (2560 x 1440 pixels) resolution
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DE (Data Enable) only mode
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White LED Edge slim Backlight (1-side)
RoHS compliance
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TCO5.0 compliance
( Except for 2.2 response time; this product does not have over driving function.
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It is recommended to support in system level )
Applications
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Workstation & desktop monitors
MFM & Graphic application
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Display terminals for AV application products
Financial market
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Monitors for industrial machine
Monitors for HDTV
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Monitors for Professional Medical machine
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* If the module is used to other applications besides the above, please contact SEC
in advance.
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General Information
Items Specification Unit Note
Pixel Pitch 0.233(H) x 0.233(W) mm
Active Display Area 596.74(H) x 335.66(V) mm
Surface Treatment Haze (TBD)
Display Colors 16.7M ( True 8 bit ) colors
Number of Pixels 2560 x 1440 pixel
Pixel Arrangement RGB vertical stripe
Display Mode Normally Black
Luminance of White 300(Typ.) cd/㎡
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Note (1) Mechanical tolerance is ± 0.5mm unless there is a special comment.
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1. Absolute Maximum Ratings
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If the condition exceeds maximum ratings, it can cause malfunction or unrecoverable
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damage to the device.
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Item Symbol Min. Max. Unit Note
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Power Supply Voltage VDD GND-0.5 5.5 V
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Storage temperature TSTG -20 60 ℃ (1)
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(39,90)
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(50,50.4)
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(60,27.7)
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(-25,5)
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Fig. Temperature and Relative humidity range
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Response (5)
On/Off Tr+Tf - 12 - msec
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Time RD-80S
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Luminance of White (6)
YL 250 300 - cd/m2
(Center of screen) SR-3
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Rx 0.660
Red
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Ry 0.330
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Gx Normal 0.300
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Green θL,R=0
Color Gy 0.630
θU,D=0
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Chromaticity -0.030 +0.030
(CIE 1931) Bx 0.150
Blue Viewing
By Angle 0.040
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Wx 0.313
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White
Wy 0.329 (7),(8)
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Ru' - 0.468 - SR-3
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Red
Rv' - 0.527 -
Gu' - 0.120 -
Color Green
Chromaticity Gv' - 0.569 -
(CIE 1976) Bu' - 0.189 -
Blue
Bv' - 0.113 -
Wu' - 0.198 -
White
Wv' - 0.468 -
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(9 Points) SR-3
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Note (1) Test Equipment Setup
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The measurement should be executed in a stable, windless and dark room between
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30min after lighting the back light at the given temperature for stabilization
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of the back light. This should be measured in the center of screen.
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Environment condition : Ta = 25 ± 2 °C
or Photo detector
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Photo detector Field
SR-3 2°
Field
SR-3 : 50㎝
6 5 4 720
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1080
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3 2 1
: Test Point
On
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Note (3) Definition of Contrast Ratio (C/R)
: Ratio of gray max (Gmax) & gray min (Gmin) at the center point⑤ of the panel
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G max
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CR
G min
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Gmax : Luminance with all pixels white
Gmin : Luminance with all pixels black
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Note (4) Definition of 9 points brightness uniformity
( B max B min)
Buni 100
B max
Display Data Black (TFT OFF) White (TFT ON) Black (TFT OFF)
TR TF
100%
90%
Optical
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Response
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10%
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0%
Time
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Note (6) Definition of Luminance of White : Luminance of white at center point⑤
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Note (7) Definition of Color Chromaticity (CIE 1931, CIE1976)
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Color coordinate of Red, Green, Blue & White at center point⑤
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Note (8) Definition of Viewing Angle
: Viewing angle range ( CR ≥10 )
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c. Test method
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-1st gray step : move a square of 255 gray level should be moved into the center of the
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screen and measure luminance and u’ and v’ coordinates.
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- Next gray step : Move a 225 gray square into the center and measure both
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luminance and coordinates, too.
d. Test evaluation
Where A, B : 2 gray levels found to have the largest color differences between them
i.e. get the largest Δu’ and Δv’ of each 6 pair of u’ and v’ and calculate the Δu’v’.
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Current of
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Power (b) White IDD - 1400 1700 mA (2),(3)
Supply
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(c) Dot - 1100 1300 mA
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Vsync Frequency fV 45 60 75 Hz
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Main Frequency fDCLK 45 60.38 76.06 MHz
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Rush Current IRUSH - - 5 A (4)
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(4) Measurement Condition
100%
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90%
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10%
GND
or TRUSH=470㎲
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Rush Current IRUSH can be measured when TRUSH. is 470㎲.
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Operating Life Time Hr 30,000 - - Hour (2)
On
Note (1) The above specification is not for the converter output, but for the LED bar.
The LED bar consists of 80 LED packages ; 4 parallel X 20 serial
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(2) Life time(Hr) is defined as the time when brightness of a LED package itself
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becomes 50% or less than its original value at the condition of Ta=25 ± 2°C
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and IF =440mA
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Timing Controller
LVDS Signal Source Driver ICs
LVDS 2 TCON
CN1
(51pin)
S1 S2560
Control signal
Column Driver Circuit
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A
Gamma T
Generator E
TFT-LCD
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Dc power IC (2560 x RGB x 1440 pixels)
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supply CN2 Power
(15pin)
Circuit
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Gamma
Generator
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4.2 Back Light Unit
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Connector: Molex 104078-0610 or equivalent
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F LED Return
LED Power
signal
LED Power
LED bar 6-pin connector
LED Return
signal
※ For detail connector information, please refer to page 30.
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6 B_RXO2P B_Positive Transmission Data of Pixel 2 (ODD data)
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7 GND Power Ground
8 B_RXOCN B_Negative Sampling Clock (ODD data)
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9 B_RXOCP B_Positive Sampling Clock (ODD data)
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10 GND Power Ground
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11 B_RXO3N B_Negative Transmission Data of Pixel 3 (ODD data)
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12 B_RXO3P B_Positive Transmission Data of Pixel 3 (ODD data)
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13 GND Power Ground
14 B_RXE0N B_Negative Transmission Data of Pixel 0 (EVEN data)
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15 B_RXE0P B_Positive Transmission Data of Pixel 0 (EVEN data)
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16 B_RXE1N B_Negative Transmission Data of Pixel 1 (EVEN data)
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17 B_RXE1P B_Positive Transmission Data of Pixel 1 (EVEN data)
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18 B_RXE2N B_Negative Transmission Data of Pixel 2 (EVEN data)
19 B_RXE2P B_Positive Transmission Data of Pixel 2 (EVEN data)
20 GND Power Ground
21 B_RXECN B_Negative Sampling Clock (EVEN data)
22 B_RXECP B_Positive Sampling Clock (EVEN data)
23 GND Power Ground
24 B_RXE3N B_Negative Transmission Data of Pixel 3 (EVEN data)
25 B_RXE3P B_Positive Transmission Data of Pixel 3 (EVEN data)
26 GND Power Ground
27~51 Please refer to the next page
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33 GND Power Ground
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34 F_RXOCN F_Negative Sampling Clock (ODD data)
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35 F_RXOCP F_Positive Sampling Clock (ODD data)
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37 F_RXO3N F_Negative Transmission Data of Pixel 3 (ODD data)
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38 F_RXO3P F_Positive Transmission Data of Pixel 3 (ODD data)
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39 GND Power Ground
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40 F_RXE0N F_Negative Transmission Data of Pixel 0 (EVEN data)
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41 F_RXE0P F_Positive Transmission Data of Pixel 0 (EVEN data)
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42 F_RXE1N F_Negative Transmission Data of Pixel 1 (EVEN data)
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43 F_RXE1P F_Positive Transmission Data of Pixel 1 (EVEN data)
1 NC NC
2 NC NC
3 NC NC
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5 GND Power Ground
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6 GND Power Ground
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7 GND Power Ground
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8 NC * CE(For LCD internal use only. Do not connect)
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9 NC * CTL(For LCD internal use only. Do not connect)
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10 GND Power Ground
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11 VDD Power Supply : +5V
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12 VDD Power Supply : +5V
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13 VDD Power Supply : +5V
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14 VDD Power Supply : +5V
PCB
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Pin No. 1 Pin No. 51
▼
#1
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#51
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Connector : JAE FI-RE51S-HF-J or equivalent
#1
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#51
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Fig. Connector diagram
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a. All GND pins should be connected together and also be connected to the
LCD’s metal chassis.
b. All power input pins should be connected together.
c. All NC pins should be separated from other signal or power.
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4 Vin LED power input
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5 RTN 3 Channel 3 LED return
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6 RTN 4 Channel 4 LED return
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Rear view of panel
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▼
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#6 #1
Connector
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35 TA2 F_RO6 Red Odd Pixel Data F_RXO0N /
TA- / TA+ 27 / 28
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36 TA3 F_RO7 Red Odd Pixel Data F_RXO0P
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37 TA4 F_RO8 Red Odd Pixel Data
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Green Odd Pixel
62 TD2 F_GO2
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Data(LSB) F_RXO3N /
TD- / TD+ 37 / 38
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F_RXO3P
63 TD3 F_GO3 Green Odd Pixel Data
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F_RXO0N /
40 TA6 F_GO4 Green Odd Pixel Data TA- / TA+ 27 / 28
F_RXO0P
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41 TB0 F_GO5 Green Odd Pixel Data
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42 TB1 F_GO6 Green Odd Pixel Data
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44 TB2 F_GO7 Green Odd Pixel Data F_RXO1N /
TB- / TB+ 29 / 30
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F_RXO1P
45 TB3 F_GO8 Green Odd Pixel Data
Green Odd Pixel
46 TB4 F_GO9
Data(MSB)
64 TD4 F_BO2 Blue Odd Pixel Data(LSB) F_RXO3N /
TD- / TD+ 37 / 38
1 TD5 F_BO3 Blue Odd Pixel Data F_RXO3P
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35 TA2 F_RE6 Red Even Pixel Data F_RXE0N /
TA- / TA+ 40 / 41
F_RXE0P
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36 TA3 F_RE7 Red Even Pixel Data
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38 TA5 F_RE9 Red Even Pixel Data(MSB)
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Green Even Pixel
62 TD2 F_GE2 F_RXE3N /
Data(LSB)
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TD- / TD+ 50 / 51
F_RXE3P
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63 TD3 F_GE3 Green Even Pixel Data
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F_RXE0N /
40 TA6 F_GE4 Green Even Pixel Data TA- / TA+ 40 / 41
F_RXE0P
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41 TB0 F_GE5 Green Even Pixel Data
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42 TB1 F_GE6 Green Even Pixel Data
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44 TB2 F_GE7 Green Even Pixel Data F_RXE1N /
TB- / TB+ 42 / 43
F_RXE1P
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45 TB3 F_GE8 Green Even Pixel Data
Green Even Pixel
46 TB4 F_GE9
Data(MSB)
64 TD4 F_BE2 Blue Even Pixel Data(LSB) F_RXE3N /
TD- / TD+ 50 / 51
1 TD5 F_BE3 Blue Even Pixel Data F_RXE3P
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34 TA1 B_RO5 Red Odd Pixel Data
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35 TA2 B_RO6 Red Odd Pixel Data B_RXO0N /
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TA- / TA+ 1/2
36 TA3 B_RO7 Red Odd Pixel Data B_RXO0P
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37 TA4 B_RO8 Red Odd Pixel Data
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38 TA5 B_RO9 Red Odd Pixel Data(MSB)
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62 TD2 B_GO2 Green Odd Pixel Data(LSB) B_RXO3N /
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TD- / TD+ 11 / 12
63 TD3 B_GO3 Green Odd Pixel Data B_RXO3P
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B_RXO0N /
40 TA6 B_GO4 Green Odd Pixel Data TA- / TA+ 1/2
B_RXO0P
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41 TB0 B_GO5 Green Odd Pixel Data
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42 TB1 B_GO6 Green Odd Pixel Data
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44 TB2 B_GO7 Green Odd Pixel Data B_RXO1N /
TB- / TB+ 3/4
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B_RXO1P
45 TB3 B_GO8 Green Odd Pixel Data
Green Odd Pixel
46 TB4 B_GO9
Data(MSB)
64 TD4 B_BO2 Blue Odd Pixel Data(LSB) B_RXO3N /
TD- / TD+ 11 / 12
1 TD5 B_BO3 Blue Odd Pixel Data B_RXO3P
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35 TA2 B_RE6 Red Even Pixel Data B_RXE0N /
TA- / TA+ 14 / 15
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36 TA3 B_RE7 Red Even Pixel Data B_RXE0P
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37 TA4 B_RE8 Red Even Pixel Data
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Green Even Pixel
62 TD2 B_GE2
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Data(LSB) B_RXE3N /
TD- / TD+ 24 / 25
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B_RXE3P
63 TD3 B_GE3 Green Even Pixel Data
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B_RXE0N /
40 TA6 B_GE4 Green Even Pixel Data TA- / TA+ 14 / 15
B_RXE0P
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41 TB0 B_GE5 Green Even Pixel Data
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42 TB1 B_GE6 Green Even Pixel Data
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44 TB2 B_GE7 Green Even Pixel Data B_RXE1N /
TB- / TB+ 16 / 17
B_RXE1P
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45 TB3 B_GE8 Green Even Pixel Data
Green Even Pixel
46 TB4 B_GE9
Data(MSB)
64 TD4 B_BE2 Blue Even Pixel Data(LSB) B_RXE3N /
TD- / TD+ 24 / 25
1 TD5 B_BE3 Blue Even Pixel Data B_RXE3P
BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
BLUE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 -
GREEN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 -
CYAN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
BASIC
COLO RED 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
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R
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MAGENT
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 -
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YELLOW 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 -
WHITE 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
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BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
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DARK 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2
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GRAY ↑
: : : : : : : : : : : : : : : : : :
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SCALE R3~
OF : : : : : : : : : : : : : : : : : : R252
RED ↓
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LIGHT 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R253
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0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R254
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RED 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R255
BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G0
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0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G1
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DARK 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G2
GRAY
↑
SCALE : : : : : : : : : : : : : : : : : :
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G3~
OF
: : : : : : : : : : : : : : : : : : G252
GREE
↓
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LIGHT 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G253
0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G254
GREEN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G255
BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 B1
DARK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 B2
GRAY ↑
SCALE : : : : : : : : : : : : : : : : : : B3~
OF : : : : : : : : : : : : : : : : : : B252
BLUE ↓
LIGHT 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 B253
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 B254
BLUE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B255
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Vertical Period
Display Term
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Vertical Total TVB 1471 1481 1492 lines -
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Active Display
THD 640 640 640 Pixels 4pixel
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Period
Horizontal /clock
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Display Term
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Horizontal 4pixel
TH - 680 - Pixels
Total /clock
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Note (1) This product is DE only mode. The input of Hsync & Vsync signal does
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not have an effect on normal operation.
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(2) Test Point : TTL control signal and CLK at LVDS Tx input terminal in system
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(3) Internal Vcc = 5.0V
TV
TVD TVB
DE
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TH
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THD
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DE
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DCLK
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TC
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DATA
SIGNALS
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TC
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TCH TCL
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DCLK 0.5
VCC
TDS TDH
DISPLAY 0.5
DATA
VCC
TES
DE 0.5
VCC
0≤T1≤10msec
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0≤T2≤50msec
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0≤T3≤50msec
1sec≤T4
On
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Back-Light
(Recommended)
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500msec≤T5
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100msec≤T6
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T1 : VDD rising time from 10% to 90%
T2 : The time from VDD to valid data at power ON.
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T3 : The time from valid data off to VDD off at power Off.
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T4 : VDD off time for Windows restart
T5 : The time from valid data to B/L enable at power ON.
T6 : The time from valid data off to B/L disable at power Off.
The supply voltage of the external system for the Module input should be the same
as the definition of VDD.
Apply the lamp voltage within the LCD operation range. When the back light turns on
before the LCD operation or the LCD turns off before the back light turns off,
the display may momentarily show abnormal screen.
In case of VDD = off level,
please keep the level of input signals low or keep a high impedance.
T4 should be measured after the Module has been fully discharged between power off
and on period.
Interface signal should not be kept at high impedance when the power is on.
VDD Td
90%
80% VCC
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GND
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4.5V ≤ VDD ≤ 5.5V
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If VDD(typ.) x 80% ≤ VCC ≤ VDD(typ) x 90%,
then 0<Td ≤20msec
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Note (1) The above conditions are for the glitch of the input voltage.
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(2) For stable operation of an LCD Module power, please follow them.
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i.e., if typ VDD x 80% ≤ Vcc ≤ typ VDD x 90%, then Td should be less than 20ms.
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8.1 Handling
(a) When the module is assembled, it should be attached to the system firmly
using all mounting holes. Be careful not to twist and bend the module.
(b) Because the inverter uses high voltages, it should be disconnected from power
source before it is assembled or disassembled.
(c) Refrain from strong mechanical shock and / or any force to the module.
In addition to damage, it may cause improper operation or damage to the module
and LED back light.
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(d) Note that polarizer films are very fragile and could be damaged easily.
Do not press or scratch the surface harder than a HB pencil lead.
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(e) Wipe off water droplets or oil immediately. If you leave the droplets for a long
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time, staining or discoloration may occur.
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(f) If the surface of the polarizer is dirty, clean it using absorbent cotton or soft cloth.
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(g) Desirable cleaners are water, IPA (Isopropyl Alcohol) or Hexane.
Do not use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid
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or Methyl chloride. It might cause permanent damage to the polarizer due to chemical
reaction.
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(h) If the liquid crystal material leaks from the panel, it should be kept away
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from the eyes or mouth . In case of contact with hands, legs or clothes, it must
be washed away with soap thoroughly.
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(i) Protect the Module from static, or the CMOS Gate Array IC would be damaged.
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(j) Use finger-stalls with soft gloves in order to keep display clean during the
incoming inspection and assembly process.
(n) Protection film for polarizer on the Module should be slowly peeled off just before use
so that the electrostatic charge can be minimized.
(o) Pins of I/F connector should not be touched directly with bare hands.
8.2 Storage
(a) Do not leave the module in high temperature, and high humidity for a long time.
It is highly recommended to store the module with temperature from 5 to 40 °C
and relative humidity of less than 70%.
(c) The module shall be stored in a dark place. It is prohibited to apply sunlight or
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fluorescent light during the store.
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(d) Storage period is recommended not to exceed 1 year.
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8.3 Operation
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(a) Do not connect or disconnect the Module in the "Power On" condition.
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(b) Power supply should always be turned on/off by the item 6.3
"Power on/off sequence"
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(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic
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interference should be done by system manufacturers. Grounding and shielding
methods may be important to minimize the interference.
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8.4 Operation Condition Guide
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(a) The LCD product should be operated under normal conditions.
Normal condition is defined as below;
- Temperature : 20±15℃
- Humidity : 65±20%
- Display pattern : continually changing pattern (Not stationary)
(b) If the product will be used in extreme conditions such as high temperature,
humidity, display patterns or operation time etc.., It is strongly recommended
to contact SEC for Application engineering advice. Otherwise, its reliability and
function may not be guaranteed. Extreme conditions are commonly found at
Airports, Transit Stations, Banks, Stock market, and Controlling systems.
8.5 Others
(c) Do not exceed the absolute maximum rating value. ( supply voltage variation,
input voltage variation, variation in part contents and environmental temperature,
and so on)
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Otherwise the Module may be damaged.
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(d) If the Module keeps displaying the same pattern for a long period of time,
the image may be "stuck" to the screen.
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To avoid image sticking, it is recommended to use a screen saver.
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(e) This Module has its circuitry PCB's on the rear side and should be handled
carefully in order not to be stressed.
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(f) Please contact SEC in advance when you display the same pattern for a long time.
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