04 Chapter-4
04 Chapter-4
04 Chapter-4
DATA COMMUNICATION
(CC-2102)
TRANSMISSION MODES:
The transmission of binary data across a link can be
accomplished in either parallel or serial mode.
In parallel mode, multiple bits are sent with each clock tick.
In serial mode, 1 bit is sent with each clock tick.
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Parallel transmission:
Binary data, consisting of 1s
and 0s, may be organized into
groups of n bits each.
Computers produce and
consume data in groups of bits
By grouping, we can send data
n bits at a time instead of 1.
This is called parallel
transmission
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Parallel transmission:
The mechanism for parallel
transmission is a conceptually
simple one: Use n wires to send
n bits at one time.
That way each bit has its own
wire, and all n bits of one group
can be transmitted with each
clock tick from one device to
another
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Serial Transmission:
In serial transmission one bit follows another
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Serial Transmission:
The advantage of serial over parallel transmission is that with
only one communication channel, serial transmission reduces the
cost of transmission over parallel by roughly a factor of n.
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Asynchronous Transmission:
Asynchronous transmission is so named because the timing of a
signal is unimportant.
Instead, information is received and translated by agreed upon
patterns.
Patterns are based on grouping the bit stream into bytes. Each
group, usually 8 bits, is sent along the link as a unit.
The sending system handles each group independently, relaying
it to the link whenever ready, without regard to a timer.
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Asynchronous Transmission:
Without synchronization, the receiver cannot use timing to predict when the
next group will arrive.
To alert the receiver to the arrival of a new group, therefore, an extra bit is
added to the beginning of each byte. This bit, usually a 0, is called the start
bit.
To let the receiver know that the byte is finished, 1 or more additional bits are
appended to the end of the byte. These bits, usually 1s, are called stop bits.
By this method, each byte is increased in size to at least 10 bits, of which 8
bits is information and 2 bits or more are signals to the receiver.
In addition, the transmission of each byte may then be followed by a gap of
varying duration. This gap can be represented either by an idle channel or by a
stream of additional stop bits.
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Asynchronous Transmission:
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Synchronous Transmission:
In synchronous transmission, bits are usually sent as bytes and many bytes
are grouped in a frame. A frame is identified with a start and an end byte
In synchronous transmission, we send bits one after another without start or
stop bits or gaps.
It is the responsibility of the receiver to group the bits.
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Isochronous:
In real-time audio and video, in which uneven delays between frames are not
acceptable, synchronous transmission fails.
For example, TV images are broadcast at the rate of 30 images per second;
they must be viewed at the same rate.
If each image is sent by using one or more frames, there should be no delays
between frames.
In isochronous transmission we cannot have uneven gaps between frames.
Transmission of bits is fixed with equal gaps.
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Type of Error:
Whenever bits flow from one point to another, they are subject to
unpredictable changes because of interference.
This interference can change the shape of the signal.
In a single-bit error, a 0 is changed to a 1 or a 1 to a O.
In a burst error, multiple bits are changed.
Some applications require that errors be detected and corrected.
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Type of Error:
Single Bit Error
Burst error
Detection versus Correction
10.14
Coding
10.15
The structure of encoder and decoder
10.16
XORing of two single bits or two words
10.17
Detection Methods:
Detection methods
VRC(Vertical Redundancy Check)
LRC(Longitudinal Redundancy Check)
Checksum
VRC
VRC(Vertical Redundancy Check)
A parity bit is added to every data unit so that the total number of
1s(including the parity bit) becomes even for even-parity check or odd for
odd-parity check
VRC can detect all single-bit errors.
It can detect multiple-bit or burst errors only the total number of errors is
odd.
Even parity VRC concept is given in next fig
VRC
LRC
LRC(Longitudinal Redundancy Check)
Parity bits of all the positions are assembled into a new data unit, which
is added to the end of the data block
VRC & LRC
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Redundancy:
To detect or correct errors, we need to send extra (redundant) bits with data.
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Redundancy:
To be able to detect or correct errors, we need to send some extra bits with
our data.
These redundant bits are added by the sender and removed by the receiver.
Their presence allows the receiver to detect or correct corrupted bits
The correction of errors is more difficult than the detection. In error detection,
we are
looking only to see if any error has occurred. The answer is a simple yes or no.
A single-bit error is the same for us as a burst error.
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Redundancy:
In error correction, we need to know the exact number of bits that are
corrupted and more importantly, their location in the message.
The number of errors and the size of the message are important factors.
If we need to correct one single error in an 8-bit data unit, we need to
consider eight possible error locations; if we need to correct two errors in a
data unit of the same size, we need to consider 28 possibilities.
You can imagine the receiver's difficulty in finding 10 errors in a data unit of
1000 bits
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Hamming Code
Parity bits: The bit which is appended to the original data of binary
bits so that the total number of 1s is even or odd.
Even parity: To check for even parity, if the total number of 1s is even,
then the value of the parity bit is 0. If the total number of 1s
occurrences is odd, then the value of the parity bit is 1.
Odd Parity: To check for odd parity, if the total number of 1s is even,
then the value of parity bit is 1. If the total number of 1s is odd, then
the value of parity bit is 0.
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Hamming Code
2r>=d+r+1
Algorithm of Hamming code:
An information of 'd' bits are added to the redundant bits 'r' to form
d+r.
The location of each of the (d+r) digits is assigned a decimal value.
The 'r' bits are placed in the positions 1,2,.....2k-1.
At the receiving end, the parity bits are recalculated. The decimal
value of the parity bits determines the position of an error.
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Example
Total number of data bits 'd' = 4
Number of redundant bits r : 2r >= d+r+1 2r>= 4+r+1
Therefore, the value of r is 3 that satisfies the above relation.
Total number of bits = d+r = 4+3 = 7;
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Observe from the above figure that the bit positions that includes 1 in the
first position are 1, 3, 5, 7. Now, we perform the even-parity check at these
bit positions. The total number of 1 at these bit positions corresponding to
r1 is even, therefore, the value of the r1 bit is 0.
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Observe from the above figure that the bit positions that includes 1 in the
second position are 2, 3, 6, 7. Now, we perform the even-parity check at
these bit positions. The total number of 1 at these bit positions
corresponding to r2 is odd, therefore, the value of the r2 bit is 1.
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Observe from the above figure that the bit positions that includes 1 in the
third position are 4, 5, 6, 7. Now, we perform the even-parity check at these
bit positions. The total number of 1 at these bit positions corresponding to
r4 is even, therefore, the value of the r4 bit is 0.
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Suppose the 4th bit is changed from 0 to 1 at the receiving end, then
parity bits are recalculated.
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The binary representation of redundant bits, i.e., r4r2r1 is 100, and its
corresponding decimal value is 4. Therefore, the error occurs in a 4th bit
position. The bit value must be changed from 1 to 0 to correct the error.
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References
W. Stallings, Data and Computer Communications, (10e), Pearson Education, 2014.
B. A. Forouzan, Data Communications & Networking, (5e), McGraw Hill, 2013.
D. P. Bertsekas, R. G. Gallager, Data Networks, (2e), Prentice Hall of India, 2011.
A. S. Tenenbaum, Computer Networks, (5e), Prentice Hall of India, 2008.
L. L. Peterson, B. S. Davie, Computer Networks: A Systems Approach, (5e), Morgan Kaufmann
Publishers, 2011.