XO-1.5 Schematics Rev G

5 4 3 2 1
VTERM(+0.9V) CL1B Block Diagram C2

VTT(+1.05V) 2009-12-30
+1.5VSUS VID[0:6]
+1.5V C7-M (ULV) CPU VCORE
D D
+1.8VMEM VCORE:+1.196 ~ +0.748

+1.8V VCCP:+1.05V
+2.5V VCCA:+1.8V or +1.5V
+/- CPU_CLK
3VPCU Clock Gengerator
+/- HCLK
+3.3V ICS9UM7002
+3.3VSUS V4
LCD_3.3V Frame Buffer BUS
LCD_5V
+5V CHA DDRII 1GB
C C
7" LCD DCON SDIO I/F

VX855(U) MICRO SD
VTT:VCCP (+1.05V) VIP I/F

VCC15:+1.5V or +1.2V Camera
VCC33:+3.3V
VCCMEM:+1.8V
VSUS15:+1.5VSUS
VSUS33:+3.3VSUS
SDIO I/F WLAN
WLAN Conn.
B
Module B
Int. HDA CODEC HD Audio

Card Reader
SPK CX20582 USB USB PORT X3 SD Card SLOT
LPC BUS
Audio
Jack EC SPI
KB3700 Flash
A
Int. A
Mic
Quanta Computer Inc.
Int. KB T/P Battery Charger Size Document Number
PROJECT : CL1B
Rev
3A
BLOCK DIAGRAM
Date: Monday, March 15, 2010 Sheet 1 of 36
5 4 3 2 1
5 4 3 2 1
Power States
POWER PLANE VOLTAGE DESCRIPTION CONTROL SIGNAL S0 S3 S4 S5
VIN +10.5V~+25V MAIN power V V V V
VCCRTC_1 +3.0V~+3.3V RTC V V V V
3VPCU +3.3V EC power ALWON V V V V
+1.2VSUS +1.2V Sus pend power 3VPCU V V V X
+5VSUS +5V Sus pend power VR_ON V V V X
VH +15V +5Vs us power rail gate power VR_ON V V V X
+3VSUS +3.3V Sus pend power +1.2VSUS_GD V V V X
VCC18MEM +1.8V Mem ory power VR_ON V V V X
VTERM +0.9V Mem ory power MAIN_ON V V X X
+1.2V +1.2V VX855 core power PRE_MAIN_ON(SUSB#) V V X X
+5V +5V Audio power MAIND V X X X
+3.3V +3.3V Clcok gen/CPU Clock PLL/VGA/ MAIND_R V X X X

I/O power/DCON/Audio power
+2.5V +2.5V LVDS and LVDC PLL power MAIND V X X X
VCCP +1.05V I/O power for Hos t interface/ MAIN_ON V X X X

CPU bus term ination power
+VCC_CORE +0.796V~+1.26V CPU core power SYSOK V X X X
WLAN_3.3V +3.3V WLAN power WLAN_EN V X X X
VCC_SD +3.3V SD power SD_PWROFF V X X X

D D
MICRO_SD_3.3V +3.3V Micro SD power MSD_PWROFF V X X X
LCD_AVDD +9.6V Analog power for LCD VDDEN V X X X
VGH +18V TFT on power for LCD VGH_EN V X X X
VGL -7V TFT off power for LCD LCD_AVDD V X X X
+1.8V +1.8V Digital power of LCD//CPU PLL power LCD_AVDD V X X X
VBAT +5V~+7.5V MAIN BATTERY CHG V V V V
C C
B B
A A
Title
<Title>
Size Document Number Rev

Custom <Doc> <RevCode>
Date: Thursday, March 18, 2010 Sheet 1 of 1

5 4 3 2 1
5 4 3 2 1
D D
Adapter
Charger
MB39A129
VIN
VR_ON
Battery +1.2VSUS_GD MAIN_ON VR_ON SYSOK VDDEN BACKLIGHT
MAXIM
LDO TI MAX1907A
TPS62050 AOZ1016 AOZ1016 AOZ1016 AOZ1016 AT1308X_GRE AT1312A
TPS51116
MAIN_ON PRE_MAIN_ON @0.0005A @0.02A @0.004A @0.0615A
C C
3VPCU VH +5VSUS +3VSUS +VCCP +1.2V VTERM VCC18MEM +VCC_CORE VGH LCD_AVDD VGL LEDPWR
@1.6A
@1.04A @1.557A @1.102A @0.36A @5A 18V +9.6 -7V 17.6V
MAIND MAIND_R WLAN_EN MSD_POWEROFF
VR_ON VR_ON
MOSFET MOSFET MOSFET MOSFET

LDO LDO
WLAN_EN Cam_PWREN VDDEN DCON_EN MAIND
MOSFET MOSFET MOSFET MOSFET MOSFET

+1.2VSUS +2.5VSUS +5V +3.3V WLAN_3.3 MICRO_SD_3.3V
@0.6A @1.1454A @0.012A
DCON_EN MAIND
SD_PWRSEL VA18 DVDD_1.8V LCD_1.8V DCON_1.8V +1.8V
Cam_PWREN
@0.25A @0.003A @0.0565A @0.0035A @0.383A
MOSFET MOSFET
LDO MOSFET
B B
DCON_2.5V +2.5V
@0.079A @0.184A
DOVDD_2.8V VCC_SD
@0.058A
A A

PROJECT : CL1B
3A
POWER MANGER DIAGRAM
5 4 3 2 1
5 4 3 2 1
10
9
MAIN_ON LDO VTERM ( 0.9V )
MAIN_ON
+1.2V SW
VIN 4
SUSC# PWM VCC18MEM

7
3VPCU
D 8a +1.8V_PWRGD D
4
4 +1.2VSUS
LDO +2.5VSUS LDO +1.2VSUS_GD
CPURST# 17
3 CPURST#
VIN
ADP IN
VR_ON
15 CPUPWRGD
C7-M
4 Level CPUPWRGD
+5VSUS Shift
PWM
1
VIN 3VPCU IMVP_GD 14
MIXER PWM VIN 14
SYSOK 12
PWRGD ****
4
+3VSUS VIN
1a VIN_OK
+1.2VSUS_GD PWM
BAT
C
SYSOK C
6 13
CPURST# PWRGD VCORE
2 VCORE ( 0.762V ~ 1.3V )
POWER_BUTTON# PWR_BUT_OUT# (H14) (AG31) PWM
SHDN#
5
RSMRST# 16
RSMRST# (AG32) PCIRST#
7 PRE_MAIN_ON(SUSB#) EC VX855 12 SYSOK 9 MAIN_ON(+1.2V_GD)

7 SUSC#
11a +1.8V_PWRGD
11a VCCP_GD
VIN
7
8 +1.2V
PRE_MAIN_ON(SUSB#)
PWM
B 9 MAIN_ON(+1.2V_GD) B
5VPCU
9 MAIN_ON(+1.2V_GD)
11 +5V
SW
+3VSUS
11 +3.3V
SW
+2.5VSUS
11 +2.5V
SW
+5VPCU
A A
11 +VCCP
PWM
11a VCCP_GD

PROJECT : CL1B
Power Sequency 3A

5 4 3 2 1
5 4 3 2 1
D D
C364
+3.3V 22P/50V/NPO_4
2
L37 C363 *10P/50V/C0G_4
C376 C14 C20 C16 C15 C18 Y3 C362 *10P/50V/C0G_4
MMZ1608S121AT_6
10U_6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 *0.01U/16V_4 14.318MHZ C361 *10P/50V/C0G_4

C365 RN40 C360 *10P/50V/C0G_4
1
22P/50V/NPO_4 U22 33X2_4
CLKX1 3 45 CPU_CLKR 1 2
X1 CPUT_L0F CPU_CLK (5)
CLKX2 4 44 CPU_CLKR# 3 4
X2 CPUC_L0F CPU_CLK# (5)
+3.3VCLK 2 41 HCLKR 1 2
VDDREF CPUT_L1F HCLK (7)
9 40 HCLKR# 3 4
VDDPCI CPUC_L1F HCLK# (7)
11 RN39 33X2_4
R312 C378 C375 C23 C22 VDD3V66
16 VDD3.3 PCIET_L0/CPU_ITPT 39
4.7U/10V/Y5V_8 0.1U/10V_4 0.1U/10V_4 *0.1U/10V_4 21 38
0_6 20091009 del R328 0_4 23 VDD PCIEC_L0/CPU_ITPC
R311 0_4 32 VDD48
VDDPCIEX PCIET_L1 36
VDDCPU 42 35
VDDCPU PCIEC_L1
R301 22/F_4 FSLA 1 34
(12) XIN FSLA/REF0_2x PCIET_L2
PCIEC_L2 33
C366 C24 R318 27/F_4 FSLB 6
(14) PCICLK FSLB/PCICLKA_F0_2X
R320 22/F_4 7 31
(13) LCLK1 **SEL_ITP/PCICLKB_F1_2X PCIET_L3
1U/10V/X5R_4 0.1U/10V_4 R327 27/F_4 PCICLKB 8 30
C
(23) LCLK_EC PCICLKB_F2_2X PCIEC_L3 C
R330 22/F_4 USB_CLK 22 29
(15) USBCLK 48MHz_0_2X PCIET_L4
28 C381 *10P/50V/C0G_4
R308 *0_4 PCIEC_L4
(15) C4PSTOP# 48 *HCLK_66_48_33_25MSTOP#
+3.3V 12 FSLC R335 22/F_4
FSLC/3V66_0F_2x GCLK (12)
C377C373C371C367C359 SMBCK 46 14 R332 0_4 CPUSTP#
SCLK *CPU_STOP# CPUSTP# (15,30)
5
SMBDT 47 25 R319 *0_4 C4PSTOP#

SDATA *PCI_STOP# C4PSTOP# (15)
33P/50V/C0G_4
33P/50V/C0G_4
*10P/50V/C0G_4
33P/50V/C0G_4
*10P/50V/C0G_4
VCC
U1 26 19 DISPCLKI1R R331 22/F_4
PEREQ0# DISPCLKOUT DISPCLKI1 (12)
33_4 R36 4 2 R315 *0_4 27 18
(21) PIXMCLK (5,13,14,20) PCIRST# RESET#/PEREQ1# DISPCLKIN DISPCLKO1 (12)
GND 15
C33 NC7SZ04P5X_NL 25MHz_SATA_2X
GND
GND
GND
GND
GND
GND
GND
GND
3
*22P_4
G1
SMBus ADDRESS : D3 ICS9UM702BKLF-T
5
10
13
17
20
24
37
43
49
20091116 slove the overshoot of clock
20100122
ICS9UM701 ON : 0 OFF : 1
+3.3V
3 2 1
B
FSLA FSLC FSLB CPU PCI B
0 0 0 266.66 33 +3.3V
R302 R333 R317
1 0 0 133.33 33 1K_4 1K_4 *1K_4
0 0 1 200 33 +5V R303

FSLA 4.7K_4
1 0 1 166.66 33 FSLC
2
FSLB Q23
0 1 0 333.33 33
3 1 SMBDT
(15) SMBDT0 SMBDT
1 1 0 100 33 R304 R329 R316
*10K_4 *10K_4 10K_4
0 1 1 400 33 ME2N7002D
1 1 1 200 33 +3.3V
+5V R300
4.7K_4
2
Q21
3 1 SMBCK
(15) SMBCK0 SMBCK
ME2N7002D
A A

PROJECT : CL1B
3A
CLOCK GENERATOR
5 4 3 2 1
5 4 3 2 1
Reserve for internal pull-up resistor verify

U20A +VCCP
HA#3 F3 B9 A20M#
(7) HA#[16:3] AB#3 A20MB A20M# (13)
HA#4 H3 A8 FERR# BREQ#0 R107 220/F_4
AB#4 FERRB# FERR# (13)
HA#5 J1 A10 INIT# BREQ#1 R277 220/F_4
AB#5 INITB INIT# (13)
HA#6 F2 B8 INTR BREQ#2 R105 220/F_4
AB#6 INTR INTR (13)
HA#7 J2 C9 NMI BREQ#3 R106 220/F_4
AB#7 NMI NMI (13)
HA#8 K1 D9 IGNNE# RN1 150X4_6
AB#8 IGNNEB IGNNE# (13)
HA#9 G3 C10 SMI# 7 8
AB#9 SMIB SMI# (13)
HA#10 K3 A11 SLP# INTR 5 6
AB#10 SLPB SLP# (13)
D HA#11 L2 B10 STPCLK# IGNNE# 3 4 D
AB#11 STPCLKB STPCLK# (13)
HA#12 L3 A18 DPW R# SMI# 1 2
AB#12 DPWRB# DPW R# (7)
HA#13 J3 B1 ADS# ADS# RN2 150X4_6
AB#13 ADSB ADS# (7)
HA#14 M3 D3 T18 DPSLP# 7 8
AB#14 BNRB BNR# (7)
HA#15 L1 A1 INIT# 5 6
AB#15 DBSYB DBSY# (7)
HA#16 M1 A2 NMI 3 4
AB#16 DEFERB DEFER# (7)
N2 A4 A20M# 1 2
NC/AB#17 DRDYB DRDY# (7)
N3 NC/AB#18 HITB B3 HIT# (7)
HA#30 N1 C3 PROCHOT R260 150/F_4
(7) HA#30 AB#30 HITMB HITM# (7)
B2 STPCLK# R109 150/F_4
TRDYB HTRDY# (7)
C4 Close SLP# R115 150/F_4
BPRIB BPRI# (7)
C1 BREQ#0
BREQB0
U1 BREQ#1
BREQ#0 (7) to CPU
BREQB1
BREQB2 C5 BREQ#2 side HTDO R258 56/F_4
D5 BREQ#3 HTMS R257 56/F_4
BREQB3 HTDI R101 56/F_4
LOCKB D4 HLOCK# (7)
REQB0 D1 HREQ#0 (7)

D2 CPUPW RGD R243 56/F_4
REQB1 HREQ#1 (7)
F1 FERR# R113 56/F_4
REQB2 HREQ#2 (7)
CPURST# R99 *54.9/F_4
PSI# R104 56/F_4
HD#0 A20 B4 THRMTRIP# R114 56/F_4
(7) HD#[63:0] DB#0 RSB0 RS#0 (7)
HD#1 F18 A3 BEVO0 R103 56/F_4
DB#1 RSB1 RS#1 (7) (6) BEVO0
HD#2 D18 E3 BEVO1 R102 56/F_4
DB#2 RSB2/NC (6) BEVO1
HD#3 C19 T13 BEVO2 R98 56/F_4
DB#3 (6) BEVO2
HD#4 E18 G1
DB#4 ASTBNB0 HADSTB0N# (7)
HD#5 H20 G2 BEVO3 R97 0_4
DB#5 ASTBPB0 HADSTB0P# (7) (6) BEVO3
C HD#6 C20 HTCK R100 56/F_4 C
HD#7 DB#6 HTRST# R261 56/F_4
C18 DB#7
HD#8 B19 E19
DB#8 DSTBPB0 HDSTB0P (7)
HD#9 E20 F19
DB#9 DSTBNB0 HDSTB0N (7)
HD#10 G20 U20
HD#11 G18 T20
HD#12 J18 W15
HD#13 D20 V15
HD#14 F20 Y6
HD#15 H18 Y5
HD#16 L19
HD#17 DB#16 CPU_CLK +3.3VSUS
L18 DB#17 BCLK A14 CPU_CLK (4)
HD#18 U19 A13 CPU_CLK#
DB#18 BCLKB CPU_CLK# (4)
HD#19 V19
HD#20 DB#19 CPUPW RGD
M20 DB#20 BSEL0 C14
HD#21 K19 D14 R242
DB#21 BSEL1
3
HD#22 K20 47K_4
HD#23 DB#22 CPURST#
N20 DB#23 RESETB C13 CPURST# (7)
HD#24 R19 C8 CPUPW RGD C299
HD#25 DB#24 PWRGOOD ME2N7002D
P19 DB#25 2
HD#26 P18 B5 *10P/50V/C0G_4 Q16
DB#26 RESERVE
3
HD#27 U18 T4
1
HD#28 DB#27 GND 2009/06/22 modify by CPU delay time
W20 DB#28
HD#29 M19 C7 PSI#
HD#30 DB#29 PSIB# ME2N7002D
T18 DB#30 2 PW RGD (15,23)
HD#31 R20 H17 CPU_COMP10 R55 27.4/F_4 Resistor must be Q15
HD#32 DB#31 COMP0
Y12 close to the CPU
1
HD#33 DB#32 CPU_COMP12 R276 27.4/F_4
V13 DB#33 COMP2 T3
HD#34 Y17 U5
B HD#35 W17
DB#34 MPI Level shift for CPUPWRGD B
HD#36 DB#35
V16 DB#36 THERMDA C17
HD#37 Y19 A17
HD#38 DB#37 THERMDC THRMTRIP#
W18 DB#38 THERMTRIPB A16 THRMTRIP# (13)
HD#39 V18 B18 PROCHOT T60 +3.3VSUS
HD#40 DB#39 PROCHOTB
W12 DB#40
HD#41 Y14 J20
HD#42 DB#41 DPB0 CPURST#
Y13 DB#42 DPB1 R18
HD#43 Y16 V11 R275
HD#44 DB#43 DPB2 47K_4
W14 DB#44 DPB3 Y10
3
HD#45 Y11
HD#46 DB#45 DPSLP#
V12 DB#46 DPSLPB# B11 DPSLP# (13)
HD#47 V14
HD#48 DB#47 HTDI
W10 DB#48 TDI C15 2
HD#49 Y8 A15 HTDO
HD#50 DB#49 TDO HTMS Q18
V10 B15 Has an
1
HD#51 DB#50 TMS HTRST# ME2N7002D
W4 B16
DB#51 TRSTB internal
3
HD#52 W7 C16 HTCK
HD#53 DB#52 TCK 55 ohm
Y9 DB#53
HD#54 W8 B7 CPU_VID0
HD#55 DB#54 VID0 CPU_VID1
CPU_VID0 (30) pull
W5 DB#55 VID1 C6 CPU_VID1 (30) (4,13,14,20) PCIRST# 2
HD#56 V6 A7 CPU_VID2 high
DB#56 VID2 CPU_VID2 (30)
HD#57 V9 B6 CPU_VID3 Q20
CPU_VID3 (30)
1
HD#58 DB#57 VID3 CPU_VID4 ME2N7002D
V3 DB#58 VID4 A6 CPU_VID4 (30)
HD#59 Y3 A5 CPU_VID5
DB#59 VID5 CPU_VID5 (30)
HD#60 Y4
HD#61 DB#60 HDBI#3
V7 DB#61 DINVB3 V5 HDBI#[3:0] (7)
HD#62 V4 V17 HDBI#2
HD#63 DB#62 DINVB2 HDBI#1 2009/06/22 prevent CPURST# leakage
A V8 DB#63 DINVB1 N18 A
H19 HDBI#0
DINVB0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B20
L20
P20
V20
D19
G19
J19
N19
T19
W19
K18
M18
Y18
A19
D17
E17
J17
M17
N17
P17
T17

PROJECT : CL1B
C7M_1GHz Size Document Number Rev
3A
CPU C7M V4BUS
5 4 3 2 1
5 4 3 2 1
D D
+VCORE BEVO0
BEVO0 (5)
BEVO1
BEVO1 (5)
BEVO2
BEVO2 (5)
BEVO3
BEVO3 (5)
VCCSENSE T4 Test point must be

VSSSENSE T3 on the same side
M13
M11
G12
G10
N12
R12
H11
N10
R10
C12
C11
D11
P13
K11
P11
E10
B12
T13
F11
T11
L12
L10
J12
J10
M9
M7
G8
G6
H9
N8
R8
H7
N6
R6
H5
U3
U4
K9
P9
K7
P7
E6
K5
F9
T9
F7
T7
T5
L8
L6
J8
J6
U20B
G16
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE68
VCC_CORE69
VCC_CORE72
BEVO0
BEVO1
BEVO2
BEVO3
VCC_SENSE
VSS_SENSE
VCC_CORE2
J16 P1
VCC_CORE3 CFUSE0
L16 R1 HALF# (7)
VCC_CORE4 CFUSE1
N16 T1
VCC_CORE5 CFUSE2
R16 P2
VCC_CORE6 CFUSE3 20mils 20mils +1.8V
F15 R2
VCC_CORE7 CFUSE4 L24 R241
H15 T2
VCC_CORE8 CFUSE5 VCCA0
K15 P3
VCC_CORE9 CFUSE6
M15 R3
VCC_CORE10 CFUSE7 NHCB2012KF-131T10 130 0/F_1206
P15 P4
VCC_CORE11 CFUSE8 C297 C296 40mils
T15
VCC_CORE12 VCCA0 10U/6.3V/X5R_8
E14 F17 0.1U/10V_4
VCC_CORE13 VCCA0
G14
VCC_CORE14 VCCA1
J14 A9
VCC_CORE15 VCCA1 20mils 20mils
L14
VCC_CORE16 L26
N14
VCC_CORE17 REMOVE FOR C7-M, mount for nano
R14 B17 VCCA1
VCC_CORE18 RSVD R39 *0_4
F13 Y20 DPRSTP# (13)
VCC_CORE19 RSVD NHCB2012KF-131T10 130
H13 N4
VCC_CORE20 RSVD C305 C302
K13 E1 HABI# (7)
+VCCP VCC_CORE21 RSVD 10U/6.3V/X5R_8
Y1 0.1U/10V_4
RSVD
C M5 W1 C
VCCP RSVD
F5 U2
VCCP RSVD
E16
VCCP
V2
VCCP4
E8 M2
VCCP GND
W2 D6
VCCP6 GND
G17 W3
VCCP7 GND
L17 K2
VCCP8 GND
R17 H2
VCCP9 GND
U17 E2
VCCP10 GND
V1 C2
VCCP11 GND
E12 H1
VCCP GND
U14 Y2
VCCP13 GND
U11
VCCP14
U8
VCCP15
G4
VCCP16
L4
VCCP17
R4
VCCP18
P5
VCCP
K17
VCCP
D8
VCCP
D12
VCCP
D16
VCCP
U13
U9
VCCP
VCCP
Put the caps. on the bottom of CPU.
Please refer to the placement below.
+VCORE
F16
GND +VCORE
H16
GND
K16
GND
M16
GND C52 C352 C70 C65
P16
GND + + + + +
T16
GND C64 C51 C68 C62 C57 C67 C49 C50 C45 C59
U16
B GND 22U/6.3V/X5R_8 22U/6.3V/X5R_8 22U/6.3V/X5R_8 22U/6.3V/X5R_8 22U/6.3V/X5R_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
B
W16
GND
E15
GND
G15
GND
J15
GND
L15
GND
N15
GND
R15
GND +VCORE +VCCP +VCCP
U15
GND
Y15
GND
F14
GND
H14
GND
K14
GND C43 C44 C58 C63 + + + + C74 C46 C35 C56 C73
M14
GND 0.01U/25V/X7R_4 0.01U/25V/X7R_4 C39 C356 C40 C71 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
P14
GND 0.01U/25V/X7R_4 0.01U/25V/X7R_4 22U/6.3V/X5R_8 22U/6.3V/X5R_8 22U/6.3V/X5R_8
T14
GND *22U/6.3V/X5R_8
D15
GND
E13
GND 20091009 Del
G13
GND
J13
GND
L13
GND C7M_1GHz +VCCP
N13
GND
R13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W13 +VCORE
GND
C37 C38 C36 C53
B14
F12
H12
K12
M12
P12
T12
U12
B13
D13
E11
G11
J11
L11
N11
R11
W11
A12
F10
H10
K10
M10
P10
T10
U10
E9
G9
J9
L9
N9
R9
W9
D10
F8
H8
K8
M8
P8
T8
E7
G7
J7
L7
N7
R7
U7
Y7
F6
H6
K6
M6
P6
T6
U6
W6
E5
G5
J5
L5
N5
R5
D7
E4
F4
H4
J4
K4
M4
0.01U/25V/X7R_4 0.01U/25V/X7R_4
0.01U/25V/X7R_4 0.01U/25V/X7R_4
+ +
20091009 Change part with Polymer

2009/12/28 Del C357 for cost down
C358 C357
220u/2.5V_7343 *220u/2.5V_7343
A A

PROJECT : CL1B
3A
CPU C7M POWER&GND
5 4 3 2 1
5 4 3 2 1
+3.3V L28
NHCB2012KF-131T10 130 +VCCP
VCCA33HCK
20091116 Delete 0 ohm C321 C98 C91

4.7U/10V/Y5V_8 0.1U/10V_4 1000P/50V/X7R_4
M11
M13
M15
M17
N12
N14
N16
L12
L14
L16
L18
J15
U19A
VCCA33HCK
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
B15 HD#0
HD0 HD#1
HD1 B13 HD#[63:0] (5)
D E11 HD#2 D
HCLK HD2 HD#3
(4) HCLK J12 HCLK+ HD3 C14
HCLK# J13 G12 HD#4
(4) HCLK# HCLK- HD4
F11 HD#5
HD5 HD#6
HD6 G11
HA#3 E16 C11 HD#7
HA#4 HA3 HD7 HD#8
(5) HA#[16:3] G18 HA4 HD8 A15
HA#5 H20 B14 HD#9
HA#6 HA5 HD9 HD#10
H21 HA6 HD10 H12
HA#7 G19 A11 HD#11
HA#8 HA7 HD11 HD#12
E20 HA8 HD12 G10
HA#9 F17 D10 HD#13
HA#10 HA9 HD13 HD#14
G20 HA10 HD14 A13
HA#11 D21 F10 HD#15
HA#12 HA11 HD15 HD#16
A21 HA12 HD16 C10
HA#13 F21 D9 HD#17
HA#14 HA13 HD17 HD#18
E21 HA14 HD18 C7
HA#15 B21 B6 HD#19
HA#16 HA15 HD19 HD#20
G22 HA16 HD20 A9
C8 HD#21
HD21 HD#22
(5) HA#30 H22 HAHI0 HD22 B10
A8 HD#23
HD23 HD#24
HD24 H9
R122 *0_4 D17 F9 HD#25
(6) HABI# HABI HD25
R233 *0_4 F18 E9 HD#26
(6) HALF# HALF HD26
E8 HD#27
HD27 HD#28
HD28 C6
B9 HD#29 Place VX855Bottom
HD29 HD#30 +VCCP
C HOST HD30 H10
D8 HD#31 C
HD31 HD#32
Rev0.2 HD32 C2
F7 HD#33
HD33 HD#34
HD34 B5
C3 HD#35 C319 C315 C307 C311 C95 C102
HD35 HD#36 4.7U/10V/Y5V_8 4.7U/10V/Y5V_8 1U/10V/X5R_6 1U/10V/X5R_6 0.01U/25V/X7R_4 1000P/50V/X7R_4
HD36 D6
A5 HD#37
HD37 HD#38
HD38 E7
H14 G8 HD#39
(5) CPURST# CPURST HD39
B1 HD#40
HD40 HD#41
(5) ADS# H18 HADS HD41 D5
B2 HD#42
HD42 HD#43
(5) BNR# H13 HBNR HD43 C4
A4 HD#44
HD44 HD#45
(5) BPRI# E12 HBPRI HD45 E5
G7 HD#46
HD46 HD#47
(5) DBSY# H17 HDBSY HD47 F6 Debug test point
D4 HD#48
HD48 HD#49
(5) DEFER# G15 HDEFER HD49 E3
D2 HD#50 HD#48 1 HD1
HD50 HD#51
(5) DRDY# C12 HDRDY HD51 G2
F3 HD#52 HD#24 1 HD3
HD52 HD#53
(5) HIT# F15 HHIT HD53 E1
D1 HD#54 HD#33 1 HD2
HD54 HD#55
(5) HITM# G14 HHITM HD55 F5
H6 HD#56
HD56 HD#57
(5) HLOCK# F14 HLOCK HD57 H5
G3 HD#58
HREQ#0 HD58 HD#59
(5) HREQ#0 D16 HREQ0 HD59 H1
B HREQ#1 HD#60 B
(5) HREQ#1 C16 HREQ1 HD60 H2
HREQ#2 E17 G6 HD#61
(5) HREQ#2 HREQ2 HD61
H4 HD#62
HD62 HD#63
HD63 E4
(5) HTRDY# C15 HTRDY
HDSTB0P D14 HDSTB0P (5)

(5) RS#0 D12 HRS0 HDSTB0N D13 HDSTB0N (5)
(5) RS#1 E15 HRS1
HDSTB1P A7 HDSTB1P (5)
HDSTB1N B7 HDSTB1N (5)
(5) BREQ#0 G16 HBREQ0 2/3 of VCCP +/-2%
HDSTB2P B3 HDSTB2P (5)
HDBI#0 A12 A3
HDBI0 HDSTB2N HDSTB2N (5)
HDBI#1 B11
HDBI#2 HDBI1
H8 HDBI2 HDSTB3P F2 HDSTB3P (5)
HDBI#3 G4 F1 R116
HDBI3 HDSTB3N HDSTB3N (5)
49.9/F_4
(5) HDBI#[3:0]
J21 GTLVREF
HGTLVREF0 +VCCP
(5) HADSTB0N# F19 HADSTB0N HGTLVREF1 J18
(5) HADSTB0P# E19 HADSTB0P R118
C111 C114 C106 100/F_4
DPW R# F13
(5) DPW R# HDPWR
GNDA33HCK
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
J17 HGTLPVT_REXT R236 54.9/F_4
HGTLPVT_REXT
A A
J14
VX855_27x27_08M

PROJECT : CL1B
3A
VX855(U) HOST BUS
5 4 3 2 1
5 4 3 2 1
VCC18MEM
+1.2VSUS
C350
0.1U/10V_4
W20
W22
M19
M21
N20
N22
R20
R22
U20
U22
N24
P21
V21
T21
L20
L22
U19B
D D
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUS18MEM
VSUSMEM
MDA0 V26
MDA1 MDA0
(9,10) MDA[63:0] W26 MDA1
MDA2 Y29 U32 R_MCLKOA0+ R214 22/F_4
MDA2 MCLKOA0+ MCLKOA0+ (9)
MDA3 AA25 T32 R_MCLKOA0- R215 22/F_4
MDA3 MCLKOA0- MCLKOA0- (9)
MDA4 Y24
MDA5 MDA4 R_MCLKOA1+ R218 22/F_4
W24 MDA5 MCLKOA1+ E28 MCLKOA1+ (10)
MDA6 Y26 E27 R_MCLKOA1- R220 22/F_4
MDA6 MCLKOA1- MCLKOA1- (10)
MDA7 V25
MDA8 MDA7
U31 MDA8 MCLKOA2+ P29
MDA9 U25 N29
MDA10 MDA9 MCLKOA2-
U28 MDA10 20091119 For 512MB, depopulate
MDA11 T24 J24
MDA12 MDA11 MCLKOA3+
V29 MDA12 MCLKOA3- J25
MDA13 U27
MDA14 MDA13
V27 MDA14
MDA15 U29
MDA16 MDA15
P30 MDA16
MDA17 T29
MDA18 MDA17
R28 MDA18
MDA19 T28
MDA20 MDA19
R27 MDA20 VX855 MEM Power Cap
MDA21 T30 Y25 DQMA0
MDA21 MDQMA0 DQMA0 (9) VCC18MEM
C MDA22 R26 U24 DQMA1 C
MDA22 MDQMA1 DQMA1 (9)
MDA23 R32 R30 DQMA2
MDA24 N28 P25 DQMA3
MDA25 N25 C30 DQMA4
MDA26 N27 F27 DQMA5
MDA27 P26 D26 DQMA6 C273 C109 C108 C110 C117
MDA28 M26 E24 DQMA7 10U/10V/X5R_8 0.1U_4 0.1U_4 0.1U_4 0.1U_4
MDA29 P27
MDA30 MDA29
P24 MDA30
MDA31 M29 W28 DQSA0+
MDA31 MDQSA0+ DQSA0+ (9)
MDA32 C28 W27 DQSA0-
MDA32 MDQSA0- DQSA0- (9) VCC18MEM
MDA33 D32 T25 DQSA1+
MDA34 D29 T26 DQSA1-
MDA34 MDQSA1- DQSA1- (9)
MDA35 E31 P31 DQSA2+
MDA36 E29 R31 DQSA2-
MDA37 D28 N31 DQSA3+
MDA38 D30 N32 DQSA3- C272 C116 C118 C115
MDA39 DQSA4+ 1U/10V/X5R_6 0.1U_4 0.1U/10V_4 0.1U_4
MDA40
B31
F26
MDA39 MEMORY CH - A MDQSA4+ C31
C32 DQSA4-
DQSA4+ (10)
MDA41 A31 B29 DQSA5+
MDA42 B27 A28 DQSA5-
MDA44 B30 B26 DQSA6-
MDA46 C26 A23 DQSA7-
MDA47 C27
MDA48 MDA47
A24 MDA48
MDA49 D24 F30 ODTA0
MDA49 MODTA0 ODTA0 (9,10)
MDA50 G26 K24
B MDA51 MDA50 MODTA1 B
E25 MDA51 MODTA2 J28
MDA52 F25 M24
MDA53 MDA52 MODTA3
H25 MDA53
MDA54 D25
MDA55 MDA54
A25 MDA55 MCKEA0 M28 CKEA0 (9,10)
MDA56 D22 M30 CKEA0
MDA57 MDA56 MCKEA1
G24 MDA57 MCKEA2 L27
MDA58 F23 M25
MDA59 MDA58 MCKEA3
G23 MDA59
MDA60 H24 R152
MDA61 MDA60 1K_4
F22 MDA61 MCSA0 G31 CSA#0 (9,10)
MDA62 E23 H28
MDA63 MDA62 MCSA1
C22 MDA63 MCSA2 H30
MCSA3 J27
MAA[12:0] (9,10)
VCC18MEM BAA0 F31 G30 MAA0
BAA1 MBAA0 MAA0 MAA1
H32 MBAA1 MAA1 J29
+0.9VSMVREF BAA2 L28 K26 MAA2
MBAA2 MAA2 MAA3
(9,10) BAA[2:0] MAA3 K25
K27 MAA4
R211 SRASA# MAA4 MAA5
(9,10) SRASA# J31 MSRASA MAA5 L26
R212 SCASA# F29 K30 MAA6
(9,10) SCASA# MSCASA MAA6
SW EA# G32 K31 MAA7
(9,10) SW EA# MSWEA MAA7
K29 MAA8
*1K/F_4 MAA8 MAA9
MAA9 L31
0_4 R217 301/F_4 E32 J32 MAA10
MEMRCOMP MAA10 MAA11
MAA11 M32
A L32 MAA12 A
MEMVREF_A MAA12 MAA13
N23 MEMAVREF MAA13 H29 MAA13 (9,10)
L30 MAA14
MAA14 T20
R125
*1K/F_4 C279 C119 C120 VX855_27x27_08M
4.7U/10V/Y5V_8 0.1U/10V_4 0.1U/10V_4

PROJECT : CL1B
3A
VX855(U) MEM BUS CH1
5 4 3 2 1
5 4 3 2 1
VCC18MEM
+0.9VSMVREF
MCLKOA0+ VCC18MEM DDR_VREF

(8) MCLKOA0+
MCLKOA0- VCC18MEM
(8) MCLKOA0-
22u/6.3V_8
RN21 22X2_4
22u/6.3V_8
DQSA0+ 3 4 DQSAR0+ C214 R141 R158
(8) DQSA0+
DQSA0- 1 2 DQSAR0- C178 0.01u/16V_4 *1K_4 0_4
(8) DQSA0-
RN29 22X2_4 0.01u/16V_4 C270 C199 C217 C193
DQSA1- 3 4 DQSAR1- C242 C140 C224 C142
(8) DQSA1- T28 T26
DQSA1+ 1 2 DQSAR1+
(8) DQSA1+
RN11 22X2_4 VCC18MEM 0.01u/16V_4 0.01u/16V_4 VCC18MEM
D DQSA2- DQSAR2- 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 R136 C210 D
(8) DQSA2- 3 4
DQSA2+ 1 2 DQSAR2+ 0.01u/16V_4 *1K_4 0.1U/10V_4
(8) DQSA2+
RN6 22X2_4
DQSA3+ 3 4 DQSAR3+
(8) DQSA3+
DQSA3- DQSAR3-
C1
C3
C7
C9
H9
C1
C3
C7
C9
H9
E1
A9
A1
E9
A2
E1
A9
A1
E9
A2
L1
L3
L7
L1
L3
L7
(8) DQSA3- 1 2 U12 U7
DQMA0 R153 22/F_4 DQMAR0
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_1
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_2_(A14)
NC_3_(A15)
NC_1
NC_2_(A14)
NC_3_(A15)
(8) DQMA0
DQMA1 R156 22/F_4 DQMAR1 MAAR0 H8 MAAR0 H8
(8) DQMA1 MA0 MA0
MAAR1 H3 MAAR1 H3
DQMA2 R144 22/F_4 DQMAR2 MAAR2 MA1 MAAR2 MA1
(8) DQMA2 H7 MA2 H7 MA2
DQMA3 R139 22/F_4 DQMAR3 MAAR3 J2 MAAR3 J2
(8) DQMA3 MA3 MA3
MAAR4 J8 MAAR4 J8
MAAR5 MA4 MAAR5 MA4
J3 MA5 J3 MA5
MAAR6 J7 MAAR6 J7
MAAR7 MA6 MAAR7 MA6
(8) MDA[31:0] K2 K2
MDA3 RN30 MDAR3 MAAR8 MA7 MAAR8 MA7
7 8 K8 K8
MDA7 22X4_4 MDAR7 MAAR9 MA8 MDAR20 MAAR9 MA8 MDAR13
5 6 K3 MA9 DQ0 C8 K3 MA9 DQ0 C8
MDA5 3 4 MDAR5 MAAR10 H2 C2 MDAR16 MAAR10 H2 C2 MDAR12
MDA4 MDAR4 MAAR11 MA10 DQ1 MDAR18 MAAR11 MA10 DQ1 MDAR10
1 2 K7 MA11 DQ2 D7 K7 MA11 DQ2 D7
MDA2 7 8 RN27 MDAR2 MAAR12 L2 D3 MDAR23 MAAR12 L2 D3 MDAR14
MDA0 22X4_4 MDAR0 MAAR13 MA12 DQ3 MDAR21 MAAR13 MA12 DQ3 MDAR9
5 6 L8 D1 L8 D1
MDA6
MDA1
3
1
4
2
MDAR6
MDAR1
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D0 DQ4
DQ5
DQ6
D9
B1
MDAR19
MDAR17
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D1 DQ4
DQ5
DQ6
D9
B1
MDAR11
MDAR15
MDA15 7 8 RN31 MDAR15 BAAR2 G1 B9 MDAR22 BAAR2 G1 B9 MDAR8
MDA9 22X4_4 MDAR9 BA2 DQ7 BA2 DQ7
5 6
MDA12 3 4 MDAR12 CKEAR0 F2 CKEAR0 F2
MDA14 MDAR14 ODTAR0 CKE ODTAR0 CKE
1 2 F9 ODT F9 ODT
MDA11 7 8 RN23 MDAR11
MDA10 5 6 22X4_4 MDAR10 SWEAR# F3 B7 DQSAR2+ SWEAR# F3 B7 DQSAR1+
MDA13 MDAR13 SRASAR# WE DQS DQSAR2- SRASAR# WE DQS DQSAR1-
3 4 F7 A8 F7 A8
MDA8 MDAR8 SCASAR# RAS DQS SCASAR# RAS DQS
1 2 G7 G7
MDA20 RN16 MDAR20 CAS CAS
7 8
MDA22 5 6 22X4_4 MDAR22 CSAR#0 G8 B3 DQMAR2 CSAR#0 G8 B3 DQMAR1
MDA18 MDAR18 CS DM CS DM
C 3 4 C
MDA19 1 2 MDAR19 MCLKOA0+ E8 MCLKOA0+ E8
MDA17 RN15 MDAR17 MCLKOA0- CLK+ MCLKOA0- CLK+
7 8 F8 F8
MDA16 22X4_4 MDAR16 DDR_VREF CLK- DDR_VREF CLK-
5 6
VSSDL
VSSDL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDA23 3 4 MDAR23 DDR_VREF E2 E2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MDA21 MDAR21 VREF VREF
1 2
MDA29 5 6 22X4_4 MDAR29 C153 nanya 128*8_1G C220 nanya 128*8_1G
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
MDA26 3 4 MDAR26 0.01u/16V_4
MDA27 1 2 MDAR27 0.01u/16V_4
MDA31 5 6 22X4_4 MDAR31 VCC18MEM VCC18MEM
MDA24 3 4 MDAR24
MDA28 1 2 MDAR28
C274 C197 C211 C246 C212 C271 C245 C138 C196 C164
T25 T27
22u/6.3V_8
0.01u/16V_4
0.01u/16V_4
0.01u/16V_4
0.01u/16V_4
22u/6.3V_8
0.01u/16V_4
0.01u/16V_4
0.01u/16V_4
0.01u/16V_4
ODTA0 ODTAR0 VCC18MEM VCC18MEM
(8,10) ODTA0 ODTAR0 (8,10)
CSA#0 CSAR#0
(8,10) CSA#0 CSAR#0 (8,10)
BAA2 BAAR2
(8,10) BAA2 BAAR2 (8,10)
BAA0 BAAR0
(8,10) BAA0 BAAR0 (8,10)
SRASA# SRASAR#
C1
C3
C7
C9
H9
C1
C3
C7
C9
H9
E1
A9
A1
E9
A2
E1
A9
A1
E9
A2
L1
L3
L7
L1
L3
L7
(8,10) SRASA# SRASAR# (8,10) U6 U13
BAA1 BAAR1
(8,10) BAA1 BAAR1 (8,10)
MAA10 MAAR10
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_1
NC_2_(A14)
NC_3_(A15)
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_1
NC_2_(A14)
NC_3_(A15)
(8,10) MAA10 MAAR10 (8,10)
MAAR0 H8 MAAR0 H8
MAAR1 MA0 MAAR1 MA0
H3 MA1 H3 MA1
MAA12 MAAR12 MAAR2 H7 MAAR2 H7
(8,10) MAA12 MAAR12 (8,10) MA2 MA2
MAA9 MAAR9 MAAR3 J2 MAAR3 J2
(8,10) MAA9 MAAR9 (8,10) MA3 MA3
CKEA0 CKEAR0 MAAR4 J8 MAAR4 J8
(8,10) CKEA0 CKEAR0 (8,10) MA4 MA4
MAA13 MAAR13 MAAR5 J3 MAAR5 J3
(8,10) MAA13 MAAR13 (8,10) MA5 MA5
MAAR6 J7 MAAR6 J7
MAAR7 MA6 MAAR7 MA6
K2 K2
MAA0 MAAR0 MAAR8 MA7 MAAR8 MA7
(8,10) MAA0 MAAR0 (8,10) K8 K8
MAA2 MAAR2 MAAR9 MA8 MDAR0 MAAR9 MA8 MDAR24
B
(8,10) MAA2 MAAR2 (8,10) K3 C8 K3 C8 B
MAA4 MAAR4 MAAR10 MA9 DQ0 MDAR5 MAAR10 MA9 DQ0 MDAR26
(8,10) MAA4 MAAR4 (8,10) H2 C2 H2 C2
MAA1 MAAR1 MAAR11 MA10 DQ1 MDAR1 MAAR11 MA10 DQ1 MDAR25
(8,10) MAA1 MAAR1 (8,10) K7 MA11 DQ2 D7 K7 MA11 DQ2 D7
MAAR12 L2 D3 MDAR7 MAAR12 L2 D3 MDAR30
MAAR13 MA12 DQ3 MDAR3 MAAR13 MA12 DQ3 MDAR29
L8 D1 L8 D1
(8,10)
(8,10)
SWEA#
SCASA#
SWEA#
SCASA#
SWEAR#
SCASAR#
SWEAR#
SCASAR#
(8,10)
(8,10)
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D4 DQ4
DQ5
DQ6
D9
B1
MDAR6
MDAR4
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D5 DQ4
DQ5
DQ6
D9
B1
MDAR31
MDAR27
MAA3 MAAR3 BAAR2 G1 B9 MDAR2 BAAR2 G1 B9 MDAR28
(8,10) MAA3 MAAR3 (8,10) BA2 DQ7 BA2 DQ7
MAA6 MAAR6
(8,10) MAA6 MAAR6 (8,10)
CKEAR0 F2 CKEAR0 F2
ODTAR0 CKE ODTAR0 CKE
F9 ODT F9 ODT
MAA8 MAAR8
(8,10) MAA8 MAAR8 (8,10)
MAA5 MAAR5 SWEAR# F3 B7 DQSAR0+ SWEAR# F3 B7 DQSAR3+
(8,10) MAA5 MAAR5 (8,10) WE DQS WE DQS
MAA11 MAAR11 SRASAR# F7 A8 DQSAR0- SRASAR# F7 A8 DQSAR3-
(8,10) MAA11 MAAR11 (8,10) RAS DQS RAS DQS
MAA7 MAAR7 SCASAR# G7 SCASAR# G7
(8,10) MAA7 MAAR7 (8,10) CAS CAS
CSAR#0 G8 B3 DQMAR0 CSAR#0 G8 B3 DQMAR3
CS DM CS DM
VCC18MEM VCC18MEM MCLKOA0+ E8 MCLKOA0+ E8
MCLKOA0- CLK+ MCLKOA0- CLK+
F8 F8
C136 0.1u/10V_4 C180 0.01u/16V_4 DDR_VREF CLK- DDR_VREF CLK-
VSSDL
VSSDL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
C185 0.1u/10V_4 C160 0.01u/16V_4 DDR_VREF E2 DDR_VREF E2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C131 0.1u/10V_4 C141 0.01u/16V_4 VREF VREF
C208 0.1u/10V_4 C139 0.01u/16V_4
C194 0.1u/10V_4 C155 0.01u/16V_4 C221 nanya 128*8_1G nanya 128*8_1G
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
C184 0.1u/10V_4 C154 0.01u/16V_4 Layout Notes: C162
0.01u/16V_4
C179 0.1u/10V_4 C167 0.01u/16V_4

placement between
0.01u/16V_4
C144 0.1u/10V_4 C177 0.01u/16V_4
C209 0.1u/10V_4 C157 0.01u/16V_4
C175 0.1u/10V_4 C213 0.01u/16V_4 MCLKOA0+
C150 0.1u/10V_4 C169 0.01u/16V_4
C226 0.1u/10V_4 C186 0.01u/16V_4
C137 0.1u/10V_4 C205 0.01u/16V_4
C135 0.1u/10V_4
A C168 0.1u/10V_4 R145 R142 A
C204 0.1u/10V_4 200_4 200_4
C191 0.1u/10V_4 2009/07/27 delete SPI ROM
C187 0.1u/10V_4
C143 0.1u/10V_4 MCLKOA0-

PROJECT : CL1B
3A
DDR II MEMORY BANK 1
5 4 3 2 1
5 4 3 2 1
(8,9) MAAR[13:0]
(8,9) BAAR[2:0]
CSAR#0
(8,9) CSAR#0
CKEAR0 VCC18MEM VCC18MEM
(8,9) CKEAR0
ODTAR0
(8,9) ODTAR0
T30 T23
C244 C218 C207 C174 C159 VCC18MEM C268 C225 C152 C188 C198 VCC18MEM
22u/6.3V_8
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
22U/6.3V_8
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
SWEAR# 0.01U/16V_4 0.01U/16V_4
(8,9) SWEAR#
SRASAR#
(8,9) SRASAR#
SCASAR#
D (8,9) SCASAR# D
MCLKOA1+
C1
C3
C7
C9
H9
C1
C3
C7
C9
H9
E1
A9
A1
E9
A2
E1
A9
A1
E9
A2
L1
L3
L7
L1
L3
L7
(8) MCLKOA1+ U15 U9
MCLKOA1-
(8) MCLKOA1-
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_1
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_2_(A14)
NC_3_(A15)
NC_1
NC_2_(A14)
NC_3_(A15)
RN7 22X2_4 MAAR0 H8 MAAR0 H8
DQSA4- 3 DQSAR4- MAAR1 MA0 MAAR1 MA0
(8) DQSA4- 4 H3 MA1 H3 MA1
DQSA4+ 1 2 DQSAR4+ MAAR2 H7 MAAR2 H7
(8) DQSA4+ MA2 MA2
RN22 22X2_4 MAAR3 J2 MAAR3 J2
(8) DQSA5- 4 J8 J8
DQSA5+ 1 DQSAR5+ MAAR5 MA4 MAAR5 MA4
(8) DQSA5+ 2 J3 MA5 J3 MA5
(8) DQSA6- 4 K2 MA7 K2 MA7
DQSA6+ 1 2 DQSAR6+ MAAR8 K8 MAAR8 K8
(8) DQSA6+ MA8 MA8
RN4 22X2_4 MAAR9 K3 C8 MDAR63 MAAR9 K3 C8 MDAR50
DQSA7+ 3 DQSAR7+ MAAR10 MA9 DQ0 MDAR58 MAAR10 MA9 DQ0 MDAR55
(8) DQSA7+ 4 H2 C2 H2 C2
DQSA7- 1 DQSAR7- MAAR11 MA10 DQ1 MDAR61 MAAR11 MA10 DQ1 MDAR49
(8) DQSA7- 2 K7 D7 K7 D7
L2 MA12 DQ3 D3 L2 MA12 DQ3 D3
DQMA4 R137 22/F_4 DQMAR4 MAAR13 L8 D1 MDAR60 MAAR13 L8 D1 MDAR51
(8)
(8)
DQMA4
DQMA5
DQMA5 R157 22/F_4 DQMAR5 BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D2 DQ4
DQ5
DQ6
D9
B1
MDAR62
MDAR59
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D3 DQ4
DQ5
DQ6
D9
B1
MDAR53
MDAR54
DQMA6 R154 22/F_4 DQMAR6 BAAR2 G1 B9 MDAR56 BAAR2 G1 B9 MDAR52
(8) DQMA6 BA2 DQ7 BA2 DQ7
DQMA7 R143 22/F_4 DQMAR7
(8) DQMA7
CKEAR0 F2 CKEAR0 F2
ODTAR0 CKE ODTAR0 CKE
F9 ODT F9 ODT
RN14 22X4_4 SWEAR# F3 B7 DQSAR7+ SWEAR# F3 B7 DQSAR6+
(8) MDA[63:32] WE DQS WE DQS
MDA33 7 8 MDAR33 SRASAR# F7 A8 DQSAR7- SRASAR# F7 A8 DQSAR6-
MDA35 MDAR35 SCASAR# RAS DQS SCASAR# RAS DQS
5 6 G7 G7
MDA36 MDAR36 CAS CAS
3 4
MDA37 1 2 MDAR37 CSAR#0 G8 B3 DQMAR7 CSAR#0 G8 B3 DQMAR6
RN3 22X4_4 CS DM CS DM
MDA39 7 8 MDAR39 MCLKOA1+ E8 MCLKOA1+ E8
MDA38 MDAR38 MCLKOA1- CLK+ MCLKOA1- CLK+
5 6 F8 F8
MDA32 MDAR32 DDR_VREF CLK- DDR_VREF CLK-
3 4
VSSDL
VSSDL
C C
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDA34 1 2 MDAR34 E2 E2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RN18 22X4_4 VREF VREF
MDA46 7 8 MDAR46
MDA45 5 6 MDAR45 nanya 128*8_1G C163 nanya 128*8_1G
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
MDA43 3 4 MDAR43 C222 0.01U/16V_4
MDA41 1 2 MDAR41 0.01U/16V_4
RN33 22X4_4
MDA42 7 8 MDAR42 VCC18MEM VCC18MEM
MDA44 5 6 MDAR44
MDA47 3 4 MDAR47
MDA40 1 2 MDAR40
RN32 22X4_4
MDA54 7 8 MDAR54 C269 C215 C161 C134 C149 C243 C192 C223 C206 C216
T24 T29
22u/6.3V_8
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
22u/6.3V_8
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
MDA51 5 6 MDAR51 0.01U/16V_4 0.01U/16V_4
MDA55 3 4 MDAR55 VCC18MEM VCC18MEM
MDA48 1 2 MDAR48
RN20 22X4_4
MDA49 7 8 MDAR49
MDA53 5 6 MDAR53
MDA50 MDAR50
C1
C3
C7
C9
H9
C1
C3
C7
C9
H9
E1
A9
A1
E9
A2
E1
A9
A1
E9
A2
L1
L3
L7
L1
L3
L7
3 4
MDA52 MDAR52 U8 U14
1 2
RN5 22X4_4
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_1
VDDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC_2_(A14)
NC_3_(A15)
NC_1
NC_2_(A14)
NC_3_(A15)
MDA61 7 8 MDAR61 MAAR0 H8 MAAR0 H8
MDA62 MDAR62 MAAR1 MA0 MAAR1 MA0
5 6 H3 H3
3 4 H7 H7
1 2 J2 MA3 J2 MA3
7 8 J3 J3
5 6 J7 MA6 J7 MA6
MDA58 3 4 MDAR58 MAAR7 K2 MAAR7 K2
1 2 K8 K8
MAAR9 MA8 MDAR43 MAAR9 MA8 MDAR32
K3 C8 K3 C8
H2 C2 H2 C2
B K7 D7 K7 D7 B
L2 D3 L2 D3
L8 D1 L8 D1
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D6 DQ4
DQ5
DQ6
D9
B1
MDAR45
MDAR42
BAAR0
BAAR1
G2
G3
MA13
BA0
BA1
D7 DQ4
DQ5
DQ6
D9
B1
MDAR38
MDAR37
BAAR2 G1 B9 MDAR41 BAAR2 G1 B9 MDAR34
BA2 DQ7 BA2 DQ7
CKEAR0 F2 CKEAR0 F2
Termination resistor ODTAR0 F9
CKE
ODT
ODTAR0 F9
CKE
ODT
VTERM SWEAR# F3 B7 DQSAR5+ SWEAR# F3 B7 DQSAR4+
SRASAR# WE DQS DQSAR5- SRASAR# WE DQS DQSAR4-
F7 A8 F7 A8
RN17 33X4_4 SCASAR# RAS DQS SCASAR# RAS DQS
G7 G7
SRASA# CAS CAS
(8,9) SRASA# 7 8
MAA9 5 6 CSAR#0 G8 B3 DQMAR5 CSAR#0 G8 B3 DQMAR4
(8,9) MAA9 CS DM CS DM
MAA12 3 4
(8,9) MAA12
MAA7 1 2 MCLKOA1+ E8 MCLKOA1+ E8
(8,9) MAA7 CLK+ CLK+
RN19 33X4_4 MCLKOA1- F8 MCLKOA1- F8
DDR_VREF CLK- DDR_VREF CLK-
7 8
VSSDL
VSSDL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MAA3 5 6 E2 E2
(8,9) MAA3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MAA10 VREF VREF
(8,9) MAA10 3 4
MAA5 1 2
(8,9) MAA5
RN13 33X4_4 nanya 128*8_1G nanya 128*8_1G
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
K9
J1
E3
A3
D8
D2
B8
B2
A7
E7
MAA0 7 8 C165 C227
(8,9) MAA0
MAA2 5 6 0.01U/16V_4 0.01U/16V_4
(8,9) MAA2
MAA13 3 4
(8,9) MAA13
MAA6 1 2
(8,9) MAA6
RN9 33X4_4
MAA4 7 8
(8,9) MAA4
MAA8 5 6 VTERM
(8,9) MAA8
MAA11 3 4
(8,9) MAA11
SCASA# 1 2 Layout Notes:
(8,9) SCASA#
RN28 33X4_4 0.1u/10V_4 C151
ODTA0 0.1u/10V_4 C166
placement between
(8,9) ODTA0 7 8
A CSA#0 5 6 0.1u/10V_4 C183 A
(8,9) CSA#0
3 4 0.1u/10V_4 C158
SWEA# 1 2 0.1u/10V_4 C181 MCLKOA1+
(8,9) SWEA#
0.1u/10V_4 C148
RN24 33X2_4 0.1u/10V_4 C172
BAA1 3 4 0.1u/10V_4 C176
(8,9) BAA1
MAA1 1 2 0.1u/10V_4 C195
(8,9) MAA1
0.1u/10V_4 C173 R138 R140
RN25 33X2_4 0.1u/10V_4 C189 200_4 200_4
(8,9) BAA2
BAA2 3 4 0.1u/10V_4 C156 Quanta Computer Inc.
BAA0 1 2
(8,9) BAA0
20091119 For 512MB, depopulate MCLKOA1-
PROJECT : CL1B
3A
DDR II MEMORY BANK 1
5 4 3 2 1
5 4 3 2 1
U19C
D D
AE27 MDB0 MCLKOB+ AB25
AG28 MDB1 MCLKOB- AB24
AE28 MDB2
AG30 MDB3
AH29 MDB4 MDQSB0+ AF26
AE29 MDB5 MDQSB0- AF27
AF29 MDB6
AE25 MDB7 MDQSB1+ AD29
AB29 MDB8 MDQSB1- AD30
AD26 MDB9
AB26 MDB10
AD28 MDB11 MODTB AA31
AC26 MDB12
AB27 MDB13
AD25 MDB14 MCKEB AA32
AC27 MDB15
MCSB Y32
Y30 MSRASB
VCC18MEM
+0.9VSMVREF
AA29
AA28
MSCASB MEMORY CH - B MAB0 W31
AC32
MSWEB MAB1
MAB2 W32
MAB3 AC30
R209 R208 Y28
*1K/F_4 0_4 MAB4
MAB5 AC31
MAB6 W30
MAB7 AD32
C V31 C
MEMVREF_B MAB8
AC24 MEMBVREF MAB9 AE31
MAB10 AB30
MAB11 V30 T36
MAB12 AE32 T41
R213
*1K/F_4 C280 C281
*4.7U/10V/Y5V_8 0.1U/10V_4 AA27
MBAB0
MBAB1 AB31
VX855_27x27_08M
B B
A A

PROJECT : CL1B
3A
VX855(U) MEM BUS CH2 & PCIE
5 4 3 2 1
5 4 3 2 1
PR148
*RL3720W T-R025 VCCA25DAC 74mA L35 400mA
+2.5V
1 2 NHCB2012KF-131T10 130
C344
C330 C332
1P
2P
L34 0.1U/10V_4 0.1U/10V_4 *47U_6.3V_1210
20091116 depopulate +2.5V 76mA VCCA25LVDS GNDADAC 2009/10/05 Change part
NHCB2012KF-131T10 130 20091116 depopulate
(15) SERIAL_EN C341 C335 VCCA25PLLDISP 45mA L32

4.7U/10V/Y5V_8 0.01U/25V/X7R_4 NHCB2012KF-131T10 130
GNDALVDS 2009/10/05 Delete R278
+3.3VSUS C89 C336 C342
D L33 1000P/50V/X7R_4 0.1U/10V_4 1U/6.3V_6 D
+2.5V 6mA VCC25PLLLVDS GNDPLLDISP
(15) SERIAL_EN NHCB2012KF-131T10 130
20091019 change net name VCC33VGA 4mA L31 +3.3V
C340 C80 C334 NHCB2012KF-131T10 130
2009/08/25 R247 4.7U/10V/Y5V_8 0.01U/25V/X7R_4 1000P/50V/X7R_4
Populate by 10K_4 GNDA25LVDS C88 C93 C338 2009/10/05 Delete R278
1000P/50V/X7R_4 0.1U/10V_4 10U/10V/X5R_8
W12
default
U12
R12
P11
V11
V13
Y11
Y13
T11
T13
R7
GNDVGA
J3
J4
U19D
J4
VCCA25DAC
VCCA25DAC
VCCA25DAC
VCCA25PLLLVDS
VCCA25LVDS
VCCA25LVDS
VCCA25LVDS
VCCA25PLLDISP
VCC33VGA
VCC33VGA
VCC33VGA
VCC33VGA
VCC33VGA
1 PIXDATA2
5 2 PIXDATA3 PIXDATA0
6 3 (21) PIXDATA0 AB7 VCPD00/PTS0DO
PIXDATA1 AA6 R59 *33_4 C54 *22P_4
4 (21) PIXDATA1 VCPD01/PTS0D1
spacing 15mils (21) PIXDATA2 PIXDATA2 AB6
PIXDATA3 VCPD02/PTS0D2
(21) PIXDATA3 AB1 VCPD03/PTS0D3 close to U19
COM_PORT PIXDATA4 GCLK
(21) PIXDATA4
PIXDATA5
AB3
AB4
VCPD04/PTS0D4 CLK GCLK J11 GCLK (4)
R70 *33_4 C75 *22P_4
(21) PIXDATA5 VCPD05/PTS0D5
PIXDATA6 AC3
(21) PIXDATA6 VCPD06/PTS0D6
PIXDATA7 AD3 T6 XIN close to U19
(21) PIXDATA7 VCPD07/PTS0D7 XIN XIN (4)
AC6 VCPD08/STS1D
PIXDATA9
PIXDATA10
AC5 VCPD09/STS1VLD GRAPHIC DISPCLKI0 T2 Cam_Reset (21)
AD6 VCPD10/STS1SYNC VCP DISPCLKO0 R4 Cam_PW REN (21)
AC4
AD7
VCPD11/STS1CLK MISC. T1
20091229 Delete 0 ohm
DISPCLKI1
VCPD12/STS1ERR DISPCLKI1 DISPCLKI1 (4)
AC7 R3 R_DISPCLKO1 DISPCLKO1
VCPD13 DISPCLKO1 DISPCLKO1 (4)
R69 R75 R84 W9 R63 22/F_4
4.7K_4 4.7K_4 4.7K_4 VCPD14
AC8 VCPD15/PTSERR
C C
Cam_HSYNC AA8 U1
(21) Cam_HSYNC Cam_VSYNC VCPHS/PTS0VLD CRTSPD DCONSMBDATA (18)
AA9 VCPVS/PTS0SYNC CRTSPCLK U2
(21) Cam_VSYNC DCONSMBCLK (18)
PIXCLK Y9 U4 20091116 Delete 0 ohm
(21) PIXCLK VCPCLK/PTS0CLK CRTHSYNC CRT_HSYNC (17)
CRTVSYNC U5 CRT_VSYNC (17)
R50 *0_4 CRT J1
(18,31) VGH_EN CRTAB CRT_B (17)
R47 *0_4 P9 K2
(18,31) VDDEN LVDSENVDD CRTAR CRT_R (17)
R37 *0_4 P8 K1
(18,31) BACKLIGHT LVDSENBL CRTAG CRT_G (17)
J5 CRT_RST R60
CRTRSET 174/F_4 R48 R61 R53
L4 *150/F_4 *150/F_4 *150/F_4
LVDSD0+
L3 LVDSD0-
PIXCLK V1
DVPSPD Cam_SMBDATA (21) 20091119 depopulate
M1 LVDSD1+ DVPSPCLK U3 Cam_SMBCLK (21)
M2 LVDSD1- GFBDATA0
M6
LVDS DVP1D0 W3
Y4 GFBDATA1
GFBDATA0 (18)
LVDSD2+ DVP1D1 GFBDATA1 (18)
R91 M5 W1 GFBDATA2
LVDSD2- DVP1D2 GFBDATA2 (18)
*33_4 AA2 GFBDATA3
DVP1D3 GFBDATA3 (18)
N4 AA1 GFBDATA4
LVDSD3+ DVP1D4 GFBDATA4 (18)
N3 Y2 GFBDATA5
LVDSD3- DVP1D5 GFBDATA5 (18)
Y3 GFGDATA1
DVP1D6 GFGDATA1 (18)
C86 P5 AA3 GFGDATA2
LVDSCLK+ DVP1D7 GFGDATA2 (18)
*22P_4 P6 W4 GFGDATA3
LVDSCLK- DVP1D8 GFGDATA3 (18)
V5 GFGDATA4
DVP1D9 GFGDATA4 (18)
Y5 GFGDATA5
B DVP1D10 GFGDATA5 (18) B
P1 AA5 GFGDATA6
DVISWG_REXT DVP1D11 GFGDATA6 (18)
GFRDATA0
DVP/TV DVP1D12 V6
Y6 GFRDATA1
GFRDATA0 (18)
DVP1D13 GFRDATA1 (18)
R42 *0_4 N8 W6 GFRDATA2
(18,31) DBC LVDSBLADJ DVP1D14 GFRDATA2 (18)
V7 GFRDATA3
DVP1D15 GFRDATA3 (18)
DVP1VS V4 GFVSYNC (18)

DVP1HS V3 GFHSYNC (18)
DVP1DE W7 GFP_LDE (18)
Y1 GFRDATA4
DVP1TVCLKR GFRDATA4 (18)
V8 DVP1CLK R92 0_4
DVP1CLK GFDOTCLK (18)
Y7 GFRDATA5
DVP1TVFLD GFRDATA5 (18)
VGPIO1 AA4 T57
C83 R67
*22P_4 *4.7K_4
VX855_27x27_08M
A A

PROJECT : CL1B
3A
VX855(U) VIDEO BUS
5 4 3 2 1
5 4 3 2 1
8mA L19 W LAN_3.3V

NHCB2012KF-131T10 130
C277
L25 8mA 1U/10V/X5R_4

VCC_SD
NHCB2012KF-131T10 130
C113
8mA MICRO_SD_3.3V
C372 L23
*4.7U/10V/Y5V_8 1U/10V/X5R_4 NHCB2012KF-131T10 130
D C286 C287 D
AB22
AB21
AA20
0.1U/10V_4 4.7U/10V/Y5V_8
U19G
20090731 Add 22ohm damping
resistor and pop C121,C329 and
VCCSDIO0
VCCSDIO1
VCCCR
VCC_SD
2009/10/07 SWAP C122
MICRO_SD_3.3V
SD_CMD_L R58 1K_4
AG25 SD_DATA0_L R282 22_4 W LAN_3.3V
SDIO0D0 SD_DATA0 (21)
THRMTRIP# C20 AG24 SD_DATA1_L R283 22_4 MSD_CMD_L R170 1K_4
(5) THRMTRIP# THRMTRIP SDIO0D1 SD_DATA1 (21)
AF23 SD_DATA2_L R284 22_4
DPSLP# B17
SDIO0D2
AG23 SD_DATA3_L R285 22_4
SD_DATA2 (21) SD Card Reader SDDA_CMD R195 1K_4
(5) DPSLP# DPSLP SDIO0D3 SD_DATA3 (21)
A20M# C19 AJ27 SDDA_D0 20090803 Correct
(5) A20M# A20M SDIO1D0 SDDA_D0 (24)
AF25 SDDA_D1
SDIO1D1 SDDA_D1 (24)
FERR# A19 AG22 SDDA_D2
(5) FERR# FERR SDIO1D2
AF24 SDDA_D3
SDDA_D2 (24) WLAN +3.3VSUS
SDIO1D3 SDDA_D3 (24)
IGNNE# B18 C121 22P_4
(5) IGNNE# IGNNE
AJ24 SD_CLKR R130 33_4
SDIO0CLK SD_CLK (21)
INIT# C18 AG26 SD_CMD_L R286 33_4
(5) INIT# INIT SDIO0CMD SD_CMD (21)
INTR D20
CPU Control SDIO SDIO0CD AM26
AH24
SD_CD# (21)
(5) INTR INTR SDIO0WPD SD_W P (21)
R325 R189 R174 R268
NMI B19 AH26 SDDA_CLKR R128 0_4 *10K_4 10K_4 2.2K_4 10K_4
(5) NMI NMI SDIO1CLK SDDA_CLK (24)
AJ26 SDDA_CMD 20090803 Correct
SDIO1CMD SDDA_CMD (24)
SLP# H16 AH21
(5) SLP# SLP SDIO1CD SDDA_CD# (24)
AH27 T55
SMI# SDIO1WPD C122 22P_4 W LAN_EN
(5) SMI# D18 SMI
C C
DPRSTP# E13 AK25 SD_PW ROFF SD_PW ROFF
(6) DPRSTP# NAP SDIO0PWOFF SD_PW ROFF (21)
AJ25 W LAN_EN W LAN_EN (24)
STPCLK# SDIO1PWOFF SD_PW RSEL SD_PW RSEL
(5) STPCLK# A17 STPCLK SDIO0PWSEL AM25 SD_PW RSEL (21)
AM27 T59
SDIO1PWSEL CR_PW ROFF
(23) EC_IRQ# 1 2
D39 1SS400
(14) GPIO10
MSD_W P# R228 1K_4
MEM_ID0 AL10 GPIO9 MSD_D0_L R290 22_4 20091231 populate
(14,24) HDD_LED#/GPIO11 2 1 AJ9 GPIO10 CR_D0 AL30 MSD_D0 (24)
D37 1SS400 AL11 AK29 MSD_D1_L R291 22_4
(14) GPIO11 GPIO11 CR_D1 MSD_D1 (24)
MSD_D2_L R292 22_4
(14,18) DCONIRQ AM11
AK10
GPIO12 GPIO CR_D2 AJ29
AJ30 MSD_D3_L R293 22_4
MSD_D2 (24) MICRO SD
(14) GPIO13 GPIO13 CR_D3 MSD_D3 (24)
MEM_ID1 AF10 AK32 CR_D4 T32
GPIO14 CR_D4
2009/10/07 change net name CR_D5 AK31 CR_D5 T40
CR_D6 T33 +3.3V
12
CR_D6 AM30 Debug port
AL29 CR_D7 T38 DL1
R239 4.7K_4 TESTIN# CR_D7
B22 1
12
R244 4.7K_4 DFTIN# TESTEN 1
A20 DFTEN (15,23) LPCAD0 2 2
R254 4.7K_4 BISTIN R287 33_4
A16 BISTEN Memory CR_CLK AL32 MSD_CLK (24) (15,23) LPCAD1
(15,23) LPCAD2
3
4
3
4
Card AK30 MSD_CMD_L R288 33_4
C329 22P_4 (15,23) LPCAD3 5
6
5
CR_CMD MSD_CMD (24) (15,23) LPCFRAME# 6
T14 TP0 AK28 MSD_CD_L R289 0_4
T15 TP1
K16
J16
TP0 Test CR_CD
AM29 MSD_W P#
(4,5,14,20) PCIRST# 7
8
7
T2 TP2 TP1 CR_WPD 8
J19 TP2 (4) LCLK1 9 9
T9 TP3 AC10 AM31 10
11
T10 TP4 TP3 MS_BS 10
AD8 TP4 MS_INS AH18
R56 *4.7K_4 TP5 L8
FOR DEBUG
11
B R117 *4.7K_4 TP6 TP5 B
AF18 TP6 XD_CD AM28
T19 TP7 AE24 AH30 XD_RE T37 *Debug Conn
TP XD_RE XD_CLE T39
XD_CLE AJ32 Debug port
XD_CE AJ31
T53 NB_TDI AM7
NB_TDO AK8 TDI
(14) NB_TDO TDO
T54 NB_TMS AL7 JTAG AL26 CR_PW ROFF
T52 NB_TRST AM8 TMS CR_PWOFF T58
TRST CR_PWSEL AH19
T50 NB_TCK AL9
TCK
VX855_27x27_08M
+3.3V
+VCCP
MEM_ID0 Populate Depopeplate
R89 R94 CL4(800MHz) R89 R90 TP2
10K_4 *10K_4 0 ( default ) Normal mode
R25
CL3(667MHz) R90 R89 *4.7K_4 1 Debug mode
A A
MEM_ID1
MEM_ID0 TP2
MEM_ID1 Populate Depopeplate
1G R95 R94
R90 R95 R27
*1K_4 1K_4 1K_4 Quanta Computer Inc.
512MB R94 R95
PROJECT : CL1B
GPIO9/GPIO14 -->Internal pull high(2.5V) Size Document Number Rev
3A
VX855(U) SPI/CARD READER
5 4 3 2 1
5 4 3 2 1
U19E +3.3V +3.3V +3.3V

+3.3V AK2 PDD0
PDD0 PDD[15:0]
AJ1 PDD1
PDD1 PDD2
PDD2 AE6
PCIRST#_R R246 4.7K_4 AF4 PDD3
PDD3 PDD4 R266 R35 R45
PDD4 AF3
AE4 PDD5 *1K_4 *2K/F_4 1K_4
PDD5 PDD6
PDD6 AE1
PCICLK AE10 AD2 PDD7
(4) PCICLK PCICLK PDD7
AC2 PDD8 PDA1
PDD8 PDD9 PDA0
PDD9 AD1
R249 22/F_4 PCIRST#_R PDD10
D (23) LPCRST# AM20 PCIRST PCI PDD10 AE3
AD4 PDD11
(13) GPIO13
NB_TDO
D
PDD11 (13) NB_TDO
R251 22/F_4 AE5 PDD12
(4,5,13,20) PCIRST# PDD12
AG3 PDD13
PDD13 PDD14
PDD14 AJ2
AK1 PDD15
PCICLK PDD15 R269 R267 R46
AH1 PDCS1 1K_4 1K_4 1K_4
PDCS1 PDCS1
EIDE/ AG4 PDCS3 +3.3V
PDCS3 PDCS3
N-FLASH AJ4 PDDACK
PDDACK PDDACK
SPI2_SCK AK7 AM3 PDDREQ IDERST# R66 4.7K_4
MSPICLK PDDREQ PDDREQ
R96 SPI2_MISO AM5 AK3 PDIORDY
MSPIDI PDIORDY PDIORDY
*33_4 SPI2_MOSI AL6 AL1 PDDIOR
MSPIDO PDIOR PDDIOR
MSPISS0/SPI2_CS# AK6 AL3 PDDIOW
MSPISS0 PDIOW PDDIOW
MSPISS1 AM6
MSPISS2 AJ8
MSPISS1
MSPISS2 PDA0 AH3 PDA0
PDA0
NB Strapping
C85 PDA1 Pin Function Pull Low Pull High
*22P_4 SPI PDA1 AH4
AJ3 PDA2
PDA1
PDA2 PDA2
(18) DCONBLNK AK5 SSPICLK PLL OK source from NB from SB
AL4 AM2 IRQ15# PDA1
(18) DCONSTAT0
AK4
SSPISDI IRQ14 IRQ15# select PLL Logic*
SSPISDO IDERST#
(18) DCONSTAT1 AM4 SSPISS IDERST AC1 IDERST#
PDA0 IOQ depth 12 * 1
NF_CE4 AF6 T8
NF_CE5 AF7 T7 GPIO13 GTL pull up Enable * Disable
NF_CE6 AG5 T6
NF_CE7 AG6 T5 Debug Link
NB_TDO enable XD Mode* Debug Link
C C
VX855_27x27_08M
+3.3V
2
D4
*CH501H-40PT
Reserve for debug

1
J3
SPI2_MISO
SPI2_SCK 1 2 SPI2_MOSI
MSPISS0/SPI2_CS# 3 4 +3.3V +3.3V +3.3V
5 6
*NA/HEADER 4X2 (Pitch 2.54mm) R263 R358 R361

MSPISS0/SPI2_CS# 4.7K_4 4.7K_4 4.7K_4
MSPISS1
MSPISS2 20091026 modify
PDA2 (13) GPIO10

(13) GPIO11
(13,18) DCONIRQ
R83 R270 R54 R34
1K_4 1K_4 1K_4 1K_4 R264 R355 R363
B *4.7K_4 *4.7K_4 *4.7K_4 B
2009/10/01 don't populate
2009/05/19 modify
HDD connector +3.3V
R21 R20
CN6 *1K_4 *10K_4
1 2
SB Strapping
IDERST# R23 *33_4 Pin 0:LOW 1:High Function
PDD7 3 4 PDD8 PDIORDY
PDD6 5 6 PDD9 IRQ15#
7 8 00 * IDE NB Strapping
PDD5 PDD10 PDDREQ
PDD4 9 10 PDD11 PDD7
11 12 +3.3V
MSPISS1/ 01 NFC Pin 0:Low 1:High FSB Freq.
PDD3 PDD12 MSPISS0
PDD2 13 14 PDD13
15 16 10 CE ATA 000 100Mhz
PDD1 PDD14 R26 R22
PDD0 17 18 PDD15 *10K_4 *5.6K/F_4
19 20 0: SPI/LPC * 001 133Mhz
PDDREQ R310 MSPISS2 NFC ROM GPIO12/
+3.3V 21 22 PDDIOW *10K_4
23 24 1: NFC ROM Select GPIO11/ 010 200Mhz
PDDIOR GPIO10
PDIORDY 25 26
27 28 0: Disable * 011 266Mhz
2
PDDACK IRQ15# PDA2 PCI Master

PDA1 29 30 PDIAG#
31 32 +3.3V
1: Enable Mode Enable 111 * Auto Mode
A PDA0 PDA2 A
PDCS1 33 34 PDCS3
HDDLED# 35 36 3VHDD FB1
(13,24) HDD_LED#/GPIO11 3 1 37 38
3VHDD *HI0805Q310R
Q25 *DTC144EUA 39 40
*HDD_CONN C21
C13 C17 C19 *10U/10V/X5R_8 C369 C386
*1000P/50V/X7R_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *10U/10V/X5R_8 Quanta Computer Inc.
PROJECT : CL1B
3A
VX855(U) PCI&PATA&SATA BUS
5 4 3 2 1
5 4 3 2 1
+3.3VSUSUSB +3.3VSUS Reserve for internal pull-up resistor verify

Avg:76mA ; Max:101mA L27 +3.3V
+3.3VSUSUSB
L29 +3.3VSUS
C282 RTCX1 NHCB2012KF-131T10 130 VCCA33USBD
C301 C298 C304 C103 NHCB2012KF-131T10 130
2
10P/50V/C0G_4 10U/10V/X5R_8 4.7U/10V/Y5V_8 4.7U/10V/Y5V_8 1U/10V/X5R_6 C346 C322 C325 C327
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/10V/X5R_6 SB_W AKE# R121 *10K_4
R216 Y1 EC_SMI_1# R240 *10K_4
*1M_4 32.768KHZ SUSA# R237 *10K_4
1
+3.3VBAT 3mA VSUSAUSBH
C283 RTCX2 VCCA33USBD +1.2V
SMBALRT# R123 *10K_4
D 10P/50V/C0G_4 VCCAUSBD L30 SMBCK0 R296 4.7K_4 D
AC16
AD17
AC14
AC15
AB17
AF30
VCCAUSBD SMBDT0 R295 4.7K_4
Y17
20090604 VIA reconmmend delete R216. U19F
NHCB2012KF-131T10 130
C324 C326
0.1U/10V_4 10U/10V/X5R_8 09/08/17 Delete
VBAT
VSUSA33USBH
VSUSA33USBH
VSUSA33USBH
VSUSAUSBH
VCCA33USBD
VCCAUSBD
USBOC#12 R171 10K_4
PW RGD AG31 +1.2VSUS USBOC#3 R111 10K_4
PWRGD L36 USBOC#4 R110 10K_4
RSMRST# AG32 VSUSAUSBH USBOC#5 R112 10K_4
(23) RSMRST# RSMRST NHCB2012KF-131T10 130
RTC AD10 USBCLK C313 C317 +3.3V
USBCLK USBCLK (4)
RTCX1 AH31 0.1U/10V_4 *10U/10V/X5R_8
RTCXI LPCFRAME# R341 *4.7K_4
RTCX2 AH32 AF14 USBP0+ SERIRQ R340 4.7K_4
RTCXO USBHP0+ USBP0+ (25)
AE14 USBP0- USB0: USB PORT
USBHP0- USBP0- (25)
CPUSTP# R334 *4.7K_4
2009/07/27 modify AE16 USBP1+
USBHP1+ USBP1+ (25)
SMBCK0 AJ23 AF16 USBP1- USB1: USB PORT Close to Chip VRDSLP R259 4.7K_4
(4) SMBCK0 SMBCK1 USBHP1- USBP1- (25)
SMBDT0 AH23 C4PSTOP# R307 4.7K_4
(4) SMBDT0 SMBDT1
AH14 USBP2+
USBHP2+ USBP2+ (25)
USBP2- USB2: USB PORT
(18) DCONLOAD AG20
AF21
SMBCK2 SMBus USBHP2-
AJ14 USBP2- (25)
RTC +3.3VBAT
(24) W LAN_RESET# SMBDT2
AL16 C353
SMBALRT# AH20 USBHP3+ T49 10U/10V/X5R_8
AM16 T46 D19
SMBALRT USBHP3-
USB 2.0 3VPCU 2 1
CH501H-40PT
JP1 USBHP4+ AJ16
AH16
HA_USBP4+ (24)
D20
20MIL
+3.3VBAT 2 1
ENABLE SERIAL USBHP4- HA_USBP4- (24)
2 1 RTCRST# +5VSUS
C 2 1 CH501H-40PT C
VCCRTC_1
4
4 3
3
USBHP5+
AL14 W L_USBP5+ (24) USB5: WLAN
1
R134 SERIAL_EN G1
*JP_FS2
AJ21 BATLOW USBHP5- AM14 W L_USBP5- (24) PORT 25MIL
1M_4 CPUSTP# AH9
(12) SERIAL_EN CPUSTP
AJ12 *SHORT_PAD
2
EC_SMI_1# USBHOC0 USBOC#12
(4,30) CPUSTP# AM22 EXTSMI USBHOC1 AK12 USBOC#12 (25)
AH10 R298
INTRUDER# USBHOC2 USBOC#3 R309 Q24 4.7K_4
AF31 INTRUDER USBHOC3 AH12
AJ11 USBOC#4 1K_4 1 3 R305 1K_4 R306 1.2K_4
R400 0_4 USBHOC4 USBOC#5
(23) LID_SW AL23 AK11 CHANGE 6.04K BT1
LID USBHOC5 MMBT3904
4 4 1 1
PW R_BUT_OUT# AM21 AM17 USBREXT R252 6.04K/F_4 3 2
(23) PW R_BUT_OUT#
2
PWRBTN USBHREXT 3 2 R297
R401 *0/short_4 T56 AL21 AF12 T12 RTC-BATT 15K_6
(23) EB_MODE RING USBDP+
THERM_ALERT# AM10
PM USBDP- AE12 T11
THRM
2009/08/05 delete SB_BEEP AJ10
USB Device USBDREXT AM12
SPKR +3.3V
AM18 T45
2009/07/27 modify SUSA# USBD_DET
T44 AM23 AL18 USB_PW R_EN (25,27)
SUSA USBD_PDN +3.3V
SUSB# AL24
(27,29) PRE_MAIN_ON SUSB
LPCDRQ0 AJ6 LPCDRQ#0 R40 *10K_4 SB Strapping
SUSC#1 AM24 AH6 LPCDRQ#1 R44 *10K_4 R86 R77 R72
(23) SUSC# SUSC LPCDRQ1
Pin Function Pull Low Pull High *4.7K_4 *4.7K_4 4.7K_4
VRDSLP AL12 AJ5 LPCFRAME#
(30) VRDSLP VRDSLP LPCFRAME LPCFRAME# (13,23)
Normal When Debug When
LPCAD0 SB_BEEP Debug mode Reset * SB_BEEP
(23) SB_W AKE# 1
D5
2
1SS400
AK18 GPWAKE LPC LPCAD0 AF8
AG7 LPCAD1
LPCAD0 (13,23) Start up AZSYNC
B LPCAD1 LPCAD1 (13,23) B
C4PSTOP# AK9 AH7 LPCAD2 LPC FWH AZSDOUT
(4) C4PSTOP# C4PSTOP LPCAD2 LPCAD2 (13,23)
AG8 LPCAD3 AZSYNC Enable Disable AZBITCLK
LPCAD3 LPCAD3 (13,23) command
T51 AM9 CSTATE1
+3.3VSUS AG9 SERIRQ System Auto
SERIRQ SERIRQ (23)
AZSDOUT Reboot Enable Disable
R231 *0_4 AL22 AZRST# R127 22_4 R87 R78 R73 R82
(23,24) MSD_PW ROFF AZRST AZ_RST# (20)
1K_4 1K_4 *1K_4 1K_4
R321 10K_4 AL20 AG10 AZBITCLK R81 22_4 AZBITCLK LPC/SPI ROM LPC SPI
MSDT AZBITCLK AZ_BITCLK (20)
R322 10K_4 AG19 MSCK
AK21 AZSDIN0
R250 10K_4 KB / MS AZSDIN0
AJ22 AZSDIN1 R124 4.7K_4
AZ_SDIN0 (20)
R119 10K_4
AM19
AK19
KBDT HD Audio AZSDIN1
KBCK
20091015 correct all pull resistors and add MSD_PWROFF signal to GPIO2 AF9 AZSDOUT R71 22_4
AZ_SDOUT (20)
AZSDOUT
R120 4.7K_4 W LAN_RESET# AJ7 AZSYNC R76 22_4 AZ_BITCLK

AZSYNC AZ_SYNC (20)
R203 4.7K_4 DCONLOAD placed next to R81
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C78
22P/50V/NPO_4
2009/07/27 Internal pull high to
AL2
AL5
AL8
AL13
AL15
AL17
AL19
AL25
AL28
AL31
AM13
AM15
2.4V, so need to add 4.7k pull VX855_27x27_08M

+3.3V
high.
A 20091124 Pop R120 for WLAN_RESET# GNDUSB C81 *0.1U/10V_4 A

drop to 2V during suspend
U16
5
(23,25,30) SYSOK 1
4 PW RGD
PW RGD (5,23)
2
(30) IMVP_PW RGD
*IC(5P) TC7SH08FU(F)(SSOP)
3
PROJECT : CL1B
R210 *0/short_4 Size Document Number Rev
20091123 change to short 3A
VX855(U) USB&LPC&DAC&PM
5 4 3 2 1
5 4 3 2 1
U19H
Avg: 2.8mA
M12
M14
M16
M18
M20
M22
M27
M31
N11
N13
N17
N19
N21
N26
N30
K28
K32
P12
P16
P18
P20
P22
P28
P32
L11
L13
L15
L17
L19
L21
L24
L25
L29
M3
M4
M7
N1
N2
N5
N6
N7
R5
R6
Avg: 4.6mA U19I
P2
P3
P4
P7
L1
L2
L5
L6
L7
VSUS AB18 +1.2VSUS
Y19 A2 R11
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+3.3VSUS VSUS33 GND GND
AA18 20091009 Del A6 R13
VSUS33 GND GND
D A10 GND GND R15 D
20091009 Del C107 A14 R17
C285 GND GND
2.2U/6.3V/X5R_6 A18 GND GND R19
Place VX855Bottom 2.2U/6.3V/X5R_6 A22 GND GND R21
+3.3V Y15 VCC33 A26 GND GND R24
AA12 VCC33 Place VX855Bottom A30 GND GND R25
Avg: 25mA AA14 B4 R29
VCC33 GND GND
Max: 75 mA AB11 VCC33 B8 GND GND T3
AB13 VCC33 B12 GND GND T4
AB15 VCC33 B16 GND GND T5
B20 GND GND T12
B24 GND GND T14
B28 GND GND T16
B32 GND GND T18
Avg: 642mA C1 GND GND T20
Max: 1102 mA C5 GND GND T22
C9 GND GND T27
+1.2V P13 VDD C13 GND GND T31
P15 VDD C17 GND GND U11
P17 VDD C21 GND GND U13
P19
R14
VDD POWER C25
C29
GND GND U15
U17
VDD GND GND
R16 VDD D3 GND GND U19
R18 VDD D7 GND GND U21
T15 VDD D11 GND GND U26
T17 VDD D15 GND GND U30
T19 VDD D19 GND GND V12
U14 VDD D23 GND GND V14
U16 VDD D27 GND GND V16
C U18 D31 V18 C
VDD GND GND
V15 VDD E2 GND GND V20
W14 VDD E14 GND GND V28
W16 VDD E18 GND GND V32
W18 VDD E22 GND GND W2
E26 GND GND W5
E30 GND GND W8
F4
F8
GND GROUND GND W11
W13
GND GND
F12 GND GND W15
F16 GND GND W17
F20 GND GND W19
F24 GND GND W21
F28 GND GND W25
F32 GND GND W29
G1 GND GND Y8
G5 GND GND Y12
G9 GND GND Y14
G13 GND GND Y16
G17 GND GND Y18
G21 GND GND Y20
G25 GND GND Y22
G27 GND GND Y27
G28 GND GND Y31
G29 GND GND AA7
H3 GND GND AA11
H7 GND GND AA13
B B
H11 GND GND AA15
VX855_27x27_08M H15 GND GND AA17
H19 GND GND AA19
H23 GND GND AA21
H26 GND GND AA24
Place at VX855 Bottom H27 GND GND AA26
H31 GND GND AA30
J2 GND GND AB2
+1.2V J23 GND GND AB5
J26 GND GND AB8
J30 GND GND AB12
20091027 Delete R280 + C441 C345 C339 C347 C333 C99 C94 C104 C105 C100 K3 AB14
C440 10u/6.3V_6 1U_6 1U_6 1U_6 1U_6 0.1U/10V_4 GND GND
0.1U_4 0.1U_4 0.1U_4 0.1U_4 K4 GND GND AB16
22U/6.3V/X5R_8 K5 AB19
GND GND
GND AB20
GND AB28
20091009 Change BOM AB32
GND
GND AC25
GND AC28
GND AC29
GND AD5
GND AD11
AD12
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND AD13
AD14
AD15
AD16
AD24
AD27
AD31
AE2
AE7
AE8
AE11
AE13
AE15
AE17
AE26
AE30
AF11
AF13
AF15
AF17
AF28
AF32
AG11
AG12
AG13
AG14
AG15
AG16
AG17
AG21
AG27
AG29
AH2
AH5
AH8
AH11
AH13
AH15
AH17
AH22
AH25
AH28
AJ13
AJ15
AJ17
AJ18
AJ19
AJ28
AK13
AK14
AK15
AK16
AK17
AK22
+3.3V
A A
+3.3V
20091027 Delete R271 VX855_27x27_08M
C318 C314 C312 C101 C97 C96
4.7U/10V/Y5V_8 4.7U/10V/Y5V_8 2.2U/6.3V/X5R_6 1U/10V/X5R_6 1U/10V/X5R_6 0.1U/10V_4

PROJECT : CL1B
3A
VX855(U) POWER&GND
5 4 3 2 1
5 4 3 2 1
CRT +5V
D25
5V_CRT
16
*CH501H-40PT CN5
L5 *CONN_CRT
*BK1608LL300 6
CRT_R CRT_R1 1 11
(12) CRT_R
L6 7
CRT_G CRT_G1 2 12
(12) CRT_G
D *BK1608LL300 8 D
CRT_B CRT_B1 3 13
(12) CRT_B
L8 9
*BK1608LL300 T1 4 14
10
C6
C12
C11
R14 R16 R17 5 15
*150/F_4
*150/F_4
*150/F_4
*10P/50V/C0G_4
*10P/50V/C0G_4
*10P/50V/C0G_4
17
+5V
09/09 Del C388
*0.1U/10V_4
U26
1
*74AHCT1G125GW
2 4 CRT_VSYNC1
(12) CRT_VSYNC
CRT_HSYNC1
1
U27
(12) CRT_HSYNC 2 4
C C
*74AHCT1G125GW
2009/07/27 Add spaceing EDID_CLK_CRT
EDID_DATA_CRT
R18 R351
*10K_4
*10K_4
5V_CRT
20091116 depopulate for 512MB
B B
EMI
VIN
C439 C442 C443 C444 C445 C76

0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
1000P/50V/X7R_4
20091009 Change BOM

from 16v to 10v
20090609 modify
A A

PROJECT : CL1B
3A
CRT
5 4 3 2 1
5 4 3 2 1
20091229 Del 0 ohm

(12,31) BACKLIGHT
(12,31) DBC STV (19)

CKV (19)
(19) COLMODE OE (19)
DCON_1.8V
XAO (19)
(12,31) VGH_EN FPOL (19)
FTP1 (19)
(12,31) VDDEN FSTH (19)
FD21 (19)
FD20 (19)
DCON_2.5V R133 *10K_4 TEST2
FD11 (19)
D R224 10K_4 C284 D
FREV (19)
TEST1
FCLK (19)
DCON_2.5V R132 *10K_4 0.1U_4
FD10 (19)
R225 10K_4
FD01 (19)
TEST0
FD00 (19)
DCON_2.5V R131 *10K_4
FREV
BSTH
FSTH
FPOL
FTP1
FD21
FD20
FD11
FCLK
FD10
FD01
FD00
BSTH (19)
XAO
CKV
STV
R226 10K_4
OE
AGMODE L20
DCON_2.5V R129 *10K_4 FCM2012V131DC10
R229 10K_4 LCD_1.8V
C130 C275 C128C126 C278
DCON_2.5V
C112 C292 C293 0.1U_4
1000P_4 0.1U_4
0.1U_4 10U_6.3V_6 DCON_1.8V
10U_6.3V_6 0.1U_4 1000P_4
U17
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
C294 18P_4 C261 C262 C264 FCM2012V131DC10
TEST0
TEST1
TEST2
VDDEN
VGH_EN
COLMODE
DBC
BACKLIGHT
STV
CKV
VCCK(1.8V)-6
GNDK-6
OE
GND-P1
XAO
LCD_1.8V-1
FPOL
FTP1
FSTH
GND-P2
FD21
LCD_1.8V-2
FD20
FD11
FREV
GND-P3
FCLK
LCD_1.8V-3
FD10
FD01
FD00
BSTH
L17 C267
2
2009/10/05 Delete R238 0.1U_4 1000P_4 10U_6.3V_6 0.1U_4
Y2 R230 64 97
14.318MHZ AGMODE VCCK(1.8V)-4
63 VCC-CLK GNDK-5 98
1M_4 DCONXI 62 99 BDATA5 7 8 GFBDATA5 (12)
1
C291 18P_4 DCONXO DCONXI GFBDAT5 BDATA4 RN34 6
61 DCONXO GFBDAT4 100 5 GFBDATA4 (12)
60 101 BDATA3 3 4
GND-CLK GFBDAT3 GFBDATA3 (12)
FBD15 59 102 BDATA2 1 22X4 2
FBD15 GFBDAT2 GFBDATA2 (12)
FBD14 58 103 BDATA1 7 8
FBD13 57 104 BDATA0 5 RN35 6
C U10 FBD12 56 105 3 4 C
FBD12 +3.3V-4 GFGDATA6 (12)
FBA0 21 2 FBD0 55 106 GDATA6 1 22X4 2
A0 DQ0 GND-M5 GFGDAT6 GFGDATA5 (12)
FBA1 22 3 FBD1 FBD11 54 107 GDATA5
FBA2 A1 DQ1 FBD2 FBD10 FBD11 GFGDAT5 GDATA4
23 A2 DQ2 5 53 FBD10 GFGDAT4 108 7 8 GFGDATA4 (12)
FBA3 24 6 FBD3 FBD9 52 109 GDATA3 5 RN36 6
A3 DQ3 FBD9 GFGDAT3 GFGDATA3 (12)
FBA4 27 8 FBD4 FBD8 51 110 GDATA2 3 4
A4 DQ4 FBD8 GFGDAT2 GFGDATA2 (12)
FBA5 28 9 FBD5 FBUDQM 50 111 GDATA1 1 22X4 2
A5 DQ5 FBUDQM GFGDAT1 GFGDATA1 (12)
FBA6 29 11 FBD6 49 112 GDATA0 7 8
FBA7 A6 DQ6 FBD7 FBCLK DCON_2.5V-4 GFGDAT0 RN37 6
30 A7 DQ7 12 48 FBCLK GND-S3 113 5 GFRDATA5 (12)
FBA8 31 39 FBD8 47 114 RDATA5 3 4
A8 DQ8 GND-M4 GFRDAT5 GFRDATA4 (12)
FBA9 32 40 FBD9 FBCLKE 46 115 RDATA4 1 22X4 2
A9 DQ9 FBCLKE GFRDAT4 GFRDATA3 (12)
FBA10 20 42 FBD10 T43 45 116 RDATA3
FBBA0 A10 DQ10 FBD11 FBA9 FBA11 GFRDAT3 RDATA2
19 BA DQ11 43 44 FBA9 GFRDAT2 117 7 8 GFRDATA2 (12)
45 FBD12 DCON_1.8V FBA8 43 118 RDATA1 5 RN38 6
DQ12 FBA8 GFRDAT1 GFRDATA1 (12) 20090826 correct
FBCAS R149 22/F_4
FBCAS-1 16 46 FBD13 FBA7 42 119 RDATA0 3 4
CAS# DQ13 FBA7 GFRDAT0 GFRDATA0 (12)
FBRAS R150 22/F_4
FBRAS-1 17 48 FBD14 FBA6 41 120 1 22X4 2
FBWE R148 22/F_4
FBWE-1 RAS# DQ14 FBD15 L22 FBA6 GND-S4
15 W E# DQ15 49 40 DCON_2.5V-3 +3.3V-3 121
FBCS R151 FBCS-1
22/F_4 18 1000P_4 FCM2012V131DC10 39 122 DOTCLK
CS# VCCK(1.8V)-2 GFDOTCLK GFDOTCLK (12)
FBCLKE 34 14 FBLDQM C289 0.1U_4 38 123 P_LDE R198 22/F_4
CKE LDQM GNDK-2 GFP_LDE GFP_LDE (12)
36 FBUDQM FBA5 C288 37 124 HSYNC R199 22/F_4
UDQM FBA5 GFHSYNC GFHSYNC (12)
FBCLK R146 22/F_4
FBCLK-1 35 33 FBA4 36 125 VSYNC R200 22/F_4
CLK NC1 FBA4 GFVSYNC GFVSYNC (12)
R147 *0_4 37 T22 FBA3 35 126
ECPWRRQST
NC2 FBA3 SMBDATA
DCON_2.5V-2
DCON_2.5V-1
VCCK(1.8V)-1
DCONSTAT0
DCONSTAT1
C182 *22P_4 T21 FBA2 34 127 R197 33_4
DCONLOAD
FBA2 +3.3V-5
DCONIRQ/
1 50 FBA1 33 128 C254 22P_4
VDD1 GND1 FBA1 SMBCLK
FBLDQM
+3.3V
GND-M3
GND-M2
GND-M1
GNDK-1
GND-S1
C203 C171 C170 C202 C190 C201 C200
FBRAS/
FBCAS/
25 26
RESET
FBBA1
FBBA0
FBWE/
VDD2 GND2
FBA10
FBCS/
BLNK
FBD7
FBD6
FBD5
FBD4
FBD3
FBD2
FBD1
FBD0
FBA0
7 4 R135 *SHORT-1A
VDDQ1 GNDQ1 C145 C147 C146 C133 C132
B 13 VDDQ2 GNDQ2 10 B
38 41 DCON_2.5V
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
VDDQ3 GNDQ3 L21 1000P_4
0.1U_4 0.1U_4 0.1U_4 10U_6.3V_6 20091123 change to short
44 VDDQ4 GNDQ4 47
10U_6.3V_6 0.1U_4 1000P_4
0.1U_4 0.1U_4 1000P_4
0.1U_4 FCM2012V131DC10
SDRAM 1Mx16 C123 C124 C129 C127 C125
TSOP-2-50pins +3.3VSUS
L15 C300 C290 R202 4.7K_4

FCM2012V131DC10 0.1U_4 10U_6.3V_6 1000P_4
0.1U_4 0.1U_4 0.1U_4 0.1U_4 R201 4.7K_4
1000P_4 C266
C265
T42
ECPWRRQST
DCONSMBDATA (12)
To NB CRT SPD
DCON_2.5V To NB CRT SPDCLK
DCONSMBCLK (12)
FBLDQM
0.1U_4
FBRAS
DCONBLNK (14) To SB GPIO8/SSPICLK
FBCAS
FBBA0
FBA10
FBWE
FBCS
FBA0
FBD7
FBD6
FBD5
FBD4
FBD3
FBD2
FBD1
FBD0
DCONSTAT1 (14) To SB GPI11/SSPISS
L18
DCONSTAT0 (14) To SB GPI10/SSPISDI
C255 C295 To SB -SMBCK2
DCONLOAD (15)
0.1U_4 1000P_4
DCON power plane To SB GPIO12
R207 10K_4 DCONIRQ (13,14)
Power
Power name Note DCON_1.8V
status
RESET
1 DCON_2.5V SDRAM power S3
DCON_1.8V
A 2 DCON_1.8V DCON core power S3 R206 10K_4 A
C276
3 LCD_1.8V LCD power S3 0.1U_4
4 +3.3V System power S0 Quanta Computer Inc.

PROJECT : CL1B
3A
DCON ASIC
5 4 3 2 1
5 4 3 2 1
LCD_1.8V
C349 C348 C337 C320 C343 C316
10U_6.3V_6
10U_6.3V_6
10U_6.3V_6
0.1U_4 0.1U_4 0.1U_4
57
CN7
GND-3
C26 0.1U_4
C48 C47 C42 C77 C72 C69 C66 C41 C79 C34 C32 C31 C30 C29 C28 10 55
D VGH VGH GND-1 D
54 VGH-1
33P_4 33P_4 33P_4 33P_4 33P_4 33P_4 33P_4 33P_4 33P_4
33P_4 33P_4 33P_4
33P_4 33P_4 33P_4 VGL 53
C27 0.1U_4 VGL-1
52 VDD
STV R28 Bead 220 FP_STV 10 51
(18) STV STV
CKV R29 Bead 220 FP_CKV 50
(18) CKV CKV
OE R30 Bead 220 FP_OE 49
(18) OE OE
XAO 48
(18) XAO XAO
VCOM 47
FPOL R31 Bead 220 FP_FPOL VCOM-1
(18) FPOL 46 FPOL
FTP1 R32 Bead 220 FP_FTP1 45
(18) FTP1 FTP1
FSTH R33 Bead 220 FP_FSTH 44
(18) FSTH FSTH
FD21 R74 Bead 220 FP_FD21 43
(18) FD21 FD21
FD20 R79 Bead 220 FP_FD20 42
(18) FD20 FD20
FD11 R80 Bead 220 FP_FD11 41
(18) FD11 FD11
FREV R85 Bead 220 FP_FREV 40
(18) FREV FREV
FCLK R38 Bead 220 FP_FCLK 39
(18) FCLK FCLK
FD10 R41 Bead 220 FP_FD10 38
(18) FD10 FD10
FD01 R43 Bead 220 FP_FD01 37
(18) FD01 FD01
FD00 R49 Bead 220 FP_FD00 36
(18) FD00 FD00
BSTH R68 Bead 220 FP_BSTH 35
(18) BSTH VDDD-1
34 VSSD-1
GMA1 33
LCD_AVDD GMA3 GMA1-1
32 GMA3-1
C 9.6V R108 R51 C55 GMA5 31 C
360/F_4 360/F_4 0.1U_4 GMA6 GMA5-1
30 GMA6-1
C87 GMA8 29
R57 GMA10 GMA8-1
28 GMA10-1
2.2U/16V_6
324/F_4 27
FP_FCLK VSSA-1
26 VDDA-1
C60 VCOM 25
VCOM-2
2
0.1U_4 24
L46 R62 BPOL
23 BTP1
549/F_4 22
HK1005 33NJ-T BSTH
21 BD21
20 BD20
C61 19
1
0.1U_4 BD11
18 BREV
R65 17
C354 162/F_4 BCLK
16 BD10
18P_4 15 BD01
14 BD00
C82 13
0.1U_4 VDDD-2
9.6V 12 VSSD-2
R88 11
536/F_4 LCD_AVDD 3VPCU GMA1-2
10 GMA3-2
9 GMA5-2
20091217 EMI request to add RC filter 8 GMA6-2
3
B C84 Q19 7 B
0.1U_4 GMA8-2
2 6 GMA10-2
R93 5
432/F_4 2N7002W-7-F VGL VSSA-2
4
1
VDDA-2
3 VGL
R64 C92 0.1U_4 VCOM 2
27/F_4 C90 VCOM VCOM-3
1
GND-2
0.1U_4 R265 VCOM VCOM-4
4.99K/F_4
2
C303 R245
0.1U_4 U18 6.8/F_4 C306 C308 C323 R279 LCD_AVDD
56
5
CONN-LCD-55P
1U/50V_8
CONN_LED-4P VCOM-TR 1 + 0.1U_4 0.1U_4 100K_4
4
1
(31) LEDPWR 1
2 3 -
(31) LED1 C328 C309 C310
(31) LED2 3 R262 R253
2
(31) LED3 4
10U/16V_8
*14.7K_4 1.5K/F_4 0.1U_4 0.1U_4
CN3 LMV321M5
C430 C429 C428 C427
VCOM-R: 2.05V
*0.1U_4 *0.1U_4 *0.1U_4 *0.1U_4 R256 R255
VCOM-T: 2.2V *287/F_4 10_4
A A
3
COLMODE 2
(18) COLMODE
Q17
1
*2N7002W-7-F
PROJECT : CL1B
QUANTA CONFIDENTIAL
5 4 3 2
Date:
LCD CONNECTOR
Monday, March 15, 2010 Sheet
1
19 of 36
3A
5 4 3 2 1
+3.3V
AVDD_3.3 pin is output of MIC Indicate Layout Note: Path from +5V to LPWR_5.0 and
AVDD_3.3V +5VA
internal LDO. Do NOT connect RPWR_5.0 must be very low resistance ( <0.01 ohms).
to external supply.
R1 Place bypass caps very close to device.
68_4
(4,5,13,14) PCIRST#
C424 10U/10V/Y5_8
+5VA +5V 3V_DVDD +3.3V VAUX_3.3 +3.3VSUS 3V_DVDD
C423 .1U/10V/X5_4 L41 L1 L7
2
R347 1 2 1 2 1 2
3V_DVDD 0.1_8 NHCB2012KF-131T10 130 NHCB2012KF-131T10 130 NHCB2012KF-131T10 130
C1
C4
C416
C425
C435
AGND D32 D1
VAUX_3.3 1SS400 LED_GRN +5VSUS +3.3VSUS
C7
L40 L38 R356 *0_4
2
20090108 vendor said that AGND C406 CALSSD_5V C403 .1U/10V/X5_4 1 2 1 2
3 1
.1U/16V/Y5_4 *NHCB2012KF-131T10 130 *NHCB2012KF-131T10 130
1U/10V/X5_4
R126 is must.
10U/10V/Y5_8
.1U/16V/Y5_4
C415 C402 .1U/10V/X5_4 Q36
.1U/10V/X5_4
.1U/10V/X5_4
10U/10V/Y5_8
D D
.1U/16V/Y5_4 C_BIAS 2
.1U/16V/Y5_4
FILT_1.65V C401 10U/10V/Y5_8
FILT_1.8V R376 R377 AOS3416
1
C422
C419
C390
R126
C9 .1U/10V/X5_4 C404 10U/10V/Y5_8 10K_4 100K_4
C437 R379
C391 10U/10V/Y5_8 470p_4 100K_4
10K_4
AGND
.1U/10V/X5_4
10U/10V/Y5_8
C405
C10 .1U/10V/X5_4
1U/25V/X7_8
VAUX_3.3 EXT_MIC_PLUG
AGND AGND AGND AGND AGND
21
29
32
30
31
15
18
20
AGND AGND
4
9
U29
HD Audio Bus
FILT_1.8
VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP
FILT_1.65
AVDD_3.3
AVDD_5V
LPWR_5.0
RPWR_5.0
CLASSDREF
AGND AGND AGND R357 R354
(15) AZ_RST# AZ_RST# 11 5.1K/F_4 5.1K/F_4
RESET# B_BIAS
3
(15) AZ_BITCLK AZ_BITCLK 7 44 SENSEA R348 39.2K/F_4 SENSE_HP
AZ_SYNC BIT_CLK SENSE_A SENSEB R352 20K/F_4 SENSE_MIC D27
(15) AZ_SYNC 10 43
R343 22_4 SYNC SENSE_B
(15) AZ_SDIN0 8 BAT54APT
AZ_SDOUT SDATA_IN R359 0_4
6 42
(15) AZ_SDOUT Mono MIC
1
SDATA_OUT PORTF_R R360 0_4 EXT_MIC_PLUG
41
PORTF_L
PORTB_R
40 MIC1_R
MIC1_L
C408
C409
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
EXT_MIC_R
EXT_MIC_L
R7
3K_4
R4 External Microphone Jack
39 3K_4
+5V PORTB_L B_BIAS CN1
38
B_BIAS
1 7
13 37 C_BIAS EXT_MIC_L R8 470_4 EXT_MIC_L_1 R9 470_4 L3 EXT_MIC_L_2 2
PC_BEEP C_BIAS MIC2_R C420 2.2U/6.3V/X5_6 BK1608HS601-T
36 6
R345 *0_4 PORTC_R MIC2_L C421 2.2U/6.3V/X5_6 INT_MIC EXT_MIC_R R5 470_4 EXT_MIC_R_1 R6 470_4 L2 EXT_MIC_R_2
48 35 3
SPDIF/BEEPGAIN PORTC_L BK1608HS601-T 4
47 CX20582 34 2009/06/01 modify 5 8
GPIO0/EAPD# PORTE_R R381 *0_6 C2 C3
46 33
Int. Stereo Speakers GPIO1/SPK_MUTE# PORTE_L
100P/50V/NPO_4
100P/50V/NPO_4
R346 45 CONN_AUDIO_JACK_Mic
GPIO2/SPDIF2 R382 *0_6
28
*0_4 PORTD_R 3V_DVDD 3V_DVDD
27
5V / 8 Ohm / 1.5W 1
PORTD_L
26 HP-OUT-R
R383 *0_6
D29
2
D28
2
CN13 DMIC_3/4 PORTA_R HP-OUT-L C370 1
C 2 25 2 330p/50V_6 AGND AGND C
4
AGND DMIC_CLK0 PORTA_L 20090108 EMI request EXT_MIC_R_1 3 EXT_MIC_L_1

3 3
DMIC_1/2
24 AVEE R385 *0_6 AGND AGND Normal close type
G2
SPK_L+ R375 0_6 AVEE

1 23 1 1
+ FLY_N
Jack insert open
EXT_MUTE#
SPK_L- R378 0_6 2 22 C25 1 2 4.7U/10V_6

- FLY_P C407 1U/25V/X7_8 BAT54S-7-F BAT54S-7-F
G1
EP_GND
RIGHT+
C436 C438 R13 short
RIGHT-
LEFT+
LEFT-
C410 C411 AGND AGND

3
*1000P_4 *1000P_4 R10 *0_4 HP_PLUG

2009/07/27 modify CONN_SPK
.1U/10V/X5_4
10U/10V/Y5_8
R15 short
HeadCN2Phone out
12
14
16
17
19
AGND 49 2009/10/05 change to short

1 7
CN10 AGND HP-OUT-L R373 57/F_4 HP-OUT-L_1 L44 HP-OUT-L_2 2
SPK_R+
SPK_L+
SPK_R-
SPK_L-
3
For layout, need to have wide copper bridge 600/0.2A/BK_6 6

AGND under CODEC connecting AGND and DGND. HP-OUT-R R372 57/F_4 HP-OUT-R_1 HP-OUT-R_2 3
G1
SPK_R- R168 0_6 2 AGND 4

SPK_R+ R166 0_6 -
1 5 8
+ C433 C434
G2
C233 C232 MIC Decoupling close to Codec CONN_AUDIO_JACK_Head
100P/50V/NPO_4
100P/50V/NPO_4
HP/ MIC jack Decoupling close to Connector
4
*1000P_4 *1000P_4
2009/07/27 modify CONN_SPK
AGND AGND AGND AGND
Normal close type

Jack insert open
INT_ MIC
SMD/Wire/2P
B B
INT_MIC R12 INT_MIC_1 L4 INT_MIC_2 2 4
100/1%_4 600/0.2A/BK_6 2 G2
1 3
1 G1
CN4
HP / MIC JACK SENSE CONTROL R11

2.2k/1%_4
C5
100p/50V/NPO_4 AGND_1
C_BIAS
AGND_1
EXT_MIC_PLUG=H ---- EXTERNAL MIC HP_PLUG=H ---- EAR PHONE
EXT_MIC_PLUG=L ---- INTERNAL MIC HP_PLUG=L ---- INTERNAL_SPKER
MIC JACK DECT PIN IS NORMAL CLOSE TYPE Phone JACK DECT PIN IS NORMAL CLOSE TYPE
+5VA
SP1 Short pad_1A

1
3V_DVDD 3V_DVDD SP2 Short pad_1A
D26 3
2
SENSE_MIC SENSE_HP AZ_RST#
R370 R371 AZ_SYNC *DA204U AGND_1 AGND
47k/5%_4 47k/5%_4 AZ_BITCLK
3
AZ_SDOUT AGND_1
C392
C393
C394
C395
EXT_MIC_PLUG 2 HP_PLUG 2
*22p/50V/NPO_4
*22p/50V/NPO_4
*22p/50V/NPO_4
*22p/50V/NPO_4
Q35 Q34
ME2N7002E/60V/0.25A ME2N7002E/60V/0.25A
Layout Note:
1
Place close to
Audio Codec.
AGND AGND
A A
EAR PHONE SYSTEM/DK SW

PROJECT : CL1B
3A
AUDIO_CODEC CX20582
Date: Tuesday, April 13, 2010 Sheet 20 of 36
5 4 3 2 1
5 4 3 2 1
VH
+3.3VSUS
VCC18MEM
R188 2009/07/17 reduce VH
100K_4 pulse on boot 20091021 Change +1.8VSUS to VCC18MEM
3
CON2 VCC_SD
1
1 SD_DATA3 R178 R175
D 1 SD_CMD 10K_4 39K/F_4 D
2 2
3 3 (13) SD_PWRSEL 2 2
4 4
3
5 SD_CLK 1 : 1.8V PC120 Q8
5 C250 Q3 AO3402
6 0 : 3.3V
3
6 SD_DATA0 PDTA124EU 0.47U/10V_4
7 0.1U_4 2 2
1
7 SD_DATA1
8 8 20091224 Correct the pin define
9 SD_DATA2 +3.3VSUS 2009/07/15 modify
9 Q5 Q10 3VPCU forward to
10 SD_CD# (13)
1
G1
3
11 DDTC144EUA DDTC144EUA D36 +1.8VSUS; 0826 add
G2
G3 12 SD_WP (13) BAS316
13 R186 100K_4
G4
VH 2
SD_CLK
SD_CLK (13)
3
SD_CMD Q12
SD_CMD (13)
3
SD_DATA0 R182 82K_4 PC121 AO3402
SD_DATA0 (13)
SD_DATA1 2
SD_DATA1 (13)
1
SD_DATA2 0.47U/10V_4 2 2009/06/01modify
SD_DATA2 (13)
CON_SD SD_DATA3
SD_DATA3 (13)
C247 Q7
1
0.1U_4 DDTC144EUA Q11
1
SD Write Protect Detection DDTC144EUA
R196
(0 : Write Enable, 1 : Write Protect) 22K_4
VCC_SD
C C
(13) SD_PWROFF
C249
10U/6.3V/X5R_8
SD POWER SWITCH CONTROL C351
(1 : Power off) 0.1U_4
2009/07/22 move to
20091126 Add RC delay closed CON2
DOVDD_2.8V TWSI_SDATA
TWSI_SCLK Cam_SMBDATA (12) DOVDD_2.8V
Cam_SMBCLK (12)
DOVDD_2.8V
Camera Indicate
C235 C230
R159
DOVDD_2.8V *22P_4 *22P_4 39_4
R164 R165
VCC18MEM
4.7K_4 4.7K_4 DVDD_1.8V
B CON1 20091021 Change +1.8VSUS to VCC18MEM B
2
GND 20
20
3
Cam_HSYNC 19
(12) Cam_HSYNC 19
Cam_VSYNC 18 +3.3V DOVDD_2.8V D8
(12) Cam_VSYNC 18
Cam_Reset 17 LED_GRN
(12) Cam_Reset 17
PIXCLK 16 2 AO3404
(12) PIXCLK 16 U2 (12) Cam_PWREN
VDD 15 Q2
1
DOVDD 15 DVDD_1.8V
14 14 1 VIN VOUT 5
TWSI_SDATA 13
(12) TWSI_SDATA 13
PIXMCLK 12 C229 2 R163 L47
(4) PIXMCLK
1
TWSI_SCLK 12 1U/10V/X5R_4 GND C228 C231 BK1608HS601-T
(12) TWSI_SCLK 11 11 300K/F_4
PIXDATA0 10 3 4
(12) PIXDATA0 10 SHDN# NC
10U_6.3V_6
1U/10V/X5R_4
PIXDATA1 9
(12) PIXDATA1 9
PIXDATA2 8 RT9198-28PBR C234 C355
(12) PIXDATA2 8
PIXDATA3 7 10U/6.3V/X5R_8 0.1U_4
(12) PIXDATA3 7 (12) Cam_PWREN 2009/07/30 Eliminate
GND 6
PIXDATA4 6
(12) PIXDATA4 5 5
PIXDATA5 4 20091218 excessive noise
(12) PIXDATA5 4
PIXDATA6 3 Camera POWER SWITCH CONTROL
(12) PIXDATA6 3
PIXDATA7 2
(12) PIXDATA7
Cam_PWRDN 2 (1 : Power On)
1 1
CON_CAMERA
A R169 R160 CAMERA CONNECTOR A
0_4 4.7K_4

PROJECT : CL1B
QUANTA CONFIDENTIAL Size Document Number
NAND FLASH/SD/CAMERA
Rev
3A

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : CL1B
3A
NAND FLASH
5 4 3 2 1
5 4 3 2 1
EC ID0 Setting
LCLK_EC EC_ID CL1A EC_RST# 3VPCU KEY PAD
3VPCU 3VPCU
KEY_OUT_1/ISP_EN#
KEY_OUT_3/ISP_CLK
EC ID1 Setting B2 1/2*3VPCU 3VPCU 3VPCU 3VPCU
KEY_OUT_2
R342 A 1/8*3VPCU B3 0
*33_4 R366 R367
1
B1 2/8*3VPCU B4 1/8*3VPCU 56K_4 08/05 depopulate due to ME R183 R2 R3 R177
3VPCU 3VPCU_1 AVCC_EC 3VPCU_1 47K/F_4 issue D16
3/8*3VPCU C1 2/8*3VPCU 100K_4 *10K_4 *10K_4 *10K_4 3VPCU
B3
C387 R339 0_8 L39 EC_ID1 EC_ID0 *CH501H-40PT
*22P_4 FCM2012V131DC10 C1 4/8*3VPCU C2 3/8*3VPCU 1 3 ECRST#
2
D D
C414 C412 C397 C389 2 4 KEY_RT_L KEY_UP_L KEY_DN_R
C426 C2 5/8*3VPCU CL1B C418 R362 C413 R364 SW7 1 3 1 3 1 3
EMI RESERVED 0.1U_4 0.1U_4 *1U_4 0.1U_4 *1U_4 91K_4 *EVQPLWA15 2 4 2 4 2 4
1
B1 8/8*3VPCU 0.1U_4 0.1U_4 *47K/F_4 R179 0_4 C248 SW5 SW2 SW9
2.2U/10V_4 SW_INST D31 SW_INST D34 SW_INST D15
(27) 3VPCU_GD
C396 PAD SIZE 1SS400 1SS400 1SS400 R181
47K_4
2
KEY_IN_1
*1U_4
64
15
42
41
62
13
63
U28 KEY_LF_L KEY_RT_R KEY_UP_R
1 3 1 3 1 3
MR Sensor EEPROM 24C01
VCC18 (reserved for furture used)

GND
GND
AGND
AVCC
VCC
VCC
2 4 2 4 2 4
1
6 KEY_IN_1 SW1 SW11 SW8
GPIO00 KEY_IN_2 SW_INST D35 SW_INST D9 SW_INST D10
9 3 2 +3.3VSUS
GPIO01 KEY_IN_3 GND VCC
10
OUT
LSERIRQ GPIO02 AC_IN S1 2009/09/23 Correct part 1SS400 1SS400 1SS400 R161
(15) SERIRQ 5 SERIRQ AC_IN (26)
LFRAME# 7 28 MRSS20Z R403 reference and footprint 47K_4
(13,15) LPCFRAME#
2
LAD0 LFRAME# GPIO0B R399 0_4 LID_SW KEY_IN_2
(13,15) LPCAD0 14 29 *10K_4
1
LAD1 LAD0 GPIO0C +3.3V +3.3V
(13,15) LPCAD1 12 LAD1
LAD2 11 20090701 add KEY_DN_L KEY_LF_R KEY_ROTATE
(13,15) LPCAD2 LAD2
LAD3 8 LID_SW 20090701 add U24 1 3 1 3 1 3
(13,15) LPCAD3 LAD3 (15) LID_SW
CLK_EC_LPC 16 1 8 C417 *0.1U_6 2 4 2 4 2 4
(4) LCLK_EC GPIO03/PCICLK A0 VCC
1
LPCRST# 21 2 7 SW3 SW6 SW4
(14) LPCRST# GPIO04/PCIRST# A1 WP
3 6 TCM_CLK SW_INST D33 SW_INST D11 EVQPLWA15 D30
20091015 change net name A2 SCL TCM_DAT
3 GND VCC 2 +3.3VSUS 4 GND SDA 5
SB_WAKE# 22 43 KBSCLK 1SS400 1SS400 1SS400 R374
OUT
(15) SB_WAKE# ECRST# GPIO05/SCI# GPIO11 KBSDAT
C 30 44 S2 *M24C02-WDW6TP(TSSOP) 47K_4 C
2
GPIO0D/ECRST# GPIO12 TPCLK MRSS20Z R402 KEY_IN_3
(26) CHG 45
GPIO13 TPDAT
(26) CC0 46 *10K_4 20090610 Change P/N
1
GPIO14
31 GPIO0E
CC0 32 20091116 depopulate 1 3 POWER_BUTTON#
GPIO0F 20090701 add
(15,24) MSD_PWROFF 37 GPIO10 (15) EB_MODE 2 4
SW10 R176
20091026 Delete R398 and EC_MODE; change to MSD_PEROFF EVQPLWA15 47K_4
CHGCUR 38
(26) CHGCUR GPIAD0
1
*EGA10603V05A1-B
EC_ID0 39
EC_ID1 40
GPIAD1
GPIAD2
Spansion SPI SPIVCC EC UART Debug port LED VIN
58 SPIDI 3VPCU
SPIDI SPIDO R336 10K_4 D40
2009/07/30 Add SPIDO
59
17 60 SPICLK J1
(5,15) PWRGD GPIOE4 SPICLK
2
18 61 SPICS# U23
(27,28,31) VR_ON GPIOE5 SPICS# 1
19 SPICS# 1 8 TX D7
(15) PWR_BUT_OUT#
2
GPIOE6 SPICLK CE# VDD 2 5 D18
(26) TRICKLE_CHG 20 6
POWER_BUTTON# GPIOE7 SPIDO SCK C384 C383 3 6 RED/GREEN
54 GPIO18 5 SI 4
SPIDI 2 7 LED_GRN_L 20091116 Resrve for ESD
TCM_CLK SO HOLD# 1U_6 0.1U_4 *COM_PORT
49
1LED_13
2LED_24
2LED_71
DCON_EN GPIOEC TX 3VPCU
50 23 3 4
GREEN
RED
(31) DCON_EN GPIOED GPIO06 WP# VSS 20091116 depopulate
RSMRST# 51 24 CHGCTL R396
(15) RSMRST# GPIOEE GPIO07 CHGCTL (26)
TCM_DAT 52 25 LED_CHG_G# *4.7K_4 S25FL008A0LMFI003
KEY_OUT_2 GPIOEF GPIO08 LED_PWR#
53 GPIO17 GPIO09 26 3700 : PIN 23 : TXD
27 LED_CHG_R# 20090609 modify for BIOS request D17
GPIO0A D6
RED/GREEN
+3.3VSUS
B
(15) SUSC#
SUSC# 57 KEYBOARD AND TOUCH PAD LED_GRN_L B
GREEN 3
4
1
MAIN_ON GPIO1B Q14 07/19 prevent leakage
GPIOE0
GPIOE1
GPIOE2
GPIOE3
GPIOE8
GPIAD3
GPIAD4
GPIAD5
56
GPIO15
GPIO16
GPIO19
RED
(25,27) MAIN_ON GPIO1A
1
AO3413
LED_8
on +3.3VSUS
LED_3
LED_4
3VPCU
KBD_PWREN# 2
47
48
55
1
2
3
4
33
34
35
36
20091228 No usd Low KBDPWR

battery function R404
10K_4 KEY_OUT_3/ISP_CLK
KB3700 64-pin LQFP R184 R180 R187
KEY_OUT_1/ISP_EN# U11 KBDPWR 510_4 1.5K/F_4 510_4
M_VA2 (26)
3
+3.3VSUS 6 1
CH4 CH1
LED_5
LED_6
LED_9
20091015 Measure VA2
(13) EC_IRQ# CVM 5 2
200910226 add (26) CV_SET
DQ CHGVOL
CVM (26)
R190 R191 R192 R193 VP VN
(26) DQ CHGVOL (26)
10K_4 10K_4 10K_4 10K_4 4 3
(15,25,30) SYSOK CH3 CH2
3
KBD_PWREN#
2009/07/30 Add *CM1293A-04SO L16
FCM2012V131DC10 LED_CHG_G# 2 2 LED_CHG_R# 2LED_PWR#
8
FCM2012V131DC10
USB to SPI writer Connector TPDAT L11 1
8
1
to update EC F/W 3VPCU TPCLK L12 2 Q6 Q4 Q9
1
FCM2012V131DC10 2 DDTC144EUA DDTC144EUA DDTC144EUA
3
KBSDAT L13 3
4 4
KBSCLK L14 5
(Low Forward Voltage FCM2012V131DC10 5
6
SPICS#
6
2
Vf <= 0.4V) D22 FCM2012V131DC10
7
CH501H-40PT
R337 C256 C257 C258 C259

A *0_6 A
7
20091015 Delete D21 and tying SPIVCC *220P_6 *220P_6 *220P_6 *220P_6
SPICS# directly to J2.5
1
J2 CN11
SPIDI SPIVCC PS2_CONN.
SPICLK 1 2 SPIDO C260 C263
R591 CS# 3
5
4
6
1U_6 0.1U_4 Quanta Computer Inc.
POP : Normal *NA/HEADER 4X2 (Pitch 2.54mm) PROJECT : CL1B
DEPOP : Update EC F/W Size Document Number Rev
3A
EC_KB3700
5 4 3 2 1
5 4 3 2 1
GPIO[2] boot-up configuration: Only for SDIO & USB device

0: JTAG mode enabled (pulled low by 100kohms) 20091015 Correct all WLAN schematic
1 and floating: JTAG mode disabled (Default) VA18
WLAN_3.3V place at CN19.2
[ANT_SEL_N, TR3n] boot-up configuration: MICRO_SD_3.3V
00: General SPI (pulled-low by 100kohms) CN19
11: SDIO (floating is ok) T90 1 2 C455 0.1U/10V_4
T91 GPIO[4] +3.3V
D 3 BT_PRIORITY GND 4 D
T92 5 6
WL_ACTIVE 1.8V/NC CON3
GPIO[4]: T93 7 8 TRSTn T17
BT_STATE TRSTn TMS_CPU T47 C456
WLAN MAC wake-up input/interrupt input 9 GND TMS_CPU 10 (13) MSD_D2 1 DAT2
11 12 TCK T48 WLAN_3.3V 2
NC TCK (13) MSD_D3 CD/ DAT3
13 14 TDO T80 0.1U/10V_4 3
NC TDO (13) MSD_CMD CMD
ECSn boot-up configuration: 15 16 TDI T82 4
GND TDI PR48 VDD
0: Boot up from SPI EEPROM (pulled-low by 100kohms) (13) MSD_CLK 5 CLK
1 & floating: Boot up from host interface (Default) PR156 10K_4 6
KEY *100K_4 20091125 Prevent the leakage of
(13) MSD_D0 7
VSS
WLAN_3.3V DAT0
(13) SDDA_CD# 17 SD_CD (SD Card Detection) GND 18 (13) MSD_D1 8 DAT1
ANT_SEL_N R326 *100K_4 19 20 PDn 2 1
GND PDn WLAN_RESET# (15)
TR3n R324 *100K_4 21 22 D41 1SS400
(13) SDDA_CLK SD_CLK/SPI_CLK RESETn
ECSn R323 *100K_4 23 24
WL_GPIO2 R338 *100K_4 GND 3.3V C454 0.1U/10V_4 place at CN19.24 C379
(13) SDDA_CMD 25 SD_CMD/SPI_SDI GND 26
27 28 0.1U_4
(13) SDDA_D0 SD_DAT[0]/SPI_SCSn 1.8V/NC
(13) SDDA_D1 29 30 C458 0.1U/10V_4 place at CN19.28 20091009 modify and place at
SD_DAT[1]/SPI_SDO NC CONN MICRO-SD 8P 1R FR(P1.1,H1.97)
(13) SDDA_D2 31 SD_DAT[2]/SPI_SINTn NC 32 CON3.4.
(13) SDDA_D3 33 SD_DAT[3] GND 34
WLAN_3.3V 35 36
GND USB_D- WL_USBP5- (15)
37 GND USB_D+ 38 WL_USBP5+ (15)
39 3.3V GND 40
41 3.3V NC 42
C385 43 44 LED_WLAN#
GND GPIO[1] ( LED_WLAN#) LED_WLAN#
0.1U/10V_4 T89 WL_GPIO2 45 46
T94 ECSn GPIO[2] NC T95
47 ECSn SLEEP_CLK 48
place at CN19.39 T96 TR3n 49 50
T97 ANT_SEL_N TR3n GND +3.3VSUS
C 51 ANT_SEL_N 3.3V 52 C
VH
C238
IC SOCKET MINI PCIE EXP 52P(P0.8,H5.0) 0.1U/10V_4
20-25096-00 place at CN19.52
R395
3
Q37 100K_4
VCC18MEM
AO3420 VA18
20091021 Change +1.8VSUS to VCC18MEM L45 2 AO3404
3 1 1 2 0: power on Q27
NHCB2012KF-131T10 130 1: power off
3
R389 47K_4 C453
1
WLAN_3.3V 10U/6.3V/X5_8 2 PC122
(15,23) MSD_PWROFF
2
0.1U/10V_4
+3.3VSUS C368 Q28 MICRO_SD_3.3V
*0.1U CHDTC144EUPT
1
VH 20091230 for WLAN power sequence
C399
10U/6.3V/X5R_8
VIN 20091009
R388 modify and
3
20091231 chnge to 0.47ufK to prevent 100K_4 place at

the giltch of WLAN_3.3V CON3.4.
2
2
B WLAN_PW 2 AO3404 B
1: power off Q29 D2 D3
0: power on LED_GREEN LED_GREEN
3
R380 47K_4 C446

1
2LED_10 1
2LED_13 1
2 20091218 delete R387 due to no enough
(13) WLAN_EN
Q38 0.47U/10V_4 spaceng
WLAN_3.3V
1
C331 CHDTC144EUPT
1
0.1U
C452 C457 D24 D23
20091125 for WLAN glitch when resuming 10U/6.3V/X5_8 *2200P LED_GREEN LED_GREEN
2
WLAN LED HDD LED

LED_11 1
LED_14 1
Future Hacking
20091229 To prevent the leakage of +3.3V R344

+5VSUS WLAN_3.3V, change +3.3V to WLAN_3.3V WLAN_3.3V R365 510_4
510_4
R392 *0_8
HA_USBP4+ (15)
1
R393 *0_8
LED_12
LED_15
HA_USBP4- (15)
1
A LED_WLAN#
1 2 2 A
D38 1SS400 2
(13,14) HDD_LED#/GPIO11
3
3
20090730 Add Q40
3
PDTA124EU Q32
3
2 PDTA124EU 2
Q33
DDTC144EUA Q30
PROJECT : CL1B
1
DDTC144EUA
3A
WLAN 88W8388
5 4 3 2 1
5 4 3 2 1
USB power / port

USBVDD
CN14
GND8 8
1 VDD GND7 7
2 D-
60MIL 3 5
C432 + C431 D+ GND5
4 GND4 GND6 6
0.1U
D D
100U/6.3V_3528
L42 CONN_USB
2 1 USBP_0-
(15) USBP0-
3 4 USBP_0+
(15) USBP0+ change footprint
*PLW3216S900SQ2T1
+5VSUS USBVDD
USBVDD
2009/08/12 Delete 0 ohm R172 CN9
180mil *10K_4 8
U5 GND8
1 VDD GND7 7
8 IP FLG 1 USBOC#12 (15) 2 D-
60MIL + C239 3 5
20091005 delete R173 C240 D+ GND5
7 VIN VOUT 2 4 GND4 GND6 6
100U/6.3V_3528
0.1U
6 VIN VOUT 3
L10 CONN_USB
5 4 3 4 USBP_1- change footprint
(15,27) USB_PWR_EN EN GND (15) USBP1-
2 1 USBP_1+
(15) USBP1+
RT9703PS
C
*PLW3216S900SQ2T1 C
C219
1U_6 R185 C241 USBVDD
210K/F_4 0.1U CN8
1% 8
GND8
Current Limit 1 VDD GND7 7
set to 1A 2 D-
60MIL + C236 3 5
C237 D+ GND5
4 GND4 GND6 6
100U/6.3V_3528
0.1U_4
L9
3 4 USBP_2- CONN_USB
(15) USBP2- change footprint
2 1 USBP_2+
(15) USBP2+
*PLW3216S900SQ2T1
B B
Reset circuit
+3.3V
20091123 change to short

PR19
R313 *0/short_4
10K_4
D13 BAS316 +3.3VSUS

(28) 1.8V_PWRGD
D14 BAS316
(29) VCCP_GD
U3
5
D12 BAS316
(29) +1.2V_GD
2
(23,27) MAIN_ON 4 SYSOK (15,23,30)
1
A 20090108 reserve D42 D42 A
for +1.2V discharge *BAS316
issue. *TC7SZ08FU
3
(15,27) PRE_MAIN_ON R173 4.7K_4 Quanta Computer Inc.

C447
PROJECT : CL1B
1U_4 Size Document Number Rev
20091231 modify the main_on timing 3A
USB
5 4 3 2 1
A B C D E
PR82
VIN1 1 3 VBAT
PD27 PQ23
*SSM34PT VAD AO3403 220_1206
PQ41
2
10U/25V_12
10U/25V_12
10U/25V_12
Input 10.5V~25V 2 1 1 8
PF1 2 7 PR81
3
VA 0452003.MRL VA1 PR132 3 6 PR79 PR84 220_1206
PCN2 POWER_JACK 4 5 220K_4 10K_4 PQ24
1 1 2 2 1 4.7K_4 2 TRICKLE_CHG (23)
1
2 AO4421
4 PD26 DDTC144EUA 4
3
PC100
PC94
PC90
PC113 SSM34PT 2
4
1
2
+ + +
0.1U/50V_6 PQ43
1
PC111 PD23 PDTA124EU
0.1U/50V_6 SSM34PT 25 25 25
3
PR111 VIN1 VIN
PC103 PD21 PQ36 PL9 RL3720WT-R025
1 1
2
0.1U/25V_6 MMSZ5251BS VA2 1 8 1 2
2
2 7
PD24 PR122 3 6 5.2UH DEL D111
1P
2P
3
1
VA2 SMAZ39-13-F 100K_4 4 5
PD12 PD15 + +
1
PR118 PR123 2 AO4405 *SSM34PT PC92 PC93
1
20090602 3K_4 47U/16V 47U/16V
*4.7K_4 change PQ39 PR109
2
3
PQ38 torlance from DDTC144EUA 2 2.2/F_4
CHGG
*PMST3904
5% to 1% SSM34PT VBAT
2
1
PQ44 PC89 20091127 sound noise when disable C4
3
3VPCU PDTA124EU 2200P_4 PQ32 CN12
VCC 1 8 2
1
PD18 2
2 7 1 1
3
*MMSZ5250BS PR124 PQ47 2009/06/03 modify 3 6
2
3
*22/F_4 2 PR119 4 5 PC83 3
2N7002W-7-F 0.1U/10V_4 CONN_BATTERY
3VPCU 100K_4
20090602 delete 1
PR135
AO4405
(23) AC_IN
PC106
0.1U/25V
PR140 47.5K/F_4 PC101
3
100K_4 1%
PR129
47.5K/F
PR142 820P_4
10K_4 PR136 2 CHG (23)
100K_4 1% PR128
47K/F_4 PQ42
PD22 DDTC144EUA
(23) CVM
1
SW2020C PC109
PR125
VCC
ADJ3
15 COMP3
(23) CHGCTL 2 1 0.1U
10 20091218 excessive power
10K_4
PC102
24
23
22
21
20
19
18
17
16
14
13
20091120 Resistor 0.1U_4 2009/06/02 modify 3VPCU
change for MPPT 10 REF5V
GND
VCC
VH
VIN
CVM
OUT
RT
+INC1
ADJ3
COMP3
CTL
+INC2
algorithm
PR126
100K_4 REF5V VA1 VA2 PU12 2009/06/02 change
MB39A129 PR96 part number
PR138 3K_4
COMP1
COMP2
OUTC1
ACOK#
OUTC2
CELLS
VREF
-INC1
PR146 16.2K/F_4 PCN1
BATT
ADJ1
ADJ2
ACIN
2 2
2
20.5K/F_4 PR141 PR134 1% PR97

PQ45 47.5K/F_4 1M_4 ADJ3 2
(23) CC0 CH3906WPT 1% (23) DQ 2
1
1
10
11
12
100/F_4 1
3
VIN1 3 1
COMP2
PR137 CONN_BSENSOR
2
(23) M_VA2 REF5V 11.8K/F_4

PD11
PR116 PD20 PR139 CHN217UPT
1
270K/F_4 SW2020C PR145 57.6K/F_4
3
1% 200K/F_4 1% 20091015 Measure VA2 PR130
1
1% 10K_4 2 3VPCU
CV_SET (23)
CHGCUR (23)
ADJ2 PD28 PC108 PC110
1
3
Resistor change for SW2020C PR133 0.1U_4 PC105 PQ46

MPPT algorithm 158K/F_4 *0.01U/25V_4 10 1000P_4 2N7002W-7-F
2 2 PR144 X7R
560K/F_4
1%
PQ37 PQ40
1
PMST3904 PMST3904
20090605 modify part number
PR117 PR120 CHGVOL (23)
1 15K/F_4 15K/F_4 Input Detect 9.16~9.3V 1
1% 1%
Constant Voltage Mode PR112 PR105
Resistor change for
Input Limit 10V MPPT algorithm
VIN Quanta Computer Inc.
220K_4 150K/F_4 PROJECT : CL1B
QUANTA CONFIDENTIAL Size Document Number
CHARGER
Rev
3A

A B C D E
A B C D E
PC86 PD17
CHN217UPT VH
3
+3.3VSUS
(23,28,31) VR_ON VR_ON
0.1U/25V_6 R194
100K
VH
3
VIN +5VSUS
PU10 PL10
60mil 60mil
80mil 1 8 2 AO3404
PGND LX
3
2 7 5UH Q13
VIN LX @1.6A
1
3 6 2009/08/03 Delete Jump
AGND EN + + + PC88 PC91
4 5
PC79 FB COMP PC81 PC80 PC85 1U/10V_6 1U/16V MAIND_R 2 +3.3V
1
4 1U/16V AOZ1016 PD13 PR98 PR107 22U/6.3V_8 22U/6.3V_8 330U/6.3V_7343 C253 4
PR106 *2.2 52.3K 2009/07/14 for
2
20K 1% USBVDD inrush Q22 0.01U/25V_4 C252 C251
1% 2N7002W
1
*SSM34PT 0.1U 10U/6.3V/X5_8
PC84 PC78 PR110

1000P *2200P 10K
X7R 1%
20091125 for prevent Linux to lose WLAN on resume.
2009/07/15 Modify power sequence and add
discharge circuit
(28) +1.2VSUS_GD
20091228 power add
PR164 *2.2R PC63 *1000PX7R VIN

+5VSUS
TPS62050 3VPCU
VIN 10uH/3.5A PU13 PL12 +3.3VSUS
PU8 20mil 40mil 40mil
PL7 20mil @0.4A 1 8
62050_SW PGND LX 5UH
1 9 2 7
VIN SW VIN LX
3
3 AGND EN 6
8 4 4 5 PD25 + + +
EN PG 3VPCU_GD (23) FB COMP *SSM34PT PC97 PC98 PC95
PC64 6 2 PR92 AOZ1016 22U/6.3V_8 22U/6.3V_8 *150U/4V_3528 MAIND 2 AO3404
LBI LBO PC71 PR143 PR131 PR121 PQ31
560K
2
10U/16V_8
7 5 6.8P PC112 33K/F_4 2.2R 47K/F

SYNC FB 1U/16V 1% 1% +5V
GND PGND 62050_FB +
1
PC123
3
10
+ *22U/6.3V_8 20mil
3 PR93 PC65 PC114 PC82 3
100K 22U/6.3V_8 1000P PC107 10U/6.3V/X5_8

2200P PR127 20100110 to prevent the glitch of IMVP
X7R 15K/F
20091228 power add 1%
20091228 Depuplate PR85 for
VIN_OK keep high 2009/06/04 modify AGND to GND
VIN 3VPCU
@0.4A PR161 *10K1%

PU14
62050_FB 1 8
FB OUT PU15
2 7
GND SHDN
3 6 3 1 3VPCU_GD (23)
62050_SW ILIM ILIM2 VCC RESET#
4 5
GND
LX IN
*MAX1776
2
1
*G690H293T71
PD29
*SSM34PT PC119
*10U/16V_8
2
2 2
2009/12/24 Add MAX1776 schematics,Co-lay with PU8(TPS62050)

PR92 --> 165K (CS41652FB06)
+5VSUS +3.3V +5V +1.8V +VCCP VTERM VH 3VPCU +3.3VSUS +5VSUS

Discharge
PR31 PR99 PR55 PR66 PR11 PR14 PR147 PR157
PR61 22_8 22_8 22_8 22_8 *22_8 100K_4 PR155 22_8 22_8
330K_4 330K_4
MAIND
MAIND (28,31)
MAIND_R
VR_ON_N
3
3
3
3
PC10
2 2 2 2 2 2 2
3
(23,25) MAIN_ON +5VSUS +1.2V
0.01U/25V_4
2 2
PQ15 PQ6 PQ30 PQ8 PQ18 PQ1 PQ2 (23,28,31) VR_ON 2
1
CHDTC144U 2N7002W 2N7002W 2N7002W 2N7002W *2N7002W 2N7002W PR67

1
22_8 PQ49 PQ50

PR160 PQ48 2N7002W 2N7002W
1
USBVDD 330K_4 CHDTC144U
3
1 +5VSUS 1
PR159 2009/07/19 Add

PR158 22_8 2
3
330K_4
3
USB_OFF 2 PQ20
3
(15) PRE_MAIN_ON 2N7002W

1
2 2 PQ57
1
(15,25) USB_PWR_EN 20091224 Correct the +1.2V discharge CHDTC144U PROJECT : CL1B
PQ56 PQ55 Size Document Number Rev
1
CHDTC144U 2N7002W 20091126 Add USBVCC discharge 3A

DC/DC 5V/3.3V
1

A B C D E
5 4 3 2 1
+1.2V
1
PQ52 MAIND
AO3404
2 MAIND (27,31) Place these CAPs
PL1
close to FETs 100mil UPB201212T-800Y-N_5A VIN
2009/06/09 TI recommends strongly on SPEC VIN_SM_DDR
3
40mil
1
PC19 PC18
25
1
1
+
1
PC8 PC6 PC7 1 24 2009/07/28 MOS from AO4932 to AON7410 & AON7702 0.1U/50V_6 10U/25V/X6S_1206
GND
*0.1U/10V_4 10U/6.3V/X5_8 10U/6.3V/X5_8 VTTGND VTT PC11
0.6A 1.8 Volt +/- 5%
2
5
4.7U/10V_8
2
D D
VTT
VTERM
80mil
2
VTTSNS VLDOIN
23
PR16 PC12 PQ4
Fs=400K
PR12
*0_4 3 22 DDR_VBST
2.2/F_6 0.1U/50V_6 AON7410
4
Continuous current:5A
GND VBST
20091021 change net name 20091021 change net name Peak current:7.5A
30mil
VCC18MEM PR9 *0/short_4 4 21 DRVH OCP minimum 10A
3
2
1
+0.9VSMVREF MODE DRVH 2009/07/28 Choke from 3.3UF_104 to 1.5UF_063
20091123 change to short 30mil 300mil 300mil
PR10 *0/short_4 5 20 DDR_LL VCC18MEM VCC18MEM
(8,9,11) +0.9VSMVREF VTTREF LL PL2
5
( 0.9V , 3mA ) 30mil CHOKE_1.5UH/9A
PC9 6 19 DRVL PR30 PC25
0.047U/10V/X5_4 COMP DRVL *2.2_8 PR27 PC15 + PC23
2
*14K/F_4
*0.1U/10V_4
7 18 2009/06/08 modify 4 330U/6.3V_7343 0.1U/10V_4
NC PGND
1
PQ51
2009/06/02 modify 8 17 2009/07/28 OCP change to 10A AON7702 PC26
3
2
1
VDDQSNS CS_GND *2200P/50V_4
2
2009/07/30 from 330U 2.5V 9m ohm to 330U 6.3V 25m ohm 20091021 Delete
DDR_V5FILT
PR15 *0/short_4 9 16 DDR_CS PR22 12K/1%_4
VDDQSET CS PR26
PR17 *10K/F_4
0_4 10 15 DDR_V5IN 2009/06/02 modify
(23,25,27) MAIN_ON S3 V5IN PR23
5.1_6 PR24
(23,27,31) VR_ON PR6 100K_4 11 14 DDR_V5FILT
S5 V5FILT +5VSUS
20mil
1
*SHORT-1A
PC117 PC118 12 13 PC13 PC14 20091123 change to short
NC PGOOD PR20 +3.3V
1U/6.3V/X5_4 1U/10V/X5_6
2
0.1U/10V_4 *0.1U/10V_4 10K_4
PU1 2009/06/05modify
TPS51116RGER 1.8V_PWRGD (25)
20091009 delete 0 ohm (PR21)
C 2009/06/15 for power sequency PR18 PR25 C
*0_6 VIN_SM_DDR
*SHORT-1A
DDR_COMP PR13 *0/short_4
20091021 Change +1.8VSUS to VCC18MEM
VCC18MEM
3
(27,31) MAIND MAIND 2 AO3404
PQ7
B B
+1.8V
1
PC40
10U/6.3V/X5_8
2009/06/15 for power sequency

+5VSUS
3VPCU PR70
VR_ON RT9025-25PSP 100K_4
PU5
3 1 +1.2VSUS
VIN PGOOD +1.2VSUS_GD (27)
6
PC54 +5VSUS PR153 *0/short_4 VO
2
10U/6.3V/X5_8 VEN
NC
5 2009/08/03 Delete Jump
4
GND
GND
VDD PR63
PC31 ADJ
7 R1 5.1K PC49
1U/16V 1% 10U/6.3V/X5_8
8
9
2009/06/01 modify IC pinout (pin3 and pin4)

PR65
R2 10.2K
1%
A A
VOUT=0.8*(R1+R2)/R2

PROJECT : CL1B
3A
DDRII/+0.9V(TPS51116)
5 4 3 2 1
A B C D E
2009/07/27 for power sequency
(15,27) PRE_MAIN_ON
4 3VPCU +3.3VSUS 4
2009/06/01 modify
+1.2V 20091229 prevent the +1.2_GD glitch
VIN PU7 40mil PL6 40mil @1.1A PR28
20mil 1 8 10K_4 2009/07/29 by trun-on threshold
PGND LX 5UH
2 VIN LX 7
1
3 6 2009/08/03 Delete Jump
PC60 AGND EN PR69
4 FB COMP 5 +1.2V_GD (25)
PR71 + + + PC56
3
1U/16V AOZ1021 PD6 5.1k/F_4 PC53 PC55 *220U/2.5V_3528 1M_4
PR78 22U/6.3V_8 22U/6.3V_8
2
11K/F_4 PR76 1% PC16
20091015 Change part for power efficiencies 1% *2.2_4 2 *0.068U/16V/X7R_4
20091120 AOZ1016 for 512MB *SSM34PT
PQ3
3
2N7002EPT
1
PC61 +1.2V 2 PQ22
2.2nF PC58 PR72
X7R *2200P 10K/F_4 CHDTC144U
20091229 Vendor recommend 1%
1
3
2009/06/15 reduce rise time 3
3VPCU +3.3VSUS
2009/06/01 modify
20091229 prevent the VCCP_GD glitch
(23,25,27) MAIN_ON
20091216 For power PR29
ON/OFF issue on 0 10K_4
degree C
+VCCP PR62 VCCP_GD (25)
VIN PU6 60mil PL5 60mil
3
20mil 1 8 @1.5A 1M_4
PGND LX 5UH
2 VIN LX 7
1
3 AGND EN 6 2009/08/03 Delete Jump PC17

PC62 4 5 2 *0.068U/16V/X7R_4
FB COMP PR73 + + + PC51
1U/16V AOZ1021 PD5 3.16K/F_4 PC50 PC52 *220U/2.5V_3528 PQ5
3
PR77 22U/6.3V_8 22U/6.3V_8 2N7002EPT
2
11K/F_4 PR75 1%
1
1% *2.2_4
20091015 Change part for power efficiencies *SSM34PT +VCCP 2
2 20091120 AOZ1016 for 512MB 2
PQ21
ME1304AT3
PC59
1
2.2nF PC57 PR74
X7R *2200P 10K/F_4
20091229 Vendor recommend 1%
Vo=0.8 x (1+(R2/R3))
1 1

PROJECT : CL1B
3A
DC/DC 1.2V/1.05V
A B C D E
5 4 3 2 1
CPU CORE(MAX1907)
1907VCC +5V
PR39 PC30
PC29 10_4 1U/10V/X5R_4
D D
1U/10V/X5R_4
+3.3V +3.3V
2009/06/09 modify VIN
Waiting for 2009/06/09 modify PL13
design by EE PR44 PR45 60mil UPB201212T-800Y-N_5A
2
1907_VIN
2009/06/01 modify 1907_VIN PD2 2009/06/09 modify
*10K/F_4 100K_4 CH501H-40PT
10
30
PU3 2009/06/09 modify
36 34 PC116 PC33 PC35
VCC
VDD
(15,23,25) SYSOK
1
SYSPOK V+ 2009/06/09 modify 10U/25V/X5R_12 10U/25V/X5R_12 10U/25V/X5R_12
37 31 PR150 PC38 25V 25V 25V
(15) IMVP_PWRGD IMVPOK BST
5
6
7
8
3.3_6 0.22U/6.3V/X5R_4
20091005 delete PR48,PR148 38 2009/06/08 modify
CLKEN PR151
33 1907DH 4
DH
(5) CPU_VID5 21 D5 30mil
22 2.7_6
(5) CPU_VID4 D4
(5) CPU_VID3 23 D3
24 30mil 2009/06/08 modify AO4468 0.796V
T35 T31 (5) CPU_VID2 D2 PQ11
25 32 1907LX
(5) CPU_VID1 D1 LX +VCORE @4.5A
(5) CPU_VID0 26
3
2
1
D0 2009/06/05 chagne P/N & footprint PR60 OCP 6A
T34 1907S2 6 30mil 360mil 0.001 360mil ( 9A)
PR35 *0/short_4 1907S1 S2 1907DL
C 1907VCC 5 S1 DL 29 1 2 C
1907REF PR34 *0/short_4 1907S0 4 PL4
D
20091120 Change to short S0 PQ10 1uH
1P
2P
PR32 *0_4 1907B0 1 2009/06/09 modify AOL1426 PR58 2009/09/18 modify
1907VCC B0
PR33 *0_4 1907B1 2 11 2.2_8 PD3 + PC45 + PC46
1907VCC B1 GND
CM+
1907REF PR38 *0_4 1907B2 3 28 G SSM24PT
B2 PGND
330U/2.5V_7343
*330U/2.5V_7343
PR3 PR51
PR40
PR41
CM-
*1K/F_4 1K/F_4 2009/10/08 change the part with polymer
PR49 *0/short_4 35
(15) VRDSLP SUS
40 1907REF PC115 PC41 2009/12/28 Del PC46 for cost down
S
PR56 *0/short_4 TON 6800P/50V/NPO_4 PC3 *0.01U/25V_4
(4,15) CPUSTP# 20 DPSLP 550KHz
0_4
0_4
2200P/50V/X7R_4
PR149 SYSOK_1 7 2009/06/08 modify PR52 680/F_4
(15,23,25) SYSOK SHDN 2009/06/01 modify
*0/short_4
2009/06/01 modify PR47
20091120 Change to short 17 1907_OA+ 1K/F_4
PR42 28K/F_4 OA+
39 TIME OA- 16
PC37
15 1907FB PR50 680/F_4 2009/06/01 modify 1907_OA- *470P/50V/NPO_4
PC34 270P/25V/NPO_4 FB
12 CC
19 PC36 *100P/50V/NPO_4
CSN
PC28 1907REF 8 CM-1 PR54 200/F_4 CM-
REF PC39 CM+1 PR53 200/F_4 CM+
0.22U/6.3V/X5R_4 4700P/25V/X7R_4
1907REF 18 D5 D4 D3 D2 D1 D0 Output D5 D4 D3 D2 D1 D0 Output
CSP 1 0 0 0 0 0 1.196V 0 0 0 0 0 0 1.708V
9 ILIM
PR37 1 0 0 0 0 1 1.180V 0 0 0 0 0 1 1.692V
B B
200K 27 14 1 0 0 0 1 0 1.164V 0 0 0 0 1 0 1.676V
GND
POS
DDO NEG 1 0 0 0 1 1 1.148V 0 0 0 0 1 1 1.660V

1 0 0 1 0 0 1.132V 0 0 0 1 0 0 1.644V
MAX1907AETL+ PR46 1 0 0 1 0 1 1.116V 0 0 0 1 0 1 1.628V
41
13
*0/short_4 1 0 0 1 1 0 1.100V 0 0 0 1 1 0 1.612V

1 0 0 1 1 1 1.084V 0 0 0 1 1 1 1.596V
PR36 1 0 1 0 0 0 1.068V 0 0 1 0 0 0 1.580V
11K PC27 1 0 1 0 0 1 1.052V 0 0 1 0 0 1 1.564V
100P/50V/NPO_4 PR152 1 0 1 0 1 0 1.036V 0 0 1 0 1 0 1.548V
1907_G 1 0 1 0 1 1 1.020V 0 0 1 0 1 1 1.532V
PR43 1 0 1 1 0 0 1.004V 0 0 1 1 0 0 1.516V
*0/short_4 *SHORT-1A 1 0 1 1 0 1 0.988V 0 0 1 1 0 1 1.500V
1 0 1 1 1 0 0.972V 0 0 1 1 1 0 1.484V
1 0 1 1 1 1 0.956V 0 0 1 1 1 1 1.468V
20091120 Change to short VCC_BOOT 1 1 0 0 0 0 0.940V 0 1 0 0 0 0 1.452V
2009/06/08 modify B2 B1 B0 Output 1 1 0 0 0 1 0.924V 0 1 0 0 0 1 1.436V
GND GND GND 1.708V 1 1 0 0 1 0 0.908V 0 1 0 0 1 0 1.420V
REF REF REF 1.372V 1 1 0 0 1 1 0.892V 0 1 0 0 1 1 1.404V
OPEN OPEN OPEN 1.036V 1 1 0 1 0 0 0.876V 0 1 0 1 0 0 1.388V
VCC VCC VCC 0.700V 1 1 0 1 0 1 0.860V 0 1 0 1 0 1 1.372V
REF VCC VCC 1.212V 1 1 0 1 1 0 0.844V 0 1 0 1 1 0 1.356V
OPEN GND GND 1.196V 1 1 0 1 1 1 0.828V 0 1 0 1 1 1 1.340V
1 1 1 0 0 0 0.812V 0 1 1 0 0 0 1.324V
1 1 1 0 0 1 0.796V 0 1 1 0 0 1 1.308V
1 1 1 0 1 0 0.780V 0 1 1 0 1 0 1.292V
1 1 1 0 1 1 0.764V 0 1 1 0 1 1 1.276V
1 1 1 1 0 0 0.748V 0 1 1 1 0 0 1.260V
A 1 1 1 1 0 1 0.732V 0 1 1 1 0 1 1.244V A
SUSPEND MODE (SUS=HIGH) 1 1 1 1 1 0 0.716V 0 1 1 1 1 0 1.228V
S2 S1 S0 Output 1 1 1 1 1 1 0.700V 0 1 1 1 1 1 1.212V
OPEN OPEN OPEN 0.780V

OPEN VCC REF 0.732V (0.724V)
PROJECT : CL1B
3A
DC/DC CPU CORE (MAX1907A)
5 4 3 2 1
5 4 3 2 1
VIN
20091224 save 3VPCU power consumption
+2.5VSUS
1
+3.3VSUS +2.5VSUS PQ12 VGH
PU4
2 PDTA124EU PD7 18V
3
1 5 1 SW4 1 3
VIN VOUT
2 3
3
PC44 GND PC43 AO3404 PC68 PC66
2
3 4 1U/10V/X5R_4 PQ14 DCON_2.5V 2 1U/25V_8 PR89 PQ26 1U/25V_8
D (23,27,28) VR_ON SHDN# NC 10K/F_4 100K_4 PDTA124EU D
2
3
SW3
G9091-250T11U PR59 CHN217UPT
1U/10V/X5R_4
1
2 PR57
(23)modify
2009/05/19 DCON_EN
100K_4 PC42 PR64
0.1U/25V PC2 PC1 PR2 100K_4
1U/10V/X5R_4
1U/10V/X5R_4
PQ9 PC69 LCD_AVDD
1
2009/05/19 modify DDTC144EUA 2.2K VIN 0.1U/25V PQ19
3
20091021 Change +1.8VSUS to VCC18MEM DDTC144EUA
DCON_1.8_EN
2
1
VGH_EN (12,18)
SIL520-150
VCC18MEM VCC18MEM 20091021 Change +1.8VSUS to VCC18MEM
PC77
3
1U/16V PL8
1
3
LCD_AVDD +2.5VSUS 4.7UH
PQ27 LCD_AVDD
2 AO3404 3VPCU ME2303
PD9
2
3
PQ13 2 AO3404
PQ17 5 1 SW1 2 1 SW2 1 3 LCD_AVDD
POP de-POP
VCC SW
DCON_1.8V 2009/05/19 modify LCD_1.8V 2 AO3404 2 PC67 9.6V PR154 PR162
(27,28) MAIND
1
PQ16 PC76 GND SW2020C PC74
2
PC48 0.1U/10V VDDEN 4 3 PC70 PR90 1U/16V PR83 2009/07/30 1U/16V 13.5V PR162 PR154
PC32 10U/6.3V/X5_8 EN FB 10P 100K_4 100K_4 from AO3413
C C
10U/6.3V/X5_8 +2.5V PU9 0.10% to ME2303
1
0_8 PR115 AT1308X_GRE 1308FB
3
PQ54 *ME2303 PC47 PC72 PR154 PR94
10U/6.3V/X5_8 0.1U 0_6_1% 1K_4
VIN 1 3 25 PR162 PQ25 2 VDDEN (12,18)
SW5
PR91 14.7K_4 *47K_6_0.1% DDTC144EUA
0.10%
PD8
PR163 *100K_4
2
1
3
2 1 LCD_AVDD
3
+2.5VSUS
PD10 PQ29 SW2020C
1
2 PQ53 2009/08/26 add CHN217UPT CH3906WPT PR87
*DDTC144EUA 100K_4
1
VIN_LED PC75 2 LCD_AVDD
1
1U/16V
1
PR95
PL11 PC96
3
15UH 1U/16V
2009/09/18 correct PR88
2
3VPCU 10K_4 63.4K/F_4
60mA
2
PU11 PQ28 PC73

PD19 -9V
6 VIN LX 1 LED_PWR 2 1 LEDPWR (19)
CH3906WPT 1U/10V -7V
B 5 OVP GND 2 B
4 3 SSM14PT SW6 3 1
EN FB VGL
PC99 PC104
LED1 (19)
0.1U/10V AT1312A 10U/25V_12
LED2 (19)
HOLE5 HOLE2 HOLE4 HOLE8 HOLE1 HOLE3 OP1
*3.2_8_S *3.2_8_S *3.2_8_S *3.2_8_S *3.2_8_S *3.2_8_S VIA HOLE

(12,18) BACKLIGHT LED3 (19)
3
3
PQ35 PQ34 PQ33
PMST3904 PMST3904 PMST3904
1
2 2 2
+5V
PD14
1
1 2 HOLE13 HOLE14 HOLE15 HOLE7 HOLE11 HOLE12 HOLE6 HOLE9

PR101
PR108
PR114 PR113 *LED_GREEN *1K_4 *NON_PTH *NON_PTH *NON_PTH *NON_PTH *NON_PTH *NON_PTH *NON_PTH *NON_PTH
(12,18) DBC +2.5V
100K/F_4 15K_6 10K/F_4 PR103
PR104 11/F_4 PR102 PD4
1
PC87 11/F_4 11/F_4 1 2
A 1U/6.3V PR68 20091127 Same as CL1 A
*LED_GREEN *1K_4
+3.3V
PD16 Quanta Computer Inc.

1 2
PR100
*LED_GREEN *1K_4 PROJECT : CL1B
QUANTA CONFIDENTIAL 5 4 3 2
Date:
VEE / BL
Monday, March 15, 2010 Sheet
1
31 of 36
3A
5 4 3 2 1
D
VIN D
(1) 3VPCU
2 RTCCLK
(2) POWER_BUTTON#
0.5mS
(6) PWR_BUT_OUT# 4 ~ 5 RTCCLK
> 10mS
(3) VRON
(5) EC_RSMRST#
(6) RSMRST#
5mS
(7) SUSA#
C C
(7) PRE_MAIN_ON(SUSB#)
(7) SUSC#
(12) SYSOK
(4) +1.2VSUSVCC18MEM +2.5VSUS
+3.3VSUS +5VSUS
(8) +1.2V (PRE_MAIN_ON)
(9) MAIN_ON(+1.2V_GD)
(10) VTERM
B B
+VCCP +5V
(11) +3.3V +2.5V
(13) VCORE
(14) PWRGD
(15) CPUPWRGD >20us
(16) PCIRST#
>7mS
(17) CPURST#
>12uS
POS OFF
A A

PROJECT : CL1B
3A

5 4 3 2 1
5 4 3 2 1
Schematic modify Item and History :

D D
A1-->A2
1. DCON POWER -
A. Change PQ9.B pin from DCON_1.8 to DCON_EN
B. Change PQ13.G pin from DCON_EN to PQ12.C
C. Change PQ17.G pin from VDDEN to LCD_AVDD
2. SB straping -
A. Change R27, R83, R270, R54, R34, R87, R78 and R82 from 4.7K ohm to 1K ohm.
3. Design issue -
A.The D pin and S pin of Q8 and Q12 is inverse
B.Change C299 part number
C C.Add test points: U28, pins 1, 4, 17, 29, 36, and 37 C
d.Change U29 pin 37,36 net name from MIC1_R & MIC_L to MIC2_R & MIC2_L
e.RTC issue: VIA recommend to delete R216
4. Power -
A.1.8VSUS
a. Add off-page connector : VR_ON
b. Modify PU5 pinout.
C. For +1.8VUSU sense: stuff PR15 ; don't stuff PR27 and PR26
d. For +1.8VUSU OCP : modify PR22 from 4.99K to 6.2K, OCP from 3A to 3.5A
e. modify PU1 pin11 net name to VR_ON
B.+VCORE:
a.For SYSOK PULL HIGH: Stuff PR45
B b.For +VCORE sense: don't stuff PC3 & PR3 ; stuff PR51 & PR52 B
c.For CPU Load line : for meet load line -1mV/A, modify PR52 & PR50 from 1K to 680 ohm
C.1.2 and +VCCP:
a.Modify power good circuit: change net name from 3.3VSUS to +3.3VSUS
D.Charger :
a.Delete clamp circuit (PR118,PD18,PQ38,PR124):
PU12 (MB39A129) can guaranty to 28V
b.connect PU12 pin21 to PQ36 pin1,2,3 directly
c.change PR126 to 100K
5.WLAN-
Change WLAN solution from SD card to TM100 module. See page 24
A A

PROJECT : CL1B
3A
NOTE
5 4 3 2 1
5 4 3 2 1

D D
A2-->B1
2. SDIO
A. SDIO:Micro SD
B. SDIO1: SD Card Reader
C. SDIO2: WLAN module
2. SB straping -
A. Change R58, R170 and R195 pull up power plane on page13
3. Design issue -
A.Modify CPU RST circuit
C C
a.Add R248 0 ohm
b.Populate Q18,Q20 R275 to prevent leakage for vendor's recommand.
c.Del c299 for CPU power good delay time
B.Del SPI ROM of memory
C.Modify DCONLOAD and WLAN_RESET# to U19.AG20 and AF21
D.Modify Serial enable to U19.AJ21
E.Modify THRM# pin of U19 from PROCHOT# to EB_MODE
F.Del EDID_CLK and EDID_DATA of CRT circuit
G.Del R195 within GDATA0 pull low
H.Rerevse C436,C438, C233 and C232 for EMI/ESD
I.Add PC120 and PC121 for VH gilch and add D36 to prevent 3VPU forward to +1.8VSUS
J.Move C250 to close CON2 and modify CAM LED control.
B B
K.Del NAND flash on page 22
L.Add PWRGD net on U28.17 & SYSOK on U28.4 & change M/B ID & Del SW7 on page 23
M. change Q14 from PNP BJT to P-MOS
N. Change WLAN solution from on board to slot and correct WLAN LED behavior on page 24.
O. Add Micro SD on page 24.
P. Correct power good circuit on page 25.
4. Power -
A.Del all jump,but only reserve the jump of +VCCORE and +1.8VSUS.
A.1.8VSUS
a. Add off-page connector : VR_ON
b. Modify PU5 pinout.
A d. For +1.8VUSU OCP : modify PR22 from 4.99K to 6.2K, OCP from 3A to 3.5A A
B.+VCORE:
a.For SYSOK PULL HIGH: Stuff PR45 Quanta Computer Inc.
b.For +VCORE sense: don't stuff PC3 & PR3 ; stuff PR51 & PR52 PROJECT : CL1B
c.For CPU Load line : for meet load line -1mV/A, modify PR52 & PR50 from 1K to 680 ohm Size Document Number Rev
D.Charger : 3A
NOTE
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

D NOTE 3A

5 4 3 2 1
5 4 3 2 1

D D
B2-->B3
1. Power -
A. Change PL11 from 4.7uH to 15uH
B. Delete PJP5
2. Design issue -
A.Correct part refence from 12 to U24
C.Add test points: U28, pins 1, 4, 17, 29, 36, and 37
C C
1. DCON POWER -
B B
A A
Title
<Title>

B NOTE 3A

5 4 3 2 1
5 4 3 2 1

D D
C1-->C2
1. Power -
A. PU6/PU7 (AOZ1021): correct the R/C of comp pin to 11K and 2.2nF
B. Change the PQ21 from CHDTC144U to ME1304AT3 (Vgs<1V)
page 27 C. Correct the +3.3VSUS to 3VPCU on PR69.1 and PR62 for prevent the +1.2V_GD glitch
D. Change the Q13 and PQ31 to AO3404 for power good giltch by +3.3V & 5V sequence issue on PU3
E. Add MAX1776 circuit for TPS62050 L/T time isn't enough.
F. Correct the +1.2V discharge circuit
page 26 G. modify the PU12.14 and connect to PQ44.3 for excessive power
page 25 H. Add R/C delay on PRE_MAIN_ON to conrtol MAIN_ON for S3 issue and reserve the D42 between MAIN_ON and PRE_MAIN_ON 3 quickly +1.2V discharge
page 24 I. Correct the Q37.2 form WL_SW to WLAN_3.3V for WLAN power sequence
C C
J. Change the C446 to 0.47uf for prevent the giltch of WLAN_3.3V
K. Change the Q40.1 from +3.3V to WLAN_3.3V to prevent the leakage of WLAN_3.3V
page 23 L. Pull high on U28.55 for un-usd Low battery function
M. correct the R366 and R362 for EC_ID

page 21 N. SWAP the CON2.10 and CON.11
O.Add L/C on Q2.1 for DVDD_1.8V excessive noise.

page 20 P.For EMI request, change R384 to C370 & R386 to C25
Q.Change C8 to R126 for preventing no sound on speaker when S3/reboot resume.
F. Power team suggest:

1.Reserve PC123, PR164.
B
2.Short the PU8.2 & PU8.6 to GND for Vin_OK keep high B
2. Design issue -
A.Correct part refence from 12 to U24
C.Add test points: U28, pins 1, 4, 17, 29, 36, and 37
1. DCON POWER -
A A
Title
<Title>

B NOTE 3A

5 4 3 2 1

XO-1.5 Schematics Rev G

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5 4 3 2 1

VTERM(+0.9V) CL1B Block Diagram C2

+1.8VMEM VCORE:+1.196 ~ +0.748

7" LCD DCON SDIO I/F

VTT:VCCP (+1.05V) VIP I/F

Int. HDA CODEC HD Audio

VIN +10.5V~+25V MAIN power V V V V

VCCRTC_1 +3.0V~+3.3V RTC V V V V

3VPCU +3.3V EC power ALWON V V V V

+1.2VSUS +1.2V Sus pend power 3VPCU V V V X

+5VSUS +5V Sus pend power VR_ON V V V X

VH +15V +5Vs us power rail gate power VR_ON V V V X

+3VSUS +3.3V Sus pend power +1.2VSUS_GD V V V X

VCC18MEM +1.8V Mem ory power VR_ON V V V X

VTERM +0.9V Mem ory power MAIN_ON V V X X

+1.2V +1.2V VX855 core power PRE_MAIN_ON(SUSB#) V V X X

+5V +5V Audio power MAIND V X X X

+3.3V +3.3V Clcok gen/CPU Clock PLL/VGA/ MAIND_R V X X X

+2.5V +2.5V LVDS and LVDC PLL power MAIND V X X X

VCCP +1.05V I/O power for Hos t interface/ MAIN_ON V X X X

WLAN_3.3V +3.3V WLAN power WLAN_EN V X X X

VCC_SD +3.3V SD power SD_PWROFF V X X X

LCD_AVDD +9.6V Analog power for LCD VDDEN V X X X

VGH +18V TFT on power for LCD VGH_EN V X X X

VGL -7V TFT off power for LCD LCD_AVDD V X X X

+1.8V +1.8V Digital power of LCD//CPU PLL power LCD_AVDD V X X X

VBAT +5V~+7.5V MAIN BATTERY CHG V V V V

Size Document Number Rev

Date: Thursday, March 18, 2010 Sheet 1 of 1

MAIN_ON PRE_MAIN_ON @0.0005A @0.02A @0.004A @0.0615A

MOSFET MOSFET MOSFET MOSFET

MOSFET MOSFET MOSFET MOSFET MOSFET

Quanta Computer Inc.

SUSC# PWM VCC18MEM

7 PRE_MAIN_ON(SUSB#) EC VX855 12 SYSOK 9 MAIN_ON(+1.2V_GD)

Quanta Computer Inc.

Date: Monday, March 15, 2010 Sheet 3 of 36

10U_6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 *0.01U/16V_4 14.318MHZ C361 *10P/50V/C0G_4

SMBDT 47 25 R319 *0_4 C4PSTOP#

0 0 1 200 33 +5V R303

Quanta Computer Inc.

Reserve for internal pull-up resistor verify

REQB0 D1 HREQ#0 (7)

Quanta Computer Inc.

VCCSENSE T4 Test point must be

20091009 Change part with Polymer

Quanta Computer Inc.

20091116 Delete 0 ohm C321 C98 C91

HDSTB0P D14 HDSTB0P (5)

Quanta Computer Inc.

*1K/F_4 C279 C119 C120 VX855_27x27_08M

4.7U/10V/Y5V_8 0.1U/10V_4 0.1U/10V_4

MCLKOA0+ VCC18MEM DDR_VREF

C179 0.1u/10V_4 C167 0.01u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

(15) SERIAL_EN C341 C335 VCCA25PLLDISP 45mA L32

DVP1VS V4 GFVSYNC (18)

VGPIO1 AA4 T57

10U_6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/16V_4 14.318MHZ C361 10P/50V/C0G_4

1000P_4 1000P_4 R10 *0_4 HP_PLUG

PR164 2.2R PC63 1000PX7R VIN