HP 15-Da3001tu Compal LA-J951P GPI52 Rev 0.1

5 4 2 1
[DQA04-Power Map_ICL-U4+2_DDR4_Volume_S0ix]
D D
C C
B B
A A
Securiiity Clllassiiifiiicatiiion Compalll Secret Data Compal Electronics, Inc.

Issued Date 2019/05/07 Deciiiphered Date 2019/12/31 Tiitttlle
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
Power MAP
Siiize Documenttt Numberrr Rev
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC...NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIORWRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...
LA-J951P 0..1
Dattte::: Wednesday,,, Aprrriill22,,, 2020 Sheettt 4 o ff 100
5 4 3 2 1
5 4 2 1
AC
+5VALW/+3VALW
Adapter 19.5V (SY8288C/SY8286B)
Vout +3VALW +3VALW

Vin Vout +1.8V_PRIM
SY8032I
EC_ON Vout +5VALW PCH_PWR_EN PGOOD +1.8V_PG
EN
EN
Charger +19.5VB
Charge
Vin
BQ24735
D D
+3VALW
Vout +2.5V
Vin SY8032I
PM_SLP_S4# EN PGOOD +2.5V_PG
PGOOD SPOK
DC Discharge
Battery +3VALW
Vin Vout +1.05VS_1.0VSDGPU
SY8032I
PEX_VDD_EN EN PGOOD 1.0VSDGP_PG
+1.2V/+0.6VS
Vin(G5616B)
Vout +0.6V_0.6VS
+2.5V_PG EN S5 Vout +1.2V_VDDQ
SM_PG_CTRL EN S3
VCCIN Vout +VCCIN

Vin (RT3613EE) Vout
VR_ON Vout
C
EN C
PGOOD VR_READY
+VCCIN_AUX Vout +VCCIN_AUX

Vin (RT6543A) Vout
1.8V_PRIM_PWRGD Vout
EN
PGOOD PG_VCCIN_AUX
+VGA_CORE
Vin (RT8812A) Vout +VGA_CORE
VRAM_PG
B B
EN PGOOD GPU_PGD
+1.35VS_VGA Vout +1.35VS_VGA

Vin (SY8286R)
DGPU_PWR_EN PGOOD VRAM_PG
EN
A A
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DDDaaateee: Wednesday,,, Aprrriil 22,,,2020 S
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5 4 3 2 1
5 4 2 1
[ DQA04-PWR Sequence_ICL-U4+2_DDR4_Volume_S0iX ]
G3->S0 S0-> S0iX S0iX ->S0 S0->S5

+3VL_RTC
+3VL_RTC
tPCH01_Min : 9 ms
SOC_RTCRST#
SOC_RTCRST#
tPCH04_Min : 9 ms
+3VALW _D SW
+3VAL W_D SW/+ 3V AL W tPCH02_Min : 10 ms
D D
PCH_DPW ROK
PCH_DPW ROK
tPCH05_Min : 1 us
PM_BATLOW#
PM_BATLOW#
tPCH32_Min : 95 ms
SL P_SUS#
SL P_SUS#
+5VALW
+5VALW
EXT_PWR_GATE#
EXT_PWR_GATE#
+3V_PRIM
+3V_PRIM
tPCH06_Min : 200 us
+1.8V_PRIM
+1.8V_PRIM
+VCCIN_AUX
+VCCIN_AUX
+1.05VO_OUT_PCH
+1.05VO_OUT_PCH
+1.05VO_VNNBYPASS
+1.05VO_VNNBYPASS
+1.05VO_EXTBYPASS
+1.05VO_EXTBYPASS
tPCH03_Min : 10 ms
EC_RSMRST#
EC_RSMRST# tPCH07_Min : 0 ms
tPCH18_Min : 95 ms
ESPI_RST# ESPI_RST#
SUSCLK
tPLT02_Max : 90 ms
tPCH31_Min : 105 ms AC_PRESENT _R
AC_PRESENT _R
VCCST_Can_be_On_until_VCCINAUX_goes_LOW
+1.05V_VCCST +1.05V_VCCST_Must_be_ON_anytime_VCCIN_AUX_is_ON +1.05V_VCCST
C C
+1.05VO_VCCPLL +1.05VO_VCCPLL
PBTN_OUT #
PBTN_OUT #
PM_SL P_S5#
PM_SL P_S5#
PM_SL P_S4#
PM_SL P_S4#
PM_SL P_S3# PM_SL P_S3#
Eletro-XTechnical0005
PM_SL P_S0#
PM_SL P_S0#
E
CPU_C10_GATE#
CPU_C10_GATE#
VCCST_OVERRIDE High_in_Sx_if_TCSS_w ake_en abl ed

VCCST_OVERRIDE
Min : 0 ms
+2.5V
+2.5V
+1.2V_VDDQ
tCPU01_Min : 1 ms +1.2V_VDDQ
+1.2V_VCCPLL_OC
+1.2V_VCCPLL_OC
B +1.05VS_VCC ST G B
+1.05VS_VCC ST G
VCCST and VCCSTG may remain powered during
Sx power states for Debug support and platform VR optimization.
VCCSTPWRGOOD_TG SS
VCCSTPWRGOOD_TG SS
EC_VCCST_PG EC_VCCST_PG
tCPU00_Min : 2 ms
DDR_PG_CTRL DDR_PG_CTRL
+0.6VS_VT T
+0.6VS_VTT
VR_ON
VR_ON
+VCCIN
+VCCIN
VR_PWRGD
VR_PWRGD
PCH_PW ROK
PCH_PWROK tCPU16_Min : 0 ns
+1.05V_VCCIO_OUT
+1.05V_VCCIO_OUT
PCH_CL K_OUT PUT S

PCH_CLK_OUTPUTS Stabl e
H_PROCPWRGD
H_PROCPWRGD
A A
SYS_PWROK SYS_PWROK
SOC_PLTRST#
SOC_PLTRST#
H_THERMTRIP# HONORED HONO RED Will_ Track_VCCST_Rail

H_THERM T RIP#
Securiiittty Clllassiiifffiiicatttiiion Compalll Secret Data Compal Electronics, Inc.

2019///05///07 2019///12///31 Tiitttlle
IIIssued Dattte Deciiiphered Datett
THIIIS SHEET O F ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPERTY O F C OMPAL ELECTRONIIICS,,, IIINC...AND CONTAIIINS CONFIIIDENTIIIAL AND
Power Sequence
TRAD E SEC RET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE C USTOD Y O F THE C OMPETENT DIIIVIIISIIION O F R&D Siiize Documenttt Numberrr Re v
DEPARTMEN T EXC EPT AS AUTHORIIIZED BY C OMPAL ELECTRONIIICS,,, IIINC...NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS
MAY BE USED BY O R DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN C ONSENT O F C OMPAL ELECTRONIIICS,,, IIINC... LA-J951P 0..1
Dattte::: Wednesday,,, Aprrriil22,,, 2020 Sheettt 5 offf 100

5 4 2 1
Board ID Table for AD channel SOC SMBUS Address Table (TBC)
Vcc 3.3V Address (8bit)
Ra 100K +/- 1% SOC_SMBUS Net Name Power Rail Device Address (7 bit)
Write Read
Board ID /PCB Revision Rb V BID min V BID TYP V BID Max EC AD3
0 --> 0.1 0 0V 0.300V 0x00 - 0x0B DIMM1 0x50 0xA0 0xA1
1 --> 0.2 12K +/- 1% 0.347V 0.354V 0.36V 0x0C - 0x1C
2 --> 0.3 15K +/-1% 0.423V 0.430V 0.438V 0x1D - 0x26 SOC_SMBCLK 0xA4 0xA5
+3V_PRIM DIMM2 0x52
3 --> 0.4 20K +/-1% 0.541V 0.550V 0.559V 0x27 - 0x30 SOC_SMBDATA
4 --> 0.5 27K +/-1% 0.691V 0.702V 0.713V 0x31 - 0x3B 0x58 0x59
Touch PAD 0x2C
5 --> 0.6 33K +/-1% 0.807V 0.819V 0.831V 0x3C - 0x46
6 --> 0.7 43K +/-1% 0.978V 0.992V 1.006V 0x47 - 0x54 SOC_SML0CLK TBC TBC
+3V_PRIM TBC
7 --> 0.8 56K +/-1% 1.169V 1.185V 1.200V 0x55 - 0x64 SOC_SML0DATA
SOC_SML1CLK TBC TBC TBC

BOM Structure Table SOC_SML1DATA
+3V_PRIM
Funct i on Stuf f Un-Stuf f TBC TBC TBC
DIS@
UMA SKU UMA@ VGA@ HSIO Port Table USB2.0 Port Table EC SMBUS Address Table
Address (8bit)
EMIVGA@ EC_SMBUS Port Power Rail Device Address (7 bit)
HSIO Port Capable Port Allocat i on PCIE CLK NOTE USB2.0 Port Device Write Read
DIS@
dGPU SKU VGA@ UMA@ 1 USB Type-A ( SB )
0 USB3.1 #1 / PCIe#1 USB3.0 Type C NA USB3.0 interface BAT 0x16 TBC TBC
EMIVGA@
2 USB Type-A ( SB) EC_SMB_CK1
dGPU support GC6 GC6@ NGC6@ +3VL_EC
1 USB3.1 #2 / PCIe#2 USB3.0 Type C NA USB3.0 interface EC_SMB_DA1
dGPU doesn't 3 USB Type-C ( MB) CHGR 0x12 TBC TBC
support GC6 NGC6@ GC6@
2 USB3.1 #3 / PCIE#3 USB3.0 TypeA NA USB3.0 interface 4 USB Card Reader ( SB )
VRAM 1G@
5 USB Camera GPU 0x41 TBC TBC
3 USB3.1 #4 / PCIe#4 USB3.0 TypeA NA USB3.0 interface EC_SML1CLK
DMIC(SoC) SOC_DMIC@ +3VS
6 USB Finger print EC_SML1DATA
DMIC(CODEC) ALC_DMIC@ 4 USB3.1 #5 / PCIe#5 THERMAL 0x48 0X91 0x90
7 USB Touch screen
CMC CMC@
5 USB3.1 #6 / PCIe#6 8 NA PCH 0x08h TBC TBC
TPM TPM@ dGPU CLK0 & CLKREQ#0 PCIe interface
9 NA
HDD FFC CON
6 PCIe #7 / GbE / UFS2.0
I2C Address Table (TBC)
(With Redriver) HDD_RD@ HDD_FFC@
10 NGFF BT Address (8bit)
7 PCIe #8 /GbE /UFS2.0 I2C Port Power Rail Device Address (7 bit)
HDD FFC CON Write Read
(Non Redriver) HDD_FFC@ HDD_RD@
8 PCIe #9 /GbE LAN CLK1 & CLKREQ#1 PCIe interface 0x0FH TBC TBC
EMI@
EMI Components @EMI@ I2C 0 +3VS
BL_EMI@ WLAN+CNVio (NGFF_KeyE) CLK2 & CLKREQ#2
9 PCIe #10 PCIe interface 0x48H TBC TBC
ESD@
ESD Components @ESD@
BL_ESD@ HDD NA
10 PCIe #11 /SATA0 PCIe / SATA interface I2C 2 +3VS TBC TBC TBC
RF Components RF@ @RF@
Eletro-XTechnical0006 Eletro-XTechnical0006
1 1
I2C 3 +3VS 0x2CH TBCTBC

11 PCIe #12 /SATA1a* NA NA NA
ME Cnnector CONN@
NC Components @ 12 PCIe #13/GbE

ISH_I2C0 +1.8VS 0FH TBC TBC
DAX1 ZZZ
PRIM Design PREM@ VOL@
13 PCIe #14/GbE
ICL UMA EMC for EE
Volume Design VOL@ PREM@ SSD (NGFF Key M) CLK4 & CLKREQ#4 PCIe / SATA
EMMC EMMC@ 14 PCIe #15 /SATA1b* Voltage Rails
DAZ2Y400100 X4EAMF32L01
CNVI CNVi@ PCB GPI52 LA-J951P SMT EMC FOR EE LAJ951 GPI52
Power Plane Descript i on S0 S0ix S3 S4/S5
WWAN WWAN@ 15 PCIe #16 /SATA2 UMA_X4E@ +20V_ADP_IN Adapter power supply N/A N/A N/A N/A
SSD SSD@ +12.6V_BATT Bat t ery po wers upply N/A N/A N/A N/A
Type C TypeC@ +19VB AC or bat t ery po wer r ail f or po wer ci rc uit N/A N/A N/A N/A
Type A TypeA@ Power State ICL i3_R1@ HDMI@ +VCCIN Core voltage for CPU OFF OFF OFF ON
Finger Print FP@ SIGNAL SLP_S0# CPU_C10_GATE# SLP_S3# SLP_S4# SLP_S5# +VALW +VCCIN_AUX CPU and PCH merged auxiliary powerrail OFF OFF OFF ON
STATE +V +VS Clock UC1 HDMI
GLITCH GLITCH@ +0.6VS_VTT DDR +0.6VS power rail for DDR terminator OFF OFF OFF ON
S0 (Full ON) HIGH HIGH HIGH HIGH HIGH ON ON ON ON ICL i3_1005G1 HDMI +1.0VS_DGPU +1.0VS power rail for GPU OFF OFF OFF ON
KB Backlight KB_BKL@ SA0000CVQ40 RO0000003HM
S3 (Suspend to RAM) OFF +1.05V_VCCST Sustain voltage for CPU standby modes ON ON OFF ON
HDMI HDMI20@ EDP2@ HIGH HIGH LOW HIGH HIGH ON ON OFF
S IC FJ8068904310007 SRGKF D1 1.2G FCBGA
+1.05VS_VCCSTG Gated sustain voltage for CPU standby modes OFF OFF OFF ON
2 eDP EDP2@ HDMI20@ S4 (Suspend to Disk) HIGH HIGH LOW LOW HIGH ON OFF OFF OFF +1.2V_VCCPLL_OC +1.2V power rail for CPU digital PLL OFF ON OFF ON
SPI Touch SOC_THP@ +1.35VS_VRAM +1.35VS power rail for GPU ON
S5 (Sof t OFF) OFF OFF OFF
For Signal Test MP@ HIGH HIGH LOW LOW LOW ON OFF OFF OFF ICL i5_R1@ +1.2V_VDDQ DDR4/L-RS +1.2V power rail ON
ON ON OFF
JUMP (HW &PWR) JUMP@ @JUMP@
S0IX LOW LOW HIGH HIGH HIGH ON ON ON ON +2.5V DDR4/L-RS +2.5V power rail ON ON OFF ON
JUMP (PWR) VGAJUMP@ C
1
U +1.8V_PRIM_SOC TCSS/AGSH TypeC sub system / CPU analog power supply ON OFF OFF OFF
ICL i5_1035G1
SA0000CUQ40 +1.8VALW System +1.8V power rail ON ON ON ON*
S IC FJ8068904368700 SRGKG D1 1G FCBGA
Load BOM Option Table +1.8VS

+3VALW
System +1.8VS power rail
System +3VALW always on power rail
ON
ON
ON
ON
OFF OFF
ON ON*
BOM Number Load BOM Option ICL i7_R1@ +3VLP +19VB to +3VLP power rail for suspend power ON ON ON ON
+3VALW_DSW +3VALW power for PCH DSW rails ON ON ON ON*
1G@/WWAN@/ALC_DMIC@/CNVi@/DEBUG@/DIS@/EMI@/BL_EMI@/EMMC@/ESD@/BL_ESD@/ UC1
431ACX30L01(DISCRETE) FP@/GC6@/GLITCH@/HDD_FFC@/HDMI20@/CMC@/MP@/SOC_DMIC@/SSD@/TPM@/TypeC@/VOL@/TypeA@/KB_BKL@/SOC_THP@ +3V_PRIM +3VALW power for PCH suspend rails ON ON ON ON*
ICL i7_1065G7
SA0000CT650 +3VS System +3VS power rail ON ON OFF OFF
S IC FJ8068904310403 SRG0N D1 1.3G FCBGA
WWAN@/ALC_DMIC@/CNVi@/DEBUG@/EMI@/BL_EMI@/EMMC@/ESD@/BL_ESD@/FP@/GLITCH@/ +1.8VS_DGPU_AON +1.8VS power rail for GPU(AON rails) ON OFF OFF OFF
431ACX30L02(UMA) HDD_FFC@/HDMI20@/CMC@/MP@/SOC_DMIC@/SSD@/TPM@/TypeC@/UMA@/VOL@/TypeA@/KB_BKL@/SOC_THP@ +1.8VS_DGPU +1.8VS power rail for GPU ON OFF OFF OFF
+VGA_CORE Power rail for GPU ON OFF OFF OFF
+5VALW System +5VALW power rail ON
Load BOM Option Table for Baseline +5VS System +5VS power rail ON
ON
ON
ON
OFF OFF
ON*
BOM Number Load BOM Option +3VL_RTC RTC power ON ON ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
431ACX30L01(DISCRETE) 1G@/ALC_DMIC@/DIS@/EMI@/ESD@/GC6@/GLITCH@/HDD_FFC@/HDMI20@/SOC_DMIC@/VOL@/VGA@/EMIVGA@
431ACX30L02(UMA) ALC_DMIC@/EMI@/ESD@/GLITCH@/HDD_FFC@/HDMI20@/SOC_DMIC@/VOL@/UMA@ THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
NotesList
LA-J951P 0..1
Dattte::: Frrriiday,,, Aprrriill24,,, 2020 Sheettt 3 o ff 100
A
A B D E
1 1
UC1A
EDP_TXN0 Y5 BB5
38 EDP_TXN0 EDP_TXP0 DDIA_TXN_0 TCP0_TX_N0
38 EDP_TXP0 Y3 BB6
EDP_TXN1 DDIA_TXP_0 TCP0_TX_P0
38 EDP_TXN1 Y1 AV6
EDP_TXP1 DDIA_TXN_1 TCP0_TX_N1
38 EDP_TXP1 Y2 AV5
DDIA_TXP_1 TCP0_TX_P1
V2 BH2
DDIA_TXN_2 TCP0_TXRX_N0
V1 BH1
DDIA_TXP_2 TCP0_TXRX_P0
V3 BF1
DDIA_TXN_3 TCP0_TXRX_N1
V5 BF2
DDIA_TXP_3 TCP0_TXRX_P1
EDP_AUXN W4 AY5
38 EDP_AUXN DDIA_AUX_N TCP0_AUX_N
EDP_AUXP W3 AY6
38 EDP_AUXP DDIA_AUX_P TCP0_AUX_P
AE3 DDI
40 SOC_DP1_N0 DDIB_TXN_0
40 SOC_DP1_P0 AE5 AR5
DDIB_TXP_0 TCP1_TX_N0
40 SOC_DP1_N1 AE2 AR6
DDIB_TXN_1 TCP1_TX_P0
40 SOC_DP1_P1 AE1 AL5
DDIB_TXP_1 TCP1_TX_N1
40 SOC_DP1_N2 AC5 AL3
DDIB_TXN_2 TCP1_TX_P1
40 SOC_DP1_P2 AC3 BD2
DDIB_TXP_2 TCP1_TXRX_N0
40 SOC_DP1_N3 AC1 BD1
DDIB_TXN_3 TCP1_TXRX_P0
40 SOC_DP1_P3 AC2 BB1
DDIB_TXP_3 TCP1_TXRX_N1
BB2
SOC_DP2_AUXN AD3 TCP1_TXRX_P1
T2 TP@ SOC_DP2_AUXP AD4 DDIB_AUX_N AN3
T3 TP@ DDIB_AUX_P TCP1_AUX_N AN5
DP15 TCP1_AUX_P
2 DJ17 GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOWN TBT / USB / DP 2
GPP_E23/DDPA_CTRLDATA/BK4/SBK4 BF6
SOC_DP1_CTRL_CLK TCP2_TX_N0 BF5
40 SOC_DP1_CTRL_CLK DL40
SOC_DP1_CTRL_DATA GPP_H16/DDPB_CTRLCLK TCP2_TX_P0 BJ5
40 SOC_DP1_CTRL_DATA DP42
GPP_H17/DDPB_CTRLDATA TCP2_TX_N1 BJ6
DL17 TCP2_TX_P1 BL1
TCP0_GPIO DK17 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD TCP2_TXRX_N0 BL2
GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD TCP2_TXRX_P0 BM2
DN17 TCP2_TXRX_N1 BM1
DP17 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP2_TXRX_P1
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD BG6
DK34 TCP2_AUX_N BG5
DL34 GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD TCP2_AUX_P
GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD
DN33 BP6
GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD TCP3_TX_N0
DL33 BP5
GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD TCP3_TX_P0
BV5
EDP_HPD DW 11 TCP3_TX_N1
38 BV6
EDP_HPD HOST_DP1_HPD CV42 GPP_E14/DPPE_HPDA/DISP_MISCA TCP3_TX_P1
BR1
40 HOST_DP1_HPD CV39 GPP_A18/DDSP_HPDB/DISP_MISCB TCP3_TXRX_N0
BR2
CY43 GPP_A19/DDSP_HPD1/DISP_MISC1 TCP3_TXRX_P0
BT2
USB_OC1# CR41 GPP_A20/DDSP_HPD2/DISP_MISC2 TCP3_TXRX_N1
BT1
USB_OC2# CT41 GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3 TCP3_TXRX_P1
DV14 GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4 BT6
GPP_E17 TCP3_AUX_N BT5
ENVDD_CPU TCP3_AUX_P
38 ENVDD_CPU DN21
ENBKL EDP_VDDEN TC_RCOMP_N RC351 1 2 150_0402_1%
58 ENBKL DL19 AY1
BKL_PW M_CPU EDP_BKLTEN TC_RCOMP_N TC_RCOMP_P
38 BKL_PW M_CPU DU19 AY2
RSVD_1 J3 EDP_BKLTCTL TC_RCOMP_P
3 RSVD_1 CT38 SOC_ENVDD2 3
1DISP_UTILS D2 GPP_A17/DISP_MISCC CV43 SOC_ENBKL2 TP@ T307
T301 TP@ DISP_RCOMP R2 DISP_UTILS GPP_A21 CV41 SOC_BKL_PWM2 TP@ T308
DISP_RCOMP GPP_A22 TP@ T309
1
1 0f 19
RC350 ICL-U_BGA1526
150_0402_1% @
2
+3V_PRIM
2 1 USB_OC1# RSVD_1
RC963 10K_0402_5% Refer
2 1 USB_OC2#
RC966 10K_0402_5%
573129_ICL_U_DDR4_SODIMM_HW_SCH_RN
1@2 TCP0_GPIO
RC3948 1 2 100K_0402_5% RSVD_1
RC14 10K_0402_5%
RC4021 1 2 100K_0402_5% ENVDD_CPU

RC4022 1 2 100K_0402_5% ENBKL
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/05/07 Deciphered Date 2019/12/31 Tiitlle
THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
ICL-U(1/14)DDI,EDP
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D SiiizeDocument Number Re v
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W IT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J951P 0.1
Date: Wednesday, Apriiilll22, 2020 Sheet 6 of 100

A B D E
A B D E
6,9,11,12,13,16,17,23,24,87 +3V_PRIM +3V_PRIM

16 +1.05VS_VCCSTG_OUT_LGC_TERM +1.05VS_VCCSTG_OUT_LGC_TERM
16,17 +1.05VO_OUT_FET +1.05VO_OUT_FET
11,15,16,58,88 +1.05V_VCCST +1.05V_VCCST
+1.05V_VCCST
1 2 CATERR#
RC3912 49.9_0402_1%
1 2 H_THERMTRIP#
1 1
RC12 1K_0402_5%
+1.05VS_VCCSTG_OUT_LGC_TERM
CC4 2 1 0.1U_0201_10V6K
1
@ESD@
RC6 UC1D
1K_0402_5%
CATERR# J4 P3 SOC_XDP_TCK0
H_PECI CD5 CATERR# PROC_TCK K5 SOC_XDP_TDI
58 H_PECI
2
1 2 H_PROCHOT#_R C3 PECI PROC_TDI K3 SOC_XDP_TDO
58 H_PROCHOT# PROCHOT# PROC_TDO
RC7 499_0402_1% H_THERMTRIP# E3 P4 SOC_XDP_TMS
+3V_PRIM THRMTRIP# PROC_TMS N1 SOC_XDP_TRST#
1 PROC_POPIRCOMP PROC_TRST#
CC1 CJ41
ESD@ PCH_OPIRCOMP DU3 PROC_POPIRCOMP N5 SOC_XDP_TRST#
From ESD Team Request 100P_0201_50V8J A14 PCH_OPIRCOMP JTAG PCH_TRST# R5 PCH_JTAG_TCK1
2 B14 RSVD_25 PCH_TCK K1 SOC_XDP_TDI
RC6189 1 2 10K_0201_5% TP_I2C_INT_R RSVD_26 PCH_TDI K2 SOC_XDP_TDO N3
XDP_ITP_PMODE DL15 PCH_TDO SOC_XDP_TMS N2
DBG_PMODE PCH_TMS SOC_XDP_TCK0 +1.05VS_VCCSTG_OUT_LGC_TERM
RC3889 1 @ 2 2.2K_0402_5% SOC_GPP_H2 GPP_H2 NMI_DBG#_CPU PCH_JTAGX
DV11
MAF/SAF STRAP DT11 GPP_E3/CPU_GP0 P6 XDP_PRDY#
RC4066 1 2 100K_0201_5% EC_SLP_S0IX# INTERNAL PD 20K TP_I2C_INT_R CR38
GPP_E7/CPU_GP1 PROC_PRDY# M6 XDP_PREQ# TP@ T499
82P_0402_50V8J
HIGH: Slave Attached Flash Sharing (SAFS) is enabled. SOC_GPIOB4 GPP_B3/CPU_GP2 PROC_PREQ#
CR39
1U_0201_10V6M
CC4002 RF@
CC4001 RF@
J
82P_0402_50V8
CC4000 RF@
LOW: Master Attached Flash Sharing (MAFS) is enabled. T2403 TP@ GPP_B4/CPU_GP3 1
RC4069 1 @ 2 47K_0201_5% (Default) EC_SLP_S0IX# DT12
SOC_GPP_H2 GPP_E6
2 1
2 1
DJ38
GPP_H2/CNV_BT_I2S_SDO 2
DL38 GPP_H19/TIME_SYNC0 4 of19
ICL-U_BGA1526
@
49.9_0402_1%1 2 RC366 PROC_POPIRCOMP

49.9_0402_1%1 2 RC365 PCH_OPIRCOMP
2 2
+3V_PRIM
H_PECI CC130 2 1 0.1U_0201_10V6K
1
@ESD@
+3V_PRIM RC371
100K_0402_5% SOC_XDP_TRST# CC2 2 1 0.1U_0201_10V6K
2
@ESD@
2
DV11 1 2 H_PROCHOT#
17 VCCIN_AUX_CORE_ALERT#_R SOC_XDP_TDO CC3
RC4027 2 1 0.1U_0201_10V6K
10K_0201_5% RB751S40T1G_SOD523-2
@ESD@
1
NMI_DBG#_CPU
58 NMI_DBG#_CPU SOC_XDP_TDI CC5
2 1 0.1U_0201_10V6K
@ESD@
+1.05VS_VCCSTG_OUT_LGC_TERM
SOC_XDP_TMS
RC40312 1 51_0402_5%
SOC_XDP_TDI
RC40332 1 51_0402_5%
RC40322 1 100_0402_5% SOC_XDP_TDO
RC40302 @ 1 51_0402_5% XDP_PREQ#
3 3
+1.05VO_OUT_FET
XDP_ITP_PMODE
RC4036 1 2 1K_0402_5% XDP_ITP_PMODE DFX TEST MODE
INTERNAL PD 20K
HIGH: DFX TEST MODE DISABLED(DEFAULT)
RC4029 1 @ 2 1K_0402_5%
LOW: DFX TES TMODE ENABLED
RC4038 1 2 51_0402_5% SOC_XDP_TCK0
RC4037 2 @ 1 51_0402_5% PCH_JTAG_TCK1
RC4028 2 @ 1 51_0402_5% SOC_XDP_TRST#
Place to CPU side
4 4
Securiiity Clllassiiifiiicatiiion Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/9/25 Decipii hered Date 2018/12/31 Tiiitllle
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
ICL-U(1/14)DDI,MSIC,XDP
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT Siiize Document Number R ev
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IINC... LA-J951P 0..1
Date: Wednesday,,, Apriiilll22,,,2020 Sheet 7 of 100

A B D E
5 4 2 1
Follow Intel DDR4 NIL
DDR4: Refer to 575034_ICL_U42_DDR4_T3_6L_Core_Schematics_Rev0p7
D D
UC1B
UC1C
23 DDR_M0_D[0..7] DDR_M0_D0 CA48 LP4(NIL) / DDR4(NIL) LP4(NIL) / DDR4(NIL) BL48 DDR_M0_CLK#0
DDR_M0_D1 DDRA_CLK_N/DDR0_CLK_N_0 BL47 DDR_M0_CLK0 DDR_M0_CLK#0 23 24 DDR_M1_D[0..7] DDR_M1_D0 LP4(NIL) / DDR4(NIL) DDR_M1_CLK#0
CA47 DDRA_DQ0_0/DDR0_DQ0_0 AK48 LP4(NIL) / DDR4(NIL) Y48
DDR_M0_D2 CA49 DDRA_DQ0_1/DDR0_DQ0_1 DDRA_CLK_P/DDR0_CLK_P_0 BF42 DDR_M0_CLK#1 DDR_M0_CLK0 23 DDR_M1_D1 DDRC_DQ0_0/DDR1_DQ0_0 DDRC_CLK_N/DDR1_CLK_N_0 DDR_M1_CLK0 DDR_M1_CLK#0 24
AK45 Y47
DDR_M0_D3 BV49 DDRA_DQ0_2/DDR0_DQ0_2 DDRB_CLK_N/DDR0_CLK_N_1 BF43 DDR_M0_CLK1 DDR_M0_CLK#1 23 DDR_M1_D2 DDRC_DQ0_1/DDR1_DQ0_1 DDRC_CLK_P/DDR1_CLK_P_0 M43 DDR_M1_CLK#1 DDR_M1_CLK0 24
AK49
DDR_M0_D4 CA45 DDRA_DQ0_3/DDR0_DQ0_3 DDRB_CLK_P/DDR0_CLK_P_1 DDR_M0_CLK1 23 DDR_M1_D3 DDRC_DQ0_2/DDR1_DQ0_2 DDRD_CLK_N/DDR1_CLK_N_1 M42 DDR_M1_CLK1 DDR_M1_CLK#1 24
AG47
DDR_M0_D5 BV47 DDRA_DQ0_4/DDR0_DQ0_4 BG49 DDR_M0_CKE0 DDR_M1_D4 AK47 DDRC_DQ0_3/DDR1_DQ0_3 DDRD_CLK_P/DDR1_CLK_P_1 DDR_M1_CLK1 24
DDR_M0_D6 DDR_M0_CKE0 23 DDR_M1_D5 DDRC_DQ0_4/DDR1_DQ0_4 DDR_M1_CKE0
BV45 DDRA_DQ0_5/DDR0_DQ0_5 DDRA_CKE0/DDR0_CKE0 BJ47 AG45 U45
DDRC_DQ0_5/DDR1_DQ0_5 DDRC_CKE0/DDR1_CKE0 DDR_M1_CKE0 24
DDR_M0_D7 BV48 DDRA_DQ0_6/DDR0_DQ0_6 DDRA_CKE1/NC BF38 DDR_M1_D6 AG48 V46
23 DDR_M0_D[8..15] DDRB_CKE0/NC BF41 DDR_M0_CKE1 DDRC_DQ0_6/DDR1_DQ0_6
DDR_M0_D8 CC42 DDRA_DQ0_7/DDR0_DQ0_7 DDR_M1_D7
AG49 DDRC_CKE1/NC M41
DDR_M0_D9 CC39 DDRA_DQ1_0/DDR0_DQ1_0 DDRB_CKE1/DDR0_CKE1 DDR_M0_CKE1 23 24 DDR_M1_D[8..15] DDR_M1_D8 DDRC_DQ0_7/DDR1_DQ0_7 DDR_M1_CKE1
AJ38 DDRD_CKE0/NC P43
DDRC_DQ1_0/DDR1_DQ1_0 DDR_M1_CKE1 24
DDR_M0_D10 CC43 DDRA_DQ1_1/DDR0_DQ1_1 BM38 DDR_M0_CS#0 DDR_M1_D9
AL39 DDRD_CKE1/DDR1_CKE1
DDR_M0_D11 DDR_M0_CS#0 23 DDR_M1_D10 DDRC_DQ1_1/DDR1_DQ1_1 DDR_M1_CS#0
CE38 DDRA_DQ1_2/DDR0_DQ1_2 DDRA_CS_0/DDR0_CS#0 BM42 AJ39 V42 DDR_M1_CS#0 24
DDR_M0_D12 CC38 DDRA_DQ1_3/DDR0_DQ1_3 DDRA_CS_1/NC BP42 DDR_M1_D11 DDRC_DQ1_2/DDR1_DQ1_2
AL43 DDRC_CS_0/DDR1_CS#0 V39
DDR_M0_D13 CE39 DDRA_DQ1_4/DDR0_DQ1_4 DDRB_CS_0/NC BG42 DDR_M0_CS#1 DDR_M1_D12 AL38 DDRC_DQ1_3/DDR1_DQ1_3
DDR_M0_CS#1 23 DDRC_DQ1_4/DDR1_DQ1_4 DDRC_CS_1/NC Y39
DDR_M0_D14 CE42 DDRA_DQ1_5/DDR0_DQ1_5 DDRB_CS_1/DDR0_CS#1 DDR_M1_D13 DDR_M1_CS#1
AJ42 DDRC_DQ1_5/DDR1_DQ1_5 DDRD_CS_0/NC T39 DDR_M1_CS#1 24
DDR_M0_D15 CE43 DDRA_DQ1_6/DDR0_DQ1_6 BM43 DDR_M0_BA0 DDR_M1_D14 AL42
23 DDR_M0_D[16..23] DDR_M0_D16 DDR_M0_BA0 23 DDR_M1_D15 DDRC_DQ1_6/DDR1_DQ1_6 DDRD_CS_1/DDR1_CS#1 DDR_M1_BA0
BT48 DDRA_DQ1_7/DDR0_DQ1_7 DDRB_CA4/DDR0_BA0 BG39 DDR_M0_BA1 AJ43 T38
DDR_M0_D17 BT47 DDRA_DQ2_0/DDR0_DQ2_0 NC/DDR0_BA1 DDR_M0_BA1 23 24 DDR_M1_D[16..23] DDR_M1_D16 DDRC_DQ1_7/DDR1_DQ1_7 DDR_M1_BA1 DDR_M1_BA0 24
AB49 T42
DDR_M0_D18 BT49 DDRA_DQ2_1/DDR0_DQ2_1 BB49 DDR_M0_BG0 DDR_M1_D17 DDRC_DQ2_0/DDR1_DQ2_0 DDRD_CA4/DDR1_BA0 DDR_M1_BA1 24
DDR_M0_BG0 23 AB48
DDR_M0_D19 BN49 DDRA_DQ2_2/DDR0_DQ2_2 DDRA_CA5/DDR0_BG0 BD47 DDR_M0_BG1 DDR_M1_D18 DDRC_DQ2_1/DDR1_DQ2_1 NC/DDR1_BA1 R45 DDR_M1_BG0
AE49 DDR_M1_BG0 24
DDR_M0_D20 BT45 DDRA_DQ2_3/DDR0_DQ2_3 NC/DDR0_BG1 DDR_M0_BG1 23 DDR_M1_D19 DDRC_DQ2_2/DDR1_DQ2_2 N47 DDR_M1_BG1
DDR_M0_D21 DDR_M0_MA0 DDR_M1_D20 AE47 DDRC_DQ2_3/DDR1_DQ2_3 DDR_M1_BG1 24
BN47 DDRA_DQ2_4/DDR0_DQ2_4 BB48 AE48 DDRC_CA5/DDR1_BG0
DDR_M0_D22 BN45 DDRA_DQ2_5/DDR0_DQ2_5 NC/DDR0_MA0 BL49 DDR_M0_MA1 DDR_M0_MA0 23 DDR_M1_D21 DDRC_DQ2_4/DDR1_DQ2_4 DDR_M1_MA0
AB47 NC/DDR1_BG1 P42 DDR_M1_MA0
DDR_M0_D23 BN48 DDRA_DQ2_6/DDR0_DQ2_6 NC/DDR0_MA1 BG38 DDR_M0_MA2 DDR_M0_MA1 23 DDR_M1_D22 DDRC_DQ2_5/DDR1_DQ2_5 DDR_M1_MA1 24
AB45 Y49 DDR_M1_MA1
23 DDR_M0_D[24..31] DDRB_CA5/DDR0_MA2 BL45 DDR_M0_MA3 DDR_M0_MA2 DDRC_DQ2_6/DDR1_DQ2_6
DDR_M0_D24 BV42 DDRA_DQ2_7/DDR0_DQ2_7 23 DDR_M1_D23
AE45 NC/DDR1_MA0 U48 DDR_M1_MA2 24
NC/DDR0_MA3 BJ46 DDR_M0_MA4 DDR_M0_MA3 24 DDR_M1_D[24..31] DDRC_DQ2_7/DDR1_DQ2_7 DDR_M1_MA2
DDR_M0_D25 BV39 DDRA_DQ3_0/DDR0_DQ3_0 23 DDR_M1_D24 AD38 NC/DDR1_MA1 Y45 DDR_M1_MA3 24
DDR_M0_D26 NC/DDR0_MA4 BG48 DDR_M0_MA5 DDR_M0_MA4 23 DDR_M1_D25 DDRC_DQ3_0/DDR1_DQ3_0 DDR_M1_MA4 DDR_M1_MA3 24
BV43 DDRA_DQ3_1/DDR0_DQ3_1 AD39 U47
DDR_M0_D27 BW 38 DDRA_DQ3_2/DDR0_DQ3_2 DDRA_CA0/DDR0_MA5 BE45 DDR_M0_MA6 DDR_M0_MA5 23 DDR_M1_D26 DDRC_DQ3_1/DDR1_DQ3_1 DDRD_CA5/DDR1_MA2 DDR_M1_MA5 DDR_M1_MA4 24
AE39 R49 DDR_M1_MA5
DDR_M0_D28 BV38 DDRA_DQ3_3/DDR0_DQ3_3 DDRA_CA2/DDR0_MA6 BG45 DDR_M0_MA7 DDR_M0_MA6 23 DDR_M1_D27 DDRC_DQ3_2/DDR1_DQ3_2 NC/DDR1_MA3 DDR_M1_MA6
AE43 NC/DDR1_MA4 U49 24
DDR_M0_D29 BW 39 DDRA_DQ3_4/DDR0_DQ3_4 DDRA_CA4/DDR0_MA7 BG47 DDR_M0_MA8 DDR_M0_MA7 DDR_M1_D28 DDRC_DQ3_3/DDR1_DQ3_3 DDR_M1_MA7 DDR_M1_MA6
23 AE38 DDRC_CA0/DDR1_MA5 M47 DDR_M1_MA7 24
DDR_M0_D30 BW 42 DDRA_DQ3_5/DDR0_DQ3_5 DDRA_CA3/DDR0_MA8 BE47 DDR_M0_MA9 DDR_M0_MA8 DDR_M1_D29 DDRC_DQ3_4/DDR1_DQ3_4 DDR_M1_MA8
23 AD43 DDRC_CA2/DDR1_MA6 M45 24
DDR_M0_D31 BW 43 DDRA_DQ3_6/DDR0_DQ3_6 DDRA_CA1/DDR0_MA9 BJ38 DDR_M0_MA10 DDR_M0_MA9 23 DDR_M1_D30 DDRC_DQ3_5/DDR1_DQ3_5 DDR_M1_MA9 DDR_M1_MA8
AD42 DDRC_CA4/DDR1_MA7 R47 24
23 DDR_M0_D[32..39] DDR_M0_D32 AY48 DDRA_DQ3_7/DDR0_DQ3_7 NC/DDR0_MA10 BB47 DDR_M0_MA11 DDR_M0_MA10 DDR_M1_D31 DDRC_DQ3_6/DDR1_DQ3_6 DDR_M1_MA10 DDR_M1_MA9
23 AE42 DDRC_CA3/DDR1_MA8 P39 24
DDR_M0_MA11 24 DDR_M1_D[32..39] DDRC_DQ3_7/DDR1_DQ3_7 DDR_M1_MA10
DDR_M0_D33 AY47 DDRB_DQ0_0/DDR0_DQ4_0 NC/DDR0_MA11 BE48 DDR_M0_MA12 23 DDR_M1_D32 J48 DDRC_CA1/DDR1_MA9 N46 DDR_M1_MA11 24
NC/DDR0_MA12 BM39 DDR_M0_MA13 DDR_M0_MA12 DDRD_DQ0_0/DDR1_DQ4_0 DDR_M1_MA11
DDR_M0_D34 AY49 DDRB_DQ0_1/DDR0_DQ4_1 23
DDR_M1_D33
J45 NC/DDR1_MA10 R48 DDR_M1_MA12
24
DDR_M0_MA13 DDR_M1_MA12
DDR_M0_D35 AU45 DDRB_DQ0_2/DDR0_DQ4_2 DDRB_CA0/DDR0_MA13 BG43 DDR_M0_MA14_WE# DDR_M1_D34 J49 DDRD_DQ0_1/DDR1_DQ4_1 Y41 DDR_M1_MA13
24
DDR_M0_D36 DDR_M0_MA14_WE# 23 23 DDR_M1_D35 NC/DDR1_MA11 DDR_M1_MA14_WE# DDR_M1_MA13
AY45 DDRB_DQ0_3/DDR0_DQ4_3 DDRB_CA2/DDR0_MA14WE# BJ42 DDR_M0_MA15_CAS# G47 DDRD_DQ0_2/DDR1_DQ4_2
DDR_M1_MA14_WE# 24
C DDR_M0_D37 AU47 DDRB_DQ0_4/DDR0_DQ4_4 DDRB_CA1/DDR0_MA15CAS# BM41 DDR_M0_MA16_RAS# DDR_M0_MA15_CAS# 23 DDR_M1_D36 DDRD_DQ0_3/DDR1_DQ4_3 NC/DDR1_MA12 DDR_M1_MA15_CAS# 24 C
J47 Y42
DDR_M0_D38 AU48 DDRB_DQ0_5/DDR0_DQ4_5 DDRB_CA3/DDR0_MA16RAS# DDR_M0_MA16_RAS# 23 DDR_M1_D37 DDRD_DQ0_4/DDR1_DQ4_4 DDRD_CA0/DDR1_MA13 V41V47 DDR_M1_MA16_RAS# DDR_M1_MA15_CAS# 24
G45
DDR_M0_D39 AU49 DDRB_DQ0_6/DDR0_DQ4_6 BJ39 DDR_M0_ODT0 DDR_M1_D38 G48 DDRD_DQ0_5/DDR1_DQ4_5 DDRD_CA2/DDR1_MA14W E# DDR_M1_MA16_RAS# 24
23 DDR_M0_D[40..47] DDR_M0_ODT0 23
DDR_M0_D40 AY42 DDRB_DQ0_7/DDR0_DQ4_7 NC/DDR0_ODT_0 BB45 DDR_M0_ODT1
DDR_M0_ODT1
DDR_M1_D39
E48
DDRD_DQ0_6/DDR1_DQ4_6 DDRD_CA1/DDR1_MA15CAS# V43 DDR_M1_ODT0
DDR_M0_D41 NC/DDR0_ODT_1 23 24 DDR_M1_D[40..47] DDR_M1_D40 DDR_M1_ODT1 DDR_M1_ODT0 24
AY38 DDRB_DQ1_0/DDR0_DQ5_0 J38 DDRD_DQ0_7/DDR1_DQ4_7 DDRD_CA3/DDR1_MA16RAS# V38
DDR_M0_D42 AY43 DDRB_DQ1_1/DDR0_DQ5_1 BY47 DDR_M0_DQS#0 DDR_M1_D41 DDRD_DQ1_0/DDR1_DQ5_0 DDR_M1_ODT1 24
DDR_M0_DQS#0 23 G39
DDR_M0_D43 BB39 DDRB_DQ1_2/DDR0_DQ5_2 DDRA_DQSN_0/DDR0_DQSN_0 BY46 DDR_M0_DQS0 DDR_M1_D42 G38 DDRD_DQ1_1/DDR1_DQ5_1 NC/DDR1_ODT_0 AH46 DDR_M1_DQS#0
DDR_M0_DQS0 23 DDR_M1_DQS#0 24
DDR_M0_D44 AY39 DDRB_DQ1_3/DDR0_DQ5_3 DDRA_DQSP_0/DDR0_DQSP_0 CC41 DDR_M0_DQS#1 DDR_M1_D43
G42
DDRD_DQ1_2/DDR1_DQ5_2 NC/DDR1_ODT_1 AH47 DDR_M1_DQS0
DDR_M0_DQS#1 23 DDR_M1_DQS0 24
DDR_M0_D45 BB38 DDRB_DQ1_4/DDR0_DQ5_4 DDRA_DQSN_1/DDR0_DQSN_1 CE41 DDR_M0_DQS1 DDR_M1_D44 J39 DDRD_DQ1_3/DDR1_DQ5_3 AJ41 DDR_M1_DQS#1 24
DDR_M0_D46 DDR_M0_DQS1 23 DDR_M1_D45 AL41 DDR_M1_DQS1 DDR_M1_DQS#1
BB42 DDRB_DQ1_5/DDR0_DQ5_5 DDRA_DQSP_1/DDR0_DQSP_1 BR47 DDR_M0_DQS#2 J42 DDRD_DQ1_4/DDR1_DQ5_4 DDRC_DQSN_0/DDR1_DQSN_0
24
DDR_M0_D47 BB43 DDRB_DQ1_6/DDR0_DQ5_6 DDRA_DQSN_2/DDR0_DQSN_2 BR46 DDR_M0_DQS2 DDR_M0_DQS#2 23 DDR_M1_D46 DDRD_DQ1_5/DDR1_DQ5_5 AC47 DDR_M1_DQS#2 DDR_M1_DQS1
G43 DDRC_DQSP_0/DDR1_DQSP_0
23 DDR_M0_D[48..55] DDR_M0_DQS2 DDR_M1_DQS#2 24
DDR_M0_D48 AR48 DDRB_DQ1_7/DDR0_DQ5_7 DDRA_DQSP_2/DDR0_DQSP_2 BV41 DDR_M0_DQS#3 23 DDR_M1_D47
J43
DDRD_DQ1_6/DDR1_DQ5_6 DDRC_DQSN_1/DDR1_DQSN_1 AC46 DDR_M1_DQS2
DDR_M0_DQS#3 24 DDR_M1_D[48..55] DDR_M1_DQS2
DDR_M0_D49 AR47 DDRB_DQ2_0/DDR0_DQ6_0 DDRA_DQSN_3/DDR0_DQSN_3 BW 41 DDR_M0_DQS3 23 DDR_M1_D48 B43 DDRD_DQ1_7/DDR1_DQ5_7 DDRC_DQSP_1/DDR1_DQSP_1 AE41 DDR_M1_DQS#3 24
DDR_M0_DQS3 DDR_M1_DQS#3 24
DDR_M0_D50 AR49 DDRB_DQ2_1/DDR0_DQ6_1 DDRA_DQSP_3/DDR0_DQSP_3 AV46 DDR_M0_DQS#4 23 DDR_M1_D49
D43
DDRD_DQ2_0/DDR1_DQ6_0 DDRC_DQSN_2/DDR1_DQSN_2 AD41 DDR_M1_DQS3
DDR_M0_D51 AM45 DDRB_DQ2_2/DDR0_DQ6_2 DDRB_DQSN_0/DDR0_DQSN_4 AV47 DDR_M0_DQS4 DDR_M0_DQS#4 23 DDR_M1_D50 DDRD_DQ2_1/DDR1_DQ6_1 H47 DDR_M1_DQS#4 DDR_M1_DQS3 24
A43 DDRC_DQSP_2/DDR1_DQSP_2
DDR_M0_DQS4 DDR_M1_DQS#4 24
DDR_M0_D52 AR45 DDRB_DQ2_3/DDR0_DQ6_3 DDRB_DQSP_0/DDR0_DQSP_4 AY41 DDR_M0_DQS#5 23 DDR_M1_D51
C40 DDRD_DQ2_2/DDR1_DQ6_2 DDRC_DQSN_3/DDR1_DQSN_3 H46 DDR_M1_DQS4
DDR_M0_DQS#5 DDR_M1_DQS4
DDR_M0_D53 AM47 DDRB_DQ2_4/DDR0_DQ6_4 DDRB_DQSN_1/DDR0_DQSN_5 BB41 DDR_M0_DQS5 23 DDR_M1_D52 C43 DDRD_DQ2_3/DDR1_DQ6_3 DDRC_DQSP_3/DDR1_DQSP_3 G41 DDR_M1_DQS#5 24
DDRB_DQSP_1/DDR0_DQSP_5 AN46 DDR_M0_DQS#6 DDR_M0_DQS5 DDR_M1_DQS#5
DDR_M0_D54 AM48 DDRB_DQ2_5/DDR0_DQ6_5 23 DDR_M1_D53
D40
DDRD_DQ2_4/DDR1_DQ6_4 DDRD_DQSN_0/DDR1_DQSN_4 J41 DDR_M1_DQS5 24
DDR_M0_D55 AM49 DDRB_DQ2_6/DDR0_DQ6_6 DDRB_DQSN_2/DDR0_DQSN_6 AN47 DDR_M0_DQS6 DDR_M0_DQS#6 DDR_M1_DQS5
23 DDR_M1_D54 B40 DDRD_DQ2_5/DDR1_DQ6_5 DDRD_DQSP_0/DDR1_DQSP_4 C42 DDR_M1_DQS#6 24
23 DDR_M0_D[56..63] DDR_M0_DQS6 DDR_M1_DQS#6
DDR_M0_D56 AT42 DDRB_DQ2_7/DDR0_DQ6_7 DDRB_DQSP_2/DDR0_DQSP_6 AR41 DDR_M0_DQS#7 23 DDR_M1_D55 A40 DDRD_DQ2_6/DDR1_DQ6_6 DDRD_DQSN_1/DDR1_DQSN_5 D42 DDR_M1_DQS6 24
DDR_M0_DQS#7 24 DDR_M1_D[56..63] DDR_M1_DQS6
DDR_M0_D57 AT39 DDRB_DQ3_0/DDR0_DQ7_0 DDRB_DQSN_3/DDR0_DQSN_7 AT41 DDR_M0_DQS7 23 DDR_M1_D56 B35 DDRD_DQ2_7/DDR1_DQ6_7 DDRD_DQSP_1/DDR1_DQSP_5 D36 DDR_M1_DQS#7 24
DDR_M0_DQS7 DDR_M1_DQS#7
DDR_M0_D58 AR43 DDRB_DQ3_1/DDR0_DQ7_1 DDRB_DQSP_3/DDR0_DQSP_7 23 DDR_M1_D57
D35
DDRD_DQ3_0/DDR1_DQ7_0 DDRD_DQSN_2/DDR1_DQSN_6 C36 DDR_M1_DQS7 24
BF39 DDR_M0_PAR DDR_M1_DQS7
DDR_M0_D59 AT38 DDRB_DQ3_2/DDR0_DQ7_2 DDR_M1_D58 A35 DDRD_DQ3_1/DDR1_DQ7_1 DDRD_DQSP_2/DDR1_DQSP_6 24
DDR_M0_D60 AR38 DDRB_DQ3_3/DDR0_DQ7_3 NC/DDR0_PAR BE49 DDR_M0_ACT# DDR_M0_PAR DDR_M1_D59 DDRD_DQ3_2/DDR1_DQ7_2 DDRD_DQSN_3/DDR1_DQSN_7 DDR_M1_PAR
23 D38 P38
DDR_M0_D61 NC/DDR0_ACT# BD46 DDR_M0_ALERT# DDR_M0_ACT# DDR_M1_D60 DDR_M1_ACT# DDR_M1_PAR 24
AR39 DDRB_DQ3_4/DDR0_DQ7_4 23 C35 DDRD_DQ3_3/DDR1_DQ7_3 DDRD_DQSP_3/DDR1_DQSP_7 M48
DDR_M0_D62 AR42 DDRB_DQ3_5/DDR0_DQ7_5 NC/DDR0_ALERT# DDR_M0_ALERT# DDR_M1_D61 DDRD_DQ3_4/DDR1_DQ7_4 DDR_M1_ALERT# DDR_M1_ACT# 24
23 C38 M49
24
DDR_M0_D63 AT43 DDRB_DQ3_6/DDR0_DQ7_6 M38 1 DDR_M1_D62 B38 DDRD_DQ3_5/DDR1_DQ7_5 NC/DDR1_PAR DDR_M1_ALERT#
DDRB_DQ3_7/DDR0_DQ7_7 RSVD_73 C44 +0.6V_A_VREFCA TP@ T244 DDR_M1_D63 DDRD_DQ3_6/DDR1_DQ7_6
A38 NC/DDR1_ACT#
100_0402_1% 2 1 RC25 SM_RCOMP0 D47 DDR0_VREF_CA B45 +0.6V_B_VREFCA +0.6V_A_VREFCA Trace width/Spacing >= 20mils DDRD_DQ3_7/DDR1_DQ7_7 3 of 19 NC/DDR1_ALERT#
+0.6V_B_VREFCA
100_0402_1% 2 1 RC26 SM_RCOMP1 E46 DDR_RCOMP_0 DDR1_VREF_CA M39 DDR_PG_CTRL ICL-U_BGA1526
1 RC27 SM_RCOMP2 C47 DDR_RCOMP_1 DDR_VTT_CTL DK47 DDR_DRAMRST#
100_0402_1% 2 @
DDR_RCOMP_2 2 of 19 DRAM_RESET#
ICL-U_BGA1526
@
Buffer with Open Drain Output

+1.2V_VDDQ
For VTT power control
+1.2V_VDDQ
+3VS
B B
1
0.1U_0201_10V6K 2 1 CC57
1
RC30
UC3 RC429 470_0402_5%
1 5 100K_0402_5%
NC VCC
2
DDR_PG_CTRL 2 @ESD@
2
A 4 DDR_PG_CTRL 1 2 DDR_DRAMRST# RC31 1 Rshort@ 2 DDR_DRAMRST#_R

Y SM_PG_CTRL 86 DDR_DRAMRST#_R 23,24
3 CC7 100P_0201_50V8J 0_0402_5%
GND
1
74AUP1G07GW_TSSOP5 CC9
0.1U_0201_10V6K
@ESD@
2
PLACE NEAR TO SoC
A A

ICL-U(3/14)DDR4
LA-J951P 0..1

5 4 3 2 1
5 4 2 1
+3V_PRIM
SOC_SML0CLK 499_0402_1% 2 1 RC316

GPP_C2 SOC_SML0DATA 499_0402_1% 2 1 RC315
TLS CONFIDENTIALITY SOC_SML1CLK 1K_0402_5% 1 2 RC381
INTERNAL PD 20K SOC_SML1DATA 1K_0402_5% 1 2 RC382
HIGH: TLS CONFIDENTIALITY ENABLE
LOW: TLS CONFIDENTIALITY DISABLE
SMBALERT# 4.7K_0402_5% 1 2 RC3886
SOC_SML0ALERT# 4.7K_0402_5% 1 @ 2 RC3887
SOC_SML0ALERT#
ESPI OR EC LESS
UC1E INTERNAL PDDISABLE
20K SMBDATA 1K_0402_5% 1 2 RC3982
HIGH: ESPI
LOW: ESPI ENABLE (Default) To Memory SMBCLK 1K_0402_5% 1 2 RC3983
SOC_SPI_0_CLK DB42
66 SOC_SPI_0_CLK SOC_SPI_0_D0 DD43 SPI0_CLK DK27 SMBCLK
66 SOC_SPI_0_D0 SOC_SPI_0_D1 SPI0_MOSI GPP_C0/SMBCLK DP24 SMBDATA
DF43
D 66 SOC_SPI_0_D1 SOC_SPI_0_D2 DF42 SPI0_MISO SMBUS GPP_C1/SMBDATA DL24 SMBALERT# SMB D
SOC_SPI_0_D3 DD41 SPI0_IO2 SPI 0 GPP_C2/SMBALERT# (Link to XDP, DDR, TP)
SOC_SPI_0_CS#0 DB43 SPI0_IO3
1SOC_SPI_0_CS#1 DF41 SPI0_CS0# DK24 SOC_SML0CLK
T34 TP@ SOC_SPI_0_CS#2 SPI0_CS1# GPP_C3/SML0CLK DJ24 SOC_SML0DATA
DB41
66 SOC_SPI_0_CS#2 SPI0_CS2# SML0 GPP_C4/SML0DATA DP22 SOC_SML0ALERT#
GPP_C5/SML0ALERT#
SOC_GPP_E11 DV16
SML1
DT16 GPP_E11/SPI1_CLK/BK1/SBK1 DN22 SOC_SML1CLK (Link to EC,DGPU, LAN, Thermal Sensor)
DU18 GPP_E13/SPI1_MOSI/BK3/SBK3 GPP_C6/SML1CLK/SUSW ARN_N/SUSPW RDNACK DL22 SOC_SML1DATA
GPP_E12/SPI1_MISO/BK2/SBK2 SML1 GPP_C7/SML1DATA/SUSACK#
DT18 SPI 1
DW 18 GPP_E1/SPI1_IO2
SOC_GPP_E10 DW 16 GPP_E2/SPI1_IO3 CR47 ESPI_CLK RC34 1 EMI@ 2 49.9_0402_1% ESPI
SOC_SATALED# GPP_E10/SPI1_CS_N/BK0/SBK0 GPP_A5/ESPI_CLK CN45 ESPI_IO0 ESPI_CLK_R 58
68,73 SOC_SATALED#
DU16
GPP_E8/SATALED#/SPI1_CS1# GPP_A0/ESPI_IO0 Follow
CN48 ESPI_IO1 572907_ICL_UY_PDG
GPP_A1/ESPI_IO1 CN49 ESPI_IO2
DV19 eSPI GPP_A2/ESPI_IO2 CN47 ESPI_IO3
DW 19 CL_CLK MLINK GPP_A3/ESPI_IO3 CT45
DT19 CL_DATA GPP_A4/ESPI_CS# ESPI_CS# 58 ESPI_IO0 1 ESPI_IO0_R
GPP_E10 / GPP_E11 CR46 RC3978 2 10_0402_1%
CL_RST# GPP_A6/ESPI_RESET# ESPI_RST# 58 ESPI_IO1 ESPI_IO1_R ESPI_IO0_R 58
XTAL INPUT FREQUENCY RC3980 1 2 10_0402_1%
ESPI_IO2 ESPI_IO2_R ESPI_IO1_R 58
NO INTERNAL PU/PD RC3979 1 2 10_0402_1%
ESPI_IO2_R 58 To EC
+1.8V_PRIM Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_RN 5 of 19 ESPI_IO3 RC3981 1 2 10_0402_1% ESPI_IO3_R
ESPI_IO3_R 58
ICL-U_BGA1526
@
CC3973 @EMI@
ESPI_CLK_R 1 2 10P_0201_25V8
RC3945 1 2 20K_0201_5% SOC_GPP_E10
RC3946 1 2 20K_0201_5% SOC_GPP_E11
+3VS +3VS Add for EMI Request _20190807 +3V_PRIM +3VALW
2
C C
RC4040
RC215 RC81 RC82
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @
2
I2C0_SCL_TP
2
+3VS QC3 R5265 1 TPI2C@ 2 0_0201_5% SB00001FF00
12 I2C0_SCL_TP
1
@
SMBCLK 6 1 SMBCLK R5366 1 @ 2 0_0201_5% 1 6
SOC_SATALED# SOC_SMBCLK 23,24 TP_SMBCLK 63
1 2 QC7A
RC4024 10K_0201_5% L2N7002SDW1T1G 2N SC88-6 L2N7002SDW1T1G 2N SC88-6
SB00001FF00
5
QC3 R5272 1Rshort@ 2
0_0201_5%
SMBDATA 3 4
SOC_SMBDATA 23,24
5
L2N7002SDW1T1G 2N SC88-6 @
SB00001FF00 SMBDATA R5267 1 @ 2 0_0201_5% 4 3
TP_SMBDATA 63
I2C0_SDA_TP QC7B SB00001FF00
12 I2C0_SDA_TP R5268 1 TPI2C@ 2 0_0201_5%
L2N7002SDW1T1G 2N SC88-6
R52711Rshort@ 2
0_0201_5%
75K_0402_1% 1 @ 2 RC444 ESPI_CS#
75K_0402_1% 1 @ 2 RC443 ESPI_RST#
100K_0402_5% 1 2 RC441 SOC_SPI_0_CLK
SPI
Follow 572907_ICL_UY_PDG for Glitch
Follow 572907_ICL_UY_PDG
B B
Single SPI ROM_CS0#

SOC_SPI_0_D0
BOOT HALT +3V_SPI
Follow 572907_ICL_UY_PDG 16M SPI ROM(Support ISH) NO INTERNAL PU/PD
SOC_SPI_0_CS#0_R RC1160 1 2 49.9_0402_1% SOC_SPI_0_CS#0 Use Socket footprint_20190807 +3V_SPI HIGH: DISABLE STRAP
LOW: ENABLE SOC_SPI_0_D0 RC37 1 2 100K_0402_5%
UC2 ROM@ CC111 2 0.1U_0201_10V6K SOC_SPI_0_D2
SOC_SPI_0_D1_R RC4013 1 2 49.9_0402_1% SOC_SPI_0_D1 SOC_SPI_0_CS#0_R 1 8 SOC_SPI_0_D2 RC38 1 2 100K_0402_5%
SOC_SPI_0_D0_R SOC_SPI_0_D0 SOC_SPI_0_D1_R /CS VCC 7 CONSENT STRAP
RC4014 1 2 49.9_0402_1% 2 SOC_SPI_0_D3_R NO INTERNAL PU/PD
SOC_SPI_0_D2_R SOC_SPI_0_D2_R DO(IO1) /HOLD(IO3) SOC_SPI_0_CLK_R 1
To SPI ROM RC1 1 2 49.9_0402_1% SOC_SPI_0_D2 3 6 2 HIGH: DISABLE SOC_SPI_0_D3 RC39 1 2 100K_0402_5%
SOC_SPI_0_D3_R RC4016 1 2 49.9_0402_1% SOC_SPI_0_D3 4 /W P(IO2) CLK 5 SOC_SPI_0_D0_R CC12 LOW: ENABLE
SOC_SPI_0_CLK_R RC4015 1 EMI@ 2 49.9_0402_1% SOC_SPI_0_CLK GND DI(IO0) 10P_0201_50V8J RC3943 1 @ 2 100K_0402_5%
SOC_SPI_0_D3
W25Q128JVSIQ_SO8 @EMI@
A0 PERSONALITY STRAP
ACES_50960-0084N-001_8P NO INTERNAL PU/PD
2 HIGH: DISABLE
ROM Socket LOW: ENABLE
CC4003 @EMI@
LTCX0094D00
1 22P_0201_25V8 ACES_50960-0084N-001_8P
Add for EMI Request _20190807 SOCKET@
MAF - Master Attached Flash

From EC Single SPI Flash attached to SPI Bus
EC FW access through eSPI Bus
UC2
(For share ROM)
ROM
SA00007XA10
+3V_PRIM 3mA +3V_SPI

A A
RC3891 Rshort@ 2 0_0402_5%

ICL-U(3/12)SPI,ESPI,SMB,LPC
Date: Wednesday,,, Apriiilll22,,,2020 Sheet 9 of 100

5 4 2 1
5 4 2 1
UC1G
CE46
HDA_BIT_CLK CY46 GPP_G6/SD_CLK
CC48
HDA_SYNC CV49 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_G1/SD_DATA0
CC49
R 13849 Rshort@ 2 0_0201_5% HDA_SDOUT CY47 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_G2/SD_DATA1
58 ME_EN CC47
HDA_SDIN0 CV45 GPP_R2/HDA_SDO/I2S0_TXD GPP_G3/SD_DATA2
D CF45 D
HDA_RST# DA47 GPP_R3/HDA_SDI0/I2S0_RXD GPP_G4/SD_DATA3
CC45
GPP_R4/HDA_RST# GPP_G0/SD_CMD CF49
SD3.0 GPP_G7/SD_WP CE47
DP33
GPP_D19/I2S_MCLK GPP_G5/SD_CD#
1
ODD_PWR DC45 DK38

67 ODD_PW R GPP_H0/CNV_BT_I2S_SDO
HDA_SDIN1 DA49 GPP_A23/I2S1_SCLK DG38
100K_0201_5% DA45 GPP_R5/HDA_SDI1/I2S1_SFRM GPP_H1/SD_PWR_EN_N/CNV_BT_I2S_SDO
@
RC52 DA48 GPP_R6/I2S1_TXD CJ43 SD3_RCOMP RC3581 2
ODD_DA# CT49 GPP_R7/I2S1_RXD SD3_RCOMP 200_0402_1%
67 ODD_DA#
2
CNV_RF_RESET# CT48 GPP_A7/I2S2_SCLK

52 CNV_RF_RESET# CV47 GPP_A8/I2S2_SFRM/CNV_RF_RESET#
SERIRQ DG36
66 SERIRQ XTAL_CLKREQ CT47 GPP_A10/I2S2_RXD GPP_S6/SNDW4_CLK/DMIC_CLK0 DG34
52 XTAL_CLKREQ GPP_A9/I2S2_TXD/MODEM_CLKREQ GPP_S7/SNDW4_DATA/DMIC_DATA0
CY39 CV38 SNDW_RCOMP RC3591 2
GPP_S0/SNDW1_CLK SNDW_RCOMP
CY38 200_0402_1%
GPP_S1/SNDW1_DATA
AUDIO
DB39
DD38 GPP_S2/SNDW2_CLK
GPP_S3/SNDW2_DATA
DF38
GPP_S4/SNDW3_CLK/DMIC_CLK1
DD39
+3VS GPP_S5/SNDW3_DATA/DMIC_DATA1
7 of 19
ICL-U_BGA1526
1 2 ODD_DA#
@
RC6190 10K_0402_5%
C C
HDA_SDOUT
FLASH DESCRIPTOR SECURITY OVERRIDE
INTERNAL PD 20K
< HD AUDIO > HIGH: OVERRIDEN
To Enable ME Override LOW: SECURITY MEASURES NOT OVERRIDEN
RC3986 1 2 33_0402_5% HDA_RST#

56 HDA_RST#_R
RC3989 1 2 33_0402_5% HDA_SYNC
56 HDA_SYNC_R
RC3987 1 2 33_0402_5% HDA_SDOUT
56 HDA_SDOUT_R
1
RC4004
@ 499_0402_1%
572631_ICL_PCH_LP_EDS_Vol_1_Rev_0p7 VGS(Max) : 1.0 V
2
HDA_SDIN0 VCCPGPPR: Audio Power 3.3V, 1.8V, or 1.5V

56 HDA_SDIN0 Need to sync with codec VDDIO
B B
75K_0402_5% 1 CNVI@ 2 RC3907CNV_RF_RESET# RC3988 1 EMI@ 2 33_0402_5% HDA_BIT_CLK

2 RC448 HDA_BIT_CLK 56 HDA_BIT_CLK_R
100K_0402_5% 1
33K_0402_5% 1 2 RC449 HDA_RST#
33K_0402_5% 1 @ 2 RC450 HDA_SDIN1
1
CC3974
@EMI@
2 22P_0201_25V8
Follow
572907_ICL_UY_PDG for Glitch
Add for EMI Request _20190806
A A

ICL-U(4/12)HDA,SD

5 4 2 1
5 4
Eletro-XTechnical0012 3 2 1
+3VS +3VALW
INPUT3VSEL
3V SELECT STRAP PM_BATLOW# 10K_0201_5% 2 1 RC69
Change RC3990 to un-pop for no use (UMA) _2019/08/01
CLKREQ_PEG#0 HIGH: 3.0V +/-5%
RC3990 2 @ 1 10K_0201_5% WAKE# 1K_0201_5% 2 1 RC451
RC352 2 1 10K_0201_5% CLKREQ_PCIE#1 UC1J LOW: 3.3V +/-5% LAN_WAKE# 10K_0201_5% 2 1 RC452
1 10K_0201_5% CLKREQ_PCIE#2 Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_RN
RC3991 2 INPUT3VSEL 4.7K_0201_5% 2 @ 1 RC456
RC3992 2 1 10K_0201_5% CLKREQ_PCIE#3 100K_0201_5% 2 1 RC457
Remove CLK_PEG_N0 & P0 (UMA) _2019/08/01 CJ3
CLKOUT_PCIE_N0 CLKOUT_PCIE_N5
CF5
CJ5 CF3
CLKREQ_PEG#0 CLKOUT_PCIE_P0 CLKOUT_PCIE_P5
DK33 DP40
GPP_D5/SRCCLKREQ0# GPP_H11/SRCCLKREQ5# +3V_PRIM
CLK_PCIE_N1 CL2
51 CLK_PCIE_N1 CLK_PCIE_P1 CLKOUT_PCIE_N1 SOC_RTCX1 SOC_PD_INT# 10K_0201_5% 2
Follow LAN 51 CLK_PCIE_P1 CLKREQ_PCIE#1
CL1
CLKOUT_PCIE_P1 RTCX1
DL48
SOC_RTCX2 SOC_RTCX2_R
1 RC6186
DN34 RTC DL49 1 2
573129_ICL_U_DDR4_SODIMM_HW_SCH_RN 51 CLKREQ_PCIE#1 GPP_D6/SRCCLKREQ1# RTCX2 RC61 75K_0201_1% 2 @ 1 RC442
0_0402_5%
& 572907_ICL_UY_PDG for Glitch CLK_PCIE_N2 CL3 DT47 SOC_RTCRST# SUSCLK_R 100K_0201_5% 1 @ 2 RC375
D 52 CLK_PCIE_N2 CLKOUT_PCIE_N2 SOC_RTCRST# 58 D
CLK_PCIE_P2 RTCRST# SOC_SRTCRST#
+3VALW
WLAN 52 CLK_PCIE_P2 CLKREQ_PCIE#2
CL5
CLKOUT_PCIE_P2 SRTCRST#
DK46 SOC_SRTCRST# 58
52 CLKREQ_PCIE#2 DP34
GPP_D7/SRCCLKREQ2# DF49 SUSCLK_R
PM_SLP_S0# CLK_PCIE_N3 GPD8/SUSCLK
RC376 1 2 33_0402_5%
SUSCLK 52 Follow
RC3939 1 2 100K_0201_5% CK3
68 CLK_PCIE_N3 CLK_PCIE_P3 CK4 CLKOUT_PCIE_N3
573129_ICL_U_DDR4_SODIMM_HW_SCH_RN
SSD 68 CLK_PCIE_P3 CLKREQ_PCIE#3 DP36 CLKOUT_PCIE_P3 DW 8 SOC_XTAL38.4_IN
68 CLKREQ_PCIE#3
RC3994 1 2 100K_0201_5% SLP_SUS# GPP_D8/SRCCLKREQ3# XTAL XTAL_IN DU8 SOC_XTAL38.4_OUT
RC3995 1 @ 2 100K_0201_5% PM_SLP_S5# RC3996 CJ2 XTAL_OUT
1 2 100K_0201_5% PM_SLP_S4# CJ1 CLKOUT_PCIE_N4 +3VS
RC3997 1 2 100K_0201_5% PM_SLP_S3# DN40 CLKOUT_PCIE_P4 DU6 XCLK_BIASREF RC59 1 2 60.4_0402_1%
GPP_H10/SRCCLKREQ4# XCLK_BIASREF
CPU_C10_GATE# 1 @ 2
10 of 19 RC3993 100K_0201_5%
RC3998 1 2 100K_0201_5% PM_SLP_A# RC3999 ICL-U_BGA1526
1 2 100K_0201_5% PM_SLP_LAN# @
RC4000 1 2 100K_0201_5% PM_SLP_WLAN#
AC_PRESENT_R 1@2
UC1K RC4053 10K_0201_5%
SLP_SUS# CY42 PBTN_OUT#_R

58 SLP_SUS# DM49 GPD3/PW RBTN#
PM_SLP_S5# DF45 SLP_SUS# DE46 AC_PRESENT_R
PM_SLP_S4# DC48 GPD10/SLP_S5# GPD1/ACPRESENT DH48 PM_BATLOW#
58,86 PM_SLP_S4# PM_SLP_S3# GPD5/SLP_S4# GPD0/BATLOW #
+3VALW DF47
16,58 PM_SLP_S3# GPD4/SLP_S3#
PM_SLP_A# DH47 CL39 SOC_PD_INT#
GPD6/SLP_A# GPP_B11/PMCALERT#
RC4065 2 1 10K_0201_5% SYS_RESET# 16 PM_SLP_S0#
PM_SLP_S0# CL45 DU40 CPU_C10_GATE#
GPP_B12/SLP_S0# GPP_H18/CPU_C10_GATE# DG40 SX_EXIT_HOLDOFF# CPU_C10_GATE# 16
1
PM_SLP_W LAN# DE49 GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO TP@ T5
CG80 2 1 0.1U_0402_16V7K
PM_SLP_LAN# DN48 GPD9/SPL_W LAN# DL45 WAKE#
@ESD@ SLP_LAN# W AKE#
EC_RSMRST# DG49 DE47 LAN_WAKE#
+3VL_RTC 58 EC_RSMRST# SYS_RESET# RSMRST# GPD2/LAN_W AKE#
DK19 DF48 GPD11 1 TP@ T443
SOC_PLTRST# CM49 SYS_RESET# GPD11/LANPHYPC/DSW LDO_MON
GPP_B13/PLTRST# CE4 VCCST_OVERRIDE R388 1 2 0_0201_5% VCCST_OVERRIDE_R
RC56 1 2 20K_0402_5% SOC_SRTCRST# VCCST_OVERRIDE CF2 EC_VCCST_PG
C PCH_DPW ROK_R DR48 VCCST_PW RGD CE3 VCCSTPWRGOOD_TGSS RC4531 C
2 0_0201_5%
PCH_PWROK DN47 DSW _PW ROK VCCSTPW RGOOD_TCSS CF1 H_PROCPWRGD 1
CC13 1 2 1U_0201_6.3V6M TP@ T2416
58 PCH_PW ROK SYS_PW ROK DP19 PCH_PW ROK PROCPW RGD SOC_RTCX2_R
58 SYS_PW ROK SYS_PW ROK
CLRP1 1 2 SHORT PADS CLR ME DC47 Only For Power Sequence Debug
DN49 GPD7
INPUT3VSEL
SM_INTRUDER# DR47 INPUT3VSEL
RC58 1 2 20K_0402_5% SOC_RTCRST# INTRUDER# SOC_RTCX1
11 of 19 1 2
CC14 1 2 1U_0201_6.3V6M
ICL-U_BGA1526 tCPU22/ tPCH28b RC62 10M_0402_5%
CLRP2 1 2 SHORT PADS CLR CMOS @
D19 D15 @
EC_RSMRST# 2 EC_VCCST_PG_R 2
RC3841 @ 2 1M_0402_5% SM_INTRUDER# SM_INTRUDER# 1 1 PM_SLP_S3# YC2
NO INTERNAL PU/PD PM_SLP_S4# 3 PCH_PWROK 3 1 2
CC319 1 @ 2 0.1U_0201_10V6K HIGH: SPI VOLTAGE IS 1.8V
LOW: SPI VOLTAGE IS 3.3V LRB715FT1G_SOT323-3 LRB715FT1G_SOT323-3 32.768KHZ_12.5PF_9H03200042
RC377 2 1 10K_0402_5% SJ10000Q800
D20
J
8.2P_0201_25V8
J
8.2P_0201_25V8
1 1
RC386 1 2 100K_0402_5% EC_RSMRST# PM_SLP_S3# 2 tPLT17
CLRP3 2 1 SHORT PADS SYS_RESET# 1 PCH_DPWROK_R
CC17
CC18
SLP_SUS# 3 D34 @
VR_ON 2 1 PM_SLP_S3# 2 2
58,88 VR_ON
LRB715FT1G_SOT323-3
RB751S40T1G_SOD523-2
+1.05V_VCCST
DC3
EC_RSMRST# PCH_PWROK
From EC(open-drain) 1 2
1
RC76 RB751V-40_SOD323-2
1K_0402_5% 2 1
SPOK 58,85
DC4 RB751V-40_SOD323-2 @ESD@ SOC_XTAL38.4_IN 1 2 SOC_XTAL38.4_IN_R
2
RC77 1 2 60.4_0402_1% EC_VCCST_PG CC354 2 1 0.1U_0402_16V7K RC378 33_0402_1%

58 EC_VCCST_PG_R SOC_XTAL38.4_OUT 2 SOC_XTAL38.4_OUT_R
B 1 B
RC55 33_0402_1%
PCH_DPWROK PCH_DPWROK_R
change 33ohm for EMI(UMA) _2019/08/30 RC57 1 2 200K_0402_1%
58 PCH_DPWROK RC230 2 @ 1 0_0201_5%
VCCST_EN 58 AC_PRESENT RC66 2 @ 1 0_0201_5% AC_PRESENT_R
RC67 2 @ 1 0_0201_5% PBTN_OUT#_R YC3

58 PBTN_OUT#
1 3
D14 2 2 4 2
2 CC162
17,91 VCCIN_AUX_CORE_VID0_R
1 10P_0201_25V8 38.4MHZ_10PF_8Y38420005 CC163
3 VCCIN_AUX_CORE_VID 58 To EC
17,91 VCCIN_AUX_CORE_VID1_R 1 1 10P_0201_25V8
LRB715FT1G_SOT323-3
R3844 1 From EC to VCCST

58 EC_VCCST_EN 16
Rshort@ 2 0_0402_5% VCCST_EN_LS VR Power SW Enable
PM_SLP_S3# R3842 1 @ 2 0_0402_5%
PCH PLTRST Buf f er
PM_SLP_S4# R3843 1 @ 2 0_0402_5% RC5270 1 Rshort@ 2 0_0402_5%
For NON-S0IX
+3VS
CC3867 @
1 2
+3V_PRIM Singal Name Input
5
UC4 @ 0.1U_0201_10V6K
100K_0402_5% 1 2 RC4017 VCCST_OVERRIDE_LS To EC SOC_PLTRST# 1
P
100K_0402_5% 1 2 RC4018 VCCST_OVERRIDE_N VCCIN_AUX_CORE_VID H D D L B 4 PLT_RST#
2 RC4019 VCCST_OVERRIDE_R 58 Y PLT_RST# 51,52,58,66,68
100K_0402_5% 1 VCCST_OVERRIDE_LS 2
A
3
G
Volume
VCCST_OVERRIDE_LS D H D L
100K_0402_5%
74AHC1G08GW_SOT353-5
3
QC2B
RC312
A A
VCCST_OVERRIDE_N 5 DMN63D8LDW-7_SOT363-6
@
VGS(Max) : 1.5 V PM_SLP_S4# (SYSON) D D H L
4
2
6
QC2A For Glitch

DMN63D8LDW -7_SOT363-6 EC_VCCST_EN Output H H H L
VGS(Max) : 1.5 V
VCCST_OVERRIDE_R 2

1
SB000016K00 Issued Date 2019/05/07 Decipii hered Date 2019/12/31 Tiiitllle
ICL-U(5/12)CLK,GPIO
Date: Wednesday,,, Apriiilll22,,,2020 Sheet 11 o f 100

5 4 3 2 1
5 4
Remove DGPU_PWR_EN PU to +3VS (UMA) _2019/08/02
D D
UC1F
+3VS Remove GPU_EVENT# (UMA) _2019/08/01 CH48 DV33
SOC_GPP_B18 CF48 GPP_B16/GSPI0_CLK GPP_D13/ISH_UART0_RXD DW 33
GPP_B18/GSPI0_MOSI GPP_D14/ISH_UART0_TXD DT33
Remove GC6_FB_EN3V3 (UMA)_2019/08/01 CF47
GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5 DU33
VRAM_STRAP CH49 SOC_GPP_D16
HDA_SPKR GPP_B15/GSPI0_CS0# GPP_D16/ISH_UART0_CTS_N/CNV_W CEN
(For R-BOM) 56 HDA_SPKR
CH47
GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1# UART
For EC Debug UART /MIPI60 GPP_C12/UART1_RXD/ISH_UART1_RXD
DK22 Remove DGPU_HOLD_RST# (UMA)_2019/08/01
GSPI
UART_2_CRXD_DTXD
CL47
GPP_B20/GSPI1_CLK GPP_C13/UART1_TXD/ISH_UART1_TXD
DW 24 Remove DGPU_PWR_EN (UMA) _2019/08/02
RC459 2 1 49.9K_0402_1% CK47 DV24 Remove GPU_ALL_PGOOD (UMA) _2019/08/01
RC460 2 UART_2_CTXD_DRXD GPP_B22/GSPI1_MOSI GPP_C14/UART1_RTS#/ISH_UART1_RTS#
1 49.9K_0402_1% CK46 DU24
GPP_B21/GSPI1_MISO GPP_C15/UART1_CTS#/ISH_UART1_CTS#
CH45
SOC_GPP_B23 GPP_B19/GSPI1_CS0#
CL48 CN43
GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# GPP_B5/ISH_I2C0_SDA
CN42
+3V_PRIM DP21 GPP_B6/ISH_I2C0_SCL
DK21 GPP_C8/UART0_RXD CN41 W L_OFF#
DL21 GPP_C9/UART0_TXD I2C /ISH GPP_B7/ISH_I2C1_SDA CL43 W L_OFF# 52
DJ22 GPP_C10/UART0_RTS# GPP_B8/ISH_I2C1_SCL
GPP_C11/UART0_CTS# CL41
I2C0_SCL_TP UART_2_CRXD_DTXD DT22 UART GPP_B9/I2C5_SDA/ISH_I2C2_SDA CJ39
RC4044 2 TPI2C@ 1 1K_0402_5%
52 UART_2_CRXD_DTXD GPP_C20/UART2_RXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL
RC4043 2 TPI2C@ 1 1K_0402_5% I2C0_SDA_TP To I2C TP 52 UART_2_CTXD_DRXD
UART_2_CTXD_DRXD DW 22 DU36
DV22 GPP_C21/UART2_TXD GPP_D0/ISH_GP0 DV36
DU22 GPP_C22/UART2_RTS# GPP_D1/ISH_GP1 DW 36
GPP_C23/UART2_CTS# GPP_D2/ISH_GP2 DT36
I2C0_SDA_TP DT24 ISH GPP_D3/ISH_GP3 DU34
T99P I2C0_SDA_TP
I2C0_SCL_TP
I2C0_SCL_TP DT23 GPP_C16/I2C0_SDA GPP_D17/ISH_GP4 DW 34
GPP_C17/I2C0_SCL GPP_D18/ISH_GP5 DT14 DGPU_PRSNT#
DW 23 GPP_E15/ISH_GP6 DU14
DU23 GPP_C18/I2C1_SDA GPP_E16/ISH_GP7
GPP_C19/I2C1_SCL
DU41 I2C
GPP_H4/I2C2_SDA
DV41
GPP_H5/I2C2_SCL
DW 41
C GPP_H6/I2C3_SDA C
DT41
GPP_H7/I2C3_SCL
DT40
GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
DW 40
GPP_H9/I2C4_SCL/CNV_MFUART2_TXD 6 of 19
ICL-U_BGA1526
@
Strap Pin GPP_B23

CPUNSSC CLOCK FREQ +3VS
For BIOS Verify UMA/DIS SKU
+3VS +3V_PRIM INTERNAL PD 20K
Eletro-XTechnical0013 HIGH: 19.2 MHz (form internal divider)

LOW: 38.4 MHz (direct form crystal) (Default)
1
UMA@
2 DGPU_PRSNT#
GPP_B18 RC4 10K_0201_5%
10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
No Reboot
1
DIS@
INTERNAL PD 20K 1 2
RC3878
RC3877
RC3879
RC3883
HIGH: No Reboot
@ @ @ @ RC5 10K_0201_5%
LOW: Reboot Enable (Default)
2
SPKR
TOP SWAP OVERRIDE
SOC_GPP_B18 SOC_GPP_B23 INTERNAL PD 20K GPP_E15 DGPU_PRSNT#
HIGH: Top swap enable
LOW: Disable (Default)
HDA_SPKR
SOC_GPP_D16
DIS,Optimus 0
GPP_D16 UMA 1
MFR_MODE_DET_STRAP
Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_RN_1P0
1
B GPP_D16 Strap refer RVP B

20K_0402_5%
20K_0402_5%
20K_0402_5%
100K_0402_5%
RC3881
RC3882
RC3885
RC3880
@ @
2
VRAM Strap Pin

VRAM type SOC_GPIOB21
2GB 0
+3VS 4GB (@) 1
RC89 1 @ 2 10K_0402_5% VRAM_STRAP
RC90 1 DIS@ 2 10K_0402_5%
A A

ICL-U(6/12)GPIO

5 4 3 2 1
5 4
Device Gen1/2 need to check for 100nF Device Gen1/2 need to check for 100nF
Gen3 for 220nF Gen3 for 220nF
UC1H
CV7 DJ8 USB3_CRX_DTX_N1 71

PCIE7_RXN PCIE1_RXN/USB31_1_RXN
CV6 DJ6 USB3_CRX_DTX_P1 71
PCIE7_RXP PCIE1_RXP/USB31_1_RXP
DD3
PCIE7_TXN PCIE1_TXN/USB31_1_TXN
DJ2 USB3_CTX_DRX_N1 71 USB2.0/USB3.0
DD5 DJ1 71
PCIE7_TXP PCIE1_TXP/USB31_1_TXP USB3_CTX_DRX_P1
D Remove (UMA) _2019/08/01 D
CT6 DG9 71
PCIE8_RXN PCIE2_RXN/USB31_2_RXN USB3_CRX_DTX_N2
CT7 DG7 USB3_CRX_DTX_P2 71
PCIE8_RXP PCIE2_RXP/USB31_2_RXP
DA3
PCIE8_TXN PCIE2_TXN/USB31_2_TXN
DJ3 USB3_CTX_DRX_N2 71 USB2.0/USB3.0
DA5 DJ5 71
PCIE8_TXP PCIE2_TXP/USB31_2_TXP USB3_CTX_DRX_P2
PCIE_CRX_DTX_N9 CP7 PCIe DE7
51 PCIE_CRX_DTX_N9 PCIE_CRX_DTX_P9 CP6 PCIE9_RXN PCIE3_RXN/USB31_3_RXN DE9
51 PCIE_CRX_DTX_P9 PCIE_CTX_DRX_N9 DA2 PCIE9_RXP PCIE3_RXP/USB31_3_RXP DF3
LAN PCIE_CTX_DRX_N9
51 PCIE_CTX_DRX_P9 DA1 PCIE9_TXN PCIE3_TXN/USB31_3_TXN DF5
51 PCIE_CTX_DRX_P9 PCIE9_TXP PCIE3_TXP/USB31_3_TXP
PCIE_CRX_DTX_N10 CM7 PCIe / USB3.1 DC7
52 PCIE_CRX_DTX_N10 PCIE_CRX_DTX_P10 CM6 PCIE10_RXN PCIE4_RXN/USB31_4_RXN DC9
WLAN 52 PCIE_CRX_DTX_P10 PCIE_CTX_DRX_N10 CY3 PCIE10_RXP PCIE4_RXP/USB31_4_RXP DF2
52 PCIE_CTX_DRX_N10 PCIE_CTX_DRX_P10 CY4 PCIE10_TXN PCIE4_TXN/USB31_4_TXN DF1
52 PCIE_CTX_DRX_P10 PCIE10_TXP PCIE4_TXP/USB31_4_TXP
SATA_CRX_DTX_N0 CK7 DA6
67 SATA_CRX_DTX_N0 SATA_CRX_DTX_P0 CK6 PCIE11_RXN/SATA0_RXN PCIE5_RXN/USB31_5_RXN DA7
67 SATA_CRX_DTX_P0 SATA_CTX_DRX_N0 PCIE11_RXP/SATA0_RXP PCIE5_RXP/USB31_5_RXP DE4
HDD 67 SATA_CTX_DRX_N0 SATA_CTX_DRX_P0
CW 2
PCIE11_TXN/SATA0_TXN PCIE5_TXN/USB31_5_TXN DE3
CW 1
67 SATA_CTX_DRX_P0 SATA_CRX_DTX_N1 CJ6 PCIE11_TXP/SATA0_TXP PCIE5_TXP/USB31_5_TXP
67 SATA_CRX_DTX_N1 PCIE12_RXN/SATA1A_RXN Remove (UMA) _2019/08/01
PCIe / SATA CY7
SATA_CRX_DTX_P1 CJ7 PCIE6_RXN/USB31_6_RXN CY6
ODD 67 SATA_CRX_DTX_P1 SATA_CTX_DRX_N1 CW 5 PCIE12_RXP/SATA1A_RXP PCIE6_RXP/USB31_6_RXP DD1
67 SATA_CTX_DRX_N1 PCIE12_TXN/SATA1A_TXN PCIE6_TXN/USB31_6_TXN DD2
SATA_CTX_DRX_P1 CW 3 PCIE6_TXP/USB31_6_TXP
67 SATA_CTX_DRX_P1 PCIE_CRX_DTX_N13 CG7 PCIE12_TXP/SATA1A_TXP DN8 USB20_N1
68 PCIE_CRX_DTX_N13 PCIE_CRX_DTX_P13 PCIE13_RXN USB2N_1 DP8 USB20_P1 USB20_N1 71
CG6
68 PCIE_CRX_DTX_P13 PCIE_CTX_DRX_N13 CT3 PCIE13_RXP USB2P_1 USB20_P1 71 USB2.0/USB3.0 Type-A
68 PCIE_CTX_DRX_N13 PCIE_CTX_DRX_P13 CT5 PCIE13_TXN USB20_N2
DK11
68 PCIE_CTX_DRX_P13 PCIE13_TXP USB2N_2 DJ11 USB20_P2 USB20_N2 71
PCIE_CRX_DTX_N14 PCIe USB2P_2 USB20_P2 71 USB2.0/USB3.0 Type-A
CE6
68 PCIE_CRX_DTX_N14 PCIE_CRX_DTX_P14 CE7 PCIE14_RXN DP13 USB20_N3
68 PCIE_CRX_DTX_P14 PCIE_CTX_DRX_N14 CT2 PCIE14_RXP USB2N_3 DN13 USB20_P3 USB20_N3 73
68 PCIE_CTX_DRX_N14 PCIE_CTX_DRX_P14 CT1 PCIE14_TXN USB2P_3 USB20_P3 73 USB2.0 Type-C
68 PCIE_CTX_DRX_P14 PCIE14_TXP DK10 USB20_N4
USB2N_4 DJ10 USB20_P4 USB20_N4 73
C
PCIE LANE Reverse SSD 68 PCIE_CRX_DTX_N15
PCIE_CRX_DTX_N15
PCIE_CRX_DTX_P15
CC5
CC6 PCIE15_RXN/SATA1B_RXN USB2P_4 USB20_P4 73 Card Reader
C
68 PCIE_CRX_DTX_P15 PCIE_CTX_DRX_N15 CR3 PCIE15_RXP/SATA1B_RXP DL5 USB20_N5

68 PCIE_CTX_DRX_N15 PCIE_CTX_DRX_P15 CR4 PCIE15_TXN/SATA1B_TXN USB2N_5 DL3 USB20_P5 USB20_N5 38
68 PCIE_CTX_DRX_P15 PCIE15_TXP/SATA1B_TXP PCIe / SATA USB2P_5 USB20_P5 38 Cam era
PCIE_CRX_DTX_N16 CA6 DP11
68 PCIE_CRX_DTX_N16 PCIE_CRX_DTX_P16 CA5 PCIE16_RXN/SATA2_RXN USB2N_6 DN11
68 PCIE_CRX_DTX_P16 PCIE_CTX_DRX_N16 CP1 PCIE16_RXP/SATA2_RXP USB2.0 USB2P_6
68 PCIE_CTX_DRX_N16 PCIE_CTX_DRX_P16 CP2 PCIE16_TXN/SATA2_TXN DK13 USB20_N7
68 PCIE_CTX_DRX_P16 PCIE16_TXP/SATA2_TXP USB2N_7 DJ13 USB20_P7 USB20_N7 38
USB2P_7 USB20_P7 38 TS
DW 12
52 BT_ON_PCH ODD_PLUG# CR42 GPP_E0/SATAXPCIE0/SATAGP0 DN6
67 ODD_PLUG# CR43 GPP_A12/SATAXPCIE1/SATAGP1 USB2N_8 DP6
Note : 68 SATA_GP2 GPP_A13/SATAXPCIE2/SATAGP2 USB2P_8
Please reference PCH EDS Tabel 1-2 USB_OC0# DW 14 DL2
USB_OC3# CT43 GPP_E9/USB_OC0# USB2N_9 DL1
GPP_A16/USB_OC3# USB2P_9
USB20_N10
USB_OC0# Strap referRVP DU12
GPP_E4/DEVSLP0 USB2N_10
DP10
USB20_P10 USB20_N10 52
DU11 DN10 52 BT
USB20_P10
+3V_PRIM CV48 GPP_E5/DEVSLP1 USB2P_10
68 DEVSLP2 GPP_A11 / DEVSLP2 DL6 USB2_ID RC355 1 2 10K_0402_5%
1 2 USB_OC0# DT38 USB_ID
RC4001 10K_0201_5% DW38 GPP_H12/M2_SKT2_CFG0 DL11 USB2_VBUSSENSERC354 1 2 10K_0402_5%
1 2 USB_OC3# DV38 GPP_H13/M2_SKT2_CFG1 USB_VBUSSENSE
RC4042 10K_0402_5% DU38 GPP_H14/M2_SKT2_CFG2 DN5 USB2_COMP RC356 1 2 113_0402_1%
GPP_H15/M2_SKT2_CFG3 USB2_COMP
PCIE_RCOMPN
RC1001 2 100_0402_1% DN1
RSVD_81
CD3 Remove (UMA) _2019/08/01
PCIE_RCOMPP DN3 PCIE_RCOMPN
PCIE_RCOMPP
8 of 19
ICL-U_BGA1526
@
+3V_PRIM
B B
1 2 SATA_GP2
RC6191 10K_0402_5%
+3VS
1@ 2 SATA_GP2
RC3947 100K_0402_5%
1 2 ODD_PLUG#
RC4002 10K_0402_5%
A A

ICL-U(7/12)PCIE,USB,SATA

5 4 3 2 1
5 4
3 2 1
UC1I
D12 DP27
CSI_E_CLK_N GPP_F8/EMMC_DATA0
C12 DU30
CSI_E_CLK_P GPP_F9/EMMC_DATA1
D B12 DT30 D
CSI_E_DN_0 GPP_F10/EMMC_DATA2
A12 DT29
CSI_E_DP_0 GPP_F11/EMMC_DATA3
G13 DV30
CSI_E_DN_1 GPP_F12/EMMC_DATA4
F13 DU29
CSI_E_DP_1 GPP_F13/EMMC_DATA5
DW30
eMMC GPP_F14/EMMC_DATA6
K10 DW29
CSI_F_CLK_N GPP_F15/EMMC_DATA7
L10 DV28
CSI_F_CLK_P GPP_F7/EMMC_CMD
L8 DW28
CSI_F_DN_0 GPP_F16/EMMC_RCLK
M8 DN27
CSI_F_DP_0 GPP_F17/EMMC_CLK
M11 DT28
CSI_F_DN_1 GPP_F18/EMMC_RESET#
L11 DU28EMMC_RCOMP RC4054 1 2
CSI_F_DP_1 EMMC_RCOMP 200_0402_1%
D9
CSI_D_CLK_N CNV_CTX_DRX_N0
C9 DV45 CNV_CTX_DRX_N0 52
CSI_D_CLK_P CNV_WT_D0N
A7 DU45 CNV_CTX_DRX_P0 CNV_CTX_DRX_P0 52
CSI_D_DN_0 CNV_WT_D0P
B7 DU44 CNV_CTX_DRX_N1 CNV_CTX_DRX_N1 52
CSI_D_DP_0 CNV_WT_D1N CNV_CTX_DRX_P1
B9 DT44 CNV_CTX_DRX_P1 52
CSI_D_DN_1 CNV_WT_D1P
A9 DL42 CLK_CNV_CTX_DRX_N CLK_CNV_CTX_DRX_N 52
CSI_D_DP_1 CNV_WT_CLKN
D7 DK42 CLK_CNV_CTX_DRX_P CLK_CNV_CTX_DRX_P 52
CSI_D_DN_2/CSI_C_DN_0 CNV_WT_CLKP
C7
CSI_D_DP_2/CSI_C_DP_0 CNV_CRX_DTX_N0
D8 DP44 CNV_CRX_DTX_N0 52
CSI_D_DN_3/CSI_C_CLK_N CNV_WR_D0N
C8 CSI2 DN44 CNV_CRX_DTX_P0 CNV_CRX_DTX_P0 52
CSI_D_DP_3/CSI_C_CLK_P CNV_WR_D0P
DG42 CNV_CRX_DTX_N1 CNV_CRX_DTX_N1 52
CNV_WR_D1N
G11 DG44 CNV_CRX_DTX_P1 CNV_CRX_DTX_P1 52
CSI_H_CLK_N CNV_WR_D1P
J11 DK44 CLK_CNV_CRX_DTX_N CLK_CNV_CRX_DTX_N 52
CSI_H_CLK_P CNV_WR_CLKN
F6 CNVi DJ44 CLK_CNV_CRX_DTX_P CLK_CNV_CRX_DTX_P 52
CSI_H_DN_0 CNV_WR_CLKP
G6
CSI_H_DP_0 CNV_WT_RCOMP RC1091 2
G10 DT45
CSI_H_DN_1 CNV_WT_RCOMP 150_0402_1%
F10
C CSI_H_DP_1 CNV_BRI_CRX_DTX
G8 DL29 CNV_BRI_CRX_DTX 52
C
CSI_H_DN_2/CSI_G_DN_0 GPP_F1/CNV_BRI_RSP/UART0_RXD
J8 DP31 CNV_RGI_CTX_DRX CNV_RGI_CTX_DRX 52
CSI_H_DP_2/CSI_G_DP_0 GPP_F2/CNV_RGI_DT/UART0_TXD
K6 DL31 CNV_BRI_CTX_DRX CNV_BRI_CTX_DRX 52
CSI_H_DN_3/CSI_G_CLK_N GPP_F0/CNV_BRI_DT/UART0_RTS# CNV_RGI_CRX_DTX
L6 DN29 CNV_RGI_CRX_DTX 52
CSI_H_DP_3/CSI_G_CLK_P GPP_F3/CNV_RGI_RSP/UART0_CTS#
RC3571 2 CSI_RCOMP B4 DJ29 SOC_GPP_F4
100_0402_1% CSI_RCOMP GPP_F4/CNV_RF_RESET#
DP29
GPP_F6/CNV_PA_BLANKING SOC_GPP_F19
1 SOC_GPP_D4 DT34 DL27 SOC_GPP_F19 1 2
T378 TP@ 1 SOC_GPP_H20 DP38 GPP_D4/IMGCLKOUT0 GPP_F19/A4WP_PRESENT
DK29 SOC_GPP_F5 1 RC6170 75K_0402_1%
TP@ 1 SOC_GPP_H21 DK36 GPP_H20/IMGCLKOUT1 GPP_F5/MODEM_CLKREQ TP@ T340
T379
TP@ 1 SOC_GPP_H22 DL36 GPP_H21/IMGCLKOUT2
T380 Follow 574200 MoW WW03
TP@ 1 SOC_GPP_H23 DN38 GPP_H22/IMGCLKOUT3
T381
TP@ GPP_H23/IMGCLKOUT4
T382
Eletro-XTechnical0015 ICL-U_BGA1526
9 of 19
SOC_GPP_F4
@
1
RC440
75K_0402_1%
@
CNV_RGI_CTX_DRX CNV_BRI_CTX_DRX
2
M.2 CNVI MODES XTAL SEL
Follow 572907_ICL_UY_PDG
+1.8V_PRIM 0 = Integrated CNVi enable. 0 = 38.4/19.2MHZ (DEFAULT) PC glitch free,it is recommended that a
B pull-down resistor of 75K B
1 = Integrated CNVi disable. 1 = 24MHZ (25 MHZ WHEN XTAL FREQ DIVIDER NON ZERO) ohm on GPP_F4(CNV_RF_RESET#)
RH1811 @ 2 20K_0402_1% CNV_BRI_CRX_DTX
RH1821 @ 2 20K_0402_1% CNV_RGI_CRX_DTX NO INTERNAL PU/PD WEAK INTERNAL PD 20K

+1.8V_PRIM +1.8V_PRIM
CNV_RGI_CTX_DRX RC373 1 2 100K_0402_5% CNV_BRI_CTX_DRX RC374 1 @ 2 4.7K_0402_5%
RC112 1 @ 2 4.7K_0402_5% RC111 1 @ 2 20K_0402_5%
A A

ICL-U(8/13)CSI,CNV
5 4 3 2 1
5 4
Eletro-XTechnical00163 2 1
+VCCIN +VCCIN
FIVR Decoupling Caps -PLACE UC1L
< 5mm from SOC VCCIN A19

AC12 VCCIN_1
CPU POWER 1 OF 3 CJ35
VCCIN_52 CK10
V13 VCCIN_2 VCCIN_53 J32
W12 VCCIN_3 VCCIN_54 CL34
+VCCIN Y13 VCCIN_4 VCCIN_55 CL35
K29 VCCIN_5 VCCIN_56 CN34
D D
K31 VCCIN_6 VCCIN_57 CN35
1 1 1 1 1 1 B19 VCCIN_7 VCCIN_58 CP33
@RF@ @RF@ @RF@ @RF@ @RF@ B23 VCCIN_8 VCCIN_59 CR34
@RF@
CC3875 CC3876 CC3877 CC3881 CC3882 CC3883 B27 VCCIN_9 VCCIN_60 A29
B29 VCCIN_10 VCCIN_61 CR35
2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J BN10 VCCIN_11 VCCIN_62 CT33
BP11 VCCIN_12 VCCIN_63 CT34
BP9 VCCIN_13 VCCIN_64 CT35
BR10 VCCIN_14 VCCIN_65 CU33
BT11 VCCIN_15 VCCIN_66 D19
+VCCIN A21 VCCIN_16 VCCIN_67 D21
BT9 VCCIN_17 VCCIN_68 D23
BU10 VCCIN_18 VCCIN_69 D24
BV36 VCCIN_19 VCCIN_70 D27
BV9 VCCIN_20 VCCIN_71 AA12
1 1 1 VCCIN_72 D29
CC3884 CC3885 CC3886 BW10 VCCIN_21
12P_0201_50V8J 0.1U_0201_10V6K BW36 VCCIN_22 VCCIN_73 F19
100P_0201_50V8J
@RF@ @RF@ @RF@ BW9 VCCIN_23 VCCIN_74 F21
2 2 2 BY10 VCCIN_24 VCCIN_75 F23
C19 VCCIN_25 VCCIN_76 F24
C23 VCCIN_26 VCCIN_77 F27
Add for RF Request _20190807 A23 VCCIN_27 VCCIN_78 F29
C27 VCCIN_28 VCCIN_79 G1
C29 VCCIN_29 VCCIN_80 G19
+VCCIN CA36 VCCIN_30 VCCIN_81 G23
CA9 VCCIN_31 VCCIN_82 AB1
CB10 VCCIN_32 VCCIN_83 G27
CC11 VCCIN_33 VCCIN_84 G29
C CC36 VCCIN_34 VCCIN_85 H19 C
1 1 1 1 1 1 VCCIN_86 H23
@RF@ @RF@ @RF@ @RF@ @RF@ @RF@ CC9 VCCIN_35
CC4011 CC4012 CC4013 CC4008 CC4009 CC4010 CD10 VCCIN_36 VCCIN_87 H27
CE11 VCCIN_37 VCCIN_88 H29
2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J A24 VCCIN_38 VCCIN_89 J18
CE34 VCCIN_39 VCCIN_90 J20
CE35 VCCIN_40 VCCIN_91 J22
CF10 VCCIN_41 VCCIN_92 J23
CF33 VCCIN_42 VCCIN_93 AB13
CG11 VCCIN_43 VCCIN_94 J26
CG34 VCCIN_44 VCCIN_95 J28
CG35 VCCIN_45 VCCIN_96 K17
Add for RF Request _20190807_pwr CH10 VCCIN_46 VCCIN_97 K19
J30 VCCIN_47 VCCIN_98 K21
CJ11 VCCIN_48 VCCIN_99 K23
Eletro-XTechnical0016 A27 VCCIN_49
CJ34 VCCIN_50
VCCIN_100 K24
VCCIN_101 K27
VCCIN_51 VCCIN_102 M1
12 of 19 VCCIN_103 U1
SOC_SVID_ALERT# H1 VCCIN_104
SOC_SVID_CLK H2 VIDALERT# F17
VCCIN_VCCSENSE 88
+1.05V_VCCST SOC_SVID_DAT H3 VIDSCK VCCIN_SENSE G17
VIDSOUT VSSIN_SENSE VCCIN_VSSSENSE 88
ICL-U_BGA1526
1
SVID DATA RC148

@
100_0402_1%
2
B B
SOC_SVID_DAT RC3862 1 Rshort@ 2 0_0402_5% SOC_SVID_DAT_R
SOC_SVID_DAT_R 88
+1.05V_VCCST
2
SVID ALERT RC146

56_0402_5%
1
SOC_SVID_ALERT# RC3863 1 Rshort@ 2 0_0402_5% SOC_SVID_ALERT#_R

SOC_SVID_ALERT#_R 88
SVID CLOCK
A SOC_SVID_CLK SOC_SVID_CLK_R A
RC3864 1 Rshort@ 2 0_0402_5% SOC_SVID_CLK_R 88
Add for RF Request _20190807
2
RF@ CC3911
15P_0201_50V8J
1
ICL-U(9/13)Power, SVID
5 4 3 2 1
5 4
+1.2V_VDDQ +1.2V_VDDQ
UC1M
+1.05VS_VCCSTG_OUT_FUSE
AA37 CPU POWER 2 OF 3 BP39
AG36 VDDQ_1 VDDQ_31 BR37
AJ36 VDDQ_2 VDDQ_32 BT38
AL36 VDDQ_3 VDDQ_33 AC35
AL49 VDDQ_4 VDDQ_34 BU37 +1.05VS_VCCSTG_OUT_LGC +1.05VS_VCCSTG_OUT_LGC_TERM
1U_0201_10V6M
AN36 VDDQ_5 VDDQ_35 BU49
CC267
VDDQ_6 VDDQ_36 1
AP37 CA39 @
AR36 VDDQ_7 VDDQ_37 CB49 RC223 1 Rshort@ 2 0_0402_5%
VDDQ_8 VDDQ_38
EMC CAPS-PLACE AR37
AT36 VDDQ_9 VDDQ_39
L38
L49 2
< 4mm from SOC VDDQ AT49
AA49
VDDQ_10
VDDQ_11
VDDQ_40
VDDQ_41
N36
T49
with each pair < 12mm Apart +1.2V_VDDQ +1.2V_VDDQ +1.2V_VDDQ AV36
AW 37
VDDQ_12
VDDQ_13
VDDQ_42
VDDQ_43
AC37
AD35
D 12pF* 3 (EMI@) AY36 VDDQ_14
VDDQ_15
VDDQ_44
VDDQ_45
AD36 D
BA37 AE36
2.2pF* 3 (EMI@) BA49 VDDQ_16
VDDQ_17
VDDQ_46
VDDQ_47
AF49
BB36
1 1 1 1 1 1 VDDQ_18
BD36 C33
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
2.2P_0201_50V8C
2.2P_0201_50V8C
2.2P_0201_50V8C
BE37 VDDQ_19 RSVD_78
EMI@ CC218
EMI@ CC219
EMI@ CC220
EMI@ CC221
EMI@ CC222
EMI@ CC223
BF36 VDDQ_20 A33
2 2 2 2 2 2 BF37 VDDQ_21 RSVD_2 B33 +1.8V_PRIM
AB36 VDDQ_22 RSVD_3
BF49 VDDQ_23 BG9
BG36 VDDQ_24 VCC1P8A_1 BJ9 Imax : 0.7 A
BJ36 VDDQ_25 VCC1P8A_2 BM9
BL37 VDDQ_26 VCC1P8A_3 BW1 +1.05VS_VCCSTG_OUT_FUSE
BM49 VDDQ_27 VCC1P8A_4 BW2
BN37 VDDQ_28 VCC1P8A_5
BP38 VDDQ_29 R35
+1.05V_VCCST VDDQ_30 VCCSTG_OUT_3 V34
CB1 VCCSTG_OUT_4 T34
+1.05VS_VCCSTG VCCST VCCSTG_OUT_5 U35 +1.8V_PRIM +1.05VO_VCCPLL +1.05VS_VCCSTG
BY1 VCCSTG_OUT_6 AB34 +1.05VO_VCCPLL
VCCSTG VCCSTG_OUT_7 W 35
+1.05VS_VCCSTG_OUT_FUSE RSVD_74 AA35
@RF@
@RF@
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
82P_0201_50V8J
2.2P_0201_50V8C
RSVD_75 Y34
CC270
CC273
CC272
CC275
10U_0402_6.3V6M
22U_0603_6.3V6K
CC4004
CC3919
RSVD_76 1 1 1 1 1 1 1 1
F33 +1.2V_VCCPLL_OC @ @
+1.05VS_VCCSTG_OUT_LGC G33 VCCSTG_OUT_1
CC207
CC208
VCCSTG_OUT_2 CD2
E5 VCCPLL 2 2 2 2 2 2 2 2
VCCSTG_OUT_LGC CG38 +1.05V_VCCIO_OUT
VCCPLL_OC_1 CG41
VCCPLL_OC_2 CG42
VCCPLL_OC_3 CG49
VCCPLL_OC_4
AD7
13 of 19 VCCIO_OUT
ICL-U_BGA1526 +1.2V_VCCPLL_OC +1.05V_VCCST
@
@RF@
@RF@
1U_0201_10V6M
1U_0201_10V6M
15P_0201_50V8J
82P_0201_50V8J
CC271
CC274
CC4006
CC4007
1 1 1 1
@
@RF@
@RF@
68P_0201_25V8J
1U_0201_10V6M
1U_0201_10V6M
2.2P_0201_50V8C
CC278
CC276
CC3990
CC4005
1 1 1 1
@
C 2 2 2 2 C
2 2 2 2
Add for RF Request _20190807 Add for RF Request _20190807
+1.05VO_OUT_FET
VCCST +1.8V_PRIM_SOC Imax : 0.7 A
Imax : 0.445 A
1U_0201_6.3V6M
1 UC13 DB@
CC314
For Power consumption UC9 +1.05V_VCCST 1

VIN1
Measurement 1 2 VIN2
2 2 VIN1
CC315 +5VALW VIN2 7 VIN thermal VOUT 6
0.1U_0201_10V6K 7 6
VIN thermal VOUT 3 VBIAS
2 1 3 Imax : 0.445 A
VBIAS 1 4 5
CC316 ON GND
VCCST_EN_LS 1 Rshort@ 2 VCCST_EN_LS_R 4 5
11 VCCST_EN_LS 0.1U_0201_10V6K
RC412 ON GND
0_0201_5% 2 EM5201V_DFN8_3X3
1U_0201_6.3V6M
1
EM5201V_DFN8_3X3
CC317
@ +3V_PRIM I (Max) : 0.7 A(+1.8V_PRIM_SOC)

2
I (Max) : 0.455 A(+1.05V_VCCST) RDS(Typ) : 3.5 mohm
V drop : 0.0024V
RDS(Typ) : 3.5 mohm 1
V drop : 0.0016V CC45
0.1U_0201_10V6K
SUSP# RC4055 1 @ 2 0_0402_5% @
+1.05VO_OUT_FET 58,78,86 SUSP# 2
5
PM_SLP_S3# RC1841 @ 2 0_0402_5%
B
VCCSTG 11,58 PM_SLP_S3#
1 Refer B
B 4 VCCSTG_EN_LS
575034_ICL_U42_DDR4_T3_6L_Core_Schematics_Rev0p7.pdf
G P
+1.05V_VCCST PM_SLP_S0# RC1851 @ 2 0_0402_5% 2 Y
11 PM_SLP_S0# A
Imax : 0.119 A
1U_0201_6.3V6M
1
RC413 1 @ 2 0_0402_5% @UC7 Place on CPU Side
CC46
3
For Power consumption UC8 CPU_C10_GATE# 1 @ 2 0_0402_5% 74AHC1G08GW_SOT353-5
11 CPU_C10_GATE#
Measurement
2
1
2 VIN1 +1.05VS_VCCSTG
RC186
22uF* 2 + 22uF* 1 (Reserved)
+5VALW VIN2
CC47 7 6 +1.05VS_VCCSTG_P
0.1U_0201_16V6K VIN thermal VOUT RC6188 1 2 0_0201_5% +1.2V_VDDQ
2 1 3 Imax : 0.119 A
VBIAS 1
CC48
VCCSTG_EN_LS VCCSTG_EN_LS_R 4
1 Rshort@ 2 5 0.1U_0201_10V6K Follow DIS _20190807
ON GND
RC188
0_0201_5% 2
22U_0603_6.3V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1 1 1 1
EM5201V_DFN8_3X3
CC189
CC190
CC191
CC49
@
@
2 I (Max) : 0.119 A(+1.05VS_VCCSTG) 2 2 2
RDS(Typ) : 3.5 mohm
V drop : 0.0004V
CPU_C10_GATE# stable to +1.05VS_VCCSTG <= 65us (tCPU26)
Place on opposite of CPU Side

+1.2V_VDDQ TO +1.2V_VCCPLL_OC 1uF* 8
10uF* 2
+1.2V_VDDQ +1.2V_VDDQ
For NON-S0IX
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
+1.2V_VDDQ +1.2V_VCCPLL_OC
CC290
CC291
CC292
CC293
CC294
CC295
CC296
CC297
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1
CC235
CC236
A RC254 1 @ 2 0_0402_5% A
Imax : 0.152 A 2 2 2 2 2 2 2 2 2 2
I (Max) : 0.152 A(+1.2V_VCCPLL_OC)

RDS(Typ) : 3.5 mohm
V drop : 0.0005V Securiiity Clllassiiifiiicatiiion Compalll Secret Data Compal Electronics, Inc.
ICL-U(10/13)Power
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...
LA-J951P 0..1

5 4 3 2 1
5 4
+3VALW +3VALW_DSW FIVR Decoupling Caps -PLACE

RC390 1 @ 2
0_0402_5%
+3V_PRIM +3V_PRIM_SOC +1.8V_PRIM +1.8V_VCCA_CLKLDO < 5mm from SOC VCCIN_AUX
@ L15 1 @ 2
DV12 2 1 RC242 1 Rshort@ 2 0.68UH_UHP252012NF-R68M_3A_20%-X
0_0402_5% SH000010700 +VCCIN_AUX
RB751S40T1G_SOD523-2
1U_0201_10V6M
RC246 1 @ 2
CC298
20_0402_5%1
+3V_PRIM +3V_PRIM_MCP 0_0402_5% 1 1 1 1 1 1 1
@RF@ @RF@ @RF@ @RF@ @RF@ @RF@
Rshort@
RC6182 1 Rshort@ 2 CC3878 CC3879 CC3880 CC3887 CC3888 CC3889
RC248
0_0402_5% @
2 2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J2 15P_0201_50V8J 2 15P_0201_50V8J 2 15P_0201_50V8J
D D
CC246 +VCCIN_AUX
+3VALW TO +3V_PRIM 2
47U_0603_2.5V7
1354mA
+3VALW +3V_PRIM
1 1 1
JHW 10 CC3890 CC3891 CC3892
1 2 100P_0201_50V8J 12P_0201_50V8J 0.1U_0201_10V6K
1 2
JUMP@ @RF@ @RF@ @RF@
JUMP_43X79 2 2 2
1
CC106
4.7U_0402_6.3V6M 26000 mA 202 mA (Include UC1.DC33) Add for RF Request _20190807
+VCCIN_AUX UC1N +3V_PRIM_SOC
2
AH1 CPU POWER 3 OF 3 DF23 +VCCIN_AUX
VCCIN_AUX_1 VCCPRIM_3P3_2
AW 10 DG26
AY11 DG28
AY9
VCCIN_AUX_4
1300 mA (Include UC1.DD35)
BA10 +1.8V_PRIM 1 1 1 1 1 1
VCCIN_AUX_5
BB9
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
VCCIN_AUX_6
@RF@ CC4014
@RF@ CC4015
@RF@ CC4016
@RF@ CC4017
@RF@ CC4018
@RF@ CC4019
CH1 DF15
CK11 DF17
VCCIN_AUX_8 VCCPRIM_1P8_3 2 2 2 2 2 2
CL10 DF18
CM11 DF20
CN1 DG17
AJ1 DG18
CN10 DG20
CP11 DF34
CR10
VCCIN_AUX_15 Add for RF Request _20190807_pwr
CT11
C VCCIN_AUX_16 C
CU10
VCCIN_AUX_17 +0.85VO_VCCLDOSTD
CV1
VCCIN_AUX_18
CV11
VCCIN_AUX_19
165 mA
CW 10 DW 37 +1.8V_VCCA_CLKLDO
VCCIN_AUX_20 VCCLDOSTD_0P85
CY11 +1.24VO_VCCDPHY
VCCIN_AUX_21 +1.05VO_VCCDSW
DC1 DW 15
VCCIN_AUX_22 VCCA_CLKLDO_1P8
AL1
VCCIN_AUX_23
P13 DW 32
VCCIN_AUX_24 VCCDPHY_1P24 +1.05VO_OUT_FET
R12
VCCIN_AUX_25
T13 DD34
VCCIN_AUX_26 VCCDSW _1P05
U12
For NON-S0IX VCCIN_AUX_27 +1.05VO_VCCPLL
DC11 BY2
VCCIN_AUX_28 VCC1P05_1
DE12 CB2
500 mA 500 mA DF12
CC1 +1.05VO_OUT_PCH
AM1
+3V_PRIM_SOC VCCIN_AUX_31
AN1 CD1
VCCIN_AUX_32 VCCPLL
AT11
100K_0402_5
100K_0402_5
VCCIN_AUX_33
1
AT9 DG31
+1.8V_PRIM VCCIN_AUX_34 VCCPRIM_1P05_1
AU10
VCCIN_AUX_35
@ @ DG29 2mA
R3054
R3053
AV9
VCCIN_AUX_36 VCCPRIM_1P05_2 +3VL_RTC
%
91 BF9 DF29
VCCIN_AUX_VCCSENSE VCCIN_AUX_VCCSENSE VCCPRIM_1P05_3
2
91 BD9
VCCIN_AUX_VSSSENSE VCCIN_AUX_VSSSENSE
3 mA VCCPRIM_1P05_4
DF31 4 mA
+3V_PRIM_SOC +3VALW_DSW
+1.05VO_EXTBYPASS VCCRTC
DG33 5mA
DJ15 +3V_PRIM_MCP
VCC_V1P05EXT_1P05 DE31
+1.05VO_VNNBYPASS CY34 VCCDSW _3P3
VCC_VNNEXT_1P05 DF26
DC33 VCCPGPPR
VCCPRIM_3P3_1 CL38 VCCIN_AUX_CORE_VID0 RC2161 Rshort@ 2 0_0402_5%
GPP_B0/CORE_VID0 VCCIN_AUX_CORE_VID0_R 11,91
DD35 CJ38 VCCIN_AUX_CORE_VID1 RC2171 Rshort@ 2 0_0402_5%
VCCPRIM_1P8_1 GPP_B1/CORE_VID1 VCCIN_AUX_CORE_VID1_R 11,91
CN38 VCCIN_AUX_CORE_ALERT# RC2181 Rshort@ 2 0_0402_5%
GPP_B2/VRALERT# VCCIN_AUX_CORE_ALERT#_R 7
DB34
B VCCSPI B
NOTE: 14 of 19
Need to follow SPI ROM Voltage ICL-U_BGA1526
@ NOTE: +3V_PRIM
572631_ICL_PCH_LP_EDS_Vol_1_Rev_1p0
VCCPGPPR: Audio Power 3.3V, 1.8V, or 1.5V
Need to sync with codec VDDIO. VCCIN_AUX_CORE_VID0_R RC5121 2 100K_0402_5%
VCCIN_AUX_CORE_VID1_R RC5131
572907_ICL_UY_PDG_Rev1p1 2 100K_0402_5%
When configured as 3.3V or 1.8V, VCCPGPPR can be merged directly with either
VCCPRIM_1P8 or VCCPRIM_3P3 depending on their operating voltage.
+1.8V_PRIM +3V_PRIM_SOC +1.24VO_VCCDPHY

RTC Battery
+3VALW_DSW +1.05VO_VCCDSW +0.85VO_VCCLDOSTD MAX. 8000mil
0.1U_0201_10V6
CC301
1 1
1U_0201_10V6M
1 1
4.7U_0402_6.3V6
1 1 1
1U_0201_10V6M
@ @ +3V_LID +3VL_RTC
CC254
CC252
CC299 CC249
@CC3865 @
CC304
1U_0201_10V6M 2.2U_0201_6.3V6M
1U_0201_10V6M 2 2
2 2 2 2 2 DC1 Delete RTC connector
2
K
RC462 1 Rshort@ 2 0_0402_5%

15mils1
15mils
M
2 3
+3VL
2
@ CC3868 BAV70W 3P C/C_SOT-323
A CC324 1U_0201_6.3V6K A
0.1U_0201_10V6K 1 CC7 Close UC1.BR23
1

ICL-U(11/13)Power

5 4 3 2 1
5 4
3 2 1
UC1O UC1P UC1Q

GND 1 OF 3 GND 2 OF 3 DJ33 GND 3 OF 3 F11
A11 AF45 BT3 CR37 DJ36 VSS_297 VSS_362 F31
A46 VSS_1 VSS_75 AF47 BT39 VSS_149 VSS_223 CR45 DJ42 VSS_298 VSS_363 F45
BA45 VSS_2 VSS_76 AG1 BT41 VSS_150 VSS_224 CR49 DK3 VSS_299 VSS_364 F47
BA47 VSS_3 VSS_77 AG11 BT42 VSS_151 VSS_225 CT37 DK4 VSS_300 VSS_365 F8
BB11 VSS_4 VSS_78 AG3 BT43 VSS_152 VSS_226 CT39 DK49 VSS_301 VSS_366 G21
BB3 VSS_5 VSS_79 AG38 BT7 VSS_153 VSS_227 CT42 DK6 VSS_302 VSS_367 G24
BB7 VSS_6 VSS_80 AG39 BU45 VSS_154 VSS_228 CT9 DK8 VSS_303 VSS_368 G3
BC37 VSS_7 VSS_81 AG41 BU47 VSS_155 VSS_229 CU45 DL10 VSS_304 VSS_369 G31
D D
BD3 VSS_8 VSS_82 A31 BV1 VSS_156 VSS_230 CU47 DL13 VSS_305 VSS_370 G36
BD38 VSS_9 VSS_83 AG42 BV11 VSS_157 VSS_231 CU49 DL44 VSS_306 VSS_371 G49
BD39 VSS_10 VSS_84 AG43 BV2 VSS_158 VSS_232 CV3 DL47 VSS_307 VSS_372 G5
BD41 VSS_11 VSS_85 AG5 BV3 VSS_159 VSS_233 CV34 DM47 VSS_308 VSS_373 H17
A48 VSS_12 VSS_86 AG9 BV7 VSS_160 VSS_234 CV35 DN15 VSS_309 VSS_374 H21
BD42 VSS_13 VSS_87 AH2 BW3 VSS_161 VSS_235 CV5 DN19 VSS_310 VSS_375 H24
BD43 VSS_14 VSS_88 AH37 BW37 VSS_162 VSS_236 CV9 DN24 VSS_311 VSS_376 H31
BD45 VSS_15 VSS_89 AH45 BW5 VSS_163 VSS_237 CY41 DN31 VSS_312 VSS_377 H33
BD49 VSS_16 VSS_90 AH49 BW6 VSS_164 VSS_238 CY45 DN36 VSS_313 VSS_378 H36
BD5 VSS_17 VSS_91 AJ2 BW7 VSS_165 VSS_239 CY49 DN42 VSS_314 VSS_379 H45
BD6 VSS_18 VSS_92 AJ3 BY37 VSS_166 VSS_240 CY9 DP45 VSS_315 VSS_380 H49
BD7 VSS_19 VSS_93 A34 BY45 VSS_167 VSS_241 D13 DR49 VSS_316 VSS_381 J10
BE1 VSS_20 VSS_94 AK37 BY49 VSS_168 VSS_242 D17 DT1 VSS_317 VSS_382 J13
BE2 VSS_21 VSS_95 AL2 C11 VSS_169 VSS_243 D31 DT10 VSS_318 VSS_383 J16
BF3 VSS_22 VSS_96 AL45 C13 VSS_170 VSS_244 D44 DT15 VSS_319 VSS_384 J36
A49 VSS_23 VSS_97 AL47 C14 VSS_171 VSS_245 D49 DT20 VSS_320 VSS_385 J6
BF45 VSS_24 VSS_98 AL6 C17 VSS_172 VSS_246 DA10 DT27 VSS_321 VSS_386 K11
BF47 VSS_25 VSS_99 AM2 C21 VSS_173 VSS_247 DA33 DT3 VSS_322 VSS_387 K33
BF7 VSS_26 VSS_100 AM37 C24 VSS_174 VSS_248 DA9 DT32 VSS_323 VSS_388 K8
BG3 VSS_27 VSS_101 AN2 C31 VSS_175 VSS_249 DB32 DT37 VSS_324 VSS_389 L36
BH37 VSS_30 VSS_104 A36 C48 VSS_178 VSS_252 DB45 DT6 VSS_327 VSS_392 L42
BJ1 VSS_31 VSS_105 AN41 C49 VSS_179 VSS_253 DB47 DT7 VSS_328 VSS_393 L43
BJ2 VSS_32 VSS_106 AN42 C6 VSS_180 VSS_254 DB49 DT8 VSS_329 VSS_394 L45
BJ3 VSS_33 VSS_107 AN43 CA3 VSS_181 VSS_255 DC3 DU1 VSS_330 VSS_395 L47
AA45 VSS_34 VSS_108 AN45 CA38 VSS_182 VSS_256 DC49 DU10 VSS_331 VSS_396 M10
BJ41 VSS_35 VSS_109 AN49 CA41 VSS_183 VSS_257 DC5 DU15 VSS_332 VSS_397 M3
C BJ43 VSS_36 VSS_110 AN6 CA42 VSS_184 VSS_258 DC6 DU2 VSS_333 VSS_398 M36 C
BJ45 VSS_37 VSS_111 AR1 CA43 VSS_185 VSS_259 DD37 DU20 VSS_334 VSS_399 M5
BJ49 VSS_38 VSS_112 AR11 CA7 VSS_186 VSS_260 DD42 DU27 VSS_335 VSS_400 N45
BJ7 VSS_39 VSS_113 AR2 CB37 VSS_187 VSS_261 DE10 DU32 VSS_336 VSS_401 N49
BM11 VSS_40 VSS_114 AR3 CB45 VSS_188 VSS_262 DE13 DU37 VSS_337 VSS_402 P11
BM3 VSS_41 VSS_115 A39 CB47 VSS_189 VSS_263 DE17 DU48 VSS_338 VSS_403 P41
BM45 VSS_42 VSS_116 AR7 CC3 VSS_190 VSS_264 DE18 DU49 VSS_339 VSS_404 P8
BM47 VSS_43 VSS_117 AR9 CC7 VSS_191 VSS_265 DE20 DU7 VSS_340 VSS_405 R3
BM5 VSS_44 VSS_118 AT3 CE37 VSS_192 VSS_266 DE22 DV2 VSS_341 VSS_406 R37
AA47 VSS_45 VSS_119 AT45 CE45 VSS_193 VSS_267 DE23 DV44 VSS_342 VSS_407 T11
BM6 VSS_46 VSS_120 AT47 CE49 VSS_194 VSS_268 DE26 DV48 VSS_343 VSS_408 T36
BM7 VSS_47 VSS_121 AT5 CE9 VSS_195 VSS_269 DE28 DV8 VSS_344 VSS_409 T41
BP1 VSS_48 VSS_122 AT6 CG37 VSS_196 VSS_270 DE29 DW1 VSS_345 VSS_410 T43
BP2 VSS_49 VSS_123 AT7 CG39 VSS_197 VSS_271 DE33 DW10 VSS_346 VSS_411 T45
VSS_50 VSS_124 AU37 CG43 VSS_198 VSS_272 DE45 DW2 VSS_347 VSS_412 T47
BP3
BP43 VSS_51 VSS_125 AV11 CG45 VSS_199 VSS_273 DE6 DW20 VSS_348 VSS_413 U3
BP7 VSS_52 VSS_126 A42 CG47 VSS_200 VSS_274 DF13 DW27 VSS_349 VSS_414 U37
BR45 VSS_53 VSS_127 AV3 CG9 VSS_201 VSS_275 DF22 DW44 VSS_350 VSS_415 U5
BR49 VSS_54 VSS_128 AV38 CH3 VSS_202 VSS_276 DF28 DW46 VSS_351 VSS_416 V11
AB11 VSS_55 VSS_129 AV39 CH5 VSS_203 VSS_277 DF33 DW48 VSS_352 VSS_417 V36
AB3 VSS_56 VSS_130 AV41 CJ37 VSS_204 VSS_278 DF35 DW49 VSS_353 VSS_418 V45
AB38 VSS_57 VSS_131 AV42 CJ42 VSS_205 VSS_279 DF39 DW7 VSS_354 VSS_419 V49
AB39 VSS_58 VSS_132 AV43 CJ9 VSS_206 VSS_280 DG10 E11 VSS_355 VSS_420 V9
AB41 VSS_59 VSS_133 AV45 CK45 VSS_207 VSS_281 DG12 E34 VSS_356 VSS_421 W37
A17 VSS_60 VSS_134 AV49 CK49 VSS_208 VSS_282 DG13 E36 VSS_357 VSS_422 Y36
AB42 VSS_61 VSS_135 AV7 CK9 VSS_209 VSS_283 DG15 E39 VSS_358 VSS_423 Y38
AB43 VSS_62 VSS_136 AY3 CL37 VSS_210 VSS_284 DG22 E42 VSS_359 VSS_424 Y43
AB5 VSS_63 VSS_137 A44 CL42 VSS_211 VSS_285 DG23 E6 VSS_360 VSS_425 Y9
AB6 VSS_64 VSS_138 AY7 CL49 VSS_212 VSS_286 DG47 VSS_361 VSS_426 DE15
B AC45 VSS_65 VSS_139 B17 CM45 VSS_213 VSS_287 DG6 VSS_427 B
AC49 VSS_66 VSS_140 B2 CM47 VSS_214 VSS_288 DH1 17 of 19
AD10 VSS_67 VSS_141 B21 CM9 VSS_215 VSS_289 DH3 ICL-U_BGA1526
AD11 VSS_68 VSS_142 B24 CN3 VSS_216 VSS_290 DH45
VSS_69 VSS_143 B3 @
AD34 CN37 VSS_217 VSS_291 DH5
AD37 VSS_70 VSS_144 B31 CN39 VSS_218 VSS_292 DJ19
A3 VSS_71 VSS_145 B48 CN5 VSS_219 VSS_293 DJ21
AE6 VSS_72 VSS_146 BA1 CP9 VSS_220 VSS_294 DJ27
AF37 VSS_73 VSS_147 BA2 CR32 VSS_221 VSS_295 DJ31
VSS_74 VSS_148 VSS_222 VSS_296
15 of 19 16 of 19
ICL-U_BGA1526 ICL-U_BGA1526
@ @
A A

ICL-U(12/13)GND
5 4 3 2 1
5 4
3 2 1
UC1S
CFG0 AG6 RESERVED SIGNALS A47 1

CFG_0 RSVD_TP_1 TP@ T257
CFG1 AE7 B47 1
CFG_1 RSVD_TP_2 TP@ T258
1 CFG2 AG7
T2417TP@ CFG_2
1 CFG3 AD9 C1 1
+1.05V_VCCIO_OUT T2418TP@ CFG_3 RSVD_57 TP@ T259
CFG4 AE9 E1 1
CFG_4 RSVD_58 TP@ T260
T2419TP@ 1 CFG5 AB9
1 CFG6 CFG_5 1
T2420TP@ AJ6 CT32 TP@ T261
1 CFG7 CFG_6 RSVD_TP_10 1
T2421TP@ AB7 CV32 TP@ T262
RC6172 1 2 100_0402_5% CFG0 CFG8 CFG_7 RSVD_TP_11
V10
RC6173 1 2 100_0402_5% CFG1 CFG9 CFG_8 G15
AJ5
RC6175 1 2 100_0402_5% CFG8 CFG10 CFG_9 RSVD_79 F15
Y10
RC6176 1 2 100_0402_5% CFG9 1 CFG11 CFG_10 RSVD_80
D T2424TP@ AJ7 D
RC6177 1 2 100_0402_5% CFG10 CFG12 CFG_11 BW 11 1
AB10 TP@ T265
RC6178 1 2 100_0402_5% CFG12 CFG13 CFG_12 RSVD_TP_5 CA11 1
AL7 TP@ T266
RC6179 1 2 100_0402_5% CFG13 1 CFG14 CFG_13 RSVD_TP_6
T2422TP@ AL9
1 CFG15 CFG_14
T2423TP@ AJ9 C16
CFG_15 VSS_428
A16
CFG16 V6 VSS_429
1 CFG17 V7 CFG_16 C2
T2425TP@ CFG_17 RSVD_55 A4
CFG18 Y6 RSVD_56
1 CFG19 Y7 CFG_18 DP5
T2426TP@ CFG_19 RSVD_65 DR5
CFG_RCOMP AD6 RSVD_66
CFG_RCOMP D14
RSVD_59 E16
1
1 BPM#0 T9
T494 TP@ BPM#0 RSVD_60
RC210 1 BPM#1 T7
T495 TP@ BPM#1
49.9_0402_1% 1 BPM#2 T10 DV6
T291 TP@ BPM#2 RSVD_TP_13
RC207 1 2 1K_0201_5% CFG4 1 BPM#3 T6 DW6 Remove T267/T268 fot layout(UMA) _2019/08/22
T290 TP@ BPM#3 RSVD_TP_14
2
RC208 1 2 51_0402_5% CFG16 BJ11 DP2 1
RSVD_62 RSVD_TP_24 TP@ T269
RVP To MIPI60 BL10 DP1 1
TP@ T270
RC209 1 2 51_0402_5% CFG18 RSVD_63 RSVD_TP_25
T282 TP@ 1 AV1 DW4
RSVD_TP_17 RSVD_TP_15
RSVD_TP_16
DV4 Remove T271/T272 fot layout(UMA) _2019/08/22
1 AT2
T283 TP@
CFG4 1 AT1 RSVD_TP_18 CM33 1
T284 TP@ TP@ T273
Display port presence strap 1 AU1 RSVD_TP_20 TP_3 DB10 1
T285 TP@ TP_4 TP@ T274
0 : Enable 1 AU2 RSVD_TP_19
T286 TP@ RSVD_TP_21
An external display port device is connected to R1 1 TP@ T277
C 1 AV2 RSVD_TP_12 C
the embedded displayport T287 TP@ RSVD_TP_22 DW 3
1 : Disable RSVD_TP_7 DV3
No physical display port attached to embedded display port DP3
RSVD_TP_8 Remove T275/T276 fot layout(UMA) _2019/08/22
DT2 RSVD_67
RSVD_68 1
DH49 TP@ T278
RSVD_TP_9
AR10
RSVD_69 1
AP10 DL8 TP@ T279
RSVD_71 RSVD_TP_23
BP36
RSVD_70 DW47 1
BM36 TP_1 TP@ T280
RSVD_72 DV47 1
TP_2 TP@ T281
J15 DU47
K15 VSS_430 VSS_432
VSS_431
P10 1 TP@ T263
1SKTOCC# RSVD_TP_26
T288 TP@ C5
SKTOCC#
1PROC_SELECT# D4
T289 TP@ RSVD_77
A5
RSVD_64 19 of 19
ICL-U_BGA1526
@
UC1R
1 N34 DA11 1
T451 TP@ RSVD_TP_28 RSVD_TP_35 TP@ T264
1 AK10 RESERVED SIGNALS CL32 1
T452 TP@ RSVD_TP_29 RSVD_TP_36 TP@ T449
BT36 CN32 1 TP@ T450
1 RSVD_7 RSVD_TP_37
T453 TP@ AH10 CY35
1 RSVD_TP_30 RSVD_32
T454 TP@ BC10 DB37
1 RSVD_TP_31 RSVD_33
T455 TP@ CH33 DF37
RSVD_TP_32 RSVD_34
CJ32 BF11 1
RSVD_12 IST_TP_0 TP@ T245
T456 TP@ 1 AM10 BD11 1 TP@ T246
B 1 RSVD_TP_33 IST_TP_1 1 B
T457 TP@ BH10 BE10 TP@ T247
1 RSVD_TP_34 IST_TRIG_0 1
T458 TP@ J34 BF10 TP@ T248
RSVD_TP_27 IST_TRIG_1
Y11 CW33 1
RSVD_9 PCH_IST_TP_0 TP@ T249
L34 CY32 1
RSVD_10 PCH_IST_TP_1 TP@ T250
AJ11 CY37
RSVD_17 RSVD_27
CG32 CV37
RSVD_21 RSVD_28
CK33
BP41 RSVD_22 G34
RSVD_20 RSVD_35
AL11 H34
RSVD_23 RSVD_46
BG11 DJ34
RSVD_24 RSVD_48
AN11 DK31
RSVD_16 RSVD_49
M13 DK15
RSVD_18 RSVD_50
M34 CP3
RSVD_19 RSVD_51
CP5
RSVD_52
AN9
RSVD_53
AN7
RSVD_54
AF10
DU42 RSVD_36
AE11
DW42 RSVD_42 RSVD_37
H5
D33 RSVD_43 RSVD_38
D1
L13 RSVD_44 RSVD_39
DJ40
K13 RSVD_45 RSVD_40
DK40
RSVD_47 RSVD_41
A A
ICL-U_BGA1526
@

ICL-U(13/13)RSVD,CFG
5 4 3 2 1
5 4
CHANNEL-M0 REVERSE TYPE

DDR_M0_CLK0 137
JDIMM1A
STD DDR_M0_D61
8
8 DDR_M0_CLK0 DDR_M0_CLK#0 139 CK0(T) DQ0 7 DDR_M0_D58
8 DDR_M0_CLK#0
Non-Interleaved Memory
DDR_M0_CLK1 138 CK0#(C) DQ1 20 DDR_M0_D56
8 DDR_M0_CLK1 DDR_M0_CLK#1 140 CK1(T) DQ2 21 DDR_M0_D59
8 DDR_M0_CLK#1 CK1#(C) DQ3 DDR_M0_D60
4
DQ4
TOP: JDIMM1 CONN Non-ECC DIMM
DDR_M0_CKE0 109 3 DDR_M0_D62
8 DDR_M0_CKE0 DDR_M0_CKE1 110 CKE0 DQ5 DDR_M0_D63
16
8 DDR_M0_CKE1 CKE1 DQ6 17 DDR_M0_D57
8 DDR_M0_D[0..15] DDR_M0_CS#0 DQ7
DDR_M0_CS#1
149 13 DDR_M0_DQS7
8 DDR_M0_CS#0 157 S0# DQS0(T) 11 DDR_M0_DQS#7 DDR_M0_DQS7 8
8 DDR_M0_D[16..31] DQS0#(C)
+3VS +3VS +3VS 8 DDR_M0_CS#1 162 S1# DDR_M0_DQS#7 8
28 DDR_M0_D44 165 S2#/C0
8 DDR_M0_D[32..47] DQ8 29 DDR_M0_D42 S3#/C1
DDR_M0_ODT0 DQ9 41 DDR_M0_D45
1
1
D 155 D
8 DDR_M0_D[48..63] 8 DDR_M0_ODT0 DDR_M0_ODT1 DQ10 42 DDR_M0_D47
RD1 RD2 RD3 161 ODT0
8 DDR_M0_ODT1 ODT1 DQ11 24 DDR_M0_D41
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5%
DDR_M0_BG0 115 DQ12 25 DDR_M0_D40
8 DDR_M0_BG0 DDR_M0_BG1 113 BG0 DQ13 38 DDR_M0_D46
JDIMM1B
8 DDR_M0_BG1
2
2
SA0_CHA_DIM 1 SA1_CHA_DIM 1 SA2_CHA_DIM1 STD DDR_M0_BA0 150 BG1 DQ14 37 DDR_M0_D43
111 141 8 DDR_M0_BA0 DDR_M0_BA1 145 BA0 DQ15 34 DDR_M0_DQS5
+1.2V_VDDQ 112 VDD1 VDD11 142
+1.2V_VDDQ 8 DDR_M0_BA1 BA1 DQS1(T) 32 DDR_M0_DQS#5 DDR_M0_DQS5 8
VDD2 VDD12 DQS1#(C) 8
1
1
117 147 DDR_M0_MA0 144 DDR_M0_DQS#5
VDD3 VDD13 8 DDR_M0_MA0 DDR_M0_MA1 133 A0 DDR_M0_D54
118 148 50
Rshort@
Rshort@
Rshort@
RD4 RD5 RD6 8 DDR_M0_MA1
123 VDD4 VDD14 153 DDR_M0_MA2 132 A1 DQ16 49 DDR_M0_D53
0_0402_5% 0_0402_5% 0_0402_5% VDD5 VDD15 8 DDR_M0_MA2 DDR_M0_MA3 DQ17 62 DDR_M0_D50
124 154 131 A2
129 VDD6 VDD16 159 8 DDR_M0_MA3 DDR_M0_MA4 128 A3 DQ18 63 DDR_M0_D48
VDD7 VDD17 DDR_M0_MA4 DDR_M0_MA5
2
2 130 160 8 126 A4 DQ19 46 DDR_M0_D55

VDD8 VDD18 DDR_M0_MA5 DDR_M0_MA6
135 163 8 127 A5 DQ20 45 DDR_M0_D51
VDD9 VDD19 8 DDR_M0_MA6 DDR_M0_MA7
+3V_PRIM_DA 136 122 A6 DQ21 58 DDR_M0_D52
VDD10 8 DDR_M0_MA7 DDR_M0_MA8 125 A7 DQ22 59 DDR_M0_D49
DDR_M0_MA8
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 255
VDDSPD VTT
258
+0.6V_0.6VS
8
8
DDR_M0_MA9
DDR_M0_MA9
DDR_M0_MA10
121 A8
146 A9
DQ23 55 DDR_M0_DQS6
DQS2(T) 53 DDR_M0_DQS#6 DDR_M0_DQS6 8
DDR_M0_MA10 DDR_M0_MA11 120 A10_AP DQS2#(C) DDR_M0_DQS#6 8
164 257 8
2.2U_0201_6.3V6M
0.1U_0201_10V6K
+0.6V_DDRA_VREFCA +2.5V DDR_M0_MA11
VREFCA VPP1 259 8 DDR_M0_MA12 119 A11 70 DDR_M0_D33
CD1
2 2 DDR_M0_MA12 DDR_M0_MA13 DQ24 71 DDR_M0_D38
+3V_PRIM +3V_PRIM_DA CD2 VPP2 8 158 A12
DDR_M0_MA13 DDR_M0_MA14_WE# 151 A13
SPD ADDRESS FOR CHANNEL A : 1@ 2
1
2 VSS
VSS
VSS
VSS
99
102 9/8 Modify8
8
8
DDR_M0_MA14_WE#
DDR_M0_MA15_CAS#
DDR_M0_MA15_CAS# 156 A14_WE#
DDR_M0_MA16_RAS# 152 A15_CAS#
DQ25 83
DQ26 84
DDR_M0_D35
DDR_M0_D32
WRITE ADDRESS: 0XA0

1 1 5 103 DQ27 66 DDR_M0_D39
RD32 0_0402_5% VSS VSS 8 DDR_M0_MA16_RAS# A16_RAS#
6 106 DQ28 67 DDR_M0_D37
VSS VSS DDR_M0_ACT#
READ ADDRESS: 0XA1 +3VS 9
10 VSS VSS
107
167 +1.2V_VDDQ 8 DDR_M0_ACT# 114
ACT#
DQ29
DQ30 8079
DDR_M0_D34
DDR_M0_D36
PLACE NEAR TO PIN VSS VSS DDR_M0_PAR
SA0 = 0; SA1 = 0; SA2 = 0. 1 Rshort@ 2 14 168 143 DQ31 76 DDR_M0_DQS4
VSS VSS 8 DDR_M0_PAR DDR_M0_ALERT# 116 PARITY DQS3(T) 74 DDR_M0_DQS#4 DDR_M0_DQS4 8
RD33 0_0402_5% 15 171 DDR_M0_ALERT# DDR_M0_DQS#4
VSS VSS 8 DIMM1_CHA_EVENT# 134 ALERT# DQS3#(C) 8
18 172 RD29 2 1
DDR4 POR OPERATING SPEED: 1867 MT/S 19
22
VSS
VSS
VSS
VSS
175
176
240_0402_1% 8,24 DDR_DRAMRST#_R
DDR_DRAMRST#_R 108 EVENT#
RESET# DQ32 173
174 DDR_M0_D19
DDR_M0_D23
STRETCH GOAL IS 2133 MT/S 23
26
VSS
VSS
VSS
VSS
180
181 SOC_SMBDATA 254
DQ33 187
DQ34 186
DDR_M0_D18
DDR_M0_D17
27 VSS VSS 184 9,24 SOC_SMBDATA SOC_SMBCLK 253 SDA DQ35 170 DDR_M0_D21
30 VSS VSS 185 9,24 SOC_SMBCLK SCL DQ36 169 DDR_M0_D22
31 VSS VSS 188 SA2_CHA_DIM1 166 DQ37 183 DDR_M0_D16
35 VSS VSS 189 SA1_CHA_DIM1 260 SA2 DQ38 182 DDR_M0_D20
36 VSS VSS 192 SA0_CHA_DIM1 256 SA1 DQ39 179 DDR_M0_DQS2
VSS VSS SA0 DQS4(T) 177 DDR_M0_DQS#2 DDR_M0_DQS2 8
39 193
40 VSS VSS 196 DQS4#(C) DDR_M0_DQS#2 8
C VSS VSS DDR_M0_D5 C
43 197 92 195
44 VSS VSS 201 91 CB0_NC DQ40 194 DDR_M0_D6
VSS VSS
+1.2V_VDDQ 51
52 VSS VSS
206
209 +1.2V_VDDQ
88 CB3_NC
87 CB4_NC
DQ43 191
DQ44 190
DDR_M0_D7
DDR_M0_D3 For ECC DIMM
DIMM Side CPU Side 57 VSS VSS 213 104 CB6_NC DQ46 204 DDR_M0_D4
60 VSS VSS 214 RD25 2 @ 1 240_0402_1% 97 CB7_NC DQ47 200 DDR_M0_DQS0
DQS5(T) DDR_M0_DQS0 8
61 VSS VSS 217 RD26 2 @ 1 240_0402_1% 95 DQS8(T) 198 DDR_M0_DQS#0
VSS VSS DQS8#(C) DQS5#(C) 8
2
64 218 DDR_M0_DQS#0
RD9 +0.6V_DDRA_VREFCA +0.6V_A_VREFCA 65 VSS VSS 222 +1.2V_VDDQ 216 DDR_M0_D26
68 VSS VSS 223 12 DQ48 215 DDR_M0_D28
1K_0402_1%
69 VSS VSS 226 33 DM0#/DBI0# DQ49 228 DDR_M0_D29
72 VSS VSS 227 54 DM1#/DBI1# DQ50 229 DDR_M0_D31
VSS VSS
1
73 230 75 DM2#/DBI2# DQ51 211 DDR_M0_D25

VSS VSS 178 DM3#/DBI3# DQ52 212 DDR_M0_D24
1 RD10 2
VREF traces should be at least 20 mils 77
78 VSS VSS
231
234 199 DM4#/DBI4# DQ53 224 DDR_M0_D27
2_0402_1% wide with 20 mils spacing to other 81
82
VSS
VSS
VSS
VSS
235
238 DDR_DRAMRST#_R
220 DM5#/DBI5#
241 DM6#/DBI6#
DQ54 225 DDR_M0_D30
DQ55 221 DDR_M0_DQS3
1
signals 85 VSS VSS 239 96 DM7#/DBI7# DQS6(T) 219 DDR_M0_DQS#3 DDR_M0_DQS3 8
VSS VSS DM8#/DBI8# DQS6#(C) 8
2
CD5 86 243 DDR_M0_DQS#3

RD11 0.022U_0201_25V6K 89 VSS VSS 244
VSS VSS 2
1K_0402_1% 2 90 247 CD3
93 VSS VSS 248 237 DDR_M0_D12
VSS VSS 0.1U_0201_10V6K DQ56 236 DDR_M0_D10
2
94 251 @ESD@
1
RD12 98 VSS VSS 252 1 DQ57 249 DDR_M0_D14

VSS VSS DQ58 250 DDR_M0_D13
24.9_0402_1% Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_Rev1P0 DQ59 232 DDR_M0_D8
262 261
GND GND DQ60 233 DDR_M0_D9
DQ61 245 DDR_M0_D15
1
FOX_AS0A827-H2RB-7H DQ62 246 DDR_M0_D11

PLACE NEAR TO SODIMM DQ63 242 DDR_M0_DQS1
DQS7(T) 240 DDR_M0_DQS#1 DDR_M0_DQS1 8
CONN@ DQS7#(C) DDR_M0_DQS#1 8
FOX_AS0A827-H2RB-7H
CONN@
+1.2V_VDDQ
B
Decopling Cap._Channel A B
@EMI@ CD43
@EMI@ CD44
@EMI@ CD45
@EMI@ CD46
Layout Note: Layout Note: Layout Note:
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
2 2 2 2
Place near JDIMM2.257,259 Place near JDIMM2.258 PLACE THE CAP near JDIMM2. 164
1 1 1 1
2.2uF *1
+2.5V 10uF *1 +0.6V_0.6VS 10uF *1 +0.6V_DDRA_VREFCA
0.1uF *1
1uF *1 1uF *2 Follow Intel RVP
2 2
@
10U_0402_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
68P_0201_25V8J
0.1U_0201_10V6K
68P_0201_25V8J
0.1U_0201_10V6K
1 1 1 1 1 1 1 1 1
CD24
CC4020 @RF@
CC4021 @RF@
CC4022 @RF@
CC4023 @RF@
CD25
CD47
CD48
CD49
CD51
CD52
0.1U_0201_10V6K 2.2U_0201_6.3V6M
1 1
2 2 2 2 2 2 2 2 2
EMC CAPS-PLACE
< 4mm from SO-DIMM VDDQ
with each pair < 12mm Apart
12pF* 5 (EMI@)
2.2pF* 5 (EMI@)
Layout Note: +1.2V_VDDQ +1.2V_VDDQ +1.2V_VDDQ +1.2V_VDDQ +1.2V_VDDQ

Place near JDIMM2
1 1 1 1 1 1 1 1 1 1
follow RVP 1p0 12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
12P_0201_50V8J
2.2P_0201_50V8C
2.2P_0201_50V8C
2.2P_0201_50V8C
2.2P_0201_50V8C
2.2P_0201_50V8C
EMI@ CD3845
EMI@ CD3853
EMI@ CD3854
EMI@ CD3851
EMI@ CD3852
EMI@ CD3846
EMI@ CD3847
EMI@ CD3848
EMI@ CD3849
EMI@ CD3850
10uF*8
A
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 2 2 2 2 2 2 2 2 2 2
A
@330uF*1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD57
CD58
CD59
CD60
CD62
CD63
CD64
CD65
CD66
CD67
CD68
CD70
CD71
CD72
CD61
CD69
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

DDR4_CHM0: DIMM0
LA-J951P 0..1
5 4 3 2 1
5 4
CHANNEL-M1 STD (5.2 mm)

Non-Interleaved Memory DDR_M1_CLK0 137
JDIMM2A
STD 8 DDR_M1_D60
TOP: JDIMM2 CONN Non-ECC DIMM

8 DDR_M1_CLK0 DDR_M1_CLK#0 CK0(T) DQ0 DDR_M1_D56
8 139 7
DDR_M1_CLK#0 DDR_M1_CLK1 138 CK0#(C) DQ1 20 DDR_M1_D62
8 DDR_M1_D[0..15] 8 DDR_M1_CLK1 DDR_M1_CLK#1 CK1(T) DQ2 21 DDR_M1_D57
DDR_M1_CLK#1 140
+3VS +3VS +3VS 8 CK1#(C) DQ3 4 DDR_M1_D59
8 DDR_M1_D[16..31] DDR_M1_CKE0 DQ4
109 3 DDR_M1_D58
8 DDR_M1_CKE0 DDR_M1_CKE1 CKE0 DQ5 DDR_M1_D61
8 DDR_M1_D[32..47] 110 16
8 DQ6
1
1
DDR_M1_CKE1 CKE1 17 DDR_M1_D63
RD13 RD14 RD15 DDR_M1_CS#0 149 DQ7 DDR_M1_DQS7
Rshort@
DDR_M1_D[48..63] 13
8 8 DDR_M1_CS#0 DDR_M1_CS#1 S0# DQS0(T) DDR_M1_DQS7 8
0_0402_5% @ 0_0402_5% 157 11 DDR_M1_DQS#7
@ 0_0402_5% 8 DDR_M1_CS#1 DQS0#(C) DDR_M1_DQS#7 8
162 S1#
D 28 DDR_M1_D55 D
165 S2#/C0
SA0_CHB_DIM2 SA1_CHB_DIM2 SA2_CHB_DIM2 JDIMM2B DQ8 29 DDR_M1_D51
DDR_M1_ODT0 S3#/C1 DQ9
1 2
STD
155 41 DDR_M1_D53
8 DDR_M1_ODT0 ODT0 DQ10
1 2
1 2
111 141 DDR_M1_ODT1 42 DDR_M1_D48
+1.2V_VDDQ VDD1 VDD11 +1.2V_VDDQ 8 DDR_M1_ODT1 161 DQ11
RD17 112 142 ODT1 DDR_M1_D49
VDD2 VDD12 DDR_M1_BG0 DQ12 24
RD16 RD18 117 147 115
Rshort@
Rshort@
@ 0_0402_5% 8 DDR_M1_BG1 25 DDR_M1_D54
118 VDD3 VDD13 148 DDR_M1_BG0 DQ13 DDR_M1_D50
0_0402_5% 0_0402_5% 113 BG0 38
123 VDD4 VDD14 153 8 DDR_M1_BG1 DDR_M1_BA0 150 DQ14 DDR_M1_D52
BG1 37
2
124 VDD5 VDD15 154 8 DDR_M1_BA0 DDR_M1_BA1 DQ15

145 BA0 34 DDR_M1_DQS6 DDR_M1_DQS6 8
VDD6 VDD16 DQS1(T)
2
2
129 159 8 DDR_M1_BA1 BA1 DDR_M1_DQS#6 DDR_M1_DQS#6
130 VDD7 VDD17 160 DDR_M1_MA0 DQS1#(C) 32 8
144
VDD8 VDD18 8 DDR_M1_MA0 DDR_M1_MA1 A0 DDR_M1_D42
135 163 133 50
+3V_PRIM_DB VDD9 VDD19 8 DDR_M1_MA1 DDR_M1_MA2 A1 DQ16 49 DDR_M1_D46
136 132
VDD10 8 DDR_M1_MA2 DDR_M1_MA3 A2 DQ17 DDR_M1_D45
131 62
8 DDR_M1_MA3 DDR_M1_MA4 A3 DQ18
255 VDDSPD 258 128 63 DDR_M1_D44
VTT +0.6V_0.6VS 8 DDR_M1_MA4 DDR_M1_MA5
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 164 257 8 DDR_M1_MA5 DDR_M1_MA6
126
127
A4
A5
DQ19
DQ20
46
45
DDR_M1_D41
DDR_M1_D43
2.2U_0201_6.3V6M
+0.6V_DDRB_VREFCA VREFCA +2.5V DDR_M1_MA6
VPP1 259 8 DDR_M1_MA7 A6 DQ21 DDR_M1_D47
1 2 DDR_M1_MA7 122 58
CD3856 CD3855 VPP2 8 DDR_M1_MA8 125 A7 DQ22 DDR_M1_D40
DDR_M1_MA8 DDR_M1_MA9 59
SPD ADDRESS FOR CHANNEL B : 0.1U_0201_10V6K
1
2 VSS
VSS
VSS
VSS
99
102
8
8 DDR_M1_MA9
DDR_M1_MA10
DDR_M1_MA10
DDR_M1_MA11
121
146
A8
A9
DQ23
DQS2(T)
55
53
DDR_M1_DQS5
DDR_M1_DQS#5
DDR_M1_DQS5 8
8
WRITE ADDRESS: 0XA4
2 1 5 103 8 120 DDR_M1_DQS#5
DDR_M1_MA11 DDR_M1_MA12 A10_AP DQS2#(C) DDR_M1_D38
6 VSS VSS 106 8 119 A11 70
VSS VSS DDR_M1_MA12 DDR_M1_MA13 DQ24 DDR_M1_D37
READ ADDRESS: 0XA3 9
10 VSS VSS
107
167
8 DDR_M1_MA13
158
DDR_M1_MA14_WE# 151
A12
A13 DQ25
71
83 DDR_M1_D32
PLACE NEAR TO PIN VSS VSS 9/8 Modify88 DDR_M1_MA14_WE# DDR_M1_MA15_CAS# 156 DQ26 DDR_M1_D34
SA0 = 0; SA1 = 1; SA2 = 0. +3V_PRIM +3V_PRIM_DB
14
15 VSS
VSS
VSS
VSS
168
171 8
8
DDR_M1_MA15_CAS#
DDR_M1_MA16_RAS#
DDR_M1_MA16_RAS# 152
A14_WE#
A15_CAS# DQ27
DQ28
84
66 DDR_M1_D35
DDR_M1_D39
18 172 A16_RAS# 67
DDR4 POR OPERATING SPEED: 1867 MT/S 1@ 2 19
22
VSS
VSS
VSS
VSS
175
176 +1.2V_VDDQ 8 DDR_M1_ACT#
DDR_M1_ACT# 114
ACT#
DQ29
DQ30
79 DDR_M1_D33
DDR_M1_D36
STRETCH GOAL IS 2133 MT/S
RD36 0_0402_5% DDR_M1_PAR 80
23 VSS VSS 180 143 DQ31 DDR_M1_DQS4
8 DDR_M1_PAR DDR_M1_ALERT# DQS3(T) 76 DDR_M1_DQS4 8
+3VS 26 VSS VSS 181 116 PARITY DDR_M1_DQS#4
74
27 VSS VSS 184 RD34 2 1 8 DDR_M1_ALERT# DIMM2_CHB_EVENT# 134 ALERT# DQS3#(C) DDR_M1_DQS#4 8
1 Rshort@ 2 30 VSS VSS 185 DDR_DRAMRST#_R 108 EVENT# 174 DDR_M1_D17
240_0402_1% 8,23 DDR_DRAMRST#_R
RD35 0_0402_5% 31 VSS VSS 188 RESET# DQ32 173 DDR_M1_D16
35 VSS VSS 189 DQ33 187 DDR_M1_D18
VSS VSS SOC_SMBDATA DQ34 186 DDR_M1_D19
36 192 254
39 VSS VSS 193 9,23 SOC_SMBDATA SOC_SMBCLK SDA DQ35 170 DDR_M1_D22
253
40 VSS VSS 196 9,23 SOC_SMBCLK SCL DQ36 169 DDR_M1_D21
43 VSS VSS 197 SA2_CHB_DIM2 166 DQ37 DDR_M1_D23
183
VSS VSS DQ38 DDR_M1_D20
44 201 SA1_CHB_DIM2 260 SA2 182
+1.2V_VDDQ VSS VSS SA0_CHB_DIM2 DQ39 DDR_M1_DQS2
C
47 202 256 SA1 179
8 C
48 VSS VSS 205 SA0 DQS4(T) 177 DDR_M1_DQS#2 DDR_M1_DQS2
51 VSS VSS 206 DQS4#(C) DDR_M1_DQS#2 8
52 VSS VSS 209 92 195 DDR_M1_D3
61 VSS VSS 217 CB3_NC DQ43 DDR_M1_D5
88 191
DIMM Side
VSS VSS
64 218 +1.2V_VDDQ
For ECC DIMM 87
CB4_NC DQ44
190 DDR_M1_D7
CPU Side 65 VSS VSS 222 CB5_NC DQ45 203 DDR_M1_D0

VSS VSS 100 CB6_NC DQ46
2
68 223 104 204 DDR_M1_D4

RD21 69 VSS VSS 226 RD27 2 1 240_0402_1% CB7_NC DQ47 DDR_M1_DQS0
97 200 8
72 VSS VSS 227 1 240_0402_1% 95 DQS8(T) DQS5(T) DDR_M1_DQS0
1K_0402_1% RD28 2 198 DDR_M1_DQS#0
+0.6V_DDRB_VREFCA +0.6V_B_VREFCA 73 VSS VSS 230 DQS8#(C) DQS5#(C) DDR_M1_DQS#0 8
77 VSS VSS 231 216 DDR_M1_D25
1
78 VSS VSS 234 12 DQ48 215 DDR_M1_D29

81 VSS VSS 235
+1.2V_VDDQ DM0#/DBI0# DQ49 DDR_M1_D28
33 228
1 RD22 2 82 VSS VSS 238 54 DM1#/DBI1# DQ50 DDR_M1_D31
VSS VSS 229
2_0402_1% VREF traces should be at least 20 mils 85
86 VSS VSS
239
243
75
178
DM2#/DBI2#
DM3#/DBI3#
DQ51
DQ52
211
212
DDR_M1_D30
DDR_M1_D24
wide with 20 mils spacing to other 89 VSS
VSS
VSS
VSS
244
DDR_DRAMRST#_R
199 DM4#/DBI4# DQ53 224 DDR_M1_D26
2
90 247 220 DM5#/DBI5# DQ54 DDR_M1_D27
225
1
RD23 signals 93 VSS
VSS
VSS
VSS
248 241 DM6#/DBI6# DQ55
221 DDR_M1_DQS3 DDR_M1_DQS3 8
1K_0402_1% CD12 94 251 96 DM7#/DBI7# DQS6(T) DDR_M1_DQS#3 DDR_M1_DQS#3
0.022U_0201_25V6K 98 VSS VSS 252 219 8
VSS VSS 2 DM8#/DBI8# DQS6#(C)
2 CD9
1
262 261 0.1U_0201_10V6K

GND GND @ESD@ DDR_M1_D10
2
237
RD24 1 DQ56 236 DDR_M1_D15
FOX_AS0A827-H2SB-7H DQ57 249 DDR_M1_D11
24.9_0402_1% Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_Rev1P0 DQ58 250 DDR_M1_D12
DQ59 232 DDR_M1_D13
CONN@
1
DQ60 233 DDR_M1_D8

DQ61 245 DDR_M1_D14
PLACE NEAR TO SODIMM DQ62
DQ63
246
242
DDR_M1_D9
DDR_M1_DQS1
DQS7(T) DDR_M1_DQS#1 DDR_M1_DQS1 8
240
DQS7#(C) DDR_M1_DQS#1 8
FOX_AS0A827-H2SB-7H
B Decopling Cap._Channel B CONN@ B
Layout Note:
Layout Note: Layout Note: PLACE THE CAP WITHIN 200 MILS
Place near JDIMM1.257,259 Place near JDIMM1.258 FROM THE JDIMM1
Update Table 4-26 for DDR4 SO-DIMM Decoupling Caps
572907_ICL_UY_PDG_Rev0p7
+2.5V 10uF *1 +0.6V_0.6VS 10uF *1+1uF *2 +0.6V_DDRB_VREFCA 2.2uF *1
1uF *1 0.1uF *1
2 2
0.1U_0201_10V6K
@
10U_0402_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
CC4025 @RF@
68P_0201_25V8J
68P_0201_25V8J
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1
CD55
10U_0402_6.3V6M
CC4027 @RF@
CC4024 @RF@
CC4026 @RF@
CD56
0.1U_0201_10V6K
CD14
CD18
CD20
CD16
CD21
2.2U_0201_6.3V6M
1 1
2 2 2 2 2 2 2 2 2
Layout Note:
Place near JDIMM1
follow RVP 1p0

A 10uF*8 A
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ

@330uF*1 +1.2V_VDDQ
placeholder
1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+ CD42
CD26
CD27
CD28
CD30
CD31
CD32
CD33
CD34
CD35
CD36
CD38
CD39
CD40
CD41
CD29
CD37
330U_2.5V_M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Part Number = SF000006S00
DDR4_CHM1: DIMM1
LA-J951P 0..1
5 4 3 2 1
5 4
eDP Power 8,9,10,11,12,13,23,24,40,51,56,58,66,68,73,77,78,88 +3VS +3VS

W=60mils
+19VB 83,84,85,86,89,91 +19VB +19VB
INVPW R_B+
+LCDVDD SM010014520 3000ma W=60mils
220ohm@100m hz 9,11,17,51,52,58,63,66,78,85,86,87,91 +3VALW +3VALW
DCR 0.04
1 2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1 1 FU1 0.75A_24V_MF-MSMF075/24
CG3 SP040009I00
CG2 EMI@
2 2 1 2 DISPOFF#
EMI@ C117
1 1
C118 <EC> 58 EC_BKOFF#
R166 33_0402_5%
1
*UG1 +LCDVDD Current Limit : 0.8A 680P_0402_50V7K 68P_0402_50V8J
R5176
2 2 10K_0402_5%
D D
2
UG2
6 1 1 Rshort@ 2 INVTPW M
6 ENVDD_CPU EN1 OUT1 +LCDVDD +3VS <CPU>6 BKL_PW M_CPU
R259 0_0402_5%
1
+3VS
5 IN GND 2 +LCDVDD
+3VS R5201 1
2 UG2_EN2 4 EN2 OUT2 3 @ R163
+3VS_CAMERA +3VS
100K_0402_5% 100K_0402_5%
G2895TP1U_TSOT23-6
0.1U_0402_16V7K
+3VS_CAMERA
2
1U_0201_6.3V6K
0.1U_0201_10V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
SA0000D6O00
0.1U_0402_16V7K
1U_0201_6.3V6K
1U_0201_6.3V6K
SA0000D6O00 1 1 1 1 11 1 1 1
C5232
C5231
@ CG79
@ CG76
@ @
Rshort@
CG1
CG78
CG4
CG75
CG77
2 2 2 2 22 2 2 2 RT34 1 2 0_0201_5% EDP_HPD_R
<CPU> 6 EDP_HPD
Camera
1
RT11
100K_0402_5%
2
@ESD@
D7
USB20_P5_R 2
R170 1 EMI@ 2 0_0201_5% USB20_N5_R 2 1
13 USB20_N5 USB20_N5_R 1 2 0.1U_0201_10V6K EDP_AUXP_C
3 CT102 1
3 6 EDP_AUXP
R171 1 EMI@ 2 0_0201_5% USB20_P5_R AZC199-02SPR7G_SOT23-3 CT101 1
2 0.1U_0201_10V6K EDP_AUXN_C
13 USB20_P5 6 EDP_AUXN
SC600001600
CT98 1 2 0.1U_0201_10V6K EDP_TXP0_C

6 EDP_TXP0
<CPU> CT97 1 2 0.1U_0201_10V6K EDP_TXN0_C
C 6 EDP_TXN0 C
+3VS_CAMERA CT103 1 2 0.1U_0201_10V6K EDP_TXP1_C

6 EDP_TXP1
CT100 1
2 0.1U_0201_10V6K EDP_TXN1_C
6 EDP_TXN1
1 1
@
C5221 C5222
.1U_0402_16V7K
2 2 4.7U_0402_6.3V6M
SE00000SO00
C593 2 1 220P_0402_50V7K INVTPW M
C594 2 1 220P_0402_50V7K DISPOFF#
eDP
Touch Screen EDP_TXP1_C
CONN@
JEDP
1
R5175 1 EMI@ 2 0_0201_5% USB20_N7_R 1 2 TS_GPIO EDP_TXN1_C 12
13 USB20_N7 58 TS_GPIO_EC 2
R5187 Rshort@ 0_0402_5% 3
@ESD@ EDP_TXP0_C 34
D6 R173 1 EMI@ 2 0_0201_5% USB20_P7_R EDP_TXN0_C 45
USB20_N7_R 13 USB20_P7 5
2 6
2 1 EDP_AUXP_C 67
USB20_P7_R 3 1 EDP_AUXN_C 78
3 89
+LCDVDD
AZC199-02SPR7G_SOT23-3 10
9
B SC600001600 EDP_HPD_R 11
10 B
12
11
Touch screen USB20_P7_R
USB20_N7_R
13
12
14
13
DISPOFF# 15
14
INVTPW M 16
15
TS_GPIO 17
16
18
Touch Screen Power Selection:TS@/HDTS@ INVPW R_B+
17
19
18
20
19
21
+5VS +5VS_TO UCH 20
+5VS_TO UCH
22
RT51 RT55
21
23
+3VS_TO UCH 22
2 1 2 1 24
HDTS@ HDTS@ 23
25 36
TOUCH_PW R_OUT +3VS_CAMERA USB20_N5_R 24
0_0402_5% 0_0402_5% 26 35
+3VS TOUCH_PW R_IN +3VS_TO UCH USB20_P5_R 25 GND 34
27
RT31 TS@
FG4
RT33
Camera 26 GND 33
28
2 1 6 1 2 1 D_MIC_CLK 27 GND 32
29
IN OUT 56 D_MIC_CLK D_MIC_DATA
FHDTS@ 28 GND 31
30
1U_0201_6.3V6M
1U_0201_6.3V6M
FHDTS@
56 D_MIC_DATA
0_0402_5%
1 1 5 2 0_0402_5% 29 GND
SET GND RT4 30 GND
CT6 TS@
CT7 TS@
ACES_50203-03001-002
2
4 3 2 1 SP010023710
4.7U_0402_6.3V6M
100P_0402_50V8J
0.1U_0402_10V6K
DSG FLAG/EN
2
1 1 2 @ESD@
2
2 2 RT1 100K_0402_5% DM1
@RF@
G517AH1TP1U_TSOT23-6
33K_0402_5% SC600001600
CT9 TS@
CT10
CT8 TS@
TS@
SA000096P00
1
TS@
100_0402_5% 1 2 RT2 2 2 1
1
1
TS@
A A

Issued Date 2019/10/08 Deciphii ered Date 2021/10/08 Tiiitttllle
eDP CONN/Camera/TS
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIVIIISIIION OF R&D Siiize Documenttt Num ber Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS 0.. 2
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IINC... LA-J952P
5 4 Eletro-XTechnical0023 3 2
Dattte::: Wednesday,,, Apriiilll 22,,, 2020
1
Sheettt 38 o ff 100
5 4
3 2 1
8,9,10,11,12,13,23,24,38,51,56,58,66,68,73,77,78,88 +3VS +3VS

+3VS
HDMI_TX_P2 38,56,58,63,67,77,78 +5VS +5VS
0.1U_0201_10V6K 1 2 CG8
6 SOC_DP1_P0 0.1U_0201_10V6K 1 HDMI_TX_N2
2 CG9
6 SOC_DP1_N0
0.1U_0201_10V6K 1 2 CG10 HDMI_TX_P1
6 SOC_DP1_P1
<CPU> 6 0.1U_0201_10V6K 1 2 CG11 HDMI_TX_N1
SOC_DP1_N1
1
RG47
6 0.1U_0201_10V6K 1 2 CG12 HDMI_TX_P0
SOC_DP1_P2 0.1U_0201_10V6K 1 2 HDMI_TX_N0
6 CG13 1M_0402_5%
SOC_DP1_N2
2
0.1U_0201_10V6K 1 2 CG14 HDMI_CLKP
6 SOC_DP1_P3 RG108
2
D
0.1U_0201_10V6K 1 2 CG15 HDMI_CLKN D
6 SOC_DP1_N3 HDMI_HPD HP_DETECT
1 6 1 2
6 HOST_DP1_HPD
QG1A 10K_0402_5%
20K_0402_5%
2 RG85 1
2 RG86 1
2 RG87 1
L2N7002SDW1T1G 2N SC88-6
470_0201_5%
470_0201_5%
470_0201_5%
470_0201_5%
470_0201_5%
470_0201_5%
470_0201_5%
470_0201_5%
1
SB00001FF00 1
2 RG80 1
2 RG81 1
2 RG82 1
2 RG83 1
2 RG84 1
5V Level RG56 @
QG1B SB00001FF00 CM17
L2N7002SDW1T1G 2N SC88-6 220P_0402_50V7K
3 4 2
2
5
+3VS
+3VS
@ESD@
SI phase:RS_20ohm_RP_150ohm D21
HDMI_R_CLKP 1 1 10 9 HDMI_R_CLKP
HDMI_CLKP RG59 1 EMI@ 2 10_0402_1% HDMI_R_CLKP
HDMI_R_CLKN 2 2 98 HDMI_R_CLKN
2
C CG71EMI@ HDMI_R_TX_P04 4 7 7 HDMI_R_TX_P0 C
2
240_0402_1%
SD000009T80 HDMI_R_TX_N05 5 6 6 HDMI_R_TX_N0
SOC_DP1_CTRL_CLK 1 6 HDMI_CTRL_CLK
6 SOC_DP1_CTRL_CLK
1
HDMI_CLKN RG60 1 EMI@ 2 10_0402_1% HDMI_R_CLKN 33

QG2A SB00001FF00
8 L2N7002SDW1T1G 2N SC88-6
+3VS
HDMI_TX_N2 RG63 1 EMI@ 2 10_0402_1% HDMI_R_TX_N2
AZ1045-04F.R7G DFN2510P10E ESD
2
SC300001Y00
CG72EMI@
5
240_0402_1%
SD000009T80
SOC_DP1_CTRL_DATA 4 3 HDMI_CTRL_DAT
6 SOC_DP1_CTRL_DATA
1
HDMI_TX_P2 RG61 1 EMI@ 2 10_0402_1% HDMI_R_TX_P2 @ESD@

D22 QG2B SB00001FF00
HDMI_R_TX_N1 1 1 10 9 HDMI_R_TX_N1 L2N7002SDW1T1G 2N SC88-6
HDMI_TX_P1 RG65 1 EMI@ 2 10_0402_1% HDMI_R_TX_P1
HDMI_R_TX_P1 2 2 9 8 HDMI_R_TX_P1
2
CG73EMI@ HDMI_R_TX_N2 4 4 7 7 HDMI_R_TX_N2 +HDMI_CRT_5V

240_0402_1%
SD000009T80 HDMI_R_TX_P2 5 5 6 6 HDMI_R_TX_P2
+3VS
1
HDMI_TX_N1 RG10 1 EMI@ 2 10_0402_1% HDMI_R_TX_N1 33

RG109 1 2 2.2K_0402_5% HDMI_CTRL_CLK
8 RG110 1 2 2.2K_0402_5% HDMI_CTRL_DAT
HDMI_TX_P0 RG12 1 EMI@ 2 10_0402_1% HDMI_R_TX_P0 RG111 1 2 2.2K_0402_5% SOC_DP1_CTRL_CLK
B AZ1045-04F.R7G DFN2510P10E ESD RG112 1 2 2.2K_0402_5% SOC_DP1_CTRL_DATA B
2
SC300001Y00
CG74EMI@
240_0402_1% HDMI Conn.
SD000009T80
1
HDMI_TX_N0 RG13 1 EMI@ 2 10_0402_1% HDMI_R_TX_N0 @ESD@

DG1 JHDMI CONN@
HP_DETECT 1 1 10 9 HP_DETECT HP_DETECT 19
HP_DET
+HDMI_CRT_5V 18
HDMI_CTRL_DAT 2 8 HDMI_CTRL_DAT +5V
2 9 17
DDC/CEC_GND
HDMI_CTRL_DAT 16
HDMI_CTRL_CLK 4 7 HDMI_CTRL_CLK HDMI_CTRL_CLK SDA
4 7 15
SCL
14
55 66 Utility
13
HDMI_R_CLKN CEC
12
3 3 @ @ CK-
11
HDMI_R_CLKP CK_shield
10P_0402_50V8J
10P_0402_50V8J
W=40mils 1 1 10
8 CM26 CM27 HDMI_R_TX_N0 CK+
FG1 9
+HDMI_CRT_5V D0-
8
AZ1045-04F.R7G DFN2510P10E ESD HDMI_R_TX_P0 D0_shield
7
3 SC300001Y00 2 2 HDMI_R_TX_N1 D0+
6
OUT D1-
5
1 HDMI_R_TX_P1 D1_shield
+5VS 4 23
IN HDMI_R_TX_N2 D1+ GND1
1 1 3 22
2 D2- GND2
2 21
GND HDMI_R_TX_P2 D2_shield GND3
1 20
CG46 CG47 D2+ GND4
0.1U_0402_16V7K 2 4.7U_0402_6.3V6M 2 ACON_HMRBL-AK120H
A AP2330W-7_SC59-3 A
DC231709273
SA00004ZA00

HDMI Conn/Level shift
0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W IT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J951P
5 4 3 2 1
5 4
+LAN_VDD_3V3 Rising
JL33
1
1 2
2 time
JUMP@
+3VALW @
JUMP_43X79 need>0.5mS and
UL2
1 <100mS CL8, CL23 closeLL2.
5 VOUT +LAN_VDD_3V3 CL26 close UL1 Pin 3.
VIN
1
2
CL12 close UL1 Pin 8.
@ CL13 ~ CL15 close UL1 Pin 22. +LAN_VDD_1V0
4 GND
CL28 58 LAN_PWR_EN
1500P_0402_50V7K
EN LL2 CL11, CL27 close UL1 Pin 30.
2 3 +LAN_REGOUT
1 2
/OC
1U_0201_6.3V6K
1U_0201_6.3V6K
2.2UH +-20% 1239AS-H-2R2M=P2 2A
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
G524B1T11U_SOT23-5 SH000014700 1 1 1 1 1 1 1 1 1 1
CL8
@
CL29
CL23
SA00006Y800 @
CL11 CL12 CL13 CL14 CL15 CL26 CL27
D @ D
2 2 2 2 2 2 2 2 2 2
EC_LAN_ISOLATEB#_R 2 1 +3VS
1K_0402_5% RM6
+LAN_VDD_3V3
RTL8107ESH-CG/RTL8111HSH-CG Co-Lay
2
+LAN_VDD_3V3
RM11
UL1 +LAN_VDD_3V3=40mil 15K_0402_5%

0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 1 1 1 1 1 RTL8111HSH-CG
4.7U_0402_6.3V6M
0.1U_0402_16V7K
1
L
CL10
CL16
@ @ +LAN_VDD_1V0
CL9 CL5
SA000084T00 +VDDREG=40mil
CL20 CL19
2 2 2 2 2 2 LAN_MDIP0 1 3
+LAN_REG OUT =60mil
LAN_MDIN0 2 MDIP0 AVDD10 8
LAN_MDIP1 4 MDIN0 AVDD10 30 +LAN_VDD_3V3 XTLI
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
LAN_MDIP2 6 MDIN1 DVDD10 2 1 XTLO
LAN_MDIN2 7 MDIP2 11 1M_0402_5% RL7
LAN_MDIP3 9 MDIN2 AVDD33 32
1
+LAN_VDD_3V3
LAN_MDIN3 10 MDIP3 AVDD33 RL15
MDIN3 23
CL9, CL20 close to UL1 Pin 11 CL10& CL16 close to UL1: Pin 23 VDDREG(VDD33) +LAN_REGOUT 10K_0402_5% YL1
24
CLKREQ_PCIE#1 REGOUT
CL5 & CL19 close to UL1: Pin 32 11 CLKREQ_PCIE#1
12 1 3
2
PLT_RST# 19 CLKREQB 21 EC_PME# 1 3
11,52,58,66,68 PLT_RST# PERSTB LANW AKEB 20 EC_LAN_ISOLATEB#_R EC_PME# 58 NC NC
CLK_PCIE_P1 15 ISOLATEB +LAN_VDD_3V3
11 CLK_PCIE_P1 CLK_PCIE_N1 LAN_ACT# 2 2
16 REFCLK_P 27 2 4
10P_0402_50V8J
CL25
CL24
10P_0402_50V8J
11 CLK_PCIE_N1 REFCLK_N LED0 26 LED1/GPO 1@2
CC145 1 2 0.1U_0201_10V6K PCIE_CTX_C_DRX_P9 13 LED1/GPO 25 LAN_LINK# RL56 4.7K_0402_5%
13 PCIE_CTX_DRX_P9 CC144 1 2 0.1U_0201_10V6K PCIE_CTX_C_DRX_N9 14 HSIP LED2(LED1) 1 1
SJ10000UP00
13 PCIE_CTX_DRX_N9 PCIE_CRX_DTX_P9 CR11 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_P9 17 HSIN 28 XTLI 25MHZ 10PF XRCGB25M000F2P34R0
13 PCIE_CRX_DTX_P9 PCIE_CRX_DTX_N9 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_N9 18 HSOP CKXTAL1 29 XTLO
CR13 1
13 PCIE_CRX_DTX_N9 HSON CKXTAL2
RSET 31 33
RSET GND
2
RL11
C 2.49K_0402_1% C
TSL1
25 XGND RL55 1 @ 2 0_0805_5% (SA0000ALR00) RTL8107ESH-CG 10/100
+V_DAC 1 LANGND 24
1
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_MDIP0
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_MDIN0
(SA000084T00) RTL8111HSH-CG Giga
MCT1 RL60 1 2 75_0402_1%
TD1- MX1- MCT2 RL61 1 2 75_0402_1%
4 21 MCT3 RL62 1 2 75_0402_1%
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_MDIP1 MCT4 RL63 1 2 75_0402_1%
LAN_MDIN1 6 TD2+ MX2+ 19 RJ45_MDIN1
TD2- MX2-
7 18 2
LAN_MDIP2 8 17 RJ45_MDIP2 CL2
TCT3 MCT3 +LAN_VDD_3V3
LAN_MDIN2 9 16 RJ45_MDIN2 SE167100J80 20190108 MV phase
TD3+ MX3+
10
TD3- MX3-
15 1
10P_1808_3KV Change to 5.1K from 1K
A1
JLAN
A(fronCOtNN)@:LAN_ACT_Amber
LAN_MDIP3 11 14 RJ45_MDIP3 Amber_LED+
LAN_MDIN3 TCT4 MCT4 1
12 13 RJ45_MDIN3 CL3 LAN_LINK# 2 1 LAN_LINK#_R LAN_ACT#_R A2
TD4+ MX4+ RL30 5.1K_0402_5% Amber_LED-
120P_0402_50V8J RJ45_MDIN3 8
TD4- MX4- LANGND
2 EMI@ BI_D4-
3
LAN-8100G1G DL1 RJ45_MDIP3 7
2 1
3
BI_D4+
@EMI@ SP050006800 PESD5V0U2BT 3P CC SOT23 ESD
CL1 CL4 ESD@ RJ45_MDIN1 6
RX_D2-
1
0.01U_0402_16V7K 0.1U_0402_16V7K SC600001600

1 2 1st:SCA00000T00, S ZEN ROW PESD5V0U2BT 3P CC SOT23ESD RJ45_MDIN2 5
1
2nd:SCA00001L00, S ZEN ROW L30ESDL5V0C3-2 CA SOT23 ESD BI_D3-

3rd:SCA00001100, S ZEN ROW PJDLC05C 3P CA SOT23 RJ45_MDIP2 4
4th:SC600001600, S DIO ROW AZC199-02S.R7G CC SOT23 ESD BI_D3+
RJ45_MDIP1 3
RX_D2+
RJ45_MDIN0 2 9
TX_D1- GND1 10
RJ45_MDIP0 1 GND2 11
TX_D1+ GND3 12
B1 GND4
W hite_LED+
LAN_ACT# 2 1 LAN_ACT#_R LAN_LINK#_R B2
RL31 510_0402_5% W hite_LED-
SINGA_2RJ3081-1A8211F LANGND
DC231710035
B(back):LAN_LINK_White
B B
@ESD@ @ESD@
DM12 DM13
LAN_MDIN1 6 3 LAN_MDIN0 LAN_MDIN3 6 3 LAN_MDIN2
I/O4 I/O2 I/O4 I/O2
powe rail need to check powe rail need to check
5 2 5 2
+LAN_VDD_3V3 VDD GND +LAN_VDD_3V3 VDD GND
LAN_MDIP0 4 1 LAN_MDIP1 LAN_MDIP2 4 1 LAN_MDIP3

I/O3 I/O1 I/O3 I/O1
AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6
SC300001G00 SC300001G00
A A

LAN 8111
LA-J951P 0..1
Dattte::: Wednesday,,, Aprrriill22,,, 2020 Sheettt 51 o ff100

5 4 3 2 1
5 4
2018/06/22
8,9,10,11,12,13,23,24,38,40,51,56,58,66,68,73,77,78,88 +3VS +3VS ADD RC183 +1.8V_PRIM
+3VALW
9,11,17,51,58,63,66,78,85,86,87,91 +3VALW
+1.8V_PRIM
ADD RC72 and Change from 49.9K to 20K
9,14,16,17,58,78,87 +1.8V_PRIM
CNV_BRI_CTX_DRX_R RW 1 1 @ 2 20K_0402_5%
+3VS_W LAN +3VS_W LAN
CNV_RGI_CTX_DRX_R RW 2 1 @ 2 20K_0201_5%
2
D
CONN@ D
JWLAN RW 3
4.7K_0402_5%
1
1 2
1_GND 3.3V_2
3 4
13 USB20_P10 3_USB_D+ 3.3V_4
13 USB20_N10 5 6
5_USB_D- LED1#_6
7 8
7_GND N/C_8 CNV_RF_RESET#_R RW 4 1 CNVi@ 2 0_0402_5%
CNV_CRX_DTX_N1 9 10
14 9_N/C N/C_10 CNV_RF_RESET# 10
14 CNV_CRX_DTX_P1 11 12
11_N/C N/C_12 XTAL_CLKREQ_R RW 5 1 CNVi@ 2 0_0402_5%
13 14
13_N/C N/C_14 XTAL_CLKREQ 10
14 15 16
CNV_CRX_DTX_N0 15_N/C LED2#_16
14 17 18
CNV_CRX_DTX_P0 17_N/C GND_18
19 20 RW 6 1 @ 2 0_0402_5%
19_N/C N/C_20 CNV_BRI_CRX_DTX_R UART_2_CRXD_DTXD 12
21 22 RW 7 1 CNVI@2 22_0402_5%
14 CLK_CNV_CRX_DTX_N 21_N/C N/C_22 CNV_BRI_CRX_DTX 14
23
14 CLK_CNV_CRX_DTX_P 23_N/C
25 24 CNV_RGI_CTX_DRX_R RW 8 1 CNVi@ 2 75_0402_5%

PCIE_CTX_C_DRX_P10 33_GND N/C_32 CNV_RGI_CRX_DTX_R RW 9 1 CNVi@ 2 22_0402_5% CNV_RGI_CTX_DRX 14
CC3902 1 2 0.1U_0201_10V6K 27 26 RW10 1 @ 2 0_0402_5%
13 PCIE_CTX_DRX_P10 PCIE_CTX_C_DRX_N10 35_PERp0 N/C_34 28 CNV_BRI_CTX_DRX_R RW12 1 CNVi@ 2 75_0402_5% CNV_RGI_CRX_DTX 14 UART_2_CTXD_DRXD 12
CC3901 1 2 0.1U_0201_10V6K 29
13 PCIE_CTX_DRX_N10 37_PERn0 N/C_36 30 CNV_BRI_CTX_DRX 14
31
33 39_GND CLink Reset_38 32 E51TXD_P80DATA 58
13 PCIE_CRX_DTX_P10 35 41_PETp0 CLink DATA_40 34 E51RXD_P80CLK 58
+3VS_W LAN 13 PCIE_CRX_DTX_N10 43_PETn0 CLink CLK_42 36
37
39 45_GND COEX3_44 38
11 CLK_PCIE_P2 41 47_REFCLKP0 COEX2_46 40
11 CLK_PCIE_N2 49_REFCLKN0 COEX1_48 42 +3VS_W LAN
43
51_GND SUSCLK_50 44 SUSCLK 11
1
45
11 CLKREQ_PCIE#2 53_CLKREK0# PERST0#_52 46 BT_ON PLT_RST# 11,51,58,66,68
47
55_PEW ake0# W _DISABLE2#_54 48
1
RW 13 49
51 57_GND W _DISABLE1#_56 50 WL_OFF# 12
10K_0402_5% 14 CNV_CTX_DRX_N1
53 59_N/C N/C_58 52
14 CNV_CTX_DRX_P1 RW11
61_N/C N/C_60 54
2
55 10K_0402_5%
57 63_GND N/C_62 56 CLKIN_XTAL_LCP
14 CNV_CTX_DRX_N0 65_N/C RESERVED_64 58 TP@ T137
2
59
C58 EC_PCIE_WAKE# 14 CNV_CTX_DRX_P0 67_N/C N/C_66 60 BT_ON BT_ON C
61 RW19 1 @ 2 0_0402_5%
69_GND N/C_68 62 BT_ON_PCH 13
63
14 CLK_CNV_CTX_DRX_N 71_N/C N/C_70 64
65 RW18 1 2 0_0402_5%
14 CLK_CNV_CTX_DRX_P 73_N/C 3.3V_72 66 +3VS_W LAN BT_ON_EC 58
67
75_GND 3.3V_74
1
1
CW8
CW9
10P_0402_50V8J
10P_0402_50V8J
68
@RF@ @RF@ GND 10K_0402_5% 2 @ 1 RW16 W L_OFF#
69
GND
70
NC_70
2
71 @CNVI@
NC_71 XTAL_CLKREQ
10K_0402_5% 2 1 RW17
LOTES_APCI0019-P003H
SP070010DA0
Active Low
WL_PWREN_EC# 58
+3VS_WLAN +3VS_WLAN
1
Close to KEY E pin2,4 Close to KEY E pin64,66
RWL1
200K_0402_5% RF@ RF@ RF@
CWL1 CW 6 CW 7 CW 3 CW 5 CW 1 CW 2
2
1 2 1
10U_0402_6.3V6M
1 1 1 1 1
+3VS_W LAN
.1U_0402_16V7K
0.01U_0201_6.3V6K
10U_0402_6.3V6M
.1U_0402_16V7K
0.01U_0201_6.3V6K
2
0.1U_0402_16V4Z
G
QWL1
1 3 2 2 2 2 2 2
+3VALW
D
B B
1
1
1
RWL3 CWL2 PJ2301 1P SOT23-3

RWL2 1K_0402_5% SB00000T900
499_0402_1% @ 0.1U_0402_16V4Z
2
2
2
D
1
2 QWL2
G SB000009Q80
S 2N7002KW_SOT323-3
3
A A

WLAN-BT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS 0..1
5 4 3 2 1
5 4
UA1 +5VS +5VS_PVDD1 +3VS +DVDD +3VS +DVDD_IO

RA1 RA2
RA8
9 1 1 2 1 2 1 2
10 HDA_SYNC_R 5 SYNC DVDD 8 +DVDD
10 HDA_BIT_CLK_R BCLK DVDD_IO +DVDD_IO
0_0402_5% 0_0402_5% 0_0402_5%
12 1 2 20
10U_0402_6.3V6M CA19
4.7U_0402_6.3V6M CA32
1 1 1
0.1U 16V K X7R 0402 CA20
0.1U 16V K X7R 0402 CA33

AVDD1 33 +5VS_AVDD Rshort@ Rshort@ Rshort@ 1
CA34 RA53 22_0402_5%
4.7U_0402_6.3V6M CA36
1 1
0.1U 16V K X7R 0402 CA37

22P 50V J NPO 0402 EMI@ AVDD2 +1.8VS_AVDD
INT_MIC 14 34
EMI@
13 MIC2-R/SLEEVE PVDD1 39 +5VS_PVDD1 2 2 2 2
CA29 MIC2-L/RING2 PVDD2 +5VS_PVDD2 2 2
1 2 MIC2_CAP 15 16 VD33STB 1 RA23 2 +3VS
GNDA MIC2_CAP VD33STB 0_0402_5%
10U_0402_6.3V6M Rshort@
D 35 SPK_L+ D
CBN SPK_OUT_L+ 36 SPK_L-
SPK_OUT_L-
1 1
CA16 CA17 37 SPK_R-
PC_BEEP 11 SPK_OUT_R- 38 SPK_R+
1U 6.3V M X5R 0201 1U 6.3V M X5R 0201
PCBEEP SPK_OUT_R+
2 2 CBP 26 HPOUT_R RA38 1 2 30_0402_1% HP_OUTR
HPOUT_R 25 HPOUT_L RA37 1 HP_OUTL
Headphone
2 30_0402_1%
100K_0402_5% 2.2K_0402_5% HPOUT_L
INT_MIC RA40 1 2 MIC2-VREFO 23 +5VS +5VS_PVDD2 +5VS +5VS_AVDD +1.8VS +1.8VS_AVDD
RA24 1 2 RA5
MIC2-VREFO 4 RA39 RA4
24 SDATA_OUT 7 HDA_SDIN0_R 1 RA26 2 HDA_SDOUT_R 10 1 2 1 2
1 2
58 MUTE_LED_IN LDO1_CAP 21 LINE1-VREFO-L SDATA_IN HDA_SDIN0 10
CA30 1 2 10U_0402_6.3V6M 22_0402_5%
GNDA LDO1-CAP
1
CA31 1 2 2.2U 6.3V M X5R 0201 22
CA21
VREF 0_0402_5% 0_0402_5% 0_0402_5%
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
GNDA VREF
10U_0402_6.3V6M
1 1 1 1
0.1U 16V K X7R 0402 CA22

Rshort@ Rshort@ Rshort@
0.1U 16V K X7R 0402

CA15 1 2 1U 6.3V M X5R 0201 CPVEE 27 1 1 DA6
29 CPVEE 18
CA8
CA39 1 2 10U_0402_6.3V6M CPVDD AZ5125-01H.R7G_SOD523-2 @
28 CPVDD LINE1_L 17
CA6
CA7
CA5
+1.8VS CBN SC400005Q00
10U_0402_6.3V6M
CBP 30 CBN LINE1_R 2 2 2 2
CBP 2 2
D_MIC_DATA 2
38 D_MIC_DATA D_MIC_CLK_R
2
2 1 3 GPIO0/DMIC_DATA12 32 CA27 1 2 10U_0402_6.3V6M
38 D_MIC_CLK GPIO1/DMIC_CLK LDO2_CAP 6 CA28 1 GNDA
BLM15PX221SN1D EMI@ LA6 2 10U_0402_6.3V6M
LDO3_CAP GNDA
RA41 10 GNDA
1 @EMI@ DCDET
1 2 100K_0402_1% 12
CA41 +DVDD PLUG_IN# 1 JD1
10P_0402_50V8J 19
2 200K_0402_1% AVSS1 31 GNDA
RA42
2 PDB 40 AVSS2 41 GNDA
PDB THERMALPAD
ALC3247-CG_MQFN40_5X5
Internal SPK wide 40 MIL

CONN@
JSPK
SPK_R- RA36 1 @EMI@ 2 0_0603_5% SPK_R-_CONN 1
+3VS +DVDD SPK_R+ RA34 1 @EMI@ 2 0_0603_5% SPK_R+_CONN 2 1
SPK_L- SPK_L-_CONN 3 2
C RA33 1 @EMI@ 2 0_0603_5% C
SPK_L+ RA35 1 @EMI@ 2 0_0603_5% SPK_L+_CONN 4 3
PC Beep 4
1
1
5
6 G1
RA10 RA9
SPK_L+_CONN SPK_R+_CONN G2
10K_0402_0.5% 100K_0402_5%
@ ACES_50278-00401-001
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
SPK_L-_CONN SPK_R-_CONN
2
1 2 PC_BEEP_R
2 2
EC Beep 58 EC_BEEP# 1 1 1 1
3
CA44 @ESD@
B
@ QA2 0.1U 16V K X7R 0402 RA 16
@EMI@ C11
@EMI@ C12
@EMI@ C13
@ESD@
@EMI@ C14
HDA_RST#_R DA7
3 1 PDB 47 K_0402_5%
E
10 HDA_RST#_R AZ5125-02S.R7G_SOT23-3 DA8

1 2 1 2 1 2 PC_BEEP 2 2 2 2
C
MMBT3904WH_SOT323-3
SB Beep 12 HDA_SPKR
CA43 CA42
SCA00001A00 AZ5125-02S.R7G_SOT23-3
1 SCA00001A00
1
SB000008E10 0.1U 16V K X7R 0402 0.1U 16V K X7R 0402
0.1U 16V K X7R 0402 CA23

EC_MUTE# R5260
1 2 RA17
58 EC_MUTE# 2 10K_0402_5%
0_0201_5%
1
Rshort@
2
Close to Codec pin34 Reserve for ESD request.
Eletro-XTechnical0027 INT_MIC_R
Reserve for ESD request.
HP_OUTR_R HP_OUTL_R
GNDA
Place RA51/RA52/RA53 on moat of UA1 BOT side
3
RA51 1 Rshort@ 2 0_0603_5%
ESD@ @ESD@
DA4 DA5
RA52 1 Rshort@ 2 0_0603_5% AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3
SCA00001A00 SCA00001A00
RA54 1 Rshort@ 2 0_0603_5%
1
1 Rshort@ 2
RA6 0_0402_5%
1/20:Swap DA3
RA7 @
B 1 2 B
0_0402_5%
1 2
CA9 JHP
0.1U 16V K X7R 0402 INT_MIC RA13 2 EMI@ 1 0_0402_5% INT_MIC_R
3 3:M/G_EARTH
HP_OUTL RA14 2 EMI@ 1 0_0402_5% HP_OUTL_R 1 1:L/R_TIP SPRING
EMI@
1 2
CA10 PLUG_IN# 5 5:TRANSFER TERMINAL
0.1U 16V K X7R 0402
EMI@
6 6:MAKE TERMINAL
1 2 HP_OUTR RA15 2 EMI@ 1 0_0402_5% HP_OUTR_R
2 2:R/L_RING A
CA11 @EMI@
0.1U 16V K X7R 0402 4 4:G/M_RING B
1 1 1 7 7:MS_SHELL
100P_0603_50V7 CA25
100P_0603_50V7 CA26
100P_0603_50V7 CA24
1 2
CA12 @EMI@ SINGA_2SJ3095-067111F
@EMI@
@EMI@
0.1U 16V K X7R 0402
@EMI@
DC23000DY00
2 2 2 GNDA P i n 6 and Pin5
C ON N @
1 2 Normal OPEN
CA13
0.1U 16V K X7R 0402
EMI@
GNDA
GNDA
A A

AUDIO ALC3258-CG
Custttom 0..1
LA-J952P
5 4 3 2 1
5 4
3 2
38,40,56,63,67,77,78 +5VS
1
+5VS
9,14,16,17,52,78,87 +1.8V_PRIM +1.8V_PRIM
+3VALW_EC
7,11,15,16,88 +1.05V_VCCST +1.05V_VCCST
17,64,77,83 +3V_LID +3V_LID
82 +3VALW_EC +3VALW_EC
R19 1 @ 2 47K_0402_5% EC_PME# +VTT_EC +1.05V_VCCST
R20 1 @ 2 100K_0402_5%SPOK
R25 2 @ 1 0_0402_5%
08/22
Need to find power source 1
+3V_SMBUS
C3849
+3VS R3903 1 2 2.2K_0402_5% EC_SMB_CK1 +3VALW_EC +3VLP_ECA 0.1U_0201_10V6K
R3904 1 2 2.2K_0402_5% EC_SMB_DA1 +3VL L5 2
R3905 1 2 2.2K_0402_5% EC_SMB_CK2 R22 FBMA-L11-160808-800LMT_0603 0116
D
R3906 1 2 2.2K_0402_5% EC_SMB_DA2 1@2 1 2 Vendor suggest D
0_0603_5% +1.8V_PRIM
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1
1
+1.8V_PRIM_ESPI
C17
C5234
1 2 PLT_RST# R26 +3V_LID +VTT_EC C5235
R5276 100K_0402_5% For Power consumption 2 2
0_0402_5% 0.1U_0201_10V6K
@ESD@ 2
1 2
Measurement
2
C5252 0.1U_0402_25V6
+3V_LID ECAGND 82
@EMI@ @EMI@ Board ID
1 ESPI_CLK_R
111
117
124
21 2 +3VALW_EC
22
33
96
67
UK1
9
C20 R5277 33_0402_5% 1
22P_0201_50V8J CK11
VCC_ESPI
VCC0
VCC
VCC
VCC
AVCC
2
PECI_VTT
VCC_IO2
0.1U_0201_10V6K R27
1 @ 2 SYS_PWROK 2
eSPI & MISC Ra 100K_0402_1%
R3874 10K_0402_5% 1 21 KBL_ON
2 PCH_DPWROK ESPI_ALERT# GA20/GPIO00 PW M0/GPIO0F EC_BEEP# KBL_ON 63
1 2 23
T135 TP@ EC_GPIO2 ESPI_ALERT#/GPIO01 PW M1/GPIO10 EC_FAN_PWM1 EC_BEEP# 56 BOARD_ID
R3917 10K_0402_5% 3 PW M Output 26
T493 TP@ GPIO02 FANPW M0/GPIO12 EC_FAN_PW M1 77
2 1
1 2 PCH_PWROK ESPI_CS# 4 27
9 ESPI_CS# ESPI_IO3_R ESPI_CS# FANPW M1/GPIO13
R3837 10K_0402_5% ESPI_IO3_R 5 1
9 ESPI_IO2_R ESPI_IO3
ESPI_IO2_R 7 R30
9 ESPI_IO2
+1.8V_PRIM_ESPI
9 ESPI_IO1_R
ESPI_IO1_R 8
ESPI_IO1 AD0/GPIO38
63 B/I#
B/I# 83 Rb 43K_0402_1% C21
ESPI_IO0_R 10 64 0.1U_0201_10V6K
9 ESPI_IO0_R ESPI_IO0 AD1/GPIO39 ADP_I 2@
65
AD2/GPIO3A ADP_I 82,84
1
ESPI_CLK_R 12 66 BOARD_ID
9 ESPI_CLK_R ESPICLK AD Input AD3/GPIO3B ADP_ID
1 13 75
EC_RST# GPIO05 AD4/GPIO42 EC_PME# ADP_ID 82
37 76
W L_PW REN_EC# ECRST# AD5/GPIO43 EC_PME# 51
CK12 20
52 WL_PWREN_EC# PM_CLKRUN#_R GPIO0E
38
+5VS 2 0.1U_0201_10V6K ESPI_RST# 14
GPIO1D +3VL
9 ESPI_RST# ESPI_RST#/GPIO07 EC_VCCST_EN
68
DA0/GPIO3C 70 OPMODE EC_VCCST_EN 11 PBTN_OUT#
DA Output R295 1 @ 2 1K_0402_5%
1 2 MUTE_LED_OUT 63 KSI[0..7] KSI0 55 DA1/GPIO3D 71 PM_SLP_S3#
C 56 KSI0/GPIO30 DA2/GPIO3E 72 TS_GPIO_EC PM_SLP_S3# 11,16 C
R5275 100K_0402_5% KSI1
KSI1/GPIO31 DA3/GPIO3F TS_GPIO_EC 38
KSI2 57 +3VALW
1 2 MUTE_LED_IN KSI3 58 KSI2/GPIO32 83 EC_MUTE#
59 KSI3/GPIO33 SCL2/GPIO4A 84 USB_ON# EC_MUTE# 56 TP_CLK
RK108 10K_0402_5% KSI4 RK12 1 2 4.7K_0402_5%
KSI4/GPIO34 SDA2/GPIO4B 85 USB_ON# 71,73
KSI5 60
61 KSI5/GPIO35 SCL3/GPIO4C 86 TP_DATA
KSI6
KSI6/GPIO36 SDA3/GPIO4D 87 TP_CLK
Remove DGPU_PWR_EN (UMA) _2019/08/01 RK13 1 4.7K_0402_5%
KSI7 62 2
63 KSO[0..17] 39 KSI7/GPIO37 PSCLK3/GPIO4E 88 TP_DATA TP_CLK 63
KSO0 PS2 Interface
E51TXD_P80DATA KSO0/GPIO20 PSDAT3/GPIO4F TP_DATA 63
1 2 KSO1 40
R5278 100K_0402_5% KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL EC_ON
RK116 2 1 100K_0402_5%
43 KSO3/GPIO23 SHICS#/GPIO60 98 SYS_PW ROK ENBKL 6 SUSP#
KSO4 RK117 2 1 100K_0402_5%
KSO4/GPIO24 SHICLK/GPIO61 99 ME_EN SYS_PW ROK 11
KSO5 44
KSO5/GPIO25
Int. K/B GPIO SHIDO/GPIO62 109 ME_EN 10
SYSON RK118 2 1 100K_0402_5%
KSO6 45 VCIN0_PH
KSO7 46 KSO6/GPIO26 Matrix VCIN0/GPIO78 VCIN0_PH 82
KSO8 47 KSO7/GPIO27
R40 1 @ 2 OPMODE
KSO9 48 KSO8/GPIO28 119 VCCIN_AUX_CORE_VID C5253 2 1 0.1U_0201_10V6K
4.7K_0402_5%
KSO9/GPIO29 MISO_SHR_ROM/GPIO5B 120 PLT_RST# VCCIN_AUX_CORE_VID 11
KSO10 49
KSO10/GPIO2A MOSI_SHR_ROM/GPIO5C 126 BT_ON_EC PLT_RST# 11,51,52,66,68
KSO11 50
KSO11/GPIO2B
SPI ROM SPICLK_SHR_ROM/GPIO58 128 BT_ON_EC 52
@ESD@
KSO12 51
52 KSO12/GPIO2C SPICS#_SHR_ROM/GPIO5A
KSO13
KSO13/GPIO2D Remove DGPU_OVT# (UMA)_2019/08/01 PCH_PWROK
OPMODE (Internal Pull High) : KSO14 53
KSO15 54 KSO14/GPIO2E 73
81 KSO15/GPIO2F AD6/GPIO40 74
Remove
PG_VCCIN_AUX EC_VCIN1_AC_BYPASS (UMA) _2019/08/01
Pull Up : Intel eSPI Master Attached Flash Sharing Topology KSO16
82 KSO16/GPIO48 AD7/GPIO41 89 PG_VCCIN_AUX 91 For Sensor Hub BUS
KSO17 2
--> For KB9042 / KB9052 KSO17/GPIO49 LOCK#/GPIO50 90 BAT_CHG_LED (Pin83)EC_MUTE#→ (Pin89)
C22
GPIO52 91 CAP_LOCK# BAT_CHG_LED 82
100P_0201_50V8J
EC_SMB_CK1 CAPSLED#/GPIO53 PWR_LED# CAP_LOCK# 63
Pull Down : Intel Legacy Wire-OR share ROM. 77 GPIO 92 ESD@
83,84 EC_SMB_CK1 EC_SMB_DA1 SCL0/GPIO44 W DT_LED/GPIO54 AC_PRESENT PWR_LED# 73 1
78 93
--> For KB9022/9042 Use 83,84 EC_SMB_DA1 EC_SMB_CK2 79 SDA0/GPIO45 SCROLED#/GPIO55 95 SYSON
AC_PRESENT 11
66 EC_SMB_CK2 EC_SMB_DA2 SCL1_BT/GPIO46 GPIO56 VR_ON SYSON 86
(Link to dGPU/Thermal sensor) 80 121
66 EC_SMB_DA2 SLP_SUS# SDA1_BT/GPIO47 GPIO57 PCH_DPWROK VR_ON 11,88
15 SMBUS 127
11 SLP_SUS# SCL4/GPIO08 GPIO59 PCH_DPW ROK 11
For Solve tPCH04(Min 9ms) Sequence Timing SPOK 19
11,85 SPOK MUTE_LED_OUT 17 SDA4/GPIO0D
63 MUTE_LED_OUT MUTE_LED_IN SCL5/GPIO0B EC_RSMRST#
18 100
56 MUTE_LED_IN SDA5/GPIO0C FANFB2/GPIO63 EC_RSMRST# 11
B 101 B
FANFB3/GPIO64 102 VCIN1_ADP_PROCHOT
VCIN1/GPIO65 103 H_PROCHOT#_EC VCIN1_ADP_PROCHOT 82
GPIO VCOUT1/GPIO66 104 VCOUT0_MAIN_PWR_ON
VCIN1_AC_IN_R EC Pin 110 VCOUT0/GPIO67 105 EC_BKOFF# VCOUT0_MAIN_PWR_ON 85 08/24
1 Rshort@ 2 6
84 VCIN1_ACOK 0_0402_5% 16 GPIO04 GPIO68 106 VCCST_OVERRIDE_LS EC_BKOFF# 38 Change GPIO5B from TP to VCCIN_AUX_CORE_VID
R45
LAN_PW R_EN OW M/GPIO0A GPIO69 PCH_PWR_EN VCCST_OVERRIDE_LS 11
51 LAN_PW R_EN FAN_SPEED1
25
PW M2/GPIO11 GPIO6A
107
PCH_PW R_EN 78,87 Change GPIO69 from DOCK_FLASH to VCCST_OVERRIDE_LS
28 108 NMI_DBG# Change GPIO6A from DOCK_DET2 to EC_VCCST_EN
77 FAN_SPEED1 EC_RTC_RST FANFB0/GPIO14 GW G/GPIO6B
29
E51TXD_P80DATA 30 FANFB1/GPIO15
52 E51TXD_P80DATA E51RXD_P80CLK TXD/GPIO16 GPIO VCIN1_AC_IN_R
31 110
52 E51RXD_P80CLK PCH_PWROK RXD/GPIO17 AC_IN/GPIO79 112 EC_ON
32
11 PCH_PWROK AC_LED# 34 POW ER_FAIL1/GPIO18 GPXIOD02/GPIO7A 114 ON/OFF# EC_ON 64,85
82 AC_LED# PW M3/GPIO19 GPIO7B 115 LID_SW # ON/OFF# 77
R5280 1 @ 2 0_0402_5% PM_CLKRUN#_R VR_PW RGD 36 GPIO
52 EC_PCIE_WAKE# 88 VR_PWRGD NUMLED#/GPIO1A GPXIOD04/GPIO7C 116 LID_SW # 64
SUSP#
PM_CLKRUN# GPIO7D SUSP# 16,78,86
T2405TP@ R5279 1 @ 2 0_0402_5%
118 H_PECI_R R48 1 2 43_0402_1%
PBTN_OUT# PECI/GPIO7F H_PECI 7
11 122
PBTN_OUT# PM_SLP_S4# XCLKI/GPIO5D
11,86 123
EC_RST# PM_SLP_S4# GPIO5E
2 1 330K_0402_5%
+3VALW_EC RK7 @ EC_VCCST_PG_R
125
2 GPIO7E EC_VCCST_PG_R 11
AGND
ESD@ 1
GND
GND
GND
GND
GND
CK5 0.1U_0402_16V7K
KB9052Q-D_LQFP128_14X14 +3VALW_EC
11
24
35
94
113
ECAGND 69
20mil
1 Rshort@ 2 PROCHOT#
PROCHOT# 88
2
R51 0_0402_5% Remove B/I#_2019/08/15
H_PROCHOT# 1 Rshort@ 2 H_PROCHOT#_EC L6 2 1 RC4047
7 H_PROCHOT# 0_0402_5%
R52 FBMA-L11-160808-800LMT_0603 10K_0201_5%
1
NMI_DBG# 1 2 NMI_DBG#_CPU
NMI_DBG#_CPU 7
SOC_SRTCRST# 11
DK2 SCS00000Z00
SOC_RTCRST# 11
A RB751V-40 SOD-323 A
6
QK4A
L2N7002SDW1T1G 2N SC88-6 QK4B
EC_RTC_RST 2 L2N7002SDW1T1G 2N SC88-6
SB00001FF00 EC_RTC_RST 5
1
SB00001FF00
1
RK49
4
10K_0201_5%
2
EC ENE-KB9052QD Only

5 4 3 2 1
9,11,17,51,52,58,66,78,85,86,87,91 +3VALW +3VALW
16,67,71,73,78,85,86,88,89,91 +5VALW +5VALW

TP Button BD Connector
+3VALW
CONN@
JTP
58 KSI[0..7]
KSI7
KSI6
Keyboard conn
1 KSI5
2 1 KSI4
58 TP_CLK 2
3 KSI3 CONN@
58 TP_DATA 3
4 KSI2 JKB
4 KSI1
5 7 KSI1 32 34
9 TP_SMBCLK 5 G1 KSI0 32 G2
6 8 KSI7 31 33
9 TP_SMBDATA 6 G2 31 G1
KSI6 30
30
PS2+SMBus ACES_51524-0060N-001
SP010014M10
KSO9
KSI4
29
28
29
27 28
58 KSO[0..17] KSI5
KSO17 26 27
1 1 KSO0
25 26
@ @ KSO16 JKB1 KB Spec KSI2
25
C135 C136 KSO15 KSI3 24
KSO14 23 24
Pin1 KSI1 KSI1 KSO5 23
2 2 KSO13 KSO1 22
KSO12 21 22
Pin32 5V 5V
470P_0402_50V8J
470P_0402_50V8J
KSI0 21
KSO11 KSO2 20
20
KSO10 KSO4 19
KSO9 19
KSO7 18
KSO8 18
KSO8 17
KSO7 17
KSO6 16
KSO6 16
KSO3 15
KSO5 15
KSO12 14
KSO4 14
KSO13 13
KSO3 13
1st:SCA00000T00, S ZEN ROW PESD5V0U2BT 3P CC SOT23 ESD KSO14 12 12
2nd:SCA00001L00, S ZEN ROW L30ESDL5V0C3-2 CA SOT23 ESD KSO2 KSO11 11
3rd:SCA00001100, S ZEN ROW PJDLC05C 3P CA SOT23 KSO1 11
KSO10 10 10
4th:SC600001600, S DIO ROW AZC199-02S.R7G CC SOT23 ESD KSO0 9
KSO15 9
DM5 ESD@ 8
KSO16 8
TP_SMBCLK 6 3 TP_SMBDATA R203 KSO17 7
I/O4 I/O2 7
1K_0402_5% +5VS CAP_LOCK#_R 6 6
CAP_LOCK# 1 2 5
58 CAP_LOCK# 5
1 2 MUTE_LED_OUT_R 4 4
58 MUTE_LED_OUT
5 2 R207 3 3
+3VALW VDD GND 549_0402_1% 2 2
1 1
+5VS
TP_CLK 4 1 TP_DATA ACES_50690-0320N-P01
I/O3 I/O1 CAP_LOCK# SP01001RG00
MUTE_LED_OUT
AZC099-04S.R7G_SOT23-6
ESD@
1 1 KSI0 C193 2 1 100P_0402_50V8J
Eletro-XTechnical0029 CC122 CC123 Eletro-XTechnical0029

2 100P_0402_50V8J 2 100P_0402_50V8J
ESD@ ESD@
Function Field:32.1,32.4
+5VS +5VS +5VS_KBL
1 R24 2
0_0603_5%
+5VS_KBL Rshort@
1
R23
100K_0402_5%
JKBL CONN@
4 6
2
3 4 G2 5
2 3 G1
KBL_ON_GND 2
1
1
Q9 ACES_51575-00401-001
1
AO3416L 1N SOT-23 SP01002BY00

SB00000FG10
2
KBL_ON 58
3

KB/TP
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RIT TEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J951P
5 4
3 2 1
ESD Diode
LID_SW#
D
77 ON/OFF#_R ON/OFF#_R D
2
ESD@
D40 1st:SCA00001B00, S ZEN ROW AZ5123-02S.R7G 3P CASOT23
SCA00001B00 2nd:SCA00003400, S ZEN ROW L18E3V3CC3-2C 3P CA SOT-23
AZ5123-02S.R7G 3P CA SOT23 3rd:SCA00001A00, S ZEN ROW AZ5125-02S.R7G 3P CA SOT23
1
Lid Switch (Hall Effect Sensor)

RB751V-40SOD-323
+3V_LID
+3VL +3V_LID
1
2
DH1 R5285
200K_0402_5%
2
C SCS00000Z00 U3 C
1
3 LID_SW#
OUT LID_SW # 58
2
VDD 1
J
10P_0402_50V8
GND 1 1
C5247
J
100P_0402_50V8
C5248
1 APX8131AI-TRGSOT-23
C5249 SA00009EM00
2 2 ESD@
0.1U_0201_10V6K
2
B B
+3V_SMBUS
SCS00000Z00
2 1
+3VL
DH2
RB751V-40 SOD-323
A A
2 1
58,85 EC_ON
DH3 SCS00000Z00
RB751V-40SOD-323

Issued Date 2018/01/08 2020/01/08 Tiitlle
Deciphered Date
HW Reserve
Custom 0.1
5 4 3 2 1
5 4
3 2 1
+3VALW +3VALW 9,11,17,51,52,58,63,78,85,86,87,91
D D
TPM2.0 UT1
+3VS_TPM +3VALW
TPM@
1 TPM@ 2 PLT_RST#_TPM 17 1 RC9341 2 0_0402_5%
11,51,52,58,68 PLT_RST# RST# VDD
R28 0_0402_5% 8
1 TPM@ 2 TPM_SERIRQ 18 VDD 22
10 SERIRQ PIRQ# VDD 1 1 1 1 1
R5202 0_0402_5% CT1 CT3 CT4 CT5 CT2
RT13 1 TPM@ 2 0_0402_5% SOC_SPI_0_CLK_TPM_R RT6 1 2 SOC_SPI_0_CLK_TPM 19 3
9 SOC_SPI_0_CLK SCLK NC
K
1U_0201_6.3V6
1U_0201_6.3V6K
4
Z
0.1U_0402_16V4
Z
0.1U_0402_16V4
TPM@ 33_0402_5%
Z
0.1U_0402_16V4
RT7 1 2 SOC_SPI_0_CS#2_TPM 20 NC 5 2 2 2 2 2
9 SOC_SPI_0_CS#2 CS# NC
TPM@ 33_0402_5% 10
R 41T 1 TPM@ 2 0_0402_5% SOC_SPI_0_D0_TPM_R RT8 1 2 SOC_SPI_0_D0_TPM 21 NC 11
TPM@
TPM@
TPM@
TPM@
TPM@
9 SOC_SPI_0_D0 MOSI NC
TPM@ 33_0402_5% 12
1
RT15 TPM@ 2 0_0402_5% SOC_SPI_0_D1_TPM_R RT9 1 2 SOC_SPI_0_D1_TPM 24 NC 13
9 SOC_SPI_0_D1 MISO NC
TPM@ 33_0402_5% 14
2 1 TPM_GPIO 6 NC 15
+3VS_TPM GPIO NC
RT10 TPM@ 4.7K_0402_5% 16
TPM_PP 7 NC 25
1 @2 PP
RT35 4.7K_0402_5% NC 26
2 NC 27
9 GND NC 28
NC
1
23 GND 29
RT12 32 GND NC 30
4.7K_0402_5% GND NC 31
33
PAD NC
TPM@
C TPM@ C
2
SLB9670VQ1.2 FW 6.40_VQFN32_5X5
SA00009N230
B B
Finger printer CPU THERMAL SENSOR

Address : 0x48
UC11
1 5
58 EC_SMB_CK2 SMBCLK SMBDATA EC_SMB_DA2 58
2 +3VS
GND
3 4
ALERT# +Vs
1
CC127
G753T11U_SOT23-5 0.1U_0201_10V6K
SA00008CH00
2
A A

TPM/Screw
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D SiiizeDocument Number Rev
0.1
5 4 3 2 1
5 4
3 2 1
38,40,56,58,63,77,78 +5VS +5VS
2.5" SATA HDD 16,71,73,78,85,86,88,89,91
9,11,17,51,52,58,63,66,78,85,86,87,91
+5VALW
+3VALW
+5VALW
+3VALW
D D
<PV> change short pad

CONN@
+5VS JHDD
*Design Constraint:AC capacitors to be placed as close
as possible to the connector. +5VS_HDD1 1
Maximum distance from AC capacitors to connector is 500
mils.
21
R201 1 Rshort@20_0603_5% 13 C155 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0 32
+5VS_HDD1 SATA_CTX_DRX_P0
13 SATA_CTX_DRX_N0 C156 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_N0 4 3
R202 1 Rshort@20_0603_5% 54
C153 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N0 5
6
13 SATA_CRX_DTX_N0 C154 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 7 6
13 SATA_CRX_DTX_P0 7
8
8
2 9
GND
10
GND
C140
ACES_51524-00801-001
1 470P_0402_50V8J SP01001A910
@EMI@
C C
SATA ODD
+5VALW
1
ROD1
100K_0402_5%
2
JODD
1
D +5VS_ODD
1
S1
2 QOD2 ROD2 CS11 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 S2 GND
10 ODD_PW R 13 SATA_CTX_DRX_P1 SATA_CTX_C_DRX_N1 A+
G 2N7002K_SOT23 1K_0402_5% CS14 2 1 0.01U_0402_16V7K S3
13 SATA_CTX_DRX_N1 A-
S SB00000EN00 COD1 S4
3
2 1 CS15 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_N1 S5 GND

13 SATA_CRX_DTX_N1 SATA_CRX_C_DTX_P1 B-
2 2
B +5VS_ODD CS18 2 1 0.01U_0402_16V7K S6 B

13 SATA_CRX_DTX_P1 S7 B+
0.047U_0402_16V7K
R5192 1 Rshort@ 2 0_0402_5% ODD_PLUG#_R GND
G
80mil 3 1
80mil 13 ODD_PLUG# R5193 1 Rshort@0_20402_5% ODD_DA#_R
+5VS 10 ODD_DA# P1
S
4.7U_0402_6.3V6M
P2 DP
M
10U_0402_6.3V6
1 1 1
0.1U_0402_16V7K
QOD1 @ P3 +5V
PJ2301 1P SOT23-3 P4 +5V
COD2
P5 MD
COD3
COD4
SB00000T900 1 1
2 2 2 P6 GND GND 2
2@ 1 ESD@ GND GND
ROD3 0_0805_5% CS28
2 0.1U_0402_16V7K SDAN_603010-013041
SP010029L00
SDAN_603010-013041_13P
CONN@
A A

HDD/ODD Conn
Custom 0.1
Date: Wednesday, Aprilllii22, 2020 Sheet 67 of 100
5 4 3 2 1
5 4
3 2 1
+3VS +3VS_SSD
8,9,10,11,12,13,23,24,38,40,51,56,58,66,73,77,78,88 +3VS +3VS
JPHW 9
1 2
1 2
JUMP_43X79 CS27 CS7 CS8 CS9
1 CS5 1 CS6 JUMP@ 1@1 1 1
1
47U_0603_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V6K
1U 6.3V M X5R 0201

18P_0201_50VNPO
10P_0201_50V
RF@ RF@ CS10
2 10P_0201_50V
2
2 2 2 2 2 RF@
D D
JSSD
1 2 +3VS_SSD
GND 3P3VAUX
3 4
GND 3P3VAUX
13 PCIE_CRX_DTX_N13 5 6 DS1
PETn3 NC
13 PCIE_CRX_DTX_P13 7 8
PETp3 NC SSD_LED# 1 2 SOC_SATALED#
9 10 SOC_SATALED# 9,73
CSS1 1 2 0.22U_0201_10V6K PCIE_CTX_C_DRX_N13 GND DAS/DSS#
13 PCIE_CTX_DRX_N13 11 12
CSS3 PCIE_CTX_C_DRX_P13 PERn3 3P3VAUX
13 PCIE_CTX_DRX_P13 1 2 0.22U_0201_10V6K 13 14 RB751V-40SOD-323
PERp3 3P3VAUX
15 16
GND 3P3VAUX SCS00000Z00
13 PCIE_CRX_DTX_N14 17 18
PETn2 3P3VAUX 20
13 PCIE_CRX_DTX_P14 19 NC
PETp2 22
21 NC
CSS2 1 2 0.22U_0201_10V6K PCIE_CTX_C_DRX_N14 GND 24
13 PCIE_CTX_DRX_N14 23 NC
CSS4 PCIE_CTX_C_DRX_P14 PERn2 26
1 2 0.22U_0201_10V6K 25
13 PCIE_CTX_DRX_P14
13 PCIE_CRX_DTX_N15
27
29
PERp2
GND
PETn1
Key TYP. M NC
NC
NC
28
30
<SSD> 13 31 32
PCIE_CRX_DTX_P15 PETp1 NC
33 34
PCIE_CTX_C_DRX_N15 GND NC
13 C 2 0.22U_0201_10V6K 35 36
PCIE_CTX_DRX_N15 PERn1 NC
13 SS6 1 2 0.22U_0201_10V6K PCIE_CTX_C_DRX_P15 37 38
PCIE_CTX_DRX_P15 PERp1 DEVSLP 40 DEVSLP2 13
C CSS7 1 39 C
GND NC
41 42 RS46 1 @ 2 10K_0402_5%
13 PCIE_CRX_DTX_P16 PETn0/SATA-B+ NC
43 44
13 PCIE_CRX_DTX_N16 PETp0/SATA-B- NC
45 46
PCIE_CTX_C_DRX_N16 GND NC
13 C 2 0.22U_0201_10V6K 47 48
PCIE_CTX_DRX_N16 PERn0/SATA-A- NC PLT_RST#_SSD RT3
13 SS8 1 2 0.22U_0201_10V6K PCIE_CTX_C_DRX_P16 49 50 1 Rshort@ 20_0201_5% PLT_RST#
PCIE_CTX_DRX_P16 PERp0/SATA-A+ PERST# 11,51,52,58,66
CSS9 1 51 52 CLKREQ_PCIE#3
GND CLKREQ# CLKREQ_PCIE#3 11
11 CLK_PCIE_N3 53 54
REFCLKN PEWake# 56
11 CLK_PCIE_P3 55 NC
REFCLKP 58
57 NC
GND
+3VS
67 68
NC SUSCLK(32kHz)
1
69 70
RS22 PEDET 3P3VAUX
71 72
GND 3P3VAUX
10K_0402_5% 73 74
GND 3P3VAUX
75
GND 76
2
2
GND1 77
@EMI@ GND2
CS16
13 SATA_GP2
YPCI0016-P003A 67PA32
D 1 VARIST_ CK0402101V05 0402
1
DC04000L9A0 CONN@
2 SSD_PDET
G
S QS1 SB000009Q80
3
2N7002KW _SOT323-3
B pre PV: change to 10K for redriver detect pin voltage level B
A A

M.2 SSD
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
SiiizeDocument Number Rev
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS LA-J951P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W IT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
A B
USB3_CTX_C_DRX_N1 RS2 1 Rshort@ 2 0_0402_5% USB3_CTX_L_DRX_N1

Eletro-XTechnical0034 C D E
2 1 +5VALW
13 USB3_CTX_DRX_N1 16,67,73,78,85,86,88,89,91 +5VALW
CS2 0.1U_0402_16V7K
2
RG75
2018-08-08: @ 150_0402_5% +USB_V CCA
+5VALW
RS1 , RS2 Change to short pad W=100mils
US1
1
W=100mils 1
5 OUT
USB3_CTX_C_DRX_P1 RS1 1 Rshort@ 2 0_0402_5% USB3_CTX_L_DRX_P1 1 IN
150U_B2_6.3VM_R45M
2 1 2 1
13 USB3_CTX_DRX_P1 GND
1000P_0402_50V7K
0.1U_0402_16V7K
CS1 0.1U_0402_16V7K CS3 4
47U_0805_6.3V6M
1 1 1 @
EN +
3
CS30
CS22
0.1U_0402_16V7K
2 OCB CS4 CS29 CS31
2 1
EMI@ 390P_0402_50V7K
R S6 1 Rshort@ 2 0_0402_5% USB3_CRX_L_DTX_N1 EM5203J-20 SOT23 5P LOAD SW ITCH 2 2 2 2 EMI@
13 USB3_CRX_DTX_N1
SA00008RA00
1 1
2
USB_ON# RS4 1 Rshort@ 2 0_0402_5%
2018-08-08: RG76 58,73 USB_ON#
@ 150_0402_5%
RS3 , RS6 Change to short pad
1
RS3 1 Rshort@ 2 0_0402_5% USB3_CRX_L_DTX_P1
13 USB3_CRX_DTX_P1
USB2.0/USB3.0 port 1
2018-07-27: +USB_V CCA
JUSB1
Del reserved EMI part on MV for DFB request DM2 ESD@ 1
RS47,RS48 USB3_CTX_L_DRX_P1 USB3_CTX_L_DRX_P1 USB20_N1_R VBUS
1 1 10 9 2
SM070005U00 DLM0NSN900HY2D_4P USB20_P1_R 3 D-
1 2 USB20_P1_R USB3_CTX_L_DRX_N1 22 9 8 USB3_CTX_L_DRX_N1 4 D+
13 USB20_P1 1 2 USB3_CRX_L_DTX_N1 GND1
5
USB3_CRX_L_DTX_P1 USB3_CRX_L_DTX_P1 USB3_CRX_L_DTX_P 1 SSRX-
44 7 7 6 10
4 3 USB20_N1_R 7 SSRX+ GND3 11
13 USB20_N1 3
LM3 4 USB3_CRX_L_DTX_N1 55 6 6 USB3_CRX_L_DTX_N1 USB3_CTX_L_DRX_N1 8 GND2 GND4 12
EMI@ USB3_CTX_L_DRX_P 1 SSTX- GND5
9 13
33 SSTX+ GND6
ACO N_TARAW -9U1395_9P-T
8 DC231709285
USB2.0 Choke Part:
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA) 2nd: CONN@
SM070004X00, S COM FI_ PANASONIC EXC14CE900U(PANASONIC)
SC300001Y00
2 2
DM15
USB20_P1_R 6 3 USB20_P2_R
I/O4 I/O2
2018-07-27: +USB_VCCA 5 2
USB2.0 Choke Part: VDD GND
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA) Del reserved EMI part on MV for DFB request
2nd: SM070004X00, S COM FI_ PANASONIC EXC14CE900U(PANASONIC) RS49,RS50
SM070005U00 DLM0NSN900HY2D_4P USB20_N1_R 4 1 USB20_N2_R
1 2 USB20_P2_R I/O3 I/O1
13 USB20_P2 1 2 AZC099-04S.R7G_SOT23-6
SC300001G00
4 3 USB20_N2_R
13 USB20_N2 3 ESD@
LM5 4
EMI@
Eletro-XTechnical0034 USB2.0/USB3.0 port 2 Eletro-XTechnical0034

+USB_VCCA
2 1 USB3_CTX_C_DRX_N2 RS7 1 Rshort@ 2 0_0402_5% USB3_CTX_L_DRX_N2
13 USB3_CTX_DRX_N2
CS23 0.1U_0402_16V7K JUSB2
1
2
USB20_N2_R 2 VBUS
RG106 USB20_P2_R 3 D-
2018-08-08: @ 150_0402_5% 4 D+
USB3_CRX_L_DTX_N2 5 GND1
RS8 , RS7 Change to short pad USB3_CRX_L_DTX_P2 SSRX- 10
6
1
7 SSRX+ GND3 11
USB3_CTX_L_DRX_N2 8 GND2 GND4 12
21 USB3_CTX_C_DRX_P2 1 2 0_0402_5% USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P2 9 SSTX- GND5
13 USB3_CTX_DRX_P2
RS8 Rshort@ 13
CS24 0.1U_0402_16V7K SSTX+ GND6
ACO N_TARAW -9U1395_9P-T
DC231709285
CONN@
3 RS10 1 Rshort@ 2 0_0402_5% USB3_CRX_L_DTX_N2 3
13 USB3_CRX_DTX_N2 DM14 ESD@
USB3_CRX_L_DTX_N2 USB3_CRX_L_DTX_N2
1 1 10 9
2
USB3_CRX_L_DTX_P2 2 2 9 8 USB3_CRX_L_DTX_P2
2018-08-08: RG107
@ 150_0402_5% USB3_CTX_L_DRX_N2
4 4 7 7 USB3_CTX_L_DRX_N2
RS10 , RS9 Change to short pad
USB3_CTX_L_DRX_P2 5 5 6 6 USB3_CTX_L_DRX_P2
1
33
R S9 1 Rshort@ 2
0_0402_5% USB3_CRX_L_DTX_P2
13 USB3_CRX_DTX_P2 8

SC300001Y00
4 4

Issued Date 2018/05/17 Deciphii ered Date 2021/05/17 Tiiitttllle
USB 3.0/2.0 conn
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIVIIISIIION OF R&D Siiize Documenttt Num ber R e v
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS Cus t om V0.. 2
A B Eletro-XTechnical0034 C D
Dattte::: Wednesday,,, Apriiilll 22,,, 2020
E
Sheettt 71 o ff 100
5 4
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED )

EMI@ C139 470P_0402_50V8J
1 2
CONN@
D D
JIO
+5VALW 1
2 1
3 2
3
4
4
5
5
+3VS 6
6
7
USB20_N4_R 8 7
USB20_P4_R 9 8
Card reader 10
9
USB20_N3_R 10
11
USB20_P3_R 11
USB2.0(ON SMALL BD) 12
12
13
58,71 USB_ON# 13
14
14
SOC_SATALED# 15 15
9,68
16 16
58 PWR_LED#
17 17
1 1 18 18
EMI@ EMI@
C138 C137 19
G1 20
2 2 G2
470P_0402_50V8J
470P_0402_50V8J
CVILU_CF31181D0R4-10-NH
SP011411241
C C
Eletro-XTechnical0035 2018-07-27:
Del reserved EMI part on MV for DFB request
RS51,RS52,RS53,RS54
LM6 EMI@
4 3 USB20_N3_R
13 USB20_N3 4 3
3.3P_0402_50V8J CC4028
1 2 USB20_P3_R
13 USB20_P3 1 2
EMI@
SM070005U00 DLM0NSN900HY2D_4P
B B
2018-07-27:
Del reserved EMI part on MV for DFB request
RS51,RS52,RS53,RS54
LM7 EMI@
4 3 USB20_N4_R
13 USB20_N4 4 3
3.3P_0402_50V8J CC154
1 2 USB20_P4_R
13 USB20_P4 1 2
EMI@
SM070005U00 DLM0NSN900HY2D_4P
A A

Deciphered Date
HW Reserve
Custom 0.1
5 4 3 2 1
A B
C D E
+5VS
+3VS
1A 40 mils
1
L Layout notes CONN@ 1
1
R5261 1 Rshort@ 2 0_0402_5% +FAN1 JFAN
R5262 1 Rshort@ 2 0_0402_5% C4801 C5214 close to CONN RE50 6
5 GND2
10K_0402_5%
GND1
+FAN1 4
M
10U_0402_6.3V6
C4801
K
0.1U_0402_16V7
C5214
1 1 4
2
3
58 FAN_SPEED1 3
Close to Connector 1 58 EC_FAN_PW M1
2
2
CE24 1
2 2 1
0.01U_0402_25V7K
ACES_50271-0040N-001
2 SP02000TS00
+FAN1
RE51
1@2 EC_FAN_PW M1
10K_0402_5%
2 2
Screw Hole
GPU CPU
H1 H2 H4 H5 H8 H9 H10 H11
H_2P4N H_3P0-G H_3P0-G H_3P0-G H_5P0-G H_5P0-G H_5P0-G H_5P0-G
@ @ @ @ @ @ @ @
1
ROM Standoff +3V_LID

H20 +3VL
H13 H14 H16 H17 H18 H19 CLIP_C4P0
Power Button Switch
1
H_2P3-G H_3P3 H_2P3-G H_2P4X2P9N H_6P0N H_6P0N
R215
2
@ 100K_0402_5% SW 1 SN10000CU00
1
3 @ @ @ @ @ @ Q4108 3
G
1
SW TJG-533KQRH SPST DIP H1.55 6P
2
ON/OFF# 1 3 ON/OFF#_R 1 3
58 ON/OFF#
S
2 4
2N7002K_SOT23-3
2
FD1 FD2 FD3 FD4 SB00000EN00 @
6
5
CC355 JP6
100P_0402_50V8J
1
@ @ @ @ @ESD@ SHORT PADS
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

L Layout notes
JP6 place Bottom layer
64 ON/OFF#_R ON/OFF#_R
4 4

Deciphered Date
FAN
Custom 0.1
A B C D E
A B
Eletro-XTechnical0037 C D E
+3VS +3VS 8,9,10,11,12,13,23,24,38,40,51,56,58,66,68,73,77,88
+5VS +5VS 38,40,56,58,63,67,77

+5VALW
+5VS
M
22U_0603_6.3V6
6
0.1U_0402_25V
1 1 1 1 1
@RF@
CC364
M
10U_0402_6.3V6
C5239
CC358
CC359
@ESD@
0.1U_0402_25V6
0.1U_0402_25V6
@ESD@ CC363
1 SA00007PM00 1
2 2 EM5209VF_DFN14_3X2 2 2 2
15
GPAD
@ESD
7 8
VIN2
@
6 VOUT2 9
+5VALW VIN2 VOUT2
SUSP# 5 10 C5238 1 2 100P_0402_50V8J
16,58,86 SUSP# ON2 CT2
4 11
VBIAS GND
+3VALW SUSP# 3 12 C5237 1 2 680P_0402_50V7K
ON1 CT1
2 13
VIN1 VOUT1 +3VS
1 14
VIN1 VOUT1
1
Q4109
M
10U_0402_6.3V6
C5236
1 1 1 2
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
CC36
CC36
CC36
2 2 2
0
@ESD@ @ESD@ @ESD@
2 2
I (Max) : 0.2 A( Codec )

RDS(max) : 150 mohm
+1.8V_PRIM TO +1.8VS V drop : 0.03V
Eletro-XTechnical0037 +1.8V_PRIM Q4110

LP2301ALT1G 1P SOT-23-3
+1.8VS_VOUT +1.8VS Eletro-XTechnical0037
3 1
SB00000T900 For +1.8V_PRIM Discharge
S
+5VALW
1 1
C5244 C5240 +5VALW +1.8V_PRIM
G
1U_0201_6.3V6K 1U_0201_6.3V6K 1 1 1 1
2
K
1U_0201_6.3V6
C5241
K
1U_0201_6.3V6
C5242
K
0.1U_0201_10V6
C5243
M
4.7U_0402_6.3V6
C5245
2 2
1
2 R5369 1 100K_0402_5%SUSP SUSP R5281 1 2 1.8VS_EN# 2 2 2 2 R5282 R5283
47K_0402_5% 1 100K_0402_1% 22_0603_1%
C5246
3 2
3 3
0.1U_0201_10V6K
2
Q4111B
PCH_PW R_EN# 5 L2N7002SDW1T1G 2N SC88-6
SB00001FF00
4
JP@JP7
1 2
+1.8VS_VOUT 1 2 +1.8VS
6
JUMP_43X39 Q4111A
2 L2N7002SDW1T1G 2N SC88-6
58,87 PCH_PW R_EN SB00001FF00
+1.8VS
1
1 R5284 2
470_0603_5%
SUSP
6
QF1B
QF1A
L2N7002SDW 1T1G 2NSC88-6 L2N7002SDW1T1G 2N SC88-6
SUSP 2 5 SUSP#
SB00001FF00 SB00001FF00
1
4 4
Add +1.8VS power down Security Classification Compal Secret Data Compal Electronics, Inc.
DC Interface
Custom 0.1
A B C D E
5 4
D D
+19V_ADPIN EMIVGA@ PL12

+19V_VIN
5A_Z80_0805_2P
1 2
@ PR1
0_0402_5%
EMI@ PL11 1 2 ACIN_LED
PJP1 58 AC_LED#
5A_Z80_0805_2P
1 1 2
1
1
2
2
3
3
1000P_0402_50V7
0.022U_0402_25V7
4 PR2
4
100P_0402_50V8
1000P_0402_50V7
5 100K_0402_5%
5
1
ADP_SIGNAL
1
6
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
6
2
7 Charge_LED
7 ACIN_LED
8
8
2
9
10 GND PR4
GND
K
K
750_0402_1%
K
1 2 Charge_LED
ACES_51483-00801-001 PR3 58 BAT_CHG_LED
1
@ 10K_0402_1%
ADP_SIGNAL1 2
ADP_ID 58 PR6
3
3
100K_0402_5%
C C
2
LUDZS3.6BT1G_SOD323-
100P_0402_50V8
1000P_0402_50V7
1
1
10K_0402_1
PR5
PC6
@ PC5
PD3
2
ESD@ PD1 ESD@ PD2
2
1
2
CEST23NC24VU_SOT23-3 CEST23NC24VU_SOT23-3
K
2
58,84 ADP_I
+3VALW_EC
B B
1
PR9 PR10
16.2K_0402_1% 5.9K_0402_1%
VCIN0_PH 58 VCIN1_ADP_PROCHOT 58
1 2
1 2
PH1
100K_0402_1%_B25/50 4250K PR13
10K_0402_1%
2
ECAGND 58
A A

DC Conn
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS GPI50 0.1
5 4 3 2 1
5 4
3 2 1
D D
+3V_LID
@ PR18
0_0402_5% EMI@ PL13
1 2 5A_Z80_0805_2P
1 2 +12.6V_BATT
OCTEK_BTJ-08KPBR4B
10 +12.6V_BATT+
GND 9 EMI@ PL14
GND 8 5A_Z80_0805_2P
8 7 1 2
7 6 EC_SMB_CK1_R
100P_0402_50V8
6 EC_SMB_DA1_R
0.01UF_0402_25V7
5
5
@EMI@ PC10
1
1
1
4 +3V_LID_R EMI@ PC8 @EMI@PC11
EMI@ PC9
4 3 B/I#_R 1000P_0402_50V7K 1000P_0402_50V7K
3 2
2
2
2
1
C
1 C
@ PJPB1
J
+3V_LID +19VB
K
PR14
100_0402_5%
1 2
EC_SMB_CK1 58,84
PR15
1
1
100_0402_5%
PR20
1.8K_0805_1
1 2
EC_SMB_DA1 58,84 470K_0402_5%
PR19
+3VL
2
%
1
PR16
100K_0402_5%
6
PR17
100_0402_5%
2
1 2
B/I# 58 2 PQ2A L2N7002SDW
1T1G 2N SC88-6
1
1
+3VL 5
1M_0402_5
PR21
B B
PQ2B
4
L2N7002SDW1T1G 2N SC88-6 @
%
A A

BATT Conn
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS GPI50 0.1
5 4 3 2 1
A B C D
Protection for reverse input
1
D +19VB
2
G @ PQB2
2N7002KW _SOT323-3
CHG_N002
S
3
PRB2 @ @ PRB3
1 1M_0402_5% 3M_0402_5% 1
1 2 1 2
+19V_VIN P1
PQB11 P2 +19VB_CHG
PQB12 PRB1 PQB13
EMB04N03H_EDFN5X6-8-5 EMB12N03V_N_DFN33-8-5 EMI@ PLB11 EMB12N03V_N_DFN33-8-5
0.01_1206_1%
1 1UH_2.8A_30%_4X4X2_F
2 1 5 1 4 1 2 5 1
5 3 2 2
3 2 3 3
EMI@ PCB25
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
1
+19V_VIN
0.01UF_0402_25V7K
4
4
@EMI@ PCB8
1
1
PCB4
PCB6
PCB7
PCB5
1
4
PCB9
2
2
2
2
3
2
PDB1
ACDRV_CHG_R BAS40CW _SOT323-3
BATDRV_CHG 1 2 BATDRV_CHG_R
0.1U_0402_25V6
0.1U_0402_25V6
1
1
PRB5
PCB1
PCB11
CHG_N003 PCB12
1 1
12 4.12K_0603_1%
0.047U_0402_25V7K
PRB6 10_1206_1%
2
PCB10 12 CHG_N001 PQB1
10
0.1U_0402_25V6 EMB09A03VP_EDFN3X3-8-10
1
5 4
D1
S2 D1
2.2_0603_5
PDB2
PRB7
2
RB751V-40_SOD323-2 3
2 6 S2 D1 2
VCC_CHG
2
%
7 S2 D1
+12.6V_BATT
D2/S1
8 1 UG_CHG
4.12K_0603_1%
4.12K_0603_1%
G2 G1
1
REGN_CHG
PCB13
BTST_CHG
PRB9
PRB10
1 2 PLB1 PRB11
UG_CHG
LX_CHG
9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0402_25V6K 1 2
ACP_CHG
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
PCB14
1U_0402_25V6K 2 3
17
16
18
19
20
SRN_R
SRP_R
VCC
BTST
REGN
HIDRV
PHASE
21
EMI@ PRB12
4.7_1206_5%
PAD
0.1U_0402_25V6
0.1U_0402_25V6
1 15 LG_CHG
10U_0603_25V6M
10U_0603_25V6M
ACN LODRV
1
PCB17
PCB18
1
1
PUB1
SNUB_CHG 2
PCB15
PCB16
2 14
GND
2
ACP
PRB13
2
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
CMSRC_CHG 3 13 SRP1 2 SRP_R
CMSRC SRP
1
PRB14
6.8_0603_1% PCB20
1
ACDRV_CHG 4 12 SRN1 2 SRN_R .1U_0402_16V7K
680P_0402_50V7K
SRN
2
ACDRV
EMI@ PCB19
2
1 2 5 11 BATDRV_CHG
+3VL ACOK BATDRV
PRB15
ACDET
100K_0402_1%
IOUT
SDA
SCL
ILIM
3 3
58 VCIN1_ACOK
6
10
+3VL
ILIM_CHG 1 2
IOUT_CHG
ACDET_CHG
SDA_CHG
SCL_CHG
PRB16
100K_0402_1%
1
453K_0402_1%
PRB20
VILIM = 20*ILIM*Rsr
1
PRB17
PCB21
422K_0402_1%
ILIM = 3.3*100/(100+453)/20m
0_0402_5%
0_0402_5%
1 2 0.01UF_0402_25V7K
+19V_VIN = 2.98 A
2
1
2
PRB1
PRB1
8
2
9
2
@ @
EC_SMB_CK1 58,83
0.22U_0402_16V7K
Vin Dectector
1
100P_0402_50V8
73.2K_0402_1%
1
1
PCB23
PRB21
PCB22
Min. Typ Max. EC_SMB_DA1 58,83

L-->H 17.16V 17.63V 18.12V
2
@ PRB22
H-->L 16.76V 17.22V 17.70V
2
0_0402_5%
1 2
ADP_I 58,82
J
PCB24
4 4
0.1U_0402_25V6
2
Close EC chip

Issued Date 2019/10/15 Deciphered Date 2021/10/15 Tiiitllle
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
CHARGER
Siiize Document Number R ev
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, Apriiilll 22, 2020 Sheet 84 o f 100
A B C D
5 4
keep short pad,

snubber is for EMI only.
+19VB EMI@ PL304 PU301 @ PR302 PC302

5A_Z80_0805_2P SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0402_25V6
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2
2200P_0402_50V7
D D
0.1U_0402_25V6
1
1
EMI@ PC304
@EMI@ PC303
10U_0603_25V6
1
PC305
2 1
PL302
IN
IN
IN
IN
BS
2
2
1.5UH_6A_20%_5X5X3_M
LX_3V 6 20 LX_3V 1 2
+3VALWP
K
LX LX
M
7 19
GND LX
+3VALW
1
8 18
PR303
@EMI@
680P_0402_50V7K 4.7_1206_5%
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
GND GND
PC306
PC307
PC308
PC309
2 1
9 17
+3VLP
2
PG LDO
1
10 16 @
2N
NC NC
13V_S
PC310
OUT
EN2
EN1
M
PR304 21 4.7U_0402_6.3V6M
NC
FF
2
100K_0402_5% GND
@EMI@
2
12
13
11
14
15
3.3V LDO 150mA~300mA
PC311
2
11,58 SPOK
ENLDO_3V5V PC312 PR305
1000P_0402_50V7K 1K_0402_1% Iocp=8A
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
EN1 and EN2 dont't be floating. Fsw : 600K Hz 1

@ PJ302
2
EN :H>0.8V ; L<0.4V +3VALWP 1 2 +3VALW
JUMP_43X118
C C
@ PJ303
JUMP_43X39
1 2
+3VLP 1 2 +3VL
2 Cell battery : Cin=10uF*2pcs

3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
+19VB EMI@ PL303 +19VB_5V @ PR306 PC313

5A_Z80_0805_2P 0_0402_5% 0.1U_0402_25V6
1 2 +19VB_5V BST_5V 1 2 BST_5V_R 1 2
PU302
2
5
1
SY8288CRAC_QFN20_3X3
BS
IN
IN
IN
IN
PL301
10U_0603_25V6
LX_5V 6 20 2.2UH_7.8A_20%_7X7X3_M
0.1U_0402_25V6
LX LX
PC314
2200P_0402_50V7
19 LX_5V 1 2
7
GND LX +5VALWP
2 1
PR307
@EMI@ PC317
EMI@ PC316
499K_0402_1% 8 18
GND GND PC318
M
2 1
2 1
1 2 ENLDO_3V5V
+19VB VCC_5V 1 2
1
9 17
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
PG VCC
1
1
1SPOK_5V
PR308
PC322
PC301
PC323
PC319
PC328
4.7_1206_5%
K
2 1
PR309 10 16
@EMI@
NC NC
2
2.2U_0402_6.3V6M
499K_0402_1%
OUT
LDO
EN2
EN1 21
B B
FF
GND
2
M
@ PR310
5V_SN 2
13
11
12
14
15
0_0402_5%
2
SPOK
+5VL
680P_0402_50V7K
5V LDO 150mA~300mA
PC324
@EMI@
ENLDO_3V5V
2 1
PR301 4.7U_0402_6.3V6
2.2K_0402_5%
PC325
1 2
58,64 EC_ON 5V_3V_EN
2 1
1 2
58 VCOUT0_MAIN_PWR_ON
M
@ PR311
0_0402_5% PC326 PR312
1000P_0402_50V7K 1K_0402_1% @PJ305
5V_3V_EN 5V_FB 1 2 5V_FB_1 1 2 1 2
+5VALWP 1 2 +5VALW
JUMP_43X118
1M_0402_1%
1
4.7U_0402_6.3V6
PC327
PR313
21
2
A A

Issued Date 2019/10/15 Decipiihered Date 2021/10/15 Tiitll e
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL
3VALW/5VALW
AND TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D Siiize Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS Custttom 0..1
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC... GPI50
Date: Wednesday,,, Apriiilll 22,,,2020 Sheet 85 o f 100
5 4 3 2 1
5 4
EMI@ PLM2
5A_Z80_0805_2P +19VB_DDR
PRM1
+19VB 1 2
2.2_0603_5%
BST_DDR_R BST_DDR
1 2
2200P_0402_50V7
+1.2VP
10U_0603_25V6
@EMI@ PCM1
UG_DDR +0.6VSP
2 1
PCM2
PCM4
21
2 1
0.1U_0402_25V7K
LX_DDR
10U_0402_6.3V6
10U_0402_6.3V6
D D
PCM5
PCM6
PUM1
17
20
16
18
19
2 1
G5616BRZ1U_TQFN20_3X3
21
LX
BST
DH
VLDOIN
VTT
21
PAD
M
LG_DDR 15
1
PQM1 DL VTTGND
2
1
EMB09A03VP_EDFN3X3-8-10
14 2
D1
D1
PGND VTTSNS
G
D
PLM1
1
PRM2
1UH_11A_20%_7X7XL3X__MDDR 11.5K_0402_1%CS_DDR
1 2 10 9 1 2 13 3
+1.2VP D1 D2/S1 CS GND
1
PCM7 1U_0201_6.3V6M
1 2 12 4 VTTREF_DDR
S2
S2
S2
VPP VTTREF
2
@EMI@ PRM3
4.7_1206_5% PCM 20
1 2 1U_0201_6.3V6M
7
8
11 5
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
1
VDDQSET
SNB_DDR VCC VDDQSNS
+1.2VP
PCM8
PCM9
PCM10
PCM11
PCM12
PCM13
1 2 PCM15
PGOOD
+5VALW
2 1
VDD_DDR PCM21 1U_0201_6.3V6M
TON
2
2 1
1 2
21 2
@EMI@ PCM14 0.033U_0402_16V7K
S3
S5
680P_0402_50V7K PRM4
1U_0201_6.3V6
VDDP_DDR
1U_0201_6.3V6
1U_0201_6.3V6
PCM19
PCM3
5.1_0603_5%
10
7
8
6
M
PCM16
M
1
1
M
21
FB_DDR
2
2
PRM6
TON_DDR
6.04K_0402_1%
S3_DDR
M
M
PRM5 5.1_0603_5% PRM7 +1.2VP
S5_DDR
1 2
12 470K_0402_1%
@PJM2 1 2
PWROK_DDR
JUMP_43X118 @
1
+1.2VP 1 2 +1.2V_VDDQ PTPM1
12 +19VB_DDR
@PRM8
0_0402_5% PRM9
PG_+2.5V 1 2 10K_0402_1%
2
12
@PJM3 58 SYSON
0.1U_0402_10V7
JUMP_43X39 @ PRM10
1 2
PCM17
+0.6VSP 1 2 +0.6V_0.6VS 0_0402_5%
21
@ Vout=0.75*(1+PRM6/PRM9)=1.2V
@PRM11
K
0_0402_5%
1 2
16,58,78 SUSP#
C C
@ PRM12
0_0402_5%
1 2
8 SM_PG_CT RL
@PCM18
2 1
0.1U_0402_10V7K
Eletro-XTechnical0042 PC2501
22U_0603_6.3V6M
+2.5VP
@PJ2502
JUMP_43X39
1
1 2
2
+2.5V
1 2
@PJ2501 PU2501
PL2501
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 2 IN_2.5V 4 3 LX_2.5V
1 2
12 IN LX +2.5VP
1 2 5 2
+3VALW PG GND
68P_0402_50V8
6 1
PC2504
PR2504 FB EN
1
22U_0603_6.3V6
22U_0603_6.3V6
1
PC2505
PC2506
100K_0402_5%
1
21
PG_+2.5V SY8032IABC_SOT23-6
2 1
Enable 1.2V @EMI@ PR2505 PR2506
2
4.7_0402_5% 32.4K_0402_1%
J
B B
2
2
M
@ PR2501 SNB_2.5V
0_0402_5% FB_2.5V
1 2
11,58 PM_SLP_S4#
1
@ PR2502
0_0402_5% EN_2.5V @EMI@ PC2503 680P_0402_50V7K
SYSON 1 2 PR2507
2
10K_0402_1% Vout=0.6V *(1+PR2506/PR2507)=2.544V

.1U_0402_16V7K
2
1
Imax= 2A, Ipeak= 3A

PC2502
PR2503
1M_0402_1%
2 1
@
2
A A
Securrritttii y Cllassifffiiici atttionii Compalll Secrettt Dattta Compal Electronics, Inc.

Tiiitttlle
IIIssued Dattte 2019///10///15 Deciiipherrred Dattte 2021///10///15
THISII SHEET OF ENGINII EERINII G DRAWINIIG ISITHE PROPRIETII ARY PROPERTY OF COMPAL ELECTRONICII S,,,INC
I ...AND CONTAINII S CONFIDII ENTIALI AND TRADE
1.2VP/0.6VSP/2.5V
Siiize Documenttt Numberrr Re v
SECRET INIFORMATIOII N...THISII SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIIIIIONIOF R&D DEPARTMENT
EXCEPT AS AUTHORIZII ED BY COMPAL ELECTRONICII S,,,INIC...NEITIIHER THISII SHEET NOR THE INF
I ORMATIOII N ITICONTAINII S Custttom 0..1
Dattte::: Wednesday,,, Aprrriiill 22,,, 2020 Sheettt 86 o fff100
5 4 3 2 1
A B
Eletro-XTechnical0043 C D
1 1
PC1801
22U_0603_6.3V6M
1 2
PU1801
@ PJ1801 PL1801
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 2 IN_1.8V 4 3 LX_1.8V 1 2
1 2 IN LX +1.8VSP
1 2 5 2
+3V_PRIM PG GND
1
@RF@
PR1801 6 1 PR1802
68P_0402_50V8
FB EN
22U_0603_6.3V6
22U_0603_6.3V6
1
1
PC1802
PC1803
PC1804
91 +1.8V_PG 100K_0402_5% 4.7_0603_5%
SY8032IABC_SOT23-6 PR1803
20K_0402_1%
2
SNUB_1.8V
EN_1.8V
12
1 2
58,78 PCH_PWR_EN
2
2 2
@RF@
J
PC1806
M
.1U_0402_16V7K
@ PR1804
1
680P_0402_50V7K
@ PC1805
0_0402_5%
PR180
1M_0402_1
2
% 2 1
@PJ1802
2
FB_1.8V
5
1 1 2 2
+1.8VSP +1.8V_PRIM
JUMP_43X79
1
PR1806
10K_0402_1%
Vout=0.6V*(1+PR1803/PR1806)=1.8V
2
Eletro-XTechnical0043 Imax= 2A, Ipeak= 3A Eletro-XTechnical0043
3 3
4 4
Security Classification Compal Secret Data

Issued Date 2019/10/15 Deciphered Date 2021/10/15 Title
+1.8V_PRIM
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1
Date: Wednesday, April 22, 2020 Sheet 87 of 100
A B C D
1 2
RT3613EEGQW-02 is not MP part

A A
+5VALW PUZ1
PRZ1 +19VB_VCCIN
6.8_0402_1% PRZ4 2.2_0805_5%
1 2 VCC_VCCIN 24 8 VIN_VCCIN 1 2
VCC VIN PCZ3 0.47U_0402_25V6K
2
12
PCZ1
4.7U_0402_6.3V6M
1
Pull High in HW site. PRZ6 9 VRO N_VCCIN
@ PRZ5 0_0402_5%
1 2
High: > 0.7V
VR_ON 11,58
75_0402_5%
1 2 VRHO T_VCCIN 16
VRON
@ PCZ4 0.1U_0402_25V6
Low: < 0.3V
58 PROCHOT# VR_HOT 1 2
@ PRZ2 0_0402_5%
12 PW M1_VCCIN_R 1 2
VREF06_VCCIN PWM1 PW M1_VCCIN 89
@ PRZ7 0_0402_5%
PRZ3 13 PW M2_VCCIN_R 1 2
PWM2 PW M2_VCCIN 89
VREF06_VCCIN 0.6V 1
3.9_0402_1%
2 26
VREF06 11
PW M3
1
PCZ2
0.47U_0402_6.3V6K
14
NC
2
_1%
1.33K_0402_1%
1
1
1
1
113K_0402_1%
12.1K_0402_1%
@ PRZ12 PRZ13 3.32K_0402_1% PRZ14 1.47K_0603_1%
0_0402_5% ISENSE1P_VCCIN_RR 1 2 ISENSE1P_VCCIN_R 1 2
PRZ8
PRZ11
4
PRZ9
PRZ10
ISENSE1P_VCCIN 89
1 2 DRVEN_VCCIN_R 15 ISEN1P
89 DRVEN_VCCIN DRVEN
1
12.4K_0402_1% 18.7K_0402
2 1 PRZ16 PCZ5
2
2
2 1
PRZ15 100K_0402_1% 3.48K_0402_1% 0.1U_0402_25V6
1 2
VR_HOT# 100 degreeC
1
1
PRZ22 110K_0402_1% 3 ISENSE1N_VCCIN_R 1 2
20_0402_1%
ISENSE1N_VCCIN 89
2
ISEN1N
ALERT# 97 degreeC
226_0402_1%
174_0402_1%
1 2 PCZ6 0.1U_0402_25V6
PRZ17
PRZ20
PRZ19
PRZ18
PRZ21 681_0402_1% 12
B B
Close to Phase1 MOS
PHZ1 TSEN_VCCIN 7 PRZ23 3.32K_0402_1% PRZ24 1.47K_0603_1%
2
2
2
2
TSEN_VCCIN_R 1 2 TSEN 1 ISENSE2P_VCCIN_RR 1 2 ISENSE2P_VCCIN_R 1 2
ISEN2P ISENSE2P_VCCIN 89
1
100K_0402_1%_B25/50 4250K
SET1_VCCIN 22 PRZ25 PCZ7
SET1
21
3.48K_0402_1% 0.1U_0402_25V6
SET2_VCCIN 21
SET2 2 ISENSE2N_VCCIN_R 1 2
ISENSE2N_VCCIN 89
2
SET3_VCCIN 20 ISEN2N PCZ8 0.1U_0402_25V6
SET3 PRZ26 681_0402_1%
+1.05V_VCCST 12
6.98K_0402_1% 19.6K_0402_1%
1
1
0_0402_5% 1.15K_0402_1%
1
226_0402_1% 19.6K_0402_1%
226_0402_1% 24.9K_0402_1%
PRZ27
PRZ28
PRZ29
PRZ30
5 ISENSE3P_VCCIN 1 2
ISEN3P
PRZ31
1 2
1 2
1 2
1 2
10K_0402_1%
+5VALW
@ PRZ33
PRZ32
PRZ34
PRZ35
1
1
100_0402_1%
ISENSE3N_VCCIN
45.3_0402_1%
PCZ9 6 1 2
0.1U_0402_25V6 ISEN3N
PRZ36
PRZ37
21
PRZ38
2
2
2
2
10K_0402_1%
2
NC
32 @ PRZ40 +VCCIN
@ PRZ39 0_0402_5%
1 2 SVID_CLK_PWR_VCCIN 19
10K_0402_1%
1 2
remote sense in HW site.
15 SOC_SVID_CLK_R VCLK +5VALW
2
PRZ42
@ PRZ41 0_0402_5%
1 2 SVID_DAT_PWR_VCCIN 18 31
10K_0402_1%
1 2
debug only @ PRZ43
100_0402_1%
15 SOC_SVID_DAT_R VDIO NC
1
@ PRZ44 0_0402_5%
1 2 SVID_ALERT#_PWR_VCCIN 17 28 VSEN_VCCIN 1 2
15 SOC_SVID_ALERT#_R ALERT VSEN VCCIN_VCCSENSE 15
PCZ10 82P_0402_50V8J PCZ11 150P_0402_50V8J @ PRZ45 0_0402_5%
C +3VS COMP
29 COMP_VCCIN 1 2 1 2 12 C
PRZ46 10K_0402_1%
0.082U_0402_16V7K
1 2 10 PRZ47 26.1K_0402_1% PRZ48 10K_0402_1% @ PCZ12
VR_READY 1 2 1 2 330P_0402_50V7K
@ PCZ13
2 1
@ PCZ14
58 VR_PW RGD
0.47U_0402_6.3V6K 30 FB_VCCIN
12 FB 12
PRZ49 @ PCZ15
16.2K_0402_1% 0.01UF_0402_25V7K
Close to Phase1 Inductor 1 2 I_SYS 23
PSYS
@ PRZ50 0_0402_5%
27 RGND_VCCIN 1 2
RGND VCCIN_VSSSENSE 15
VREF06_VCCIN LL/IMON Compesation
1
PRZ51 PHZ2 PRZ52
3.83K_0402_1% 100K_0402_1%_B25/50 4250K 18.7K_0402_1%
1 2 NTC1P_VCCIN 1 2 NTC1N_VCCIN 1 2 IMON_VCCIN 25 33 @ PRZ53
IMON GND
debug only 100_0402_1%
2
RT3613EEGQW -02_WQFN32_4X4
PRZ54
16.9K_0402_1%
1 2
31 pin is a function to fix decay down slew rate to reduce acoustic noise.
High(5V): enable
Low:(0V): disable
this pin can dynamic change state.
D D

Tiiitttllle
Issued Date 2019/10/15 Deciiiphered Date 2021/10/15
CPU_CORE
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IINC... AND CONTAIIINS CONFIIIDENTIIIAL AND Siiize Documenttt Num ber
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIVIIISIIION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IINC...
GPI50 0.1
Dattte::: Wednesday,,, Apriiilll 22,,, 2020 Sh eett 88 o ff 100
1 2 3 4 5
1 2
A A
+19VB_VCCIN +19VB
@PJZ1
1 2
12
JUMP_43X118
10U_0603_25V6
10U_0603_25V6
2200P_0402_50V
PRZ55 1
0.1U_0402_25V6
EMI@ PCZ18
2.2_0603_5%
100U_25V_NC_6.3
EMI@ PCZ16
BST1_VCCIN 1 BST1_VCCIN_R PCZ17 +
PCZ19
PCZ20
PCZ21
2
1
7K
0.1U_0402_25V6
21
21
21
2
PUZ2 2
2 1
M
RT9610CGQW_WDFN8_2X2 @ PRZ56 PQZ1
9
0_0603_5% AOE6930_DFN5X6E8-10
UG1_VCCIN UG1_VCCIN_R LG1_VCCIN
X6
4 3 1 2 1 8
D1_3
BOOT UGATE G1 G2
LX1_VCCIN LX1_VCCIN
88 PWM1_VCCIN
5
PWM PHASE
2 2
S1/D2 D2/S1_3
7 Rdc=1.19mohm ICCMAX=55A
+VCCIN
88 DRVEN_VCCIN
1
EN PGND
6 3
D1_1 D2/S1_2
6 PLZ1
0.24UH_22A_20%_ 7X7X3_M TDC=30A
DC_LL=2mohm
8 7 LG1_VCCIN +19VB_VCCIN LX1_VCCIN_R 1 4
4 5
S2
PRZ57 VCC LGATE 9 D1_2 D2/S1_1
VCC1_VCCIN GND
+5VALW
1 2 2 3
AC_LL=4.2mohm
10
ISENSE1N_VCCIN 88
EMI@
PRZ58
4.7_1206_5
%
1
2.2_0603_1%
PCZ23 ISENSE1P_VCCIN 88
2 1
1U_0402_6.3V6K
1 SNUB1_VCCIN 2
B B
EMI@ PCZ24
680P_0402_50V7K
2
+19VB_VCCIN
10U_0603_25V6
10U_0603_25V6
2200P_0402_50V
PRZ59
0.1U_0402_25V6
EMI@ PCZ28
2.2_0603_5%
EMI@ PCZ25
BST2_VCCIN 1 2 BST2_VCCIN_R PCZ27
PCZ26
PCZ29
1
7K
0.1U_0402_25V6
21
21
21
2
PUZ3
2 1
M
RT9610CGQW_WDFN8_2X2 @ PRZ60 9 PQZ2
0_0603_5% AOE6930_DFN5X6E8-10
4 3 UG2_VCCIN 1 2 UG2_VCCIN_R 1 8 LG2_VCCIN
D1_3
C BOOT UGATE G1 G2 C
LX2_VCCIN LX2_VCCIN
88 PWM2_VCCIN
5
PWM PHASE
2 2
S1/D2 D2/S1_3
7 Rdc=1.19mohm
DRVEN_VCCIN
+VCCIN
1 6 3 6 PLZ2
EN PGND D1_1 D2/S1_2 0.24UH_22A_20%_ 7X7X3_M
8 7 LG2_VCCIN +19VB_VCCIN 4 5 LX2_VCCIN_R 1 4
S2
PRZ61 VCC LGATE 9 D1_2 D2/S1_1

1 2VCC2_VCCIN GND 2 3
+5VALW
10
ISENSE2N_VCCIN 88
4.7_1206_5%
1
2.2_0603_1%
PRZ62
PCZ30 EMI@ ISENSE2P_VCCIN 88
2
2 1
1U_0402_6.3V6K 680P_0402_50V7K
SNUB2_VCCIN
1
EMI@ PCZ31
D D

Tiiitttllle
Issued Date 2019/10/15 Deciiiphered Date 2021/10/15
CPU Power stage
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIVIIISIIION OF R&D Siiize Documenttt Number Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIT CONTAIIINS
GPI50 0.1
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IINC...
Dattte::: Wednesday,,, Apriiilll22,,,2020 Sheett 89 o ff 100
1 2 3 4 5
5 4
D D
AON6380
R DS(ON) (at V GS =10V) < 6.8mohm
R DS(ON) (at V GS =4.5V) < 10.5mohm
AON6314
R DS(ON) (at V GS =10V) < 2.8mohm
BST_AUX_R R DS(ON) (at V GS =4.5V) < 3.5mohm
1
PRG1
2.2_0603_5% PC G1
0.1U_0402_25V6
2
OCP is Lowside MOSFET Rdson sense
2
+19VB_AUX +19VB_AUX +19VB
BST_AUX
@ PJG1
226K x1.2 1
1 2
2
255K x1.4
1
PUG1 @ PRG2 JUMP_43X11 8
2200P_0402_50V7K
1
0.1U_0402_25V6
10
RT6543AGQW _W QFN20_3X 3
10U_0603_25V6M
10U_0603_25V6M
0_0805_5%
100U_25V_NC_6.3X6
+
ICCMAX=32A
@EMI@ PCG3
EMI@ PCG6
PRG3
PCG7
B OOT
255K_0402_1%
PCG5
PCG2
CS_DSI_AUX VSYS_AUX
2
TDC=14A
2 1
2 1
1 2
2
1 20
C S_D I S VSYS 2
+5VALW
AC_LL: <1MHz 1-40MHz
1
@ PRG4 PCG8
1
0_0603_5%
2
PVCC_AUX
15
PVCC UGATE
11
UG_AUX
0.1U_0402_25V 6
4.9 8
2
2 1
PCG4 1U_0402_6.3V6K PQZ3
PRG6 5.1_0603_5% 1 @ PRG5 AOE6936_D FN5X6E8-10
VC C _A UX LX_AUX
2 16 12 0_0603_5%
VCC PH UG_AUX UG_AUX_R LG_AUX
1 2 1 8
G2
D1
2 1 G1
9
LX_AUX
High > 1V PCG9 1U_0402_6.3V6K PRG7
100K_0402_1%
2
S1/ D 2 D 2/ S1
7
PLG1 +VCCIN_AUX
Low <0.4V +3VALW
LG_AUX
1 2 4 13 3 6 0.24UH_22A_20% _ 7X7X3_M
P GOOD LGATE D1 D 2/ S1
+19VB_AUX LX_AUX_R 1 4
C 4 5 C
58 PG_VCCIN_AUX D1 D 2/ S1
S2
ISENP_AUX 2 ISENN_AUX
@ PRG8 0_0402_5% 3
EN_AUX 19
10
1 2 14
87 +1.8V_PG EN P GND
1
1
Rdc=1.19mohm
1
4.7_1206_5%
PRG10
@ PCG10 @ PRG11
200_0603_1%
0.1U_0402_25V 6 0_0402_5%
ISENSEP_AUX ISENSEP_AUX_R
2
VCCIN_AUX_COR E_VID 1_R 17 2 1 2 @

11,17
1 SNUB_AU2X
VI D 1 I S E NS E P
1
@EMI@ PCG12 @EMI@ PRG9
0_0402_5%
@PRG12
@ PRG13
ISENP_AUX_R
0_0402_5%
+3VALW 11,17 VCCIN_AUX_COR E_VID 0_R
18
V I D0 IS E N S E N
3 ISENSEN_AU X 1 2
ISENSEN_AUX_R
+VCCIN_AUX
2
PC G11
680P_0402_50V7K
1 2
2
@ PRG14 @ PRG15 PRG16
100K_0402_1% 0.1U_0402_25V6 0_0402_5% 100_0402_1%
FSW SEL_AUX VOUT_AUX VOUT_AU X_R
1
17.4K_0603_1%
1 2 9 8 1 2 2 1
+5VALW FSW SEL V OUT
PRG17
1
@PRG18 PC G13 PRG21 @ PCG14 @ PRG22 @ PRG23 @ PRG24

100K_0402_1% 2000P_0402_50V7K 10K_0402_1% 390P_0402_50V7K 1.6K_0402_1% @ 0_0402_5% 0_0402_5%
1
5 COMP_AUX 2 COMP_AUX_R 1 1 2 FB_AUX_R 1
2
1 2 2 1 2 1 2
C OMP
@ PRG19 @ PRG20
ISENSEN_AUX_R
2
10K_0402_1% 10K_0402_1%
PCG15 PRG25
VCCIN_AUX_COR E_VID 0_R 27P_0402_50V8J 6.34K_0402_1% @ PHG1
2
VCCIN_AUX_COR E_VID 1_R

5V: 800KHz FB
6 FB_AUX 1 2 1 2
ISENSEN_AU X_N TC 1 2
Float: 600KHz
1
10K_0402_1% _B25/50 3370K
@ PRG26
GND: 400KHz 0_0402_5% B=3435(B25/85)
1
RGND _RT6543
ISENSEP_AUX_R
7 1 2
RGND VCCIN_AUX_VSSSEN SE 17
@ PRG27 @ PRG28 A GND
2
@ PRG29 0_0402_5% 1 2
10K_0402_1% 10K_0402_1%
1
VCCIN_AUX_VC C SEN SE 17
PRG30 @ PCG16
2
21
100_0402_1% 0.1U_0402_25V 6
2
1 2
@ PCG18
0.082U_0402_16V7K
330P_0402_50V7K
@ PCG19
2 1
VCCIN_AUX VID Follow Intel PDG Rev0.71
1 2 330U*1
B VID1 VID0 +VCCIN_AUX @ PCG20 +VCCIN_AUX 22U_0603*20 B
Voltage 0.01UF_0402_25V7K
0 0 0
1 1.1
+VCCIN_AUX
0
1 0 1.65
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PCG21
PCG22
PCG23
PCG24
PCG25
PCG26
PCG27
PCG28
PCG29
PCG30
1 1 1.8
2 1
2
1 1
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
+ +
PCG31
PCG32
2 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PCG33
PCG34
PCG35
PCG36
PCG37
PCG38
PCG39
PCG40
PCG41
PCG42
2 1
2
A A
Securrriittty Cllassiiifffiiicatttiiion Compalll Secrettt Dattta Compal Electronics, Inc.

Tiiitttlle
IIIssued Dattte 2019///10///15 Deciiipherrred Datett 2021///10///15
VCCIINAUX
THIIISSHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC...AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIISSHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT AS Siiize Documenttt Numberrr R ev
AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC...NEIIITHER THIIISSHEET NOR THE IIINFORMATIIION IIITCONTAIIINS GPIII50 0...1
Dattte::: Wednesday,,, Aprrriil 22,,, 2020 Sheettt 91 offf 100
5 4 3 2 1
5 4
D D
+VCCIN
330U *1
22U_0603 *17
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1 1 1U_0402 *4
+ +
PCZ32
PCZ33
2 @ 2
+VCCIN
C C
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PCZ34
PCZ35
PCZ36
PCZ37
PCZ38
PCZ39
PCZ40
PCZ41
PCZ42
PCZ43
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
Eletro-XTechnical0047 1
1
1
PCZ44
PCZ45
PCZ46
PCZ47
PCZ48
PCZ49
PCZ50
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
PCZ60
PCZ61
PCZ62
PCZ63
B B
2
A A

PROCESSOR DECOUPLING
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Siiize Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS GPI50 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Sheet 90 of 100
Date: Wednesday, Apriill 22, 2020
5 4 1
3 2

HP 15-Da3001tu Compal LA-J951P GPI52 Rev 0.1

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5 4 2 1

Securiiity Clllassiiifiiicatiiion Compalll Secret Data Compal Electronics, Inc.

Vout +3VALW +3VALW

VCCIN Vout +VCCIN

+VCCIN_AUX Vout +VCCIN_AUX

+1.35VS_VGA Vout +1.35VS_VGA

G3->S0 S0-> S0iX S0iX ->S0 S0->S5

PM_SL P_S3# PM_SL P_S3#

VCCST_OVERRIDE High_in_Sx_if_TCSS_w ake_en abl ed

PCH_CL K_OUT PUT S

H_THERMTRIP# HONORED HONO RED Will_ Track_VCCST_Rail

Securiiittty Clllassiiifffiiicatttiiion Compalll Secret Data Compal Electronics, Inc.

Dattte::: Wednesday,,, Aprrriil22,,, 2020 Sheettt 5 offf 100

SOC_SML1CLK TBC TBC TBC

I2C 3 +3VS 0x2CH TBCTBC

NC Components @ 12 PCIe #13/GbE

Load BOM Option Table +1.8VS

BOM Number Load BOM Option +3VL_RTC RTC power ON ON ON ON

RC4021 1 2 100K_0402_5% ENVDD_CPU

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Wednesday, Apriiilll22, 2020 Sheet 6 of 100

6,9,11,12,13,16,17,23,24,87 +3V_PRIM +3V_PRIM

49.9_0402_1%1 2 RC366 PROC_POPIRCOMP

RC40322 1 100_0402_5% SOC_XDP_TDO

RC40302 @ 1 51_0402_5% XDP_PREQ#

RC4038 1 2 51_0402_5% SOC_XDP_TCK0

RC4037 2 @ 1 51_0402_5% PCH_JTAG_TCK1

RC4028 2 @ 1 51_0402_5% SOC_XDP_TRST#

Place to CPU side

Securiiity Clllassiiifiiicatiiion Compal Secret Data Compal Electronics, Inc.

Date: Wednesday,,, Apriiilll22,,,2020 Sheet 7 of 100

Follow Intel DDR4 NIL

DDR4: Refer to 575034_ICL_U42_DDR4_T3_6L_Core_Schematics_Rev0p7

Buffer with Open Drain Output

A 4 DDR_PG_CTRL 1 2 DDR_DRAMRST# RC31 1 Rshort@ 2 DDR_DRAMRST#_R

PLACE NEAR TO SoC

Securiiity Clllassiiifiiicatiiion Compalll Secret Data Compal Electronics, Inc.

Dattte::: Wednesday,,, Aprrriill22,,, 2020 Sheettt 8 o ff 100

SOC_SML0CLK 499_0402_1% 2 1 RC316

RC3946 1 2 20K_0201_5% SOC_GPP_E11

+3VS +3VS Add for EMI Request _20190807 +3V_PRIM +3VALW

Single SPI ROM_CS0#

MAF - Master Attached Flash

+3V_PRIM 3mA +3V_SPI

Securiiity Clllassiiifiiicatiiion Compal Secret Data Compal Electronics, Inc.

Date: Wednesday,,, Apriiilll22,,,2020 Sheet 9 of 100

ODD_PWR DC45 DK38

CNV_RF_RESET# CT48 GPP_A7/I2S2_SCLK

RC3986 1 2 33_0402_5% HDA_RST#

HDA_SDIN0 VCCPGPPR: Audio Power 3.3V, 1.8V, or 1.5V

75K_0402_5% 1 CNVI@ 2 RC3907CNV_RF_RESET# RC3988 1 EMI@ 2 33_0402_5% HDA_BIT_CLK

Add for EMI Request _20190806

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Wednesday, Apriiilll22, 2020 Sheet 10 of 100

SLP_SUS# CY42 PBTN_OUT#_R

RC77 1 2 60.4_0402_1% EC_VCCST_PG CC354 2 1 0.1U_0402_16V7K RC378 33_0402_1%

VCCST_EN 58 AC_PRESENT RC66 2 @ 1 0_0201_5% AC_PRESENT_R

RC67 2 @ 1 0_0201_5% PBTN_OUT#_R YC3

R3844 1 From EC to VCCST

QC2A For Glitch