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    Acer Aspire 9500 Compal La 2781

    Uploaded by

    DeadMike
    The document provides schematics for a motherboard with an Intel Dothan processor and ATI M26-P graphics card. It includes details on the processor, memory, chipset, connectors and interfaces over 50 pages.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Acer Aspire 9500 Compal La 2781

    Uploaded by

    DeadMike
    19 views50 pages
    The document provides schematics for a motherboard with an Intel Dothan processor and ATI M26-P graphics card. It includes details on the processor, memory, chipset, connectors and interfaces over 50 pages.

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

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    The document provides schematics for a motherboard with an Intel Dothan processor and ATI M26-P graphics card. It includes details on the processor, memory, chipset, connectors and interfaces over 50 pages.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    19 views50 pages

    Acer Aspire 9500 Compal La 2781

    Uploaded by

    DeadMike
    The document provides schematics for a motherboard with an Intel Dothan processor and ATI M26-P graphics card. It includes details on the processor, memory, chipset, connectors and interfaces over 50 pages.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 50

    A B C D E

    1 1

    Compal Confidential
    2 2

    HQD70/HDQ71 Schematics Document


    Intel Dothan Processor with 915PM/915GM + DDRII + ICH6M
    (With ATi M26-P)
    3 3

    2005-05-12
    REV: 0.2 (For DVT)

    om
    4 4

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 1 of 50
    A B C D E
    A B C D E

    Compal Confidential
    Thermal Sensor Clock Generator
    Model Name : HDQ70 Fan Control
    page 39
    Pentium-M(Dothan)
    G781 ICS 954226AG
    page 4 page 13
    File Name : LA-2781 uPGA-478 Package
    page 4,5
    1 1

    PSB
    H_A#(3..31) 533MHz H_D#(0..63)
    DVI-D Conn. LCD Conn. CRT & TV-out
    page 16 page 15 page 14

    Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2


    Intel 915PM/GM Dual Channel BANK 0, 1, 2, 3 page 11,12
    DVI Transmitter
    CH7307C 1.8V DDRII 400/533
    page 16 uFCBGA-1257
    PCI-Express page 6,7,8,9,10
    VGA/B Conn.
    ATI M26-P DMI New Card
    LCD Conn. USB conn x5 Bluetooth
    with 128/256MB VRAM Socket page 24
    2
    page 15
    page 31 Conn page 36 2

    PCI Express
    USB port 3 USB port 0, 1, 2, 4, 6 USB port5
    3.3V 33 MHz PCI BUS Intel ICH6-M 3.3V 48MHz

    IDSEL:AD16 IDSEL:AD19 IDSEL:AD18 IDSEL:AD17 IDSEL:AD20 3.3V 24.576MHz/48Mhz USB port 1


    AC-LINK/Azalia
    (PIRQE#, (PIRQH/A#, (PIRQG/H#, (PIRQF#, (PIRQA#, BGA-609
    GNT#2, GNT#4, GNT#3, GNT#3, GNT#2, 3.3V ATA-100
    REQ#2) REQ#4) REQ#3) REQ#3) REQ#2) IDE
    S-ATA
    page 17,18,19,20
    IEEE 1394 Mini PCI Mini PCI LAN (GbE) CardBus
    TSB43AB22A socket socket RTL8110SBL/ CDROM MDC 1.5 HDA Codec
    page 25 ENE CB714 Conn. Conn ALC260D
    (TV-Tuner) (WLAN) RTL8100CL page 21 page 33 page 36
    page 29 page 28 page 26 page 22
    S-ATA HDD
    Conn.page 21
    1394 Conn. 4 in 1 HDD
    3
    page 25 RJ45 Slot 0 Conn. 3

    page 27
    socket page 21
    page 23 page 23 Audio AMP Subwoofer
    LPC BUS page 37 page 38

    RTC CKT. Super I/O Phone Jack x3


    page 35 Button/B Conn. ENE KB910Q page 37
    SMsC LPC47N217
    page 34 page 32 page 30

    Power On/Off CKT. TP/B Conn.


    page 39 Touch Pad Int.KBD Parallel Port FIR
    page 34 page 34 page 33 page 30 page 30

    DC/DC Interface CKT. LCM Conn. EC I/O Buffer BIOS


    4 4
    page 34
    page 40 page 33 page 33

    Power Circuit DC/DC Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    page 41,42,43,44, SCHEMATIC, M/B LA-2781
    45,46,47,48 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 2 of 50
    A B C D E
    A B C D E

    SIGNAL
    STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
    Voltage Rails
    Full ON HIGH HIGH HIGH HIGH ON ON ON ON

    Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

    VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
    1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1
    S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
    +CPU_CORE Core voltage for CPU ON OFF OFF
    +0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
    +1.05VS 1.05V switched power rail ON OFF OFF
    +1.5VALW 1.5V always on power rail ON ON ON*
    +1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
    +1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
    +1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
    +2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
    +3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
    +3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
    +5VALW 5V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
    +5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
    +VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
    +RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
    2 2

    6 200K +/- 5% 1.935 V 2.200 V 2.341 V


    7 NC 2.500 V 3.300 V 3.300 V

    BOARD ID Table BTO Option Table


    Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

    External PCI Devices Board ID PCB Revision BTO Item BOM Structure
    Device IDSEL# REQ#/GNT# Interrupts
    0 0.1 VGA @PM
    @GM
    CardBus( SD) AD20 2 PIRQA/PIRQB
    1
    LAN @8110S
    1394 AD16 0 PIRQE
    2 @8100C
    LAN AD17 3 PIRQF
    3 LCM @LCM
    @NO_LCM
    Mini-PCI(WLAN) AD18 1 PIRQG/PORQH
    4
    Mini-PCI(TV-Tuer) AD19 4 PIRQH/PORQA
    5
    6
    3 7 3

    EC SM Bus1 address EC SM Bus2 address SKU ID Table


    Device Address Device Address
    SKU ID SKU
    Smart Battery 0001 011X b GMT G781 1001 110X b
    0 PM
    EEPROM(24C16/02) 1010 000X b
    1 GM
    GMT G781-1 1001 110X b
    2
    3
    4
    5
    6
    ICH6M SM Bus address 7
    Device Address

    om
    4 4
    Clock Generator 1101 001Xb

    l.c
    ( ICS 954226)

    ai
    DDR DIMM0 1001 000Xb

    tm
    DDR DIMM2 1001 010Xb

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 3 of 50
    A B C D E
    5 4 3 2 1

    JP33A

    H_A#[3..31] H_A#3 P4 A19 H_D#0


    6 H_A#[3..31]
    H_A#4
    H_A#5
    U4
    A3#
    A4#
    Dothan D0#
    D1# A25 H_D#1
    H_D#2
    H_D#[0..63]
    H_D#[0..63] 6
    +3VS
    V3 A5# D2# A22
    H_A#6 R3 B21 H_D#3
    H_A#7 A6# D3# H_D#4
    V2 A7# D4# A24
    H_A#8 W1 B26 H_D#5
    H_A#9 A8# D5# H_D#6
    T4 A9# D6# A21
    H_A#10 W2 B20 H_D#7 1
    A10# D7#

    1
    H_A#11 Y4 C20 H_D#8
    H_A#12 A11# D8# H_D#9 C473 R416
    Y1 A12# D9# B24
    D H_A#13 U1 D24 H_D#10 0.1U_0402_16V4Z @ 10K_0402_5% D
    H_A#14 A13# D10# H_D#11 2
    AA3 A14# D11# E24 1
    H_A#15 Y3 C26 H_D#12 C480

    2
    H_A#16 A15# D12# H_D#13 U38
    AA2 A16# D13# B23
    H_A#17 AF4 E23 H_D#14 2200P_0402_50V7K THERMDA 2 1
    H_A#18 A17# D14# H_D#15 2 D+ VDD1
    AC4 A18# D15# C25
    H_A#19 AC7 H23 H_D#16 THERMDC 3 6
    H_A#20 A19# D16# H_D#17 D- ALERT#
    AC3 A20# D17# G25
    H_A#21 AD3 L23 H_D#18 8 4
    A21# D18# 32 EC_SMB_CK2 SCLK THERM#
    H_A#22 AE4 M26 H_D#19
    H_A#23 A22# D19# H_D#20
    AD2 A23# D20# H24 32 EC_SMB_DA2 7 SDATA GND 5
    H_A#24 AB4 F25 H_D#21
    H_A#25 A24# D21# H_D#22
    AC6 A25# ADDR GROUP DATA GROUP D22# G24
    H_A#26 AD5 J23 H_D#23 G781_SOP8
    H_A#27 A26# D23# H_D#24
    AE2 A27# D24# M23
    H_A#28 AD6 J25 H_D#25
    H_A#29 A28# D25# H_D#26
    AF3 A29# D26# L26
    H_A#30 AE1 N24 H_D#27
    H_A#31 A30# D27# H_D#28
    AF1 A31# D28# M25
    H26 H_D#29
    H_REQ#[0..4] H_REQ#0 D29# H_D#30
    6 H_REQ#[0..4] R2 REQ0# D30# N25
    H_REQ#1 P3 K25 H_D#31
    H_REQ#2 REQ1# D31# H_D#32
    T2 REQ2# D32# Y26
    H_REQ#3 P1 AA24 H_D#33
    H_REQ#4 REQ3# D33# H_D#34
    T1 REQ4# D34# T25
    U23 H_D#35
    D35# H_D#36
    6 H_ADSTB#0 U3 ADSTB0# D36# V23
    AE5 R24 H_D#37 +1.05VS
    6 H_ADSTB#1 ADSTB1# D37#
    R26 H_D#38
    C
    D38# H_D#39 C
    D39# R23
    A16 AA23 H_D#40
    ITP_CLK0 D40# H_D#41
    A15 ITP_CLK1 D41# U26
    V24 H_D#42 ITP_TDI R430 2 1 150_0402_5%
    D42# H_D#43
    13 CLK_CPU_BCLK B15 BCLK0 D43# U25
    B14 HOST CLK V26 H_D#44 ITP_TDO R427 2 1 @ 54.9_0402_1%
    13 CLK_CPU_BCLK# BCLK1 D44#
    Y23 H_D#45
    D45# H_D#46 H_CPURST# R429
    D46# AA26 2 1 @ 54.9_0402_1%
    Y25 H_D#47
    D47# H_D#48 ITP_TMS R428 40.2_0402_1%
    6 H_ADS# N2 ADS# D48# AB25 2 1
    L1 AC23 H_D#49
    6 H_BNR# BNR# D49#
    J3 AB24 H_D#50 PRO_CHOT# R433 2 1 56_0402_5%
    6 H_BPRI# BPRI# D50# H_D#51
    6 H_BR0# N4 BR0# D51# AC20
    L4 AC22 H_D#52 H_PWRGOOD R435 2 1 200_0402_5%
    6 H_DEFER# DEFER# D52# H_D#53
    6 H_DRDY# H2 DRDY# D53# AC25
    K3 AD23 H_D#54 H_IERR# R434 2 1 56_0402_5%
    6 H_HIT# HIT# D54#
    K4 CONTROL GROUP AE22 H_D#55
    6 H_HITM# HITM# D55#
    H_IERR# A4 AF23 H_D#56
    IERR# D56# H_D#57
    6 H_LOCK# J2 LOCK# D57# AD24
    H_CPURST# B11 AF20 H_D#58 +3VS
    6 H_CPURST# RESET# D58# H_D#59
    D59# AE21
    AD21 H_D#60
    H_RS#[0..2] H_RS#0 D60# H_D#61 ITP_DBRRESET# R437 150_0402_5%
    6 H_RS#[0..2] H1 RS0# D61# AF25 2 1
    H_RS#1 K1 AF22 H_D#62
    H_RS#2 RS1# D62# H_D#63
    L2 RS2# D63# AF26
    6 H_TRDY# M3 TRDY#
    D25 ITP_TRST# R431 2 1 680_0402_5%
    DINV0# H_DINV#0 6
    DINV1# J26 H_DINV#1 6
    B ITP_TCK R432 27.4_0402_1% B
    C8 BPM0# DINV2# T24 H_DINV#2 6 2 1
    B8 BPM1# DINV3# AD20 H_DINV#3 6
    A9 TEST1 R436 2 1 @ 1K_0402_5%
    BPM2#
    C9 BPM3#
    C23 TEST2 R454 2 1 @ 1K_0402_5%
    DSTBN0# H_DSTBN#0 6
    ITP_DBRRESET# A7 K24
    DBR# DSTBN1# H_DSTBN#1 6
    6 H_DBSY# M2 DBSY# DSTBN2# W25 H_DSTBN#2 6
    18 H_DPSLP# B7 DPSLP# DSTBN3# AE24 H_DSTBN#3 6
    18 H_DPRSTP# G1 DPRSTP# DSTBP0# C22 H_DSTBP#0 6
    6 H_DPWR# C19 DPWR# DSTBP1# L24 H_DSTBP#1 6
    A10 PRDY# MISC DSTBP2# W24 H_DSTBP#2 6
    B10 PREQ# DSTBP3# AE25 H_DSTBP#3 6
    PRO_CHOT# B17 PROCHOT#
    H_PWRGOOD E4
    18 H_PWRGOOD PWRGOOD
    H_CPUSLP# A6
    6,18 H_CPUSLP# SLP#
    ITP_TCK A13
    ITP_TDI TCK
    C12 TDI A20M# C2 H_A20M# 18
    ITP_TDO A12 D3
    TDO FERR# H_FERR# 18
    TEST1 C5 A3
    TEST1 IGNNE# H_IGNNE# 18
    TEST2 F23 B5
    TEST2 INIT# H_INIT# 18
    ITP_TMS C11 D1
    TMS LINT0 H_INTR 18
    ITP_TRST# B13 D4
    TRST# LINT1 H_NMI 18
    LEGACY CPU
    THERMAL
    THERMDA B18 C6
    THERMDC THERMDA DIODE STPCLK# H_STPCLK# 18
    A18 THERMDC SMI# B4 H_SMI# 18
    6,18 H_THERMTRIP# C17 THERMTRIP#
    A A

    TYCO_1612365-1_Dothan

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    THERMDA & THERMDC Trace / Space = 10 / 10 mil AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 4 of 50
    5 4 3 2 1
    5 4 3 2 1

    +CPU_CORE +CPU_CORE
    JP33B JP33C
    330U_D_2VM
    R186 1 2 @ 54.9_0402_1% VCCSENSE AE7 A2 1 1 1 2 x 330uF(7mOhm/2) F20 T26
    R194 1 @ 54.9_0402_1% VSSSENSE VCCSENSE VSS VCC VSS
    2 AF6 VSSSENSE VSS A5 F22 VCC VSS U2
    A8 + C54 + C53 + C647 G5 U6
    VSS VCC VSS
    VSS A11 G21 VCC VSS U22
    F26 VCCA0 VSS A14 H6 VCC VSS U24
    2 2 2
    B1 VCCA1 VSS A17 H22 VCC VSS V1
    +VCCA N1 A20 @ 330U_D_2VM 330U_D_2VM J5 V4
    VCCA2 VSS VCC VSS
    AC26 VCCA3 VSS A23 J21 VCC VSS V5
    VSS A26 K22 VCC VSS V21
    D
    +1.05VS P23 VCCQ0 VSS B3 U5 VCC VSS V25 D
    +CPU_CORE
    1.8V FOR DOTHAN-A W4 VCCQ1 VSS B6 V6 VCC VSS W3
    VSS B9 V22 VCC VSS W6
    1 2 B12 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z W5 W22
    +1.8VS R479 @ 0_1206_5% D10 VCCP
    Dothan VSS
    VSS B16 1 1
    C116
    1
    C134
    1 1
    C152
    1 1 W21
    VCC
    VCC
    VSS
    VSS W23
    D12 B19 Y6 W26
    D14
    VCCP
    VCCP
    VSS
    VSS B22
    C110 C125 C144 C151
    Y22
    VCC
    VCC
    Dothan VSS
    VSS Y2
    D16 VCCP VSS B25 AA5 VCC VSS Y5
    2 2 2 2 2 2 2
    1.5V FOR DOTHAN-B E11 VCCP VSS C1
    10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
    AA7 VCC VSS Y21
    20mils E13 C4 AA9 Y24

    POWER, GROUNG, RESERVED SIGNALS AND NC


    VCCP VSS VCC VSS
    +1.5VS 1 2 E15 VCCP VSS C7 AA11 VCC VSS AA1
    R488 0_1206_5% F10 C10 AA13 AA4
    VCCP VSS +CPU_CORE VCC VSS
    F12 VCCP VSS C13 AA15 VCC VSS AA6
    F14 VCCP VSS C15 AA17 VCC VSS AA8
    1 1 F16 C18 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AA19 AA10
    VCCP VSS VCC VSS
    K6 VCCP VSS C21 1 1 1 1 1 1 1 AA21 VCC VSS AA12
    L5 C24 C130 C114 C107 AB6 AA14
    C534 C545 VCCP VSS VCC VSS
    L21 VCCP VSS D2 AB8 VCC VSS AA16
    2 2 C142 C123 C109 C108
    M6 VCCP VSS D5 AB10 VCC VSS AA18
    0.01U_0402_16V7K 2 2 2 2 2 2 2
    M22 VCCP VSS D7 AB12 VCC VSS AA20
    10U_0805_10V4Z N5 D9 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AB14 AA22
    VCCP VSS VCC VSS
    N21 VCCP VSS D11 AB16 VCC POWER, GROUND VSS AA25
    P6 VCCP VSS D13 AB18 VCC VSS AB3
    P22 D15 +CPU_CORE AB20 AB5
    VCCP VSS VCC VSS
    R5 VCCP VSS D17 AB22 VCC VSS AB7
    R21 D19 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AC9 AB9
    VCCP VSS VCC VSS
    T6 VCCP VSS D21 1 1 1 1 1 1 1 AC11 VCC VSS AB11
    T22 D23 C560 C581 C600 AC13 AB13
    VCCP VSS VCC VSS
    U21 VCCP VSS D26 AC15 VCC VSS AB15
    C E3 C561 C569 C586 C608 AC17 AB17 C
    VSS 2 2 2 2 2 2 2 VCC VSS
    VSS E6 AC19 VCC VSS AB19
    D6 E8 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AD8 AB21
    +CPU_CORE VCC VSS VCC VSS
    D8 VCC VSS E10 AD10 VCC VSS AB23
    D18 VCC VSS E12 AD12 VCC VSS AB26
    D20 E14 +CPU_CORE AD14 AC2
    VCC VSS VCC VSS
    D22 VCC VSS E16 AD16 VCC VSS AC5
    E5 E18 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AD18 AC8
    VCC VSS VCC VSS
    E7 VCC VSS E20 1 1 1 1 1 1 1 AE9 VCC VSS AC10
    E9 E22 C618 C596 C577 AE11 AC12
    VCC VSS VCC VSS
    E17 VCC VSS E25 AE13 VCC VSS AC14
    E19 F1 C617 C607 C585 C567 AE15 AC16
    VCC VSS 2 2 2 2 2 2 2 VCC VSS
    E21 VCC VSS F4 AE17 VCC VSS AC18
    F6 F5 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AE19 AC21
    VCC VSS VCC VSS
    F8 VCC VSS F7 AF8 VCC VSS AC24
    F18 VCC VSS F9 AF10 VCC VSS AD1
    F11 +CPU_CORE AF12 AD4
    VSS VCC VSS
    VSS F13 AF14 VCC VSS AD7
    48 PSI# E1 F15 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AF16 AD9
    PSI# VSS VCC VSS
    VSS F17 1 1 1 1 1 1 1 AF18 VCC VSS AD11
    +1.05VS E2 F19 C145 C118 C90 AD13
    48 CPU_VID0 VID0 VSS VSS
    48 CPU_VID1 F2 VID1 VSS F21 VSS AD15
    F3 F24 C154 C131 C76 C85 AD17
    48 CPU_VID2 VID2 VSS VSS
    1

    2 2 2 2 2 2 2
    48 CPU_VID3 G3 VID3 VSS G2 VSS AD19
    R183 G4 G6 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AD22
    1K_0402_1% 48 CPU_VID4 VID4 VSS VSS
    48 CPU_VID5 H4 VID5 VSS G22 M4 VSS VSS AD25
    VSS G23 M5 VSS VSS AE3
    G26 M21 AE6
    2

    GTL_REF0 VSS VSS VSS


    1 2 AD26 GTLREF VSS H3 M24 VSS VSS AE8
    B R182 2K_0402_1% B
    VSS H5 Vcc-core C,uF ESR, mohm ESL,nH N3 VSS VSS AE10
    VSS H21 Decoupling N6 VSS VSS AE12
    13 CPU_BSEL0 C16 BSEL0 VSS H25 N22 VSS VSS AE14
    13 CPU_BSEL1 C14 BSEL1 VSS J1 SPCAP,Polymer 2X330uF 7m ohm/2 3.5nH/2 N23 VSS VSS AE16
    VSS J4 N26 VSS VSS AE18
    COMP0 P25 J6 MLCC 0805 X5R 35X10uF 5m ohm/35 0.6nH/35 P2 AE20
    COMP1 COMP0 VSS VSS VSS
    P26 COMP1 VSS J22 P5 VSS VSS AE23
    COMP2 AB2 J24 P21 AE26
    COMP3 COMP2 VSS VSS VSS
    AB1 COMP3 VSS K2 P24 VSS VSS AF2
    VSS K5 R1 VSS VSS AF5
    VSS K21 R4 VSS VSS AF9
    VSS K23 R6 VSS VSS AF11
    B2 RSVD VSS K26 R22 VSS VSS AF13
    C3 RSVD VSS L3 R25 VSS VSS AF15
    E26 L6 +1.05VS T3 AF17
    RSVD VSS VSS VSS
    AF7 RSVD VSS L22 T5 VSS VSS AF19
    AC1 L25 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z T21 AF21
    RSVD VSS VSS VSS
    VSS M1 1 T23 VSS VSS AF24
    1 1 1 1 1 1 1 1 1 1
    +
    TYCO_1612365-1_Dothan C524 C158 C26 C29 C23 C28 C22 C24 C25 C27 C153 TYCO_1612365-1_Dothan
    2 2 2 2 2 2 2 2 2 2 2

    150U_D2_6.3VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

    om
    R504 1 2 27.4_0402_1% COMP0
    A A
    R509 1 2 54.9_0402_1% COMP1

    l.c
    ai
    R180 1 2 27.4_0402_1% COMP2

    tm
    R178 1 2 54.9_0402_1% COMP3

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    TRACE CLOSELY CPU < 0.5' Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    COMP0, COMP2 layout : Width 18mils and Space 25mils SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    COMP1, COMP3 layout : Space 25mils Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 5 of 50
    5 4 3 2 1
    5 4 3 2 1

    H_RS#[0..2] +1.5VS
    H_RS#[0..2] 4
    H_A#[3..31]
    4 H_A#[3..31] CLK_DREF_SSC R56 1 2 PM@ 0_0402_5%
    H_REQ#[0..4] H_D#[0..63]
    4 H_REQ#[0..4] H_D#[0..63] 4
    CLK_DREF_SSC# R46 1 2 PM@ 0_0402_5%
    U40A
    U40B
    H_A#3 G9 E4 H_D#0
    H_A#4 C9
    HA3#
    HA4#
    Alviso HD0#
    HD1# E1 H_D#1
    19 DMI_ITX_MRX_N0
    DMI_ITX_MRX_N0 AA31 DMIRXN0 CFG0 G16 CFG0
    H_A#5 E9 F4 H_D#2 DMI_ITX_MRX_N1 AB35 H13 MCH_CLKSEL1
    HA5# HD2# 19 DMI_ITX_MRX_N1 DMIRXN1 CFG1 MCH_CLKSEL1 13
    H_A#6 B7 H7 H_D#3 DMI_ITX_MRX_N2 AC31 G14 MCH_CLKSEL0
    HA6# HD3# 19 DMI_ITX_MRX_N2 DMIRXN2 CFG2 MCH_CLKSEL0 13
    D H_A#7 A10 E2 H_D#4 DMI_ITX_MRX_N3 AD35 F16 D
    HA7# HD4# 19 DMI_ITX_MRX_N3 DMIRXN3 CFG3
    H_A#8 F9 F1 H_D#5 F15
    H_A#9 HA8# HD5# H_D#6 DMI_ITX_MRX_P0 CFG4 CFG5 +1.05VS
    D8 HA9# HD6# E3 19 DMI_ITX_MRX_P0 Y31 DMIRXP0 CFG5 G15
    H_A#10 B10 D3 H_D#7 DMI_ITX_MRX_P1 AA35 E16 CFG6
    HA10# HD7# 19 DMI_ITX_MRX_P1 DMIRXP1 CFG6
    H_A#11 E10 K7 H_D#8 DMI_ITX_MRX_P2 AB31 D17 CFG7 CFG0 R85 1 2 10K_0402_5%
    HA11# HD8# 19 DMI_ITX_MRX_P2 DMIRXP2 CFG7
    H_A#12 G10 F2 H_D#9 DMI_ITX_MRX_P3 AC35 J16
    HA12# HD9# 19 DMI_ITX_MRX_P3 DMIRXP3 CFG8
    H_A#13 D9 J7 H_D#10 D15 CFG9
    H_A#14 HA13# HD10# H_D#11 DMI_MTX_IRX_N0 CFG9
    E11 HA14# HD11# J8 19 DMI_MTX_IRX_N0 AA33 DMITXN0 CFG10 E15
    H_A#15 F10 H6 H_D#12 DMI_MTX_IRX_N1 AB37 D14 CFG5 R86 1 2 @ 1K_0402_5%
    19 DMI_MTX_IRX_N1

    DMI
    H_A#16 HA15# HD12# H_D#13 DMI_MTX_IRX_N2 DMITXN1 CFG11 CFG12
    G11 HA16# HD13# F3 19 DMI_MTX_IRX_N2 AC33 DMITXN2 CFG12 E14
    H_A#17 G13 K8 H_D#14 DMI_MTX_IRX_N3 AD37 H12 CFG13 CFG6 R66 1 2 1K_0402_5%
    HA17# HD14# 19 DMI_MTX_IRX_N3 DMITXN3 CFG13
    H_A#18 C10 H5 H_D#15 C14
    H_A#19 HA18# HD15# H_D#16 DMI_MTX_IRX_P0 CFG14 CFG7 R51 2 @ 1K_0402_5%

    CFG/RSVD
    C11 HA19# HD16# H1 19 DMI_MTX_IRX_P0 Y33 DMITXP0 CFG15 H15 1
    H_A#20 D11 H2 H_D#17 DMI_MTX_IRX_P1 AA37 J15 CFG16
    HA20# HD17# 19 DMI_MTX_IRX_P1 DMITXP1 CFG16
    H_A#21 C12 K5 H_D#18 DMI_MTX_IRX_P2 AB33 H14 CFG9 R67 1 2 @ 1K_0402_5%
    HA21# HD18# 19 DMI_MTX_IRX_P2 DMITXP2 CFG17
    H_A#22 B13 K6 H_D#19 DMI_MTX_IRX_P3 AC37 G22 CFG18
    HA22# HD19# 19 DMI_MTX_IRX_P3 DMITXP3 CFG18
    H_A#23 A12 J4 H_D#20 G23 CFG19 CFG12 R50 1 2 @ 1K_0402_5%
    H_A#24 HA23# HD20# H_D#21 CFG19
    F12 HA24# HD21# G3 CFG20 D23
    H_A#25 G12 H3 H_D#22 AM33 G25 CFG13 R90 1 2 @ 1K_0402_5%
    HA25# HD22# 11 DDRA_CLK0 SM_CK0 RSVD21
    H_A#26 E12 J1 H_D#23 AL1 G24
    HA26# HD23# 11 DDRA_CLK1 SM_CK1 RSVD22
    H_A#27 C13 L5 H_D#24 AE11 J17 CFG16 R94 1 2 @ 1K_0402_5%
    H_A#28 HA27# HD24# H_D#25 SM_CK2 RSVD23
    B11 HA28# HD25# K4 12 DDRB_CLK0 AJ34 SM_CK3 RSVD24 A31
    H_A#29 D13 J5 H_D#26 AF6 A30
    HA29# HD26# 12 DDRB_CLK1 SM_CK4 RSVD25
    H_A#30 A13 P7 H_D#27 AC10 D26 CFG[17:3]: internal pull-up
    H_A#31 HA30# HD27# H_D#28 SM_CK5 RSVD26
    F13 HA31# HD28# L7 RSVD27 D25
    J3 H_D#29 AN33
    HD29# 11 DDRA_CLK0# SM_CK0# +2.5VS

    DDR MUXING
    A11 P5 H_D#30 AK1
    HOST

    HPCREQ# HD30# 11 DDRA_CLK1# SM_CK1#


    H_REQ#0 A7 L3 H_D#31 AE10
    H_REQ#1 HREQ#0 HD31# H_D#32 SM_CK2# CFG18 R84
    D7 HREQ#1 HD32# U7 12 DDRB_CLK0# AJ33 SM_CK3# 1 2 @ 1K_0402_5%
    C H_REQ#2 B8 V6 H_D#33 AF5 C
    HREQ#2 HD33# 12 DDRB_CLK1# SM_CK4#
    H_REQ#3 C7 R6 H_D#34 AD10 CFG19 R83 1 2 @ 1K_0402_5%
    H_REQ#4 HREQ#3 HD34# H_D#35 SM_CK5#
    A8 HREQ#4 HD35# R5
    B9 P3 H_D#36 AP21 CFG[19:18]: internal pull-down
    4 H_ADSTB#0 HADSTB#0 HD36# 11 DDRA_CKE0 SM_CKE0
    E13 T8 H_D#37 AM21
    4 H_ADSTB#1 HADSTB#1 HD37# 11 DDRA_CKE1 SM_CKE1
    R7 H_D#38 AH21
    HD38# 12 DDRB_CKE0 SM_CKE2
    AB1 R8 H_D#39 AK21
    13 CLK_MCH_BCLK# HCLKN HD39# 12 DDRB_CKE1 SM_CKE3
    AB2 U8 H_D#40 J23
    13 CLK_MCH_BCLK HCLKP HD40# BM_BUSY# PM_BMBUSY# 19
    R4 H_D#41 AN16 J21 EXT_TS#0
    HD41# 11 DDRA_SCS#0 SM_CS0# EXT_TS0#
    G4 T4 H_D#42 AM14 H22 EXT_TS#1
    4 H_DSTBN#0 HDSTBN#0 HD42# 11 DDRA_SCS#1 SM_CS1# EXT_TS1#
    K1 T5 H_D#43 Alviso Check List : NC AH15 F5 H_THERMTRIP#
    4 H_DSTBN#1 HDSTBN#1 HD43# 12 DDRB_SCS#0 SM_CS2# THRMTRIP# H_THERMTRIP# 4,18
    R3 R1 H_D#44 AG16 AD30
    4 H_DSTBN#2 HDSTBN#2 HD44# 12 DDRB_SCS#1 SM_CS3# PWROK VGATE 13,19,48
    V3 T3 H_D#45 AE29

    CLK PM
    4 H_DSTBN#3 HDSTBN#3 HD45# RSTIN# PLT_RST# 17,19,21,30,32
    G5 V8 H_D#46 R163 1 2 @ 40.2_0402_1%10mils M_OCDCOMP0 AF22
    4 H_DSTBP#0 HDSTBP#0 HD46# H_D#47 R164 1 SM_OCDCOMP0
    4 H_DSTBP#1 K2 HDSTBP#1 HD47# U6 2 @ 40.2_0402_1%10mils M_OCDCOMP1 AF16 SM_OCDCOMP1
    R2 W6 H_D#48 AP14 A24 CLK_DREF_96M#
    4 H_DSTBP#2 HDSTBP#2 HD48# 11 DDRA_ODT0 SM_ODT0 DREF_CLKN CLK_DREF_96M# 13
    W4 U3 H_D#49 AL15 A23 CLK_DREF_96M
    4 H_DSTBP#3 HDSTBP#3 HD49# 11 DDRA_ODT1 SM_ODT1 DREF_CLKP CLK_DREF_96M 13
    H8 V5 H_D#50 AM11 D37 CLK_DREF_SSC
    4 H_DINV#0 HDINV#0 HD50# 12 DDRB_ODT0 SM_ODT2 DREF_SSCLKP CLK_DREF_SSC 13
    K3 W8 H_D#51 AN10 C37 CLK_DREF_SSC#
    4 H_DINV#1 HDINV#1 HD51# 12 DDRB_ODT1 SM_ODT3 DREF_SSCLKN CLK_DREF_SSC# 13
    T7 W7 H_D#52
    4 H_DINV#2 HDINV#2 HD52# H_D#53 R172 1
    4 H_DINV#3 U5 HDINV#3 HD53# U2 +1.8V 2 80.6_0402_1%10mils M_RCOMPN AK10 SMRCOMPN
    U1 H_D#54 R174 1 2 80.6_0402_1%10mils M_RCOMPP AK11 AP37 +2.5VS
    HD54# H_D#55 SMVREF SMRCOMPP NC1
    HD55# Y5 AF37 SMVREF0 NC2 AN37
    H10 Y2 H_D#56 AD1 AP36 EXT_TS#0 R97 1 2 10K_0402_5%
    4 H_CPURST# HCPURST# HD56# H_D#57 M_XSLEW SMVREF1 NC3
    HD57# V4 AE27 SMXSLEWIN NC4 AP2
    F8 Y7 H_D#58 10mils AE28 AP1 EXT_TS#1 R96 1 2 10K_0402_5%
    4 H_ADS# HADS# HD58# H_D#59 M_YSLEW SMXSLEWOUT NC5
    4 H_TRDY# B5 HTRDY# HD59# W1 AF9 SMYSLEWIN NC6 AN1
    G6 W3 H_D#60 10mils AF10 B1
    4 H_DPWR# HDPWR# HD60# SMYSLEWOUT NC7
    F7 Y3 H_D#61 A2
    B 4 H_DRDY# HDRDY# HD61# H_D#62 NC8 B
    4 H_DEFER# E6 HDEFER# HD62# Y6 NC9 B37 Refer to sheet 6 for FSB
    H_D#63

    NC
    F6 HEDRDY# HD63# W2
    +1.05VS NC10 A36 CFG[2:0] frequency select
    4 H_HITM# D6 HHITM# NC11 A37
    D4 J11 H_VREF Low = DMI x 2
    4 H_HIT# HHIT# HVREF H_XRCOMP R43 2 24.9_0402_1%
    B3 C1 1 (10mil:20mil) CFG5 High = DMI x 4
    4
    4
    H_LOCK#
    H_BR0# E7
    HLOCK#
    HBREQ0#
    HXRCOMP
    HXSCOMP C2 H_XSCOMP
    H_YRCOMP
    R45 1
    R1162
    2 54.9_0402_1%
    24.9_0402_1%
    PM@ ALVISO_BGA1257 *
    A5 T1 1 Low = DDR-II
    4
    4
    H_BNR#
    H_BPRI# D5
    HBNR#
    HBPRI#
    HYRCOMP
    HYSCOMP L1 H_YSCOMP
    H_XSWING
    R1041 2 54.9_0402_1% CFG6 High = DDR-I *
    4 H_DBSY# C6 HDBSY# HXSWING D1
    CPU_SLP# G8 P1 H_YSWING Low = DT/Transportable CPU
    H_RS#0 HCPUSLP# HYSWING
    A4 CFG7 High = Mobile CPU
    H_RS#1
    H_RS#2
    C5
    HRS0#
    HRS1# H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil *
    B4 HRS2# +1.8V CFG9 Low = Reverse Lane
    High = Normal Operation
    PM@ ALVISO_BGA1257
    *
    Un-pop for Dothan-A 00 = Reserved
    1

    CFG[13:12] 01 = XOR Mode Enabled


    R82 1 2 0_0402_5% CPU_SLP# R159 10 = All Z Mode Enabled
    4,18 H_CPUSLP#
    11 = Normal Operation (Default)
    1K_0402_1% *
    CFG16
    2

    0.1U_0402_16V4Z SMVREF Low = Disabled


    +1.05VS +1.05VS +1.05VS (FSB Dynamic
    15mils High = Enabled
    *
    1

    1 1 ODT)
    R151 C124
    1

    C127 CFG18
    R36 R68 R107 1K_0402_1% 0.1U_0402_16V4Z Low = 1.05V (Default)
    100_0603_1% 221_0603_1% 221_0603_1% 2 2 (VCC Select) High = 1.5V *
    2

    A A
    (5mil:15mil) (12mil:10mil) CFG19
    2

    Low = 1.05V (Default)


    H_VREF H_XSWING H_YSWING (12mil:10mil) (VTT Select) High = 1.2V *
    1

    1 1 1
    C75 R35 C59 R52 C91
    R111 Security Classification Compal Secret Data Compal Electronics, Inc.
    0.1U_0402_16V4Z 200_0603_1% 0.1U_0402_16V4Z 100_0603_1% 0.1U_0402_16V4Z 100_0603_1% 2005/03/01 2006/03/01 Title
    2 2 2 Issued Date Deciphered Date
    SCHEMATIC, M/B LA-2781
    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 6 of 50
    5 4 3 2 1
    5 4 3 2 1

    DDRA_SDQ[0..63] DDRB_SDQ[0..63]
    11 DDRA_SDQ[0..63] 12 DDRB_SDQ[0..63]
    DDRA_SDM[0..7] DDRB_SDM[0..7]
    11 DDRA_SDM[0..7] 12 DDRB_SDM[0..7]

    DDRB_SMA[0..13]
    12 DDRB_SMA[0..13]
    DDRA_SMA[0..13]
    11 DDRA_SMA[0..13]
    D D

    U40C U40D
    AK15 AG35 DDRA_SDQ0 AJ15 AE31 DDRB_SDQ0
    11 DDRA_SBS0# SA_BS0# SADQ0 12 DDRB_SBS0# SB_BS0# SBDQ0
    AK16 AH35 DDRA_SDQ1 AG17 AE32 DDRB_SDQ1
    11 DDRA_SBS1# SA_BS1# SADQ1 12 DDRB_SBS1# SB_BS1# SBDQ1
    AL21 AL35 DDRA_SDQ2 AG21 AG32 DDRB_SDQ2
    11 DDRA_SBS2# SA_BS2# SADQ2 12 DDRB_SBS2# SB_BS2# SBDQ2
    AL37 DDRA_SDQ3 AG36 DDRB_SDQ3
    DDRA_SDM0 SADQ3 DDRA_SDQ4 DDRB_SDM0 SBDQ3 DDRB_SDQ4
    AJ37 SA_DM0 SADQ4 AH36 AF32 SB_DM0 SBDQ4 AE34
    DDRA_SDM1 AP35 AJ35 DDRA_SDQ5 DDRB_SDM1 AK34 AE33 DDRB_SDQ5
    DDRA_SDM2 SA_DM1 SADQ5 DDRA_SDQ6 DDRB_SDM2 SB_DM1 SBDQ5 DDRB_SDQ6
    AL29 SA_DM2 SADQ6 AK37 AK27 SB_DM2 SBDQ6 AF31
    DDRA_SDM3 AP24 AL34 DDRA_SDQ7 DDRB_SDM3 AK24 AF30 DDRB_SDQ7
    DDRA_SDM4 SA_DM3 SADQ7 DDRA_SDQ8 DDRB_SDM4 SB_DM3 SBDQ7 DDRB_SDQ8
    AP9 SA_DM4 SADQ8 AM36 AJ10 SB_DM4 SBDQ8 AH33
    DDRA_SDM5 AP4 AN35 DDRA_SDQ9 DDRB_SDM5 AK5 AH32 DDRB_SDQ9
    DDRA_SDM6 SA_DM5 SADQ9 DDRA_SDQ10 DDRB_SDM6 SB_DM5 SBDQ9 DDRB_SDQ10
    AJ2 SA_DM6 SADQ10 AP32 AE7 SB_DM6 SBDQ10 AK31
    DDRA_SDM7 AD3 AM31 DDRA_SDQ11 DDRB_SDM7 AB7 AG30 DDRB_SDQ11
    SA_DM7 SADQ11 DDRA_SDQ12 SB_DM7 SBDQ11 DDRB_SDQ12
    SADQ12 AM34 SBDQ12 AG34
    DDRA_SDQS0 AK36 AM35 DDRA_SDQ13 DDRB_SDQS0 AF34 AG33 DDRB_SDQ13
    11 DDRA_SDQS0 DDRA_SDQS1 SA_DQS0 SADQ13 DDRA_SDQ14 12 DDRB_SDQS0 DDRB_SDQS1 SB_DQS0 SBDQ13 DDRB_SDQ14
    11 DDRA_SDQS1 AP33 SA_DQS1 SADQ14 AL32 12 DDRB_SDQS1 AK32 SB_DQS1 SBDQ14 AH31
    DDRA_SDQS2 AN29 AM32 DDRA_SDQ15 DDRB_SDQS2 AJ28 AJ31 DDRB_SDQ15
    11 DDRA_SDQS2 DDRA_SDQS3 SA_DQS2 SADQ15 DDRA_SDQ16 12 DDRB_SDQS2 DDRB_SDQS3 SB_DQS2 SBDQ15 DDRB_SDQ16
    11 DDRA_SDQS3 AP23 SA_DQS3 SADQ16 AN31 12 DDRB_SDQS3 AK23 SB_DQS3 SBDQ16 AK30
    DDRA_SDQS4 AM8 AP31 DDRA_SDQ17 DDRB_SDQS4 AM10 AJ30 DDRB_SDQ17
    11 DDRA_SDQS4 DDRA_SDQS5 SA_DQS4 SADQ17 DDRA_SDQ18 12 DDRB_SDQS4 DDRB_SDQS5 SB_DQS4 SBDQ17 DDRB_SDQ18
    11 DDRA_SDQS5 AM4 SA_DQS5 SADQ18 AN28 12 DDRB_SDQS5 AH6 SB_DQS5 SBDQ18 AH29
    DDRA_SDQS6 AJ1 AP28 DDRA_SDQ19 DDRB_SDQS6 AF8 AH28 DDRB_SDQ19
    11 DDRA_SDQS6 DDRA_SDQS7 SA_DQS6 SADQ19 DDRA_SDQ20 12 DDRB_SDQS6 DDRB_SDQS7 SB_DQS6 SBDQ19 DDRB_SDQ20
    11 DDRA_SDQS7 AE5 SA_DQS7 SADQ20 AL30 12 DDRB_SDQS7 AB4 SB_DQS7 SBDQ20 AK29
    AM30 DDRA_SDQ21 AH30 DDRB_SDQ21
    DDRA_SDQS0# SADQ21 DDRA_SDQ22 DDRB_SDQS0# SBDQ21 DDRB_SDQ22
    11 DDRA_SDQS0# AK35 SA_DQS0# SADQ22 AM28 12 DDRB_SDQS0# AF35 SB_DQS0# SBDQ22 AH27
    C DDRA_SDQS1# AP34 AL28 DDRA_SDQ23 DDRB_SDQS1# AK33 AG28 DDRB_SDQ23 C

    DDR SYSTEM MEMORY B


    11 DDRA_SDQS1# DDRA_SDQS2# SA_DQS1# SADQ23 DDRA_SDQ24 12 DDRB_SDQS1# DDRB_SDQS2# SB_DQS1# SBDQ23 DDRB_SDQ24
    AN30 AP27 AK28 AF24
    DDR MEMORY SYSTEM A

    11 DDRA_SDQS2# DDRA_SDQS3# SA_DQS2# SADQ24 DDRA_SDQ25 12 DDRB_SDQS2# DDRB_SDQS3# SB_DQS2# SBDQ24 DDRB_SDQ25
    11 DDRA_SDQS3# AN23 SA_DQS3# SADQ25 AM27 12 DDRB_SDQS3# AJ23 SB_DQS3# SBDQ25 AG23
    DDRA_SDQS4# AN8 AM23 DDRA_SDQ26 DDRB_SDQS4# AL10 AJ22 DDRB_SDQ26
    11 DDRA_SDQS4# DDRA_SDQS5# SA_DQS4# SADQ26 DDRA_SDQ27 12 DDRB_SDQS4# DDRB_SDQS5# SB_DQS4# SBDQ26 DDRB_SDQ27
    11 DDRA_SDQS5# AM5 SA_DQS5# SADQ27 AM22 12 DDRB_SDQS5# AH7 SB_DQS5# SBDQ27 AK22
    DDRA_SDQS6# AH1 AL23 DDRA_SDQ28 DDRB_SDQS6# AF7 AH24 DDRB_SDQ28
    11 DDRA_SDQS6# DDRA_SDQS7# SA_DQS6# SADQ28 DDRA_SDQ29 12 DDRB_SDQS6# DDRB_SDQS7# SB_DQS6# SBDQ28 DDRB_SDQ29
    11 DDRA_SDQS7# AE4 SA_DQS7# SADQ29 AM24 12 DDRB_SDQS7# AB5 SB_DQS7# SBDQ29 AH23
    AN22 DDRA_SDQ30 AG22 DDRB_SDQ30
    DDRA_SMA0 SADQ30 DDRA_SDQ31 DDRB_SMA0 SBDQ30 DDRB_SDQ31
    AL17 SA_MA0 SADQ31 AP22 AH17 SB_MA0 SBDQ31 AJ21
    DDRA_SMA1 AP17 AM9 DDRA_SDQ32 DDRB_SMA1 AK17 AG10 DDRB_SDQ32
    DDRA_SMA2 SA_MA1 SADQ32 DDRA_SDQ33 DDRB_SMA2 SB_MA1 SBDQ32 DDRB_SDQ33
    AP18 SA_MA2 SADQ33 AL9 AH18 SB_MA2 SBDQ33 AG9
    DDRA_SMA3 AM17 AL6 DDRA_SDQ34 DDRB_SMA3 AJ18 AG8 DDRB_SDQ34
    DDRA_SMA4 SA_MA3 SADQ34 DDRA_SDQ35 DDRB_SMA4 SB_MA3 SBDQ34 DDRB_SDQ35
    AN18 SA_MA4 SADQ35 AP7 AK18 SB_MA4 SBDQ35 AH8
    DDRA_SMA5 AM18 AP11 DDRA_SDQ36 DDRB_SMA5 AJ19 AH11 DDRB_SDQ36
    DDRA_SMA6 SA_MA5 SADQ36 DDRA_SDQ37 DDRB_SMA6 SB_MA5 SBDQ36 DDRB_SDQ37
    AL19 SA_MA6 SADQ37 AP10 AK19 SB_MA6 SBDQ37 AH10
    DDRA_SMA7 AP20 AL7 DDRA_SDQ38 DDRB_SMA7 AH19 AJ9 DDRB_SDQ38
    DDRA_SMA8 SA_MA7 SADQ38 DDRA_SDQ39 DDRB_SMA8 SB_MA7 SBDQ38 DDRB_SDQ39
    AM19 SA_MA8 SADQ39 AM7 AJ20 SB_MA8 SBDQ39 AK9
    DDRA_SMA9 AL20 AN5 DDRA_SDQ40 DDRB_SMA9 AH20 AJ7 DDRB_SDQ40
    DDRA_SMA10 SA_MA9 SADQ40 DDRA_SDQ41 DDRB_SMA10 SB_MA9 SBDQ40 DDRB_SDQ41
    AM16 SA_MA10 SADQ41 AN6 AJ16 SB_MA10 SBDQ41 AK6
    DDRA_SMA11 AN20 AN3 DDRA_SDQ42 DDRB_SMA11 AG18 AJ4 DDRB_SDQ42
    DDRA_SMA12 SA_MA11 SADQ42 DDRA_SDQ43 DDRB_SMA12 SB_MA11 SBDQ42 DDRB_SDQ43
    AM20 SA_MA12 SADQ43 AP3 AG20 SB_MA12 SBDQ43 AH5
    DDRA_SMA13 AM15 AP6 DDRA_SDQ44 DDRB_SMA13 AG15 AK8 DDRB_SDQ44
    SA_MA13 SADQ44 DDRA_SDQ45 SB_MA13 SBDQ44 DDRB_SDQ45
    SADQ45 AM6 SBDQ45 AJ8
    AN15 AL4 DDRA_SDQ46 AH14 AJ5 DDRB_SDQ46
    11 DDRA_SCAS# SA_CAS# SADQ46 12 DDRB_SCAS# SB_CAS# SBDQ46
    AP16 AM3 DDRA_SDQ47 AK14 AK4 DDRB_SDQ47
    11 DDRA_SRAS# SA_RAS# SADQ47 12 DDRB_SRAS# SB_RAS# SBDQ47
    AF29 AK2 DDRA_SDQ48 AF15 AG5 DDRB_SDQ48
    SA_RCVENIN# SADQ48 DDRA_SDQ49 SB_RCVENIN# SBDQ48 DDRB_SDQ49
    AF28 SA_RCVENOUT# SADQ49 AK3 AF14 SB_RCVENOUT# SBDQ49 AG4
    AP15 AG2 DDRA_SDQ50 AH16 AD8 DDRB_SDQ50
    11 DDRA_SWE# SA_WE# SADQ50 12 DDRB_SWE# SB_WE# SBDQ50
    AG1 DDRA_SDQ51 AD9 DDRB_SDQ51
    B SADQ51 DDRA_SDQ52 SBDQ51 DDRB_SDQ52 B
    SADQ52 AL3 SBDQ52 AH4
    AF28,AF29 should be routed to a via AM2 DDRA_SDQ53 AF14,AF15 should be routed to a via AG6 DDRB_SDQ53
    SADQ53 DDRA_SDQ54 SBDQ53 DDRB_SDQ54
    SADQ54 AH3 SBDQ54 AE8
    AG3 DDRA_SDQ55 AD7 DDRB_SDQ55
    SADQ55 DDRA_SDQ56 SBDQ55 DDRB_SDQ56
    SADQ56 AF3 SBDQ56 AC5
    AE3 DDRA_SDQ57 AB8 DDRB_SDQ57
    SADQ57 DDRA_SDQ58 SBDQ57 DDRB_SDQ58
    SADQ58 AD6 SBDQ58 AB6
    AC4 DDRA_SDQ59 AA8 DDRB_SDQ59
    SADQ59 DDRA_SDQ60 SBDQ59 DDRB_SDQ60
    SADQ60 AF2 SBDQ60 AC8
    AF1 DDRA_SDQ61 AC7 DDRB_SDQ61
    SADQ61 DDRA_SDQ62 SBDQ61 DDRB_SDQ62
    SADQ62 AD4 SBDQ62 AA4
    AD5 DDRA_SDQ63 AA5 DDRB_SDQ63
    SADQ63 SBDQ63

    PM@ ALVISO_BGA1257 PM@ ALVISO_BGA1257

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    A A

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    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 7 of 50
    5 4 3 2 1
    5 4 3 2 1

    +3VS +2.5VS
    PCIE_MTX_C_GRX_N[0..15]
    15 PCIE_MTX_C_GRX_N[0..15]

    1
    PCIE_MTX_C_GRX_P[0..15]
    15 PCIE_MTX_C_GRX_P[0..15]
    R28 PCIE_GTX_C_MRX_N[0..15]
    15 PCIE_GTX_C_MRX_N[0..15]
    GM@ 2.2K_0402_5%

    2
    PCIE_GTX_C_MRX_P[0..15]

    G
    15 PCIE_GTX_C_MRX_P[0..15]

    2
    15,32 ENBKL 1 3 LBKLT_EN U40G
    H24 D36 PEG_COMP 1 2

    S
    16 SDVO_SDAT SDVOCTRL_DATA EXP_COMPI +1.5VS
    H25 D34 10mils R53 24.9_0402_1%
    16 SDVO_SCLK SDVOCTRL_CLK EXP_ICOMPO
    Q3 AB29

    MISC
    D 13 CLK_MCH_3GPLL# D
    GM@ BSS138_SOT23 GCLKN PCIE_GTX_C_MRX_N0
    13 CLK_MCH_3GPLL AC29 GCLKP EXP_RXN0/SDVO_TVCLKIN# E30
    F34 PCIE_GTX_C_MRX_N1
    EXP_RXN1/SDVO_INT# PCIE_GTX_C_MRX_N2
    EXP_RXN2/SDVO_FLDSTALL# G30
    GMCH_TV_COMPS A15 H34 PCIE_GTX_C_MRX_N3
    14 GMCH_TV_COMPS TVDAC_A EXP_RXN3
    GMCH_TV_LUMA C16 J30 PCIE_GTX_C_MRX_N4
    14 GMCH_TV_LUMA TVDAC_B EXP_RXN4
    GMCH_TV_CRMA A17 K34 PCIE_GTX_C_MRX_N5
    14 GMCH_TV_CRMA TVDAC_C EXP_RXN5
    R95
    2 1
    4.99K_0402_1%
    10mils TV_REFSET J18 TV_REFSET EXP_RXN6 L30 PCIE_GTX_C_MRX_N6
    PCIE_GTX_C_MRX_N7
    B15 TV_IRTNA EXP_RXN7 M34
    B16 N30 PCIE_GTX_C_MRX_N8
    TV_IRTNB EXP_RXN8 PCIE_GTX_C_MRX_N9
    B17 P34

    TV
    TV_IRTNC EXP_RXN9 PCIE_GTX_C_MRX_N10
    EXP_RXN10 R30
    T34 PCIE_GTX_C_MRX_N11
    EXP_RXN11 PCIE_GTX_C_MRX_N12
    EXP_RXN12 U30
    V34 PCIE_GTX_C_MRX_N13
    EXP_RXN13 PCIE_GTX_C_MRX_N14
    EXP_RXN14 W30
    GMCH_CRT_CLK E24 Y34 PCIE_GTX_C_MRX_N15
    14 GMCH_CRT_CLK DDCCLK EXP_RXN15
    GMCH_CRT_DATA E23
    14 GMCH_CRT_DATA DDCDATA
    E21 D30 PCIE_GTX_C_MRX_P0
    14 GMCH_CRT_B BLUE EXP_RXP0/SDVO_TVCLKIN
    2 1 D21 E34 PCIE_GTX_C_MRX_P1
    R70 150_0402_5% BLUE# EXP_RXP1/SDVO_INT PCIE_GTX_C_MRX_P2
    14 GMCH_CRT_G C20 GREEN EXP_RXP2/SDVO_FLDSTALL F30
    2 1 B20 G34 PCIE_GTX_C_MRX_P3
    R38 150_0402_5% GREEN# EXP_RXP3 PCIE_GTX_C_MRX_P4
    14 GMCH_CRT_R A19 RED EXP_RXP4 H30
    2 1 B19 J34 PCIE_GTX_C_MRX_P5
    R39 150_0402_5% RED# EXP_RXP5 PCIE_GTX_C_MRX_P6
    H21 K30

    VGA
    14 GMCH_CRT_VSYNC VSYNC EXP_RXP6
    G21 L34 PCIE_GTX_C_MRX_P7
    14 GMCH_CRT_HSYNC HSYNC EXP_RXP7

    PCI - EXPRESS GRAPHICS


    1 2 REFSET J20 REFSET EXP_RXP8 M30 PCIE_GTX_C_MRX_P8
    R101 255_0402_1% N34 PCIE_GTX_C_MRX_P9
    EXP_RXP9 PCIE_GTX_C_MRX_P10
    C
    10mils EXP_RXP10 P30
    PCIE_GTX_C_MRX_P11 C
    EXP_RXP11 R34
    T30 PCIE_GTX_C_MRX_P12
    EXP_RXP12 PCIE_GTX_C_MRX_P13
    EXP_RXP13 U34
    V30 PCIE_GTX_C_MRX_P14
    EXP_RXP14 PCIE_GTX_C_MRX_P15
    EXP_RXP15 W34
    +2.5VS E25
    LBKLT_EN LBKLT_CTL PCIE_MTX_GRX_N0 C427
    F25 LBKLT_EN EXP_TXN0/SDVOB_RED# E32 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N0
    R54 1 2 4.7K_0402_5% GMCH_CRT_CLK LCTLA_CLK C23 F36 PCIE_MTX_GRX_N1 C437 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N1
    LCTLB_DATA LCTLA_CLK EXP_TXN1/SDVOB_GREEN# PCIE_MTX_GRX_N2 C453
    C22 LCTLB_DATA EXP_TXN2/SDVOB_BLUE# G32 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N2
    R55 1 2 4.7K_0402_5% GMCH_CRT_DATA LDDC_CLK F23 H36 PCIE_MTX_GRX_N3 C462 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N3
    LDDC_DATA LDDC_CLK EXP_TXN3/SDVOB_CLKN PCIE_MTX_GRX_N4 C482
    F22 LDDC_DATA EXP_TXN4/SDVOC_RED# J32 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N4
    R42 1 2 2.2K_0402_5% LCTLB_DATA GMCH_ENVDD F26 K36 PCIE_MTX_GRX_N5 C492 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N5
    15 GMCH_ENVDD LVDD_EN EXP_TXN5/SDVOC_GREEN#
    LIBG C33 L32 PCIE_MTX_GRX_N6 C496 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N6
    R48 2.2K_0402_5% LCTLA_CLK LIBG EXP_TXN6/SDVOC_BLUE# PCIE_MTX_GRX_N7 C512 1 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N7
    1 2 C31 LVBG EXP_TXN7/SDVOC_CLKN M36 2
    F28 N32 PCIE_MTX_GRX_N8 C518 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N8
    LVREFH EXP_TXN8 PCIE_MTX_GRX_N9 C525 1
    F27 LVREFL EXP_TXN9 P36 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N9
    R32 PCIE_MTX_GRX_N10 C543 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N10
    R69 100K_0402_5% LBKLT_EN GMCH_TXCLK- EXP_TXN10 PCIE_MTX_GRX_N11 C548 1 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N11
    1 2 15 GMCH_TXCLK- B30 LACLKN EXP_TXN11 T36 2
    GMCH_TXCLK+ B29 U32 PCIE_MTX_GRX_N12 C559 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N12
    15 GMCH_TXCLK+ LACLKP EXP_TXN12

    LVDS
    R47 1 2 1.5K_0402_1% LIBG GMCH_TZCLK- C25 V36 PCIE_MTX_GRX_N13 C570 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N13
    15 GMCH_TZCLK- LBCLKN EXP_TXN13
    GMCH_TZCLK+ C24 W32 PCIE_MTX_GRX_N14 C579 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N14
    15 GMCH_TZCLK+ LBCLKP EXP_TXN14
    R41 1 2 150_0402_5% GMCH_TV_COMPS Y36 PCIE_MTX_GRX_N15 C583 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N15
    GMCH_TXOUT0- EXP_TXN15
    15 GMCH_TXOUT0- B34 LADATAN0
    R49 1 2 150_0402_5% GMCH_TV_LUMA GMCH_TXOUT1- B33
    15 GMCH_TXOUT1- LADATAN1
    GMCH_TXOUT2- B32 D32 PCIE_MTX_GRX_P0 C425 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0
    15 GMCH_TXOUT2- LADATAN2 EXP_TXP0/SDVOB_RED
    R40 1 2 150_0402_5% GMCH_TV_CRMA E36 PCIE_MTX_GRX_P1 C428 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P1
    EXP_TXP1/SDVOB_GREEN PCIE_MTX_GRX_P2 C447
    EXP_TXP2/SDVOB_BLUE F32 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P2
    GMCH_TXOUT0+ A34 G36 PCIE_MTX_GRX_P3 C455 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P3
    15 GMCH_TXOUT0+ LADATAP0 EXP_TXP3/SDVOB_CLKP
    GMCH_TXOUT1+ A33 H32 PCIE_MTX_GRX_P4 C471 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P4
    B 15 GMCH_TXOUT1+ LADATAP1 EXP_TXP4/SDVOC_RED B
    GMCH_TXOUT2+ B31 J36 PCIE_MTX_GRX_P5 C484 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P5
    15 GMCH_TXOUT2+ LADATAP2 EXP_TXP5/SDVOC_GREEN
    K32 PCIE_MTX_GRX_P6 C490 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P6
    EXP_TXP6/SDVOC_BLUE PCIE_MTX_GRX_P7 C503 1
    EXP_TXP7/SDVOC_CLKP L36 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P7
    M32 PCIE_MTX_GRX_P8 C513 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P8
    GMCH_TZOUT0- EXP_TXP8 PCIE_MTX_GRX_P9 C519 1
    15 GMCH_TZOUT0- C29 LBDATAN0 EXP_TXP9 N36 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P9
    GMCH_TZOUT1- D28 P32 PCIE_MTX_GRX_P10 C535 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P10
    15 GMCH_TZOUT1- LBDATAN1 EXP_TXP10
    GMCH_TZOUT2- C27 R36 PCIE_MTX_GRX_P11 C544 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P11
    +2.5VS 15 GMCH_TZOUT2- LBDATAN2 EXP_TXP11
    T32 PCIE_MTX_GRX_P12 C551 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P12
    +3VS EXP_TXP12 PCIE_MTX_GRX_P13 C562 1
    EXP_TXP13 U36 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P13
    V32 PCIE_MTX_GRX_P14 C573 1 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P14
    GMCH_TZOUT0+ EXP_TXP14 PCIE_MTX_GRX_P15 C580 1
    15 GMCH_TZOUT0+ C28 LBDATAP0 EXP_TXP15 W36 2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P15
    2

    GMCH_TZOUT1+ D27
    15 GMCH_TZOUT1+ LBDATAP1
    R27 R26 GMCH_TZOUT2+ C26
    15 GMCH_TZOUT2+ LBDATAP2
    GM@ 2.2K_0402_5% GM@ 4.7K_0402_5%
    2
    G
    1

    LDDC_CLK 3 1 GMCH_LCD_CLK PM@ ALVISO_BGA1257 PCIE_GTX_C_MRX_N1 C448 1 2 @ 0.1U_0402_16V4Z


    GMCH_LCD_CLK 15 SDVO_INT# 16
    Q4 PCIE_GTX_C_MRX_P1 C434 1 @ 0.1U_0402_16V4Z
    S

    2 SDVO_INT 16
    GM@ BSS138_SOT23

    PCIE_MTX_C_GRX_N0 1 4
    +2.5VS SDVOB_R# 16
    PCIE_MTX_C_GRX_P0 2 3
    +3VS SDVOB_R 16
    RP11 @ 0_0404_4P2R_5%
    PCIE_MTX_C_GRX_N1 1 4 SDVOB_G# 16
    PCIE_MTX_C_GRX_P1 2 3 SDVOB_G 16
    2

    RP12 @ 0_0404_4P2R_5%
    R24 R25 PCIE_MTX_C_GRX_N2 1 4 SDVOB_B# 16
    GM@ 2.2K_0402_5% GM@ 4.7K_0402_5% PCIE_MTX_C_GRX_P2 2 3 SDVOB_B 16
    2
    G

    RP13 @ 0_0404_4P2R_5%
    A A
    PCIE_MTX_C_GRX_N3 1 4 SDVOB_CLK# 16
    1

    LDDC_DATA 3 1 GMCH_LCD_DATA PCIE_MTX_C_GRX_P3 2 3


    GMCH_LCD_DATA 15 SDVOB_CLK 16
    Q2 RP14 @ 0_0404_4P2R_5%
    S

    GM@ BSS138_SOT23

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 8 of 50
    5 4 3 2 1
    5 4 3 2 1

    +1.05VS
    4000mA (10uF x3, 0.1uF x3)
    U40F C161
    U40E 0.1U_0402_16V4Z C146 10U_0805_10V4Z
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    +1.05VS K13 AM37 V1.8_DDR_CAP1 2 1 0.1U_0402_16V4Z
    VTT0 VCCSM0 V1.8_DDR_CAP2
    +1.05VS T29 VCC0 VCCA_TVDACA0 F17 +3VS_DAC J13 VTT1 VCCSM1 AH37 2 1 1 1 1 1 1 1
    R29 E17 K12 AP29 V1.8_DDR_CAP5 2 1 C98 C79 C93
    VCC1 VCCA_TVDACA1 VTT2 VCCSM2 C170
    N29 VCC2 VCCA_TVDACB0 D18 W11 VTT3 VCCSM3 AD28 +1.8V
    M29 C18 120mA V11 AD27 0.1U_0402_16V4Z C77 C92 C101
    VCC3 VCCA_TVDACB1 VTT4 VCCSM4 2 2 2 2 2 2
    K29 VCC4 VCCA_TVDACC0 F18 U11 VTT5 VCCSM5 AC27
    J29 E18 T11 AP26 10U_0805_10V4Z
    VCC5 VCCA_TVDACC1 VTT6 VCCSM6 10U_0805_10V4Z 0.1U_0402_16V4Z
    D V28 R11 AN26 D
    U28
    T28
    VCC6
    VCC7
    VCC8 POWER VCCA_TVBG
    VSSA_TVBG
    H18
    G18
    P11
    N11
    VTT7
    VTT8
    VTT9
    POWER VCCSM7
    VCCSM8
    VCCSM9
    AM26
    AL26 +1.8V
    2200mA (10uF x2, 0.1uF x6)
    R28 VCC9 M11 VTT10 VCCSM10 AK26
    P28 D19 L11 AJ26 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    VCC10 VCCD_TVDAC VTT11 VCCSM11
    N28 VCC11 VCCDQ_TVDAC H17 24mA K11 VTT12 VCCSM12 AH26 1
    M28 VCC12 W10 VTT13 VCCSM13 AG26 1 1 1 1 1 1 1 1
    L28 B26 V10 AF26 + C122 C117 C126 C139
    VCC13 VCCD_LVDS0 +1.5VS VTT14 VCCSM14
    K28 VCC14 VCCD_LVDS1 B25 U10 VTT15 VCCSM15 AE26
    J28 A25 60mA T10 AP25 C632 C150 C119 C121 C141
    VCC15 VCCD_LVDS2 VTT16 VCCSM16 2 2 2 2 2 2 2 2 2
    H28 VCC16 R10 VTT17 VCCSM17 AN25
    G28 VCC17 VCCA_LVDS A35 +2.5VS P10 VTT18 VCCSM18 AM25
    V27 10mA N10 AL25 330U_D_2VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    VCC18 VTT19 VCCSM19
    U27 VCC19 VCCHV0 B22 M10 VTT20 VCCSM20 AK25
    T27 VCC20 VCCHV1 B21 2mA K10 VTT21 VCCSM21 AJ25
    R27 VCC21 VCCHV2 A21 J10 VTT22 VCCSM22 AH25 (10uF x1, 0.1uF x1)
    P27 VCC22 Y9 VTT23 VCCSM23 AG25
    +2.5VS
    N27 VCC23 VCCTX_LVDS0 B28 W9 VTT24 VCCSM24 AF25 VCCHV(Ball A21,B21,B22)
    M27 VCC24 VCCTX_LVDS1 A28 60mA U9 VTT25 VCCSM25 AE25
    L27 VCC25 VCCTX_LVDS2 A27 R9 VTT26 VCCSM26 AE24
    K27 VCC26 P9 VTT27 VCCSM27 AE23
    J27 VCC27 VCCA_SM0 AF20 +1.5VS_DDRDLL N9 VTT28 VCCSM28 AE22 1 1 1 1 1 1
    H27 AP19 M9 AE21 C48 C49 C40 C52 C41 C46
    VCC28 VCCA_SM1 VTT29 VCCSM29
    K26 VCC29 VCCA_SM2 AF19 L9 VTT30 VCCSM30 AE20
    H26 VCC30 VCCA_SM3 AF18 J9 VTT31 VCCSM31 AE19
    2 0.1U_0402_16V4Z 2 0.01U_0402_16V7K 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
    K25 VCC31 N8 VTT32 VCCSM32 AE18
    J25 VCC32 VCC3G0 AE37 +1.5VS M8 VTT33 VCCSM33 AE17
    K24 VCC33 VCC3G1 W37 N7 VTT34 VCCSM34 AE16 (4.7uF x1, 0.1uF x1)
    K23 VCC34 VCC3G2 U37 M7 VTT35 VCCSM35 AE15
    C K22 VCC35 VCC3G3 R37 1000mA N6 VTT36 VCCSM36 AE14 VCCA_LVDS (Ball A35) (0.1uF x1, 0.01uF x1) VCCTX_LVDS(Ball A27,A28,B28) C
    K21 VCC36 VCC3G4 N37 M6 VTT37 VCCSM37 AP13
    W20 VCC37 VCC3G5 L37 A6 VTT38 VCCSM38 AN13
    +2.5VS
    U20 VCC38 VCC3G6 J37
    C37 1
    N5 VTT39 VCCSM39 AM13 VCCA_CRTDAC(Ball F19,E19) (0.1uF x1, 0.022uF x1)
    T20 VCC39 M5 VTT40 VCCSM40 AL13
    K20 0.47U_0603_16V4Z N4 AK13
    VCC40 VTT41 VCCSM41
    V19 VCC41 M4 VTT42 VCCSM42 AJ13
    U19 VCC42 VCCA_3GPLL0 Y29 +1.5VS_3GPLL N3 VTT43 VCCSM43 AH13 1 1 1 1
    2 C69 C72 C65 C61
    K19 VCC43 VCCA_3GPLL1 Y28 M3 VTT44 VCCSM44 AG13
    W18 VCC44 VCCA_3GPLL2 Y27 N2 VTT45 VCCSM45 AF13
    V18 VCC45 M2 VTT46 VCCSM46 AE13
    2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.022U_0402_16V7K
    T18 VCC46 B2 VTT47 VCCSM47 AP12
    K18 VCC47 VCCA_3GBG F37 0.15mA +2.5VS_3GBG V1 VTT48 VCCSM48 AN12
    K17 VCC48 VSSA_3GBG G37 N1 VTT49 VCCSM49 AM12
    1 M1 VTT50 VCCSM50 AL12
    +1.5VS AC1 VCCD_HMPLL1 VCC_SYNC H20 +2.5VS G1 VTT51 VCCSM51 AK12 VCC_SYNC(Ball H20) (10uF x1, 0.1uF x1)
    AC2 VCCD_HMPLL2 VCCSM52 AJ12
    +1.5VS_DPLLA +1.5VS_DPLLA B23 F19 70mA C38 AH12
    +1.5VS_DPLLB VCCA_DPLLA VCCA_CRTDAC0 2
    0.47U_0603_16V4Z VCCSM53
    +1.5VS_DPLLB
    +1.5VS_HPLL
    C35 VCCA_DPLLB VCCA_CRTDAC1 E19 VCCSM54 AG12
    +1.5VS VCCD_TVDAC (Ball D19)(0.1uF x1, 0.022uF x1)
    +1.5VS_HPLL AA1 VCCA_HPLL VSSA_CRTDAC G19 1 VCCSM55 AF12
    +1.5VS_MPLL +1.5VS_MPLL AA2 AE12 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    VCCA_MPLL VCCSM56
    VCCSM57 AD11
    C106 AC11
    PM@ ALVISO_BGA1257 2
    0.22U_0603_10V7K VCCSM58
    20mils VCCSM59 AB11
    C166 C43
    1
    C51
    1
    C57
    1
    C55
    1
    C74
    1
    C83
    1
    1 VCCSM60 AB10
    AB9 0.1U_0402_16V4Z C164
    VCCSM61
    VCCSM62 AP8 V1.8_DDR_CAP6 2 1 0.1U_0402_16V4Z
    C70 AM1 V1.8_DDR_CAP4 2 1 4.7U_0805_10V4Z 2 2 2 2 2 2
    2
    0.22U_0603_10V7K VCCSM63
    VCCSM64 AE1 V1.8_DDR_CAP3 2 1
    B C143 0.1U_0402_16V4Z 0.022U_0402_16V7K 0.022U_0402_16V7K B
    0.1U_0402_16V4Z
    PM@ ALVISO_BGA1257 VCCD_LVDS(Ball A25,B25,B26) VCCDQ_TVDAC (Ball H17)
    (10uF x1, 0.1uF x1) (0.1uF x1, 0.022uF x1)
    +1.05VS

    +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_DDRDLL +1.5VS


    950mA (0.47uF x2, 0.22uF x2)
    L7 L9 R532 VCC3G
    60mA CHB1608U301_0603 60mA CHB1608U301_0603 0_0603_5%
    1 2 +1.5VS 1 2 +1.5VS 1 2 +1.5VS 1 1 1 1
    Change to 0 ohm Change to 0 ohm 1 C73 C84 C100 C39
    1 1 1 1 1 1 1 1 1 1 1
    C42 C35 C47 C45 C44 C56 C633 C629 C167 C591 + C616 C606
    2 2
    2.2U_0805_16V4Z 2 2.2U_0805_16V4Z
    2
    10U_1206_16V4Z 10U_1206_16V4Z 10U_1206_16V4Z 220U_D2_4VM_R12 10U_0805_10V4Z 2.2U_0805_16V4Z 2.2U_0805_16V4Z
    2 10U_1206_16V4Z
    2 2 0.1U_0402_16V4Z 2 10U_1206_16V4Z
    2 2 0.1U_0402_16V4Z 2
    10U_1206_16V4Z 2 2 0.1U_0402_16V4Z 2 2 2
    10U_0805_10V4Z
    (470uF x1, 0.1uF x1) (470uF x1, 0.1uF x1) (100uF x1, 0.1uF x1) (220uF x1, 10uF x2) (0.1uF x1, 0.022uF x1) (0.1uF x1, 0.022uF x1)
    VCCA_TVDAC VCCA_TVBG
    L8 +3VS_DAC (Ball H18)
    +1.5VS_HPLL L27 +1.5VS_MPLL L30 +1.5VS_3GPLL R517 L29 +2.5VS_3GBG CHB1608U301_0603
    (0.1uF x1)
    60mA CHB1608U301_0603 60mA CHB1608U301_0603 0.5_0603_1% CHB1608U301_0603 +3VS 1 2 0.022U_0402_16V7K 0.022U_0402_16V7K
    1 2 +1.5VS 1 2 +1.5VS 1 2 +3GPLL 1 2 +1.5VS 1 2 +2.5VS
    Change to 0 ohm Change to 0 ohm R71 0_0603_5% 1 1 1 1 1 1
    1 1 1 1 1 1 1 1 Change to 0 ohm 1 C31 C703 C60 C71 C50 C63
    C568 C578 C115 C590 C602 C112 C622 +

    om
    C113 C64
    10U_1206_16V4Z 10U_1206_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2
    A 2 10U_1206_16V4Z
    2 2 0.1U_0402_16V4Z 2 10U_1206_16V4Z
    2 2 0.1U_0402_16V4Z 2 2 2 2 A
    150U_D2_6.3VM 10U_1206_16V4Z

    l.c
    10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

    ai
    (470uF x1, 0.1uF x1) (470uF x1, 0.1uF x1) (10uF x1, 0.1uF x1)
    120mA

    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 9 of 50
    5 4 3 2 1
    5 4 3 2 1

    U40H
    U40I U40J
    +1.05VS L12 VTT_NCTF17 VCCSM_NCTF31 AB12 +1.8V
    M12 VTT_NCTF16 VCCSM_NCTF30 AC12 Y1 VSS271 AL24 VSS267
    N12 VTT_NCTF15 VCCSM_NCTF29 AD12 D2 VSS270 VSSALVDS B36 AN24 VSS266 VSS67 AC32
    P12 VTT_NCTF14 VCCSM_NCTF28 AB13 G2 VSS269 A26 VSS265 VSS66 AD32
    R12 VTT_NCTF13 VCCSM_NCTF27 AC13 J2 VSS268 VSS195 AA11 E26 VSS264 VSS65 AJ32
    T12 VTT_NCTF12 VCCSM_NCTF26 AD13 L2 VSS260 VSS194 AF11 G26 VSS263 VSS64 AN32
    U12 VTT_NCTF11 VCCSM_NCTF25 AC14 P2 VSS259 VSS193 AG11 J26 VSS262 VSS63 D33
    D V12 VTT_NCTF10 VCCSM_NCTF24 AD14 T2 VSS258 VSS192 AJ11 B27 VSS261 VSS62 E33 D
    W12 VTT_NCTF9 VCCSM_NCTF23 AC15 V2 VSS257 VSS191 AL11 E27 VSS129 VSS61 F33
    L13 VTT_NCTF8 VCCSM_NCTF22 AD15 AD2 VSS256 VSS190 AN11 G27 VSS128 VSS60 G33
    M13 VTT_NCTF7 VCCSM_NCTF21 AC16 AE2 VSS255 VSS189 B12 W27 VSS127 VSS59 H33
    N13
    P13
    R13
    T13
    U13
    VTT_NCTF6
    VTT_NCTF5
    VTT_NCTF4
    VTT_NCTF3
    VCCSM_NCTF20
    VCCSM_NCTF19
    VCCSM_NCTF18
    VCCSM_NCTF17
    AD16
    AC17
    AD17
    AC18
    AD18
    AH2
    AL2
    AN2
    A3
    C3
    VSS254
    VSS253
    VSS252
    VSS251
    VSS
    VSS188
    VSS187
    VSS186
    VSS185
    D12
    J12
    A14
    B14
    F14
    AA27
    AB27
    AF27
    AG27
    AJ27
    VSS126
    VSS125
    VSS124
    VSS123
    VSS VSS58
    VSS57
    VSS56
    VSS55
    J33
    K33
    L33
    M33
    N33
    VTT_NCTF2 VCCSM_NCTF16 VSS250 VSS184 VSS122 VSS54
    V13 VTT_NCTF1 VCCSM_NCTF15 AC19 AA3 VSS249 VSS183 J14 AL27 VSS121 VSS53 P33
    W13 VTT_NCTF0 VCCSM_NCTF14 AD19 AB3 VSS248 VSS182 K14 AN27 VSS120 VSS52 R33
    VCCSM_NCTF13 AC20 AC3 VSS247 VSS181 AG14 E28 VSS119 VSS51 T33
    VCCSM_NCTF12 AD20 AJ3 VSS246 VSS180 AJ14 W28 VSS118 VSS50 U33
    Y12 VSS_NCTF68 VCCSM_NCTF11 AC21 C4 VSS245 VSS179 AL14 AA28 VSS117 VSS49 V33
    AA12 VSS_NCTF67 VCCSM_NCTF10 AD21 H4 VSS244 VSS178 AN14 AB28 VSS116 VSS48 W33
    Y13 VSS_NCTF66 VCCSM_NCTF9 AC22 L4 VSS243 VSS177 C15 AC28 VSS115 VSS47 AD33
    AA13 VSS_NCTF65 VCCSM_NCTF8 AD22 P4 VSS242 VSS176 K15 A29 VSS114 VSS46 AF33
    L14 VSS_NCTF64 VCCSM_NCTF7 AC23 U4 VSS241 VSS175 A16 D29 VSS113 VSS45 AL33
    M14 VSS_NCTF63 VCCSM_NCTF6 AD23 Y4 VSS240 VSS174 D16 E29 VSS112 VSS44 C34
    N14 VSS_NCTF62 VCCSM_NCTF5 AC24 AF4 VSS239 VSS173 H16 F29 VSS111 VSS43 AA34
    P14 VSS_NCTF61 VCCSM_NCTF4 AD24 AN4 VSS238 VSS172 K16 G29 VSS110 VSS42 AB34
    R14 VSS_NCTF60 VCCSM_NCTF3 AC25 E5 VSS237 VSS171 AL16 H29 VSS109 VSS41 AC34
    T14 VSS_NCTF59 VCCSM_NCTF2 AD25 W5 VSS236 VSS170 C17 L29 VSS108 VSS40 AD34
    U14 VSS_NCTF58 VCCSM_NCTF1 AC26 AL5 VSS235 VSS169 G17 P29 VSS107 VSS39 AH34
    V14 VSS_NCTF57 VCCSM_NCTF0 AD26 AP5 VSS234 VSS168 AF17 U29 VSS106 VSS38 AN34
    W14 VSS_NCTF56 B6 VSS233 VSS167 AJ17 V29 VSS105 VSS37 B35
    Y14 VSS_NCTF55 VCC_NCTF78 L17 +1.05VS J6 VSS232 VSS166 AN17 W29 VSS104 VSS36 D35
    AA14 VSS_NCTF54 VCC_NCTF77 M17 L6 VSS231 VSS165 A18 AA29 VSS103 VSS35 E35
    AB14 VSS_NCTF53 VCC_NCTF76 N17 P6 VSS230 VSS164 B18 AD29 VSS102 VSS34 F35
    C L15 P17 T6 U18 AG29 G35 C
    VSS_NCTF52 VCC_NCTF75 VSS229 VSS163 VSS101 VSS33
    M15 T17 AA6 AL18 AJ29 H35
    NCTF

    VSS_NCTF51 VCC_NCTF74 VSS228 VSS162 VSS100 VSS32


    N15 VSS_NCTF50 VCC_NCTF73 U17 AC6 VSS227 VSS161 C19 AM29 VSS99 VSS31 J35
    P15 VSS_NCTF49 VCC_NCTF72 V17 AE6 VSS226 VSS160 H19 C30 VSS98 VSS30 K35
    R15 VSS_NCTF48 VCC_NCTF71 W17 AJ6 VSS225 VSS159 J19 Y30 VSS97 VSS29 L35
    T15 VSS_NCTF47 VCC_NCTF70 L18 G7 VSS224 VSS158 T19 AA30 VSS96 VSS28 M35
    U15 VSS_NCTF46 VCC_NCTF69 M18 V7 VSS223 VSS157 W19 AB30 VSS95 VSS27 N35
    V15 VSS_NCTF45 VCC_NCTF68 N18 AA7 VSS222 VSS156 AG19 AC30 VSS94 VSS26 P35
    W15 VSS_NCTF44 VCC_NCTF67 P18 AG7 VSS221 VSS155 AN19 AE30 VSS93 VSS25 R35
    Y15 VSS_NCTF43 VCC_NCTF66 R18 AK7 VSS220 VSS154 A20 AP30 VSS92 VSS24 T35
    AA15 VSS_NCTF42 VCC_NCTF65 Y18 AN7 VSS219 VSS153 D20 D31 VSS91 VSS23 U35
    AB15 VSS_NCTF41 VCC_NCTF64 L19 C8 VSS218 VSS152 E20 E31 VSS90 VSS22 V35
    L16 VSS_NCTF40 VCC_NCTF63 M19 E8 VSS217 VSS151 F20 F31 VSS89 VSS21 W35
    M16 VSS_NCTF39 VCC_NCTF62 N19 L8 VSS216 VSS150 G20 G31 VSS88 VSS20 Y35
    N16 VSS_NCTF38 VCC_NCTF61 P19 P8 VSS215 VSS149 V20 H31 VSS87 VSS19 AE35
    P16 VSS_NCTF37 VCC_NCTF60 R19 Y8 VSS214 VSS148 AK20 J31 VSS86 VSS18 C36
    R16 VSS_NCTF36 VCC_NCTF59 Y19 AL8 VSS213 VSS147 C21 K31 VSS85 VSS17 AA36
    T16 VSS_NCTF35 VCC_NCTF58 L20 A9 VSS212 VSS146 F21 L31 VSS84 VSS16 AB36
    U16 VSS_NCTF34 VCC_NCTF57 M20 H9 VSS211 VSS145 AF21 M31 VSS83 VSS15 AC36
    V16 VSS_NCTF33 VCC_NCTF56 N20 K9 VSS210 VSS144 AN21 N31 VSS82 VSS14 AD36
    W16 VSS_NCTF32 VCC_NCTF55 P20 T9 VSS209 VSS143 A22 P31 VSS81 VSS13 AE36
    Y16 VSS_NCTF31 VCC_NCTF54 R20 V9 VSS208 VSS142 D22 R31 VSS80 VSS12 AF36
    AA16 VSS_NCTF30 VCC_NCTF53 Y20 AA9 VSS207 VSS141 E22 T31 VSS79 VSS11 AJ36
    AB16 VSS_NCTF29 VCC_NCTF52 L21 AC9 VSS206 VSS140 J22 U31 VSS78 VSS10 AL36
    R17 VSS_NCTF28 VCC_NCTF51 M21 AE9 VSS205 VSS139 AH22 V31 VSS77 VSS9 AN36
    Y17 VSS_NCTF27 VCC_NCTF50 N21 AH9 VSS204 VSS138 AL22 W31 VSS76 VSS8 E37
    AA17 VSS_NCTF26 VCC_NCTF49 P21 AN9 VSS203 VSS137 H23 AD31 VSS75 VSS7 H37
    AB17 VSS_NCTF25 VCC_NCTF48 T21 D10 VSS202 VSS136 AF23 AG31 VSS74 VSS6 K37
    AA18 VSS_NCTF24 VCC_NCTF47 U21 L10 VSS201 VSS135 B24 AL31 VSS73 VSS5 M37
    B B
    AB18 VSS_NCTF23 VCC_NCTF46 V21 Y10 VSS200 VSS134 D24 A32 VSS72 VSS4 P37
    AA19 VSS_NCTF22 VCC_NCTF45 W21 AA10 VSS199 VSS133 F24 C32 VSS71 VSS3 T37
    AB19 VSS_NCTF21 VCC_NCTF44 L22 F11 VSS198 VSS132 J24 Y32 VSS70 VSS2 V37
    AA20 VSS_NCTF20 VCC_NCTF43 M22 H11 VSS197 VSS131 AG24 AA32 VSS69 VSS1 Y37
    AB20 VSS_NCTF19 VCC_NCTF42 N22 Y11 VSS196 VSS130 AJ24 AB32 VSS68 VSS0 AG37
    R21 VSS_NCTF18 VCC_NCTF41 P22
    Y21 VSS_NCTF17 VCC_NCTF40 R22
    AA21 VSS_NCTF16 VCC_NCTF39 T22
    AB21 U22 ALVISO_BGA1257 ALVISO_BGA1257
    VSS_NCTF15 VCC_NCTF38 PM@ PM@
    Y22 VSS_NCTF14 VCC_NCTF37 V22
    AA22 VSS_NCTF13 VCC_NCTF36 W22
    AB22 VSS_NCTF12 VCC_NCTF35 L23
    Y23 VSS_NCTF11 VCC_NCTF34 M23
    AA23 VSS_NCTF10 VCC_NCTF33 N23
    AB23 VSS_NCTF9 VCC_NCTF32 P23
    Y24 VSS_NCTF8 VCC_NCTF31 R23
    AA24 VSS_NCTF7 VCC_NCTF30 T23
    AB24 VSS_NCTF6 VCC_NCTF29 U23
    Y25 VSS_NCTF5 VCC_NCTF28 V23
    AA25 VSS_NCTF4 VCC_NCTF27 W23
    AB25 VSS_NCTF3 VCC_NCTF26 L24
    Y26 VSS_NCTF2 VCC_NCTF25 M24
    AA26 VSS_NCTF1 VCC_NCTF24 N24
    AB26 VSS_NCTF0 VCC_NCTF23 P24
    VCC_NCTF22 R24
    +1.05VS V25 VCC_NCTF10 VCC_NCTF21 T24
    W25 VCC_NCTF9 VCC_NCTF20 U24
    L26 VCC_NCTF8 VCC_NCTF19 V24
    A M26 VCC_NCTF7 VCC_NCTF18 W24 A
    N26 VCC_NCTF6 VCC_NCTF17 L25
    P26 VCC_NCTF5 VCC_NCTF16 M25
    R26 VCC_NCTF4 VCC_NCTF15 N25
    T26 VCC_NCTF3 VCC_NCTF14 P25
    U26 VCC_NCTF2 VCC_NCTF13 R25
    V26 T25
    W26
    VCC_NCTF1
    VCC_NCTF0
    VCC_NCTF12
    VCC_NCTF11 U25
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    ALVISO_BGA1257
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    PM@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 10 of 50
    5 4 3 2 1
    5 4 3 2 1

    +1.8V +1.8V
    +1.8V
    JP45
    +DIMM_VREF 1 VREF VSS 2
    3 4 DDRA_SDQ4
    VSS DQ4

    1
    DDRA_SDQ0 5 6 DDRA_SDQ5
    DDRA_SDQ1 DQ0 DQ5 R534
    7 DQ1 VSS 8
    9 10 DDRA_SDM0 1K_0402_1% +1.8V +1.8V +1.8V
    DDRA_SDQS0# VSS DM0
    7 DDRA_SDQS0# 11 DQS0# VSS 12
    DDRA_SDQS0 13 14 DDRA_SDQ6 20mils

    2
    7 DDRA_SDQS0 DQS0 DQ6 DDRA_SDQ7
    15 VSS DQ7 16 +DIMM_VREF 1 1 1
    DDRA_SDQ2 17 18 C698 C699 C700
    DQ2 VSS

    1
    DDRA_SDQ3 19 20 DDRA_SDQ12 1 1
    DQ3 DQ12 DDRA_SDQ13 C278 C272 R533 @ 1000P_0402_50V7K @ 1000P_0402_50V7K
    D 21 VSS DQ13 22 D
    DDRA_SDQ8 1K_0402_1% 2 2
    @ 1000P_0402_50V7K 2
    23 DQ8 VSS 24
    DDRA_SDQ9 25 26 DDRA_SDM1 0.1U_0402_16V4Z
    DQ9 DM1 2 2
    2.2U_0805_16V4Z
    27 28

    2
    DDRA_SDQS1# VSS VSS +1.05VS +1.5VS +3VS
    7 DDRA_SDQS1# 29 DQS1# CK0 30 DDRA_CLK0 6
    DDRA_SDQS1 31 32
    7 DDRA_SDQS1 DQS1 CK0# DDRA_CLK0# 6
    33 VSS VSS 34
    DDRA_SDQ10 35 36 DDRA_SDQ14
    DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15
    37 DQ11 DQ15 38 For EMI
    39 VSS VSS 40
    DDRA_SMA[0..13]
    7 DDRA_SMA[0..13]
    41 VSS VSS 42
    DDRA_SDQ16 43 44 DDRA_SDQ20 DDRA_SDQ[0..63]
    DDRA_SDQ17 DQ16 DQ20 DDRA_SDQ21 7 DDRA_SDQ[0..63]
    45 DQ17 DQ21 46
    47 48 DDRA_SDM[0..7]
    VSS VSS 7 DDRA_SDM[0..7]
    DDRA_SDQS2# 49 50
    7 DDRA_SDQS2# DDRA_SDQS2 DQS2# NC DDRA_SDM2 +1.8V
    7 DDRA_SDQS2 51 DQS2 DM2 52
    53 VSS VSS 54
    DDRA_SDQ18 55 56 DDRA_SDQ22
    DDRA_SDQ19 DQ18 DQ22 DDRA_SDQ23
    57 DQ19 DQ23 58
    59 VSS VSS 60 1 1 1 1 1
    DDRA_SDQ24 61 62 DDRA_SDQ28 C277 C299 C297 C269 C273
    DDRA_SDQ25 DQ24 DQ28 DDRA_SDQ29
    63 DQ25 DQ29 64
    65 66 2.2U_0805_16V4Z 2.2U_0805_16V4Z 2.2U_0805_16V4Z
    DDRA_SDM3 VSS VSS DDRA_SDQS3# 2 2
    2.2U_0805_16V4Z 2 2
    2.2U_0805_16V4Z 2
    67 DM3 DQS3# 68 DDRA_SDQS3# 7
    69 70 DDRA_SDQS3
    NC DQS3 DDRA_SDQS3 7
    71 VSS VSS 72
    DDRA_SDQ26 73 74 DDRA_SDQ30
    C DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31 C
    75 DQ27 DQ31 76
    77 78 +1.8V
    DDRA_CKE0 VSS VSS DDRA_CKE1 +0.9VS
    6 DDRA_CKE0 79 CKE0 NC/CKE1 80 DDRA_CKE1 6
    81 VDD VDD 82
    83 84 DDRA_SBS2# 1 4
    DDRA_SBS2# NC NC/A15 DDRA_CKE0
    7 DDRA_SBS2# 85 BA2 NC/A14 86 2 3 1 1 1 1
    87 88 RP26 56_0404_4P2R_5% C270 C298 C274 C303
    DDRA_SMA12 VDD VDD DDRA_SMA11
    89 A12 A11 90
    DDRA_SMA9 91 92 DDRA_SMA7 DDRA_SMA9 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    DDRA_SMA8 A9 A7 DDRA_SMA6 DDRA_SMA12 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z
    93 A8 A6 94 2 3
    95 96 RP27 56_0404_4P2R_5%
    DDRA_SMA5 VDD VDD DDRA_SMA4
    97 A5 A4 98
    DDRA_SMA3 99 100 DDRA_SMA2 DDRA_SMA5 1 4
    DDRA_SMA1 A3 A2 DDRA_SMA0 DDRA_SMA8
    101 A1 A0 102 2 3
    103 104 RP28 56_0404_4P2R_5%
    DDRA_SMA10 VDD VDD DDRA_SBS1#
    105 A10/AP BA1 106 DDRA_SBS1# 7
    DDRA_SBS0# 107 108 DDRA_SRAS# DDRA_SMA1 1 4
    7 DDRA_SBS0# BA0 RAS# DDRA_SRAS# 7 +0.9VS
    DDRA_SWE# 109 110 DDRA_SCS#0 DDRA_SMA3 2 3
    7 DDRA_SWE# WE# S0# DDRA_SCS#0 6
    111 112 RP29 56_0404_4P2R_5%
    DDRA_SCAS# VDD VDD DDRA_ODT0
    7 DDRA_SCAS# 113 CAS# ODT0 114 DDRA_ODT0 6
    DDRA_SCS#1 115 116 DDRA_SMA13 DDRA_SBS0# 1 4
    6 DDRA_SCS#1 NC/S1# NC/A13
    117 118 DDRA_SMA10 2 3 1 1 1 1 1
    DDRA_ODT1 VDD VDD RP30 56_0404_4P2R_5% C286 C288 C289 C287 C290
    6 DDRA_ODT1 119 NC/ODT1 NC 120
    121 VSS VSS 122
    DDRA_SDQ32 123 124 DDRA_SDQ36 DDRA_SCS#0 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    DDRA_SDQ33 DQ32 DQ36 DDRA_SDQ37 DDRA_SWE# 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z
    125 DQ33 DQ37 126 2 3
    127 128 RP31 56_0404_4P2R_5%
    DDRA_SDQS4# VSS VSS DDRA_SDM4
    7 DDRA_SDQS4# 129 DQS4# DM4 130
    DDRA_SDQS4 131 132 DDRA_ODT1 1 4
    B 7 DDRA_SDQS4 DQS4 VSS DDRA_SDQ38 DDRA_SRAS# B
    133 VSS DQ38 134 2 3
    DDRA_SDQ34 135 136 DDRA_SDQ39 RP32 56_0404_4P2R_5% +0.9VS
    DDRA_SDQ35 DQ34 DQ39
    137 DQ35 VSS 138
    139 140 DDRA_SDQ44
    DDRA_SDQ40 VSS DQ44 DDRA_SDQ45
    141 DQ40 DQ45 142
    DDRA_SDQ41 143 144 DDRA_CKE1 1 4 1 1 1 1 1
    DQ41 VSS DDRA_SDQS5# DDRA_SMA11 C292 C293 C291 C668 C671
    145 VSS DQS5# 146 DDRA_SDQS5# 7 2 3
    DDRA_SDM5 147 148 DDRA_SDQS5 RP54 56_0404_4P2R_5%
    DM5 DQS5 DDRA_SDQS5 7 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    149 VSS VSS 150
    DDRA_SDQ42 DDRA_SDQ46 DDRA_SMA7 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2
    151 DQ42 DQ46 152 1 4
    DDRA_SDQ43 153 154 DDRA_SDQ47 DDRA_SMA6 2 3
    DQ43 DQ47 RP50 56_0404_4P2R_5%
    155 VSS VSS 156
    DDRA_SDQ48 157 158 DDRA_SDQ52
    DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53 DDRA_SMA4
    159 DQ49 DQ53 160 1 4
    161 162 DDRA_SMA2 2 3 +0.9VS
    VSS VSS RP52 56_0404_4P2R_5%
    163 NC,TEST CK1 164 DDRA_CLK1 6
    165 VSS CK1# 166 DDRA_CLK1# 6
    DDRA_SDQS6# 167 168 DDRA_SMA0 1 4
    7 DDRA_SDQS6# DDRA_SDQS6 DQS6# VSS DDRA_SDM6 DDRA_SBS1#
    7 DDRA_SDQS6 169 DQS6 DM6 170 2 3 1 1 1
    171 172 RP53 56_0404_4P2R_5% C669 C670 C667
    DDRA_SDQ50 VSS VSS DDRA_SDQ54
    173 DQ50 DQ54 174
    DDRA_SDQ51 175 176 DDRA_SDQ55 DDRA_SCS#1 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    DQ51 DQ55 DDRA_SCAS# 2 2
    0.1U_0402_16V4Z 2
    177 VSS VSS 178 2 3
    DDRA_SDQ56 179 180 DDRA_SDQ60 RP33 56_0404_4P2R_5%
    DDRA_SDQ57 DQ56 DQ60 DDRA_SDQ61
    181 DQ57 DQ61 182
    183 184 DDRA_ODT0 1 4
    DDRA_SDM7 VSS VSS DDRA_SDQS7# DDRA_SMA13
    185 DM7 DQS7# 186 DDRA_SDQS7# 7 2 3

    om
    187 188 DDRA_SDQS7 RP51 56_0404_4P2R_5%
    DDRA_SDQ58 VSS DQS7 DDRA_SDQS7 7
    A 189 DQ58 VSS 190 A
    DDRA_SDQ59 191 192 DDRA_SDQ62

    l.c
    DQ59 DQ62 DDRA_SDQ63
    193 VSS DQ63 194

    ai
    D_CK_SDATA 195 196
    12,13 D_CK_SDATA SDA VSS
    D_CK_SCLK 197 198 1 2

    tm
    12,13 D_CK_SCLK SCL SAO
    +3VS 199 200 R2461 10K_0402_5%
    2
    VDDSPD SA1 R247 10K_0402_5%

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    P-TWO_A5652C-A0G16 2005/03/01 2006/03/01 Title
    Issued Date Deciphered Date
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    DIMM0 STD H:5.2mm (BOT)

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 11 of 50
    5 4 3 2 1
    A B C D E

    +1.8V +1.8V

    JP41
    1 2 +DIMM_VREF +1.8V
    +DIMM_VREF VREF VSS
    3 4 DDRB_SDQ4
    DDRB_SDQ0 VSS DQ4 DDRB_SDQ5
    5 DQ0 DQ5 6
    DDRB_SDQ1 7 8 1 1
    DQ1 VSS DDRB_SDM0
    9 VSS DM0 10 1 1 1 1 1 1 1
    DDRB_SDQS0# 11 12 C650 C651 C307+ C637 + C233 C217 C202 C250 C256
    7 DDRB_SDQS0# DDRB_SDQS0 DQS0# VSS DDRB_SDQ6
    7 DDRB_SDQS0 13 DQS0 DQ6 14
    15 16 DDRB_SDQ7 2.2U_0805_16V4Z @ 150U_D2_6.3VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
    DDRB_SDQ2 VSS DQ7 2 2
    0.1U_0402_16V4Z 2 @ 150U_D2_6.3VM
    2 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2
    17 DQ2 VSS 18
    DDRB_SDQ3 19 20 DDRB_SDQ12
    DQ3 DQ12 DDRB_SDQ13
    1 21 VSS DQ13 22 1
    DDRB_SDQ8 23 24
    DDRB_SDQ9 DQ8 VSS DDRB_SDM1
    25 DQ9 DM1 26
    27 VSS VSS 28
    DDRB_SDQS1# 29 30 +1.8V
    7 DDRB_SDQS1# DQS1# CK0 DDRB_CLK0 6
    DDRB_SDQS1 31 32
    7 DDRB_SDQS1 DQS1 CK0# DDRB_CLK0# 6
    33 VSS VSS 34
    DDRB_SDQ10 35 36 DDRB_SDQ14
    DDRB_SDQ11 DQ10 DQ14 DDRB_SDQ15
    37 DQ11 DQ15 38 1 1 1 1 1 1 1
    39 40 C261 C267 C275 C268 C301 C300 C302
    VSS VSS
    @ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
    2
    @ 0.1U_0402_16V4Z 2 2
    @ 0.1U_0402_16V4Z 2 2
    @ 0.1U_0402_16V4Z 2 2
    @ 0.1U_0402_16V4Z
    41 VSS VSS 42
    DDRB_SDQ16 43 44 DDRB_SDQ20 DDRB_SMA[0..13]
    DQ16 DQ20 7 DDRB_SMA[0..13]
    DDRB_SDQ17 45 46 DDRB_SDQ21
    DQ17 DQ21 DDRB_SDQ[0..63]
    47 VSS VSS 48 7 DDRB_SDQ[0..63]
    DDRB_SDQS2# 49 50
    7 DDRB_SDQS2# DDRB_SDQS2 DQS2# NC DDRB_SDM2 DDRB_SDM[0..7]
    7 DDRB_SDQS2 51 DQS2 DM2 52 7 DDRB_SDM[0..7]
    53 VSS VSS 54
    DDRB_SDQ18 55 56 DDRB_SDQ22 +1.8V
    DDRB_SDQ19 DQ18 DQ22 DDRB_SDQ23
    57 DQ19 DQ23 58
    59 VSS VSS 60
    DDRB_SDQ24 61 62 DDRB_SDQ28
    DDRB_SDQ25 DQ24 DQ28 DDRB_SDQ29
    63 DQ25 DQ29 64 1 1 1 1 1
    65 66 C252 C253 C235 C236 C251
    DDRB_SDM3 VSS VSS DDRB_SDQS3#
    67 DM3 DQS3# 68 DDRB_SDQS3# 7
    69 70 DDRB_SDQS3 2.2U_0805_16V4Z 2.2U_0805_16V4Z 2.2U_0805_16V4Z
    NC DQS3 DDRB_SDQS3 7 2 2
    2.2U_0805_16V4Z 2 2
    2.2U_0805_16V4Z 2
    71 VSS VSS 72
    DDRB_SDQ26 73 74 DDRB_SDQ30
    2 DDRB_SDQ27 DQ26 DQ30 DDRB_SDQ31 2
    75 DQ27 DQ31 76
    77 VSS VSS 78
    DDRB_CKE0 79 80 DDRB_CKE1
    6 DDRB_CKE0 CKE0 NC/CKE1 DDRB_CKE1 6 +0.9VS +1.8V
    81 VDD VDD 82
    83 NC NC/A15 84
    DDRB_SBS2# 85 86
    7 DDRB_SBS2# BA2 NC/A14
    87 88 DDRB_SBS2# 1 4
    DDRB_SMA12 VDD VDD DDRB_SMA11 DDRB_CKE0
    89 A12 A11 90 2 3 1 1 1 1
    DDRB_SMA9 91 92 DDRB_SMA7 RP48 56_0404_4P2R_5% C232 C231 C258 C260
    DDRB_SMA8 A9 A7 DDRB_SMA6
    93 A8 A6 94
    95 96 DDRB_SMA9 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    DDRB_SMA5 VDD VDD DDRB_SMA4 DDRB_SMA12 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2
    97 A5 A4 98 2 3
    DDRB_SMA3 99 100 DDRB_SMA2 RP47 56_0404_4P2R_5%
    DDRB_SMA1 A3 A2 DDRB_SMA0
    101 A1 A0 102
    103 104 DDRB_SMA5 1 4
    DDRB_SMA10 VDD VDD DDRB_SBS1# DDRB_SMA8
    105 A10/AP BA1 106 DDRB_SBS1# 7 2 3
    DDRB_SBS0# 107 108 DDRB_SRAS# RP46 56_0404_4P2R_5%
    7 DDRB_SBS0# BA0 RAS# DDRB_SRAS# 7
    DDRB_SWE# 109 110 DDRB_SCS#0
    7 DDRB_SWE# WE# S0# DDRB_SCS#0 6
    111 112 DDRB_SMA1 1 4
    DDRB_SCAS# VDD VDD DDRB_ODT0 DDRB_SMA3 +0.9VS
    7 DDRB_SCAS# 113 CAS# ODT0 114 DDRB_ODT0 6 2 3
    DDRB_SCS#1 115 116 DDRB_SMA13 RP45 56_0404_4P2R_5%
    6 DDRB_SCS#1 NC/S1# NC/A13
    117 VDD VDD 118
    DDRB_ODT1 119 120 DDRB_SBS0# 1 4
    6 DDRB_ODT1 NC/ODT1 NC
    121 122 DDRB_SMA10 2 3 1 1 1 1 1
    DDRB_SDQ32 VSS VSS DDRB_SDQ36 RP49 56_0404_4P2R_5% C641 C240 C242 C243 C244
    123 DQ32 DQ36 124
    DDRB_SDQ33 125 126 DDRB_SDQ37
    DQ33 DQ37 DDRB_SCAS# 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    127 VSS VSS 128 1 4
    DDRB_SDQS4# DDRB_SDM4 DDRB_SWE# 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z
    7 DDRB_SDQS4# 129 DQS4# DM4 130 2 3
    DDRB_SDQS4 131 132 RP44 56_0404_4P2R_5%
    3 7 DDRB_SDQS4 DQS4 VSS DDRB_SDQ38 3
    133 VSS DQ38 134
    DDRB_SDQ34 135 136 DDRB_SDQ39 DDRB_ODT1 1 4
    DDRB_SDQ35 DQ34 DQ39 DDRB_SCS#1
    137 DQ35 VSS 138 2 3
    139 140 DDRB_SDQ44 RP43 56_0404_4P2R_5% +0.9VS
    DDRB_SDQ40 VSS DQ44 DDRB_SDQ45
    141 DQ40 DQ45 142
    DDRB_SDQ41 143 144
    DQ41 VSS DDRB_SDQS5# DDRB_CKE1
    145 VSS DQS5# 146 DDRB_SDQS5# 7 1 4
    DDRB_SDM5 147 148 DDRB_SDQS5 DDRB_SMA11 2 3 1 1 1 1 1
    DM5 DQS5 DDRB_SDQS5 7 RP18 56_0404_4P2R_5% C239 C241 C640 C644 C642
    149 VSS VSS 150
    DDRB_SDQ42 151 152 DDRB_SDQ46
    DDRB_SDQ43 DQ42 DQ46 DDRB_SDQ47 DDRB_SMA7 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    153 DQ43 DQ47 154 1 4
    DDRB_SMA6 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2
    155 VSS VSS 156 2 3
    DDRB_SDQ48 157 158 DDRB_SDQ52 RP19 56_0404_4P2R_5%
    DDRB_SDQ49 DQ48 DQ52 DDRB_SDQ53
    159 DQ49 DQ53 160
    161 162 DDRB_SMA4 1 4
    VSS VSS DDRB_SMA2 +0.9VS
    163 NC,TEST CK1 164 DDRB_CLK1 6 2 3
    165 166 RP20 56_0404_4P2R_5%
    VSS CK1# DDRB_CLK1# 6
    DDRB_SDQS6# 167 168
    7 DDRB_SDQS6# DDRB_SDQS6 DQS6# VSS DDRB_SDM6 DDRB_SMA0
    7 DDRB_SDQS6 169 DQS6 DM6 170 1 4
    171 172 DDRB_SBS1# 2 3 1 1 1
    DDRB_SDQ50 VSS VSS DDRB_SDQ54 RP23 56_0404_4P2R_5% C638 C639 C643
    173 DQ50 DQ54 174
    DDRB_SDQ51 175 176 DDRB_SDQ55
    DQ51 DQ55 DDRB_SRAS# 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    177 VSS VSS 178 1 4
    DDRB_SDQ56 DDRB_SDQ60 DDRB_SCS#0 2 2
    0.1U_0402_16V4Z 2
    179 DQ56 DQ60 180 2 3
    DDRB_SDQ57 181 182 DDRB_SDQ61 RP21 56_0404_4P2R_5%
    DQ57 DQ61
    183 VSS VSS 184
    DDRB_SDM7 185 186 DDRB_SDQS7# DDRB_ODT0 1 4
    DM7 DQS7# DDRB_SDQS7 DDRB_SDQS7# 7 DDRB_SMA13
    187 VSS DQS7 188 DDRB_SDQS7 7 2 3
    DDRB_SDQ58 189 190 RP22 56_0404_4P2R_5%
    4 DQ58 VSS 4
    DDRB_SDQ59 191 192 DDRB_SDQ62
    DQ59 DQ62 DDRB_SDQ63
    193 VSS DQ63 194
    D_CK_SDATA 195 196
    11,13 D_CK_SDATA SDA VSS
    D_CK_SCLK 197 198 1 2
    11,13 D_CK_SCLK SCL SAO
    +3VS 199 200 R2291 2 10K_0402_5% +3VS
    VDDSPD SA1 R230 10K_0402_5%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    P-TWO_A5692C-A0G16 2005/03/01 2006/03/01 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    Size Document Number Rev
    DIMM1 STD H:9.2mm (BOT) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    B
    401353 A

    Date: 星期五, 六月 03, 2005 Sheet 12 of 50


    A B C D E
    A B C D E F G H

    L24
    KC FBM-L11-201209-221LMAT_0805 40mil
    +CLK_VDD1
    Clock Generator
    +CLK_VDD48 +CLK_VDDREF +3VS 1 2
    FSC FSB FSA CPU SRC PCI 1
    C550
    1
    C553
    1
    Change to 0 ohm
    1 1 1 1 1

    CLKSEL0 CLKSEL1 CLKSEL2 C507 C516 C505 C555 C554 C506


    MHz MHz MHz 0.047U_0402_16V4Z 2.2U_0805_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z
    2 2.2U_0805_16V4Z 2 0.047U_0402_16V4Z 2 2 2 2 2 2
    1 0 1 100 100 33.3

    0 0 1 133 100 33.3


    1
    * 1

    0 1 1 166 100 33.3 +CLK_VCCA 1 2 +CLK_VDD1


    +CLK_VDD1 R455
    U5
    40mil 2.2_0402_5% L23 +CLK_VDD2
    0 1 0 200 100 33.3 1 1
    KC FBM-L11-201209-221LMAT_0805
    +CLK_VDD2 40mil
    21 VDDPCIEX_0 +3VS 1 2
    28 37 C517 C509 Change to 0 ohm
    VDDPCIEX_1 VDDA 2 2.2U_0805_16V4Z 2 0.047U_0402_16V4Z
    +3VS Table : ICS 954226AG 34 VDDPCIEX_2 1 1 1
    GNDA 38
    1 VDDPCI_0
    7 C522 C552 C547
    CLKSEL2 VDDPCI_1 PM_STP_PCI# 2 2.2U_0805_16V4Z 2 0.047U_0402_16V4Z 2 0.047U_0402_16V4Z
    1 2 PCI/SRC_STOP# 55 PM_STP_PCI# 19
    R154 10K_0402_5% +CLK_VDD1
    54 PM_STP_CPU#
    CPU_STOP# PM_STP_CPU# 19,48
    1 2 CLK_PCI2
    R102 10K_0402_5% 42
    C68 Y1 VDDCPU
    1 2 +CLK_VDDREF 48 VDDREF
    1 2 CLK_PCI1 33P_0402_50V8J 14.318MHZ_16PF_DSX840GA R450 1_0402_5% 15mil
    R152 10K_0402_5% 1 2 41 CLK_CPU1 R74 1 2 33_0402_5% CLK_MCH_BCLK
    CPUCLKT1 CLK_MCH_BCLK 6
    1 1 2 +CLK_VDD48 11 VDD48
    1 2 CLK_PCI0 R459 2.2_0402_5% 15mil 40 CLK_CPU1# R75 1 2 33_0402_5% CLK_MCH_BCLK#
    CPUCLKC1 CLK_MCH_BCLK# 6
    R149 10K_0402_5% CLK_MCH_BCLK 1 2
    C67 XTALIN 50 R59 49.9_0402_1%
    33P_0402_50V8J X1 CLK_MCH_BCLK# 1 2
    2

    1 2 XTALOUT 49 44 CLK_CPU0 R80 1 2 33_0402_5% CLK_CPU_BCLK R60 49.9_0402_1%


    X2 CPUCLKT0 CLK_CPU_BCLK 4
    CLK_CPU_BCLK 1 2
    CLK_ICH_48M R141 1 2 12_0402_5% 43 CLK_CPU0# R81 1 2 33_0402_5% CLK_CPU_BCLK# R64 49.9_0402_1%
    19 CLK_ICH_48M CPUCLKC0 CLK_CPU_BCLK# 4
    2 CLK_SD_48M R155 1 2 12_0402_5% CLKSEL2 12 CLK_CPU_BCLK# 1 2 2
    22 CLK_SD_48M FS_A/USB_48MHz
    CLK_14M_CODECR89 2 1 @ 33_0402_5%CLKSEL0 53 R65 49.9_0402_1%
    36 CLK_14M_CODEC REF1/FSLC/TEST_SEL CLK_PCIE_VGA 1 2
    R57 49.9_0402_1%
    CLKSEL1 16 36 CLK_SRC6 R76 1 2 33_0402_5% CLK_PCIE_VGA CLK_PCIE_VGA# 1 2
    FSLB/TEST_MODE CPUCLKT2_ITP/PCIEXT6 CLK_PCIE_VGA 15
    R58 49.9_0402_1%
    35 CLK_SRC6# R77 1 2 33_0402_5% CLK_PCIE_VGA# CLK_PCIE_CARD1 1 2
    CPUCLKC2_ITP/PCIEXC6 CLK_PCIE_VGA# 15
    CLK_PCI_LPC 1 2 R61 49.9_0402_1%
    32 CLK_PCI_LPC
    CLK_PCI_MINI2R139
    1 12_0402_5%
    2 CLK_PCI5 5 CLK_PCIE_CARD1#1 2
    29 CLK_PCI_MINI2 PCICLK5
    CLK_PCI_SIO R153
    1 12_0402_5%
    2 R62 49.9_0402_1%
    30 CLK_PCI_SIO
    CLK_PCI_MINI1R124
    1 12_0402_5%
    2 CLK_PCI4 4 33 CLK_PCIE_SATA 1 2
    28 CLK_PCI_MINI1 PCICLK4 PEREQ1#/PCIEXT5
    R136 12_0402_5% R118 49.9_0402_1%
    CLK_PCI_LAN 1 2 CLK_PCI3 3 32 R443 2 1 0_0402_5% CLK_PCIE_SATA# 1 2
    26 CLK_PCI_LAN PCICLK3 PEREQ2#/PCIEXC5 PCIEC_CLKREQ1# 24
    R119 33_0402_5% R112 49.9_0402_1%
    CLK_PCI_PCM 1 2 CLK_PCI2 56 CLK_MCH_3GPLL 1 2
    22 CLK_PCI_PCM PCICLK2/REQ_SEL
    R105 33_0402_5% 31 CLK_SRC5 R78 1 2 33_0402_5% CLK_PCIE_CARD1 R138 49.9_0402_1%
    PCIEXT4 CLK_PCIE_CARD1 24
    CLK_PCI_1394 1 2 CLK_PCI1 9 CLK_MCH_3GPLL# 1 2
    25 CLK_PCI_1394 SELPCIEX_LCDCLK#/PCICLK_F1
    R122 33_0402_5% 30 CLK_SRC5# R79 1 2 33_0402_5% CLK_PCIE_CARD1# R125 49.9_0402_1%
    PCIEXC4 CLK_PCIE_CARD1# 24

    CLK_PCI_ICH 1 2 CLK_PCI0 8 26 CLK_SRC4 R117 1 2 33_0402_5% CLK_PCIE_SATA


    17 CLK_PCI_ICH ITP_EN/PCICLK_F0 SATACLKT CLK_PCIE_SATA 18
    R127 33_0402_5%
    D_CK_SCLK 46 27 CLK_SRC4# R113 1 2 33_0402_5% CLK_PCIE_SATA# CLK_PCIE_ICH 1 2
    11,12 D_CK_SCLK SCLK SATACLKC CLK_PCIE_SATA# 18
    R150 49.9_0402_1%
    CLK_PCIE_ICH# 1 2
    D_CK_SDATA 47 24 CLK_SRC3 R137 1 2 33_0402_5% CLK_MCH_3GPLL R144 49.9_0402_1%
    11,12 D_CK_SDATA SDATA PCIEXT3 CLK_MCH_3GPLL 8
    CLK_DREF_SSC 1 2
    25 CLK_SRC3# R126 1 2 33_0402_5% CLK_MCH_3GPLL# R142 49.9_0402_1%
    PCIEXC3 CLK_MCH_3GPLL# 8
    1 2 CLKIREF 39 IREF
    CLK_DREF_SSC# 1 2
    3 +3VS R451 475_0402_1% 15mil R143 49.9_0402_1% 3
    R109 22 CLK_DREF_96M 1 2
    4.7K_0402_5% PCIEXT2 R147 49.9_0402_1%
    2

    CLK_DREF_96M# 1
    G

    1 2 +3VS PCIEXC2 23 2
    R148 49.9_0402_1%
    1 3 D_CK_SCLK
    19,24 CK_SCLK
    19 CLK_SRC1 R134 1 2 33_0402_5% CLK_PCIE_ICH
    D

    +3VS PCIEXT1 CLK_PCIE_ICH 19


    Q7
    2N7002_SOT23 R98 20 CLK_SRC1# R135 1 2 33_0402_5% CLK_PCIE_ICH#
    PCIEXC1 CLK_PCIE_ICH# 19
    4.7K_0402_5% 13 GND_0
    2
    G

    1 2 +3VS
    29 17 CLK_SRC0 R128 1 2 33_0402_5% CLK_DREF_SSC
    GND_1 LCDCLK_SS/PCIEX0T CLK_DREF_SSC 6
    1 3 D_CK_SDATA
    19,24 CK_SDATA
    2 18 CLK_SRC0# R129 1 2 33_0402_5% CLK_DREF_SSC#
    D

    GND_2 LCDCLK_SS/PCIEX0C CLK_DREF_SSC# 6


    Q6
    +1.05VS 2N7002_SOT23 45 GND_3 CLK_DOT R132 1
    DOTT_96MHz 14 2 33_0402_5% CLK_DREF_96M
    CLK_DREF_96M 6
    51 15 CLK_DOT# R133 1 2 33_0402_5% CLK_DREF_96M#
    GND_4 DOTC_96MHz CLK_DREF_96M# 6
    2

    R91
    @ 1K_0402_5% 6 GND_5
    R72 R92 +3VS 1 2 VGATE 6,19,48
    4.7K_0402_5% 0_0402_5% R140 10K_0402_5%
    1

    2
    CLKSEL0 1

    G
    2 1 2 MCH_CLKSEL0 6
    1 2 2 1 +1.05VS 10 VTT_POWERGD# 1 3
    CPU_BSEL0 5 VTT_PWRGD#/PD
    R100 R99

    om
    @ 0_0402_5% 0_0402_5% 52 CLK_REF 1 2 CLK_14M_SIO Q11
    REF0 CLK_14M_SIO 30
    2

    R157 R88 12_0402_5% 2N7002_SOT23


    4 4
    @ 1K_0402_5%

    l.c
    ICS954226AGT_TSSOP56 1 2 CLK_ICH_14M
    CLK_ICH_14M 19

    ai
    R161 R162 R87 12_0402_5%
    4.7K_0402_5% 0_0402_5%

    tm
    1

    CLKSEL1 1 2 1 2 MCH_CLKSEL1 6

    ho
    1 2 2 1 CPU_BSEL1 5
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    R158 R166 2005/03/01 2006/03/01 Title
    @ 0_0402_5% 0_0402_5%
    Issued Date Deciphered Date
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 13 of 50
    A B C D E F G H
    A B C D E

    CRT Connector D2 D3 +5VS +R_CRT_VCC +CRT_VCC


    @ DAN217_SC59 @ DAN217_SC59 W=40mils
    D20 W=40mils

    1
    2 1 F1

    RB411D_SOT23 POLYSWITCH_1A
    1
    D4
    @ DAN217_SC59 C368

    3
    1 0.1U_0402_16V4Z 1
    +CRT_PULLUP 2

    JP17
    R335 1 2 PM@ 0_0402_5% CRT_R 1 2 CRT_R_L 6
    15 VGA_CRT_R
    1 2 L19 11
    8 GMCH_CRT_R
    R334 GM@ 0_0402_5% FCM2012C-800_0805 1
    R339 1 2 PM@ 0_0402_5% CRT_G 1 2 CRT_G_L 7
    15 VGA_CRT_G
    1 2 L21 12
    8 GMCH_CRT_G
    R338 GM@ 0_0402_5% FCM2012C-800_0805 2
    R337 1 2 PM@ 0_0402_5% CRT_B 1 2 CRT_B_L 8
    15 VGA_CRT_B
    1 2 L20 13
    8 GMCH_CRT_B
    R336 GM@ 0_0402_5% FCM2012C-800_0805 3

    1
    1 1 1 1 1 1 DDC_MD2 9
    R331 R333 R332 C372 C370 C371 14
    C2 C8 C3 4
    PM@ 3.3P_0402_50V8C PM@ 3.3P_0402_50V8C PM@ 3.3P_0402_50V8C 1 10
    150_0402_5% 150_0402_5% 150_0402_5% 2 2 2 2
    PM@ 3.3P_0402_50V8C 2 PM@2 3.3P_0402_50V8C C6 15

    2
    PM@ 3.3P_0402_50V8C 5
    10P for GM 2 SUYIN_070549FR015S208CR
    +CRT_VCC CRT_HSYNC_L 100P_0402_50V8J
    1 2
    L18 FCM1608C-121T_0603
    1 2 2 1 DSUB_12
    C377 0.1U_0402_16V4Z R19 10K_0402_5% 1 2 CRT_VSYNC_L
    L1 FCM1608C-121T_0603 1

    5
    1
    2 2
    1 1

    P
    OE#
    1 2 CRT_HSYNC 2 4 CRT_HSYNC_B C5
    15 VGA_CRT_HSYNC A Y 2
    R342 PM@ 0_0402_5% C369 C4

    G
    1 2 U32 10P_0402_50V8J 10P_0402_50V8J 68P_0402_50V8J DSUB_15
    8 GMCH_CRT_HSYNC 2 2
    R343 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5

    3
    +CRT_VCC 1
    C7
    1 2 68P_0402_50V8J
    C11 0.1U_0402_16V4Z 2

    5
    1
    P
    OE#
    1 2 CRT_VSYNC 2 4 CRT_VSYNC_B
    15 VGA_CRT_VSYNC A Y
    R13 PM@ 0_0402_5%

    G
    1 2 U1
    8 GMCH_CRT_VSYNC +CRT_VCC
    R8 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5

    3
    +CRT_PULLUP R340 1 2 PM@ 0_0603_5% +3VS

    R341 1 2 GM@ 0_0603_5% +2.5VS

    1
    TV-OUT Conn. R1
    4.7K_0402_5% R2
    R15
    2
    GM@ 0_0402_5%
    1
    GMCH_CRT_DATA 8

    2
    D17 D19 D18

    G
    @ DAN217_SC59 @ DAN217_SC59 @ DAN217_SC59 4.7K_0402_5%
    3 DSUB_12 3
    1 3 1 2 R16
    1

    1
    PM@ 0_0402_5% VGA_DDC_DATA 15

    S
    Q19

    2
    BSS138_SOT23

    G
    DSUB_15 1 3 1 2 R9
    PM@ 0_0402_5% VGA_DDC_CLK 15

    S
    2

    3
    Q1
    +CRT_PULLUP BSS138_SOT23
    2 1 GMCH_CRT_CLK 8
    1 2 R3
    15 VGA_TV_LUMA
    R14 PM@ 0_0402_5% JP19 GM@ 0_0402_5%
    1 2 TV_LUMA 1 2 3
    8 GMCH_TV_LUMA
    R20 GM@ 0_0402_5% L4 FCM1608C-121T_0603 TV_CRMA_L 6
    1 2 TV_COMPS_L 7
    15 VGA_TV_CRMA
    R17 PM@ 0_0402_5% TV_CRMA 1 2 5
    1 2 L3 FCM1608C-121T_0603 2
    8 GMCH_TV_CRMA
    R21 GM@ 0_0402_5% TV_LUMA_L 4
    1 2 TV_COMPS 1 2 1
    15 VGA_TV_COMPS
    R18 PM@ 0_0402_5% L2 FCM1608C-121T_0603 8
    8 GMCH_TV_COMPS 1 2 9
    R22 GM@ 0_0402_5%
    1

    R12 R11 R10 1 1 1 1 1 1


    C12 C13 C14 C382 C383 C384 SUYIN_030107FR007SX08FU

    PM@ 82P_0402_50V8J PM@ 82P_0402_50V8J PM@ 82P_0402_50V8J


    150_0402_5% 150_0402_5% 2 2 2 2
    PM@ 82P_0402_50V8J 2 2
    PM@ 82P_0402_50V8J
    2

    150_0402_5%
    PM@ 82P_0402_50V8J 5.6P for GM
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 14 of 50
    A B C D E
    5 4 3 2 1

    PCIE_GTX_C_MRX_N[0..15]
    8 PCIE_GTX_C_MRX_N[0..15]
    LCD POWER CIRCUIT 8 PCIE_GTX_C_MRX_P[0..15]
    PCIE_GTX_C_MRX_P[0..15]

    PCIE_MTX_C_GRX_N[0..15]
    8 PCIE_MTX_C_GRX_N[0..15]
    PCIE_MTX_C_GRX_P[0..15]
    8 PCIE_MTX_C_GRX_P[0..15]
    +3VALW +3VS
    +LCDVDD
    W=60mils
    D D

    1
    R371
    R373
    1
    C406 VGA BOARD Conn.
    100K_0402_5%
    GM@ 300_0603_5% GM@ GM@ 4.7U_0805_10V4Z JP29
    2
    1 2 B+
    1 2

    2
    VGA_TV_LUMA 1 2
    14 VGA_TV_LUMA 3 3 4 4

    3
    D S
    VGA_TV_CRMA
    G 14 VGA_TV_CRMA 5 5 6 6
    Q24 2 2 1 2 Q26 AOS 3413 VGA_TV_COMPS 7 8
    14 VGA_TV_COMPS 7 8
    GM@ 2N7002_SOT23 G R375 GM@ 1K_0402_5% GM@ SI2301BDS_SOT23 9 10
    VGA_CRT_R 9 10
    S 1 14 VGA_CRT_R 11 12
    3

    C417 +LCDVDD 11 12
    D 13 13 14 14
    W=60mils VGA_CRT_G 15 16
    14 VGA_CRT_G VGA_DVI_TXC+ 16

    1
    15 16

    1
    D GM@ 0.047U_0402_16V4Z 17 17 18 18 VGA_DVI_TXC- 16
    Q23 2 VGA_CRT_B
    8 GMCH_ENVDD 2 14 VGA_CRT_B 19 19 20 20 VGA_DVI_TXD0+ 16
    G GM@ BSS138_SOT23 1 1 VGA_CRT_VSYNC 21 22
    14 VGA_CRT_VSYNC 21 22 VGA_DVI_TXD0- 16
    S C399 C400 VGA_CRT_HSYNC 23 24
    14 VGA_CRT_HSYNC VGA_DVI_TXD1+ 16
    3
    23 24
    1

    16 DVI_DETECT 25 25 26 26 VGA_DVI_TXD1- 16
    GM@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z 27 28
    2 2 GM@ 16 VGA_DVI_SCLK 27 28 VGA_DVI_TXD2+ 16
    R374 29 30
    16 VGA_DVI_SDATA 29 30 VGA_DVI_TXD2- 16
    GM@ 10K_0402_5% 31 32
    PCIE_MTX_C_GRX_P0 31 32 PCIE_GTX_C_MRX_P0
    33 34
    2

    PCIE_MTX_C_GRX_N0 33 34 PCIE_GTX_C_MRX_N0
    35 35 36 36
    37 37 38 38
    PCIE_MTX_C_GRX_P1 39 40 PCIE_GTX_C_MRX_P1
    PCIE_MTX_C_GRX_N1 39 40 PCIE_GTX_C_MRX_N1
    41 41 42 42
    43 43 44 44
    PCIE_MTX_C_GRX_P2 45 46 PCIE_GTX_C_MRX_P2
    PCIE_MTX_C_GRX_N2 45 46 PCIE_GTX_C_MRX_N2
    47 47 48 48
    C 49 50 C
    PCIE_MTX_C_GRX_P3 49 50 PCIE_GTX_C_MRX_P3
    51 51 52 52
    PCIE_MTX_C_GRX_N3 53 54 PCIE_GTX_C_MRX_N3
    +3VS 53 54
    55 55 56 56
    PCIE_MTX_C_GRX_P4 57 58 PCIE_GTX_C_MRX_P4
    PCIE_MTX_C_GRX_N4 57 58 PCIE_GTX_C_MRX_N4
    59 59 60 60

    1
    61 61 62 62
    R491 PCIE_MTX_C_GRX_P5 63 64 PCIE_GTX_C_MRX_P5
    PCIE_MTX_C_GRX_N5 63 64 PCIE_GTX_C_MRX_N5
    65 65 66 66
    4.7K_0402_5% 67 68
    D28 PCIE_MTX_C_GRX_P6 67 68 PCIE_GTX_C_MRX_P6
    69 70

    2
    BKOFF# 69 70
    32 BKOFF# 1 2 RB751V_SOD323 DISPOFF# PCIE_MTX_C_GRX_N6 71 71 72 72 PCIE_GTX_C_MRX_N6
    73 73 74 74
    PCIE_MTX_C_GRX_P7 75 76 PCIE_GTX_C_MRX_P7
    PCIE_MTX_C_GRX_N7 75 76 PCIE_GTX_C_MRX_N7
    77 77 78 78
    79 79 80 80
    PCIE_MTX_C_GRX_P8 81 82 PCIE_GTX_C_MRX_P8
    PCIE_MTX_C_GRX_N8 81 82 PCIE_GTX_C_MRX_N8
    83 84
    LCD Conn. PCIE_MTX_C_GRX_P9
    85
    87
    83
    85
    84
    86 86
    88 PCIE_GTX_C_MRX_P9
    PCIE_MTX_C_GRX_N9 87 88 PCIE_GTX_C_MRX_N9
    89 89 90 90
    91 91 92 92
    JP4 PCIE_MTX_C_GRX_P10 93 94 PCIE_GTX_C_MRX_P10
    DAC_BRIG PCIE_MTX_C_GRX_N10 93 94 PCIE_GTX_C_MRX_N10
    INVPWR_B+ 1 21 DAC_BRIG 32 95 95 96 96
    INVT_PWM 97 98
    2 22 INVT_PWM 32 97 98
    DISPOFF# PCIE_MTX_C_GRX_P11 99 100 PCIE_GTX_C_MRX_P11
    3 23 PCIE_MTX_C_GRX_N11 99 100 PCIE_GTX_C_MRX_N11
    +3VS 4 24 +LCDVDD 101 101 102 102
    8 GMCH_LCD_CLK GMCH_LCD_CLK 103 104
    GMCH_LCD_DATA 5 25 PCIE_MTX_C_GRX_P12 103 104 PCIE_GTX_C_MRX_P12
    8 GMCH_LCD_DATA 6 26 105 105 106 106
    B PCIE_MTX_C_GRX_N12 PCIE_GTX_C_MRX_N12 B
    7 27 107 107 108 108
    GMCH_TZOUT0- GMCH_TXOUT0- 109 110
    8 GMCH_TZOUT0- 8 28 GMCH_TXOUT0- 8 109 110
    GMCH_TZOUT0+ GMCH_TXOUT0+ PCIE_MTX_C_GRX_P13 111 112 PCIE_GTX_C_MRX_P13
    8 GMCH_TZOUT0+ 9 29 GMCH_TXOUT0+ 8 111 112
    PCIE_MTX_C_GRX_N13 113 114 PCIE_GTX_C_MRX_N13
    GMCH_TZOUT1+ 10 30 GMCH_TXOUT1- 113 114
    8 GMCH_TZOUT1+ 11 31 GMCH_TXOUT1- 8 115 115 116 116
    GMCH_TZOUT1- GMCH_TXOUT1+ PCIE_MTX_C_GRX_P14 117 118 PCIE_GTX_C_MRX_P14
    8 GMCH_TZOUT1- 12 32 GMCH_TXOUT1+ 8 117 118
    PCIE_MTX_C_GRX_N14 119 120 PCIE_GTX_C_MRX_N14
    GMCH_TZOUT2+ 13 33 GMCH_TXOUT2+ 119 120
    8 GMCH_TZOUT2+ 14 34 GMCH_TXOUT2+ 8 121 121 122 122
    GMCH_TZOUT2- GMCH_TXOUT2- PCIE_MTX_C_GRX_P15 123 124 PCIE_GTX_C_MRX_P15
    8 GMCH_TZOUT2- 15 35 GMCH_TXOUT2- 8 123 124
    PCIE_MTX_C_GRX_N15 125 126 PCIE_GTX_C_MRX_N15
    GMCH_TZCLK- 16 36 GMCH_TXCLK- 125 126
    8 GMCH_TZCLK- 17 37 GMCH_TXCLK- 8 127 127 128 128
    GMCH_TZCLK+ GMCH_TXCLK+ 129 130 DAC_BRIG
    8 GMCH_TZCLK+ 18 38 GMCH_TXCLK+ 8 13 CLK_PCIE_VGA 129 130
    131 132 DISPOFF#
    19 39 13 CLK_PCIE_VGA# 131 132
    133 134 INVT_PWM
    20 40 VGA_DDC_CLK 133 134
    14 VGA_DDC_CLK 135 135 136 136 PLTRST_VGA# 16,19
    GM@ ACES_88107-4000G VGA_DDC_DATA 137 138 SUSP#
    14 VGA_DDC_DATA 137 138 SUSP# 24,32,33,40
    139 140 ENBKL ENBKL 8,32
    32,33,44 EC_SMB_CK1 139 140
    32,33,44 EC_SMB_DA1 141 141 142 142 +5VALW
    +1.5VS 143 143 144 144 +3VS
    +2.5VS 145 145 146 146
    147 147 148 148
    +LCDVDD 149 150
    INVPWR_B+ +3VS 149 150
    +1.8VS 151 151 152 152 +1.8VS
    1 153 153 154 154 1 1
    L6 2 1 1 1 155 156 C605 C595 1
    B+ 155 156
    KC FBM-L11-201209-221LMAT_0805 1 1 1 C592 C601 C611 157 158 C587
    GM@ C32 C411 157 158 PM@ 0.1U_0402_16V4Z
    159 159 160 160
    2 2 2

    om
    L5 2 1 C412 [email protected]_0402_16V4Z PM@ 0.1U_0402_16V4Z PM@ 0.1U_0402_16V4Z
    KC FBM-L11-201209-221LMAT_0805 GM@ 0.1U_0402_16V4Z GM@ 0.1U_0402_16V4Z 2 2
    [email protected]_0402_16V4Z PM@ 0.1U_0402_16V4Z PM@ ACES_88394-1G71 2
    A 2 2 2 A
    GM@ GM@ 10U_0805_10V4Z

    l.c
    1

    ai
    C34
    GM@ 68P_0402_50V8J

    tm
    2

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 15 of 50
    5 4 3 2 1
    5 4 3 2 1

    +2.5VS +3VS

    +3VS
    +2.5VS
    1 1 1 1 1 1
    C395 C16 C17 C396 C394 C378

    @ 10U_0805_10V4Z @ 0.1U_0402_16V4Z @ 10U_0805_10V4Z @ 0.1U_0402_16V4Z


    2 2
    @ 0.1U_0402_16V4Z 2 2 2
    @ 0.1U_0402_16V4Z 2

    12
    28

    15
    21
    36
    42
    48
    D D

    1
    U34

    AVDD_PLL
    DVDD
    DVDD

    TVDD
    TVDD
    AVDD
    AVDD
    AVDD
    32 13 DVI_TXC-
    8 SDVO_INT SDVOB_INT+ TLC#
    33 14 DVI_TXC+
    8 SDVO_INT# SDVOB_INT- TLC
    16 DVI_TXD0-
    TDC0# DVI_TXD0+
    8 SDVOB_R 37 SDVOB_R+ TDC0 17
    38 19 DVI_TXD1-
    8 SDVOB_R# SDVOB_R- TDC1#
    20 DVI_TXD1+
    TDC1 DVI_TXD2-
    8 SDVOB_G 40 SDVOB_G+ TDC2# 22
    41 23 DVI_TXD2+
    8 SDVOB_G# SDVOB_G- TDC2

    8 SDVOB_B 43 SDVOB_B+
    44 29 DVI_DETECT
    8 SDVOB_B# SDVOB_B- HPDET
    46 11 VGA_DVI_SCLK
    8 SDVOB_CLK SDVOB_CLK+ SC_DDC
    47 10 VGA_DVI_SDATA
    8 SDVOB_CLK# SDVOB_CLK- SD_DDC
    AS 3 9
    AS SC_PROM
    15,19 PLTRST_VGA# 2 RESET# SD_PROM 8
    25

    AGND_PLL
    +2.5VS VSWING SDVO_SDAT
    SPD 5 SDVO_SDAT 8
    27 4 SDVO_SCLK
    ATPG SPC SDVO_SCLK 8

    DGND
    DGND
    AGND
    AGND
    AGND
    TGND
    TGND
    26 SCEN
    1

    NC
    NC
    Keep 30mil spacing to other signals

    1
    R361
    @ 10K_0402_5% R344 R349 R347 @ CH7307_LQFP48 +2.5VS

    7
    30
    31
    39
    45
    18
    24
    6

    34
    35
    C @ 1.2K_0402_5% @ 10K_0402_5% @ 10K_0402_5% SDVO_SDAT 1 2 C
    2

    AS R350 @ 5.6K_0402_5%

    2
    SDVO_SCLK 1 2
    1

    R360 @ 5.6K_0402_5%
    R364
    @ 10K_0402_5%
    2

    DVI-D Connector D16


    +DVI_VCC PM@ RB411D_SOT23
    JP16
    1 4 DVI_TXD0- 17 14 1 2 +5VS
    15 VGA_DVI_TXD0- TMDS_DATA0- +5V
    2 3 DVI_TXD0+ 18 W=40mils 1
    15 VGA_DVI_TXD0+ TMDS_DATA0+
    RP6 PM@ 0_0404_4P2R_5%
    1 4 DVI_TXD1- 9 C375
    15 VGA_DVI_TXD1- TMDS_DATA1-
    2 3 DVI_TXD1+ 10 PM@ 0.1U_0402_16V4Z
    15 VGA_DVI_TXD1+ TMDS_DATA1+ 2
    RP7 PM@ 0_0404_4P2R_5%
    1 2 +5VS 1 4 DVI_TXD2- 1
    15 VGA_DVI_TXD2- TMDS_DATA2-
    R368 @ 0_0402_5% 2 3 DVI_TXD2+ 2 6 DVI_SCLK
    15 VGA_DVI_TXD2+ TMDS_DATA2+ DDC_CLOCK
    1 2 +3VS RP4 PM@ 0_0404_4P2R_5%
    R366 PM@ 0_0402_5% 12 TMDS_DATA3- DVI_SDATA
    13 TMDS_DATA3+ DDC_DATA 7
    +DVI_VCC
    4 TMDS_DATA4-
    5 TMDS_DATA4+
    B B
    2

    20 TMDS_DATA5-
    2

    R346 21 16
    6.8K_0402_5% R348 R367 R365 TMDS_DATA5+ Hot Plug Detect
    PM@ 6.8K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
    PM@ PM@ PM@ 2 3 DVI_TXC+ 23
    15 VGA_DVI_TXC+
    1

    TMDS_Clock+
    2
    G

    1 4 DVI_TXC- 24
    15 VGA_DVI_TXC-
    1

    Q21 RP5 PM@ 0_0404_4P2R_5% TMDS_Clock-


    VGA_DVI_SCLK 3 1 2N7002_SOT23 DVI_SCLK 3
    15 VGA_DVI_SCLK TMDS_DATA2/4 shield
    S

    PM@ TMDS_DATA1/3 shield 11


    place close to CH7307C TMDS_DATA0/5 shield 19
    2
    G

    TMDS_Clock shield 22
    Q20
    VGA_DVI_SDATA 3 1 2N7002_SOT23 DVI_SDATA
    15 VGA_DVI_SDATA
    S

    PM@

    8 Analog VSYNC GND 15

    PM@ SUYIN_070939FR024S531PL

    R329
    DVI_DETECT 1 2
    15 DVI_DETECT
    PM@ 20K_0603_5%

    1
    R330
    D21 PM@ 100K_0603_5%
    @ SKS10-04AT_TSMA
    A A

    2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 16 of 50
    5 4 3 2 1
    5 4 3 2 1

    RP39
    1 8 PCI_STOP#
    +3VS
    2 7 PCI_TRDY#
    3 6 PCI_FRAME#
    D 4 5 PCI_SERR# U4B D
    22,25,26,28,29 PCI_AD[0..31]
    PCI_AD0 E2 L5 PCI_REQ#0
    AD[0] REQ[0]# PCI_REQ#0 25
    8.2K_1206_8P4R_5% PCI_AD1 PCI_GNT#0
    PCI_AD2
    E5
    C2
    AD[1] PCI GNT[0]# C1
    B5 PCI_REQ#1
    PCI_GNT#0 25
    AD[2] REQ[1]# PCI_REQ#1 28
    PCI_AD3 F5 B6 PCI_GNT#1
    AD[3] GNT[1]# PCI_GNT#1 28
    PCI_AD4 F3 M5 PCI_REQ#2
    AD[4] REQ[2]# PCI_REQ#2 22
    RP10 PCI_AD5 E9 F1 PCI_GNT#2
    AD[5] GNT[2]# PCI_GNT#2 22
    1 8 PCI_PLOCK# PCI_AD6 F2 B8 PCI_REQ#3
    +3VS AD[6] REQ[3]# PCI_REQ#3 26
    2 7 P CI_IRDY# PCI_AD7 D6 C8 PCI_GNT#3
    AD[7] GNT[3]# PCI_GNT#3 26
    3 6 PCI_DEVSEL# PCI_AD8 E6 F7 PCI_REQ#4
    AD[8] REQ[4]#/GPI[40] PCI_REQ#4 29
    4 5 PCI_PERR# PCI_AD9 D3 E7 PCI_GNT#4
    AD[9] GNT[4]#/GPO[48] PCI_GNT#4 29
    PCI_AD10 A2 E8 PCI_REQ#5
    8.2K_1206_8P4R_5% PCI_AD11 AD[10] REQ[5]#/GPI[1] PCI_GNT#5
    D2 AD[11] GNT[5]#/GPO[17] F6
    PCI_AD12 D5 B7 PCI_REQ#6
    PCI_AD13 AD[12] REQ[6]#/GPI[0]
    H3 AD[13] GNT[6]#/GPO[16] D8
    PCI_AD14 B4
    RP40 PCI_AD15 AD[14] PCI_CBE#0
    J5 AD[15] C/BE[0]# J6 PCI_CBE#0 22,25,26,28,29
    1 8 PCI_REQ#2 PCI_AD16 K2 H6 PCI_CBE#1 PCI_CBE#1 22,25,26,28,29
    +3VS AD[16] C/BE[1]#
    2 7 PCI_REQ#0 PCI_AD17 K5 G4 PCI_CBE#2
    AD[17] C/BE[2]# PCI_CBE#2 22,25,26,28,29
    3 6 PCI_PIRQD# PCI_AD18 D4 G2 PCI_CBE#3
    AD[18] C/BE[3]# PCI_CBE#3 22,25,26,28,29
    4 5 PCI_PIRQB# PCI_AD19 L6
    PCI_AD20 AD[19] P CI_IRDY#
    G3 AD[20] IRDY# A3 PCI_IRDY# 22,25,26,28,29
    8.2K_1206_8P4R_5% PCI_AD21 H4 E1 PCI_PAR
    PCI_AD22 AD[21] PAR PCI_RST# PCI_PAR 22,25,26,28,29
    H2 AD[22] PCIRST# R2 PCI_RST# 22,24,25,26,28,29
    PCI_AD23 H5 C3 PCI_DEVSEL#
    RP8 PCI_AD24 AD[23] DEVSEL# PCI_PERR# PCI_DEVSEL# 22,25,26,28,29
    B3 AD[24] PERR# E3 PCI_PERR# 22,25,26,28,29
    1 8 PCI_PIRQF# PCI_AD25 M6 C5 PCI_PLOCK#
    +3VS AD[25] PLOCK#
    2 7 PCI_REQ#4 PCI_AD26 B2 G5 PCI_SERR#
    AD[26] SERR# PCI_SERR# 22,25,26,28,29
    3 6 PCI_PIRQG# PCI_AD27 K6 J1 PCI_STOP#
    AD[27] STOP# PCI_STOP# 22,25,26,28,29
    C 4 5 PCI_REQ#1 PCI_AD28 K3 J2 PCI_TRDY# C
    AD[28] TRDY# PCI_TRDY# 22,25,26,28,29
    PCI_AD29 A5
    8.2K_1206_8P4R_5% PCI_AD30 AD[29]
    L1 AD[30]
    PCI_AD31 K4 AD[31] PLT_RST#
    PLTRST# R5 PLT_RST# 6,19,21,30,32
    RP9 G6 CLK_PCI_ICH
    PCICLK CLK_PCI_ICH 13
    1 8 PCI_PIRQE# PCI_FRAME# J3 P6
    +3VS 22,25,26,28,29 PCI_FRAME# FRAME# PME#
    2 7 PCI_REQ#5
    3 6 PCI_REQ#3 Interrupt I/F Internal Pull-up.
    4 5 PCI_REQ#6 PCI_PIRQA# N2 D9 PCI_PIRQE#
    22,29 PCI_PIRQA# PIRQ[A]# PIRQ[E]#/GPI[2] PCI_PIRQE# 25 Sample high destination is LPC.
    PCI_PIRQB# L2 C7 PCI_PIRQF#
    22 PCI_PIRQB# PIRQ[B]# PIRQ[F]#/GPI[3] PCI_PIRQF# 26
    8.2K_1206_8P4R_5% PCI_PIRQC# M1 C6 PCI_PIRQG#
    PIRQ[C]# PIRQ[G]#GPI[4] PCI_PIRQG# 28
    PCI_PIRQD# L3 M3 PCI_PIRQH# PCI_GNT#5
    PIRQ[D]# PIRQ[H]#/GPI[5] PCI_PIRQH# 28,29

    RESERVED

    1
    RP41 AC5 SATA[1]RXN/RSVD[1] R421
    +3VS 1 8 AD5 SATA[1]RXP/RSVD[2]
    2 7 PCI_PIRQA# AF4 @ 0_0402_5%
    PCI_PIRQH# SATA[1]TXN/RSVD[3]
    3 6 AG4 SATA[1]TXP/RSVD[4]
    4 5 PCI_PIRQC# AC9

    2
    SATA[3]RXN/RSVD[5]
    AD9 SATA[3]RXP/RSVD[6]
    8.2K_1206_8P4R_5% AF8 SATA[3]TXN/RSVD[7]
    AG8 SATA[3]TXP/RSVD[8]
    U3 TP[3]/RSVD[9]
    ICH6_BGA609

    B B
    CLK_PCI_ICH

    2
    R438
    @ 10_0402_5%

    1
    1
    C474
    @ 10P_0402_50V8J
    2

    om
    A A

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 17 of 50
    5 4 3 2 1
    5 4 3 2 1

    C96
    18P_0402_50V8J
    2 1 ICH_RTCX1
    +RTCVCC

    10M_0402_5%
    X1

    1
    3 NC OUT 4
    1

    R114
    R482 32.768KHZ_12.5P_1TJS125DJ2A073 2 1
    NC IN U4A
    1M_0402_5% C102 +1.05VS

    2
    D 18P_0402_50V8J Y1 P2 LPC_LAD0 D
    LPC_AD0 30,32
    2

    RTCX1 LAD[0]/FWH[0]

    RTC
    2 1 ICH_RTCX2 Y2 N3 LPC_LAD1
    RTCX2 LAD[1]/FWH[1] LPC_AD1 30,32
    INTRUDER# N5 LPC_LAD2
    LAD[2]/FWH[2] LPC_AD2 30,32
    1 2 ICH_RTCRST# AA2 N4 LPC_LAD3 H_FERR# 1 2

    LPC
    +RTCVCC RTCRST# LAD[3]/FWH[3] LPC_AD3 30,32
    R477 R505 56_0402_5%
    20K_0402_5% INTRUDER# AA3 N6 H_DPRSTP# 1 2
    INTVRMEN INTRUDER# LDRQ[0]# LPC_DRQ#1 R498 56_0402_5%
    AA5 INTVRMEN LDRQ[1]#/GPI[41] P4 LPC_DRQ#1 30
    +3VS
    2 1 P3 LPC_FRAME#
    LFRAME#/FWH[4] LPC_FRAME# 30,32
    close to RAM door J3 JOPEN D12 EE_CS
    1

    B12 R502 1 2 10K_0402_5% +3VS


    R486 EE_SHCLK EC_GA20
    D11 EE_DOUT A20GATE AF22 EC_GA20 32
    C111 F13 AF23 H_A20M#
    EE_DIN A20M# H_A20M# 4
    10K_0402_5% 1U_0603_10V4Z

    LAN
    R494 1 2 @ 0_0402_5% H_CPUSLP#

    CPU
    1 2 F12 AE27 H_CPUSLP# 4,6
    2

    LAN_CLK CPUSLP#
    B11 AE24 R495 1 2 0_0402_5% H_DPRSTP#
    LAN_RSTSYNC DPRSLP#/TP[4] H_DPRSTP# 4
    SATA_LED# AD27
    DPSLP#/TP[2] H_DPSLP# 4
    915PM Check List Rev1.701: 180K, 0.1uF E12 LANRXD[0] FERR# 1 H_FERR#
    E11 LANRXD[1] FERR# AF24 2 H_FERR# 4
    C13 R500 56_0402_5%
    LANRXD[2] H_PWRGOOD
    CPUPWRGD/GPO[49] AG25 H_PWRGOOD 4
    C12 LANTXD[0]
    C435 R413 C11 AG26 H_IGNNE#
    LANTXD[1] IGNNE# H_IGNNE# 4
    @ 10P_0402_50V8J @ 10_0402_5% E13 AE22
    LANTXD[2] INIT3_3V# H_INIT#
    1 2 2 1 INIT# AF27 H_INIT# 4
    AG24 H_INTR R511
    INTR H_INTR 4
    1 2 ICH_AC_BITCLK 10K_0402_5%
    34 ICH_BITCLK_MDC
    R400 39_0402_5% C10 1 2 +3VS
    ACZ_BIT_CLK

    AC-97/AZALIA
    C
    34 ICH_SYNC_MDC 2 1 ICH_AC_SYNC_R B9 AD23 KB_RST# C
    ACZ_SYNC RCIN# EC_KBRST# 32
    R412 39_0402_5%
    1 2 ICH_AC_RST_R# A10 AF25 H_NMI
    34 ICH_RST_MDC# ACZ_RST# NMI H_NMI 4
    R396 39_0402_5% AG27 H_SMI#
    SMI# H_SMI# 4
    36 ICH_AC_SDIN0 F11 ACZ_SDIN[0]
    34 ICH_AC_SDIN1 F10 AE26 H_STPCLK#
    ACZ_SDIN[1] STPCLK# H_STPCLK# 4 MAINPWON 41,42,44
    B10 ACZ_SDIN[2]
    AE23 THRMTRIP# R515
    THRMTRIP#

    1
    2 1 ICH_AC_SDOUT_R C9 @ 330_0402_5% C
    34 ICH_SDOUT_MDC ACZ_SDO
    R414 39_0402_5% IDE_DA[0..2] 21 +1.05VS 1 2 2 Q13
    AC16 IDE_DA0 B @ 2SC2411K_SC59
    SATA_LED# DA[0] IDE_DA1 E
    32 SATA_LED# AC19 AB17

    3
    SATALED# DA[1] IDE_DA2
    DA[2] AC17

    21 SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_N0 AE3 AD16 IDE_DCS1# IDE_DCS1# 21


    SATA_DTX_C_IRX_P0 SATA[0]RXN DCS1# IDE_DCS3# THRMTRIP#
    21 SATA_DTX_C_IRX_P0 AD3 SATA[0]RXP DCS3# AE17 IDE_DCS3# 21 +1.05VS 1 2 2 1
    SATA_ITX_DRX_N0 AG2 R508 75_0402_1% R510
    ICH_AC_BITCLK SATA_ITX_DRX_P0 SATA[0]TXN 56_0402_5%
    36 ICH_BITCLK_AUDIO 1 2 AF2 SATA[0]TXP IDE_DD[0..15] 21
    R399 39_0402_5% AD14 IDE_DD0
    DD[0]

    SATA
    SATA_DTX_C_IRX_N2 AD7 AF15 IDE_DD1 H_THERMTRIP#
    SATA[2]RXN DD[1] H_THERMTRIP# 4,6

    PIDE
    36 ICH_SYNC_AUDIO 1 2 ICH_AC_SYNC_R SATA_DTX_C_IRX_P2 AC7 AF14 IDE_DD2
    R395 39_0402_5% SATA[2]RXP DD[2] IDE_DD3
    AF6 SATA[2]TXN DD[3] AD12
    AG6 AE14 IDE_DD4
    ICH_AC_RST_R# SATA[2]TXP DD[4] IDE_DD5
    36 ICH_RST_AUDIO# 1 2 DD[5] AC11
    R397 39_0402_5% CLK_PCIE_SATA# AC2 AD11 IDE_DD6
    13 CLK_PCIE_SATA# SATA_CLKN DD[6]
    CLK_PCIE_SATA AC1 AB11 IDE_DD7
    13 CLK_PCIE_SATA SATA_CLKP DD[7]
    36 ICH_SDOUT_AUDIO 1 2 ICH_AC_SDOUT_R AE13 IDE_DD8
    R394 39_0402_5% DD[8] IDE_DD9
    AG11 SATARBIAS# DD[9] AF13
    R503 1 2 24.9_0402_1% SATARBIAS AF11 AB12 IDE_DD10
    B SATARBIAS DD[10] IDE_DD11 B
    10mils DD[11] AB13
    IDE_DD12
    DD[12] AC13
    AE15 IDE_DD13
    R499 1 DD[13]
    +3VS 2 4.7K_0402_5% IDE _DIORDY
    DD[14] AG15 IDE_DD14
    IDE _DIORDY AF16 AD13 IDE_DD15
    21 IDE_DIORDY IORDY DD[15]
    IDE_IRQ AB16
    21 IDE_IRQ IDEIRQ
    R484 1 2 8.2K_0402_5% IDE_IRQ IDE_DDACK# AB15
    21 IDE_DDACK# DDACK#
    IDE_DIOW# AC14 AB14 IDE_DDREQ
    21 IDE_DIOW# DIOW# DDREQ IDE_DDREQ 21
    IDE_DIOR# AE16
    21 IDE_DIOR# DIOR#

    ICH6_BGA609

    1 2 SATA_DTX_C_IRX_N0
    R497 1K_0402_5%
    1 2 SATA_DTX_C_IRX_P0
    R490 1K_0402_5%

    SATA_ITX_DRX_N0 2 1 SATA_ITX_C_DRX_N0 1 2 SATA_DTX_C_IRX_N2


    C598 @ 0.01U_0402_16V7K SATA_ITX_C_DRX_N0 21 R489 1K_0402_5%
    SATA_ITX_DRX_P0 2 1 SATA_ITX_C_DRX_P0 1 2 SATA_DTX_C_IRX_P2
    C599 @ 0.01U_0402_16V7K SATA_ITX_C_DRX_P0 21 1K_0402_5%
    R487

    1 2 CLK_PCIE_SATA
    R481 1K_0402_5%
    1 2 CLK_PCIE_SATA#
    R485 1K_0402_5%

    A A

    SATA_RXn/p need tie to ground when SATA port no used

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 18 of 50
    5 4 3 2 1
    5 4 3 2 1

    +3VALW

    1 2 ICH_SMLINK0
    R465 10K_0402_5%
    1 2 ICH_SMLINK1
    R452 10K_0402_5%
    1 2 CK_SCLK
    R473 2.2K_0402_5%
    1 2 CK_SDATA U4C
    R462 2.2K_0402_5% EC_SWI# T2 H25
    LINKALERT# 32 EC_SWI# RI# PERn[1]
    1 2 PERp[1] H24
    D R483 10K_0402_5% GPI26 AF17 G27 D
    EC_LID_OUT# GPI29 SATA[0]GP/GPI[26] PETn[1]
    1 2 AE18 SATA[1]GP/GPI[29] PETp[1] G26
    R447 @ 10K_0402_5% GPI30 AF18
    EC_SWI# GPI31 SATA[2]GP/GPI[30] PCIE_PTX_C_IRX_N2
    1 2 AG18 SATA[3]GP/GPI[31] PERn[2] K25 PCIE_PTX_C_IRX_N2 24
    R456 10K_0402_5% K24 PCIE_PTX_C_IRX_P2
    PERp[2] PCIE_PTX_C_IRX_P2 24
    1 2 PM_BATLOW# CK_SCLK Y4 J27 PCIE_ITX_PRX_N2 C485 1 2 0.1U_0402_16V4Z PCIE_ITX_C_PRX_N2 PCIE_ITX_C_PRX_N2 24
    13,24 CK_SCLK SMBCLK PETn[2]

    PCI-EXPRESS
    R461 8.2K_0402_5% CK_SDATA W5 J26 PCIE_ITX_PRX_P2 C493 1 2 0.1U_0402_16V4Z PCIE_ITX_C_PRX_P2 PCIE_ITX_C_PRX_P2 24
    13,24 CK_SDATA SMBDATA PETp[2]
    1 2 ICH_PCIE_WAKE# LINKALERT# Y5
    R453 1K_0402_5% ICH_SMLINK0 LINKALERT#
    W4 SMLINK[0] PERn[3] M25

    GPIO
    1 2 SYSRST# ICH_SMLINK1 U6 M24
    R458 10K_0402_5% MCH_SYNC# SMLINK[1] PERp[3]
    AG21 MCH_SYNC# PETn[3] L27
    SB_SPKR F8 L26
    36 SB_SPKR SPKR PETp[3]
    +3VS W3 P24
    SUS_STAT#/LPCPD# PERn[4]
    PERp[4] P23
    1 2 ICH_GPI7 SYSRST# U2 N27
    R493 10K_0402_5% SYS_RESET# PETn[4]
    PETp[4] N26
    1 2 PM_CLKRUN# PM_BMBUSY# AD19
    6 PM_BMBUSY# BM_BUSY#/GPI[6]
    R501 8.2K_0402_5% T25 DMI_MTX_IRX_N0
    DMI[0]RXN DMI_MTX_IRX_N0 6
    1 2 ICH_VGATE ICH_GPI7 AE19 T24 DMI_MTX_IRX_P0
    GPI[7] DMI[0]RXP DMI_MTX_IRX_P0 6
    R513 10K_0402_5% 32 EC_SMI# EC_SMI# R1 R27 DMI_ITX_MRX_N0
    GPI[8] DMI[0]TXN DMI_ITX_MRX_N0 6
    1 2 MCH_SYNC# R26 DMI_ITX_MRX_P0
    DMI[0]TXP DMI_ITX_MRX_P0 6

    DIRECT MEDIA INTERFACE


    R514 10K_0402_5% 2 1 W6
    SERIRQ 32,43 ACIN R466 0_0402_5% SMBALERT#/GPI[11] DMI_MTX_IRX_N1
    1 2 DMI[1]RXN V25 DMI_MTX_IRX_N1 6
    R476 10K_0402_5% EC_LID_OUT# M2 V24 DMI_MTX_IRX_P1
    32 EC_LID_OUT# GPI[12] DMI[1]RXP DMI_MTX_IRX_P1 6
    EC_SCI# R6 U27 DMI_ITX_MRX_N1
    32 EC_SCI# GPI[13] DMI[1]TXN DMI_ITX_MRX_N1 6
    U26 DMI_ITX_MRX_P1
    DMI[1]TXP DMI_ITX_MRX_P1 6
    PM_STP_PCI# AC21
    13 PM_STP_PCI# STP_PCI#/GPO[18]
    Y25 DMI_MTX_IRX_N2
    DMI[2]RXN DMI_MTX_IRX_N2 6
    C 1 2 SYS_PWROK AB21 Y24 DMI_MTX_IRX_P2 C
    GPO[19] DMI[2]RXP DMI_MTX_IRX_P2 6
    R480 10K_0402_5% W27 DMI_ITX_MRX_N2
    DMI[2]TXN DMI_ITX_MRX_N2 6 +3VALW
    1 2 EC_RSMRST# PM_STP_CPU# AD22 W26 DMI_ITX_MRX_P2
    13,48 PM_STP_CPU# STP_CPU#/GPO[20] DMI[2]TXP DMI_ITX_MRX_P2 6
    R472 10K_0402_5%
    AB24 DMI_MTX_IRX_N3
    DMI[3]RXN DMI_MTX_IRX_N3 6
    RP42 AD20 AB23 DMI_MTX_IRX_P3 RP38
    GPO[21] DMI[3]RXP DMI_MTX_IRX_P3 6
    4 5 GPI26 PLTRST_VGA# AD21 AA27 DMI_ITX_MRX_N3 USB_OC#5 4 5
    15,16 PLTRST_VGA# GPO[23] DMI[3]TXN DMI_ITX_MRX_N3 6
    3 6 GPI29 AA26 DMI_ITX_MRX_P3 USB_OC#7 3 6
    DMI[3]TXP DMI_ITX_MRX_P3 6
    2 7 GPI30 IDE_HRESET# V3 USB_OC#1 2 7
    21 IDE_HRESET# GPIO[24]
    1 8 GPI31 AD25 CLK_PCIE_ICH# 1 8
    DMI_CLKN CLK_PCIE_ICH# 13
    P5 AC25 CLK_PCIE_ICH
    GPIO[25] DMI_CLKP CLK_PCIE_ICH 13
    100_1206_8P4R_5% R3 10K_1206_8P4R_5%
    24 EXP_CPPE# GPIO[27]
    33 EC_FLASH# EC_FLASH# T3
    PM_CLKRUN# GPIO[28]
    PM_DPRSLPVR 25,26,28,29,30 PM_CLKRUN# AF19 CLKRUN#/GPIO[32] DMI_ZCOMP F24 10mils
    1 2 AF20 GPIO[33]
    R492 100K_0402_5% AC18 F23 DMI_IRCOMP R420 1 2 24.9_0402_1% +1.5VS
    GPIO[34] DMI_IRCOMP
    24 ICH_PCIE_WAKE# ICH_PCIE_WAKE# U5 C23 USB_OC#4
    WAKE# OC[4]#/GPI[9] USB_OC#4 31
    1 2 IDE_HRESET# D23 USB_OC#5
    R471 @ 10K_0402_5% SERIRQ OC[5]#/GPI[10] USB_OC#6
    22,30,32 SERIRQ AB20 SERIRQ OC[6]#/GPI[14] C25 USB_OC#6 31
    C24 USB_OC#7
    SUS_CLK EC_THERM# OC[7]#/GPI[15]
    1 2 32 EC_THERM# AC20 THRM#
    R460 @ 10K_0402_5% C27 USB_OC#0
    OC[0]# USB_OC#0 31
    6,13,48 VGATE 2 1 ICH_VGATE AF21 VRMPWRGD OC[1]# B27 USB_OC#1
    R512 0_0402_5% B26 USB_OC#2
    OC[2]# USB_OC#2 31
    CLK_ICH_14M E10 C26 USB_OC#3
    13 CLK_ICH_14M CLK14 OC[3]# USB_OC#3 31
    CLK_ICH_48M USB20_N0

    CLOCK
    13 CLK_ICH_48M A27 CLK48 USBP[0]N C21 USB20_N0 31
    D21 USB20_P0
    B USBP[0]P USB20_P0 31 B
    SUS_CLK V6 A20
    SUSCLK USBP[1]N
    USBP[1]P B20
    SLP_S3# T4 D19 USB20_N2
    32 PM_SLP_S3# SLP_S3# USBP[2]N USB20_N2 31
    CLK_ICH_48M SLP_S4# T5 C19 USB20_P2
    SLP_S4# USBP[2]P USB20_P2 31

    USB
    SLP_S5# T6 A18 USB20_N3
    SLP_S5# USBP[3]N USB20_N3 31
    B18 USB20_P3
    USBP[3]P USB20_P3 31
    1

    SYS_PWROK AA1 E17 USB20_N4


    35 SYS_PWROK PWROK USBP[4]N USB20_N4 31

    POWER MGT
    D17 USB20_P4
    USBP[4]P USB20_P4 31
    R408 PM_DPRSLPVR AE20 B16 USB20_N5
    48 PM_DPRSLPVR DPRSLPVR/TP[1] USBP[5]N USB20_N5 34
    @ 10_0402_5% A16 USB20_P5
    USBP[5]P USB20_P5 34
    PM_BATLOW# V2 C15 USB20_N6
    USB20_N6 31
    2

    BATLOW#/TP[0] USBP[6]N USB20_P6


    USBP[6]P D15 USB20_P6 31
    1 PBTN_OUT# U1 A14 USB20_N7
    32 PBTN_OUT# PWRBTN# USBP[7]N USB20_N7 24
    B14 USB20_P7
    USBP[7]P USB20_P7 24
    C423 PLT_RST# V5
    6,17,21,30,32 PLT_RST# LAN_RST#
    @ 10P_0402_50V8J A22 USBRBIAS 1 2
    2 EC_RSMRST# USBRBIAS# R411 22.6_0402_1%
    32 EC_RSMRST# Y3 RSMRST# USBRBIAS B22 10mils
    ICH6_BGA609

    CLK_ICH_14M
    1

    R423
    @ 10_0402_5% +3VALW

    om
    2

    A 1 2 C128 A
    0.1U_0402_16V4Z

    l.c
    1
    5

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    C476 U8
    @ 10P_0402_50V8J 1 SLP_S4#

    tm
    P

    2 B
    32 PM_SLP_S5# 4 Y SLP_S5#

    ho
    2
    A Security Classification Compal Secret Data Compal Electronics, Inc.
    G

    f@
    TC7SH08FU_SSOP5 2005/03/01 2006/03/01 Title
    Issued Date Deciphered Date
    3

    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 19 of 50
    5 4 3 2 1
    5 4 3 2 1

    +1.5VS

    +1.5VS C533
    Near PIN F27, U4E 0.1U_0402_16V4Z U4D
    P27, AB27 +RTCVCC
    1 2 E27 F4
    VSS[172] VSS[86]
    +1.5VS AA22 VCC1_5[1] VCC1_5[98] F9 20mils C521
    Y6 VSS[171] VSS[85] F22
    1 AA23 VCC1_5[2] VCC1_5[97] U17 Y27 VSS[170] VSS[84] F19
    2 2 2 AA24 U16 0.1U_0402_16V4Z Y26 F17
    C36 + C564 C475 C465 VCC1_5[3] VCC1_5[96] VSS[169] VSS[83]
    AA25 VCC1_5[4] VCC1_5[95] U14 2 2 1 2 Y23 VSS[168] VSS[82] E25
    AB25 U12 C574 W7 E19
    0.1U_0402_16V4Z 0.1U_0402_16V4Z VCC1_5[5] VCC1_5[94] C582 VSS[167] VSS[81]
    AB26 VCC1_5[6] VCC1_5[93] U11 W25 VSS[166] VSS[80] E18
    2 1 1 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    AB27 VCC1_5[7] VCC1_5[92] T17 W24 VSS[165] VSS[79] E15
    D 220U_D2_4VM_R12 0.1U_0402_16V4Z F25 T11 C5761 1
    1 2 W23 E14 D
    VCC1_5[8] VCC1_5[91] VSS[164] VSS[78]
    F26 VCC1_5[9] VCC1_5[90] P17 W1 VSS[163] VSS[77] D7
    F27 P11 0.1U_0402_16V4Z C584 V4 D22
    VCC1_5[10] VCC1_5[89] 0.1U_0402_16V4Z VSS[162] VSS[76]
    (220uF x1, 0.1uF x3) G22 M17 V27 D20

    CORE
    VCC1_5[11] VCC1_5[88] VSS[161] VSS[75]
    G23 VCC1_5[12] VCC1_5[87] M11 1 2 V26 VSS[160] VSS[74] D18
    G24 VCC1_5[13] VCC1_5[86] L17 V23 VSS[159] VSS[73] D14
    G25 L16 C499 U25 D13
    +5VS +3VS VCC1_5[14] VCC1_5[85] 0.1U_0402_16V4Z VSS[158] VSS[72]
    H21 VCC1_5[15] VCC1_5[84] L14 U24 VSS[157] VSS[71] D10
    H22 VCC1_5[16] VCC1_5[83] L12 1 2 U23 VSS[156] VSS[70] D1
    J21 VCC1_5[17] VCC1_5[82] L11 U15 VSS[155] VSS[69] C4
    2

    2
    J22 AA21 C542 U13 C22
    R475 D27 VCC1_5[18] VCC1_5[81] 0.1U_0402_16V4Z VSS[154] VSS[68]
    K21 VCC1_5[19] VCC1_5[80] AA20 T7 VSS[153] VSS[67] C20
    K22 VCC1_5[20] VCC1_5[79] AA19 1 2 T27 VSS[152] VSS[66] C18

    PCIE
    100_0402_5% RB751V_SOD323 L21 T26 C14
    VCC1_5[21] C515 VSS[151] VSS[65]
    L22 T23 B25
    1

    VCC1_5[22] 0.1U_0402_16V4Z +3VS 0.1U_0402_16V4Z VSS[150] VSS[64]


    M21 VCC1_5[23] VCC3_3[21] AA10 T16 VSS[149] VSS[63] B24
    ICH_V5REF_RUN 15mils M22 AG19 1 2 T15 B23
    VCC1_5[24] VCC3_3[20] VSS[148] VSS[62]
    2 2 2 N21 VCC1_5[25] VCC3_3[19] AG16 T14 VSS[147] VSS[61] B21
    Intel CRB : 100Ohm N22 AG13 2 2 C530 T13 B19
    C546 C424 VCC1_5[26] VCC3_3[18] 0.1U_0402_16V4Z VSS[146] VSS[60]
    N23 VCC1_5[27] VCC3_3[17] AD17 T12 VSS[145] VSS[59] B15
    1U_0603_10V4Z C558 0.1U_0402_16V4Z N24 AC15 C556 Near PIN 1 2 T1 B13
    1 1 1 VCC1_5[28] VCC3_3[16] VSS[144] VSS[58]
    N25 AA17 R4 AG7

    IDE
    0.1U_0402_16V4Z P21
    VCC1_5[29] VCC3_3[15]
    AA15 C4881 1 AG13, AG16 C549 R25
    VSS[143] VSS[57]
    AG3
    VCC1_5[30] VCC3_3[14] 0.1U_0402_16V4Z VSS[142] VSS[56]
    P25 VCC1_5[31] VCC3_3[13] AA14 R24 VSS[141] VSS[55] AG22
    (1uF x1, 0.1uF x1) P26 VCC1_5[32] VCC3_3[12] AA12
    0.1U_0402_16V4Z
    1 2 R23 VSS[140] VSS[54] AG20
    P27 VCC1_5[33] R17 VSS[139] VSS[53] AG17
    R21 C489 R16 AG14
    VCC1_5[34] 0.1U_0402_16V4Z VSS[138] VSS[52]
    R22 VCC1_5[35] VCC3_3[11] P1 +3VS R15 VSS[137] VSS[51] AG12
    T21 VCC1_5[36] VCC3_3[10] M7 2 2 2 1 2 R14 VSS[136] VSS[50] AG1
    C T22 L7 R13 AF7 C
    VCC1_5[37] VCC3_3[9] C457 C436 VSS[135] VSS[49]
    U21 VCC1_5[38] VCC3_3[8] L4 R12 VSS[134] VSS[48] AF3
    U22 J7 C575 C508 0.1U_0402_16V4Z 0.01U_0402_16V7K R11 AF26
    VCC1_5[39] VCC3_3[7] 1 1 1
    0.1U_0402_16V4Z VSS[133] VSS[47]
    V21 VCC1_5[40] VCC3_3[6] H7 1 2 P22 VSS[132] VSS[46] AF12

    GROUND
    0.1U_0402_16V4Z

    PCI
    V22 VCC1_5[41] VCC3_3[5] H1 P16 VSS[131] VSS[45] AF10
    W21 VCC1_5[42] VCC3_3[4] E4 Near PIN A25 P15 VSS[130] VSS[44] AF1
    W22 VCC1_5[43] VCC3_3[3] B1 Near PIN C514
    P14 VSS[129] VSS[43] AE7
    Y21 A6 P13 AE6
    Y22
    VCC1_5[44] VCC3_3[2] A2-A6, D1-H1 0.01U_0402_16V7K P12
    VSS[128] VSS[42]
    AE25
    VCC1_5[45] VSS[127] VSS[41]
    VCCSUS1_5[3] U7 +1.5VALW 1 2 N7 VSS[126] VSS[40] AE21
    +1.5VS AA6 VCC1_5[46] VCCSUS1_5[2] R7 N17 VSS[125] VSS[39] AE2
    AB4 VCC1_5[47] Near PIN AA19 N16 VSS[124] VSS[38] AE12
    AB5 VCC1_5[48] 2 2 2 N15 VSS[123] VSS[37] AE11

    USB
    2 AB6 G19 C520 C467 C528 N14 AE10
    VCC1_5[49] VCCSUS1_5[1] VSS[122] VSS[36]
    AC4 VCC1_5[50] N13 VSS[121] VSS[35] AD6
    Near PIN AG5 C501 AD4 G20 0.1U_0402_16V4Z 0.1U_0402_16V4Z N12 AD24
    0.1U_0402_16V4Z VCC1_5[51] VCC1_5[78] 1 1
    0.1U_0402_16V4Z 1 VSS[120] VSS[34]
    AE4 VCC1_5[52] VCC1_5[77] F20 N11 VSS[119] VSS[33] AD2
    1
    AE5 VCC1_5[53] VCC1_5[76] E24 N1 VSS[118] VSS[32] AD18

    SATA
    AF5 VCC1_5[54] VCC1_5[75] E23 M4 VSS[117] VSS[31] AD15

    USB CORE
    AG5 VCC1_5[55] VCC1_5[74] E22 M27 VSS[116] VSS[30] AD10
    VCC1_5[73] E21 +3VALW M26 VSS[115] VSS[29] AD1
    +1.5VS AA7 VCC1_5[56] VCC1_5[72] E20 M23 VSS[114] VSS[28] AC6
    AA8 D27 C456 M16 AC3
    VCC1_5[57] VCC1_5[71] 0.1U_0402_16V4Z VSS[113] VSS[27]
    AA9 VCC1_5[58] VCC1_5[70] D26 M15 VSS[112] VSS[26] AC26
    2 AB8 VCC1_5[59] VCC1_5[69] D25 1 2 M14 VSS[111] VSS[25] AC24
    AC8 VCC1_5[60] VCC1_5[68] D24 +1.5VS M13 VSS[110] VSS[24] AC23
    +5VALW +3VALW C500 C464
    Near PIN AG9 0.1U_0402_16V4Z
    AD8 VCC1_5[61] +2.5VS 0.1U_0402_16V4Z
    M12 VSS[109] VSS[23] AC22
    AE8 VCC1_5[62] VCC1_5[67] G8 L25 VSS[108] VSS[22] AC12
    1
    AE9 VCC1_5[63] 1 2 L24 VSS[107] VSS[21] AC10
    2

    B B
    AF9 VCC1_5[64] VCC2_5[4] AB18 L23 VSS[106] VSS[20] AB9
    R446 D25 AG9 PCI/IDE RBP P7 C468 L15 AB7
    VCC1_5[65] VCC2_5[2] 0.1U_0402_16V4Z VSS[105] VSS[19]
    L13 VSS[104] VSS[18] AB2
    10_0402_5% RB751V_SOD323 ICH6_VCCPLL AC27 AA18 ICH_V5REF_RUN 2 1 2 K7 AB19
    VCCDMIPLL V5REF[2] C566 VSS[103] VSS[17]
    +3VS E26 A8 K27 AB10
    1

    ICH_V5REF_SUS VCC3_3[1] V5REF[1] C450 VSS[102] VSS[16]


    15mils ICH_V5REF_SUS 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    K26 VSS[101] VSS[15] AB1
    2 2 +1.5VS AE1 VCCSATAPLL V5REF_SUS F21 K23 VSS[100] VSS[14] AA4
    C481 1
    2 +3VS AG10 VCC3_3[22] 1 2 K1 VSS[99] VSS[13] AA16
    C458 Near PIN A25 +1.5VS J4 AA13
    1U_0603_10V4Z 0.1U_0402_16V4Z VCCUSBPLL VSS[98] VSS[12]
    1 1 C451 E26, E27
    A13 VCCLAN3_3/VCCSUS3_3[1] VCCSUS3_3[20] A24 +3VALW Near PIN A24 J25 VSS[97] VSS[11] AA11
    +3VS F14 VCCLAN3_3/VCCSUS3_3[2] J24 VSS[96] VSS[10] A9
    0.1U_0402_16V4Z 1 G13 AB3 +RTCVCC J23 A7
    VCCLAN3_3/VCCSUS3_3[3] VCCRTC VSS[95] VSS[9]
    (1uF x1, 0.1uF x1) G14 VCCLAN3_3/VCCSUS3_3[4] Near PIN AB18 H27 VSS[94] VSS[8] A4
    VCCLAN1_5/VCCSUS1_5[2] G11 H26 VSS[93] VSS[7] A26
    +3VALW A11 VCCSUS3_3[1] VCCLAN1_5/VCCSUS1_5[1] G10 +1.5VS H23 VSS[92] VSS[6] A23
    U4 VCCSUS3_3[2] G9 VSS[91] VSS[5] A21
    V1 VCCSUS3_3[3] V_CPU_IO[3] AG23 G7 VSS[90] VSS[4] A19
    +3VS
    V7 VCCSUS3_3[4] V_CPU_IO[2] AD26 +1.05VS G21 VSS[89] VSS[3] A15
    W2 AB22 C449 G12 A12
    VCCSUS3_3[5] V_CPU_IO[1] 0.1U_0402_16V4Z VSS[88] VSS[2]
    Y7 VCCSUS3_3[6] G1 VSS[87] VSS[1] A1
    VCCSUS3_3[19] G16 2 1 2
    A17 G15 C571 Near PIN AG23
    +3VALW VCCSUS3_3[7] VCCSUS3_3[18]
    B17 F16 ICH6_BGA609
    VCCSUS3_3[8] VCCSUS3_3[17] 0.1U_0402_16V4Z
    2 2 C17 VCCSUS3_3[9] VCCSUS3_3[16] F15
    L12 R123 C429 C459 1 C502
    F18 VCCSUS3_3[10] VCCSUS3_3[15] E16
    CHB1608U301_0603 0.5_0603_1% G17 D16 0.1U_0402_16V4Z
    VCCSUS3_3[11] VCCSUS3_3[14]
    +1.5VS 1 2 ICH6_VCCDMIPLL1 2 ICH6_VCCPLL G18 VCCSUS3_3[12] VCCSUS3_3[13] C16 1 2
    1
    0.1U_0402_16V4Z 1
    15mils 15mils 0.1U_0402_16V4Z
    A Change to 0 ohm A
    (10uF x1, 0.01uF x1) 2 1 ICH6_BGA609 Near PIN AG10

    C565
    Near PIN A17
    0.1U_0402_16V4Z 1 C572 2
    0.01U_0402_16V7K
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    Near PIN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    AC27 B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 20 of 50
    5 4 3 2 1
    A B C D E F G H

    +3VS

    1 IDE_DD[0..15] C692 1
    18 IDE_DD[0..15]
    1 2 0.1U_0402_16V4Z
    IDE_DA[0..2]
    18 IDE_DA[0..2]

    5
    U49
    Placea caps. near ODD CONN. IDE_HRESET# 1

    P
    +5VS 19 IDE_HRESET# B
    4 IDE_RST#
    PLT_RST# Y
    6,17,19,30,32 PLT_RST# 2 A

    G
    0.1U_0402_16V4Z 10U_1206_16V4Z
    TC7SH08FU_SSOP5

    3
    1 1 1 1 1
    C356 C355

    C357 C344 C347


    2 2 2 2 2

    1000P_0402_50V7K 1U_0603_10V4Z 10U_1206_16V4Z

    ODD Conn. PATA/SATA HDD Conn.


    2 2

    CDROM_L
    *** JP48
    CDROM_R 18 SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_N0 2 1 SATA_DTX_IRX_N0
    36 INT_CD_L 1 2 INT_CD_R 36
    CD_AGND C694 @ 0.01U_0402_16V7K
    36 CD_AGND 3 4
    IDE_RST# IDE_DD8 18 SATA_DTX_C_IRX_P0 SATA_DTX_C_IRX_P0 2 1 SATA_DTX_IRX_P0
    IDE_DD7 5 6 IDE_DD9 C693 @ 0.01U_0402_16V7K
    IDE_DD6 7 8 IDE_DD10
    IDE_DD5 9 10 IDE_DD11
    IDE_DD4 11 12 IDE_DD12
    IDE_DD3 13 14 IDE_DD13
    IDE_DD2 15 16 IDE_DD14 +5VS
    IDE_DD1 17 18 IDE_DD15 +3VS +5VS
    IDE_DD0 19 20 IDE_DDREQ 0.1U_0402_16V4Z 10U_1206_16V4Z
    21 22 IDE_DDREQ 18
    IDE_DIOR#
    23 24 IDE_DIOR# 18
    IDE_DIOW# 1 1 1 1 1 1 1
    18 IDE_DIOW# 25 26
    IDE _DIORDY IDE_DDACK# C690 C687 C691 C688
    18 IDE_DIORDY 27 28 IDE_DDACK# 18
    IDE_IRQ
    18 IDE_IRQ 29 30
    IDE_DA1 IDE_PDIAG# 1 2 R568 +5VS C689 C684 C686
    IDE_DA0 31 32 IDE_DA2 100K_0402_5% 2 2 2 2 2 2 2
    @ 0.1U_0402_16V4Z
    IDE_DCS1# 33 34 IDE_DCS3# @ 0.1U_0402_16V4Z
    18 IDE_DCS1# 35 36 IDE_DCS3# 18
    IDE_LED# 1000P_0402_50V7K 1U_0603_10V4Z 10U_1206_16V4Z
    32 IDE_LED# 37 38
    +5VS 39 40 +5VS
    41 42
    43 44
    IDE_CSEL 45 46 JP50
    +5VS 1 2 47 48
    R566 @ 475_0402_1%
    49 50
    1 2 1 GND
    3 R567 @ 475_0402_1% SUYIN_800031MR050S122ZL JP52 SATA_ITX_C_DRX_P0 3
    18 SATA_ITX_C_DRX_P0 2 HTX+
    IDE_RST# 44 43 SATA_ITX_C_DRX_N0 3
    IDE_DD7 44 43 IDE_DD8 18 SATA_ITX_C_DRX_N0 HTX-
    42 42 41 41 4 GND
    IDE_CSEL IDE_DD6 40 39 IDE_DD9 SATA_DTX_IRX_N0 5
    IDE_DD5 40 39 IDE_DD10 SATA_DTX_IRX_P0 HRX-
    38 38 37 37 6 HRX+
    Grounding for Master (When use SATA HDD) IDE_DD4 36 35 IDE_DD11 7
    IDE_DD3 36 35 IDE_DD12 GND
    Open or High for Slaver (Normal) 34 34 33 33
    +5VS 2 1 IDE_LED# IDE_DD2 32 31 IDE_DD13
    R569 100K_0402_5% IDE_DD1 32 31 IDE_DD14
    30 30 29 29
    IDE_DD0 28 27 IDE_DD15 8
    28 27 +3VS VCC3.3
    26 26 25 25 9 VCC3.3
    IDE_DDREQ 24 23 10
    IDE_DIOW# 24 23 VCC3.3
    22 22 21 21 11 GND
    IDE_DIOR# 20 19 12
    IDE _DIORDY 20 19 PCSEL 1 GND
    18 18 17 17 2 13 GND
    IDE_DDACK# 16 15 R565 475_0402_1% 14
    16 15 +5VS VCC5
    IDE_IRQ 14 13 15
    IDE_DA1 14 13 IDE_PDIAG# VCC5
    12 12 11 11 16 VCC5
    IDE_DA0 10 9 IDE_DA2 17
    IDE_DCS1# 10 9 IDE_DCS3# GND
    8 8 7 7 1 2 18 RESERVED
    Remove the JP47 and C362,C366,C675,C678,C681 IDE_LED# 6 5 R564 @ 0_0402_5% 19
    6 5 GND
    +5VS 4 4 3 3 +5VS 20 VCC12
    2 2 1 1 21 VCC12
    22 VCC12
    OCTEK_HDD-22SC1G_REVERS

    @ OCTEK_SAT-22SD1G

    om
    4 4

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 21 of 50
    A B C D E F G H
    A B C D E

    +S1_VCC +3VS
    VPPD0
    23 VPPD0
    VPPD1
    23 VPPD1
    VCCD0#
    +3VS 23 VCCD0#
    40mil VCCD1#
    23 VCCD1#

    M13

    M12

    G13
    N13

    N12

    D12
    H11
    S1_A[0..25]

    G1
    C8

    N4
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

    A7

    B4

    K2

    F3
    L9
    L6
    S1_A[0..25] 23
    U25
    1 1 1 1 1 1 1 S1_D[0..15]

    VCCD1#
    VCCD0#

    VPPD1
    VPPD0

    VCCA2
    VCCA1

    VCC10
    VCC9
    VCC8
    VCC7
    VCC6
    VCC5
    VCC4
    VCC3
    VCC2
    VCC1
    S1_D[0..15] 23
    C321 C330 C334 C336 C319 C352 C351

    0.1U_0402_16V4Z
    2 2 2 2 2 2 2
    1 PCI_AD31 C2 B2 S1_D10 1
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z PCI_AD30 AD31 CAD31/D10 S1_D9
    C1 AD30 CAD30/D9 C3
    PCI_AD29 D4 B3 S1_D1
    PCI_AD28 AD29 CAD29/D1 S1_D8
    D2 AD28 CAD28/D8 A3
    PCI_AD27 D1 C4 S1_D0 +3VS
    PCI_AD26 AD27 CAD27/D0 S1_A0
    E4 AD26 CAD26/A0 A6
    PCI_AD25 E3 D7 S1_A1
    PCI_AD24 AD25 CAD25/A1 S1_A2
    E2 AD24 CAD24/A2 C7 1 1
    PCI_AD23 F2 A8 S1_A3
    PCI_AD[0..31] PCI_AD22 AD23 CAD23/A3 S1_A4 C341 C340
    17,25,26,28,29 PCI_AD[0..31] F1 AD22 CAD22/A4 D8
    PCI_AD21 G2 A9 S1_A5 4.7U_0805_10V4Z
    PCI_CBE#[0..3] PCI_AD20 AD21 CAD21/A5 S1_A6 2 2
    17,25,26,28,29 PCI_CBE#[0..3] G3 AD20 CAD20/A6 C9
    PCI_AD19 H3 A10 S1_A25 0.1U_0402_16V4Z
    PCI_AD18 AD19 CAD19/A25 S1_A7
    H4 AD18 CAD18/A7 B10
    PCI_AD17 J1 D10 S1_A24
    PCI_AD16 AD17 CAD17/A24 S1_A17
    J2 AD16 CAD16/A17 E12
    PCI_AD15 N2 F10 S1_IOWR#
    AD15 CAD15/IOWR# S1_IOWR# 23
    CLK_PCI_PCM CLK_SD_48M PCI_AD14 M3 E13 S1_A9
    PCI_AD13 AD14 CAD14/A9 S1_IORD# +S1_VCC
    N3 AD13 CAD13/IORD# F13 S1_IORD# 23

    1
    PCI_AD12 K4 F11 S1_A11
    R306 R558 PCI_AD11 AD12 CAD12/A11 S1_OE# 0.1U_0402_16V4Z
    M4 AD11 CAD11/OE# G10 S1_OE# 23
    @ 10_0402_5% @ 10_0402_5% PCI_AD10 K5 G11 S1_CE2# 1 1
    +3VS AD10 CAD10/CE2# S1_CE2# 23
    PCI_AD9 L5 G12 S1_A10
    PCI_AD8 AD9 CAD9/A10 S1_D15 C320 C331
    M5 H12

    2
    SM_CD# PCI_AD7 AD8 CAD8/D15 S1_D7 0.1U_0402_16V4Z
    1 2 1 1 K6 AD7 CAD7/D7 H10
    R276 43K_0402_5% C350 C680 PCI_AD6 S1_D13 2 2
    M6 AD6 CAD6/D13 J11
    PCI_AD5 N6 J12 S1_D6
    @ 15P_0402_50V8J @ 15P_0402_50V8J PCI_AD4 AD5 CAD5/D6 S1_D12
    M7 AD4 CAD4/D12 K13
    2 2 PCI_AD3 S1_D5
    N7 J10

    PCI Interface
    PCI_AD2 AD3 CAD3/D5 S1_D11
    L7 AD2 CAD2/D11 K10

    CARDBUS
    2 PCI_AD1 K7 K12 S1_D4 2
    PCI_AD0 AD1 CAD1/D4 S1_D3
    N8 AD0 CAD0/D3 L13
    +VCC_SD PCI_CBE#3 E1 B7 S1_REG#
    CBE3# CCBE3#/REG# S1_REG# 23
    PCI_CBE#2 J3 A11 S1_A12
    PCI_CBE#1 CBE2# CCBE2#/A12 S1_A8
    N1 CBE1# CCBE1#/A8 E11
    1

    PCI_CBE#0 N5 H13 S1_CE1#


    CBE0# CCBE0#/CE1# S1_CE1# 23
    R550
    @ 0_0805_5% PCI_RST# G4 B9 S1_RST
    17,24,25,26,28,29 PCI_RST# PCIRST# CRST#/RESET S1_RST 23
    17,25,26,28,29 PCI_FRAME# J4 B11 S1_A23
    FRAME# CFRAME#/A23 S1_A15
    17,25,26,28,29 PCI_IRDY# K1 A12
    2

    SD_PULLHIGH IRDY# CIRDY#/A15 S1_A22


    1 2 17,25,26,28,29 PCI_TRDY# K3 TRDY# CTRDY#/A22 A13
    R552 @ 0_0805_5% L1 B13 S1_A21
    17,25,26,28,29 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
    L2 C12 S1_A20
    17,25,26,28,29 PCI_STOP# STOP# CSTOP#/A20
    L3 C13 S1_A14
    17,25,26,28,29 PCI_PERR# PERR# CPERR#/A14
    1 2 SDCM_XDALE M1 A5 S1_WAIT# PCM_SPK# 1 2 +3VS
    17,25,26,28,29 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 23
    R555 @ 43K_0402_5% 17,25,26,28,29 PCI_PAR M2 D13 S1_A13 R287 @ 10K_0402_5%
    SDDA0_XDD7 PCI_REQ#2 PAR CPAR/A13 S1_INPACK#
    1 2 17 PCI_REQ#2 A1 PCIREQ# CREQ#/INPACK# B8 S1_INPACK# 23
    R556 @ 43K_0402_5% B1 C11 S1_WE#
    17 PCI_GNT#2 PCIGNT# CGNT#/WE# S1_WE# 23
    1 2 SDDA1_XDD0 CLK_PCI_PCM H1 B12 1 2 S1_A16
    13 CLK_PCI_PCM PCICLK CCLK/A16
    R563 @ 43K_0402_5% R277 33_0402_5%
    1 2 SDDA2_XDCL L8 C5 S1_BVD1
    25,26,28,32 PCM_PME# RIOUT#_PME# CSTSCHG/BVD1_STSCHG# S1_BVD1 23
    R553 @ 43K_0402_5% +3VS 1 2 L11 D5 S1_WP
    SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP 23
    1 2 SDDA3_XDD4 R253 10K_0402_5%
    R554 @ 43K_0402_5% PCI_AD20 1 2 F4 D11 S1_A19
    R308 100_0402_5% IDSEL CBLOCK#/A19
    K8 D6 S1_RDY# S1_CD2# S1_CD1#
    +3VS 17,29 PCI_PIRQA# MFUNC0 CINT#/READY_IREQ# S1_RDY# 23
    R282 1 2 SD_PULLHIGH N9 2 2
    23 MS_PWREN# MFUNC1
    0_0402_5% K9 M9 PCM_SPK# C337 C312
    17 PCI_PIRQB# MFUNC2 SPKROUT PCM_SPK# 36
    1 2 SD_CD# N10 B5 S1_BVD2
    19,30,32 SERIRQ MFUNC3 CAUDIO/BVD2_SPKR# S1_BVD2 23
    R260 @ 43K_0402_5% SM_CD# L10 10P_0402_50V8J 10P_0402_50V8J
    3 MFUNC4 1 1 3
    1 2 SD_WP# 5IN1_LED# N11 A4 S1_CD2#
    32 5IN1_LED# MFUNC5 CCD2#/CD2# S1_CD2# 23
    R264 @ 43K_0402_5% M11 L12 S1_CD1#
    MFUNC6 CCD1#/CD1# S1_CD1# 23
    SDOC# J9 D9 S1_VS2
    23 SDOC# MFUNC7 CVS2/VS2# S1_VS2 23
    internal pull-up C6 S1_VS1
    CVS1/VS1 S1_VS1 23
    A2 S1_D2
    PCI_RST# CRSV3/D2 S1_A18
    M10 GRST# CRSV2/A18 E10
    MFUNC5[3:0] = (0 1 0 1) J13 S1_D14
    CRSV1/D14
    internal pull-down MFUNC5[4] = 1
    +VCC_SD E7
    SD/MMC/MS/SM H7
    VCC_SD MSINS# MS_INS# 23
    1 2 MSD0_XDD2 MSPWREN#/SMPWREN# J8 XD_PWREN#
    XD_PWREN# 23
    R275 @ 43K_0402_5% SD_CD# E8 H8 MSBS_XDD1
    23 SD_CD# SDCD# MSBS/SMDATA1 MSBS_XDD1 23
    1 2 MSD1_XDD6 23 SD_WP#
    SD_WP# F8 SDWP/SMWPD# MSCLK/SMRE# E9 R257 1 2 33_0402_5% MSCLK_XDRE# 23
    R286 @ 43K_0402_5% SD_PWREN# G7 G9 MSD0_XDD2
    23 SD_PWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 23
    1 2 MSD2_XDD5 MSDATA1/SMDATA6 H9 MSD1_XDD6
    MSD1_XDD6 23
    R269 @ 43K_0402_5% CLK_SD_48M H5 G8 MSD2_XDD5
    13 CLK_SD_48M SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 23
    1 2 MSD3_XDD3 MSDATA3/SMDATA3 F9 MSD3_XDD3
    MSD3_XDD3 23
    R263 @ 43K_0402_5% R309 1 2 33_0402_5% F6
    23 SDCK_XDWE# SDCLK/SMWE#
    1 2 MSBS_XDD1 23 SDCM_XDALE
    SDCM_XDALE E5
    SDCMD/SMALE
    R290 @ 43K_0402_5% SDDA0_XDD7 E6 H6
    23 SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# XD_BSY# 23
    SDDA1_XDD0 F7 J7 XD_CD#
    23 SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XD_CD# 23
    SDDA2_XDCL F5 J6 XD_WP#
    23 SDDA2_XDCL SDDAT2/SMCLE SMWP# XD_WP# 23
    SDDA3_XDD4 G6 J5
    23 SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XD_CE# 23

    2
    GND1
    GND2
    GND3
    GND4
    GND5
    GND6
    GND7
    GND8
    G5 GND_SD R310
    2.2K_0402_5%
    CB714_LFBGA169
    D3
    H2
    L4
    M8
    K11
    F12
    C10
    B6

    1
    4 4

    **CB714 use B0 version

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number R ev
    Custom A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 22 of 50
    A B C D E
    A B C D E

    PCMCIA Power Control PCMCIA Socket


    +S1_VCC S1_A[0..25]
    22 S1_A[0..25]
    S1_D[0..15]
    +S1_VCC 22 S1_D[0..15]
    1 1
    C324 C327 JP51
    40mil 10U_0805_10V4Z 0.1U_0402_16V4Z
    1 1 1 GND GND 35 1
    C659 2 2 S1_D3 S1_CD1#
    2 D3 CD1# 36 S1_CD1# 22
    U46 4.7U_0805_10V4Z S1_D4 3 37 S1_D11
    S1_D5 D4 D11 S1_D12
    VCC 13 4 D5 D12 38
    2 S1_D6 S1_D13
    VCC 12 5 D6 D13 39
    9 11 S1_D7 6 40 S1_D14
    12V VCC +S1_VPP S1_CE1# D7 D14 S1_D15
    22 S1_CE1# 7 CE1# D15 41
    40mil S1_A10 8 42 S1_CE2#
    +5VS +S1_VPP A10 CE2# S1_CE2# 22
    S1_OE# 9 43 S1_VS1
    22 S1_OE# OE# VS1# S1_VS1 22
    W=40mil 1 S1_A11 10 44 S1_IORD#
    A11 IORD# S1_IORD# 22
    10 S1_A9 11 45 S1_IOWR#
    VPP A9 IOWR# S1_IOWR# 22
    1 1 C662 1 1 S1_A8 12 46 S1_A17
    C664 0.1U_0402_16V4Z C323 C325 S1_A13 A8 A17 S1_A18
    5 5V 13 A13 A18 47
    C663 2 S1_A14 S1_A19
    6 5V 14 A14 A19 48
    10U_0805_10V4Z 0.1U_0402_16V4Z S1_WE# 15 49 S1_A20
    2 2 2 2 22 S1_WE# WE# A20
    0.1U_0402_16V4Z 1 VCCD0# 10U_0805_10V4Z S1_RDY# 16 50 S1_A21
    VCCD0 VCCD0# 22 22 S1_RDY# IREQ# A21
    2 VCCD1# +S1_VCC 17 51 +S1_VCC
    +3VS VCCD1 VCCD1# 22 VCC VCC
    15 VPPD0 +S1_VPP 18 52 +S1_VPP
    VPPD0 VPPD0 22 VPP1 VPP2
    14 VPPD1 S1_A16 19 53 S1_A22
    VPPD1 VPPD1 22 A16 A22
    W=40mil S1_A15 20 54 S1_A23
    S1_A12 A15 A23 S1_A24
    3 3.3V 21 A12 A24 55
    1 1 4 8 S1_A7 22 56 S1_A25
    3.3V OC A7 A25
    SHDN
    C657 C660 S1_A6 23 57 S1_VS2
    GND

    A6 VS2# S1_VS2 22
    S1_A5 24 58 S1_RST
    A5 RESET S1_RST 22
    10U_0805_10V4Z S1_A4 25 59 S1_WAIT#
    A4 WAIT# S1_WAIT# 22
    1

    2 2
    0.1U_0402_16V4Z CP-2211_SSOP16 S1_OE# S1_A3 S1_INPACK#
    1 2 +S1_VCC 26 60 S1_INPACK# 22
    7

    16

    R543 R298 43K_0402_5% S1_A2 A3 INPACK# S1_REG#


    27 A2 REG# 61 S1_REG# 22
    10K_0402_5% S1_A23 2 1 S1_A1 28 62 S1_BVD2
    +S1_VCC A1 SPKR# S1_BVD2 22
    R256 43K_0402_5% S1_A0 29 63 S1_BVD1
    A0 STSCHG# S1_BVD1 22
    2
    **ENE CP-2211 use D3 version S1_WP 2 1 +S1_VCC S1_D0 30 64 S1_D8 2
    2

    R234 43K_0402_5% S1_D1 D0 D8 S1_D9


    31 D1 D9 65
    S1_RST 1 2 +S1_VCC S1_D2 32 66 S1_D10
    R249 43K_0402_5% S1_WP D2 D10 S1_CD2#
    22 S1_WP 33 IOIS16# CD2# 67 S1_CD2# 22
    S1_CE1# 1 2 +S1_VCC 34 68
    R303 43K_0402_5% GND GND
    VCCD0# 1 2 S1_CE2# 1 2 +S1_VCC
    R538 10K_0402_5% R300 43K_0402_5% SLINK_AC4-3000-500-3_RB
    VCCD1# 1 2
    R542 10K_0402_5%

    XD Power Control +VCC_XD +VCC_SD

    +3VS
    1 1 1 1 1
    +3VS C697 C695 C666 C677 C672
    40mil
    xD PU and PD. Close to Socket
    2

    +3VS +VCC_XD 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z


    2

    R544 +3VS 2
    10U_0805_10V4Z 2 2 2
    0.1U_0402_16V4Z 2
    R545 U48
    10K_0402_5% 1 8 10K_0402_5% 2 1 XD_CD#
    3
    2
    GND OUT
    7 R557 @ 43K_0402_5% 4 IN 1 Socket 3
    1

    IN OUT
    3 6
    1

    XD_PWREN# IN OUT SDOC# +VCC_XD


    22 XD_PWREN# 4 EN# FLG 5 SDOC# 22
    JP46
    1

    G528_SO8
    R537 1 2 MSCLK_XDRE# +VCC_XD 34 14 +VCC_SD
    SD_PWREN# 1 300_0603_5% R560 10K_0402_5% XD-VCC SD-VCC
    2 4 IN 1 CONN MS-VCC 3
    R572 1 2 SDCK_XDWE#
    0_0402_5% R562 10K_0402_5% SD / MMC / MS(PRO) / XD
    1 2

    1 2 XD_CE# SDDA1_XDD0 26 15 SDCK_XDWE#


    D 22 SDDA1_XDD0 XD-D0 SD-CLK
    R561 2.2K_0402_5% MSBS_XDD1 27 16 SDDA0_XDD7
    22 MSBS_XDD1 XD-D1 SD-DAT0
    XD_PWREN# 2 Q36 2 1 XD_BSY# MSD0_XDD2 28 17 SDDA1_XDD0
    22 MSD0_XDD2 XD-D2 SD-DAT1
    G 2N7002_SOT23 R559 10K_0402_5% MSD3_XDD3 29 11 SDDA2_XDCL
    22 MSD3_XDD3 XD-D3 SD-DAT2
    S SDDA3_XDD4 30 12 SDDA3_XDD4
    22 SDDA3_XDD4
    3

    MSD2_XDD5 XD-D4 SD-DAT3 SDCM_XDALE


    22 MSD2_XDD5 31 XD-D5 SD-CMD 13
    MSD1_XDD6 32 2 SD_CD#
    22 MSD1_XDD6 XD-D6 SD-CD-SW SD_CD# 22
    SDDA0_XDD7 33 35 SD_WP#
    22 SDDA0_XDD7 XD-D7 SD-WP-SW SD_WP# 22

    SD/MS Power Control Reserve for SD,MS CLK. SDCK_XDWE# 24 4 MSCLK_XDRE#


    22 SDCK_XDWE# XD-WE MS-SCLK
    XD_WP# 25 8 MSD0_XDD2
    Close to Socket 22 XD_WP# XD-WP MS-DATA0
    SDCM_XDALE 23 9 MSD1_XDD6
    22 SDCM_XDALE XD-ALE MS-DATA1
    XD_CD# 18 7 MSD2_XDD5
    +3VS 22 XD_CD# XD-CD MS-DATA2
    SDCK_XDWE# 1 2 XD_BSY# 19 5 MSD3_XDD3
    +VCC_SD +VCC_XD 22 XD_BSY# XD-R/B MS-DATA3
    C679 10P_0402_50V8J MSCLK_XDRE# 20 6 MS_INS#
    +3VS 22 MSCLK_XDRE# XD-RE MS-INS MS_INS# 22
    40mil XD_CE# 21 10 MSBS_XDD1
    22 XD_CE# XD-CE MS-BS
    2

    MSCLK_XDRE#1 2 SDDA2_XDCL 22
    22 SDDA2_XDCL XD-CLE

    om
    R548 U47 C673 10P_0402_50V8J 1
    @ 10K_0402_5% 4IN1-GND
    4 1 GND OUT 8 1 2 4IN1-GND 36 4
    2 7 R573 0_0805_5%

    l.c
    IN OUT TAITW_R007-520-L3
    3 6
    1

    IN OUT

    ai
    SD_PWREN# 4 5 SDOC#
    22 SD_PWREN# EN# FLG

    tm
    @ G528_SO8
    22 MS_PWREN#

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 23 of 50
    A B C D E
    A B C D E

    New Card Power Switch


    New Card Socket (Left)
    U36
    +3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1
    60mils JP28
    +3VS 5 3.3Vin1 3.3Vout1 7 +3VS_CARD1 Imax = 0.275A Imax = 1.35A Imax = 0.75A
    6 3.3Vin2 3.3Vout2 8
    1 GND
    1 1 1 1 1 1 1 19 USB20_N7 2 USB_D- 1
    40mil C478 C472 C495 C486 C460 C438 3
    19 USB20_P7 USB_D+
    +3VALW 21 20 +3VALW_CARD1 CP_USB1# 4
    3.3Vaux_in Aux_out 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z CPUSB#
    5 RSV
    2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 2 2
    0.1U_0402_16V4Z 0_0402_5%
    40mil R404 1
    6 RSV
    +1.5VS 18 1.5Vin1 1.5Vout1 16 +1.5VS_CARD1 13,19 CK_SCLK 2 NEWCARD_SCLK 7 SMB_CLK
    19 17 R409 1 2 NEWCARD_SDATA 8
    1.5Vin2 1.5Vout2 13,19 CK_SDATA SMB_DATA
    +1.5VS_CARD1 0_0402_5% 9 +1.5V
    10 +1.5V
    +3VALW R33 2 1 100K_0402_5% CP_USB1# 14 19 ICH_PCIE_WAKE# 11
    R32 1 CPUSB# WAKE#
    2 100K_0402_5% CP_PE1# 15 CPPE# OC# 23 +3VALW_CARD1 12 +3.3VAUX
    SUSP# 4 PERST1# 13
    15,32,33,40 SUSP# STBY# PERST#
    SYSON 3 22 RCLKEN1 +3VS_CARD1 14
    32,40,46 SYSON SHDN# RCLKEN +3.3V
    PCI_RST# 2 9 PERST1# +3VS +3VS 15
    17,22,25,26,28,29 PCI_RST# SYSRST# PERST# +3.3V
    R448 CLKREQ1# 16
    EXP_CPPE# CLKREQ#
    1 2 0_0402_5% CP_PE1# 17

    GND

    NC1
    NC2
    NC3
    NC4
    NC5
    19 EXP_CPPE# CPPE#

    1
    +3VS 1 18
    13 CLK_PCIE_CARD1# REFCLK-
    R31 19
    13 CLK_PCIE_CARD1 REFCLK+
    TPS2231PWPR_PWP24 10K_0402_5% C30 20

    11

    1
    10
    12
    13
    24
    GND

    1
    0.1U_0402_16V4Z 21
    2 19 PCIE_PTX_C_IRX_N2 PERn0
    R30 22
    19 PCIE_PTX_C_IRX_P2

    2
    PERp0

    5
    10K_0402_5% U2 23
    CLKREQ1# GND
    2 24

    P
    I0 19 PCIE_ITX_C_PRX_N2 PETn0
    4 PCIEC_CLKREQ1# 13 19 PCIE_ITX_C_PRX_P2 25

    2
    O PETp0
    1 I1 26 GND

    G
    1
    D TC7SH32FU_SSOP5 27

    3
    RCLKEN1 2 Q5 GND
    28 GND
    G 2N7002_SOT23
    2 +3VS +3VALW +1.5VS S TYCO_1759056-1 2

    3
    1 2
    1 1 1 R29 @ 0_0402_5%
    C418 C432 C431

    10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z


    2 2 2

    3 3

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 24 of 50
    A B C D E
    A B C D E

    +3VS

    1 1 1 1
    C284 C305 C306 C281

    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


    2 2 2 2 +3VS

    1 2
    R233 4.7K_0402_5%
    1 +3VS 1 2 1
    R239 10K_0402_5%
    +3VS 1 2
    1 1 1 1 R228 4.7K_0402_5%
    C309 C308 C304 C285 1 2
    R240 4.7K_0402_5%
    1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 2 1
    2 2 2 2 R241 4.7K_0402_5%

    U21

    20
    35
    48
    62
    78

    87

    86
    96
    10
    11
    VDDP
    VDDP
    VDDP
    VDDP
    VDDP

    CYCLEOUT/CARDBUS
    CNA
    TEST17
    TEST16
    CYCLEIN
    DVDD 15 +3VS
    PCI_AD0 84 27
    PCI_AD1 PCI_AD0 DVDD
    82 PCI_AD1 DVDD 39
    PCI_AD2 81 51
    PCI_AD3 PCI_AD2 DVDD
    80 PCI_AD3 DVDD 59
    PCI_AD4 79 72
    PCI_AD5 PCI_AD4 DVDD
    PCI_AD6
    77 PCI_AD5 DVDD 88 20mils
    76 PCI_AD6 DVDD 100
    PCI_AD7 74 7 +1394_PLLVDD 0.01U_0402_16V7K 1 2 R254 +3VS
    PCI_AD8 PCI_AD7 PLLVDD 0_0805_5%
    71 1
    17,22,26,28,29 PCI_AD[0..31]
    PCI_AD[0..31] PCI_AD9
    PCI_AD10
    70
    69
    PCI_AD8
    PCI_AD9
    TSB43AB21 AVDD
    AVDD 2
    107
    +3VS 1
    C264
    1
    C658

    PCI_AD11
    PCI_AD12
    67
    66
    PCI_AD10
    PCI_AD11
    /(TSB43AB22) AVDD
    AVDD 108
    120
    2 2
    4.7U_0805_10V4Z

    PCI_AD13 PCI_AD12 AVDD


    65 PCI_AD13
    PCI_AD14 63 PCI_AD14
    PCI BUS INTERFACE
    PCI_AD15 61 106 R535 1 2 1K_0402_5%
    2 PCI_AD16 PCI_AD15 CPS 2
    PCI_AD17
    46 PCI_AD16 15mils
    45 PCI_AD17
    PCI_AD18 43 125
    PCI_AD19 PCI_AD18 NC/(TPBIAS1)
    42 PCI_AD19 NC/(TPA1+) 124
    PCI_AD20 41 123
    PCI_AD21 PCI_AD20 NC/(TPA1-)
    40 PCI_AD21 NC/(TPB1+) 122
    PCI_AD22 38 121
    PCI_AD23 PCI_AD22 NC/(TPB1-)
    PCI_AD24
    37 PCI_AD23 10mils
    32 PCI_AD24 BIAS CURRENT R0 118 1 2
    PCI_AD25 31 R536
    PCI_AD26 PCI_AD25 6.34K_0402_1%
    IDSEL:PCI_AD16 29 PCI_AD26
    PCI_AD27 28
    PCI_AD28 PCI_AD27
    26 PCI_AD28
    PCI_AD16 1 2 1394_IDSEL PCI_AD29 25 119
    R250 100_0402_5% PCI_AD30 PCI_AD29 R1 C263 1 22P_0402_50V8J
    24 PCI_AD30 2
    PCI_AD31 22 6
    PCI_AD31 OSCILLATOR X0

    2
    17,22,26,28,29 PCI_CBE#3 34 PCI_C/BE3
    47 X2
    17,22,26,28,29 PCI_CBE#2 PCI_C/BE2
    60 24.576MHz_16P_3XG-24576-43E1
    17,22,26,28,29 PCI_CBE#1 PCI_C/BE1
    17,22,26,28,29 PCI_CBE#0 73 5

    1
    CLK_PCI_1394 PCI_C/BE0 X1 C255 1 22P_0402_50V8J
    13 CLK_PCI_1394 16 PCI_CLK 2
    PCI_GNT#0 18
    17 PCI_GNT#0 PCI_GNT
    PCI_REQ#0 19 3 C248 1 2
    17 PCI_REQ#0
    1394_IDSEL PCI_REQ FILTER FILTER0
    36 PCI_IDSEL
    PCI_FRAME# 49 4 0.1U_0402_16V4Z
    17,22,26,28,29 PCI_FRAME# PCI_FRAME FILTER1
    P CI_IRDY# 50 15mils
    17,22,26,28,29 PCI_IRDY# PCI_IRDY
    PCI_TRDY# 52 92 1394_SDA
    17,22,26,28,29 PCI_TRDY#
    PCI_DEVSEL# PCI_TRDY EEPROM 2 WIRE BUS SDA
    17,22,26,28,29 PCI_DEVSEL# 53 PCI_DEVSEL
    PCI_STOP# 54 91 1394_SCL 1
    17,22,26,28,29 PCI_STOP# PCI_STOP SCL

    1
    3 PCI_PERR# 3
    17,22,26,28,29 PCI_PERR# 56 PCI_PERR
    PCI_PIRQE# 13 POWER CLASS 99 R222 R223 C238
    17 PCI_PIRQE# PCI_INTA/CINT PC0
    1394_PME# 21 98 56.2_0402_1% 0.33U_0603_16V4Z
    22,26,28,32 1394_PME# PCI_PME/CSTSCHG PC1
    PCI_SERR# 57 97 56.2_0402_1%2
    17,22,26,28,29 PCI_SERR# PCI_SERR PC2
    PCI_PAR 58
    17,22,26,28,29 PCI_PAR

    2
    PCI_PAR TPBIAS0 JP35
    19,26,28,29,30 PM_CLKRUN# 12 PCI_CLKRUN PHY PORT 1 TPBIAS0 116
    85 115 TPA0+ 4
    17,22,24,26,28,29 PCI_RST# PCI_RST TPA0+ 4
    114 TPA0- 3 6
    TPA0- TPB0+ 3 6
    TPB0 + 113 2 2 5 5
    112 TPB0- 1
    TPB0 - 1

    1
    FOX_UV31413-4R1-TR
    94 R225 R226
    TEST9 56.2_0402_1%
    TEST8 95
    RP24 14 56.2_0402_1%
    1394_GPIO3 G_RST
    5 4 101

    2
    1394_GPIO2 1394_GPIO3 TEST3
    PLLGND1

    6 3 89 102
    REG_EN

    1394_SCL 1394_GPIO2 GPIO3 TEST2


    7 2 90 104
    REG18

    REG18

    GPIO2 TEST1
    DGND
    DGND

    DGND
    DGND
    DGND
    DGND
    DGND
    DGND
    DGND

    DGND

    1
    AGND
    AGND
    AGND
    AGND
    AGND
    AGND
    AGND

    8 1 1394_SDA 105 1
    TEST0 C237 R219
    220_1206_8P4R_5% 5.11K_0402_1%
    TSB43AB21A_PQFP128 220P_0402_50V7K
    8
    9
    109
    110
    111
    117
    126
    127
    128
    17
    23
    30
    33
    44
    55
    64
    68
    75
    83
    93
    103

    CLK_PCI_1394 2

    2
    1

    R243
    @ 10_0402_5%

    om
    1 1
    C296 C259
    2

    4 4

    l.c
    1
    C279 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    2 2

    ai
    @ 10P_0402_50V8J

    tm
    2

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 25 of 50
    A B C D E
    5 4 3 2 1

    PCI_AD[0..31]
    17,22,25,28,29 PCI_AD[0..31]
    R103 1 2 3.6K_0402_5% +3VALW PIN 8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
    U3 U9
    PCI_AD0 104 108 LAN_EEDO 4 5 1 RSET 5.6K 2.49K
    PCI_AD1 AD0 EEDO LAN_EEDI DO GND
    103 AD1 AUX/EEDI 109 3 DI NC 6
    PCI_AD2 102 111 LAN_EECLK 2 7 C133 0.1U_0402_16V4Z
    PCI_AD3 AD2 EESK LAN_EECS SK NC
    D 98 AD3 EECS 106 1 CS VCC 8 +3VALW D
    PCI_AD4 2
    97 AD4 BOM structure 8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
    PCI_AD5 96 117 ACTIVITY# AT93C46-10SI-2.7_SO8
    PCI_AD6 AD5 LED0 LINK_100# LAN_ACTIVITY# 27
    95 AD6 LED1 115 1 2 LAN_LINK# 27 8100C@ Stuff No_Stuff
    PCI_AD7 93 114 R445 0_0402_5%
    PCI_AD8 AD7 LED2 LINK_1000#
    90 AD8 NC/LED3 113 2 1 8110S@ No_Stuff Stuff
    PCI_AD9 89 R449 @ 0_0402_5%
    PCI_AD10 AD9 LAN_MDI0+
    87 AD10 TXD+/MDI0+ 1 LAN_MIDI0+ 27 @ No_Stuff No_Stuff
    PCI_AD11 86 2 LAN_MDI0-
    AD11 TXD-/MDI0- LAN_MIDI0- 27
    PCI_AD12 85 5 LAN_MDI1+
    AD12 RXIN+/MDI1+ LAN_MIDI1+ 27
    PCI_AD13 83 6 LAN_MDI1-
    AD13 RXIN-/MDI1- LAN_MIDI1- 27
    PCI_AD14 82
    PCI_AD15 AD14 LAN_MDI2+
    79 AD15 NC/MDI2+ 14 LAN_MIDI2+ 27
    PCI_AD16 59 15 LAN_MDI2-
    AD16 NC/MDI2- LAN_MIDI2- 27
    PCI_AD17 58 18 LAN_MDI3+
    AD17 NC/MDI3+ LAN_MIDI3+ 27
    PCI_AD18 57 19 LAN_MDI3-
    AD18 NC/MDI3- LAN_MIDI3- 27
    PCI_AD19 55
    PCI_AD20 AD19 LAN_X1
    53 AD20 X1 121
    PCI_AD21 50 122 LAN_X2
    PCI_AD22 AD21 X2
    49 AD22

    PCI I/F
    PCI_AD23 47 105 R415 1 2 1K_0402_5%
    PCI_AD24 AD23 LWAKE R410 +3VS
    43 AD24 ISOLATE# 23 1 2 15K_0402_5%
    PCI_AD25 42 127 1 2 8100C@ 5.6K_0603_1% RSET 5.6K for 8100CL
    PCI_AD26 AD25 RTSET R439
    40 72
    PCI_AD27 39
    AD26 NC/SMBCLK
    74 1 2 8110S@ 2.49K_0603_1%
    2.49K for 8110S(B)
    PCI_AD28 AD27 NC/SMBDATA R424
    37 AD28
    PCI_AD29 36 88
    PCI_AD30 AD29 NC/M66EN
    PCI_AD31
    34 AD30 +LAN_AVDDH
    20mils
    33 AD31 NC/AVDDH 10 1 R441 2 +3VALW
    C 120 1 8110S@ 0_0805_5% C
    AVDDH
    17,22,25,28,29 PCI_CBE#0 92 C/BE#0 1
    77 11 2 8110S@
    1 0_0402_5% C445 C479 C120 +3VALW +3VALW
    17,22,25,28,29 PCI_CBE#1 C/BE#1 NC/HSDAC+
    60 123 R425 8110S@ 0.1U_0402_16V4Z 1U_0603_10V4Z
    17,22,25,28,29 PCI_CBE#2 C/BE#2 NC/HG 2
    44 124 8110S@ 0.1U_0402_16V4Z
    17,22,25,28,29 PCI_CBE#3 C/BE#3 NC/LG2 2
    2 1 8110S@
    PCI_AD17 1 2 LAN_IDSEL 46 2SB1197K_SOT23
    IDSEL

    3
    R63 100_0402_5% E

    3
    17,22,25,28,29 PCI_PAR 76 PAR
    LAN I/F E
    +2.5V_LAN
    CTRL12 2 Q8 +1.2V_LAN
    61 9 CTRL25 2 Q10 B
    17,22,25,28,29 PCI_FRAME# FRAME# NC/VSS B C
    63 13 2SB1197K_SOT23 40mils
    17,22,25,28,29 PCI_IRDY#

    1
    IRDY# NC/VSS C
    17,22,25,28,29 PCI_TRDY# 67

    1
    TRDY#
    17,22,25,28,29 PCI_DEVSEL# 68 DEVSEL# Y2
    40mils
    17,22,25,28,29 PCI_STOP# 69 STOP# NC/GND 22
    48 LAN_X1 1 2 LAN_X2 1 1 1
    NC/GND
    17,22,25,28,29 PCI_PERR# 70 PERR# NC/GND 62
    75 73 1 25MHZ_20P 1 C129 C103 C105
    17,22,25,28,29 PCI_SERR# SERR# NC/GND
    112 4.7U_0805_10V4Z 8110S@ 4.7U_0805_10V4Z
    NC/GND C66 C62 2 8110S@ 2 0.1U_0402_16V4Z
    2
    17 PCI_REQ#3 30 REQ# NC/GND 118
    29 27P_0402_50V8J 27P_0402_50V8J
    17 PCI_GNT#3 GNT# 2 2

    17 PCI_PIRQF# 25 INTA#
    8 CTRL25
    CTRL25
    22,25,28,32 LAN_PME# 31 PME#
    125 CTRL12
    CTRL12
    17,22,24,25,28,29 PCI_RST# 27 RST#
    VDD33 26 +3VALW
    CLK_PCI_LAN 28 41 1 1 1 1 1
    13 CLK_PCI_LAN CLK VDD33
    PM_CLKRUN# 65 56
    B 19,25,28,29,30 PM_CLKRUN# CLKRUN# VDD33 C510 C469 C539 C538 C86 B
    VDD33 71
    84 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    VDD33 2 2 2 2 2
    VDD33 94
    VDD33 107
    4 +LAN_AVDDL R44 1 2 +3VALW
    GND/VSS 8100C@ 0_0805_5%
    17 GND/VSS 1 1 1 1 40mils
    128 GND/VSS
    3 C441 C444 C442 C440 8110S@ 0_0805_5%
    AVDDL 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R37
    AVDDL 7 1 2 +2.5V_LAN
    2 2 2 2
    21 GND/VSSPST AVDDL 20
    CLK_PCI_LAN 38 16 +LAN_AVDDL25 1 2 +2.5V_LAN
    GND/VSSPST AVDDL R418
    51 GND/VSSPST 20mils
    1

    66 126 8110S@ 0_0402_5%


    GND/VSSPST VDD12 +LAN_DVDD R73
    81 GND/VSSPST VDD12 32 1 2 +1.2V_LAN
    R34 91 54 1 1 1 1 40mils 8110S@ 0_0805_5%
    @ 10_0402_5% GND/VSSPST VDD12
    101 GND/VSSPST VDD12 78
    119 99 C540 C541 C461 C430 8100C@ 0_0805_5%
    2

    GND/VSSPST VDD12 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R93


    1 1 2 +2.5V_LAN
    2 2 2 2
    Power

    C33 35 24 +1.2V_LAN
    @ 18P_0402_50V8J GND NC/VDD12
    52 GND NC/VDD12 45 2 2 2 2 2
    2 C494 C439 C58 C87 C511
    80 GND NC/VDD12 64
    100 GND NC/VDD12 110
    116 8110S@ 0.1U_0402_16V4Z 8110S@ 0.1U_0402_16V4Z
    NC/VDD12 1 1 1 1 1
    8110S@ 0.1U_0402_16V4Z 8110S@ 0.1U_0402_16V4Z
    12 V_12P R426 1 2 +2.5V_LAN 8110S@ 0.1U_0402_16V4Z
    NC
    8110S@ RTL8110SBL_LQFP128
    20mils1 C446 R422 8100C@ 0_0402_5% +LAN_AVDDH
    A 1 2 A
    8110S@ 0_0402_5%
    0.1U_0402_16V4Z
    2
    RTL8110SBL change to Ver.D

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 26 of 50
    5 4 3 2 1
    5 4 3 2 1

    LAN RTL8110SBL/RTL8100CL
    D D

    unpop when use RTL8100CL(10/100)

    1 1
    C401 C402

    8110S@ 0.1U_0402_16V4Z 8110S@ 0.1U_0402_16V4Z JP21


    2 2 +2.5V_LAN 24HST1041A-3(SP050002110) for RTL8110SBL(GbE) +3VALW
    R7 2 1 300_0603_5% 12 Amber LED+
    24ST0023-3(SP050005000) for RTL8100CL(10/100) 26 LAN_ACTIVITY#
    LAN_ACTIVITY# 11 Amber LED-
    24ST0023-3: Half port(TD[3:4], MX[3:4]) SHLD4 16

    1
    RJ45_MDI3- 8 PR4-
    1

    R378 R372 15
    8110S@ 49.9_0402_1% R380 8110S@ 0_0603_5% RJ45_MDI3+ SHLD3
    7 PR4+
    C R377 R379 8110S@ 49.9_0402_1% C
    8110S@ 49.9_0402_1% 8110S@ 49.9_0402_1% T1 RJ45_MDI1- 6

    2
    PR2-
    2

    1 24 RJ45_MDI2- 5
    LAN_MDI3- TCT1 MCT1 RJ45_MDI3- PR3-
    26 LAN_MIDI3- 2 TD1+ MX1+ 23
    26 LAN_MIDI3+ LAN_MDI3+ 3 22 RJ45_MDI3+ RJ45_MDI2+ 4
    TD1- MX1- PR3+
    4 21 RJ45_MDI1+ 3
    LAN_MDI2- TCT2 MCT2 RJ45_MDI2- PR2+
    26 LAN_MIDI2- 5 TD2+ MX2+ 20
    26 LAN_MIDI2+ LAN_MDI2+ 6 19 RJ45_MDI2+ RJ45_MDI0- 2
    TD2- MX2- PR1-
    SHLD2 14
    7 18 RJ45_MDI0+ 1
    LAN_MDI1- TCT3 MCT3 RJ45_MDI1- PR1+
    26 LAN_MIDI1- 8 TD3+ MX3+ 17 SHLD1 13
    26 LAN_MIDI1+ LAN_MDI1+ 9 16 RJ45_MDI1+ LAN_LINK# 10
    TD3- MX3- 26 LAN_LINK# Green LED-
    1 2 10 15 R6 2 1 300_0603_5% 9
    TCT4 MCT4 +3VALW Green LED+
    26 LAN_MIDI0- LAN_MDI0- R376 8110S@ 0_0402_5% 11 14 RJ45_MDI0-
    LAN_MDI0+ TD4+ MX4+ RJ45_MDI0+ TYCO_1566735-1
    26 LAN_MIDI0+ 12 TD4- MX4- 13
    1

    R383 R382 R385 R384

    1
    49.9_0402_1% 49.9_0402_1% 8110S@ 0.01U_0402_16V7K 24HST1041A-3
    49.9_0402_1% 49.9_0402_1% 8110S@
    R356 R357 RJ45_GND 1 2 LANGND
    2

    1 1 1 1 75_0402_1% 75_0402_1% 1 1
    C414 C416 C415 C413 C1

    2
    C4091 C4081 1000P_1206_2KV7K C9 C10
    0.01U_0402_16V7K 4.7U_0805_10V4Z
    2 2 2 2 8110S@ 2 2
    B 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K B
    2 2 8110S@ 0.01U_0402_16V7K 0.1U_0402_16V4Z

    RJ45_MDI3+ R353 1 2 8100C@ 0_0402_5%


    RJ45_MDI3- R354 1 2 8100C@ 0_0402_5%

    RJ45_MDI2+ R351 1 2 8100C@ 0_0402_5%


    RJ45_MDI2- R352 1 2 8100C@ 0_0402_5%
    1

    reseved for RTL8100CL(10/100)


    R358 R359
    75_0402_1% 75_0402_1%
    2

    RJ45_GND

    om
    A A

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 27 of 50
    5 4 3 2 1
    A B C D E

    +3V_MINI
    +5VS +3VS

    0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z


    W=40mils
    +3VALW 1 2
    R176 0_0805_5%
    1 1 1 1 1 1 1 1 1 1 1
    C179 C162 C165 C160 C609 C175 C610 C159 C156 C147 C163
    10U_0805_10V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z
    2 2 2 2 2 2 2 2 2 2 2
    1 1

    1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z

    PCI_AD[0..31]
    PCI_AD[0..31] 17,22,25,26,29

    JP36
    TIP 1 2 RING
    1 2
    KEY KEY
    3 3 4 4
    5 5 6 6
    7 7 8 8
    9 9 10 10
    D9
    11 11 12 12
    WL_OFF# 1 2 13 14
    32 WL_OFF# 13 14
    RB751V_SOD323 15 16
    15 16
    17,29 PCI_PIRQH# 17 17 18 18 W=40mils +5VS
    +3VS W=40mils 19 19 20 20 PCI_PIRQG# 17
    21 21 22 22
    23 23 24 24 W=40mils +3V_MINI
    2 CLK_PCI_MINI1 25 26 2
    13 CLK_PCI_MINI1 25 26 PCI_RST# 17,22,24,25,26,29
    27 27 28 28 W=40mils +3VS
    PCI_REQ#1 29 30 PCI_GNT#1
    17 PCI_REQ#1 29 30 PCI_GNT#1 17
    31 31 32 32
    PCI_AD31 33 34
    33 34 MINI_PME# 22,25,26,32
    PCI_AD29 35 36
    35 36 WLAN_BT_CLK 34
    37 38 PCI_AD30
    PCI_AD27 37 38
    39 39 40 40
    PCI_AD25 41 42 PCI_AD28
    41 42 PCI_AD26
    34 WLAN_BT_DATA 43 43 44 44
    45 46 PCI_AD24
    17,22,25,26,29 PCI_CBE#3 45 46
    CLK_PCI_MINI1 PCI_AD23 47 48 MINI_IDSEL1 1 2 R177 PCI_AD18
    47 48 100_0402_5%
    49 49 50 50
    PCI_AD21 51 52 PCI_AD22
    51 52
    1

    PCI_AD19 53 54 PCI_AD20
    R195 53 54
    55 55 56 56 PCI_PAR 17,22,25,26,29
    PCI_AD17 57 58 PCI_AD18
    @ 10_0402_5% PCI_CBE#2 57 58 PCI_AD16
    17,22,25,26,29 PCI_CBE#2 59 59 60 60
    P CI_IRDY# 61 62
    17,22,25,26,29 PCI_IRDY#
    2

    61 62 PCI_FRAME#
    1 63 63 64 64 PCI_FRAME# 17,22,25,26,29
    C172 65 66 PCI_TRDY#
    19,25,26,29,30 PM_CLKRUN# 65 66 PCI_TRDY# 17,22,25,26,29
    PCI_SERR# 67 68 PCI_STOP#
    17,22,25,26,29 PCI_SERR# 67 68 PCI_STOP# 17,22,25,26,29
    @ 10P_0402_50V8J 69 70
    2 PCI_PERR# 69 70 PCI_DEVSEL#
    17,22,25,26,29 PCI_PERR# 71 71 72 72 PCI_DEVSEL# 17,22,25,26,29
    PCI_CBE#1 73 74
    17,22,25,26,29 PCI_CBE#1 PCI_AD14 73 74 PCI_AD15
    75 75 76 76
    77 78 PCI_AD13
    PCI_AD12 77 78 PCI_AD11
    79 79 80 80
    PCI_AD10 81 82
    3 81 82 PCI_AD9 3
    83 83 84 84
    PCI_AD8 85 86 PCI_CBE#0
    PCI_AD7 85 86 PCI_CBE#0 17,22,25,26,29
    87 87 88 88
    89 90 PCI_AD6
    PCI_AD5 89 90 PCI_AD4
    91 91 92 92
    93 94 PCI_AD2
    PCI_AD3 93 94 PCI_AD0
    95 95 96 96
    +5VS W=40mils 97 97 98 98
    PCI_AD1 99 100
    99 100
    101 101 102 102
    103 103 104 104
    105 105 106 106
    107 107 108 108
    109 109 110 110
    111 111 112 112
    113 113 114 114
    115 115 116 116
    117 117 118 118
    119 119 120 120
    W=30mils 121 121 122 122 W=20mils
    +5VS 123 123 124 124 +3V_MINI
    TYCO_1566674-3

    (Change to SP070003200)
    4 (change to H=4.0mm) 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 28 of 50
    A B C D E
    10 9 8 7 6 5 4 3 2 1

    +5VS +3VS +3V_MINI


    H
    0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z TV-Tuner H

    1 1 1 1 1 1 1 1 1
    C190 C191 C189 C245 C196 C198 C187 C197 C195

    2 2
    10U_0805_10V4Z
    2 2 2
    0.1U_0402_16V4Z 2
    4.7U_0805_10V4Z
    2 2 2 AV In
    1000P_0402_50V7K
    1000P_0402_50V7K
    Acer TV-Tuner Design Guide Rev1.1
    JP20 1. N/A
    S_Y IN 3 2. N/A
    AUDIO_INR 6 3. S-Video - Y
    CVBS_IN 7
    G AUDIO_INL 4. S-Video - C G
    5
    2 5. Audio - Left
    S_CIN 4 6. Audio - Right
    1 7. CVBS
    +3VS +3VS PCI_AD[0..31] 8
    TIP PCI_AD[0..31] 17,22,25,26,28
    JP40 9
    1 2 RING W=40mils
    1 2
    KEY KEY
    3 4 SUYIN_030107FR007SX08FU
    3 4
    W=40mils 5 5 6 6
    7 7 8 8
    9 9 10 10
    11 11 12 12
    13 13 14 14
    F 15 16 F
    15 16
    17,22 PCI_PIRQA# 17 17 18 18 W=40mils +5VS
    19 19 20 20 PCI_PIRQH# 17,28
    S_Y IN 21 22 S_CIN
    21 22
    23 23 24 24 W=40mils +3V_MINI
    CLK_PCI_MINI2 25 26
    13 CLK_PCI_MINI2 25 26 PCI_RST# 17,22,24,25,26,28
    27 27 28 28
    PCI_REQ#4 29 30 PCI_GNT#4
    17 PCI_REQ#4 29 30 PCI_GNT#4 17
    31 31 32 32
    PCI_AD31 33 34
    PCI_AD29 35
    37
    33
    35
    37
    34
    36
    38
    36
    38 PCI_AD30 RF In
    PCI_AD27 39 40
    PCI_AD25 39 40 PCI_AD28
    41 41 42 42
    E 43 44 PCI_AD26 E
    43 44 PCI_AD24 JP14
    17,22,25,26,28 PCI_CBE#3 45 45 46 46

    3
    CLK_PCI_MINI2 PCI_AD23 47 48 MINI_IDSEL2 1 2 R218 PCI_AD19 connected directly without Via 1
    47 48 100_0402_5%
    49 50 3

    3
    PCI_AD21 49 50 PCI_AD22 ANTENNA ANTENNA
    51 51 52 52 1 1 2
    1

    PCI_AD19 53 54 PCI_AD20 4
    53 54

    2
    R220 55 56
    55 56 PCI_PAR 17,22,25,26,28
    PCI_AD17 57 58 PCI_AD18 JP22 SINGA_2SJ-356C-001

    2
    @ 10_0402_5% PCI_CBE#2 57 58 PCI_AD16 ACES_20262-0001
    17,22,25,26,28 PCI_CBE#2 59 59 60 60
    P CI_IRDY# 61 62
    17,22,25,26,28 PCI_IRDY#
    2

    61 62 PCI_FRAME# RFGND
    1 63 63 64 64 PCI_FRAME# 17,22,25,26,28
    C234 65 66 PCI_TRDY#
    19,25,26,28,30 PM_CLKRUN# 65 66 PCI_TRDY# 17,22,25,26,28

    1
    PCI_SERR# 67 68 PCI_STOP#
    @ 10P_0402_50V8J 17,22,25,26,28 PCI_SERR#
    69
    67
    69
    68
    70 70
    PCI_STOP# 17,22,25,26,28 (EAQ11) R345
    2 PCI_PERR# PCI_DEVSEL# @ 0_1206_5%
    D 17,22,25,26,28 PCI_PERR# 71 71 72 72 PCI_DEVSEL# 17,22,25,26,28 D
    PCI_CBE#1 73 74
    17,22,25,26,28 PCI_CBE#1 PCI_AD14 73 74 PCI_AD15
    75 76

    2
    75 76 PCI_AD13
    77 77 78 78
    PCI_AD12 79 80 PCI_AD11
    PCI_AD10 79 80
    81 81 82 82
    83 84 PCI_AD9
    PCI_AD8 83 84 PCI_CBE#0
    85 85 86 86 PCI_CBE#0 17,22,25,26,28
    PCI_AD7 87 88
    87 88 PCI_AD6
    89 89 90 90
    PCI_AD5 91 92 PCI_AD4
    CVBS_IN 91 92 PCI_AD2
    93 93 94 94
    PCI_AD3 95 96 PCI_AD0
    95 96
    +5VS W=40mils 97 97 98 98 TV_AUDIO_R 36
    PCI_AD1 99 100
    C 99 100 TV_AUDIO_L 36 C
    101 101 102 102
    103 103 104 104
    105 105 106 106
    107 107 108 108
    109 109 110 110
    111 112 AUDIO_INR
    111 112
    113 113 114 114
    115 115 116 116
    117 117 118 118
    119 119 120 120
    AUDIO_INL 121 122 W=20mils
    121 122
    123 123 124 124 1 2 +3V_MINI
    R216 @ 0_0603_5%
    P-TWO_A53921-A0G16-P
    B B

    (No CIS)
    (EDL71 pin define)

    om
    (For TV-Tuner change to H=9.2mm)

    l.c
    ai
    tm
    Security Classification Compal Secret Data Compal Electronics, Inc.

    ho
    A Issued Date 2005/03/01 2006/03/01 Title A
    Deciphered Date

    f@
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781

    in
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    xa
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353

    he
    Date: 星期五, 六月 03, 2005 Sheet 29 of 50
    10 9 8 7 6 5 4 3 2 1
    SUPER I/O SMsC LPC47N217
    +3VS Parallel Port
    +5V_PRN
    +3VS 1 1 1 1 D15
    +5VS 2 1 W=20mil
    RP37 C387 C391 C389 C376
    1 8 DCD#1 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
    RB420D_SOT23

    1
    RI#1 2 2 2
    0.1U_0402_16V4Z 2
    2 7
    3 6 CTS#1 R325 C381
    4 5 DSR#1 2.2K_0402_5% 0.1U_0402_16V4Z
    2
    4.7K_1206_8P4R_5%

    2
    W=20mil
    LPTSTB# 1 2 +5V_PRN_R
    R324 33_0402_5%
    JP15
    1
    U33 LPTAFD# 1 2 AFD/3M# 14
    LPC_AD0 10 62 RXD1 1 2 R323 33_0402_5% F D0 2
    18,32 LPC_AD0 LAD0 RXD1
    LPC_AD1 TXD1 R362 LPTERR#

    SERIAL I/F
    18,32 LPC_AD1 12 LAD1 TXD1 63 15
    LPC_AD2 13 64 DSR#1 1K_0402_5% F D1 3
    18,32 LPC_AD2 LAD2 DSR1#
    LPC_AD3 14 1 RTS#1 LPTINIT# 1 2 LPT_INIT# 16
    18,32 LPC_AD3 LAD3 RTS1#
    2 CTS#1 R4 33_0402_5% F D2 4
    LPC_FRAME# CTS1# DTR#1 LPTSLCTIN#1 SLCTIN#
    18,32 LPC_FRAME# 15 LFRAME# DTR1# 3 2 17
    LPC_DRQ#1 16 4 RI#1 R5 33_0402_5% F D3 5
    18 LPC_DRQ#1 LDRQ# RI1#

    LPC I/F
    5 DCD#1 18
    DCD1# F D4
    6,17,19,21,32 PLT_RST# 17 PCI_RESET# 6
    1 2 SIO_PD# 18 37 IRRX 1 2 RP36 19
    +3VS R363 10K_0402_5% LPCPD# IRRX2 IRTXOUT R327 F D5
    FIR IRTX2 38 7
    PM_CLKRUN# 19 39 IRMODE 10K_0402_5% LPD3 1 8 F D3 20
    19,25,26,28,29 PM_CLKRUN# CLK_PCI_SIO CLKRUN# IRMODE/IRRX3 LPD2 F D2 F D6
    13 CLK_PCI_SIO 20 PCI_CLK 2 7 8
    21 41 LPTINIT# LPD1 3 6 F D1 21
    19,22,32 SERIRQ SIO_PME# SER_IRQ INIT# LPTSLCTIN# LPD0 F D0 F D7
    +3VS 1 2 6 IO_PME# SLCTIN# 42 4 5 9
    R370 10K_0402_5% 44 LPD0 22
    CLK_14M_SIO PD0 LPD1 33_1206_8P4R_5% LPTACK#
    13 CLK_14M_SIO 9 CLK14 PD1 46 10
    CLOCK 47 LPD2 23
    PD2 LPD3 RP2 LPTBUSY
    23 GPIO40 PD3 48 11

    PARALLEL I/F
    24 49 LPD4 LPD7 1 8 F D7 24
    GPIO41 PD4 LPD5 LPD6 F D6 LPTPE
    25 GPIO42 PD5 50 2 7 12
    27 51 LPD6 LPD5 3 6 F D5 25
    GPIO43 PD6 LPD7 LPD4 F D4 LPTSLCT

    GPIO
    28 GPIO44 PD7 53 4 5 13
    29 55 LPTSLCT
    GPIO45 SLCT LPTPE 33_1206_8P4R_5% SUYIN_070536FR025S204AR
    30 GPIO46 PE 56
    31 57 LPTBUSY
    GPIO47 BUSY LPTACK#
    32 GPIO10 ACK# 58
    R328 2 1 1K_0402_5% SIO_GPIO11 33 59 LPTERR#
    R322 1 GPIO11/SYSOPT ERROR#
    +3VS 2 10K_0402_5% SIO_SMI# 34 GPIO12/IO_SMI# ALF# 60 LPTAFD#
    1 2 SIO_IRQ 35 61 LPTSTB#
    R321 10K_0402_5% GPIO13/IRQIN1 STROBE#
    36 GPIO14/IRQIN2
    1 2 SIO_GPIO23 40
    R326 10K_0402_5% GPIO23 +5V_PRN
    8 VSS VTR 7 +3VS
    22 VSS VCC 11
    43 POWER 26 RP1 CP4
    VSS VCC
    52 VSS VCC 45 1 8 F D0 AFD/3M# 1 8
    VCC 54 2 7 F D1 LPTERR# 2 7
    3 6 F D2 LPT_INIT# 3 6
    CLK_14M_SIO CLK_PCI_SIO LPC47N217_STQFP64 4 5 F D3 SLCTIN# 4 5
    2

    Base I/O Address 2.7K_1206_8P4R_5% 220P_1206_8P4C_50V8K


    R369 R355 * 0 = 02Eh
    @ 10_0402_5% @ 33_0402_5% 1 = 04Eh RP34 CP2
    1 8 F D7 LPTACK# 1 8
    2 7 F D6 LPTBUSY 2 7
    1

    2 2 3 6 F D5 LPTPE 3 6
    4 5 F D4 LPTSLCT 4 5
    C398 C393 +IR_ANODE
    @ 15P_0402_50V8J @ 22P_0402_50V8J 2.7K_1206_8P4R_5% 220P_1206_8P4C_50V8K
    1 1
    +3VS 1 2
    R547 0_1206_5% RP35 CP3
    1 1 2 1 8 SLCTIN# F D0 1 8
    C665 R549 0_1206_5% 2 7 LPT_INIT# F D1 2 7
    3 6 LPTERR# F D2 3 6
    4 5 AFD/3M# F D3 4 5
    FIR Module 2
    4.7U_0805_10V4Z
    2.7K_1206_8P4R_5% 220P_1206_8P4C_50V8K
    Place on the BOT side(near MINIPCI conn.) W=60mil
    RP3 CP1
    +5VS IR1 1 8 LPTACK# F D4 1 8
    JP26 1 2 7 LPTBUSY F D5 2 7
    +IR_3VS IRED_A IRTXOUT LPTPE F D6
    1 1 2 IRED_C TXD 3 T = 12mil 3 6 3 6
    2 IRRX 4 5 T = 12mil IRMODE 4 5 LPTSLCT F D7 4 5
    RXD1 2 +IR_3VS RXD SD/MODE
    3 3 +3VS 1 2 6 VCC MODE 7
    TXD1 4 R546 W=40mil 8 2.7K_1206_8P4R_5% 220P_1206_8P4C_50V8K
    DSR#1 4 47_1206_5% GND
    5 5 1 1
    RTS#1 6 C276 C271 TFDU6102-TR3_8P
    CTS#1 6
    7 7
    DTR#1 8 10U_0805_10V4Z 0.1U_0402_16V4Z
    RI#1 8 2 2
    9 9
    DCD#1 10 10
    @ E&T_96212-1011S
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    For SW debug use when no seial port SCHEMATIC, M/B LA-2781
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 30 of 50
    5 4 3 2 1

    +3VALW
    +3VALW +3VALW

    1
    +5VALW +5VALW

    1
    +USB_VCCA +USB_VCCB
    U35 R402 U37 R406
    1 8 R392 @ 100K_0402_5% 1 8 100K_0402_5%
    GND OUT 100K_0402_5% GND OUT
    2 7 2 7

    2
    IN OUT IN OUT
    3 6 3 6

    2
    IN OUT R391 1 IN OUT
    1 4 EN# FLG 5 2 10K_0402_5% USB_OC#3 19 1 4 EN# FLG 5 R403 1 2 10K_0402_5% USB_OC#0 19
    C407 C433
    G528_SO8 R401 1 2 10K_0402_5% G528_SO8 R398 1 2 10K_0402_5%
    USB_OC#4 19 USB_OC#2 19
    D 4.7U_0805_10V4Z 4.7U_0805_10V4Z D
    2 2
    1 1 1 1
    C419 C421 C422
    SYSON# SYSON# C420
    40 SYSON# 0.1U_0402_16V4Z
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    2 2 2 2

    USB CONN. 3 & 5


    USB CONN. 1 & 2
    (Place on the left-back side) (Place on the right side)
    +USB_VCCA +USB_VCCA +USB_VCCB +USB_VCCB

    +USB_VCCA
    W=80mils +USB_VCCA
    W=80mils +USB_VCCB
    W=80mils +USB_VCCB
    1 1 1 1
    1 1 1 1 1 1 1 1
    C388 + C380 C379 C390 + C386 C385 C18 + C404 C405 C89 + C536 C537
    150U_D2_6.3VM
    150U_D2_6.3VM 0.1U_0402_16V4Z 1000P_0402_50V7K @ 150U_D2_6.3VM @1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K 150U_D2_6.3VM 0.1U_0402_16V4Z
    2 2 2 2 2
    @ 0.1U_0402_16V4Z 2 2 2 2 2 2
    0.1U_0402_16V4Z 2
    JP24 JP23 JP25 JP30
    1 VCC 1 VCC 1 VCC 1 VCC
    USB20_N4 2 USB20_N4 2 USB20_N0 2 USB20_N2 2
    D- 19 USB20_N4 D- 19 USB20_N0 D- 19 USB20_N2 D-
    USB20_P4 3 USB20_P4 3 USB20_P0 3 USB20_P2 3
    D+ 19 USB20_P4 D+ 19 USB20_P0 D+ 19 USB20_P2 D+
    4 GND 4 GND 4 GND 4 GND
    C 5 5 5 5 C
    GND1 GND1 GND1 GND1
    6 GND2 6 GND2 6 GND2 6 GND2
    7 GND3 7 GND3 7 GND3 7 GND3
    8 GND4 8 GND4 8 GND4 8 GND4
    SUYIN_020173MR004G533ZR @ SUYIN_020173MR004G533ZR SUYIN_020173MR004G533ZR SUYIN_020173MR004G533ZR
    D6 D5
    1 GND VCC 4 +USB_VCCA 1 GND VCC 4 +USB_VCCA
    D22 D26
    USB20_N4 2 3 USB20_P4 USB20_N4 2 3 USB20_P4 1 4 +USB_VCCB 1 4 +USB_VCCB
    I/O I/O I/O I/O GND VCC GND VCC
    @ PRTR5V0U2X_SOT143 @ PRTR5V0U2X_SOT143
    USB20_P0 2 3 USB20_N0 USB20_P2 2 3 USB20_N2
    I/O I/O I/O I/O
    @ PRTR5V0U2X_SOT143 @ PRTR5V0U2X_SOT143

    +USB_VCCA
    W=80mils (Place on the back side)

    1 1
    C374 C373

    1000P_0402_50V7K
    2
    1000P_0402_50V7K
    2
    USB CONN. 5
    JP18
    1 VCC
    (Place on the left-front side) +USB_VCCC +USB_VCCC
    USB20_N3 2 W=60mils
    B 19 USB20_N3 D- B
    USB20_P3 3 +USB_VCCC +USB_VCCC
    19 USB20_P3 D+
    4 GND 1 1
    1 1 1 1
    5 C652 + C648 C649 C653 + C646 C645
    GND1
    6 GND2
    7 150U_D2_6.3VM 1000P_0402_50V7K @ 150U_D2_6.3VM @ 1000P_0402_50V7K
    D1 GND3 2 2
    0.1U_0402_16V4Z 2 2 2
    @ 0.1U_0402_16V4Z 2
    8 GND4
    1 4 +USB_VCCA JP39 JP38
    GND VCC SUYIN_020173MR004G533ZR 1 VCC 1 VCC
    USB20_N6 2 USB20_N6 2
    D- 19 USB20_N6 D-
    USB20_N3 2 3 USB20_P3 USB20_P6 3 USB20_P6 3
    I/O I/O D+ 19 USB20_P6 D+
    4 GND 4 GND
    @ PRTR5V0U2X_SOT143
    +3VALW
    5 GND1 5 GND1
    6 GND2 6 GND2
    +5VALW 7 GND3 7 GND3
    1

    +USB_VCCC 8 8
    U43 R530 GND4 GND4
    1 8 100K_0402_5% SUYIN_020173MR004G533ZR @ SUYIN_020173MR004G533ZR
    GND OUT
    2 IN OUT 7
    3 6
    2

    IN OUT R529 1
    1 4 EN# FLG 5 2 10K_0402_5% USB_OC#6 19
    D30 D13
    C625 1 4 +USB_VCCC 1 4 +USB_VCCC
    G528_SO8 GND VCC GND VCC
    1
    4.7U_0805_10V4Z
    2 SYSON# C628 USB20_P6 USB20_N6 USB20_N6 USB20_P6
    2 I/O I/O 3 2 I/O I/O 3
    0.1U_0402_16V4Z
    2

    om
    @ PRTR5V0U2X_SOT143 @ PRTR5V0U2X_SOT143
    A A

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 31 of 50
    5 4 3 2 1
    5 4 3 2 1

    +3VALW
    KBA[0..18]
    KBA[0..18] 33 L13 +3VALW For EC Tools
    ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2+EC_VCCA
    ADB[0..7] 33 +3VALW
    1 1 C604 1 1 2 2 FBM-L11-160808-800LMT_0603 20mil
    C193 1 JP32
    C230 C171 C254 C246 KSI[0..7]
    1000P_0402_50V7K 1000P_0402_50V7K C168
    20mil KSI[0..7] 33,34 1 1
    E51_RXD
    1 1 2 2
    L14 2 2 2 2 1 1 C247 C257 KSO[0..15] E51_TXD
    KSO[0..15] 33 3 3

    ECAGND
    ECAGND 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z
    1 2 4 4
    FBM-L11-160808-800LMT_0603 20mil 0.1U_0402_16V4Z 1U_0603_10V4Z
    2 2 @ ACES_85205-0400

    D D

    123
    136
    157
    166

    161

    159
    16
    34
    45

    95

    96
    U15
    LPC_AD0 15

    VCC
    VCC
    VCC
    VCC
    VCC
    VCC
    VCC

    VCCA

    AGND

    VCCBAT

    BATGND
    18,30 LPC_AD0 LAD0
    C188 LPC_AD1 14 49 KSO0
    18,30 LPC_AD1 LAD1 GPOK0/KSO0
    @ 22P_0402_50V8J LPC_AD2 13 50 KSO1 Analog Board ID definition, SKU ID definition,
    18,30 LPC_AD2 LAD2 GPOK1/KSO1
    2 1 R205 2 1 @ 33_0402_5% LPC_AD3 10 51 KSO2
    18,30 LPC_AD3 LAD3 GPOK2/KSO2 Please see page 3. Please see page 3.
    KSO3
    18,30 LPC_FRAME# 9 LFRAME# LPC Interface GPOK3/KSO3 52
    KSO4
    6,17,19,21,30 PLT_RST# 165 LRST#/GPIO2C GPOK4/KSO4 53

    ENE-KB910-B4
    18 56 KSO5
    13 CLK_PCI_LPC LCLK GPOK5/KSO5
    7 57 KSO6 +3VALW +3VALW
    19,22,30 SERIRQ SERIRQ GPOK6/KSO6 KSO7
    34 ARCADE_GRN# 25 CLKRUN#/GPIO0C * GPOK7/KSO7 58
    24 59 KSO8
    LPCPD#/GPIO0B * GPOK8/KSO8

    2
    +3VALW 60 KSO9
    FR D# GPOK9/KSO9 KSO10 R171 R167
    33 FRD# 150 RD# GPOK10/KSO10 61
    FW R# KSO11 100K_0402_5% GM@ 100K_0402_5%

    Internal Keyboard
    33 FWR# 151 WR# GPOK11/KSO11 64 Ra Rc
    2

    FSEL# 173 65 KSO12


    33 FSEL# MEMCS# GPOK12/KSO12
    R227 SELIO# 152 66 KSO13

    1
    10K_0402_5% ADB0 IOCS# GPOK13/KSO13 KSO14 AD_BID0 SKU_ID
    138 D0 GPOK14/KSO14 67
    ADB1 139 68 KSO15
    D1 GPOK15/KSO15

    2
    ADB2 140 153 KSO16 1 1
    KSO16 34
    1

    ADB3 D2 GPOK16/KSO16 KSO17 R170 C157 R168 C136


    22,25,26,28 MINI_PME# 141 D3 GPOK17/KSO17 154 KSO17 34
    ADB4 144 Rb Rd
    EC_PME# ADB5 D4 KSI0 8.2K_0402_5% 0_0402_5%
    22,25,26,28 LAN_PME# 145 D5 GPIK0/KSI0 71
    2 2

    X-BUS Interface
    ADB6 146 72 KSI1 0.1U_0402_16V4Z PM@ 0.1U_0402_16V4Z

    1
    ADB7 D6 GPIK1/KSI1 KSI2
    22,25,26,28 1394_PME# 147 D7 GPIK2/KSI2 73
    KBA0 124 74 KSI3
    KBA1 A0 GPIK3/KSI3 KSI4
    22,25,26,28 PCM_PME# 125 A1/XIOP_TP GPIK4/KSI4 77 R168 change to 8.2K (GM@)
    KBA2 126 78 KSI5
    KBA3 A2 GPIK5/KSI5 KSI6
    127 A3 GPIK6/KSI6 79
    KBA4 128 80 KSI7
    KBA5 A4/DMRP_TP GPIK7/KSI7
    131 A5/EMWB_TP
    C +3VALW KBA6 INVT_PWM C
    132 A6 GPOW0/PWM0 32 INVT_PWM 15
    KBA7 133 33 BEEP#
    A7 GPOW1/PWM1 BEEP# 36
    KBA8 143 36
    A8 FAN2PWM/GPOW2/PWM2
    2

    KBA9 142 37 ACOFF


    R169 KBA10 A9 GPOW3/PWM3 ACOFF 41,43
    10K_0402_5%
    135 A10 Pulse Width GPOW4/PWM4 38
    KBA11 134 39 EC_ON
    A11 GPOW5/PWM5 EC_ON 35
    KBA12 130 40 EC_LID_OUT#
    A12 GPOW6/PWM6 EC_LID_OUT# 19
    KBA13 129 43 EC_MUTE
    EC_MUTE 37,38
    1

    D8 KBA14 A13 FAN1PWM/GPOW7/PWM7


    121 A14
    KBA15 120 2 ON /OFF
    A15 GPWU0 ON/OFF 35
    1 2 EC_RCIRRX KBA16 113 26
    34 RCIRRX A16 GPWU1 ACIN 19,43
    KBA17 112 29
    KBA18 A17 GPWU2 PM_SLP_S3#
    RB751V_SOD323 104 A18 GPWU3 30 PM_SLP_S3# 19
    103 Wake Up Pin 44 PM_SLP_S5#
    A19 GPWU4 PM_SLP_S5# 19
    +5VS 108 76 EC_RCIRRX
    RP16 A20/GPIO23 GPWU5 EC_PME#
    +3VALW 2 1 105 E51CS#/GPIO20/ISPEN TIN1/GPWU6 172
    1 8 KB_CLK R191 100K_0402_5% 176 5WAY_BTN 5WAY_BTN 34
    KB_DATA KB_CLK TIN2/FANFB2/GPWU7 ECAGND
    2 7 110 PSCLK1 2 1
    3 6 PS_CLK KB_DATA 111 81 BATT_TEMP C140 0.01U_0402_16V7K
    PSDAT1 GPIAD0/AD0 BATT_TEMP 44
    4 5 PS_DATA PS_CLK 114 82 SKU_ID
    PS_DATA PSCLK2 GPIAD1/AD1 BATT_OVP
    4.7K_1206_8P4R_5% TP_CLK
    115 PSDAT2PS2 Interface GPIAD2/AD2 83 BATT_OVP 43
    34 TP_CLK 116 PSCLK3 GPIAD3/AD3 84
    +3VALW TP_DATA 117 Analog To Digital 87 6C/8C#
    34 TP_DATA PSDAT3 GPIAD4/AD4 6C/8C# 44
    RP25 88 5WAY_BTN
    EC_SMB_CK1 GPIAD5/AD5 AD_BID0 R187 100K_0402_5%
    1 8 15,33,44 EC_SMB_CK1 163 SCL1 GPIAD6/AD6 89
    2 7 FR D# EC_SMB_DA1 164 90
    15,33,44 EC_SMB_DA1 SDA1 GPIAD7/AD7
    3 6 SELIO# EC_SMB_CK2 169 SMBus
    4 EC_SMB_CK2 SCL2
    4 5 FSEL# EC_SMB_DA2 170 99 DAC_BRIG
    4 EC_SMB_DA2 SDA2 GPODA0/DA0 DAC_BRIG 15
    GPODA1/DA1 100
    10K_1206_8P4R_5% EMPWR_BTN# 8 101 IREF
    34 EMPWR_BTN# GPIO04 GPODA2/DA2 IREF 43
    +3VALW EC_SCI# 20 102 EN_DFAN1
    19 EC_SCI# GPIO07 GPODA3/DA3 EN_DFAN1 39
    B RP15 E-MAIL_BTN# 21 Digital To Analog 1 B
    34 E-MAIL_BTN# GPIO08 GPODA4/DA4 WL_OFF# 28
    1 8 IE_BTN# IE_BTN# 22 42 CRY11 R231 2 CRY2
    34 IE_BTN# GPIO09 GPODA5/DA5
    2 7 EMPWR_BTN# 8,15 ENBKL ENBKL 27 47 @ 20M_0603_5%
    GPIO0D GPODA6/DA6

    2
    3 6 E-MAIL_BTN# BKOFF# 28 174
    15 BKOFF# GPIO0E GPODA7/DA7
    4 5 USER_BTN# FSTCHG 48 R232
    43 FSTCHG GPIO10
    EC_SMI# 62 85 PWR_LED PWR_LED 34
    19 EC_SMI# GPIO13 * GPIO18/XIO8CS#
    100K_1206_8P4R_5% IDE_LED# 63 86 PWR_SUSP_LED# PWR_SUSP_LED# 34 0_0402_5%
    21 IDE_LED# USER_BTN# GPIO14 * GPIO19/XIO9CS# BATT_GRN_LED#
    34 USER_BTN# 69 91 BATT_GRN_LED# 34

    1
    +3VS GPIO15 * GPIO1A/XIOACS# BATT_AMB_LED#
    19 EC_SWI# 70 GPIO16 GPIO * GPIO1B/XIOBCS# 92 BATT_AMB_LED# 34
    75 Expanded I/O * GPIO1C/XIOCCS# 93 WL_LED# WL_LED# 34
    34 ARCADE# GPIO17
    1 2 5IN1_LED# 38 MUTE_WOOFER# 109 GPIO24 94 BT_LED# BT_LED# 34 1 1
    R270 10K_0402_5% LID_SW# 118 * GPIO1D/XIODCS# 97 E-MAIL_LED# C249 C262
    35 LID_SW# GPIO25 E-MAIL_LED# 34
    * GPIO1E/XIOECS#

    4
    BT_ON# 119 98 MEDIA_LED# MEDIA_LED# 34
    34 BT_ON# GPIO26 * GPIO1F/XIOFCS#
    SYSON 148 10P_0402_50V8J 10P_0402_50V8J

    OUT
    IN
    24,40,46 SYSON GPIO27 2 2
    SUSP# 149 171 FAN_SPEED1
    +5VALW 15,24,33,40 SUSP# GPIO28 GPIO2E/TOUT1/FANFB1 FAN_SPEED1 39
    VR_ON 155 12 DPLL_TP
    48 VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
    RP17 156 FANTEST_TP/GPIO05/FAN3PWM 11 TEST_TP X3
    22 5IN1_LED# GPIO2A
    EC_SMB_CK1

    NC

    NC
    1 8 162 GPIO2B
    2 7 EC_SMB_DA1 PBTN_OUT# 168 175 EC_THERM#
    19 PBTN_OUT# GPIO2D
    3 6 EC_SMB_CK2 Timer Pin TOUT2/GPIO2F EC_THERM# 19

    3
    4 5 EC_SMB_DA2 55 3
    34 ARCADE_AMB# FnLock#/GPIO12 * E51IT0/GPIO00 EC_RSMRST# 19
    C184 0.1U_0402_16V4Z CAPS_LED# 54 4
    34 CAPS_LED# CapLock#/GPIO011 * E51IT1/GPIO01
    4.7K_1206_8P4R_5% 2 1 NUM_LED# 23 106 E51_RXD 1 2
    34 NUM_LED# NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK EAPD 36
    18 SATA_LED# SATA_LED# 41 107 E51_TXD R196 0_0402_5% 32.768KHZ_12.5P_1TJS125DJ2A073
    +5VS ScrollLock#/GPIO0F * E51TXD/GPIO22/ISPDAT
    +3VALW 2 1 19 ECRST# MISC
    R202 47K_0402_5% 5 158 CRY2
    TP_CLK 18 EC_GA20 GA20/GPIO02 XCLKI CRY1
    2 1 18 EC_KBRST# 6 KBRST#/GPIO03 XCLKO 160
    4.7K_0402_5% R208 31
    GND
    GND
    GND
    GND
    GND
    GND

    ECSCI#
    2 1 TP_DATA
    4.7K_0402_5% R212
    KB910Q B4_LQFP176
    17
    35
    46
    122
    137
    167

    A A
    +3VALW

    2 1 KBA1 1 2 ENBKL
    1K_0402_5% R217 R190 @ 120K_0402_5%
    2 1 KBA4 1 2 DPLL_TP
    1K_0402_5% R221 R214 1K_0402_5%
    2 1 KBA5 1 2 TEST_TP
    1K_0402_5% R224 R215 1K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number R ev
    Custom A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 32 of 50
    5 4 3 2 1
    +3VALW +3VALW
    C155

    1
    1 2 R179
    100K_0402_5%
    SUSP# 15,24,32,40
    0.1U_0402_16V4Z

    2
    G
    5
    U12

    2
    2 1 3

    P
    I0 EC_FLASH# 19
    FWE# 4

    S
    O
    I1 1

    G
    Q14
    TC7SH32FU_SSOP5 2N7002_SOT23

    3
    FWR# 32

    INT_KBD Conn.
    KSI[0..7]
    KSI[0..7] 32,34
    KSO[0..15]
    KSO[0..15] 32

    512KB Flash ROM (Left)


    KSO0 1
    JP9 (Right) KSO15 1
    JP10

    KSO1 1 KSO14 1
    2 2 2 2
    KSO2 3 KSO13 3
    KBA[0..18] KSO3 3 KSO12 3
    32 KBA[0..18] 4 4 4 4
    KSO4 5 KSI0 5
    ADB[0..7] KSO5 5 KSO11 5
    32 ADB[0..7] 6 6 6 6
    KSO6 7 KSO10 7
    KSO7 7 KSI1 7
    8 8 8 8
    KSO8 9 KSI2 9
    +3VALW KSO9 9 KSO9 9
    10 10 10 10
    KSO10 11 KSI3 11
    KSO11 11 KSO8 11
    2 1 12 12 12 12
    C200 0.1U_0402_16V4Z KSO12 13 KSO7 13
    U44 KSO13 13 KSO6 13
    14 14 14 14
    KSI0 15 KSO5 15
    KBA18 KSI1 15 KSO4 15
    1 A18 VDD 32 16 16 16 16
    KBA16 2 31 FWE# KSO14 17 KSO3 17
    KBA15 A16 WE# KBA17 KSI2 17 KSI4 17
    3 A15 A17 30 18 18 18 18
    KBA12 4 29 KBA14 KSI3 19 KSO2 19
    KBA7 A12 A14 KBA13 KSI4 19 KSO1 19
    5 A7 A13 28 20 20 20 20
    KBA6 6 27 KBA8 KSO15 21 KSO0 21
    KBA5 A6 A8 KBA9 KSI5 21 KSI5 21
    7 A5 A9 26 22 22 22 22
    KBA4 8 25 KBA11 KSI6 23 KSI6 23
    KBA3 A4 A11 FR D# KSI7 23 KSI7 23
    9 A3 OE# 24 FRD# 32 24 24 24 24
    KBA2 10 23 KBA10 (Right) (Left)
    KBA1 A2 A10 FSEL# ACES_85202-2405 @ ACES_85202-2405
    11 A1 CE# 22 FSEL# 32
    KBA0 12 21 ADB7
    ADB0 A0 DQ7 ADB6
    ADB1
    13 DQ0 DQ6 20
    ADB5
    ECQ60 for 17" EMW80 for 15.4"
    14 DQ1 DQ5 19
    ADB2 15 18 ADB4
    DQ2 DQ4 ADB3
    16 VSS DQ3 17

    SST39VF040-70-4C-NH_PLCC32
    KSO15 1 2 KSO7 1 2
    C211 @ 100P_0402_50V8J C208 @ 100P_0402_50V8J
    KSO14 1 2 KSO6 1 2
    C214 @ 100P_0402_50V8J C209 @ 100P_0402_50V8J
    KSO13 1 2 KSO5 1 2
    C222 @ 100P_0402_50V8J C216 @ 100P_0402_50V8J
    KSO12 1 2 KSO4 1 2
    C220 @ 100P_0402_50V8J C224 @ 100P_0402_50V8J

    KSI0 1 2 KSO3 1 2
    C229 @ 100P_0402_50V8J C225 @ 100P_0402_50V8J
    KSO11 1 2 KSI4 1 2
    C215 @ 100P_0402_50V8J C212 @ 100P_0402_50V8J
    KSO10 1 2 KSO2 1 2
    +5VALW +5VALW C218 @ 100P_0402_50V8J C219 @ 100P_0402_50V8J
    KSI1 1 2 KSO1 1 2
    C227 @ 100P_0402_50V8J C221 @ 100P_0402_50V8J
    1

    C223 1 2 0.1U_0402_16V4Z
    R213 KSI2 1 2 KSO0 1 2
    C207 @ 100P_0402_50V8J C226 @ 100P_0402_50V8J
    100K_0402_5% KSO9 1 2 KSI5 1 2
    U19 C228 @ 100P_0402_50V8J C213 @ 100P_0402_50V8J
    2

    8 1 KSI3 1 2 KSI6 1 2
    VCC A0 C206 @ 100P_0402_50V8J C205 @ 100P_0402_50V8J
    7 WP A1 2
    6 3 KSO8 1 2 KSI7 1 2
    15,32,44 EC_SMB_CK1 SCL A2
    5 4 C210 @ 100P_0402_50V8J C204 @ 100P_0402_50V8J
    15,32,44 EC_SMB_DA1 SDA GND
    AT24C16N10SC-2.7_SO8
    1

    om
    R210

    100K_0402_5%

    l.c
    2

    ai
    tm
    Security Classification Compal Secret Data Compal Electronics, Inc.

    ho
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    f@
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    Size Document Number Rev

    in
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    xa
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 33 of 50

    he
    MDC Conn.
    JP44

    1 GND1 RES0 2
    ICH_SDOUT_MDC 3 4 +3V_MDC
    18 ICH_SDOUT_MDC IAC_SDATA_OUT RES1
    5 6 +3V_MDC 1 2 R252 20mil
    GND2 3.3V +3VALW
    18 ICH_SYNC_MDC ICH_SYNC_MDC 7 8 0_0603_5% 1
    R539 1 IAC_SYNC GND3
    18 ICH_AC_SDIN1 2 33_0402_5% 9 IAC_SDATA_IN GND4 10
    ICH_RST_MDC# 11 12 ICH_BITCLK_MDC C280
    18 ICH_RST_MDC# IAC_RESET# IAC_BITCLK ICH_BITCLK_MDC 18 1U_0603_10V4Z
    2

    13
    14
    15
    16
    17
    18
    19
    20
    To Media/B Conn. ACES_88012-1200

    13
    14
    15
    16
    17
    18
    19
    20
    Connector for MDC Rev1.5
    <BOM Structure>
    JP13
    +5VALW 1
    2
    BATT_AMB_LED# 3
    32 BATT_AMB_LED# 4
    32 BATT_GRN_LED# BATT_GRN_LED#
    PWR_LED# 5
    PWR_SUSP_LED# 6
    32 PWR_SUSP_LED# 7
    BT_LED#
    32
    32
    BT_LED#
    WL_LED#
    WL_LED#
    KSO17
    8
    9 To TP/B Conn.
    32 KSO17 10
    KSI3
    32,33 KSI3
    32,33 KSI4
    KSI4 11
    12 To LED/B Conn.
    32 5WAY_BTN 13 +5VS
    RCIRRX 14 +5VS JP1
    32 RCIRRX 15
    KSI0 JP12 1 2
    32,33 KSI0 16 1 2
    KSI1 3 4
    32,33 KSI1 17 1 3 4 EMPWR_BTN# 32
    KSI2 5 6
    32,33 KSI2 18 2 32 CAPS_LED# 5 6 IE_BTN# 32
    KSI5 TP_DATA 7 8
    32,33 KSI5 19 32 TP_DATA 3 32 NUM_LED# 7 8 E-MAIL_BTN# 32
    KSO16 TP_CLK 32 MEDIA_LED# 9 10
    32 KSO16 20 32 TP_CLK 4 9 10 USER_BTN# 32
    ARCADE_BTN# 32 E-MAIL_LED# 11 12 +5VALW
    21 5 11 12
    32 ARCADE_GRN# 22 6 35 ON/OFFBTN# 13 13 14 14
    PWR_LED# 15 16
    32 ARCADE_AMB# 23 +5VS 15 16
    ACES_85201-0605
    24 ACES_88018-1610
    ACES_85201-2405 +5VS
    C676

    0.1U_0402_16V4Z C15

    0.1U_0402_16V4Z

    1 2 +5VALW
    +3VALW
    R251 100K_0402_5%
    D14
    2 C322
    Bluetooth Conn.
    ARCADE# 32 +3VALW
    ARCADE_BTN#1
    3 51ON# 0.1U_0402_16V4Z
    51ON# 35,41
    DAN202U_SC70
    1
    C392
    +BT_VCC
    1U_0603_10V4Z

    3
    S
    2 JP2
    G
    32 BT_ON# 2 1 1
    Q22 2
    SI2301BDS_SOT23 2
    19 USB20_P5 3 3
    KSO16 KSO17 D 19 USB20_N5 4 4
    5

    1
    5
    KSI0 VOL_UP LEFT W=40mils 28 WLAN_BT_DATA 6 6
    PWR_LED# +BT_VCC 7
    28 WLAN_BT_CLK 7
    KSI1 RIGHT VOL_DOWN 8 8
    1
    1

    D C403 ACES_87213-0800
    KSI2 PLAY ENTER
    32 PWR_LED 2 Q38 C397
    G 2N7002_SOT23 KSI3 STOP BT_EN# 4.7U_0805_10V4Z
    S 2 0.1U_0402_16V4Z
    3

    KSI4 REV WL_EN#


    KSI5 NEXT

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 34 of 50
    A B C D E

    RTC Battery
    ON/OFF switch Lid Switch
    TOP Side
    - BATT1 + +RTCBATT

    1 2 1 +RTCBATT 1
    2 1
    J1 JOPEN +3VALW
    2 1
    J2 JOPEN +3VALW 45@ RTCBATT

    1
    Button Side

    1
    D31
    R23

    2
    100K_0402_5% BAS40-04_SOT23
    R381 +RTCVCC

    2
    100K_0402_5%
    SW1

    1
    D23 3 1 LID_SW# 32 CHGRTC
    2 ON/OFF 32 1
    ON/OFFBTN# 1
    34 ON/OFFBTN#
    3 51ON#
    51ON# 34,41
    For 17" C655

    3
    0.1U_0402_16V4Z
    DAN202U_SC70 (Left) 4 2
    2

    MPU-101-81_4P

    D7

    1
    @ PSOT24C_SOT23

    SW2
    3 1
    +3VALW

    1
    2 2 2
    C410 D24
    2

    4 2
    R393 1 1000P_0402_50V7K RLZ20A_LL34 @ MPU-101-81_4P
    4.7K_0402_5% 1

    2
    1

    EC_ON 1 2 2
    32 EC_ON
    R386
    33K_0402_5%

    Q25
    3

    DTC124EK_SC59
    1

    D
    Q27 2
    G
    2N7002_SOT23 S
    3

    3 Power ON Circuit 3

    +3VS +3VS

    +3VALW +3VALW +3VALW +3VALW


    1

    U16A U16B R199 1


    R209 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
    14

    14

    14

    14
    180K_0402_5% 10K_0402_5% U16C U16D
    P

    P
    2

    1 I O 2 3 I O 4 SYS_PWROK 19 5 I O 6 9 I O 8 VS_ON 45
    2
    G

    G
    +3VALW POWER +3VALW POWER C185
    2 For South Bridge For +VCCP/+1.05VS
    7

    7
    C203 R206 0.1U_0402_16V4Z SN74LVC14APWLE_TSSOP14
    1U_0805_25V4Z 1 SN74LVC14APWLE_TSSOP14
    1 100K_0402_5%

    om
    4 4

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 35 of 50
    A B C D E
    A B C D E F G H

    +VDDA
    28.7K for Module Design (VDDA = 4.702)

    1
    R192 +5VAMP (output = 250 mA)
    10K_0402_5% 60mil U22
    R207 +5VS
    L15 1 2 4 VIN VOUT 5 40mil +VDDA
    C194 1 2 1 2 KC FBM-L11-201209-221LMAT_0805
    32 BEEP#

    2
    1U_0603_10V4Z 560_0402_5% 1 1 2 6 R242 1 4.85V
    L16 1 C656 C266 DELAY SENSE or ADJ 30K_0402_1%
    1 2 2
    C178 1U_0603_10V4Z KC FBM-L11-201209-221LMAT_0805 7 1 C661
    ERROR CNOISE

    1
    10U_1206_16V4Z 10U_1206_16V4Z
    R197 2 2
    0.1U_0402_16V4Z 2
    1 8 3 1 1

    1
    10K_0402_5% SD GND C265
    +3VALW SI9182DH-AD_MSOP8
    C201

    1
    2
    2
    1 2 0.1U_0402_16V4Z C186
    1 2 MONO_IN R244
    0.1U_0402_16V4Z 10K_0402_1%
    14

    1U_0603_10V4Z

    2
    1
    C 1 2
    P

    C182 1 R201 Q15


    22 PCM_SPK# 11 I O 10 2 1 2 2 R200
    1U_0603_10V4Z 560_0402_5% B 2SC2411K_SC59 2.4K_0402_5%
    G

    U16E E

    3
    SN74LVC14APWLE_TSSOP14
    7

    C192 1 R203
    2 1 2
    1U_0603_10V4Z 560_0402_5%

    1
    +3VALW D12
    R198 RB751V_SOD323
    10K_0402_5%
    14

    2
    P

    19 SB_SPKR 13 I O 12

    HD Audio Codec
    G

    U16F
    SN74LVC14APWLE_TSSOP14
    7

    +AVDD_AC97
    2
    20mil 0.1U_0402_16V4Z 2
    +3VS
    L22 1 2 0.1U_0402_16V4Z 40mil 1 1 1
    +VDDA
    FBM-L11-160808-800LMT_0603 1 1 1 C498
    C504 C443 C470 C452
    C426 10U_1206_16V4Z
    10U_1206_16V4Z 2 2 2

    25

    38

    9
    2 2 2 U39 1 1
    0.1U_0402_16V4Z 0.1U_0402_16V4Z

    AVDD1

    AVDD2

    DVDD1

    DVDD2
    C491 C454
    @ 1000P_0402_50V7K @1000P_0402_50V7K
    2 2
    1 2 AUX_C_L 14 35 AMP_LEFT
    29 TV_AUDIO_L LINE2_L LINE_OUT_L AMP_LEFT 37,38
    C82 1U_0603_10V4Z
    1 2 AUX_C_R 15 36 AMP_RIGHT
    29 TV_AUDIO_R LINE2_R LINE_OUT_R AMP_RIGHT 37,38
    C81 1U_0603_10V4Z
    16 MIC2_L MONO_O 37

    17 MIC2_R HP_OUT_L 39
    LINE_L 1 2 LINE_C_L 23 41 1 2
    37 LINE_L LINE1_L HP_OUT_R
    C531 1U_0603_10V4Z C487 27P_0402_50V8J
    LINE_R 1 2 LINE_C_R 24
    37 LINE_R LINE1_R
    R464 2 1 20K_0402_5% C532 1U_0603_10V4Z 6
    21 INT_CD_L BIT_CLK ICH_BITCLK_AUDIO 18
    R463 2 1 6.8K_0402_5% CD_L_R 1 2 CD_L_RC 18
    R467 6.8K_0402_5% C526 1U_0603_10V4Z CD_L R444
    2 1 SDATA_IN 8 1 2 33_0402_5% ICH_AC_SDIN0 18
    R468 2 1 20K_0402_5% CD_R_R 1 2 CD_R_RC 20
    21 INT_CD_R CD_R
    C529 1U_0603_10V4Z 2 R440 1 2 @ 0_0402_5%
    GPIO2 CLK_14M_CODEC 13
    R470 2 1 20K_0402_5% CD_AGND_R 1 2 CD_AGND_RC19
    3 21 CD_AGND CD_GND 3
    C527 1U_0603_10V4Z
    MIC1_L 1 2 MIC1_C_L 21
    37 MIC1_L MIC1_L
    1

    C80 1U_0603_10V4Z
    R478 R469 MIC1_R 1 2 MIC1_C_R 22 3
    37 MIC1_R MIC1_R GPIO3
    C78 1U_0603_10V4Z
    0_0402_5% 6.8K_0402_5% 13 29
    SENSE A LINE1_VREFO
    2

    MONO_IN 12 30
    PC_BEEP MIC2_VREFO

    MIC1_VREFO_L 28 10mil MIC1_VREFO_L


    18 ICH_RST_AUDIO# 11 RESET#
    27 AC97_VREF 10mil
    VREF
    18 ICH_SYNC_AUDIO 10 SYNC 1
    C497
    5
    MIC1_VREFO_R 32 10mil MIC1_VREFO_R
    18 ICH_SDOUT_AUDIO SDATA_OUT 10U_0805_10V4Z
    2
    1 2 45 NC LINE2_VREFO 31
    R516 0_0603_5% 46 33
    NC DCVOL
    SENSE B 34
    2

    32 EAPD 47 SPDIFI/EAPD GPIO0 43


    1 2 R417 44
    R407 0_0603_5% @ 0_0402_5% GPIO1
    37 SPDIF 48 SPDIFO
    LFILT 40
    4 26
    1

    DVSS1 AVSS1

    1
    1 2 7 DVSS2 AVSS2 42
    R525 0_0603_5% R419
    ALC260D_LQFP48 20K_0402_1%

    4 2 4
    DGND AGND
    GND GNDA

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 36 of 50
    A B C D E F G H
    A B C D E

    +5VAMP

    1
    +5VAMP
    +5VAMP R507 JP43
    W=40mil 100K_0402_5% SPKL+ R238 1 2 0_0603_5% SPK_L+
    1

    1
    SPKL- R237 1 2 0_0603_5% SPK_L-
    R120 SPKR+ R236 0_0603_5% SPK_R+ 2
    1 2

    2
    8.2K_0402_5% SHUTDOWN# SPKR- R235 0_0603_5% SPK_R- 3
    1 1 1 2 4
    Q29

    1
    C593 C563 D 2N7002_SOT23 ACES_85204-0400
    20mil
    2 VOL_AMP
    (0.77V -> 8dB )
    0.1U_0402_16V4Z
    2 2
    4.7U_0805_10V4Z
    G
    2 EC_MUTE 32,38 Speaker Conn.
    1 1
    1

    3
    R110
    1.5K_0402_1%
    U7
    7 22 R108 2 1 100K_0402_5% +5VAMP
    2

    PVDD SHUTDOWN# NBA_PLUG


    18 PVDD SE/BTL# 15
    19 VDD PC-BEEP 14 1 2
    11 BYPASS C99 0.1U_0402_16V4Z
    NBA_PLUG BYPASS SPKL- BYPASS 38
    38 NBA_PLUG 2 HP/LINE# LOUT- 9
    VOL_AMP 3 16 SPKR-
    SPKL+ VOLUME ROUT-
    4 LOUT+ LBYPASS 10
    SPKR+ 21 8
    AMP_LEFT_CR AMP_LEFT_C ROUT+ RBYPASS
    36,38 AMP_LEFT 1 2 1 2 5 LLINEIN
    C603 0.47U_0603_16V4Z C137 1U_0603_10V4Z AMP_RIGHT_C 23 1 20mil 2 2 2
    AMP_RIGHT_CR HP_L RLINEIN GND
    36,38 AMP_RIGHT 1 2 1 2 6 LHPIN GND 12
    C88 0.47U_0603_16V4Z C94 1U_0603_10V4Z HP_R 20 13 C588 C135
    RHPIN GND 1U_0603_10V4Z C589 1U_0603_10V4Z
    GND 24
    1 1 1
    1 2 17 CLK
    C138 1U_0603_10V4Z 1U_0603_10V4Z
    1 2 APA2121PI-TR_TSSOP24
    C95 1U_0603_10V4Z 1
    1
    1

    C97
    1

    R160 C594 0.047U_0402_16V4Z


    R106 @ 1K_0402_5% 2
    @ 1K_0402_5% 2 0.1U_0402_16V4Z
    C523 C557
    S/PDIF Out JACK
    2

    HPF Fc = 338Hz
    2

    2 330P_0402_50V7K 330P_0402_50V7K 2
    JP27 JP6
    SPKR+ 2 HPOUT_R_1 2 HPOUT_R_2 HPOUT_R_4 HPOUT_R_4
    +

    1 1 1 2 1 1
    C104 150U_D2_6.3VM R474 0_0603_5% L10 FBM-11-160808-700T_0603 2 2
    SPKL+ 2 HPOUT_L_1 2 HPOUT_L_2 HPOUT_L_4 HPOUT_L_4
    +

    1 1 1 2 6 6
    C132 150U_D2_6.3VM R457 0_0603_5% L11 FBM-11-160808-700T_0603 3 3

    +5VAMP 2 1 SPDIF_PLUG# 5 SPDIF_PLUG# 5


    R405 10K_0402_5%
    +5VAMP +5VAMP 4 4
    SPDIF 7 SPDIF 7
    36 SPDIF
    +5VSPDIF 8 +5VSPDIF 8
    1

    10 10
    3

    S
    R156 G
    10K_0402_5% 2 SPDIF_PLUG# 9 9
    Q28 @ ACES_20234-0101 ACES_20234-0101
    2

    NBA_PLUG SI2301BDS_SOT23
    D
    1
    1

    D
    2 SPDIF_PLUG#
    G Q9
    Headphone JACK
    2N7002_SOT23
    +5VSPDIF 20mil JP31 JP7
    S
    3

    5 5

    4 4
    LINE_R 1 2 L26 LINE_R_R 3 LINE_R_R 3
    36 LINE_R
    FBM-11-160808-700T_0603 6 6
    3 LINE_L L25 LINE_L_R LINE_L_R 3
    36 LINE_L 1 2 2 2
    FBM-11-160808-700T_0603 1 1

    1 1 @ SUYIN_010164FR006G118ZL SUYIN_010164FR006G118ZL

    C701 C702
    220P_0402_50V7K 220P_0402_50V7K
    2 2

    MIC1_VREFO_R
    MIC1_VREFO_L

    10mil 10mil 1
    MIC/LINE-IN JACK
    1

    R520
    Int MIC Conn. R506
    4.7K_0402_5%
    4.7K_0402_5%
    5
    JP34
    5
    JP8
    2

    15mil
    2

    JP5 INT_MIC_R 4 INT_MIC_R 4


    4 MIC1_R L31 MIC1_R_1 MIC1_R_1
    3 15mil INT_MIC_L
    36 MIC1_R 1 2
    FBM-11-160808-700T_0603
    3
    INT_MIC_L
    3
    2 6 6
    MIC1_L 1 2 L28 MIC1_L_1 2 MIC1_L_1 2
    1 36 MIC1_L
    FBM-11-160808-700T_0603 1 1
    ACES_85204-0400 1 1
    @ SUYIN_010164FR006G118ZL SUYIN_010164FR006G118ZL

    om
    C597 C620
    220P_0402_50V7K 220P_0402_50V7K
    4 2 2 4

    l.c
    JP3

    ai
    INT_MIC_L
    1

    tm
    2
    @ ACES_85204-0200

    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 37 of 50
    A B C D E
    A B C D E

    +5VAMP

    C613 1U_0603_10V4Z
    BYPASS 1 2
    37 BYPASS
    C623 1 2 0.68U_0603_10V6K
    1 2 U11A

    8
    C169 TLV2462CDR_SO8 +5VAMP

    8
    0.1U_0402_16V4Z 3 R523 R524

    P
    + C614
    1 2 1 2 1 5

    P
    1 1
    O +
    36,37 AMP_LEFT 1 2 2 1 R184 1 2 C173 2 -
    1K_0402_5% 1K_0402_5%
    O 7 2 1 MIX_OUT

    G
    C483 1U_0603_10V4Z 100K_0402_5% 6 - 10mil

    G
    1 2 2 1 R188 1U_0603_10V4Z U11B 0.22U_0603_10V7K

    4
    36,37 AMP_RIGHT C466 1U_0603_10V4Z 100K_0402_5% TLV2462CDR_SO8
    2

    4
    C624
    2 1
    R181 0.47U_0603_16V4Z
    43K_0402_5% 1

    BYPASS

    10mil

    fo= 725 Hz

    2 +5VAMP 2
    Fc(high)= 33.8Hz Sub Woofer Conn.
    R175 U10 JP42
    MIX_OUT 2 1 WOOFER_IN 1 IN VO- 8 WOOFER- 30mil 1
    20K_0402_5%
    MUTEWOOFER# 2
    32 MUTE_WOOFER# 1 2 2 SD# GND 7
    R173 10K_0402_5% ACES_85204-0200
    3 VDD SE/BTL# 6

    1
    D WOOFER+
    4 BYPASS VO+ 5
    2 Q30
    37 NBA_PLUG
    1

    1
    D G 2N7002_SOT23 TPA0211DGN_MSOP8
    2 2
    2 Q12 S R185
    32,37 EC_MUTE

    3
    G 2N7002_SOT23 C149 C148
    S 100K_0402_5%
    3

    0.1U_0402_16V4Z 1 1 0.47U_0603_16V4Z

    2
    +5VAMP

    2 1
    C627
    3 0.1U_0402_16V4Z 3

    6
    U42
    WOOFER_IN 3

    VDD
    IN+
    5 WOOFER+
    VO+
    2 1 4 IN-
    1 R518 10K_0402_5%

    C615 MUTEWOOFER# 1 8 WOOFER-


    SHUTDOWN VO-
    0.47U_0603_16V4Z

    GND
    2
    2 BYPASS
    1 @ TPA6211A1DGNR_PMSOP8

    7
    C619
    2
    0.22U_0603_10V7K

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 38 of 50
    A B C D E
    FAN Conn
    +VSB
    +5VS

    1 2
    C654
    0.1U_0402_16V4Z

    8
    1

    1
    P

    1
    EN_DFAN1 3 C Q35 D10 C635
    32 EN_DFAN1 +IN 10U_1206_16V4Z
    1 EN_FAN1 1 2 2 FMMT619_SOT23 1SS355_SOD323
    OUT B 2
    2 1 2 -IN R526 2 E

    2
    G
    R540 U45A 100_0402_5%
    10K_0402_5% LM358ADR_SO8 C626 +VCC_FAN1 40mil
    4
    0.1U_0402_16V4Z JP37

    1
    1 +VSB
    D29 3
    2
    1 2 1
    R541 8.2K_0402_5% 1N4148_SOT23 U45B
    ACES_85205-0300 5 +IN

    2
    OUT 7
    6 -IN
    +3VS R204 1 2 10K_0402_5% LM358ADR_SO8

    32 FAN_SPEED1
    2 2 1
    C181
    C183 C634
    1000P_0402_50V7K 10U_1206_16V4Z
    1 1
    1000P_0402_50V7K 2

    +5VS
    U20
    1 VEN GND 8
    2 VIN GND 7
    +VCC_FAN1 3 6
    EN_DFAN1 VO GND
    4 VSET GND 5
    @ G993P1U_SOP8L

    H2 H21 H26 H33 H27 H3 H6 H28 H8 H20


    H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D173 H_S354D126 H_S354D126 H_S354D126
    1

    1
    FD1 FD2 FD3 FD4 FD5 FD6

    H5 H31 H16 H4 H32 H9 H35 H30 H7 H25

    1
    H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126 H_S354D126
    1

    CF4 CF1 CF14 CF12 CF5 CF13 CF9 CF8 CF10 CF3

    1
    H10 H12 H18 H19 H23 H22 H15 H14
    H_C315D161 H_C315D161 H_C315D173 H_C315D173 H_C315B165D165 H_C315B165D165 H_C315B165D165 H_C315B165D165
    CF6 CF7 CF11 CF2
    1

    1
    H17 H29 H13 H24 H11 H34
    H_C276D161 H_C276D161 H_S354BC276D126 H_C173D173N H_O196X173D196X173N H_O266X70D236X40
    1

    om
    l.c
    ai
    tm
    Security Classification Compal Secret Data Compal Electronics, Inc.

    ho
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    f@
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    Size Document Number Rev

    in
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    xa
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 39 of 50

    he
    A B C D E

    +5VALW

    2
    R528
    100K_0402_5%

    1
    SYSON#
    31 SYSON#
    1
    +5VALW TO +5VS +1.5VALW TO +1.5VS 1

    1
    D
    +5VALW +5VS +1.5VALW +1.5VS SYSON 2 Q33
    24,32,46 SYSON
    G 2N7002_SOT23
    U28 U24 S

    3
    1
    8 D S 1 8 D S 1
    7 D S 2 7 D S 2

    2
    6 3 1 1 6 3 1 1 R521
    D S C354 C360 R571 D S C311 C318 R248 100K_0402_5%
    1 1 5 D G 4 1 1 5 D G 4
    C365 C359 470_0603_5% C310 C317 @470_0603_5%

    2
    SI4800BDY_SO8 1U_0603_10V4Z SI4800BDY_SO8 10U_0805_10V4Z
    10U_0805_10V4Z 2
    10U_0805_10V4Z 2 10U_0805_10V4Z 2 2
    AOS 4422 AOS 4422

    1
    2 2
    10U_0805_10V4Z 2 2
    10U_0805_10V4Z 1U_0603_10V4Z

    1
    D D
    2 SUSP 2 SUSP
    G G
    +VSB 2 1 5VS_GATE S Q39 +VSB 2 1 1.5VS_GATE S Q17

    3
    R570 100K_0402_5% 2N7002_SOT23 R551 @ 2N7002_SOT23
    1 180K_0402_5% 1
    1

    1
    SUSP C696 D C674
    2
    Q40G 0.1U_0402_16V4Z SUSP 2 0.1U_0402_16V4Z
    2N7002_SOT23 S 2 G 2
    3

    Q37 S

    3
    2N7002_SOT23

    +5VALW

    2 2

    2
    R527
    100K_0402_5%

    1
    SUSP
    47 SUSP

    1
    D
    2 Q32
    15,24,32,33 SUSP#
    G 2N7002_SOT23
    S

    3
    1
    R522
    100K_0402_5%

    2
    +3VALW TO +3VS
    +1.8V to +1.8VS
    +3VALW +3VS +1.8V +1.8VS

    U23 U41
    8 D S 1 8 D S 1
    7 D S 2 7 D S 2 1 1
    2

    2
    6 3 1 1 6 3 C612 C621
    3 D S C283 C282 R245 D S R519 3
    1 1 5 D G 4 1 1 5 D G 4
    C294 C295 470_0603_5% C636 C631 @470_0603_5%
    SI4800BDY_SO8 1U_0603_10V4Z PM@ SI4800BDY_SO8 2 2
    2 2 PM@ 10U_0805_10V4Z PM@ 10U_0805_10V4Z
    AOS 4422 AOS 4422
    1 1

    1
    2 2
    10U_0805_10V4Z 10U_0805_10V4Z 2 PM@ 10U_0805_10V4Z
    2 PM@ 1U_0603_10V4Z
    10U_0805_10V4Z D

    1
    D
    2 SUSP
    G 2 SUSP
    S Q16 G
    3

    5VS_GATE 2N7002_SOT23 +VSB 2 1 1.8VS_GATE S Q31

    3
    R531 @ 2N7002_SOT23
    PM@ 180K_0402_5% 1
    C630
    1

    D
    SUSP 2 PM@ 0.1U_0402_16V4Z
    G 2
    Q34 S
    3

    PM@ 2N7002_SOT23

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 40 of 50
    A B C D E
    A B C D

    ADPIN PL1 VIN


    PJP1
    FBM-L18-453215-900LMA90T_1812
    1 1 2

    1
    1
    G 2 PR1 PR2 1

    12P_0402_50V8J
    560P_0402_50V7K
    G 10_1206_5% 1K_1206_5%

    12P_0402_50V8J

    560P_0402_50V7K
    3 1 2

    1
    PC1

    1 2
    PC2

    PC4

    PC3
    SINGA_2DC-G756I200
    PR3

    2
    PD1 VIN PD2 1K_1206_5% PQ1
    RLZ24B_LL34 2 1 1 2 3 TP0610K_SOT23
    1
    1N4148_SOD80 PR4

    2
    1K_1206_5%
    1 2

    470K_0402_5%

    470K_0402_5%
    1

    1
    PR5
    PR7

    PR6
    1K_1206_5%

    2
    1 2

    2
    VIN

    2
    PD3

    1
    1N4148_SOD80
    PD4 PR8

    1
    RB751V_SOD323 470K_0402_5%

    1
    PQ2
    2 1 PR9 DTC115EUA_SC70

    1 2
    BATT+

    1
    2 33_1206_5% 32,43 ACOFF 2 2

    PQ4 VS PQ3
    TP0610K_SOT23 DTC115EUA_SC70
    B+
    2 2

    3
    CHGRTCP 3 1
    0.22U_1206_25V7K
    1

    3
    1

    PR10
    PC5

    100K_0402_5% PC6
    0.1U_0603_25V7K
    2

    PR11
    2

    22K_0402_5% PR12
    34,35 51ON# 1 2 VL 2.2M_0402_5%
    2 1

    1
    VS PR13
    499K_0402_1%

    1
    1

    PR14

    2
    RTCVREF PR15 100K_0402_1%
    PU1 200_0805_5%
    3.3V G920AT24U_SOT89

    8
    18,42,44 MAINPWON PD5 PU2A
    2

    PR16 PR17 2 3

    P
    3 3
    +
    1 2 1 2 3 OUT IN 2 1 1 O

    0.01U_0402_25V7Z
    CHGRTC 43 ACON 3 2
    -
    1

    1
    4.7U_0805_6.3V6K

    560_0603_5% 560_0603_5%
    1

    1
    GND
    PC8

    PC9
    1000P_0402_50V7K
    PC7 RB715F_SOT323 LM393M_SO8 PR18

    4
    1

    1
    1U_0805_25V4Z 191K_0402_1%
    2

    PC11
    PC10 PR19
    2

    2
    0.1U_0603_25V7K

    PRG++ 2

    2
    499K_0402_1%

    ACIN RHU002N06_SOT323
    PJ1 PJ2 PR20 PQ5 PR21
    Precharge detector

    1
    34K_0402_1% D 47K_0402_5%
    +1.5VALWP 1 2 +1.5VALW +1.8VP 1 2 +1.8V
    PAD-OPEN 3x3m
    Min. typ. Max. RTCVREF 2 1
    G
    2 2 1
    PACIN 43
    PAD-OPEN 3x3m

    1
    H-->L 14.589V 14.84V 15.243V S

    3
    (2.5A,100mils ,Via NO.=5) (6A,240mils ,Via NO.= 12)

    1
    PQ6
    PJ3 PJ4 L-->H 15.562V 15.97V 16.388V PR22 DTC115EUA_SC70
    1 2 +5VALW 1 2 +0.9VS 66.5K_0402_1% 2 +5VALWP
    +5VALWP +0.9VSP
    @
    BATT ONLY
    PAD-OPEN 3x3m PAD-OPEN 3x3m

    2
    (5A,200mils ,Via NO.= 10) (0.3A,40mils ,Via NO.= 2) Precharge detector

    3
    Min. typ. Max.

    om
    PJ5 PJ6
    4 1 2 +3VALW +2.5VSP 1 2 +2.5VS
    H-->L 6.138V 6.214V 6.359V 4
    +3VALWP

    l.c
    L-->H 7.196V 7.349V 7.505V

    ai
    PAD-OPEN 3x3m PAD-OPEN 3x3m

    tm
    (4.5A,180mils ,Via NO.= 9) (0.3A,40mils ,Via NO.= 2)

    ho
    PJ7 PJ8
    1 2 +1.05VS +VSBP 1 2 +VSB
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    +1.05VSP
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    PAD-OPEN 3x3m PAD-OPEN 3x3m SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    xa
    (2A,80mils ,Via NO.= 4) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 41 of 48
    A B C D
    A B C D

    B+

    FBM-L11-322513-151LMAT_1210
    2
    PL2

    PC12 PC13
    1

    0.1U_0603_25V7K 0.1U_0603_25V7K

    2
    1 2 BST5B BST3B 1 2
    PD6
    1 B+++ CHP202U_SC70 1
    2200P_0402_50V7K

    PQ7 VL

    4.7U_1206_25V6K
    8 1

    1
    G2 D2
    7 D1/S2/K D2 2
    1

    2
    PC15

    6 3 DL5 PQ8
    D1/S2/K G1
    PC14

    5 4 PR23 B+++ AO4912_SO8


    D1/S2/K S1/A

    47_0402_5%
    0_0603_5% B+++
    2

    PR26 1

    1
    4.7_1206_5%

    4.7_1206_5%

    2200P_0402_50V7K
    1 D2 G2 8

    4.7U_1206_25V6K
    PR24
    AO4912_SO8 PR27 PC16 2 7

    1
    D2 D1/S2/K

    PR25
    0_0603_5% 0.1U_0603_25V7K 3 6

    2
    G1 D1/S2/K

    1
    5HG 1 2 DH5 4 5

    1
    S1/A D1/S2/K

    PC17

    PC18
    1 2

    2
    1U_1206_25V7K
    @

    2
    PC19

    0.1U_0603_50V4Z
    LX5
    VL PR28

    2
    0_0603_5%
    2VREF_1999
    10UH_D104C-919AS-100M_4.5A_20%

    4.7U_0805_10V4Z

    1 PC22
    3HG

    1
    1U_0805_16V7K

    499K_0402_1% 200K_0402_1%

    200K_0402_1%
    1

    2
    PC20

    PR29

    PR30
    1
    BST3A

    PC21
    LX3

    2
    PR31

    2
    0_0603_5%

    2 1

    2 1
    2

    18

    20

    13

    17
    PL3

    10UH_D104C-919AS-100M_4.5A_20%
    PR32

    499K_0402_1%
    BST5A 14

    V+
    LD05

    TON

    VCC

    1
    BST5

    PR33
    2
    ILIM3 5 2

    16 DL3
    DH5
    +5VALWP
    1

    2
    15 LX5
    19 DL5 ILIM5 11

    PL4
    21 OUT5
    9 PU3 28
    FB5 BST3
    10.2K_0402_1%

    1 26 DH3
    N.C.MAX8734AEEI+_QSOP28 DH3
    2

    24

    1
    DL3
    PR34

    6 SHDN# LX3 27
    VS 4 22
    1 ON5 OUT3
    1 2 3 ON3
    150U_D_6.3VM

    + @ PR35 7
    1

    FB3
    PC23

    0_0402_5% 12 2 +3VALWP
    SKIP# PGOOD
    2 2VREF_19998

    PRO#

    @ 3.57K_0402_1%
    LDO3
    PR37

    GND
    REF
    2

    2
    0_0402_5%

    PZD1 47K_0402_5% PR38


    PR36

    PR39
    1 2 1 2 1 2

    23

    25

    10
    2

    0.047U_0603_16V7K

    0.22U_0603_10V7K
    100K_0402_5%

    RLZ5.1B_LL34 0_0402_5% 1
    PR40

    PC24

    4.7U_0805_10V4Z
    1

    1
    1

    PC26
    + PC25
    2

    150U_D_6.3VM

    2
    PC27
    44 SPOK
    1

    2
    2

    PR42
    0_0402_5%
    PR41
    0_0402_5%

    2
    PR43

    1
    1 2
    3
    <BOM Structure> 3

    47K_0402_5%
    1

    PC28
    0.047U_0603_16V7K
    +5V Ipeak = 6.66A ~ 10A
    2

    +3.3V Ipeak = 6.66A ~ 10A

    MAINPWON 18,41,44
    1

    PC29
    1U_0603_16V6M
    2

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    Custom A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 42 of 48
    A B C D
    A B C D E

    Iadp=0~4.74A(90W) Fosc=14100/Rt=14100/47=300KHz Charger


    P2

    PQ9 PQ10 B+ PL5 CHG_B+ PQ11


    AO4407_SO8 AO4407_SO8 PR44 AO4407_SO8
    8 1 1 8 0.015_2512_1% FBM-L18-453215-900LMA90T_1812 1 8
    VIN 7
    6
    2
    3
    2
    3
    7
    6
    2 1 1 2 2
    3
    7
    6

    2200P_0402_25V7K
    0.1U_0603_25V7K
    5 5 5

    4.7U_1206_25V6K

    4.7U_1206_25V6K
    1

    1
    1 P2 1

    4
    1
    0.1U_0603_25V7K

    PC30

    PC31

    PC32

    PC33
    1
    PR45

    2
    PC34
    200K_0402_1%
    1

    PR47

    2
    PR46 47K_0402_1%

    2
    47K_0402_5% 1 2
    VIN

    1
    0_0603_5%

    10K_0402_1%
    2

    2
    PR48
    PQ12
    DTA144EUA_SC70 PU4
    47K

    PR49
    1 -INC2 +INC2 24

    3
    2
    1
    2 PR50 PC35 PR51

    2
    47K
    10K_0402_1% 4700P_0402_25V7K 100K_0402_1%

    1
    MB39A126 1 2 1 2 2 1 2 23 ACOFF#
    OUTC2 GND PC36 PQ13
    4
    0.22U_0603_16V7K AO4407_SO8

    1
    3 22 CS 1 2
    1

    +INE2 CS
    1

    PC37 PQ14

    59K_0603_1%
    0.1U_0603_25V7K DTC115EUA_SC70

    20K_0402_1%
    0.01U_0402_25V7Z

    4 -INE2 VCC 21 1 2

    1
    PR53
    2 ACOFF ACOFF 32,41

    5
    6
    7
    8
    1
    PC38

    2 PQ15 PR52
    DTC115EUA_SC70 5 20
    ACOK OUT PC39
    2

    0.1U_0603_25V7K
    2

    3
    150K_0402_5%

    VREF_MB3887

    LXCHRG
    6 19 1 2
    3

    VREF VH
    1

    0.22U_0603_16V7K
    RHU002N06_SOT323
    PQ16

    PR54

    PL6
    1

    1
    D MB39A127_ACIN PACIN PR55
    7 18
    ACIN XACOK VIN
    PC40

    PR56 PC41 PR57 15U_SPC-1204P-150_4A_20% 0.02_2512_1%


    2
    G 1K_0402_1% 2200P_0402_25V7K 47K_0402_1% 1 2 1 2 BATT+ BATT+
    2

    2 MB39A1261 2
    S 2 1 2 8 17 1 2
    3

    -INE1 RT

    1
    PD7

    4.7U_1206_25V6K

    4.7U_1206_25V6K

    4.7U_1206_25V6K
    9 +INE1 -INE3 16
    PR58 PR59 PR60 PC42 PR161 EC31QS04

    1
    PC43

    PC44

    PC45
    205K_0402_1% 10K_0603_1% 33K_0402_1% 1500P_0603_50V7K 47K_0402_5%
    32 IREF

    2
    1 2 2 1 10 15 MB39A126 1 21 2
    OUTC1 FB123
    1

    PQ17 D

    2
    0.01U_0402_25V7Z

    2
    1
    120K_0603_1%

    G RHU002N06_SOT323 VREF_MB3887 11 14
    SEL CTL
    1
    PR61

    PC46

    S PC47
    3

    1
    10P_0402_50V8J
    12 13 1 2 PR62
    2

    -INC1 +INC1 47K_0402_5%


    2

    IREF=1.31*Icharge MB39A126PFV-ER_SSOP24

    2
    PD8 IREF=0.73~3.3V
    ACOFF# 1 2

    1N4148_SOD80
    PR63
    22K_0402_5% +3VALWP
    PACIN 1 2 PC48
    CS 47P_0402_25V8K
    1

    1 2
    PR162
    1

    47K_0402_5%
    ACON
    2

    3 PQ33 3
    2
    DTC115EUA_SC70
    LI-4S :17.8V----BATT-OVP=1.9758V
    1

    CC=3.046A
    BATT-OVP=0.111*BATT+ (120K/(205K+120K))*3.3V=1.2184V
    3

    2 PQ34 1.2184/(20*0.02)=3.046A
    32 FSTCHG DTC115EUA_SC70 PU5B BATT+
    LM358A_SO8

    1
    5 VS
    3

    + PR64
    7 0
    6 845K_0603_1%
    -

    0.01U_0402_25V7Z
    VIN VIN

    2
    CP Point=4.216A

    PC49

    1
    5V*(59K/(20k+59k))=1.265V
    0_0402_5%

    PR66

    2
    1

    300K_0603_0.1% 1.265V/(20*0.015)=4.216A
    PR65

    PU5A
    Vin Detector LM358A_SO8

    2
    8
    3

    P
    2

    +
    L->H 18.49 17.92 17.35 1 0
    1
    118K_0402_0.1%

    32 BATT_OVP G - 2
    PR67 H->L 17.17 16.64 16.11
    1

    1
    10K_0402_5%
    4

    1
    PR68

    PC50 PR69
    143K_0402_1% PC51
    Charge voltage
    2

    0.01U_0402_25V7Z
    @ 0.01U_0402_25V7Z 4S CC-CV MODE : 16.8V

    om
    2
    1 2 PR70
    2

    2
    4 10K_0402_5% VCHG is H 4

    l.c
    MB39A127_ACIN PACIN 1 2
    ACIN 19,32

    ai
    10K_0402_0.1%

    1
    1000P_0402_50V7K

    RLZ4.3B_LL34

    tm
    1 2
    1

    PC131

    PR72
    PZD2
    PR73

    10K_0402_5%

    ho
    @ 10K_0402_1%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2

    PR71

    f@
    2

    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title


    2

    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 43 of 48
    A B C D E
    A B C D

    @ PR74
    100K_0402_5%

    1 2
    PH1 under CPU botten side :
    +3VALWP
    BATT+ BATT++ CPU thermal protection at 80 degree C
    @ PR75
    PL7 1K_0402_5%
    Recovery at 44(45) degree C

    BATT+
    2 1
    FBM-L18-453215-900LMA90T_1812 6C/8C# 32
    1 2 BATT++
    1
    VL 1

    2
    VS VL
    1

    1
    PR76
    PC53 @1K_0402_5%

    2
    1000P_0402_50V7K
    2

    1
    PC52 PR79 PR78 PC54 PR77

    1
    0.01U_0402_25V7Z 1K_0402_5% 17.8K_0402_1% 0.1U_0603_50V4Z PR80 150K_0402_1%
    1 2 BATT_TEMP 1 2

    2
    BATT_TEMP 32 442K_0603_1%

    1
    2

    8
    PR81 PU2B
    PR82 1 2 5

    P
    7 1K_0402_5% 154K_0603_1% + MAINPWON 18,41,42
    PJP2 battery connector 6
    2 1 TM_REF1 6
    O 7
    5 -

    G
    4

    1
    SM ART PR83 LM393M_SO8

    4
    3 6.49K_0402_1% PH1
    Batter y: 2
    1 1 2 +3VALWP
    1 .GND
    100K_0603_1%_TH11-4H104FT

    2. SMC

    2
    1

    1
    SUYIN_200275MR007G161ZL PC55
    PJP2 PR85 PR84
    3.SMD

    1U_0805_25V4Z
    100_0402_5% 2 1 VL

    2
    4.TS 1 2 EC_SMB_DA1 15,32,33 1000P_0402_50V7K

    PC56
    150K_0402_1%
    5 . B/I
    6. ID PR86

    1
    150K_0402_1%
    2 7 .BA TT+ PR87 2

    100_0402_5%
    1 2 EC_SMB_CK1 15,32,33

    2
    PQ18

    TP0610K_SOT23

    B+ 3 1 +VSBP
    1

    1
    PR88
    100K_0402_5% PC57 PC58
    0.22U_1206_25V7K 0.1U_0603_25V7K
    2

    PR89
    2

    22K_0402_5%
    VL 1 2
    2

    3 PR90 3

    100K_0402_5%

    PR91
    1

    0_0402_5% D PQ19
    42 SPOK 1 2 2
    G RHU002N06_SOT323
    S
    3
    1

    @ PC59
    0.1U_0402_16V7K
    2

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 44 of 48
    A B C D
    5 4 3 2 1

    D D

    PL8
    B+ 1 2

    4.7U_1206_25V6K
    FBM-L11-322513-151LMAT_1210

    0.1U_0603_25V7K
    C C

    PC61
    PC60

    2
    35PR92 VS_ON

    2
    PR93 1 2

    2
    4.99K_0402_1%

    2
    PC62 PC63 0_0402_5%
    0.01U_0402_25V7Z

    1
    @ 1U_0805_25V4Z

    1
    PU6
    10 9 PR94
    OCSET IN PQ20
    0_0402_5%
    2 8 VCCP_HG1
    2 1 VCCP_HG2 8 1
    SS DH G2 D2
    7 D1/S2/K D2 2

    1
    1 7 VCCP_PHASE 6 3
    FB LX D1/S2/K G1

    3300P_0402_50V7K
    5 D1/S2/K S1/A 4
    3 5
    2
    VCC DL

    PC64

    VCCP_LG1
    1
    4 GND BST 6 AO4912_SO8
    MAX8578EUB

    BSTVCCP
    1 2 VCCP_LG2
    PC65
    4.7_0402_5%
    4.7U_0805_6.3V6K PR95
    PD9
    PL9 2UH_SPC-07040-2R0_6A_30%
    B B
    2 1 1 2 2 1 +1.05VSP

    1
    PR170
    4.7_1206_5%
    1SS355_SOD323 PC66 PR96 PR97 1

    330U_D2E_2.5VM
    +5VS 0.1U_0603_25V7K 4.99K_0402_1% 30_0402_5%

    PC67
    +

    12
    PC130 PR98

    2
    680P_0603_50V8J 750_0402_5%
    2
    1 2

    2
    1 2

    PC68

    2
    0.033U_0603_25V7K
    PR99 PC69
    866_0402_1% 0.1U_0603_25V7K

    1
    2

    om
    A A

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 45 of 48
    5 4 3 2 1
    5 4 3 2 1

    +1.8VP O.C.P. =8.1A ~ 10.36A

    B++++
    PL10
    +1.5VP Current limit = 8.2A ~10.64A FBM-L11-322513-151LMAT_1210
    D D
    1 2 B+

    0.1U_0603_25V7K

    1
    1

    1
    PC71
    PC70 PR100 PC72
    4.7U_1206_25V6K 51_1206_5% 4.7U_1206_25V6K

    2
    +5VALW

    1
    PC73

    2
    4.7U_0805_6.3V6K PC75

    1
    PR101

    2
    PQ21 PC74 2.2_0603_5% 2.2U_0805_10V6K
    AO4912_SO8 PD10 0.1U_0603_25V7K

    2
    DAP202U_SOT323

    1
    1 8 PQ22
    D2 G2 AO4912_SO8
    2 7

    3
    D2 D1/S2/K
    3 G1 D1/S2/K 6
    4 5 BST_1.8V-2 8 1
    S1/A D1/S2/K G2 D2
    7 D1/S2/K D2 2

    BST_1.5V-2
    6 D1/S2/K G1 3

    14

    28
    5 D1/S2/K S1/A 4
    PC76 PC77
    PL11 2 1 12 17 2 1

    VIN

    VCC
    +1.5VALWP SOFT1 SOFT2
    C 1.8U_SCD10040-1R8M_8.5A_20% PC78 0.01U_0402_25V7Z 0.01U_0402_25V7Z PC79 C
    0.1U_0402_16V7K 0.1U_0402_16V7K
    1 2 2 1 1 2BST_1.5V-16 BOOT1 BOOT2 23 BST_1.8V-1
    1 2 2 1
    PR102 PR103 +1.8VP
    0_0603_5% 0_0603_5% PL12
    330U_D2E_2.5VM

    DH_1.5V 5 24 DH_1.8V 1.8U_SCD10040-1R8M_8.5A_20%


    UGATE1 UGATE2

    330U_D2E_2.5VM
    1
    PC80

    0.01U_0402_25V7Z

    LX_1.5V 4 25 LX_1.8V 1 2
    PHASE1 PHASE2
    1

    +
    1
    1

    PC84
    PR104 PR106 PR107
    1
    PC82

    6.81K_0402_1% 2.05K_0402_1% PU7 2.43K_0402_1% +


    2 PR105 1 2 ISE_1.5V 7 ISL6227CA-T_SSOP28 22 ISE_1.8V 1 2
    2

    0_0402_5% ISEN1 ISEN2


    2

    1
    DL_1.5V DL_1.8V PC85 2
    2 LGATE1 LGATE2 27
    PR108 0.01U_0402_25V7Z
    2

    1
    0_0402_5%

    2
    3 26 PR109

    2
    PGND1 PGND2 10.2K_0402_1%

    2
    VOUT_1.5V 9 20 VOUT_1.8V
    VSE_1.5V VOUT1 VOUT2 VSE_1.8V
    10 VSEN1 VSEN2 19
    1 2 8 EN1 EN2 21 1 2
    +5VALWP SYSON 24,32,40
    15 PG1 PG2/REF 16

    1
    PR110 PR111 0_0402_5%

    GND

    DDR
    1

    1
    10K_0402_1%

    0_0402_5% 11 18
    OCSET1 OCSET2
    1

    PC86 PR114 PR112

    1
    PR113

    PR115 @ 0.1U_0402_16V7K @ 0_0402_5% 10K_0402_1%

    13

    2
    1

    B @ 0_0402_5% PC87 PR116 B

    2
    1

    @ 0.1U_0402_16V7K 71.5K_0402_1%
    2

    2
    PR117
    2

    71.5K_0402_1%

    2
    2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 46 of 48
    5 4 3 2 1
    5 4 3 2 1

    +3VALW

    D D
    +1.8VP

    2
    4.7U_1206_25V6K
    PC88
    PU8
    APL5331KAC-TR_SO8

    1
    1 VIN VCNTL 6 +3VALW
    +5VALW RTCVREF 2 GND NC 5

    1
    PU9

    1
    CM8562IS_PSOP8 PC89 3 7 PC90
    10U_1206_6.3V7K VREF NC 1U_0603_6.3V6M

    2
    1 8 PR118 4 8
    VIN PGND 1K_0402_1% VOUT NC
    9

    2
    TP
    2 VFB AGND 7

    2
    1U_0603_16V6K
    PC91
    +2.5VSP PR119

    1
    0.1U_0402_16V7K
    3 6 +0.9VSP

    1
    VTT VCCA

    1
    D

    PC92
    1K_0402_1%
    0_0402_5%
    AGND

    22U_1206_6.3V6M
    10_0603_1%

    SUSP 1 2 2

    2
    1

    1
    PR120

    PC93
    4 5 G
    VTT REFEN @ PC126
    S

    3
    1
    PR121

    2 1 22U_1206_6.3V6M
    9

    2
    PC95 PC94
    2

    0.047U_0402_16V7K
    4.7U_1206_25V6K PR122 @ 0.1U_0402_16V7K
    2

    2
    200K_0402_1%
    64.9K_0402_1%
    1
    0.1U_0603_25V7K

    PC96
    PQ23
    1

    PR123
    RHU002N06_SOT323
    PC97

    C C
    1

    1
    D PQ24
    2
    RHU002N06_SOT323 G SUSP 40
    S
    3

    B B

    om
    A A

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 47 of 48
    5 4 3 2 1
    5 4 3 2 1

    +5VS

    CPUB+ PL13 B+
    +3VS
    PR124 FBM-L11-322513-201LMAT_1210
    5VS1 2 1
    2 1

    1
    0_1206_5% 1

    2200P_0402_25V7K
    0.1U_0603_25V7K
    PR125
    10_0402_5% + PC101

    1
    4.7U_1206_25V6K

    4.7U_1206_25V6K
    220U_25V_M

    PC98

    PC99

    PC120

    PC121
    2
    1
    PR126 2

    2
    D D

    @ 100K_0402_5%

    5
    6
    7
    8
    PC102

    0.01U_0402_25V7Z
    2.2U_0603_6.3V6K

    2
    BSTMA PQ25

    1
    PC104
    PC103 PU10 AO4408_SO8

    0.22U_0603_16V7K
    1U_0603_16V6K

    1
    DHM 4

    PC105
    V CC 10 30
    VCC VDD

    2
    PR127 0_0402_5% 2 1 24 36
    5 CPU_VID0 D0 V+

    3
    2
    1
    PR128 0_0402_5% 2 1 23 26 1 2
    5 CPU_VID1 D1 BSTM +CPU_CORE
    PR129 0_0402_5%
    PR130 0_0402_5% 2 1 22 28 PL14
    5 CPU_VID2 D2 DHM 0.56UH_ETQP4LR56WFC_21A_20%

    4.7_1206_5%
    PR131 0_0402_5% 2 1 21 27 LXM 2 1 1 2
    5 CPU_VID3 D3 LXM

    5
    6
    7
    8

    1
    PR133 0_0402_5% 2 1 20 29 PR132
    5 CPU_VID4 D4 DLM PQ26 0.001_2512_5%

    100K_0402_1%
    PR159
    PR134 0_0402_5% 2 1 19 31 AO4410_SO8
    5 CPU_VID5 D5 PGND

    499_0402_1%
    PR135

    1
    PR136 1 2 25 37 CMP 4 @

    2
    0_0402_5% 6,13,19 VGATE VROK CMP

    3K_0603_1%
    PR137

    1
    499_0402_1%
    4 38 CMN @ 909_0402_1%

    1
    S0 CMN

    680P_0402_50V7K

    PR138
    1

    1000P_0402_50V7K
    PR141 V CC 5 17 OAIN+

    3
    2
    1

    2
    S1 OAIN+

    2
    PC124
    0_0402_5% PC106

    PR139
    1 2 6 16 OAIN- 1 2
    32 VR_ON

    2
    @ PR142 PR143 30.1K_0402_1% SHDN# OAIN- DLM

    1
    PR140

    PC107
    1 2 2 1 1 15 FB 0.47U_0603_16V7K

    1
    C TIME FB C
    100K_0402_5% PC1081 2 12 14 1 2
    CCV CCI PC109 470P_0402_50V8J @
    1 2 270P_0402_50V7K 2 35 PR145 909_0402_1% @
    TON BSTS
    1 2
    PR146 PR144 1 2 8 33
    78.7K_0603_1% 200K_0402_1% REF DHS
    1 2 PC110 0.22U_0603_16V7K 9 34 1 2
    ILIM LXS PR147 3K_0603_1% CPU VCC SENSE
    PD12
    FB 1 2 7 32
    OFS DLS BSTMA 2 1 2 1 2
    100P_0402_50V8J

    PR148 3 40 CSP PR149 0_0402_5%


    SUS CSP
    2

    1
    10.7K_0402_1%

    100K_0402_1% 1 5VS1 PC111


    PR150

    PC112

    18 39 C SN 0.022U_0402_16V7K
    SKIP CSN
    3
    2
    1

    2
    D CPUB+

    0_0402_5%
    27P_0402_50V8J

    11 GND GNDS 13
    1

    D
    RHU002N06_SOT323

    PR151
    2
    1

    13,19 PM_STP_CPU# CHP202U_SC70


    PC113

    G 2
    S G
    3

    2200P_0402_25V7K
    4.7U_1206_25V6K

    4.7U_1206_25V6K

    0.1U_0603_25V7K
    PQ27 S MAX1532AETL_TQFN40
    3

    5
    6
    7
    8
    PQ28

    RHU002N06_SOT323

    1
    PC114

    PC115

    PC122

    PC123
    PR152 PQ29
    0_0402_5% AO4408_SO8

    2
    0.22U_0603_16V7K
    19 PM_DPRSLPVR 1 2

    1
    PR153 D HS 4

    PC116
    20K_0402_1% @ PR154
    5VS1 1 2 100K_0402_1%

    2
    2 1

    3
    2
    1
    2

    PL15
    2

    B PR155 0.56UH_ETQP4LR56WFC_21A_20% B

    4.7_1206_5%
    PR156 10K_0402_1% LXS 2 1
    100K_0402_1%

    909_0402_1%
    1 1

    5
    6
    7
    8

    1
    PR157
    1

    PR160
    PQ31
    2 PQ30
    G RHU002N06_SOT323 AO4410_SO8 @

    2
    S
    3

    2
    1

    C 4

    680P_0402_50V7K
    5 PSI# 2

    1
    B 1 2

    PC125
    E PQ32
    3

    HMBT2222A_SOT23 PC117

    3
    2
    1

    2
    0.47U_0603_16V7K

    PR158
    909_0402_1%
    1 2

    PC118
    @ 1000P_0402_50V7K
    2 1 OAIN+

    2 1 OAIN+
    A A
    PC119
    @ 1000P_0402_50V7K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number R ev
    Custom A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 48 of 48
    5 4 3 2 1
    A B C D E

    Version change list (P.I.R. List) Page 3 of 1

    Item Fixed Issue Reason for change Rev. PG# Modify List B.Ver# Phase
    Because the charge cuurent needs to meet battery
    1 1 For HDQ70, change RTC change current. 0.1 41 Change PR16 and PR17 from SD028300000 to SD028560000. 0.1 DVT 1
    spec.
    Because MAX1999 has triggered UVP when AC Adapter Change PU3 from SA019990000( S IC MAX1999EEI QSOP28 PWM)
    2 For HDQ70, change MAX1999 to MAX8734A. 0.1 42 0.1 DVT
    plug in or plug out. to SA00000G100(MAX8734AEEI+ QSOP 28P)
    Change PR65 from SD034150200(S RES 1/16W 15K 0402 1%) to
    3 For HDQ70, fix Vin detector accuracy. For HDQ70, fix Vin detector accuracy. 0.1 43 0.1 DVT
    SD034000000( S RES 1/16W 0 0402 1%).
    Change PR68 from SD034100300( S RES 1/16W 100K 0402 1%)
    4 For HDQ70, fix Vin detector accuracy. For HDQ70, fix Vin detector accuracy. 0.1 43 0.1 DVT
    to SD000008A00(S RES 1/16W 118K 0402 0.1%).
    Change PR73 from SD034100200(S RES 1/16W 10K 0402 1%) to
    5 For HDQ70, fix Vin detector accuracy. For HDQ70, fix Vin detector accuracy. 0.1 43 0.1 DVT
    SD0000008B00(S RES 1/16W 10K 0402 0.1%).
    Because we need to improve the curve of temp Change PR83 from SD034255200(S RES 1/16W 25.5K 0402 1%)
    For HDQ70, fix the battery temp curve. 0.1 44 0.1 DVT
    6 detector of battery more smoothly. to SD034649100(S RES 1/16W 6.49K 0402 1%).
    Change PR93 from SD034412100(S RES 1/16W 4.12K 0402 1%)
    7 For HDQ70, change 1.05VSP OCP point. For HDQ70, change 1.05VSP OCP point. 0.1 45 0.1 DVT
    to SD034499100(S RES 1/16W 4.99K 0402 1%).
    Change PR96 from SD034715100(S RES 1/16W 7.15K 0402 1%)
    8 For HDQ70, fix the output voltage. For HDQ70, fix the output voltage within spec. 0.1 45 0.1 DVT
    2 to SD034499100(S RES 1/16W 4.99K 0402 1%). 2

    Change PC68 from SE075682K00(S CER CAP 6800P 25V +-10%


    9 For HDQ70, fix the FB voltage. For HDQ70, fix the FB voltage within spec. 0.1 45 0.1 DVT
    X7R 0402) to SE042333K00(S CER CAP .033U 25V K X7R 0603).

    10 For HDQ70, add snuber on LX. Add snuber on LX to improve high side noise. 0.1 45 Add PR170 SD011470BT9(S RES 1/10W 4.7 +-5% 1206). 0.1 DVT

    11 For HDQ70, add snuber on LX. Add snuber on LX to improve high side noise. 0.1 45 Add PC130 SE024681J00(S CER CAP 680P 50V J NPO 0603). 0.1 DVT

    For HDQ70 1.5VALWP ripple voltage is


    12 Because we need to improve the ripple of 1.5VALWP. 0.1 46 Change PC80 from SGA20151330 to SGASGA19331D00. 0.1 DVT
    too large.
    For HDQ70, 1.8VP ripple voltage is
    Because we need to improve the ripple of 1.8VP. 0.1 46 Change PC84 from SGA20151330 to SGASGA19331D00. 0.1 DVT
    13 too large.
    Change PR107 from SD034174100(S RES 1/16W 1.74K 0402 1%)
    14 For HDQ70, change 1.8VP OCP point. For HDQ70, change 1.8VP OCP point. 0.1 46 0.1 DVT
    to SD034243100(S RES 1/16W 2.43K 0402 1%)
    Change PR116 from SD034806200(S RES 1/16W 80.6K 0402 1%)
    15 For HDQ70, change 1.8VP OCP point. For HDQ70, change 1.8VP OCP point. 0.1 46 0.1 DVT
    3
    to SD034715200(S RES 1/16W 71.5K 0402 1%). 3

    For HDQ70, fix the 2.5VSP's power Change PC96 from SE075222K00(S CER CAP 2200P 25V +-10%
    16 Because we need to fix the power sequence of 2.5VSP. 0.1 47 0.1 DVT
    sequence. X7R 0402) to SE076473K00(S CER CAP 0.047U 16V K X7R 0402).

    om
    4 4

    l.c
    ai
    tm
    ho
    Security Classification Compal Secret Data Compal Electronics, Inc.

    f@
    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title
    SCHEMATIC, M/B LA-2781

    in
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    xa
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401353

    he
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: 星期五, 六月 03, 2005 Sheet 49 of 49
    A B C D E
    5 4 3 2 1

    Version change list (P.I.R. List) HW section Page 1 of 1

    Item Reason for change PG# Modify List Date


    1 AC_IN Signal P.32 Remove R189, D11 DVT(Rev01)
    D 2 LAN LED on 8110SBL P.26 Unpop R449 on both 8100CL and 8110SBL DVT(Rev01) D

    3 Modify +1.8VS and +1.5VS power sequence P.40 Change R531,R551 value from 100K to 180K DVT(Rev01)
    4 5 Way BTN problem P.33,34 Add 5WAY_BTN signal and R184 DVT(Rev01)
    5 Remove New Card circuit P.24 Remove New Card Circiut DVT(Rev01)
    6 New Card Clock Request P.13 Connect PCIE_CLKREQ1# to Clock Gen pin.32 DVT(Rev01)
    7 Change IEEE1394 Connector P.25 Change IEEE1394 Connector Type DVT(Rev01)
    8 Codec VREF capacitor P.36 Change C497 value from 0.1uf to 10uf DVT(Rev01)
    9 +SD_VCC and +XD_VCC Power Switch P.23 Add R572, R573 for SD, XD Power Switch DVT(Rev01)
    10 Un-used Codec Clock P.13 unpoped R89 DVT(Rev01)
    11 Un-used ODD Connector P.21 Remove the JP47 and C362,C366,C675,C678,C681 DVT(Rev01)
    12 Add 10uF capacitor on GMCH P.9 Add C703 on +3VS_DAC DVT(Rev01)
    13 Changed for Speaker and Subwoofer P.37,38 Change Main Amplifier Gain form 10dB to 8dB, and Modify Woofer BPF value DVT(Rev01)
    14 Change CRT and TV-out Pi Filter Value P.14 Change CRT and TV-out Pi Filter Value to Following Chipset Recommand DVT(Rev01)
    15 Change DVI SMBUS Pull-up Value P.16 Change R346,R348 from 30K to 6.8K DVT(Rev01)
    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2005/03/01 Deciphered Date 2006/03/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SCHEMATIC, M/B LA-2781
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    B A
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    401353
    Date: 星期五, 六月 03, 2005 Sheet 50 of 50
    5 4 3 2 1

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