Arithmetic Instructions

This topic covers the following instructions:

 Addition (ADD, INC, ADC)
 Subtraction (SUB, DEC, SBB,CMP)
 Multiplication (MUL, IMUL)
 Division (DIV, IDIV)
 BCD Arithmetic (DAA, DAS)

Course Instructor
Mohammed Abdul kader
Lecturer, EEE, IIUC
 Addition Instructions
Addition appears in many forms in the microprocessor.
• Register addition
• Immediate addition
• Memory to register addition
• Increment addition
• Addition-with-carry

N.B: The only types of addition not allowed are memory-to-memory and segment
register.
Example: ADD CS, DS ; not allowed
ADD [AX], [BX] ; Not allowed
Register Addition

Register addition instructions are used to add the contents of registers.

Example: ADD AL, BL ; AL=AL+BL

ADD CX, DI ; CX=CX+DI

2 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Addition Instructions (Continued)
Immediate Addition
Immediate addition is employed whenever constants or known data are added.

Example: ADD CL, 44H ; CL=CL+44H

ADD BX, 245FH ; BX=BX+245FH

Memory to Register Addition

Memory data can be added with register content.
Example:
ADD CL, [BP] ; The byte content of the stack segment memory location
addressed by BP add to CL with the sum stored in CL.
ADD [BX], AL ; AL adds to the byte contents of the data segment memory
location addressed by BX with the sum stored in the same
memory location.
N.B. * Data Segment is used by default when BX, DI or SI is used to address
memory.
* If the BP register addresses memory, the stack segment is used by default.

3 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Addition Instructions (Continued)
Increment Addition
• Increment addition (INC) adds 1 to any register or memory location except a segment
register.
• With indirect memory increments, the size of the data must be described by using the
BYTE PTR, WORD PTR or, DWORD PTR assembler directives.
• Increment instructions affect the flag bits, as do most of the arithmetic and logic
operations. The difference is that increment instructions do not affect the carry flag bit
Example: INC BL ;BL= BL+1
INC SP ; SP=SP+1
INC BYTE PTR[BX] ; Add 1 to the byte contents of the data segment memory
location addressed by BX.
Addition with carry (ADC)
An addition with carry (ADC) instruction adds the bit in the carry flag (C) to the operand
data.
Example: ADC AL, AH ; AL=AL+AH+carry
ADC DH, [BX] ; The byte content of the data segment memory location addressed
by BP add to DH with the sum stored in DH.

4 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Addition Instructions (Continued)
Changes of flag bits after addition:
Changes bits by any Add instruction: Sign, Zero, Carry, Auxiliary carry, parity and overflow flag.
Z = 0 (result not zero) Z=1(result zero)
C=0 (no carry) C=1(carry exist)
A=0 (no half carry) A= 1 (half carry exist)
S=0 (result positive) S=1 (result negative)
P=0 (Odd parity) P=1 (even parity)
O=0 (no overflow) O= 1 (overflow occur)
Problem:
a) Develop a short sequence of instructions that adds two thirty two bit numbers (FE432211H
and D1234EF1H) with the sum appearing in BX-AX
b) What is wrong with the following instructions:
ADD AL, AX ; ADC CS, DS ; INC [BX] ; ADD [AX], [BX]; INC SS
c) Suppose, present content of flag register is 058F H. Find the content of AX and Flag register
after executing the following instructions
MOV AX, 1001H
MOV DX, 20FFH
ADD AX, DX
d) Develop a short sequence of instructions that adds AL, BL, CL, DL and AH. Save the sum in the
DH register.
5 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Subtraction Instructions
Many forms of subtraction appear in the instruction set.
• Register Subtraction
• Immediate Subtraction
• Decrement Subtraction
• Subtraction with Borrow
• Comparison

N.B: The only types of subtraction not allowed are memory-to-memory and segment register
subtractions.
Example: SUB CS, DS ; not allowed
SUB [AX], [BX] ; Not allowed

Register Subtraction

Register subtraction instructions are used to subtract the contents of registers.

Example: SUB AL, BL ; AL=AL-BL

SUB CX, DI ; CX=CX-DI

6 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Subtraction Instructions (Continued)
Immediate Subtraction
Immediate subtraction is employed whenever constants or known data are subtracted.

Example: SUB CL, 44H ; CL=CL-44H

SUB BX, 245FH ; BX=BX-245FH

Memory to Register Subtraction

Memory data can be subtracted from register content.
Example:
SUB [DI], CH ; Subtract CH from the byte content of data segment memory
addressed by DI and stores the result in same location.
SUB CH, [BP] ; Subtract the byte contents of the stack segment memory
location addressed by BP from CH and the result stored in CH.
N.B. * Data Segment is used by default when BX, DI or SI is used to address memory.
* If the BP register addresses memory, the stack segment is used by default.

7 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Subtraction Instructions (Continued)
Decrement Subtraction
• Decrement subtraction (DEC) subtract 1 from a register or memory location except a
segment register.
• With indirect memory increments, the size of the data must be described by using the BYTE
PTR, WORD PTR or, DWORD PTR assembler directives.
Example: DEC BL ;BL= BL-1
DEC SP ; SP=SP-1
DEC BYTE PTR[BX] ; Subtracts 1 from the byte contents of the data segment memory
location addressed by BX.
DEC WORD PTR[BP] ; Subtracts 1 from the word content of the stack segment
memory location addressed by BP.
Subtraction with Borrow (SBB)
A subtraction with borrow (SBB) instruction functions as a regular subtraction, except that the carry
flag (C), which hold the borrow, also subtracts from the difference. The most common use for this
instruction is for subtractions that are wider than 16-bits.
Example: SBB AL, AH ; AL=AL-AH-carry
SBB DH, [BX] ; The byte content of the data segment memory location addressed by BP
subtracted from DH and result stored in DH.
N.B. Immediate subtraction from a memory location requires BYTE PTR, WORD PTR directives.
Example: SBB BYTE PTR[DI], 3 ; both 3 and carry subtract from data segment memory location
addressed by DI
8 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Subtraction Instructions (Continued)
Comparison
The comparison instruction (CMP) is a subtraction that changes only the flag bits, the destination
operand never changes. A comparison is useful for checking the entire contents of a register or a
memory location against another value. A CMP is normally followed by a conditional jump
instruction, which test condition of the flag bits.
Example: CMP CL, BL ; CL-BL
The result of comparison depends on CF, ZF and SF
CF ZF SF Result
0 1 0 Result of subtraction is zero (the values are equal)
0 0 0 1st value is greater than 2nd value (No borrow)
1 0 1 2nd value is greater than 1st value (Needs borrow)

Conditional jump instructions that often followed by CMP instruction are

• JA (jump above)
• JB (jump below)
• JAE (jump above or equal)
• JBE (jump below or equal)
Example: CMP AL, 10H; compare AL against 10H
JAE EEE ; if AL is 10H or above program jump to EEE

9 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Multiplication Instructions
Multiplication
In 8086 multiplication is performed on bytes (8-bit) and words (16-bit) and can be signed integer
(IMUL) or unsigned integer (MUL).
If two 8-bit numbers are multiplied, they generate 16-bit product; if two 16-bit numbers are
multiplied they generate 32-bit product.
Some flag bits ,O (overflow) and C (carry) changes when multiply instruction executes and
produce predictable outcomes. The other flag also change, but their results are unpredictable and
therefore are unused.
8-bit multiplication (signed and unsigned)
• Multiplicand is always in AL register
• Multiplier can be any 8-bit register or any memory location.
• Product is placed in AX register. (For signed multiplication, the product is in binary form, if
positive, and in 2’s complement form, if negative. For unsigned multiplication result is always in
binary form).
• Immediate multiplication is not allowed.
• Unsigned multiplication uses MUL instruction and signed multiplication uses IMUL instruction.
Example: MUL CL ; AL is multiplied by CL, the unsigned product is in AX
IMUL DH ; AL is multiplied by DH, the signed product is in AX
IMUL BYTE PTR[BX] ; AL is multiplied by byte contents of the data segment memory
location addressed by BX, the signed product is in AX.

10 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Multiplication Instructions (Continued)

16 –bit multiplication
• Multiplicand stay in AX.
• Multiplier can stay any 16-bit register or memory location.
• 32-bit product appear in DX-AX. The DX register always contains the most significant 16
bits and AX contains the least significant bits of the product.
Example:
MUL CX ; AX is multiplied by CX, the unsigned product is in DX-AX
IMUL DI ; AX is multiplied by DI, the signed product is in DX-AX.
MUL WORD PTR[SI]; AX is multiplied by the word content of data segment memory location
addressed by SI, the unsigned product is in DX-AX.

Problems:
a) Write a short sequence of instructions that multiply 4 with 10 and the result is stored
in DX.

11 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Division
Division Instructions
• Division occurs on 8-bit or 16-bit numbers in the 8086-80286 microprocessors, and on 32-bit
numbers in the 80386-Pentium 4 microprocessor.
• Unsigned division use DIV instruction and signed division use IDIV instruction.
• The dividend is always a double-width dividend that is divided by the operand. This means that
an 8-bit division divides a 16-bit number by an 8-bit number; a 16-bit division divides a 32-bit
number by a 16-bit number.
• There is no immediate division instruction available to any microprocessor.
• None of the flag bits change predictably for a division.
8-bit Division
• Dividend (which is divided by a value) always stored in AX.
• The dividing content is stored in any 8-bit register or memory location.
• The quotient moves into AL division.
• Reminder stored in AH register.
Example: DIV CL ; AX is divided by CL, the unsigned quotient is in AL and the
unsigned reminder is in AH.
IDIV BL ; AX is divided by BL, the signed quotient is in AL and the signed
reminder is in AH
DIV BYTE PTR[BP] ; AX is divided by the byte content of the stack segment memory location
addressed by BP, the unsigned quotient is in AL and unsigned remainder is in AH

12 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Division Instructions (Continued)
16-bit division
• Dividend (which is divided by a value) always stored in DX-AX.
• The dividing content is stored in any 16-bit register or memory location.
• The quotient appears in AX.
• Reminder appears in DX register.
Example:
DIV CX ; DX-AX is divided by CX, the unsigned quotient is in AX and the unsigned remainder is in DX.
IDIV SI ; DX-AX is divided by SI, the signed quotient is in AX and the signed remainder is in DX
CBW (Convert signed byte to signed word)
 This instruction copies the sign of a byte in AL to all the bits in AH. AH is then said to be sign
extension of AL.
 The CBW operation must be done before a signed byte in AL can be divided by another signed
byte with the IDIV instruction. CBW effects no flag.
 Example: Suppose we want to divide -38 by +3.
AL=11011010=-26H=-38 decimal
CH=0000 0011=+3H = +3 decimal
MOV AL, -26H
MOV CH, 03H
CBW ; Extended sign of AL through AH. AX=11111111 11011010
IDIV CH; Divide AX by CH
AL=11110100 = -OCH=-12 decimal; AH = 11111110 = -2 decimal
13 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 Division Instructions (Continued)
CWD (Convert signed Word to signed Double word)
 CWD copies the sign of a word in AX to all the bits of the DX register. In other words, it extends
the sign of AX into all of DX
 The CWD operation must be done before a signed word in AX can be divided by another signed
word with the IDIV instruction. CWD affects no flag.
 Example: divide -3897 decimal by +250 decimal.
AX=11110000 11000111 = -3897 decimal
CX = 00000000 1111 1010 = +250 decimal
DX = 0000000000000000
CWD ; DX= 1111111111111111
AX= 11110000 11000111
IDIV CX
Problems:
a) Write a short sequence of instruction to divide 800 by 100. The result should be stored in CL
register.
b) Write a short sequence of instructions that divide the number in BL by the number in CL and
then multiplies the result by 2. The final answer must be a 16-bit number stored in the DX
register.
c) [{130-(300/50)+6}*9]

14 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 BCD Arithmetic
The addition or subtraction of two BCD numbers result a binary number. To adjust this number into
BCD the following instructions are used:
• DAA (Decimal adjust AL after BCD addition)
• DAS (Decimal adjust AL after BCD subtraction)
DAA
• This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to
be a legal BCD number. The result must be in AL for DAA to work correctly.
• If the lower nibble in AL after addition is greater than 9 or AF was set by the addition, then the
DAA instruction will add 6 to the lower nibble in AL. If the result in the upper nibble of AL is now
greater than 9 or if the carry flag was set by the addition or correction, then DAA instruction will
add 60H to AL.
• Example: (a) Let, AL=0101 1001 = 59 BCD and BL=0011 0101 = 35 BCD
ADD AL, BL ; AL= 1000 1110 = 8EH
DAA ; Add 0110 because 1110>9
; AL= 1001 0100 = 94 BCD
(b) Let, AL= 1000 1000 (88 BCD) and BL=0100 1001 (49 BCD)
ADD AL,BL ; AL= 1101 0001, AF=1
DAA ; Add 0110 because AF=1
; AL=1101 0111 (D7H)
; 1101>9 so add 0110 0000
; AL=0011 0111 (37 BCD), CF=1
15 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 DAS
BCD Arithmetic (Continued)
• This instruction is used after subtracting two packed BCD numbers to make sure the result is
correct packed BCD. The result of subtraction must be in AL for DAS to work correctly.

• If the lower nibble in AL after subtraction is greater than 9 or the AF was set by the subtraction
then DAS instruction will subtract 6 from the lower nibble of AL. If the result in the upper nibble
is now greater than 9 or if the carry flag was set, the DAS instruction will subtract 60 from AL.

• Example: Let, AL= 1000 0110 (86 BCD) and BH= 0101 0111 (57 BCD)
SUB AL, BH ; AL= 0010 1111 (2FH), CF=0
DAS ; Lower nibble of results is 1111>9, so DAS
automatically subtracts 0000 0110
; AL= 0010 1001 (29 BCD)

Problem:
(a) Write an instruction set to implement a decimal up counter using DAA instruction.
(b) Write an instruction set to implement a decimal down counter using DAS instruction.

16 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC
 BCD Arithmetic (Continued)
Solution of problems
(a) Decimal up counter-

MOV COUNT, 63H ; initialize count in memory location as 1.

MOV AL, COUNT ; Bring COUNT into AL to work on.
ADD AL, 01H ; increment the value by 1
DAA ; Decimal adjust the result
MOV COUNT, AL ; Put decimal result back in memory.

(b) Decimal down counter-

MOV COUNT, 63H ; initialize count in memory location as 99 decimal (63H).

MOV AL, COUNT ; Bring COUNT into AL to work on.
SUB AL, 01H ; Decrement the value by 1.
DAS ;Decimal adjust the result.
MOV COUNT, AL ; Put new count back in memory.

17 Lecture materials on "Arithmetic Instructions" By- Mohammed abdul kader, Lecturer, EEE, IIUC