© Aspencore -- Reprinted with permission

designfeature By Charles Kitchin, Analog Devices Inc

IT MAY SEEM LIKE A SIMPLE TASK TO MODIFY YOUR

OP-AMP DESIGN TO WORK FROM A SINGLE VOLTAGE
POWER SUPPLY, BUT THE CHANGE IN PERFORMANCE
WILL SURPRISE YOU.

Demystifying single-supply
op-amp design
attery-powered op-amp applications, such as its supply line. Because a 1V change on the supply

B those found in automotive and marine equip- line causes a 0.5V change at the output of the divider,
ment, have only a single available power source. the circuit’s power-supply rejection is only 6 dB.
Other applications, such as computers, may oper- Even worse, instability often occurs in circuits in
ate from the ac power lines but still have only a sin- which the op amp must supply large output currents
gle polarity power source, such as 5 or 12V dc. into a load. Unless the power supply is well-regulat-
Therefore, it is often a practical necessity to power ed and well-bypassed, large signal voltages appear on
op-amp circuits from a single polarity supply. But the supply line. With the op amp’s noninverting in-
single-supply operation has its drawbacks: It re- put referenced directly off the supply line, these sig-
quires additional passive components in each stage nals will feed directly back into the op amp, often ini-
and, improper execution of the design can lead to se- tiating instability. The use of careful layout,
rious instability problems. multicapacitor-power-supply bypassing, star
Single-supply applications have inherent prob- grounds, and a pc-board power plane may provide
lems that dual-supply op-amp circuits often over- circuit stability. However, it is easier to reintroduce
come. The fundamental problem is that an op amp some reasonable amount of power-supply rejection
is a dual-supply device, so you must employ biasing into the design.
using external components to center the op amp’s
output voltage at midsupply. This approach allows RESISTOR-DIVIDER BIASING
the maximum input and output voltage swing for a One way to increase power-supply rejection is to
given supply voltage. In some low-gain applications modify the circuit (Figure 2). Capacitor C2 now by-
having low input signals, the op amp’s output can be passes the tap point on the voltage divider, restor-
only 2 or 3V above ground. But in most cases, you
must avoid clipping, and thus you must center the VS VS
0.1 F 1 F
output around midsupply.
The circuit of Figure 1 shows a simple sin- RA
* *
gle-supply biasing method. This noninvert- Figure 1 100k
VS/2 C
ing, ac-coupled, amplifier circuit uses a resistor di- VIN + OUT
VOUT
vider with two biasing resistors, RA and RB, to set the CIN
VS/2

voltage on the noninverting input equal to VS /2. The RB *
input signal, VIN, is capacitively coupled to the non- 100k RLOAD
inverting input terminal. FOR RA=RB, R2
This simple circuit has some serious limitations. R1
1 .
BW1=
The first limitation is that the op amp’s power-sup- 2( 1/ 2 RA)CIN C1
1
ply rejection is almost entirely missing, because any BW2=
2R1C1
.
* *STAR GROUNDS.
change in supply voltage directly changes the VS/2 1
BW3= .
biasing voltage, which the resistor divider sets. Pow- 2RROADCOUT
er-supply rejection is an important and frequently FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)),
overlooked op-amp characteristic. Normally high WHERE XC1<<R1.

power-supply rejection that any modern op amp

provides greatly reduces the problem of ac signals A first-cut single-supply op-amp design yields a potentially
and power-supply hum feeding into the op amp via unstable circuit.

www.ednmag.com March 21, 2002 | edn 83

designfeature Op-amp design

ing some ac power-supply VS VS and other factors can become

0.1 F 1 F
rejection. Resistor RIN complex. However, you can
Figure 2
provides a dc return RA
greatly simplify the design by
* *
path for the VS/2 reference 100k RIN using a “cookbook” ap-
100k
voltage and sets the circuit’s VS/2
+ C OUT proach. For a common volt-
ac input impedance. Many + RB VS/2

VOUT age-feedback op amp operat-
published applications cir- C2 100k ing from a single 15 or 12V
CIN *
cuits show a 100/100-k * RLOAD supply, a resistor divider us-
VIN
voltage divider for RA and RB ing two 100-k resistors is a
R2
with a 0.1-F or similar ca- R1 150k reasonable compromise be-
FOR RA=RB AND BW1= 1/10 BW2,
pacitance value for C2. How- BW3, AND BW4, C1 tween supply-current con-
ever, the parallel combina- BW1=
1
.
sumption and input-bias
* *STAR GROUNDS.
tion of RA and RB and C2 set 2( 1/ 2RA)C2 current errors. You can re-
1
the
3-dB bandwidth of BW2=
2RINCIN
. duce the resistors for a 5V
this network, which is equal 1 supply to a lower value, such
BW3= .
to: 2R1C1 as 42 k. In addition, some

3dB BW1/2 (50,000) BW4=
1
. applications need to operate
2RLOADCOUT
(0.110
6F)30 Hz. from the new 3.3V standard.
FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)),
Instability can still occur, WHERE XC1<<R1. For 3.3V applications, the op
because the circuit has es- amp must be a rail-to-rail de-
TO MINIMIZE INPUT-BIAS-CURRENT ERRORS,
sentially no power-supply R2 SHOULD EQUAL RIN+( / 2 RA). 1 vice, and you must bias it
rejection for low frequen- close to midsupply. You can
cies. So, any signals lower One way to increase power-supply rejection is to modify the circuit using a further reduce the biasing re-
than 30 Hz on the supply decoupled op-amp-biasing circuit. sistors to approximately 27
line can easily find their way k.
back to the positive input of VS Current-feedback op amps
VS
the op amp. A practi- 0.1 F 1 F typically target high-frequen-
cal solution to this Figure 3 US
cy use; the lowpass filter that
problem is to increase the R A US * R2 and stray circuit capaci-
*
100k
value of capacitor C2. It VS/2 tance form can severely re-
+ COUT
needs to be large enough to VOUT
duce the circuit’s 3-dB band-
RB VS/2

effectively bypass the voltage C2 100k
width. Therefore, current-
divider at all frequencies * feedback op amps normally
* RLOAD
within the circuit’s pass- need to use a low resistance
FOR RA=RB AND XC2<<XC1,
band. A good rule of thumb R
R2 value for R2. An op amp such
1 1 50k
is to set this pole at one- BW1= . as the AD811, which targets
2(1/ 2RA)C2
tenth the
3-dB input 1
C1
use in video applications,
BW2= . VIN
bandwidth, set by RIN/CIN 2R1C1 typically will have optimum
1 *STAR GROUNDS.
and R1/C1. Even though the BW3= . performance using a 1-k
2RLOADCOUT
dc circuit gain is unity, you resistor for R2. Therefore,
need to consider the op FOR AC SIGNALS, VOUT=VIN(R2/R1), these high-speed applications
WHERE XC1<<R1.
amp’s input-bias currents. TO MINIMIZE INPUT-BIAS-CURRENT ERRORS, need to use smaller resistor
The RA/RB voltage divider R2 SHOULD EQUAL 1/ 2RA. values in the RA/RB voltage
adds considerable resistance divider to minimize input-
in series with the op amp’s You can also add decoupling to a single-supply inverting-amplifier circuit. bias-current errors. Unless
positive input terminal, the circuit must operate over
equal to the parallel combination of the
two resistors. Maintaining the op amp’s TABLE 1—TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 2
output close to midsupply requires bal- Input Output
bandwidth bandwidth CIN R1 C1 C2 COUT RLOAD
ancing this resistance by increasing the
Gain (Hz) (Hz) F)
( (k) F)
( F)
( F)
( )
(k
resistance in the negative input terminal
10 10 10 0.3 16.5 1.5 3 0.2 100
by an equal amount. Current-feedback 20 10 10 0.3 7.87 3 3 0.2 100
op amps often have unequal input-bias 10 50 50 0.1 16.5 0.3 0.6 0.05 100
currents, which further complicates the 101 20 20 0.2 1.5 6.8 2 0.1 100
design. Notes: RA=RB=100 k , RIN=100 k , and R2=150 k .
A single-supply op-amp circuit design Capacitance values are rounded off to next highest common value. Because the CIN/RIN pole and
that considers input-bias current errors C1/R1 poles are at the same frequency and both affect the input bandwidth, each capacitor is ⻫2
as well as power-supply rejection, gain, larger than it would otherwise be for a single pole RC-coupled input. The table lists a C2 value
input- and output-circuit bandwidth, that provides a corner frequency of one-tenth that of the input bandwidth.

84 edn | March 21, 2002 www.ednmag.com

 designfeature Op-amp design

a wide temperature range,

you can use a modern FET-
TABLE 2—TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 3
Input Output
input op amp instead of a bandwidth bandwidth R1 C1 C2 COUT RLOAD
bipolar device to reduce in- Gain (Hz) (Hz) )
(k F)
( F)
( F)
( )
(k
put-bias-current errors. In 10 10 10 2 8.2 0.5 0.2 100
any case, balancing the re- 20 10 10 1 20 0.5 0.2 100
sistance in the op amp’s in- 10 50 50 2 2 0.1 0.05 100
put terminals is still a wise 100 20 20 1 8.2 0.3 0.1 100
precaution. Tables 1 and 2 Notes: R2=50 k, and RA=RB=100 k .
provide typical component Capacitance values are rounded off to next highest common value. Because the C1/R1 pole and C2/RA/RB poles
values for the circuits in are at the same frequency, and both affect the input bandwidth, each capacitor is ⻫2 larger than it would oth-
figures 2 and 3 for several erwise be for a single-pole, RC-coupled input.
gains and 3-dB bandwidths.
er diode. Capacitor CN helps prevent any diode and 5 mA for a 500-mW version
ZENER-DIODE BIASING zener-generated noise from feeding into are usually a good compromise for this
Although the resistor-divider-biasing the op amp. Low-noise circuits may need application.
technique is low-cost and keeps the op to use a larger value for CN than the spec- Within the operating limits of the zen-
amp’s output voltage at VS/2, the op ified 10 F. er diode, the circuit of Figure 4 basically
amp’s common-mode rejection depends Choose a zener diode that has an op- restores the op amp’s power-supply re-
entirely upon the RC time constant that erating voltage close to VS/2. Select resis- jection. But this restoration comes at a
RA , RB, and C2 form. Using a C2 value that tor RZ to provide a high enough zener price: The op amp’s output is now at the
provides at least 10 times the RC time current to operate the diode at its stable zener voltage rather than at VS/2. If the
constant of the input RC coupling net- rated voltage and to minimize the zener power-supply voltage drops, nonsym-
work, R1/C1 and RIN/CIN, helps to ensure output noise. It is also important to min- metrical clipping can occur on large sig-
a reasonable common-mode-rejection imize power consumption and heating nals. Furthermore, the circuit now con-
ratio. With 100-k resistors for RA and and to prolong the diode’s life. Because sumes more power. You also still need to
RB, you can keep practical values of C2 the op amp’s input current is essentially consider input-bias currents. Resistors
fairly small as long as the circuit band- zero, it’s a good idea to choose a low- RIN and R2 should be close to the same
width is high enough. However, another power zener. A 250-mW device is best, value to prevent input bias currents from
way to provide the necessary VS/2 biasing but the more common 500-mW types creating a large offset-voltage error. Fig-
for single-supply operation is to use a are also acceptable. The ideal zener cur- ure 5 shows an inverting-amplifier cir-
zener-diode regulator (Figure 4). Cur- rent varies with each manufacturer, but cuit using the same zener-biasing
rent flows through resistor RZ to the zen- practical levels of 5 A for a 250-mW method. You can use Table 3 with the cir-

VS VS
0.1 F 1 F 0.1 F 1 F

Figure 4 Figure 5
US * * * *
RIN
CIN IZ 100k VZ
VZ
VIN + VZ COUT VS + VZ COUT
VOUT RZ + C2 VOUT
RIN VZ
VZ

IZ 100k 10 F
VS * * *
RZ + CN RLOAD RLOAD
10 F VIN
R2 C1 R1 R2
R1 100k 100k
SELECT RZ TO PROVIDE THE DESIRED SELECT RZ TO PROVIDE THE DESIRED
ZENER OPERATING CURRENT, IZ. SEE TEXT. C1 ZENER OPERATING CURRENT, IZ. SEE TEXT.
VS
VZENER *
RZ= . FOR AC SIGNALS, VOUT=VIN(R2/R1),
IZ *STAR GROUNDS. *STAR GROUNDS.
WHERE XC1<<R1,
1
BW1= . VS
VZENER
2RINCIN RZ= .
IZ
1 1
BW2= .
2R1C1 BW1= .
2R1C1
1
BW3= . 1
2RLOADCOUT BW2= .
2RINC2
FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)), 1
WHERE XC1<<R1, BW3= .
2RLOADCOUT

TO MINIMIZE INPUT-BIAS-CURRENT ERRORS, TO MINIMIZE INPUT-BIAS-CURRENT ERRORS,

R2 SHOULD EQUAL RIN. R2 SHOULD EQUAL RIN.

Zener-diode biasing also improves the power-supply rejection of this nonin- The same zener-diode-biasing arrangement also improves an
verting amplifier. inverting amplifier design.

86 edn | March 21, 2002 www.ednmag.com

designfeature Op-amp design

cuits in figures 4 and 5 to and RB to provide the desired

provide practical VS
VS/2 voltage reference that
RZ resistor values Figure 6 the AD663A data sheet
VS
for use with some com- VIN
0.1 F 1 F shows.
mon zener diodes. Note SENSE

that for the lowest possible

VOUT(2)
* *
NOISE AND TURN-ON TIME
ADM663A REF
RA
circuit noise, select the ADM666A VS/2 COUT
Some op-amp applications
VSET +
zener-diode current by GROUND VOUT need a low-noise amplifier,
referring to the zener 1.3 TO 16V RB VS/2
and low-noise-amplifier cir-
product data sheet. Tables ADJUSTABLE *
RLOAD
cuits require low resistance
OUTPUT *
4 and 5 provide practical values in the signal path.
component values for fig- VIN Johnson (resistor) noise
C1 R1 R2
ures 4 and 5 for several *STAR GROUNDS. equals 4 nV times the square
circuit gains and band- root of the resistance value in
widths. kilohms. Although the John-
A 1.65V biasing voltage You can use a linear-voltage-regulator-biasing circuit for low-voltage op-amp son noise of a 1-k resistor is
is necessary for op-amp designs. only 4 nV/Hz, this amount
circuits operating from the increases to 18 nV/Hz for a
new 3.3V standard; how- 20-k resistor and 40
110k
ever, zener diodes are nV/Hz for a 100-k resis-
commonly available Figure 7 tor. Even though C2 bypasses
only with voltages the RA/RB resistor divider to
0.1 F 1 F
as low as 2.4V. The easiest ground, these resistors set a
+ RA VS
way to provide this biasing 220k
limit on the minimum value
* *
voltage is to use a linear

that you can use for the op
VS/2
voltage regulator, such as VS/2
+
amp’s feedback resistor, and,
the ADM663A or ADM- C2 the larger this value is, the
0.1 F 1 F
666A devices (Figure 6). RB 0.1 F greater the Johnson noise. So,
* 220k
Although a zener diode is low-noise applications need
* *
usually the cheapest volt- to use much smaller op-amp-

VS
age regulator available, a *STAR GROUNDS. biasing-resistor values than
linear voltage regulator has 100 k. However, lower value
lower drift over tempera- An op amp provides a “phantom ground” for battery-powered, dc-coupled resistors in the divider mean
ture and less noise than a applications. higher power-supply current
zener. Select resistors RA and reduced battery life.
and RB to provide the desired VS/2 volt- from this supply voltage. The op amp Fortunately, the zener-diode biasing
age reference, which the AD663A data also must be able to supply an output method supplies VS/2 without the need
sheet describes. current large enough to power the load for large resistors. As long as you bypass
circuit. Capacitor C2 bypasses the volt- the zener to keep its noise out of the cir-
BATTERY-POWERED, DC-COUPLED CIRCUITS age-divider output enough to prevent cuit, you can reduce both noise and sup-
With the use of suitably large input any resistor noise from feeding into the ply current. The use of a linear voltage
and output coupling capacitors, an ac- op amp. This capacitor need not provide regulator is even better, because both its
coupled circuit can operate at frequen- power-supply rejection because the load noise and its output impedance are low.
cies well below 1 Hz, but some applica- current flows directly to ground, so any You also need to consider circuit turn-
tions require a true dc response. signal currents flow equally from both on time. The approximate turn-on time
Battery-powered applications permit the sides of the battery. Select resistors RA equals the RC time constant of the low-
use of a “phantom- est bandwidth filter you
ground” circuit (Figure TABLE 3—RECOMMENDED RZ VALUES AND use. The circuits call for
7). This circuit provides MOTOROLA PART NUMBERS FOR FIGURES 4 AND 5 the RA/RB and C2 voltage-
dual-supply voltages, Supply Zener Zener RZ
divider network to have a
both positive and negative voltage voltage Zener current value 10-times-longer time
with respect to ground, (V) (V) type (IZ) )
( constant than that of the
from a single battery. An 15 7.5 1N4100 500 µA 15k input or output circuit.
op amp buffers the out- 15 7.5 1N4693 5 mA 1.5k This longer time constant
put of a VS/2 voltage di- 12 6.2 1N4627 500 µA 11.5k simplifies the circuit de-
vider. If you use a low- 12 6.2 1N4691 5 mA 1.15k sign because as many as
voltage battery, such as 9 4.3 1N4623 500 µA 9.31k three RC poles set the in-
3.3V, the op amp should 9 4.3 1N4687 5 mA 931 put bandwidth. This long
5 2.4 1N4617 500 µA 5.23k
be a rail-to-rail device and time constant also helps
5 2.7 1N4682 5 mA 464
able to operate effectively keep the biasing network
88 edn | March 21, 2002 www.ednmag.com
 designfeature Op-amp design

TABLE 4—TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 4

Input Output
bandwidth bandwidth CIN R1 C1 COUT RLOAD
Gain (Hz) (Hz) F)
( )
(k F)
( F)
( )
(k
10 10 10 0.3 11 2 0.2 100
20 10 10 0.3 5.23 4.7 0.2 100
10 50 50 0.1 11 0.47 0.05 100
101 20 20 0.2 1 15 0.1 100
Notes: RIN=R2 = 100 k, and CN=0.1 F. Select RZ from Table 3.
Capacitance values are rounded off to next highest common value. Because the CIN/RIN pole and
C1/R1 poles are at the same frequency, and both affect the input bandwidth, each capacitor is ⻫2
larger than it would otherwise be for a single-pole, RC-coupled input.

TABLE 5—TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 5

Input Output
bandwidth bandwidth R1 C1 C2 COUT RLOAD
Gain (Hz) (Hz) )
(k F)
( F)
( F)
( )
(k
10 10 10 10 2.7 0.2 0.2 100
20 10 10 5 4.7 0.2 0.2 100
10 50 50 10 0.5 0.05 0.05 100
100 20 20 1 12 0.1 0.1 100
Notes: RIN=R2=100 k . Select RZ from Table 3.
Capacitance values are rounded off to next highest common value. Because the C1/R1 pole and
C2/RIN poles are at the same frequency, and both affect the input bandwidth, each capacitor is ⻫2
larger than it would otherwise be for a single-pole, RC-coupled input.

from turning on before the op amp’s in- within only 1.8V of the positive-supply
put and output networks, and, therefore, voltage without introducing dc errors or
the op amp’s output gradually climbs limiting device bandwidth. So, if you op-
from 0V to VS/2 without “railing” to the erate this amplifier from a single 5V sup-
positive-supply line. Table 1 supplies a ply and bias the amplifier’s positive in-
value for a 3-dB corner frequency that is put at VS/2, 2.5V, the input voltage can
one-tenth that of R1/C1 and RLOAD/COUT. swing in the negative direction a full 2.5
For example, in Figure 2, for a circuit to 0V. But, in the positive direction, it can
bandwidth of 10 Hz and a gain of 10, swing only 1V before clipping.
Table 1 recommends a C2 value of 3 F, This situation is not a problem if the
which provides a 3-dB bandwidth of 1 amplifier operates at a gain of 2.5 or
Hz. The parallel combination of RA and higher, because it will reach its maxi-
RB50 k3 F0.15-sec RC time mum output swing of 2.5V before the
constant. So, the op amp’s output will input stage limits. However, if the am-
take approximately 0.15 sec to settle to plifier operates at a lower gain, you must
VS/2. The input and output RC networks bias the positive input below VS/2 to al-
charge as much as 10 times faster. In ap- low symmetrical input stage limiting. In
plications in which the circuit’s
3-dB, the case of the AD8061, biasing the pos-
low-frequency bandwidth is low, the cir- itive input at 1.5V allows a 3V p-p input
cuit turn-on time may become exces- swing without clipping. Refer to the in-
sively long. In that case, a zener-biasing dividual product data sheets to deter-
method may be a better choice. mine the optimum single-supply biasing
voltage.왏
INPUT-HEADROOM CONSIDERATIONS
Some specialty op amps are designed Author’s biography
for low-voltage operation. Powering Charles Kitchin is an application engineer
these op amps from a low-voltage single at Analog Devices (Wilmington, MA),
supply, such as 5 or 3.3V, may introduce where he has worked for 25 years. In his
input-headroom limitations. This sce- current position, he develops application
nario can happen if the amplifier’s input circuits and writes technical articles, ap-
stage does not limit symmetrically. For plication notes, and books. He has an
example, the AD8061 op amp has an in- ASET degree from the Wentworth Insti-
put-common-mode-voltage range that tute (Boston) and several years study to-
extends to ground or the negative-sup- ward a BSET at the University of Lowell
ply line. However, its inputs can swing to (Lowell, MA).
90 edn | March 21, 2002 www.ednmag.com