K5Mbc: Interface Design

K5MBC
INTERFACE DESIGN
Design
Deign
The K5BMC EI Design Consists of
Interface Design
Wiring diagram of Interlocking equipments such as Signals, Points,
Crank handles, LX, Siding, Slot, Block, Axle Counters etc…
Communication diagram between systems and other consoles.
Power supply for EI system’s and Interlocking equipments.
Application logic Design

Completely Station Interlocking logic.
Kyosan India Pvt Ltd. TVM Signalling & Transportation

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Design
Inputs for Interface Design

Approved Signalling Plan.
Approved Panel Diagram.
Relay and SM Room building layout.
Power Supply scheme for EI.
Details of any additional Interlocking equipment to be interlocked with EI system.
Interface Design
Interface Design divided into two types.
Baseline design
Detailed Interface Design

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Design
Baseline Design Consists of the following
ET-PIO2 Bit calculation - Vital I/O.
MMIF2 Bit calculation - Non-Vital I/O.
ET-PIO2 & MMIF2 board calculation.
System Configuration.
Relay disposition chart.
K (EI) rack layout.
Relay room & SM’s room floor plan.

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Design
ET-PIO2 Bit calculation - Vital I/O.

Gather following information from Interlocking plan:
Type of signals – Direct / Indirect feed
Points / Cross over and type of control / operation
Motor points / Hand operated points
Slot’s, Level crossings, siding control and crank handles
Track circuits
Axle counters & AFTC
Type of block working with adjacent stations
Vital Output Read back contact to be considered for all signal outputs.
System bits.

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SCOPE
MMIF2 Bit calculation – Non-Vital I/O.
Gather following information from Panel Diagram:
Number of Knobs, push button controls and key controls
Number of indications, counters, buzzers etc
The information gathered from “Signal Interlocking Plan” and “Front Plate
Drawing” is used to calculate Vital I/O and Non-Vital I/O respectively.

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BASELINE DESIGN
VITAL I/O BIT CALCULATION
OUT DOOR VITAL VITAL INPUT NON-VITAL NON-VITAL RELAYS

GEAR OUTPUT INPUT OUTPUT
4 ASPECT DR, DECR, DR_F 4GN 4DGKE, QN1 - 3

SIGNAL HHR, HHECR, HHR_F 4HHGKE, QECX61 – 4
HR. HECR, HR_F 4HGKE,
RECR. 4RGKE.
3 ASPECT DR, DECR, DR_F 3GN DGKE, QN1 - 2
SIGNAL HR. HECR, HR_F HGKE, QECX61 – 3
RECR. RGKE.
2 ASPECT HR. HECR, HR_F 2GN HGKE, QN1 - 1

SIGNAL RECR. RGKE. QECX61 – 2

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BASELINE DESIGN
OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

GEAR OUTPUT INPUT INPUT OUTPUT
1 way Route UGR1. UECR. -- UGKE1. QN1 - 1

Indicator UGR1_F QECX61 – 1
2 way Route UGR1, UGR1_F, -- UGKE1, QN1 - 2

Indicator UGR2. UGR2_F, UGKE2. QECX61 – 1
UECR.
Calling-on COHR. COHECR, GN CO_HGKE. QN1 - 1
signal COHR_F. QECX61 – 1

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BASELINE DESIGN

Semi-auto AHR. AECR, -- AGKE. QN1 - 1

signal AHR_F QECX61 – 1
Fixed on -- RECR. -- RGKE. QECX61 – 1

aspect
Ground HR. OFFECR, GN OFFKE, QN1 - 1

shunt signal ONECR, ONKE. QECX61 – 2
HR_F.

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BASELINE DESIGN

Post shunt HR. OFFECR, GN OFFKE. QN1 - 1

signal HR_F. QECX61 – 1
Point WNR, NWKR, WN NWKE, QN1 – 2,

WRR. RWKR. RWKE. QNA1 – 2
Crank handle CHYR. CHCR. GN KEYINKE, QN1 - 1

OUTKE. QNA1-1

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BASELINE DESIGN

Level LXYR. LXCR. LC.N CLOSKE, QN1 - 1

Crossing OPENKE. QNA1 – 1
Siding YR. CR. N KEYINKE, QN1 – 1,

KEYOUTKE QNA1 – 1
Slot YR. OVYR, YN YKE, QN1 - 1

YR_F. OVYKE. QNA1-1

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BASELINE DESIGN

Track circuit -- TPR -- TKE, QNA1 – 1

TKRE.

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ETPIO2 Bit chart
Counter output bits to be taken.
Following system Output bits are to be taken.

FCOR – False feed cutoff relay.
F.FCOR – FCOR false cutoff relay.
KVCOR – Kyosan Vital cutoff relay.
POWERUP – System ON relay.
Following system Input bits are to be taken.

S1-PW-OK - System1 DC-DC converter Normal.
S2-PW-OK - System2 DC-DC converter Normal.
PWL2B-OK – ET LINE2B DC-DC converter Normal.
PWPIO2-OK – ET PIO2 DC-DC converter Normal.
DC-DC.OPC_HLY – Operator Console DC-DC converter Normal.
DC-DC.MMIF_HLY – Control panel DC-DC converter Normal.

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ETPIO2 Bit chart
VITAL I/O BIT CHART PHOTO TO BE INSERTED.

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MMIF2 Bit chart
System Output bits to be taken in MMIF2 Bit chart.

SYSINKE, ALL_BLKKE, EI.FSR.NORKE, EI.FSR.BUZ, EI_LFL_OFFKE,
EI_LFL_ONKE, EI_HFL_OFFKE, EI_HFL_ONKE, PANEL_S1_ONKE,
PANEL_S1_OFFKE, PANEL_S2_ONKE, PANEL_S2_OFFKE, OPC_S1_ONKE,
OPC_S1_OFFKE, OPC_S2_ONKE, OPC_S2_OFFKE.
The following system Input bits to be taken in MMIF2 Bit chart.

ALL_UNBLK, SYS_FACK_N

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MMIF2 Bit chart

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Calculation of boards & Relays
After finding out final quantity of Vital and Non-vital I/O bits, quantity of
various boards is derived as below:
32 Vital input and output per ETPIO2 card.
32 Non-vital input and 64 output per MMIF2 card.
One EP5 sub rack will have 2 Line2B card.
One EM6 sub rack will have 2 LineM2 card.
Calculate the quantity of various relays on the basis of above table and
design of relay rack.

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Calculation of Sub racks
After finding out final quantity of Vital and Non-vital boards, quantity of various
sub racks is derived as below:
Place maximum of 5 nos. of ETPIO2 cards per sub rack. Arrive at final quantity of
EP5 sub rack.
Place maximum of 6 nos. of MMIF2 cards per sub rack. Arrive at final quantity of
EM6 sub rack.
The station which is having more than 120 routes Journal Module sub rack to be
considered for data logger communication.
2 nos. of SPHC – TT & SPHC – PW card required for divide the one
communication channel into two. One for MTC & one for Journal module.
Stations which is having Less than 120 routes through FIO7[P] board serial port
will be used for data logger communication.
For large stations which cannot be processed by one EI, 2 or more EI logic
modules can be connected via signal LAN.

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System Configuration
On the basis of requirement of installation / site, Logic Sub rack is

connected with the peripheral equipments such as EP5, EM6 Sub racks,
OPC, Journal module, MTC and another Logic units.
All the peripheral equipments are connected with logic sub rack module
through multimode fiber patch cord.
Journal Module connected to data logger with help of “Non-Twisted pair –
Communication” cable.
MTC connected to journal module with help of Cat-6e Ethernet cable.
Relay racks are connected to EP5 sub rack with “Single Strand Multi core”
Indoor (40 Core) cable.
Relay racks are connected to CT rack with “Multi strand, Single core”.
Relay wiring is done with help of “Multi strand, Single core” wire.

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System Configuration

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Relay Rack
Maximum of 120 relays can be accommodated in one relay rack.
Relay rack is having 10 rows (A-K).
A – Row used for ETPIO2 vital output terminals.
B – Row used for ETPIO2 vital input terminals.
C – Row used for power fuse terminals.
D – Row used for power negative terminals.
E,F,G,H,J,K – Rows used for relays.
Two relays after one Space to be provided.
Relay rack layout design should avoid unnecessary rack to rack wirings.

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Relay Rack

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Relay Rack

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Relay Room & SM Room Layout
Once calculation of boards, relays and system configuration is finalized

Design of Relay Room Floor Plan is taken up with following criterion:
K-Rack - 1100 * 800 * 2250 mm
Relay Rack - 1350 * 300 * 2100 mm
Data logger - 710 * 510 mm
OPC & MTC Table - 1200 * 750 mm

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Detailed Interface Circuit
Detailed Interface circuit design having the following contents.
Index Symbols
K rack layout Communication circuit
Input / Output board circuit Field circuit
Counter circuit Miscellaneous circuit
FCOR circuit Power Distribution circuit
FSIO I/O circuit DID circuit
Fuse and Terminal chart Contact analysis

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Index and sheet number allotment

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Symbols

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K – Rack Layout
All the sub racks such as Logic sub rack, ET sub rack and Journal module
sub racks and its required power wirings & terminations will be installed in
the K-rack.
This rack can be used in three ways according to the sub rack usages
One ET sub rack, One logic sub rack & Journal module (Type:1).
Only logic sub rack and Journal module (Type:2).
Only 2 ET sub racks (Type:3).
A row will be used for I/O termination of ET sub rack.
B row will be used for ET sub rack.
C row will be used for Logic sub rack.
D row will be used for journal Module.

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K – Rack Layout – Type 1

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Communication between Logic sub rack & ET sub rack

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Communication between Logic sub rack and EM6 sub rack and OPC

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Communication between Logic Sub Rack and Journal module and MTC

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Serial communication for Datalogger

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Ethernet Communication between MTC and JM

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Input and Output board circuit
Standard wire notes:
The below table shows the standard wire gauge to be used for design and
wiring at site.

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INPUT BOARD CIRCUIT
ET-PIO2 I/O board is having 32 Vital input and output.
Board Input supply Voltage – 24V DC.
For 8 Input bits one looping supply will be used. Positive will looped at relay
side & negative will be looped in the connector side.
From the board J1 Connector to I/O termination in K-rack, 0.2 sq.mm blue
colour wire will be used.
From K rack to relay rack, 0.6 sq.mm 40 core indoor cable to be used.
All the relay contact wiring will be in 0.5 sq.mm blue colour wire.

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INPUT BOARD CIRCUIT

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OUTPUT BOARD CIRCUIT
Positive supply will be delivered from the ETPIO-2 board.
Negative supply will be looped in relay side.
For 8 outputs one negative will be used.
MOV to be provided across all the Output relays to avoid the back EMF.
From the board J2 Connector to I/O termination in K-rack, 0.2 sq.mm RED
colour wire will be used.
From K rack to relay rack, 0.6 sq.mm 40 core indoor cable to be used.
From the relay rack to relay coil 0.5 sq.mm red colour wire will be used.
For Negative looping 0.5 sq.mm black colour wire will be used.

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OUTPUT BOARD CIRCUIT

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I/O BOARD TERMINAL DETAILS

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I/O BOARD TERMINAL DETAILS

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DIP SWITCH SETTINGS FOR ELECTRONIC POLARITY KEY
Used to address particular card of the sub-rack.
For one channel we shall connect up to 15 board’s accordingly binary 4 digit

code to be applied to each board SW1 & SW2.
The system of operation classified as Single system operation and Double

system operation.
In single system of operation LINE2B card only got duplicated other PIO 2
I/O boards are not duplicated.
The jumper setting should be short between 1 to 6 and 2 to 7 in LINE2B J2

for Single system operation.
The jumper setting should be open in LINE2B J2 for Double system

operation.

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DIP SWITCH SETTINGS FOR ELECTRONIC POLARITY KEY

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FIELD CIRCUIT
Field circuit consists
Signal lightning circuits.
Point control and detection circuits.
Crank handle control and detection circuits.
Siding control and detection circuits.
Track input circuits.
LC gate control and detection circuits.
Block instrument and axle counter circuits.
All the above circuits should be designed as per the zonal railway practice.

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Signal Lightening circuits

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MISCELLANEOUS CIRCUIT

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LVR, SMR, Relay room door and DC.DC.FAIL circuits are considered as
miscellaneous circuits

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DC-DC Converters potential free contact of Sys1 supply, Sys2 supply,

LINE2B supply, ET-PIO2 supply, OPC supply and MMIF supply to be taken as
separate input for indication purpose.

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FCOR CIRCUIT

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Power Distribution Circuit

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Power Distribution Box

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Power Distribution Circuit

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DC-DC Converter calculation
Voltage Current( Number of Power(V

(V) A) units A)
EI equipments
System 1 (JM and Data logger) 24 4 1 96
System 2 24 2 1 48
24 4 3 288
LINE2B Supply (ET Sub Rack with 5 boards)
24 3 3 216
ETPIO2 Supply (IF supply Average of I/O relays
considered)
MTC VDU Supply 24 2 1 48
Total load at output of DC-DC Converter 864
Total load at input of DC-DC Converter(110V DC) 960
110 3 1 330
Monitor 42" Supply
110 3 1 330
Monitor 32" Supply
110V AC load for Monitor 660

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DC-DC Converter calculation

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DC-DC Converter

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IPU6C supply

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IPU6C supply

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SPHC-PW supply

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SPHC-PW supply

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Journal Module supply
System 1 DCDC converter supply to be connected to JM power card.
24 VDC positive and negative supply to be given to JM power card terminals

P1 & P2 respectively.
1.5 sq.mm twisted pair red and black wire to be used.

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Journal Module supply

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LINE2B Supply
LINE2B DCDC converter supply to be connected to LINE2B card.
24 VDC positive and negative supplies to be given to LINE2B card J1

connectors 6 & 14 and connector 8 & 16 respectively for all LINE2B cards.

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LINE2B Supply

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ETPIO2 Supply
ET-PIO2 DCDC converter supply to be connected to each ET-PIO2 card.
24 VDC positive and negative supplies to be given to ET-PIO2 card J3

connectors 1 & 4 and connector 3 & 5 respectively for all ET-PIO2 cards.

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ETPIO2 Supply

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ETPIO2 Supply

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Signal OFF ECR Supply
All Signals’ OFF supply should feed via FCOR contact.

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Maintenance PC power supply
Maintenance embedded PC power supply shall be taken from the B24 (EXT)
via 24VSurge protector.
110VAC to be taken from IPS for MTC & OPC monitor supply.

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Maintenance PC power supply

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FSIO Input Output circuits
System Bits Negative supply to be given to FIO7- [P] of S1 & S2 in CN9

connector pin number 12 for healthy status bits (FSC1FLR, FSC2FLR) of
FSIO boards.

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System Bits Negative supply to be given to IPU6C of S1 & S2 in CN2

connector pin number 1 for healthy status bits (IP1FLR, IP2FLR) of IPU6C
boards.

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JM-WDT & JM-PWFL inputs to be taken from 7,8 and 9,10 pins respectively
from KDD board in journal module sub rack.
Front contact of WDTR relays also to be read in FSIO input.
FSC1FLR, FSC2FLR, IP1FLR, IP2FLR, JM-WDT, JM-PWFL, WDTR1, WDTR2
bits to be given as input in CN7 of FSIO board.
Twin terminal is used to read the FSIO inputs for system 1 and system 2.
System bits positive supply to be given in CN7 pin number7 of FSIO board.

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WDTR1 and WDTR2 outputs will be delivered from CN8 pin number2 of FSIO
board.
System bits positive supply to be given in CN8 pin number 1.

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DID circuit
Station ID is an unique number.
Each station is having different station ID.
It has 8 switches for various setting. Each switch has three pins. Low. High &
Center.
If Low and Center pins are wired, System will take a 0.
If High and Center pins are wired, System will take a 1.
This station ID should match with the ID given in application logic.

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DID circuit

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Fuse and Terminal Chart

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Contact Analysis

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Detailed MMIF Circuit
Detailed MMIF circuit design having the following contents.
Index
Symbols
Input / Output board circuit
Power Distribution circuit

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Index and Sheet number allotment
Following two tables to be used for sheet number allotment to maintain

similar sheet number in all detailed interface circuits.
MMIF Detailed Interface Circuits
Drawing Number Drawing Name
1500 Cover Sheet

1501- 1510 Index
1511- 1520 Symbols
1521- 1540 General Circuits
1541-1544 System Configuration
1545-1555 MMIF2 Bit chart
1601-1800 MMIF2 Input / Output Board Circuits
1801-1850 Power Distribution Circuits
1851-1900 Fuse and Terminal Analysis
1900- 2000 Panel Terminal chart

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Symbols

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MMIF2 Output Board Circuit
Positive 24V DC will be looped in the panel for non-vital outputs and
negative 24 V DC will delivered by the system.

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MMIF2 Input Board Circuit
Negative 24 V DC will be looped in the panel & Positive 24V DC will be

looped inside the board.

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Power Distribution
As per the RDSO requirement 110V supply with redundant Supply and
redundant path shall be taken from IPS.
Surge Suppressor to be provided for each supply between IPS and Power
Distribution Box (PDB) at SM Room to arrest the surges.
As per the system requirement 24V DC needed. DC-DC converters are used
to convert 110V DC to 24V DC.

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Power Distribution

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DC-DC Converter Calculation
24V Gallent make 10 A DC-DC converter is used for power distribution

purpose.
Converters shall be calculated as n+1 configuration.
Load to be sharing to be done between DC-DC converters.
Voltag Curren Number of Power(

EI equipments e (V) t(A) units VA)
E-M6 Sub Rack Supply 24 2.5 2 120
OPC VDU Supply 24 2 1 48
Total load at output of DC-DC Converter 864
Total load at input of DC-DC Converter(110V DC) 960
110 3 1 330
Monitor 42" Supply
110 3 1 330
Monitor 32" Supply
110V AC load for Monitor 660

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LINEM2 Board Supply
24V DC supply to be given in J11 connector pin number 6 & 12. Negative
supply to be given in pin number 7 & 13.

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MMIF2 Board Supply
Positive supply to be given connector CN1 and negative supply to be given

connector CN2.
Individual 24 VDC to be given for Individual MMIF2 boards.

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LINEM2 Board Supply

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CRIMPING TOOL DETAILS FOR INTERFACE WIRING
Extraction
Sl.No Connection details Connector Crimping Tool MAKE
tool
1 Line 2B Power (J1) Mic (17P White),171354-1
ET PIO2 Power 91584-1 723735-1 Tyco

2 Mic (5P White),172026-1
supply(J3)
Line 2B Power (J2) Mic (9P White),171892-1 91587-1 723735-1 Tyco

M10S-1J(tool)S-3D1(dice)SL-
RX20-
3 IPU6C Power Souriau (SMS6P1) 39(Stop bushing)(SOURIAU Souriau
25V2J
BURNDY)
5 ET Input wiring
Sumicon (HIROSE),SC-1660 TC1600-111 TC-1600-21 Hirose
6 ET Output Wiring
7 FIO7P Input reading HIROSE Connector - HIF3BA-14D-2.54C
8 IPU6C Input reading HIROSE Connector - HIF3BA-10D-2.54C
9 FIO7 P Input Board HIROSE Connector - HIF3BA-16D-2.54C HIF3-T2226HC HIF1-PO Hirose
FIO7 P OUTPUT
10 HIROSE Connector - HIF3BA-16D-2.54C
Board

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CRIMPING TOOL DETAILS FOR INTERFACE WIRING
Extraction
Sl.No Connection details Connector Crimping Tool MAKE
tool
Commercial MATE-N-LOK Connector, 1-

11 SPHC-PW 91512-1 465644-1 km
480424-0
12 I/O Termination Souriau,(MB52R-L120) Souriau

M10S-1J(tool)S-10(dice)SL-40(Stop
RX20-25V2J
bushing)(SOURIAU BURNDY)
13 I/O Termination Souriau,(MB52R-L110) Souriau
15 MMIF Line 2B power 171883-1 1 3C 91584-1 723735-1 Tyco
16 MMIF Input wiring

Sumicon (HIROSE),SC-1660 TC1600-111 TC-1600-21 Hirose
17 MMIF Output Wiring

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K5MBC

The K5BMC EI Design Consists of

Application logic Design

Kyosan India Pvt Ltd. TVM Signalling & Transportation

Inputs for Interface Design

Approved Panel Diagram.

Relay and SM Room building layout.

Power Supply scheme for EI.

Details of any additional Interlocking equipment to be interlocked with EI system.

Detailed Interface Design

Kyosan India Pvt Ltd. TVM Signalling & Transportation

Baseline Design Consists of the following

ET-PIO2 Bit calculation - Vital I/O.

MMIF2 Bit calculation - Non-Vital I/O.

ET-PIO2 & MMIF2 board calculation.

Relay disposition chart.

K (EI) rack layout.

Relay room & SM’s room floor plan.

Kyosan India Pvt Ltd. TVM Signalling & Transportation

ET-PIO2 Bit calculation - Vital I/O.

Kyosan India Pvt Ltd. TVM Signalling & Transportation

MMIF2 Bit calculation – Non-Vital I/O.

Gather following information from Panel Diagram:

Number of Knobs, push button controls and key controls

Number of indications, counters, buzzers etc

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL INPUT NON-VITAL NON-VITAL RELAYS

4 ASPECT DR, DECR, DR_F 4GN 4DGKE, QN1 - 3

2 ASPECT HR. HECR, HR_F 2GN HGKE, QN1 - 1

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

1 way Route UGR1. UECR. -- UGKE1. QN1 - 1

2 way Route UGR1, UGR1_F, -- UGKE1, QN1 - 2

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

Semi-auto AHR. AECR, -- AGKE. QN1 - 1

Fixed on -- RECR. -- RGKE. QECX61 – 1

Ground HR. OFFECR, GN OFFKE, QN1 - 1

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

Post shunt HR. OFFECR, GN OFFKE. QN1 - 1

Point WNR, NWKR, WN NWKE, QN1 – 2,

Crank handle CHYR. CHCR. GN KEYINKE, QN1 - 1

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

Level LXYR. LXCR. LC.N CLOSKE, QN1 - 1

Siding YR. CR. N KEYINKE, QN1 – 1,

Slot YR. OVYR, YN YKE, QN1 - 1

Kyosan India Pvt Ltd. TVM Signalling & Transportation

VITAL I/O BIT CALCULATION

OUT DOOR VITAL VITAL NON-VITAL NON-VITAL RELAYS

Track circuit -- TPR -- TKE, QNA1 – 1

Kyosan India Pvt Ltd. TVM Signalling & Transportation

Counter output bits to be taken.