CPE 14 Reviewer Module 1 2
CPE 14 Reviewer Module 1 2
CPE 14 Reviewer Module 1 2
• a single chip containing two separate • a CPU that includes eight complete
processors (execution cores) in the same execution cores per physical processor.
IC. • Example: Intel Xenon
• refers to a CPU that includes two
complete execution cores per physical
processor. FUTURE OF MICROPROCESSORS
• It has combined two processors and
their caches and cache controllers onto Intel Core i9-7900X- 10 cores.
a single integrated circuit. Intel Core i9-10980XE- 18 cores.
• Dual core chip is that tasks can be carried
out in parallel streams, decreasing Ryzen Thread- 8, 12 and 16-core processors
processing time. Krzanich reveal “Tangle Lake” - 49 quadbit test
chip. A quantum bit chip has the ability to hold
more information than other chips.
QUAD CORE
• 8086 has two blocks BIU and EU. • Silicon chip which includes
• The BIU handles all transactions of data microprocessor, memory, and I/O in a
and addresses on the buses for EU. single package.
• BIU performs all bus operations such as
Microprocessor
instruction fetching, reading and writing
operands for memory and calculating • it is a programmable VLSI chip which
addresses of the memory operands. includes ALU, register circuits and
• The instruction bytes are transferred to control circuits.
the instruction queue. • it is called CPU.
• EU executes instructions from the • Controlling element in a
instruction system byte queue. computer system.
• Both units operate asynchronously to • Controls memory and I/O
give the 8086 an overlapping instruction through connections called
fetch and execution mechanism which is buses.
called as PIPELINING. -Buses select an I/O or memory
• BIU contains Instruction queue, device, transfer data between
Segment registers, Instruction pointer, I/O
Address adder. • Memory and I/O controlled via
• EU contains Control circuitry, Instruction instructions stored in memory,
decoder, ALU, Pointer and Index executed by a microprocessor.
register, Flag register.