568 Chapter7 Building Blocks of Integrated-Circuit Amplifiers Problems 569

q F value of V, will the nominal value of

stack between the power-supply rails results in the a The Widlar current source provides an atea-effic J, be obtained?

SIWA180Nd £2 MaLdWHD
ient
disadvantage of a severely limited output-signal swing. to implement a low-valued constant-current source Way ee, increases by 1 V, whatis the corresponding increase in
The folded-cascode configurationhelpsresolvethis issue. also has a high outputresistance. . that Yo V, =20V-
Tfitt
a ACS amplifier with aresistance R, inits source lead has an m Preceding the CE (CS)transistor with an emitter follow
outputresistance R, ~ (1+4g,,R,)r,- The corresponding (a source follower) results in increased input resistandl 75 A PMOS current mirror consists of three PMOS
" gransistors, One diode connected and two used as current Tue Q; Qs
formula for the BJT case is R, = [1+-g,,(R. llr) |ro- in the BJT case and wider bandwidth in both the BIT and
m Cascoding can be applied to current mirrors to increase MOScases. ~ outs. All transistors have |V,| = 0.6 V, k, = 100 pA/V’,
their outputresistances. An alternativethatalso solves the , eep=10pm but three different widths, namely, 10 um,
m Preceding the CB (CG)transistor with an emitter followe;
£ problem in the bipolar case is the Wilson circuit. The iim, and 40 pm. Whenthe diode-connected transistoris 2, Q)
(a source follower) solves the low-input-resistanee
MOSWilson mirror has an outputresistanceof(g,,7,) r,s problem of the CB and CG configurations, supplied from a 100-A source, how manydifferent output
%
and the BJT version has an outputresistance of 4£r,. currents are available? Repeat with twoofthetransistors diode
Both the cascode and Wilson mirrors requireat least 1 V a The Darlington configuration resultsin an equivalent BT
connected and the third used to provide current output. For
or so for proper operation. each possible input-diode combination, give the valuesofthe Figure P7.7
output currents andof the V,, that results.
7.8 Considerthe basic bipolar current mirror of Fig. 7.7 for
p7.6 The current-steeringcircuit of Fig. P7.6 is fabricated in
the case in which Q, and Q, are identical devices having
aCMOStechnology for which ,,C,, = 400 pa/v’, HC. =
100 pA/V’, V,, = 0.5 V V,, = —0.5 V, V,, = 5 V/um, and
I,=10"A.
O13 BSES [Viol = 5 V/um.If all devices have L = 0.5 ym, design the (a) Assumingthetransistor 8 is very high,find the range of
circuit so that Jpn, = 20 WA, J, = 100 pA, I, = 1, = 40 pA, Vzp and I, corresponding to Jpg, increasing from 10 pA
and I, = 80 1A. Use the minimum possible device widths to 10 mA. Assume that Q, remainsin the active mode,
needed to achieve properoperation of the current source Q, and neglect the Early effect.
ComputerSimulation Problems output currentof 150-1.A nominal value. To simplify matters,
for voltages atits drain as high as +0.8 V and properoperation (b) Find the range of J, corresponding to Jp, in the range
assumethatthe nominal valueofthe output currentis obtained
MN Problems identified by the multisim/PSpice icon are of the current sink QO, with voltages at its drain as low as of 104A to 10mA,taking into account the finite f.
at Vo ~ Vos. It is further required that the circuit operate for
intended to demonstrate the value of using SPICE simulation -0.8 V. Specify the widthsof all devices andthe value of R. Assumethat 8 remains constant at 100 over the current
V, in the range of 0.3 V to Vpp and that the changein J,
to verify hand analysis and design, and to investigate Find the output resistance of the current source Q, and the range 0.1 mA to 5 mA butthatat J, ~10 mA and at J, ~
over this range be limited to 10% of the nominal value of
importantissues such as allowablesignal swing and amplifier outputresistance of the current sink Q,. 10 pA, 6 = 50. Specify I, correspondingto Ize = 10 WA,
J,. Find the required value of R and the device dimensions.
nonlinear distortion. Instructionstoassist in setting up PSpice 0.1 mA, 1 mA, and 10 mA. Notethat 8 variation with cur-
For the fabrication-process technology utilized, uC, =
and Multism Simulationsforall the indicated problems can rent causesthe currenttransfer ratio to vary with current.
400 wA/V’, V, = 10 V/um,and V, =0.5 V.
be foundin the correspondingfiles on the website. Note that
7.9 Consider the basic BJT current mirror ofFig. 7.7 for the
if a particular parameter valueis not specified in the problem
D7.3 Sketch the p-channel counterpart of the current-source case in which Q,has m timesthe area of Q, . Show thatthe cur-
statement, you are to make a reasonable assumption.
circuit of Fig. 7.1. Note that while the circuit of Fig. 7.1 renttransferratio is given by Eq. (7.19). If B is specified to be
should more appropriately be called a currentsink, the aminimumof80, whatis the largest currenttransferratio pos-
Section 7.2: IC Biasing—Current Sources, corresponding PMOScircuit is a current source. Let V,, = sible if the error introducedbythefinite f is limited to 10%?
Current Mirrors, and Current-Steering Circuits 1.3 V,|V,| =0.4 V, Q, and Q, be matched, and u,C,, =
7.10 Consider the basic BJT current mirrorof Fig. 7.7 when
80 pA/V’. Find the device W/L ratios and the value ofthe
D7.1 For V,,) =1.3 V andusing Jppp = 100 WA,itis required
to design the circuit of Fig. 7.1 to obtain an output current
resistor that sets the value of Jy, so that a nominally 80-~A
output current is obtained. The current source is required
5 Q, and Q, are matchedand Ippp = 1 mA. Neglectingthe effect
offinite 6, find the change in J,, both as an absolute value
whose nominal value is 100 2A. Find R if Q, and Q,are and as a percentage, corresponding to V, changing from 1 V
to operate for V, as high as 1.1 V. Neglect channel-length
matched with channel lengths of 0.5 1m, channel widths to 10 V. The Early voltage is 90 V.
modulation.
of 5um, V, = 0.4V, and k, = 500 A/V. Whatis the
lowest possible value of V,? Assuming that for this process 7.11 Give the circuit for the pnp version ofthe basic current
(MN 7.4 Consider the current-mirrorcircuit of Fig. 7.2 with -10V mirror of Fig. 7.7. If 8 of the pnp transistor is 50, what is the
technology the Early voltage V, =5 V/um, find the output
two transistors having equal channel lengths but with Q, currentgain (ortransfer ratio) I, /Igz- for the case ofidentical
resistanceofthe currentsource. Also,find the change in output Figure P7.6
having a width five times that of Q,. If Iggp is 20 2A and transistors, neglecting the Early effect?
currentresulting from a +-0.5-V change in V,.
the transistors are operating at an overdrive voltageof0.2 V,
D7.2 Using Vp, = 1.8 V and a pair of matched MOSFETs, whatI, results? What is the minimum allowable value of Vo D7.12 The current-sourcecircuit of Fig. P7.12 utilizes a pair
7.7 For the current-steering circuit of Fig. P7.7, find J, in of matched pnp transistors having J, = 10°°A, B=S0, and
design the current-source circuit of Fig. 7.1 to provide an for proper operation ofthe current source? If V, = 0.5 V,at
termsof Jpep and device W/L ratios. [Vl = 50 V.It is required to design the circuit to provide an
ISM = Multisim/PSpice;
Pi * = difficult Pp problem; ** = moredifficult; *** = very challenging; D = design problem
IM = Multisim/PSpice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem
 570 Chapter7 Building Blocks of Integrated-Circuit Amplifiers Problems 571
a ' Veo = 3 V this case as: (b) With Y connected to ground, show that a virtual ground

SINAISOUd £LdWHO
a
appears at X. Now, if X is connected to a +5-V supply
Ww
=
through a 10-kQ resistor, what current flows through Z?
[7
2 i D7.17 The MOSFETsin the current mirror ofFig. 7.12(a)
a a Q have equal channellengths, w,C,, = 400 pA/V? and V, =20
V/.m.If the input bias current is 200 LA, find W,, W,, and L
Le Vo to obtain a short-circuit currentgain of 4, an input resistance
Go (Z
| 7.13 Find the voltagesat all nodes and the currents through
|| all branchesin the circuit ofFig. P7.13. Assume| Vel =0.7y of 500 Q, and an outputresistance of 20 kQ.
. | and B = 00.
a R | 7.18 Figure P7.18 shows an amplifier utilizing a current
<i mirror 0,—Q,. Here Q, is acommon-source amplifier fed with
D 7.14 Using the ideas embodied in Fig. 7.10, design a
= multiple-mirrorcircuit using power supplies of +5 V to Create U, = Ves + U,, where Vo, is the gate-to-source dc bias voltage
GU) =
source currents of 0.2mA, 0.4mA, and 0.8mA and sink of Q, and v, is a small signal to be amplified. Find the signal
Figure P7.12 currents of 0.5 mA, 1 mA, and 2 mA. Assumethat the BITs
componentofthe outputvoltage uv, and hencethe small-signal
have |Vae| =~ 0.7 V and large B. What is the total power voltage gain v,/v,. Also, find the small-signal resistance of
output current J, = 1 mA at V, = 1 V. What values of [per the diode-connected transistor Q, in termsofg,,,, and hence
dissipated in yourcircuit?
and R are needed? Whatis the maximum allowedvalue of V, the total resistance betweenthe drain of Q, and ground. What
while the current source continues to operate properly? What 7.15 For the circuit in Fig. P7.15, let |Vje| = 0.7V and -2.7V is the voltage gain of the CS amplifier Q,? Neglectall r,’s.
change occurs in J, corresponding to V, changing from the B = oo.Find J, V;, V2, Vs, Vy and V; for (a) R= 10kQ
maximum positive value to—5 V? Hint: AdaptEq.(7.21) for and (b) R= 100k. Figure P7.15
#7,16 The circuit shown in Fig. P7.16 is knownas a current
conveyor.
Y x
Q a
Zz
Figure P7.18
*7,19 Figure P7.19 showsa current-mirrorcircuit prepared
for small-signal analysis. Replace the BJTs with their
Q.
Q, > Qs
Vig
Figure P7.16
(a) Assumingthat Y is connectedto a voltage V, acurrent J is
forced into X, and terminal Zis connectedto a voltagethat
keeps Q,in the active region, show that a current equal
to J flows through terminal Y, that a voltage equal to V
appears at terminal X, and thata current equal to J flows
through terminal Z. Assume to belarge; corresponding
transistors are matched, andall transistors are operating
Figure P7.13 in the active region. Figure P7.19
AMM = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem TERM = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem
572 Chapter7 Building BlocksofIntegrated-Circuit Amplifiers
Problems 573
hybrid- 2 models andfind expressionsfor R,,, i,/i,, and R,, Assume 8 = 100 and remains constantas I is varied
andth; BJTCell MOSFETCell L=0.5 jm andareto be operated at Ip =
wherei, is the output short-circuit current. Assumer, > r,. V, = 10 V.Present yourresults in a table. : 100 LAand|V,
‘ovl =
0.3 V.Find the tequired values of Ve. WIL),,
jas Current [,=0.lmA [,=1mA J,=0.1mA Ip=1mA (WIL),, andA..
7.20 It is requiredto find the incremental(i.e., small-signal) 7.25 Consider the CE amplifiers of Fig. 7.13(b) for the
D7.38 Thecirc uit in Fig. 7.15(a)i s fabrica
resistanceof eachof the diode-connectedtransistors shownin of7=0.5 mA, 6 = 100, and V, = 100 V. FindR,,,A,,,andR_ ted in a 0.18-~m
CMOStechnology for which H,C,, =400
Fig. P7.20. Assumethat the de bias current J = 0.1 mA. For If itis requiredto raise R,, by a factor of 5 by changingJ, what pA/V?, ea
wc =
100 LA/V’, V,, = —V, =O0.5V, Vi = 5V/um, |V,,|
1
the MOSFET,let1,,C,, = 200 A/V* and W/L = 10. Neglect value of J is required, assuming that 6 remains unchanged? > Van =
5 V/m, and V,, = 1.8 V. Itis required to design
r, for both devices. What are the new values of A,, and R,? If the amplifier the circuit
to obtain a voltage gain A, = —40 V/V. Use
fed with a signal source having R,, = 5 kQ. andis connec devices of
equal length L operating at J = 100 WA and |Voy|
to a load of 100-kQresistance, find the overall Voltagegai 7.33 A CS amplifier utilizes an NMOStransistor with =0.25 V.
Determinethe required values of Vg, L, (WIL),,
U,! Uggs L=0.54 um and W/L = 8. It was fabricated in a 0.18-~m and (WIL),.
MOSprocess for which u.,C,, = 400 wA/V? and V, = 7.39 Figure P7.39 shows an IC MOS
7.26 Findthe intrinsic gain ofan NMOStransistor fabricated amplifier formed
-5V/um. Whatis the bias currentof the transistor for which by cascading two common-source Stages.
Assuming that
in a process for which k, = 400 wA/V’ and V, = 10 um. Ay =18 V/V? Vi, = [V,,| and that the biasing currentsources have
output
Thetransistor has a 0.5-1m channellength andis Operated at resistances equal to those of Q,and Q,, find an
Voy = 0.2 V.Ifa 2-mA/V transconductance is required, what 17.34 FindA, foran NMOStransistorfabricatedina CMOS expression for
the overall voltage gain in terms of 8m and r,
mustI, and W be? "process for which kK = 400 wArv? and Vi = 6 V/um. The of Q, and Q,.
9 If Q, and Q,are to be operated at equal overdri
transistor has a 0.5-j1m channellength andis operated with an ve voltages,
[Voyl, find the required value of [Voyl if [V4]
D7.27 Consider an NMOS transistor fabricated in a _ _ overdrive voltage of 0.15 V. What must W befor the NMOS =5 V andthe
0.18-1m technology for which k, = 400 wA/V? and Vi = _ transistor to operate at J, = 100 |4A? Also,find the values gain required is 400 V/V.
(a) (b) 5 V/um.It is required to obtain an intrinsic gain of 20 V/V | E ofg,, and r,.
Figure P7.20 and a g,, of 2mA/V. Using Vp, = 0.2 V,find the required
_ D7.35 AnNMOS transistoris fabricatedin the 0. 18-(4m pro-
values of L, W/L, andthebias current J.
7.21 For the base-current-compensated mirror of Fig. 7.11, cess whose parametersare given in Table K.1 in Appendix
K.
let the three transistors be matched and specified to have a D7.28 Sketch the circuit for a current-source-loaded CS _ The device has a channel length twice the minimum
andis
collector current of 1 mA at V,, = 0.7 V. For Jgge of 100 pA amplifier that uses a PMOStransistor for the amplifying 4 operated at Vj, = 0.25 V and J, = 10 pA.
and assuming 8 = 100, what will the voltage at node x be? If device. Assume the availability of a single +1.8-V dc . (a) Whatvalues of 8m» T,, and A, are
obtained? }
Jgep is increased to 1 mA, whatis the change in V,? Whatis supply. If the transistor is operated with \You = 02V— (6) If J, is increased to 100 A, what do Vovs 8m»
Tor and Ay
the value of J, obtained with V, = V, in both cases? Givethe what is the highest instantaneous voltage allowed at the become?
U,
i; Oo— Qi Ug
percentage difference betweenthe actual and ideal value of drain? (c) If the device is redesigned with a new value
of W so that
I,. Whatis the lowestvoltage at the output for which proper it operates at V,, = 0.25 V for T, = 100 1A,
7.29 AnNMOStransistor operated with an overdrivevoltage whatdo Bus
current-source operation is maintained? r,, and A, become?
of 0.25 V is required to have a g,, equal to that of an npn
*7,22 For the base-current-compensated mirrorof Fig. 7.11, (d) If the redesig ned device in (c) is operate
transistor operated at J, = 0.1 mA. What must J, be? What d at 10 A,find
show that the incremental input resistance (seen by the value of g,, is realized? Vovs 8s To» and Ag.
,
reference current source) is approximately 2V;/Ipg¢. Evaluate (©) Which designs and operating conditio Figure P7.39
ns produce the
R,, for Igege = 100 WA. (Hint: Q, is operating at a current 7.30 For an NMOStransistor with L = 0.3 ym fabricated in lowestand highest values of Ao? Whatare these
values?
1,3 = 21,/B, whereI, is the operating currentof each of Q, and the 0.18-\.m process specified in Table K.1 in Appendix K, In eachofthese twocases, if W/L is held at the *7.40 The NMOStransistor in the circuit of
. samevalue Fig. P7.40 has
Q,. Replaceeach transistor with its T model and neglectr,.) find g,,, r,, and Ay obtained when the device is operated at but L is made 10 times larger, what gains result? V,=0.5 V, k,W/L=2 mA/V’, and V, =20V.
I, = 100 pA with Vo, = 0.2 V. Also,find W.
D7.23 Extend the current-mirror circuit of Fig. 7.11 to n Dp 7.36 Using a CMOS technology (a) Neglecting the de current in the feedbac
for which k network and
outputs. Whatis the resulting currenttransfer ratio from the 7.31 For an NMOStransistor with L = 1 pmfabricated in k, = 200pA/V? and Vi = 20V/um, the effectof r,, find V,,. Then find the de current
design a in the
inputto each output, J,/Ipe,? If the deviation from unity is to the 0.5-1.m process specified in Table K.1 in Appendix K, current -source -loaded CS amplifi er for feedback network and Vps- Verify that you
operation at J = werejustified
be kept at 0.2% or less, whatis the maximumpossible number find g,,, r,, and A, if the device is operated with Vy = S0uA with Vy, = 0.2V. The amplifier in neglecting the currentin the feedback networ
is to have an k when
of outputs for BJTs with 6 = 150? 0.5V and J, = 100A. Also, find the required device open-circuit voltage gain of —100 V/V. you foundV,,.
Assume that the
width W. current-sourceloadis ideal. Specify Z and (b) Find the small-signal voltage gain, v,/v,.
W/L. What is the
Section 7.3: The Basic Gain Cell peak ofthe largest output sine-wave signalthatis
D 7.37 Thecircuitin Fig. 7.15(a)is fabrica possible
7.32 Fill in the table on next page. For the BJT,let 8 = log tedina process for while the NMOStransistor remains in saturati
7.24 Find g,,, T,» T), and A, for the CE amplifier of and V, = 100 V. For the MOSFET,let 1,,C,, = 200 wA/V, which u,C,,=211,C,,=200 LA/V*,V,, =|V;,|=20 V/jum, on? What
is the correspondinginput signal?
Fig. 7.13(b) when operated at J = 10 A, 100 pA, and 1 mA. W/L = 40, and V, = 10 V. V,,=—V,, =0.5 V, and Vp, =2.5 V. The two transist
ors have (c) Find the small-signal inputresistanceR,,.
HSM = Multisim/PSpice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem BH = mult im/PSpice; * = difficult Problem;
** = moredifficult; *** = very challenging;
D = design problem
574 Chapter7 Building Blocks of Integrated-Circuit Amplifiers Problems 575
For Q, and Qs, K, = 50wA/V* and |V,| = 50 V. Fog aa Neglecting the finite base currents of Q, and Q, and

2 YUaLdWH)D.
@
W =40 um.For Q,,W =10 pm. ” times
~ assumingthattheir V,; ~ 0.7 V andthat Q, has five
200 pA (a) If Q, is to be biased at 100 WA,find Ip. For simplicj : the area of Q;, find the valueofJ.
b) pe and Q, are specified to have |V,| = 30 V,find r,, and
pte 3 MO, ti ignore the effect of V,.
and hencethetotal resistance at the collectorof Q,. Varus o—1
(b) What are the extreme values of u, for which Q, and 9,
just remain in saturation? © ar, , and g,,, assuming that 6, = 50.
4o—| (c) Whatis the large-signal voltage gain? ) Find Res A,, and R,.
[" aan

SINJT@OUd
(d) Find the slopeofthe transfer characteristic at Up = Von
(©) For operation as a small-signal amplifier around a bia +Vec= +3V
Rin point at U, = V,p/2, find the small-signal voltage air
and outputresistance. Figure P7.49
Figure P7.40 **7.45 The MOSFETs in the circuit of Fig. P7.45 are
matched, having i, (W/L), = k,¢, (W/L), = 1 mA/V’ and l= D7.50 Figure P7.50 shows a currentsourcerealized using a
=
7.41 Consider the CMOS amplifier analyzed in Example7.4. 0.5 V. The resistance R = MQ. current mirror with two matchedtransistors Q, and Q,. Two
If v, consists of a dc bias component on whichis superimposed equal resistancesR, are insertedin the sourceleadsto increase
(a) For Gand open,whatare the drain currents I, and Ta the outputresistanceofthe currentsource.If Q, is operating at
a sinusoidal signal, find the value of the dc component that
(b) For r, = 00, what is the voltage gain of the amplifier — &m = 1mA/V andhasV, = 10 V, andif the maximum allowed
will result in the maximum possible signal swingat the output
from G to D? (Hint: Replace the transistors with their _ dc voltage drop acrossR, is 0.3 V, what is the maximum avail-
with almost-linear operation. What is the amplitude of the
small-signal models.) able outputresistance of the current source? Assumethat the
output sinusoid resulting? (Note: In practice, the amplifier
(c) Forfinite r,(|Va| = 20 V), whatis the voltage gain from i voltage at the common-gate node is approximately constant.
would have a feedback circuit that caused it to operate at a
G to D andtheinputresistance at G?
point near the middle ofits linear region.)
(d) If Gis driven (througha large coupling capacitor) froma
D7.42 Consider the CMOS amplifier of Fig. 7.16(a) when source U,, having a resistance of 20 k®,findthe voltage
fabricated with a process for which k, = 4k, = 400 pA/V’, gain U,/0,,.
Figure P7.46
|V,| =0.5 V,and |V,| =5 V.Find [pe and (W/L), to obtain a (©) For whatrangeof outputsignals do Q, and Q, remain in
voltage gain of -40 V/V and an outputresistance of 100 k. the saturation region?
Recall that Q, and Q, are matched. If Q, and Q, are to be Section 7.4: The CG and CB Amplifiers
operated at the same overdrive voltage as Q,, what musttheir
+1.0V 7.47 A CG amplifier operating with g, = 2 mA/V and
WILratios be?
r, = 20 kQ is fed with a signal source having R, = 1 kQ
D 7.43 It is required to design the CMOS amplifier of and is loaded in a resistance R, = 20 kQ. Find R,,, Rox»
Fig. 7.16(a) utilizing a 0.18-imn process for which k, = Q and v,/ U,,.
387 pA/V’, k, =86 wA/V’,V,, =—V,, =0.5 V; Voy = 1.8 V, R
7.48 A CG amplifier operating with g, = 2 mA/V and
V,, = 5 V/um, and MA =-6 Vium. The output voltage Go WA, oD
r, = 20 kQ is fed with a signal source having a Norton
must be able to swing to within approximately 0.2 V of the
equivalent composed of a currentsignal i,, and a source Figure P7.50
power-supplyrails (i.e., from 0.2 V to 1.6 V), and the voltage a resistance R, = 20 kQ. The amplifier is loaded in a
gain must be at least 10 V/V. Design for a dc bias current
Tesistance R, = 20 k&. Find R,, and i,/i,,, where i, is the 7.51 In the common-gate amplifier circuit of Fig. P7.51, Q,
of 501A, and use devices with the same channel length.
current through the load R,. If R, increases by a factor and Q, are matched. k (WIL), = (WIL), =4 mA/V’, and
If the channel length is an integer multiple of the minimum -10V
of 10, by what percentage does the current gain change? all transistors have |V,| = 0.8 V and |V,| = 20 V. Thesignal
0.18 j.m, what channellength is needed and what W/L ratios
Figure P7.45 Can you see the effectiveness of the CG as a current u,, is a small sinusoidal signal with no dc component.
are required?If it is required to raise the gain by a factor of
buffer?
2, what channel length would be required, and by what factor (a) Neglecting the effect of V,, find the de drain current of
7.46 Transistor Q,in the circuit of Fig. P7.46 is operating as
does the total gate area of the circuit increase? D7.49 Itis required to design the currentsource in Fig. P7.49 Q,and the required value of V5;,5.
a CE amplifier with an active load provided bytransistor Q,,
to deliver a current of 0.2 mA with an outputresistance of 500 (b) Find the values ofg,,, and r, for all transistors.
**7.44 Consider the circuit shown in Fig. 7.16(a), using a which is the output transistor in a current mirror formed by
kQ. Thetransistor has V, = 20 V and V, = 0.5 V. Design for (c) Find the value of R,,.
3.3-V supply andtransistors for which |V,| = 0.8 V and L = Q, and Q,. (Note that the biasing arrangementfor Q, is not
Voy = 0.2 V and specify R, and Varas- (d) Find the valueofR,,
1pm.For Q,, k, = 100 wA/V’, V, = 100 V, and W =20 pm. shown.)
ISG = Multisim/PSpice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem Em = Multisim/PSpice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem
 576 Chapter? Building Blocks of Integrated-Circuit Amplifiers
Problems 577
(e) Calculate the voltage gains v,/v, and v,/v,,. evaluated using the T modelofthetransistor with the colle
Gection 7.5: The Cascode Amplifier resistance R, are related by

SINA1SOUd Z YaLdVHD
(f) How large can v,, be (peak-to-peak) while maintaining short-circuited to ground.
saturation-mode operation for Q, and Q,? 57 InaMOScascode amplifier, the cascodetransistor is
quired to raise the outputresistance by a factorof50.If the
ansistor is operated at V,y = 0.2 V, what mustits V, be?If
3.3V
process technology specifies V, as 5 V/wm, what channel Nowconsiderthe case of a 0.18-m technology for which
fength mustthe transistor haye? [Vs = 5 V/um and let the transistors be operated at
|Voy| = 0.2 V. Find the figure-of-merit JR, for the three
7.58 Design the cascode amplifier ofFig. 7.30(a) to obtain cases of L equal to the minimum channellength, twice the
Q; Bes =2mA/V and R, = 200) kQ. Use a 0.18-~m technology minimum,andthree times the minimum. Completethe entries
Ill

for which V,, =0.5 V, V, =5 V/um, and k, = 400 wA/V’. ofthe table at the bottom of the page. Give W/L andthe area
Determine L, W/L, V,,, and J. Use identical transistors 2WL interms of n, where is the value of W/L for the case
100 pA Vatase1 operated at Voy = 0.25 V, and design for the maximum Z=0.01 mA.In the table, A, denotes the gain obtained in a
Hen

possible negative signal swingat the output. Whatis the value cascode amplifier such as that in Fig. 7.33 that utilizes our
ip Ryg= 10 kO. - of the minimum permitted outputvoltage? current source as load and which has the same valuesofg,
andR,as the current-sourcetransistors.
Usig 17.59 Foracascodecurrentsourcesuchas thatin Fig. 7.32, (a) For each current value, whatis price paid forthe increase
show that if the two transistors are identical, the current
Figure P7.54 in R, and A, obtained as L is increased?
a supplied by the current source and the output resistance (b) For each value of L, what advantage is obtained as / is
R, are related by IR, = 2|V,P/|Vorl- Now consider the increased, and whatis the price paid? (Hint: Wewill see in
Figure P7.51 7.55 For the constant-current source circuit shown in case oftransistors that have |V,| = 4 V and are operated Chapter9 thatthe amplifier bandwidth increases with a)
Fig. P7.55, find the collector current J and the output at |Voy| of 0.2V. Also, let uC, = 100 A/V’. Find (c) Contrast the performance obtainedfromthe circuit with
resistance. The BJT is specified to have 8 = 100, V;, =0.7 V, the W/L ratios required and the outputresistance realized the largest area with that obtained from the circuit with
and V, = 100 V.If the collector voltage undergoes a change _ for the two cases: (a) J = 0.1mA and (b) J = 0.5mA. the smallest area.
7.52 For the CB amplifier, use Eq. (7.63) to explore the
of 10 V while the BJT remainsin the active mode, whatis the _ Assumethat V,,, for the twodevicesis the minimum required
variation of the inputresistance R,, with the load resistance
corresponding changein collector current? (ie., |Voy|)- } 7.61 The cascode amplifier of Fig. 7.33 is operated at a
R,. Specifically, find R,, as a multiple of r, for R,/r, = 0, 1,
10, 100, 1000, and co. Let 6 = 100. Presentyourresults in current of0.2 mA with all devices operating at |V,|=0.20 V.
tabular form. _ D*7.60 For a cascode current source, such as that in All devices have |V,|=4 V.Find g,,, the outputresistance of
Fig. 7.32, show that if the two transistors are identical, the amplifier, R,,,, the outputresistance of the current source,
7.53 Show that for the CB amplifier, |T the current J supplied by the current source and the output &,,,, the overall outputresistance,R,, and the voltage gain, A,
+5V
Row BRI.)
rT BHI+R)
Generate a table for R,,, as a multiple of r, versus R, as a
L=Lijin = 0.18 pm L=2L,,;, = 0.36 pm L=3Lpin = 0.54 pm
multiple of r, with entries for R, = 0, r,, 2r,, 10r,, (8/2)r,,
Br,, and 1000r,. Let B = 100.
4.3 kO IR,= Vv IR, v IR,= V
7.54 As mentionedin thetext, the CB amplifier functionsas a Im R, A, 2h |g,, R, A, Ww|g, Ro A, 2WL
current buffer. That is, when fed with a currentsignal, it passes = (mAN) (k2) (WV) (um) |(mA) (KO) (VA) (um?) (mA) (Kk). (VY) (um?)
it to the collector and supplies the output collector current at Figure P7.55 x S| rooms
a high outputresistance. Figure P7.54 shows a CB amplifier 4 F WiL=n
fed with a signal current i,,, having a sourceresistance R,,, = 7.56 Find the value of the resistance R,, which, when a F:
10 kQ. The BSTis specified to have 6 = 100 and V, = 50 V. connected in the emitter lead of a CE BJT amplifier,raises the 4 I=0.1mA
(Note that the bias arrangementis not shown.) The output at outputresistance bya factorof (a) 5, (b) 10, and (c) 50. What ; WIL =
the collector is represented by its Norton equivalentcircuit. is the maximum possible factor by which the output resistance p
Find the value ofthe current gain k and the outputresistance can beraised, and at whatvalueof R,is it achieved? Assume q ; mn e mA
R,,,- Note that & is the short-circuit current gain and should be the BJT has 6 = 100 andis biased at J, =0.5 mA. :
ES = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem
(SM = multisim/Pspice; * = difficult problem; ** = more difficult; *** = very challenging; D = design
problem
 578 Chapter7 Building Blocks of Integrated-Circuit Amplifiers Problems 579
D 7.62 Designthe circuit of Fig. 7.32 to provide an output Fig. P7.65(b) is a CS amplifier in which the channe] length 5 Vim. Atwhatvalue ofR, does the gain become—100 V/V? with all de voltages replaced with signal grounds. As well,

£ YALdWHD
current of 100 wA. Use Vp, = 3.3 V, and assume the PMOS been quadrupledrelative to that of the original Cs amplifig hat is the voltage gain of the common-sourcestage? we haveexplicitly shown the resistance r, of each of the
transistors to have 4,C,, = 60 wA/V’, Vi, = —0.8V, and in Fig. P7.65(a) while the drain bias current has been kep fourtransistors. For simplicity, we are assumingthatthe four
7.67 The purpose ofthis problemisto investigate the signal
|V,| =5 V. Thecurrentsourceis to have the widest possible constant. : transistors have the sameg,, and r,. The amplifier is fed with
signal swing atits output. Design for Vj, = 0.2 V, and specify cl=urrents and voltagesat variouspoints throughout a cascode a signal v,.
plifier circuit. Knowledgeofthis signal distribution is very
the values of the transistor W/L ratios and of V,, and V,,.
ful in designing the circuit so as to allow for the required (a) Determine R,, R,, and R,. Assume g,,r, >> 1.
ee ert

Whatis the highest allowable voltage at the output? What is

: ignal swings. Figure P7.67 shows a CMOScascode amplifier (b) Determine i,, i,, i,, i,,i;, ig, and i,, all in termsofv.. (Hint:
the value of R,?

SWATIOUNd
Usethe current-dividerrule at the drain of Q,.)
q rT
D7.63 Design the CMOS cascode amplifier in Fig. 7.33
for the following specifications: g,,, = 1mA/V and A, = t (c) Determine v,, v,, and ¥,, all in terms of v,.
e

Uy u, (d) If u, is a 5-mV peak sine wave and g,,r, = 20, sketch and
—280 V/V. Assumethatfor the available fabrication process, clearly label the waveforms of v,, v,, and v,.
|V,| =5 V/m for both NMOS and PMOS devicesandthat 4o—| W/L u4o—|l W447 D7.68 Design the double-cascode current source shown in
HjCo. =4 UC, = 400 paAsv’. Use the same channel length
Lforall devices and operateall four devices at |You | =0.25 V. Fig. P7.68 to provide J = 0.2 mA andthelargestpossible sig-
nal swingat the output; thatis, design for the minimum allow-
Determine the required channellength L,the bias current J,
and the W/L ratio for each offour transistors, Assume that
suitable bias voltages have been chosen,and neglect the Early
(a) (b) ig
| able voltage across eachtransistor. The 0.13-j1m CMOSfab-
tication processavailable has Vip = —0.4V, V, =—6 V/ium,
effect in determining the W/L ratios.
7.64 The cascodetransistor can be thoughtof as providing
is
jt__e and 14,C,, = 100 WA/V’. Use devices with L = 0.4 pm, and
operate at |Vou| = 0.2 V. Specify Vo,, Voz, Vos, and the W/L
ratios of the transistors. Whatis the value of R, achieved?
a “shield”for the input transistor from the voltage variations I
at the output. To quantify this “shielding” property of the
cascode, consider the situation in Fig. P7.64. Here we have Vpp =1.8V

AAA
Uy

vVV
"|

oiS

é
groundedthe input terminal(i.e., reduced v, to zero), applied
a small changev, to the output node, and denotedthe voltage Va1as O—-1 W/L
changethatresults at the drain of Q, by v,. By whatfactoris
v, smaller than v,? Ve1 o— a
u40—]_ W/L
Yao—[_ &
(©)

AAA
vVvVv
"|

so
Q Figure P7.65
Vos o— Q3
(a) Showthatforthis circuit Vy is doublethatoftheoriginal
v,
circuit, g,, is half that of the original circuit, and a is
doublethatof theoriginal circuit. i
(b) Comparethese values to those of the cascode circuit in
Fig. P7.70(c), which is operating at the samebias current

AAA.
Figure P7.68

WwW
s

ot
Figure P7.64 and has the same minimum voltage requirementat the
drain as in the circuit of Fig. P7.65(b).
*7.69 Figure P7.69 showsa folded-cascode CMOS amplifier
*7.65 In this problem weinvestigate whether, as an alterna- HME 7.66 A CMOS cascode amplifier such as that in utilizing a simple current source Q,, supplying a current 2/,
tive to cascoding, we can simply increase the channellength Fig. 7.34(a) has identical CS and CGtransistors that have and a cascoded current source (Q,, Q,) supplying a current
L of the CS MOSFET.Specifically, we wish to compare the WIL = 5.4.m/0.36 wm and biased at J = 0.2 mA. The I. Assume, for simplicity, that all transistors have equal
two circuits shown in Fig. P7.65(b) and (c). The circuit in fabrication process has u,C,, = 400 wA/V?, and Vy = Figure P7.67 parameters g,, andr,.
WM = MultisinvPspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem GEE = Multisim/Pspice; * = difficult problem; ** = more difficult; *** = very challenging; D =
design problem
580 Chapter7 Building Blocks of Integrated-Circuit Amplifiers
Problems 581
(d) Findthe overallvoltage gain v,/v, and evaluate
its Value
for the case g,,, = 2 mA/V and A, = 30. ‘g
7.70 A cascodecurrent source formed of twopnp transistg 3
for which 6 = 50 and V, =5 V supplies a currentof 0.2 na
Whatis the output resistance?
Vatas
7.71 Use Eq.(7.88) to show that for a BIT cascode curren
source utilizing identical pnp transistors and supplying
currentJ, j
r=— Md
° (Ve/|Val) + 0/B) ‘
Evaluate the figure-of-merit IR, for the case |V,| = 5 V and
§ =50. Nowfind R,for the cases ofI = 0.1, 0.5, and 1.0 mA.
i P7.74 continued
i
7.72 A bipolar cascode amplifier has a current-source load Figure :
with an output resistance Br,. Let 8B = 50, ¥,| =100V, andl
J =0.2 mA.Find the voltage gain A,. H "Let I= 100 A,and assumethat the MOSFETsareoperating
at [You| = 0,2 V. Assumethe current sources are ideal. For
7.73 Consider the BJT cascode amplifier of Fig. 7.38 for the §
eachcircuit determine R,,, R,, and A,,. Commenton your
caseall transistors have equal £ and r,. Show thatthe voltage
results.
gain A. can be expressedin the form
Figure P7.69 _ 7.75 Inthis problem,wewill explorethe difference between
ge ok [V/V using a BJT as cascode device and a MOSFET as cascode
(a) Give approximate expressions for all the resistances “2 (V;/|Val) + WB) _ device. Refer to Fig. P7.75. Given the following data,
indicated. calculate G,,, R,, and A,, for the circuits (a) and (b): Ven 0— Q)
Evaluate A, for the case |V,| =5 V and 6 = 50. Notethat 5 E )
(b) Findthe amplifier outputresistanceR,.
(c) Show that the short-circuit transconductance G,, is
exceptfor the fact that 6 depends on J as a second-order f= 100pA, B = 125, y,C,, = 400 pa/v?, WIL = 25,
effect, the gain is independentofthe bias current/! VY =18V
approximately equal to g,,,. Note that the short-circuit
transconductance is determinedby short-circuiting vu, to D*7.74 Figure P7.74 showsfour possiblerealizationsofthe 4yo— a
Vop
ground and finding the currentthat flowsthroughthe short folded cascode amplifier. Assumethat the BJTs have 6 = 100
circuit, G,, v,. and that both the BJTs and the MOSFETshave|V,| =5 V.
a I
(b)
Uy
Figure P7.75 continued
Vin Q)
Section 7.6: Current-Mirror Circuits with
Improved Performance
vu, oO—_ QQ
(SGN 7.76 In a particular cascoded current mirror, such
as that shownin Fig. 7.39,all transistors have V, = 0.6V,
M,C, = 160 A/V’, L = 1m, and V, = 10V. Width
W, = W, = 4m, and W, = W, = 40 um.Thereference
current Jpe- is 204A. What output current results? What
(a)
(a) (b) are the voltages at the gates of Q, and Q,? What is
Figure P7.75 the lowest voltage at the output for which current-source
Figure P7.74
EMM = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem ISM = MultisinvPspice; * = difficult problem; ** = moredifficult; *** = very challenging; D =
design problem
 |
582 Chapter? Building Blocks of Integrated-Circuit Amplifiers
Problems 5
operation is possible? What are the values of g, and
r, of Q, and Q,? What is the output resistance of the c) To eliminate the systematic error betwee
n Ty and Tpee D 7.87 If the pnp tran
sistor in the circuit of
mirror? caused by the difference in V,, between Q,and Q,, a characterized byits expo Fj P7.8
diode-connectedtransistor Q, can be addedt nential telationship a
TReF o the circuit current J;, show that the =
as shown in Fig. 7.41(c). What do youestimate TI, now dc current J is dein
7.77 Find the outputresistanceofthe double-cascodecurrent R= V, In@/I,). Assume e
to be? Q, and Q, to be matched
mirror ofFig. P7.77. Q;, Q,, and Q, to be
@ Whatis the minimum allowable voltage at matched. Find the valu
the output node yields a current J = 200 WA. : e of R é
of the mirror? For the B. a =
atJ;=1mA.
© Convince yourself that Q, will have no
effect on the
a
outputresistance ofthe mirror. Find Res
value an 4
(f) What is the change in J, (both absolute
+5V
percentage) that results from AV, = 1v?
B 7.84 (a) Utiliz ing a refere nce current of 200 HA, design a Q3
‘Widlar current source to provide an Outputc
urrent of 20 A.
_ Assumef to behigh.
Ii
- (b) If 8 = 200 and V, = 50V,
find the value of the
output resistance, and find the change
in output current
correspondingto a 5-V changein output voltage, |!
Figure P7.79 2 Q)
D7.85 Design three Widlar current sources
, each having a
D 7.80 Use the pnp version of the Wilson current mirror to _ 100-. A reference current : one with a current transferratio of
design a0.1-mA current source.The currentsourceis required ¥ 0.8, one with a ratio of 0.10, and one
with a ratio of 0.01
Q% R
all assuming high 8. For each,
to operate with the voltage at its output terminal as low as find the output ieaistance,
—2.5 V. If the power supplies available are 2.5 V, whatis and contrast it with r, of the basic
unity-ratio source that
e is providing the desired current and
the highest voltage possible at the output terminal? for which R, = 0. Use
B=coand V, =50V. }
*7.81 For the Wilson current mirrorof Fig. 7.40, show that _ —SV
D 7.86 (a) For the circui t in Fig.
the incremental inputresistance seen by Jy,, is approximately P7.86, assume BJTs with Figure P7,.87
Figure P7.77 high 6 and v,, =0.7 V at1 mA. Findth
2V,/Igee- (Neglect the Early effect in this derivation and 3 e value ofR that will
fesult in 7, = 10 pA.
assumea signal groundatthe output.) Evaluate R,, for Iggp=
: (b) For the design in (a), find Section 7.7: Some Useful Trans
0.2 mA. R, assuming 6 = 100 and istor Pairings
» V,=40V. 7:88 Use
7.78 Consider the Wilson current-mirrorcircuit of Fig. 7.40 the source-fol lower equivalent circuit in
7.82 Showthatthe incremental input resistance(seen by Igee)
Fig. 7.45(b) to show thatits output
when supplied with a reference current J, of 1mA. for the Wilson MOS mirrorofFig. 7.41(a) is 2/g,,. Assume resistanceis given by
What is the change in J, corresponding to a change of thatall three transistors are identical and neglect the Early |1 , R, ‘0
+10 V in the voltage at the collector of Q,? Give both the R= Flo: Il 1 ~ 1
effect. Also, assume a signal ground at the output. (Hint:
absolute value and the percentage change. Let 6 = 100 and Bm +8nb Bn + 8nb
Replace all transistors by their T model and rememberthat ‘ 10 pA
V, =100V. Q,is equivalentto a resistance 1/g,,.)
10 7.89 A source follower for which K,
20 V/um , x =0.2 ,L=0
= 200 pa/v’, vi =
*7.83 Consider the Wilson MOS mirrorof Fig. 7.41(a) for .5 um, W = 20 wm,and V, = 06 v
D 7.79 (a) Thecircuit in Fig. P7.79 is a modified version of a is required to provi
the case ofall transistors identical, with W/L = 10, 1,C,,. = Q3 de a dc level shift (between iepat and
the Wilson current mirror. Here the outputtransistoris “split” output of 0.9 V). What must
400 pAsy?, V,, = 0.5 V, and V, = 18 V. The mirroris fed the bias current be? Find g,
into two matched transistors, Q, and Q,. Find J, and I, 8mb> To» Ay, and R,. Assume
with Jpep = 180 pA. that the bias current sees
in terms of Jpee. Assumeall transistors to be matched with Q has an output resistance equal
R to r,. Also find the voltage
current gain 8. (a) Obtain an estimate of Vj, and V,, at which the three gain when load resistance
of 2 kQ is connected to the
(b) Use this idea to design a circuit that generates currents transistors are operating, by neglecting the Early effect. output.
of 0.1 mA, 0.2 mA, and 0.4mA,using a reference current (b) Notingthat Q, and Q,are operatingatdifferent V,,,, obtain
7.90 Thetransistors in the circui
source of 0.7 mA. Whatare the actual values of the currents an approximate valuefor the difference in their currents Figure P7.86 t ofFig . P7.90 have B=100
generated for 8 = 50?
and V, =S0V.
and hencedetermine J,. .
—_
SM = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem Brag. 7
Multisim/PSp tne see
ice; * = difficu lt Problem; ** = more difficu
lt; +** = very challenging; D
= design problem
584 Chapter? Building Blocks of Integrated-Circuit Amplifiers
Problems 585
(a) Find R,, and the overall voltage gain.
(b) Whatis the effect of increasing the bias currents by a

2 ww er
factor of 10 on R,,,‘in? G,, and the powerdissipation?
Re = 10 MO,
+5V
500 k it 4,
(1 )200 pa
Rig = 500 KO.

CIAL 1G At
Veig
6.8 kO
= Rin Usig
Figure P7.92
(a) Consider the dc biascircuit. Neglect the base currentin Q, (b) ( c)
Figure P7.90
in determining the currentin Q,. Find the dcbias currents
in Q, and Q, and show that they are approximately
7.91 The BJTs in the Darlington follower of Fig. P7.91 100 1A and 1 mA,respectively.
have £ = 100. If the follower is fed with a source having (b) Evaluate the small-signal parameters of Q, and Q,at their 0.5 mA
a 100-kQ resistance andis loaded with 1 kQ, find the input bias points.
resistance andthe outputresistance (excluding the load). Also (c) Determinethe voltage gain A, = v,/v,. For this purpose
find the overall voltage gain, both open-circuited and with you can neglect R,. Q
load. Neglect the Early effect. (d) Noting that R, is connected between the input node
where the voltage is v, and the output node where the
Vee
voltage is A,,v,, find R,, and hence the overall voltage —
gain U,/ Ug. Us ig
(e) To considerably reducethe effect of R, on R,, and hence
on G,, consider the effect of adding another 10-MQ
resistor in series with the existing one and placing large
©
bypass capacitor between their joint node and ground. Figure P7.95
What will R,, and G,, become?
7.93 For the amplifier in Fig. 7.48(a), let J = 0.5 mA and
8B = 100, and neglect r,. Assumethat a load resistance of
10 kQ is connectedto the output terminal. If the amplifieris
fed with a signal v,, having a sourceresistance R,,, = 10 kQ,
find G,.
Figure P7.91
7.94 Consider the CD-CG amplifier of Fig. 7.48(c) for
the case g,, = SmA/V, R,, = 500kQ, and R, = 10kQ.
D*7.92 Consider the BiCMOS amplifier shown in Neglecting r,, find G,,.
Fig. P7.92. The BJT has V,, = 0.7 V and £ = 200. The
MOSFEThas V, = 1 V and k, =2 mA/V’. Neglect the Early **7,95 In eachofthe six circuits in Fig. P7.95, let 8 = 100,
effect in both devices. and neglect r,. Calculate the overall voltage gain.
ISM = Multisim/Pspice; * = difficult problem; ** = moredifficult; *** = very challenging; D = design problem