Features General Description: 5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features General Description: 5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features General Description: 5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Vin Vin
R2
Note: VO VREF (1 )
R1
Ordering Information
AP1084 X XX X - X
Pin Assignment
(3) TO220-3L
( Top View)
3 VIN
2 VOUT
1 Adj (GND)
Tab is VOUT
Pin Description
The output of the regulator. A minimum of 10uF (0.15Ω ≤ ESR ≤ 20Ω) capacitor must
VOUT O 2
be connected from this pin to ground to insure stability.
The input pin of regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum
VIN I 3
dropout voltage during the load transient response. This pin must always be 1.4V
(1.3V) higher than VOUT in order for the device to regulate properly.
Block Diagram
Vin 3 2 Vout
+
+ - 1.25V
CURRENT
LIMIT
+
Thermal
Shutdown 1 Adj
-
Absolute Maximum Ratings
Functional Description
Introduction
The AP1084 adjustable Low Dropout (LDO) regulator is a 3 terminal device that can easily be programmed with the addition of two
external resistors to any voltages within the range of 1.25V to Vin-1.4V. The AP1084 only needs 1.4V differential between VIN and VOUT
to maintain output regulation. In addition, the output voltage tolerances are also extremely tight and they include the transient response
as part of the specification. For example, Intel VRE specification calls for a total of +/- 100mV including initial tolerance, load regulation
and 0 to 5.0A load step.
The AP1084 is specifically designed to meet the fast current transient needs as well as providing an accurate initial voltage,
reducing the overall system cost with the need for fewer output capacitors.
Vout = Vref (1+ R2/R1) +Iadj *R2 , where Vref = 1.25 typically, Iadj =
55uA typically R1 & R2 as shown below:
Iadj = 55uA
R2
The AP1084 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across these two pins a
constant current flows through R1, adding to the Iadj current and into the R2 resistor producing a voltage equal to the
(1.25/R1)*R2+Iadj*R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the
minimum load current requirement of the AP1084 is 10mA, R1 is typically selected to be 121Ω resistor so that it automatically satisfies
the minimum current requirement. Notice that since Iadj is typically in the range of 55uA it only adds a small error to the output voltage
and should only be considered when a very precise output voltage setting is required. For example, in a typical 3.3V application where
R1=121Ω and R2=200Ω the error due to Iadj is only 0.3% of the nominal set point.
Load Regulation
Since the AP1084 is only a 3 terminal device, it is not possible to provide true remote sensing of the output voltage at the load. The
best load regulation is achieved when the bottom side of R2 is connected to the load and the top-side of R1 resistor is connected directly
to the case or the VOUT pin of the regulator and not to the load. It is important to note that for high current applications, this can re-present
a significant percentage of the overall load regulation and one must keep the path from the regulator to the load as short as possible to
minimize this effect.
Stability
The AP1084 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable.
For most applications a minimum of 10uF aluminum electrolytic capacitor insures both stability and good transient response.
Thermal Design
The AP1084 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the
maximum allowable junction temperature. Although this device can operate with junction temperatures in the range of 150oC, it is
recommended that the selected heat sink be chosen such that during maximum continuous load operation the junction temperature is
kept below that temperature.
Layout Consideration
The output capacitors must be located as close to the VOUT terminal of the device as possible. It is recommended to use a section
of a layer of the PC board as a plane to connect the VOUT pin to the output capacitors to prevent any high frequency oscillation that may
result due to excessive trace inductance.
2. 0 0.20
1. 8
1. 2 Tj = 25 oC -0.20
1. 0
0. 8 -0.40
Tj = 125 oC
0. 6
0. 4 -0.80
0. 2
0 -1
0 1 2 3 4 5 -40 0 25 50 75 100 125
Output Current (A) Temperature (oC)
Dropout Voltage vs Output Current Load Regulation vs Temperature
2 1
1.5
0.8
1
Output Voltage Change (%)
0. 5
0.6
0
-0.5 0.4
-1
0.2
-1.5
-2 0
-40 -25 0 25 50 75 100 125 150 2 4 6 8 10 12
Temperature (oC) Input Voltage (V)
Percent Change in Output Voltage vs Temperature Line Regulation
7.5 60
Output Voltage Deviation (mV) Input Voltage (V)
Cin=1uF Cin=1uF
Cout=10uF Tantalum 40 Cout=10uF Tantalum
6.5 Preload=100mA
20
5.5
0
40
-20
20 -40
6
0
4
-20
2
-40
0 20 40 60 80 100 120 140 160 180 200 0
0 10 20 30 40 50 60 70 80 90 100
TIME (us) TIME (us)
Line Transient Response Load Transient Response
Marking Information
(1) TO252-3L
( Top view )
(2) TO263-3L
( Top view )
(3) TO220-3L
( Top view )
0.88/1.27
5.6
6.354/6.80 Typ 6.58
5.20/5.50 Typ 5.35
5.6
5.40/6.20
11.0
Typ 5.57
7.2
2.25
2.0
1.2
0.61 Typ 2.28 Land Pattern Recommendation (Unit: mm)
BSC. 0.64/1.02
2.18/2.40
4.57 BSC. Typ 0.83 0.89/
9.00/10.40 Typ 9.70 Typ 2.29
1.14 SEE NOTE2
0.45/0.58 SEATING
0.51
Typ 0.52 PLANE 0.45/0.58
Typ 0.52
10.9
9.65/10.29 Typ 9.97
14.61/15.88 Typ 15.24
8.65/9.65 Typ 9.15
9.1
15.7
3
1.27/
1.78
1.52
Typ
1.3 2.54
2.54
BSC. 0.51/0.99 Typ 0.75 Land Pattern Recommendation (Unit: mm)
1.14/1.40 Typ1.27
0.38 Typ
4.06/4.83
Typ 4.45
9.70/10.70
3.55/4.85
2.54/3.43 3.53/4.09 Typ 4.20 0.51/1.40
Typ 2.98 Typ 10.20 Typ 0.95
Typ 3.81
SEATING PLANE
5.84/6.86
Typ 6.35
14.20/16.50
Typ 15.35
3.66/6.35
Typ 5.00
12.72/14.72
1.14/1.78
Typ 13.72
Typ 1.46
0.31/1.14
0.51/1.14 Typ 0.72
Typ 0.83
2.99/2.79 2.03/2.92
4.83/5.33 Typ 2.54 Typ 2.48
Typ 5.08
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