Digital Design - EE2130E

DIGITAL DESIGN – EE2130E
Dr. Trần Thị Anh Xuân

Instrumentation and Industrial Informatics Dept.
School of Electrical Engineering
HUST
Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 1

DIGITAL DESIGN
INTRODUCTION AND AGENDA

Documents
• Textbook
– Lương Ngọc Hải, Nguyễn Trinh Đường, Lê Hải Sâm, Nguyễn Quốc
Cường, Trần Văn Tuấn, Điện tử số, Nhà xuất bản Giáo dục, 2008
• Slides
• …

Syllabus
• Basic knowledge
– Introduction and Overview
– Numbering Systems and Codes
– Boolean algebra and Karnaugh Maps
– Basic logic Gates
• Basic Logic System (Logic Familly)
• Combinational Logics (Encoder, Decoder, MUX, DEMUX,
Arithmetic Logic Circuit (Adder,…)…)
• Sequential Logics (Flip flops, registers, counters,…)
• Memory, ADC/DAC
• Programmable Logic Device (PLD)

Chapter 1: Basic knowledge
Analog vs. Digital
• What is an Analog Signal? • What is an Digital Signal?
– Is continuous in both time – Discrete-time signals
and amplitude

Analog vs. Digital
• What is an Analog Signal? • What is an Digital Signal?
– Is continuous in both time – Discrete-time signals
and amplitude – Binary Digit  Signal
– An analog signal is a time processing as Bit unit
varying signal that can take – Each bit: only has 2 logic
on any value across a state “0”, “1”
continuous range
– Using voltage level to define
logic state
– Using N bits binary  we can
represent decimal numbers
ranging from 0 to 2N – 1, a
total of 2N different numbers

Advantages of Digital Signals
• Less effective by noise
• Easier to design and store
• Operation can be programed
• More can be fabricated on IC chips
• Allow the use of built-in-error detection and correction
mechanisms
• …

Signal Converter
• The real world is mainly ANALOG
• Signal Converter:
– Convert Analog inputs to Digital  ADC
– Convert the Digital outputs to Analog  DAC

DIGITAL DESIGN
NUMBER SYSTEMS AND CODES

Basic Terms
• Number system:
– A number system consists of an ordered set of symbols, called
digits
• Base (Radix):
– The total number of digits allowed in the number system
• Digit: a single basic symbol used in a number system
• Bit: is the abbreviated form of binary digit
• Byte: an entity formed by combining 8 bits

Number Systems
Base-10 Base-2 Base-8 Base-16
• Important number
systems
• In Binary system:
– The Most Significant Bit
(MSB) is the leftmost bit
(largest weight)
– The Least Significant Bit
(LSB) is the rightmost bit
(smallest weight)

Number Systems Conversion
Octal
(base 8)
Decimal Binary
(base 10) (base 2)
Hexadecimal
(base 16)
12
Trần Thị Anh Xuân – 3I – SEE – HUST [email protected]
• Each digit carries a certain weight based on its position
base point
… r4 r3 r2 r1 r0 . r-1 r-2 …
– Weight = r position value

– For example:
decimal point
Decimal Positional System (Base 10 or radix 10)
… 104 103 102 101 100 . 10-1 10-2 …

binary point
Binary Positional System (Base 2 or radix 2)
… 24 23 22 21 20 . 2-1 2-2 …

• a positive number N of radix r:

Base-r to Decimal Conversion
• a positive number N of radix r:
• Convert to Decimal number system, by a polynomial in the

form:
• For example:

Decimal to Base-r Conversion
• a positive number N of radix 10:
• Integer part conversion:
N  (an an 1    a2 a1a0 ) r  an r n  an 1r n 1      a2 r 2  a1r 1  a0
N
 Q1 , remainder a0
r
Q1
R
Q2
R
• a positive number N of radix 10:
• Fraction part conversion:

F  (.a1a 2 a3    a m ) r  a1r 1  a 2 r 2  a3r 3      a m r  m
F .r  a1  a 2 r 1  a3r 2      a m r  m 1  a1  F1

F1.r  a 2  a3r 1      a m r  m  2  a 2  F2
F2 .r  a3      a m r  m 3  a3  F3 Fi：Fraction Number

• Convert (53.625)10 to Binary no.
Integer part Fraction part
2 53 F  .625 F1  .250 F2  .500

 2  2  2
2 26 rem. = 1 = a0 LSB 1.250 0.500 1.000
rem. = 0 = a1 ( a1  1) (a 2  0) (a3  1)
2 13
2 6 rem. = 1 = a2 5310  1101012 .62510  .1012
2 3 rem. = 0 = a3
2 1 rem. = 1 = a4
0 rem. = 1 = a5 MSB

Octave/Hexa-Decimal to Binary Conversion
• Replace each Octave digit with the equivalent 3 digits in
Binary
• Replace each Hexa digit with the equivalent 4 digits in
Binary
• Example:

Binary to Octave/Hexa-Decimal Conversion
• Group the digits of N in groups of 3 digits in both directions
from the radix point and proceeding to the left and to the
right
– then replace each group with the equivalent digit in Octave (Base-8)
• Example:

Addition
• The rule: “Add with Carry”
• Add two terms of the same weight bit in turn, starting from
LSB

Addition

Subtraction
• The rule: “Subtract with borrow”
• Subtract two terms of the same weight bit in turn, starting
from LSB

Subtraction

Binary Multiplication
• The rule: “Shift-and-Add Multiplication”

Binary Multiplication

Binary Division
• The rule: “Shift-and-Subtract Division”

Binary Division

Signed Binary Number
• Two’s – Complement Representation:
– N: n-bit binary number
– Example:

• One’s-Complement Representation:
– N: n-bit binary number
– How to find?
• Reverse all bits of the binary number
– Example:

• Two ways:
– W1: Signed-Magnitude Representation
– W2:Two’s-Complement Representation
• W1: Signed-Magnitude Representation
– N: n-bits signed-magnitude binary number
– a number consists of a magnitude and a symbol indicating whether
the magnitude is positive or negative  the sign bit
• the most significant bit (MSB) : the sign bit
– MSB = 0  plus
– MSB = -1  minus
• The remaining lower-order bits contain the magnitude
– The range integer value of N:

• W2: Two’s-Complement Representation
– N: n-bits signed-magnitude binary number
• Positive: the same W1
• Negative: using Two’s-Complement Binary number
– The decimal value of N:
– The range integer value of N:

• Addition:
– 2 positive addends: the same rule of the addition between 2
unsigned binary number, including the addition of sign bits
– 2 negative addends:
• -M + -N  BM(2) + BN(2)
– 2 addends with different sign:
• -M + N  N + BM(2)

• Substraction:
– A – B = A + BB(2)
– Then the same the rules of Addition

• Overflow:
– If an addition operation produces a result that exceeds the
range of the number system
• Overflow conditions
– add two positive numbers to get a negative number
– add two negative numbers to get a positive number
• 2’s complement is the main stream  Check SIGN for the
overflow!
• (+) + (+)  (-)
overflow!!
• (-) + (-)  (+)

Encoder
• Code: is a set of rules for representing information
– By grouping some binary bits and assigned a certain code symbol
• In digital system, binary code: typical code
– A n-bit binary code: can represent 2n information
• Decoder: the reversion of Encoder
• Two typical Code:
– ASCII (American Standard Code for Information Interchange)
– BCD (Binary-Coded-Decimal)

ASCII Code
• ASCII (American Standard Code for Information Interchange)
• The alphanumeric code:
– is a seven-bit code  it has 27 = 128 possible code groups
– can represent all of the standard keyboard characters as well as the
control functions
• ASCII code is used for the transfer of alphanumeric information
between a computer and the external devices:
– Computer – Printer
– Computer – Keyboard
– Computer – Monitor
• Distinguish Upper case letters from Lower case letters

ASCII Code
• Standard ASCII Codes

ASCII Code
• Ex 1: What is the character string corresponding to the
ASCII code?
01101000 01101111 01100001
• Answer?

ASCII Code
• Ex 2: The computer screen shows the words. What are the
ASCII Codes?
Ab
• Answer?

BCD Code (Binary-Coded-Decimal)
• Each digit of a decimal number is represented by its 4-bits
binary equivalent.
– Only the 4-bits binary numbers from 0000 through 1001 are used the
BCD Code
• Convert a decimal number to its BCD code equivalent:
– Each digit is changed to its 4-bits binary equivalent
• Convert a BCD code number to its decimal equivalent:

– Divide the BCD number into 4-bits groups and convert each to
decimal
• Main advantage of the BCD Code: is the relative easy of

converting to and from decimal
BCD Code
• 2 types:
– Depending on how each BCD number is stored in the memory
elements (register, memory cells)
– Packed BCD form:
• The two adjacent digits of the BCD number are stored in a
memory element of length 1 byte
– Unpacked BCD form:
• Each BCD number is stored in a memory element of length 1
byte
– Example: 3610 = (00110110)packed BCD

3610 = (0000001000000110)unpacked BCD

BCD Addition
• Addition of BCD digits is similar to adding 4-bit unsigned
binary number, except that a correction must be made if a
result exceeds 1001
– The result is corrected by adding 6 (0110)

BCD Addition
• BCD Addition:
– From LSB:
• Result must adjust one of two cases:
– When the result of the addition is a number that is not a BCD
number
– When the result of the addition is a BCD number but the
carry-out is 1
–  need adjust the result by adding 0110B

Boolean Constants and variables
• Boolean constants and variables are allowed to have only two possible
values, 0 or 1.
• Boolean 0 and 1 do not represent actual numbers but instead represent
the state of a voltage variable, or what is called its logic level.
• 0/1 and Low/High are used most of the time.
45
• 0/1 and Low/High are used most of the time.
• The positive logic: H  “1”; L  “0”

• The negative logic: H  “0”; L  “1”
46
• Boolean variables are designated by letters of the alphabet, such as A,
B, C, x, y, z,…with each variable having two and only two distinct
possible values: 1 and 0
47
Truth Tables
• How a logic circuit’s output depends on the logic levels present
at the inputs.
48
• Three basic Logic operations: AND, OR, NOT
• Logic Gates
– Digital circuits constructed from diodes, transistors, and resistors
whose output is the result of a basic logic operation(OR, AND, NOT)
performed on the inputs.
49
AND Operation with AND Gates
• Truth table and Gate Symbol
• Expression: Q(A,B) = A.B
A B Q
0 0 0
0 1 0
1 0 0
1 1 1

Summary of the AND operation
• The AND operation is performed the same as

ordinary multiplication of 1s and 0s.
• An AND gate is a logic circuit that performs the AND
operation on the circuit’s inputs.
• An AND gate output will be 1 only for the case when
all inputs are 1; for all other cases the output will be
0.
51
AND Operation with AND Gates
• IC 7408: 4 AND gates

OR Operation with OR Gates
• Truth table and Symbol
• Expression: Q(A,B) = A+B
A B Q
0 0 0
0 1 1
1 0 1
1 1 1

Summary of OR operation
• An OR gate is a logic circuit that performs an OR operation
on the circuit's input
• An OR gate output will be 0 only for the case when all
inputs are 0; for all other cases the output will be 1 (that
means Produce a result of 1 whenever any input is 1).
54
NOT Operation with NOT Gates
A Q
0 1
1 0

NAND Gates
A B Q
0 0 1
0 1 1
1 0 1
1 1 0

Summary of the NAND operation
• A NAND gate output will be 0 only for the case when

all inputs are 1; for all other cases the output will be
1.
57
NOR Gates
A B Q
0 0 1
0 1 0
1 0 0
1 1 0

Summary of NOR operation
• A NOR gate output will be 1 only for the case when all
inputs are 0; for all other cases the output will be 0.
59
XOR Gates (Exclusive-OR)
• Expression:
A B Q
0 0 0
0 1 1
1 0 1
1 1 0

Summary of XOR operation
• A XOR gate output will be 0 for the case when all inputs
equal.
61
XNOR Gates
• Expression:
A B Q
0 0 1
0 1 0
1 0 0
1 1 1

Summary of XNOR operation
• A XNOR gate output will be 1 for the case when all inputs
equal.
63
Equivalent Gates transformation
• Example:
A A A A A A
A
 A
 A

A

1 0
A
A Q A
Q Q
 
B B B
A
A Q A Q

Q

B B B

Boolean Algebra
• More complex logic functions are made up of basic logic and
extended logic gates
• Boolean algebra is used to describe logic circuits algebraically:
– Is a mathematical tool for analyzing and designing logic circuits
– Founded by George Boole in the 19th century
– Constants, variables, and functions take only one of two values: 0 or
1
– Karnaugh maps help to simplify logical expressions in a systematic
way

Boolean Algebra
• Commutativity:
A.B = B.A
A+B=B+A
• Associativity:
A.B.C = A.(B.C) = (A.B).C
A + B + C = A + (B + C) = (A + B) + C
• Distributivity:
A.(B+C) = A.B+A.C
A + (B.C) = (A+B).(A+C)

Boole Algebra
Demorgan Theory:

Boolean Algebra
• The principle of duality: a logical equality will still hold when
on both sides, we replace:
– The "+" operation is replaced by the "." and vice versa
– Logical value “0” is replaced by “1” and vice versa
– Example:
A.(A + B) = A  A+(A.B) = A
A + 1 = 1  A.0 = 0
• Applications:
– Simplify logical expressions
– Convert logical expressions:
• “sum of products” to “product of sums”; and vice versa

Boolean Algebra
• For example

Digital (Logic) Circuit
• There are two combinatorial logic problems:
– Analytical problem::
• Know the logic circuit  Requirement: to find out logical
expressions describing the relationship between input and output
variables
– Synthesis/Design problem:
• Know the control requirements of the logic problem 
Requirement: must build a logic circuit

Difference between Combinational and Sequential Circuit
• Combinational Circuit:
– is the type of circuit in which outputs is at current time t only depend
on the inputs present at that time
• Sequential Circuit:
– is the type of circuit where outputs at the current time t are not only
relies on the current inputs but also depends on the previous internal
states of circuit

Standard representations of Logic Functions
• Truth table:
– is a means for describing how a logic circuit’s output depends on the
logic levels present at the circuit’s inputs
– Lists the output of the circuit for every possible input combination
– Traditional, the input combinations are arranged in rows in
ascending binary counting order, and the corresponding output
values are written in a columm next the rows
• The truth table for an n-variable logic function has 2n rows
• For example, the general structure of a 3-input variable truth
table is shown below in this table

• Truth table:
– Traditional, the input combinations are arranged in rows in
ascending binary counting order, and the corresponding output
values are written in a column next the rows
• For example, the general structure of a 3-input variable truth
table is shown below in this table




• Based on the correspondence between the truth table and
minterms/maxterms  we can easily create an algebraic
representation of a logic output function for from its truth table
–  by the canonical sum
–  by the canonical product

representation of a logic function from its truth table
–  The canonical sum of a logic function is a sum of the minterms
corresponding to truth table rows (input combinations) for which the function
produces a 1 output
–  The canonical product of a logic function is a product of the maxterms
produces a 0 output

–  The canonical sum of a logic function is a sum of the minterms
produces a 1 output
– Ex:
– Here, the notation is a minterm list and means “the sum of

minterms 0, 3, 4, 6, 7 with the combination order of input variables is XYZ”
–  The canonical product of a logic function is a product of the maxterms
produces a 0 output
– Ex:
– Here, the notation is a maxterm list and means “the product of

maxterms 1, 2, 5 with the combination order of input variables is XYZ”
• Any logic function can be written as a canonical sum OR a
canonical product
• It’s easy to convert between a minterm list and a maxterm list
– Ex:

Combinational circuit synthesis from the basic/extended logic gates
• Including:
– Step 1: Find out the canonical logic expression for output logic
– Step 2: Simplify these canonical expressions
– Step 3: Implement the logic circuit

• Including:
– Step 1: Find out the canonical logic expression for output logic
• Type 1: The canonical sum: the sum of minterms
• Type 2: The canonical product: the product of maxterms
– Step 2: Simplify these canonical expressions
• Method 1: Algebraic method (use Boolean algebra theorems)
• Method 2: Karnaugh mapping method
– Step 3: Implement the logic circuit

Karnaugh Map (K Map) Method
• K Map show the relationship between inputs and outputs,
– A graphical representation of a logic function’s truth table
– A graphical technique to minimize a logic expression
– The map for an n-input logic function is an array with 2n cells
• Rule to select K-map: including cells so that:
– The rows and columns of K map are labelled so that the input combination
for any cell is easily determined from the row and column headings for that
cell, and
• Each cell corresponds to an input combination that differs from each of
its immediately adjacent neighbours in only one variable
– The map for an n-input logic function is an array with 2n cells, one for each
possible input combinations
– Each value cell equal the logic value of output function corresponding to the
binary input combination.

• How to find out the output expression:
– K map can take 2 forms expression which according to the need of problem:
• Sum of Product (SOP): OR-AND structure
• Product of Sum (POS): AND-OR structure

– For SOP:
• Using all the cells having 1 logic value
• Circle rectangular groups for these cells containing total terms in
power of 2 (2n) and try to cover as many elements as you can in
one group
• Each group is corresponding to a product term that is built as
follows:
– if a circle covers only areas of the map where the variable is 0, then
the varibale is complememted in the product term
the varibale is uncomplememted in the product term
– if a circle covers both areas of the map where the variable is 0 and
areas where the variable is 1, then the varibale does not appear in
the product term
• The output expression = sum of all these product terms
– For POS:
one group
• Each group is corresponding to a sum term that is built as
follows:
the varibale is uncomplememted in the sum term
the varibale is complememted in the sum term
– if a circle covers both areas of the map where the variable is 0 and
areas where the variable is 1, then the varibale does not appear in
the sum term
• The output expression = product of all these sum terms
– For SOP:
one group
• Each group is corresponding to a product term that is built as
follows:
– When a variable appears in both complemented & uncomplemented
form within a loop, that variable is eliminated from the expression.
Variables that are the same for all squares of the loop must appear
in the final expression.
– a variable appears complemented if the corresponding bit in
the binary representation is 0; otherwise, it is
uncomplemented

– For POS:
• Using the cells having 1 logic value
• Make rectangular groups for these cells containing total terms in
one group
• Each group is corresponding to a sum that is built as follows:
– When a variable appears in both complemented & uncomplemented
form within a loop, that variable is eliminated from the expression.
Variables that are the same for all squares of the loop must appear
in the final expression.
– a variable appears complemented if the corresponding bit in
the binary representation is 0; otherwise, it is
uncomplemented

• Example

• We have now leaned 4 possible representations for a
combinational logic functions:
1. A truth table
2. A minterm list using the ∑ notation  An algebraic sum of minterms (the
canonical sum)
3. A maxterm list using the π notation  An algebraic product of maxterms
(the canonical product)
4. Karnaugh map
•  Each one of these representations specifies exactly the same

information

DIGITAL DESIGN
LOGIC FAMLILY

Chapter 2: Basic Logic System (Logic Familly)
Logic family
• Is a collection of different integrated-circuit chips that have
similar input, output and internal circuit characteristics, but
that perform different logic functions
• Chips from the same family can be interconnected to
perform any desired logic function
• Chips from differing family may not compatible:
– They may use different power-supply voltage or may use different
input and output conditions to represent logic values

Classification
• Classified by gate density
– SSI – Small Scale Integration: < 10 gates/chip
• Ex: IC AND, OR, NAND,…
– MSI – Medium Scale Integration: 10 ÷ 100 gates/chip
• Ex: IC decoder, multiplexer, …
– LSI – Large Scale Integration: 100 ÷ 1000 gates /chip
• Ex: khối ALU, µP 8 bit, …
– VLSI – Very Large Scale Integration: 103 ÷ 106 gates/chip
– ULSI – Ultra Large Scale Integration: >106 gates/chip
• VD: µP/µC 16, 32 bit,…

Classification
• Classified by manufacture technology
– BJT - Bipolar logic family
• TTL Transistor Transistor Logic
• …
– MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
• CMOS Complementary MOS
• …

Some electrical characteristics
• Refer to Docs “Điện tử số” (Nguyễn Ngọc Hải,…)
• Logic voltage levels: input voltages is different output
voltages
– Depend on logic family (manufacture technology – TTL vs CMOS)
• Input Voltage (Điện áp vào):
• UIH: the minimum input voltage guaranteed to be recognized as a
High
• UIL: the maximum input voltage guaranteed to be recognized as a
Low
• Output Voltage (Điện áp ra):
• UOH : the minimum output voltage in the High state
• UOL : the maximum output voltage in the Low state

• …
• Input Current
• Output Current
• Can find out in datasheet that the manufactures measure
under specific conditions
• …

• Example:
TTL CMOS

• DC Noise Margins
– Nonnegative DC noise margins ensure that:
• the highest LOW voltage produced by an output is always lower
than the highest voltage that an input can reliably interpret as
LOW
• And that the lowest HIGH voltage produced by an output is
always higher than the lowest voltage that an input can reliably
interpret as HIGH
– Noise margin in High state:
NH = UOH - UIH
– Noise margin in Low state:
NL = UIL - UOL

• Fanout
– This refers to the number and type of inputs that are
connected to a given output
– The fanout of a logic gate is the number of inputs that
the gate can drive without exceeding its worst-case
(distort) loading specifications
 Formula::

2.3. Các đặc tính điện của IC số
• Hệ số tải đầu ra (Fan-Out):
 Khi đó:

• Speed:
– The time that it take a logic output response to change logic
state, start from the time of specific input
• Power consumption
• Supply power
• …

Output Digital Circuit Types
• 3 typical output circuit types
• Totempole (mạch ra đẩy kéo)
• Open-Collector (mạch ra cực góp để hở - TTL) or Open-
Drain (CMOS)
• Tri-state Buffer (Three-state) (mạch ra ba trạng thái)

Tri-state (Three-State) Buffers
• Four kinds of Three-State Buffers
a, noninverting, b, inverting, active-high enable c, d,

active-high enable
B A C B A C B A C B A C
0 0 Hi-Z 0 0 Hi-Z 0 0 0 0 0 1
0 1 Hi-Z 0 1 Hi-Z 0 1 1 0 1 0
1 0 0 1 0 1 1 0 Hi-Z 1 0 Hi-Z
1 1 1 1 1 0 1 1 Hi-Z 1 1 Hi-Z

DIGITAL DESIGN
COMBINATIONAL LOGIC CIRCUIT

Difference between Combinational and Sequential Circuit
• Combinational Circuit:
– is the type of circuit in which outputs is at current time t only depend
on the inputs present at that time
• Sequential Circuit:
– is the type of circuit where outputs at the current time t are not only
relies on the current inputs but also depends on the previous internal
states of circuit

Active vs Non-active
• Active:
– Input is affected
– Output is working
• Symbol

Chapter 3: Combinational Logic Circuit
Khái niệm về mức tích cực thấp và tích cực cao
TrầnThị
Trần ThịAnh
Anh Xuân
Xuân - 3i– 3I – SEE – HUST [email protected] 108
Combinational Circuit Design
• Mạch logic tổ hợp (Combinational Logic Circuit)
PLD

MSI Combinational circuit IC
• Encoder vs Decoder
• Multiplexer vs Demultiplexer
• Arithmetic circuit

Encoder
• It accepts a single active input from an input set  and
delivers an N-bit code corresponding to which input was
active

Encoder
• Ex: Switch Encoder
– Switches corresponds
to keyboards on a
calculator representing
digits 0 through 9
– When a digit key is
pressed  the circuit
will produce the
inversion of BCD code
for that digit

Encoder
• Priority Encoder:
– Ensures that when two or more inputs are activated, the
output code will correspond to the highest numbered input
• Encoder (74LS147) Design:
– 9 active-low inputs
– No digit key is pressed  the output code of 0 digit
– 9 lối vào tích cực thấp (tương ứng với số thập phân từ 1-9)
– 4 active-low output

Encoder
• Encoder 74LS147:
– 9 lối vào tích cực thấp (tương ứng với số thập phân từ 1-9)
– Số 0 tương ứng khi không có phím nào từ 1 đến 9 nhấn
– 4 lối ra tích cực thấp là mã BCD đảo bit

Encoder
• Encoder 74LS147:

Decoder
• Some types:
– Basic Binary Decoder
– BCD/7SEG Decoder
• Definition/Function:
– A decoder is a digital circuit that detects the presence of a
specified combination of bits (code) on its inputs and indicates
the presence of that code by a specified output level
• Enable Inputs
– If present, must be asserted for the decoder to perform its
normal mapping function
– Otherwise, the decoder maps all input code words into a
single “disabled” or “non-active” output code word

Basic Binary Decoder
• Function/Definition: Decoder N/M
– In which M ≤ 2N
– A binary decoder is multiple-input, multiple-output logic circuit that
converts coded inputs into codes outputs, where the input and output
codes are different
• There is one-to-one mapping from input code words into output
code words, in which: corresponding binary input combination
make only one output active state; the other ones are non-active
state
• Convert Binary Input into Output Information as “ only choose 1 in
M output”
– Other name: “Decoder 1 from M”

• Example 1: Design Decoder 3/8, in which:
– One enable input is low active
– All outputs are High active
• Example 2: Design Decoder 3/8, in which:
– One enable input is low active
– All outputs are Low active
• Example 3: Design Decoder 4/10 (BCD-to-Decimal
Decoder), in which:
– All outputs are Low active

• Example 3:
– Truth table:

• Example 3:
– Logic expression
IC 74LS42

• Applications:
– Select the suitable memory cell
– Select Input/Output devices
– Using Decoder to design the combinational logic circuit
• Extended Decoder:
– Example: Design logic circuit has the same function of Decoder 5/32
with all outputs are high-active, using Decoder 4/16 (IC 74154):

• Applications:
– Using Decoder to design the combinational logic circuit
– Example:
M N K O1 O2

BCD-to-Seven Segment (BCD/7SEG) Decoder
• VD3: BCD/7SEG Decoder
– 4 inputs: BCD number
– 7 outputs
– Note: cần xem xét tương ứng với số nhị phân ở đầu vào của mạch
logic như thế nào và giá trị số thập phân hiển thị tương ứng trên
Led 7 Seg  create suitable truth table
 Example of displaying decimal number on Led 7 Seg
 Other example of displaying decimal number on Led 7 Seg
TrầnThị
Trần ThịAnh
Anh Xuân
Xuân - 3i– 3I – SEE – HUST [email protected] 123
• BCD/7SEG Decoder
– Seven Segment LED: 2 types
• Common – Anode
• Common - Cathode

• Common – Anode

• Common – Cathode
GND

• VD3: BCD/7SEG: IC 74LS47

• Truth table
• Logic Expression
• Note: Detect the suitable active state of output depend on
specified 7SEG LED (Common-Anode or Common-
Cathode)
• Example

Multiplexer (MUX) – DeMultiplexer (DEMUX)
• Update…

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DIGITAL DESIGN – EE2130E

Dr. Trần Thị Anh Xuân

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 1

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 2

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 3

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 4

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 5

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 6

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 7

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 8

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 9

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 10

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 11

– Weight = r position value

… 104 103 102 101 100 . 10-1 10-2 …

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 13

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected]

• Convert to Decimal number system, by a polynomial in the

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected]

• Integer part conversion:

N  (an an 1    a2 a1a0 ) r  an r n  an 1r n 1      a2 r 2  a1r 1  a0

• Fraction part conversion:

F .r  a1  a 2 r 1  a3r 2      a m r  m 1  a1  F1

F2 .r  a3      a m r  m 3  a3  F3 Fi：Fraction Number

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected]

2 53 F  .625 F1  .250 F2  .500

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected]

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 19

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 20

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 21

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 22

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 23

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 24

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 25

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 26

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 27

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 28

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 29

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 30

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 31

– The range integer value of N:

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 32

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 33

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 34

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 35

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 36

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 37

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 38

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 39

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 40

• Convert a BCD code number to its decimal equivalent:

• Main advantage of the BCD Code: is the relative easy of

– Example: 3610 = (00110110)packed BCD

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 42

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 43

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 44

• The positive logic: H  “1”; L  “0”

Trần Thị Anh Xuân – 3I – SEE – HUST [email protected] 50

• The AND operation is performed the same as