Introduction

to
8085 Microprocessor
By

Prof. K. Adisesha (Ph. D)

 8085 INTRODUCTION
Learning Objective:
 Basic Concept and Ideas about Microprocessor.
 Architecture of 8085
 Addressing Modes and Instruction set of 8085
 Interrupts of 8085
 Peripheral Interfacings

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 Basic of Microprocessors
Differences between:
 Microcomputer –a computer with a microprocessor as its
CPU. Includes memory, I/O etc.
 Microprocessor –silicon chip which includes ALU, register
circuits & control circuits.
 Microcontroller –silicon chip which includes microprocessor,
memory & I/O in a single package.

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 Basic of Microprocessors
Definition of the Microprocessor:
 The microprocessor is a programmable device that takes in
numbers, performs on them arithmetic or logical operations
according to the program stored in memory and then produces
other numbers as a result.
 Programmable device: The microprocessor can perform different sets of operations
on the data it receives depending on the sequence of instructions supplied in the
given program. By changing the program, the microprocessor manipulates the data
in different ways.
 Instructions: Each microprocessor is designed to execute a specific group of
operations. This group of operations is called an instruction set. This instruction set
defines what the microprocessor can and cannot do.

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 Basic of Microprocessors
Inside The Microprocessor:
 Internally, the microprocessor is made up of 3 main units.
 The Arithmetic/Logic Unit (ALU)
 The Control Unit.
 An array of registers for holding data while it is being manipulated.

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 Basic of Microprocessors
Memory:
 Memory stores information such as instructions and data in binary
format (0 and 1). It provides this information to the microprocessor
whenever it is needed.
 Memory Map and Addresses.
 The registers inside the microprocessor
 Read Only Memory (ROM)
 Random Access Memory (RAM)

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 Basic of Microprocessors
To execute a program:
 The user enters its instructions in binary format into the memory. The
microprocessor then reads these instructions and whatever data is
needed from memory, executes the instructions and places the results
either in memory or produces it on an output device.
 To execute a program, the microprocessor “reads” each instruction from
memory, “interprets” it, then “executes” it.
 To use the right names for the 3 cycles:
 Instruction Fetch Cycle
 Instruction Decode Cycles
 Instruction executes Cycle

 This sequence is continued until all instructions are performed.

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 Basic of Microprocessors
Machine Language:
 The number of bits that form the “word” of a microprocessor is fixed for
that particular processor.
 These bits define a maximum number of combinations.
 For example an 4-bit microprocessor can have at most 24=16 different combinations.

 The 8085 (from Intel) is an 8-bit microprocessor.

 The 8085 uses a total of 246 bit patterns to form its instruction set.
 These 246 patterns represent only 74 instructions.
 The reason for the difference is that some (actually most) instructions have multiple
different formats.

 Because it is very difficult to enter the bit patterns correctly, they are
usually entered in hexadecimal instead of binary
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 Basic of Microprocessors
Assembly Language:
 Entering the instructions using hexadecimal is quite easier than entering
the binary combinations. but it still is difficult to understand what a
program written in hexadecimal does.
 So, each company defines a symbolic code for the instructions.
 These codes are called “mnemonics”.
 The mnemonic for each instruction is usually a group of letters that suggest the
operation performed..

 Example:
 00111100 translates to 3C in hexadecimal (OPCODE)
 Its mnemonic is: “INR A”.
 INR stands for “increment register” and A is short for accumulator.
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 Basic of Microprocessors
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: Basic of Microprocessors

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 Basic of Microprocessors
:
 Basic of Microprocessors
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 8085 INTRODUCTION
8085 MP Architecture:
 8-bit general purpose μp
 Capable of addressing 64 k of memory
 Has 40 pins
 Requires +5 v power supply
 Can operate with 3 MHz clock
 8085 upward compatible

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 8085 INTRODUCTION
The features of INTEL 8085 are :
 It is an 8 bit processor.
 It is a single chip N-MOS device with 40 pins.
 It has multiplexed address and data bus.(AD0-AD7).
 It works on 5 Volt dc power supply.
 The maximum clock frequency is 3 MHz while minimum
frequency is 500kHz.
 It provides 74 instructions with 5 different addressing modes.

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 8085 INTRODUCTION
The features of INTEL 8085 are :
It provides 16 address lines so it can access 2^16 =64K bytes of
memory.
It generates 8 bit I/O address so it can access 2^8=256 input ports.
It provides 5 hardware interrupts: TRAP, RST 5.5, RST 6.5, RST
7.5,INTR.
It provides Acc ,one flag register ,6 general purpose registers and
two special purpose registers(SP,PC).
It provides serial lines SID ,SOD. So serial peripherals can be
interfaced with 8085 directly.
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PIN DIAGRAM -8085

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PIN DIAGRAM -8085

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 PIN DIAGRAM -8085
 READY:This an output signal used to check the status of output
device.If it is low, µP will WAIT until it is high.
 TRAP:It is an Edge triggered highest priority , non mask able
interrupt. After TRAP, restart occurs and execution starts from
address 0024H.
 RST5.5,6.5,7.5:These are maskable interrupts and have low
priority than TRAP.
 INTR¯&INTA:INTR is a interrupt request signal after which µP
generates INTA or interrupt acknowledge signal.
 IO/M¯:This is output pin or signal used to indicate whether 8085
is working in I/O mode(IO/M¯=1) or Memory mode(IO/M¯=0 ).

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 PIN DIAGRAM -8085
 HOLD&HLDA:HOLD is an input signal .When µP receives HOLD
signal it completes current machine cycle and stops executing next
instruction. In response to HOLD µP generates HLDA that is HOLD
Acknowledge signal.
 RESET IN¯:This is input signal. When RESET IN¯ is low µp restarts
and starts executing from location 0000H.
 SID: Serial input data is input pin used to accept serial 1 bit data .
 X1X2 :These are clock input signals and are connected to external
LC,or RC circuit. These are divide by two so if 6 MHz is connected
to X1X2, the operating frequency becomes 3 MHz.
 VCC&VSS: Power supply VCC=+ -5Volt& VSS=-GND reference.

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ARCHITECTURE-8085

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 Arithmetic and Logical group
Accumulator: It is 8 bit general purpose register.
◦ It is connected to ALU.
◦ So most of the operations are done in Acc.
Temporary register: It is not available for user
◦ All the arithmetic and logical operations are done in the temporary
register but user can’t access it.
Flag: It is a group of 5 flip flops used to know status of various
operations done.
◦ The Flag Register along with Accumulator is called PSW or
Program Status Word.

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 Arithmetic and Logical group
Flag Register is given by:
S Z X AC X P X CY

 S: Sign flag is set when result of an operation is negative.

 Z: Zero flag is set when result of an operation is 0.
 Ac: Auxiliary carry flag is set when there is a carry out of lower
nibble or lower four bits of the operation.
 CY: Carry flag is set when there is carry generated by an
operation.
 P: Parity flag is set when result contains even number of 1’s.
Rest are don’t care flip flops.
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Register Group

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 Register Group
 Temporary registers (W,Z):These are not available for user.
These are loaded only when there is an operation being
performed.
 General purpose:There are six general purpose registers in
8085 namely B, C, D, E, H, L. These are used for various
data manipulations.
 Special purpose :There are two special purpose registers in
8085:
 SP :Stack Pointer.
 PC: Program Counter.

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 Register Group
 Stack Pointer:Whenever stack is to be used previous values are
PUSHED on stack and then after the program is over these values
are POPED back.
 Program Counter: It is 16 bit register used to point the location from
which the next instruction is to be fetched.
 Instruction register: When an instruction is fetched , it is executed in
instruction register. This register takes the Opcode value only.
 Instruction decoder: It decodes the instruction from instruction
register and then to control block.
 Timing and control: This is the control section of µP. It accepts clock
input .

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 DECODER & CONTROL
INTERRUPT CONTROL
⚫ It accepts different interrupts like TRAP INT5.5, 6.5, 7.5 and
INTR.

SERIAL IO CONTROL GROUP

⚫ It is used to accept the serial 1 bit data by using SID and SOD
signals and it can be performed by using SIM & RIM
instructions.

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 INSTRUCTIONS SET OF 8085
Classification of instructions based on size of 8085
There are three groups of instructions in 8085 microprocessor
based on the length or size of the instruction.
They are–
 Single byte (or 1 byte) instructions
 Two byte instructions
 Three byte instructions

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 INSTRUCTIONS SET OF 8085
Classification of instructions based on size:
Single byte instructions.
This type of instruction has only Opcode and the operand is
specified within the Opcode itself.–

 Example :
i)MOV B, C
ii) ADD B

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 INSTRUCTIONS SET OF 8085
Classification of instructions based on size:
Two byte instructions.
 This type of instruction has Opcode and one operand.
 The first byte represents the Opcode and the second byte
represents the 8-bit operand data or 8-bit port address.–
 Example :
i)MVI A, 50H
ii) OUT 50H

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 INSTRUCTIONS SET OF 8085
Classification of instructions based on size:
Three byte instructions.
 This type of instruction has Opcode and two operands.
 The first byte represents the Opcode, the second byte presents
the lower order 8-bits of data or address and the third byte
represents the higher order 8-bits of data or address.–
 Example :
) STA 5000H
ii) LXI B, 5000H
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 INSTRUCTIONS SET OF 8085
Classification of instructions based on function
The Instruction Set of 8085 can be categorized into five different
groups based on the nature of function of the instructions–
Data transfer operations
Arithmetic operations.
Logical operations
Branch operations and
Stack, Input / Output and Machine control operations

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 INSTRUCTIONS SET OF 8085
DATA TRANSFER GROUP
• Using mnemonics without any alteration in the content,
data can be transferred in four different cases –
From one register to another register
From the memory to the register
Move Immediate data to Register
From the register to the memory

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 DATA TRANSFER GROUP
From one register to another register
MOV Rd, Rs.(Move data from Rs to Rd).
Example:
MOV C,B. Move the content of register B to C.
Initially After execution
B=10H. B=10H.

C=20H. C=10H.
• Flags Affected :No flags affected.
• Addressing mode: Register.

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 DATA TRANSFER GROUP
From the memory to the register
MOV Rd, M (Move data from Memory to Rd).
Example:
MOV C,M. Move the content of Memory i.e. “H or L” to C.
Suppose the Data at memory pointed By HL pair at C200H is 10H.
Initially After execution
H=C2,L=00,C=30H H=C2,L=00,C=10H.
Flags Affected :No flags affected.
Addressing mode: Indirect.

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 DATA TRANSFER GROUP
Move Immediate data to Register
MVI R, Data.(Move Immediate data to Register).
Example:
MVI B, 30H. (Move the data 30 H to Register B)
Initially After execution

B=40H B=30H
◦ Flags Affected :No flags affected.
◦ Addressing mode: Immediate.

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 DATA TRANSFER GROUP
LXI Rp,16 bit .(Load 16 bit data to Register pair
Immediate).
Example:
LXI SP, C200H. (Load Stack pointer with C200H).
Initially After execution
SP=C800H SP=C200H.
Flags Affected :No flags affected.
Addressing mode: Immediate.

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 DATA TRANSFER GROUP
From the register to the memory
STA address.(Store Acc data to address).
Example:
STA C200H. (Move the data from Acc to C200H).
Suppose in Acc the data is 10H.
Initially After execution
A=10H, C200=20H C200=10H , A=10H

◦ Flags Affected :No flags affected.

◦ Addressing mode: Direct.
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 DATA TRANSFER GROUP
LHLD address.(Load HL pair with data from address).
Example:
LHLD C200H. (Move the data from C200 to HL pair).
Suppose at C200 the data is 20H,30H .
Initially After execution
H=10H,L=20H H=20H,L=30H.
C2=20H,00=30H C2=20H,00=30H

◦ Flags Affected :No flags affected.

◦ Addressing mode: Direct.
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 DATA TRANSFER GROUP
XCHG (Exchange the data from HL pair to DE pair)
Example : XCHG
Initially After execution
H=20H,L=30H, H=40H,L=70H.
D=40H,E=70H. D=20H,E=30H.

◦ Flags Affected :No flags affected.

◦ Addressing mode: Register.

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 DATA TRANSFER GROUP
IN 8 bit address (Move the data from address to Acc)
Example: IN 80H
Move the data from 80H port address to Accumulator.
Suppose data at 80H is 39H.
Initially After execution
A=20H. A=39H
◦ Flags Affected :No flags affected.
◦ Addressing mode: Direct.

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 DATA TRANSFER GROUP
OUT 8 bit address (Move the data from Acc to address)
Example: OUT 80H
Move the data from Acc to port address 80H.
Suppose data at Acc is 39H.
Initially After execution
A=39H, 80=10H. A=39H, 80=39H.
◦ Flags Affected :No flags affected.
◦ Addressing mode: Direct.

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 DATA TRANSFER GROUP
⚫ Example:
⚫ Write
a program to exchange contents of memory location
D000H to D001H
LDA D000H Load Acc with data from D000
MOV B,A Move the data to B
LDA D0001H Load Acc with data from D001
STA 2000H Store Acc data at D000
MOV A,B Move B’s data to A
STA 2001H Store data from D000 to D0001
RST1 Stop.

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 ARITHMETIC GROUP
• Arithmetic Operations that can be performed are
addition, subtraction, increment & decrement.
ADD R (ADD register content with Acc and result in A ).
Example: ADD C. (ADD the content of C with A).
Suppose the Data at C register is 10H.
Initially After execution
C= 10H ,A=10H A=20H,C=10H.
◦ Flags Affected : All flags are modified.
◦ Addressing mode: Register
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 ARITHMETIC GROUP
ADD M(ADD the content of memory(HL Reg content) with
Acc and result in A ).
Example: ADD M. (ADD the content of HL with A).
Suppose the Data at memory pointed by HL register 1020H is 10H.
Initially After execution
H= 10H ,L=20H . H=10H,L=20H.
A=20H,C=10H. A=30H.
o Flags Affected :All flags are modified.
o Addressing mode: Register Indirect.

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 ARITHMETIC GROUP
ADI 8 bit Data (ADD immediate data with Acc and result in A )
. Example:
ADI 30H. (ADD 30H with A).
Initially After execution
A=20H, A=50H.

◦ Flags Affected :All flags are modified.

◦ Addressing mode: Immediate.

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 ARITHMETIC GROUP
ADC R (ADD register content with Acc and carry and result in A ).
Example:

ADC C. (ADD the content of C with A with carry).

Suppose the Data at C register is 10H and carry is 01H.
Initially After execution

. C= 10H ,A=10H A=21H,C=10H.

◦ Flags Affected :All flags are modified.

◦ Addressing mode: Register

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 ARITHMETIC GROUP
Example: Write a program to perform 16 bit addition of 1234H &
4321H. Store answer at H & L registers.
MVI B,21H B=21H
MVI A,34H A=34H
MVI C,43H C=43H
MVI D,12H D=12H
ADD B A=34+21H
MOV L,A L=55H
MOV A,C A=43H
ADC D A=43+12H
MOV H,A H=55H
RST1 STOP.
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 ARITHMETIC GROUP
• Subtraction
SUB R (Subtract register content from Acc and result in A ).
Example:

SUB B. (Subtract the content of B from A ).

Suppose the Data at B register is 10H .
Initially After execution
B= 10H ,A=20H A=10H,B=10H.

◦ Flags Affected :All flags are modified.

◦ Addressing mode: Register 49
 ARITHMETIC GROUP
SBB R (Subtract register content from Acc with borrow and result in A ).
Example:
SBB B. (Subtract the content of B from A with borrow).
Suppose the Data at B register is 10H and borrow is 01H .
Initially After execution

B= 0FH ,A=20H A=10H,B=0FH.

◦ Flags Affected :All flags are modified.

◦ Addressing mode: Register

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 ARITHMETIC GROUP
SUI 8 bit Data(Subtract immediate data from Acc and result
in A ).
Example:

SUI 30H. (Subtract 30H from A).

Initially After execution
A=80H, A=50H.

◦ Flags Affected : All flags are modified.

◦ Addressing mode: Immediate
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 ARITHMETIC GROUP
Example: Subtract data of C800 H from C200H.Store the result
at 2C00.
LDA C800H
MOV B,A
LDA C200H
SUB B
STA 2C00H
RST1

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 ARITHMETIC GROUP
• Increment
INR R (Increment register content by 1 ).
Example:
INR C. (Increment the content of C by 1).
Suppose the Data at C register is 10H.
Initially After execution
C= 10H C=11H.

⚫ FlagsAffected :All flags are modified except carry flag.

⚫ Addressing mode: Register. 53
 ARITHMETIC GROUP
INX Rp (Increment register pair content by 1 ).
Example:
INX SP (Increment the content of Stack pointer pair by 1).
INX B. (Increment the content of BC pair by 1).
Suppose the Data at BC register is 1010H and SP is C200H
Initially After execution
BC= 1010H BC=1011H.
SP=C200H SP=C201H.
⚫ Flags Affected :No flags are modified.
⚫ Addressing mode: Register. 54
 ARITHMETIC GROUP
• Decrement
DCR R (Decrement register content by 1 ).
Example:
DCR C. (Decrement the content of C by 1).
Suppose the Data at C register is 10H.
Initially After execution
C= 10H C=0FH.

⚫ FlagsAffected :All flags are modified except carry flag.

⚫ Addressing mode: Register. 55
 LOGICAL GROUP
• Various logical operations can be performed with the
contents of the accumulator. AND , OR and Exclusive OR
ANA R (Logically AND register content with Acc and result in A ).
Example: ANA C (AND the content of C with A). Suppose
the Data at C register is 10H.
Initially After execution
C= 10H ,A=10H A=10H,C=10H.

⚫ FlagsAffected :S,Z,P are modified Cy=reset, AC=set.

⚫ Addressing mode: Register.
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 LOGICAL GROUP
ANI Data (Logically AND immediate data with Acc and result in
A)
Example:
ANI 10H (AND 10H with A).
Initially After execution
A=10H A=10H
◦ Flags Affected :S,Z,P are modified Cy=reset, AC=set.
◦ Addressing mode: Immediate.

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 LOGICAL GROUP
ORA R (Logically OR register content with Acc and result in A5 )
Example:
ORA C (OR the content of C with A).
Suppose the Data at C register is 17H.
Initially After execution
C= 17H ,A=10H A=17H,C=17H.
◦ Flags Affected :S,Z,P are modified Cy=reset, AC=reset.
◦ Addressing mode: Register.

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 LOGICAL GROUP
ORI Data (Logically OR immediate data with Acc and result in A ).
Example:
ORI 10H (OR 10H with A).
Initially After execution
A=30H A=30H

◦ Flags Affected :S,Z,P are modified Cy=reset,AC=set.

◦ Addressing mode: Immediate.

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 LOGICAL GROUP
XRA R (Logically XOR register content with Acc and result in A ).
Example:
XRA C (XOR the content of C with A).
Suppose the Data at C register is 17H.
Initially After execution
C= 17H ,A=10H A=07H,C=17H.

◦ Flags Affected :S,Z,P are modified Cy=reset, AC=reset.

◦ Addressing mode: Register.
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 LOGICAL GROUP
CMP R (Compare register content with Acc and result in A ).
Example:
CMP C (Compare the content of C with A).
Suppose the Data at C register is 17H.
Initially After execution
C= 10H ,A=17H A=17H,C=17H.
◦ Flags Affected :S=0,Z=0,P=0, Cy=reset, AC=reset.
◦ Addressing mode: Register.

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 LOGICAL GROUP
• Compare
CPI Data (Compare immediate data with Acc ).
Example:
CPI 10H (Compare the content of C with A).
Initially After execution
A=17H A=17H.

Flags Affected :S=0,Z=0,P=0, Cy=reset,AC=reset.

Addressing mode:Immediate.
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 LOGICAL GROUP
CMP R (Compare data from register B with Acc).
Example:
CMP B (Compare the content of B with A).
CMP M (Compare data from memory with Acc).

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 LOGICAL GROUP
• Rotate: Each bit in the accumulator can be
shifted either right or left to the next position.
RLC (Rotate accumulator left ).
Example:

MOV A,03H.
RLC (Rotate accumulator left).
Initially After execution A=03H
A=06H.
◦ Flags Affected :Only carry flag is affected.
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◦ Addressing mode: Implied.
 LOGICAL GROUP
RAL (Rotate accumulator left with carry ).
Example:

MOV A,03H.
RAL (Rotate accumulator left with carry).
Initially After execution
A=03H , carry =01H A=07H.
Flags Affected :Only carry flag is affected.
Addressing mode: Implied.

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 LOGICAL GROUP
RRC (Rotate accumulator right ).
Example:

MOV A,03H.
RRC (Rotate accumulator right).
Initially After execution
A=03H , A=81H.
◦ Flags Affected :Only carry flag is affected.
◦ Addressing mode: Implied.

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 LOGICAL GROUP
Write a program to reset last 4 bits of the number 32H
Store result at C200H.
MVI A, 32H A=32H
ANI F0H 00110010 AND 1111000
=00110000=30H
STA C200H. C200=30H
RST1 Stop

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 BRANCH GROUP
• This group of instructions alter the sequence
of program execution either conditionally or
unconditionally.
JMP address(Unconditional jump to address)
Example:
JMP C200H.
⚫ After this instruction the Program Counter is loaded with this
location and starts executing and the contents of PC are
loaded on Stack.
⚫ Flags Affected :No Flags are affected.
⚫ Addressing mode: Immediate.
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 BRANCH GROUP
CALL address(Unconditional CALL from address)
Example:
CALL C200H.
⚫ After this instruction the Program Counter is loaded
with this location and starts executing and the contents
of PC are loaded on Stack.

◦ Flags Affected :No Flags are affected.

◦ Addressing mode: Immediate
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 BRANCH GROUP
Conditional Jump Instructions.
 JC (Jump if Carry flag is set)
 JNC (Jump if Carry flag is reset)
 JZ (Jump if zero flag set)
 JNZ (Jump if zero flag is reset)
 JPE (Jump if parity flag is set)
 JPO (Jump if parity odd or P flag is reset )
 JP (Jump if sign flag reset )
 JM (Jump if sign flag is set or minus)

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 BRANCH GROUP
Conditional Call Instructions.
 CC (Call if Carry flag is set)
 CNC (Call if Carry flag is reset)
 CZ (Call if zero flag set)
 CNZ (Call if zero flag is reset)
 CPE (Call if parity flag is set)
 CPO (Call if parity odd or P flag is reset )
 CP (Call if sign flag reset )
 CM (Call if sign flag is set or minus)

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 BRANCH GROUP
RET (Return from subroutine)
Example:
MOV A,C
RET
⚫ After this instruction the Program Counter POPS PUSHED
contents from stack and starts executing from that address .
Flags Affected :No Flags are affected.
Addressing mode:Register indirect .

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 BRANCH GROUP
RST (Restart instruction)
Example:
MOV A,C
RST 1.
⚫ After this instruction the Program Counter goes to address
0008H and starts executing from that address .

◦ Flags Affected :No Flags are affected.

◦ Addressing mode: Register indirect.

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 BRANCH GROUP
The addresses of the respective RST commands are:

Instruction Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
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 STACK AND MACHINE CONTROL
The stack is an area of memory identified by the programmer for
temporary storage of information.
⚫ The stack is a LIFO structure.
– Last In First Out.
⚫ The stack normally grows backwards into memory.
⚫ In the 8085, the stack is defined by setting the
SP (Stack Pointer) register.
• LXI SP, FFFFH

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 STACK AND MACHINE CONTROL
Saving Information on the Stack.
⚫ Information is saved on the stack by PUSHing it on.
⚫ It is retrieved from the stack by POPing it off.
⚫ The 8085 provides two instructions:
◦ PUSH
◦ POP
⚫ for storing information on the stack and retrieving it back.
⚫ Both PUSH and POP work with register pairs only.

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 STACK AND MACHINE CONTROL
PUSH Rp. (Push register pair contents on stack).
Example: LXI SP FFFFH.
PUSH H. (Move the content of HL pair on Stack).
⚫ Suppose at HL pair the data is H= 20H,L= 30H & SP is
initialized at FFFFH
Initially After execution
H=20H,L=30H H=20H,L=30H.
SP=FFFF H FFFD=30H,FFFE=20H
◦ Flags Affected :No flags affected.
◦ Addressing mode: Register indirect.

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 STACK AND MACHINE CONTROL
POP Rp. (Pop register pair contents from stack).
Example: POP D(POP the content of DE pair from Stack).
⚫ Suppose at DE pair the data is H= 20H,L= 30H SP was
initialized at FFFFH
Initially After execution
D=20H,E=30H D=10H,E=80H.
FFFD=80H,FFFE=10H
◦ Flags Affected :No flags affected.
◦ Addressing mode: Register indirect

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 STACK AND MACHINE CONTROL
XTHL (Exchange HL register pair contents with top of stack).
Example: XTHL(Exchange top with HL pair).
⚫Suppose at HL pair the data is H= 20H,L= 30H & SP =FFFFH
& at locations FFFF=10H and at FFFE= 80H.
Initially After execution
H=20H,L=30H H=10H,L=80H.
SP=FFFF =10H,FFFE=80H FFFD=20H,FFFE=30H

◦ Flags Affected :No flags affected.

◦ Addressing mode: Register indirect.

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 ADDRESSING MODES OF 8085
Addressing modes in 8085 can be classified into 5 groups:
 Immediate addressing mode

 Register addressing mode

 Direct addressing mode

 Indirect addressing mode

 Implied addressing mode

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 ADDRESSING MODES OF 8085
Immediate addressing:
Immediate data is transferred to address or register.
Example:
MVI A,20H. Transfer immediate data 20H to accumulator.
Number of bytes:
Either 2 or 3 bytes long.
1st byte is opcode.
2nd byte 8 bit data .
3rd byte higher byte data of 16 bytes.

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 ADDRESSING MODES OF 8085
Register addressing:
Data is transferred from one register to other.
Example:
MOV A, C :Transfer data from C register to accumulator.
Number of bytes:
Only 1 byte long.
One byte is opcode.

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 ADDRESSING MODES OF 8085
Direct addressing:
⚫ Data is transferred from direct address to other register or
vice-versa.
Example:
LDA C200H .Transfer contents from C200H to Acc.
Number of bytes:
These are 3 bytes long.
1st byte is opcode.
2nd byte lower address.
3rd byte higher address.
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 ADDRESSING MODES OF 8085
Indirect addressing:
Data is transferred from address pointed by the data in a
register to other register or vice-versa.
Example:
MOV A, M: Move contents from address pointed by M to Acc.
Number of bytes:
These are 3 bytes long.
1st byte is opcode.
2nd byte lower address.
3rd byte higher address.
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 ADDRESSING MODES OF 8085
Implied addressing:
⚫ These doesn’t require any operand. The data is specified in
Opcode itself.
Example: RAL: Rotate left with carry.
No. of Bytes:
These are single byte instruction or Opcode only.

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 PROGRAM
⚫Write a program to transfer a block of data from C550H to C55FH.
Store the data from C570H to C57FH .
LXI H ,C550H
LXI B ,C570H
MVI D,0FH
UP MOV A,M
STAX B
INX H
INX B
DCR D
JNZ UP
RST1

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