A3 After MID

MP
EEE342
Assignment # 02
Name Arslan Shabeer
Registration
Number FA20-BEE-033
Subject MP
Instructor’s Name Sir Sikender Gull SB

Qno1:
Write an assembly and C Code to toggle the PORTC.2 bit
Continuously every half second. Use timer0, Normal mode and 1:64
Pre-scalar to create the delay Assume Crystal =4MHZ
#include
<avr/io.h> int
main() {
DDRB= 0xFF;
while (1)
{
PORTB=PORTB^(1<<PB4);
TCNT1H=0x85;
TCNT1L=0xEE;
TCCR1A=0x00;
TCCR1B=0x03; //Normal mode, 1:64 prescaler
while ((TIFR1&(0x1<<TOV1))==0)
{}
TCCR1B=0; TIFR1=0x1<<TOV1;
}
}
Qno2:
Assume that XTAL=4MHZ, write a program to generate square wave
of 16KHZ on Pin PORTB.3 and also show calculation to load value to
TCONT0.
#include <avr/io.h>
int main(void)
{ DDRB = 1<<3;
PORTB &=~(1<<3);
while
(1)
{
TCNT0 = 0x83;
TCCR0A = 0x00; // NORMAL MODE
TCCR0B = 0x01; // NO PRESCALAR
while((TIFR0&(1<<TOV0))==0)
{ }
TCCR0B = 0; TIFR0 = (1<<TOV0);
PORTB ^= (1<<3);
}
}
Qno3:
Write an assembly and C program using timer0 interrupt to create
square wave of 3khz on pin PB7 while sending data from PORTC to
PORTD. XTAL = 1MHZ
#include <avr/io.h>
#include <avr/interrupt.h>
int main () {
DDRB |= (1<<7); //make DDRB.5 output
TCNTO = 0x5B;
TCCR0A = 0x00; //NORMAL mode
TCCR0B = 0x01;
TIMSK0 = (1<<TOIE0A); //enable Timer0
sei (); //enable interrupts
DDRC = 0x00; //make PORTC input
DDRD = 0xFF; //make PORTD output
while (1) //wait here
PORTD = PINC;
}
ISR (TIMER0_OVF_vect) { //ISR for Timer0 compare match A
TCNT0= 0x5B;
PORTB ^= (1<<7); //toggle PORTB.5
}
.ORG 0x100
MAIN: LDI
R20, HIGH (RAMEND)
OUT SPH, R20
LDI
R20, LOW (RAMEND)
OUT SPL, R20
SBI DDRB, 7
LDI R20, (1<<TOI0E)
OUT TIMSK, R20
SEI
LDI R20,0x5B
OUT TCNT0, R20
LDI R21,0x00
OUT TCCR0A, R20
LDI R22,0x01
OUT TCCR0B, R22
LDI R19,0x00
OUT DDRC, R19 ; make PORTC input
LDI R20, 0xFF
OUT DDRD, R20 ; make PORTD output
;----------------Infinite loop
HERE: IN R20, PINC
OUT PORTD,
R20 JMP HERE
TO_VO_ISR:
IN R16, PORTB
LDI R17, 0x20
EOR R16, R17
OUT PORTB, R16
RETI
Qno4:
Simulate (using proteus) a program using timer0 a pulse is fed into
timer0 where timer0 is used as counter and counts up. Whenever
the counter reaches 150, it will toggle the pin PORTB.5.
#include <avr/io.h>
#include
<avr/interrupt.h> int
counter; int main()
{
DDRB|=(1<<5);
PORTB|=(1<<5);
TCNT0=56;
TCCR0A=0x00;
TCCR0B=0x01;
TIMSK0 = (1<<TOIE0);
sei ();
while (1)
if(counter==200){
PORTB^=(1<<5);
}
}
ISR (TIMER0_OVF_vect)
{
//counter++;
TCNT0=56;
counter++;
//PORTB^=(1<<5);
}
Qno5:
1. What happens if any interrupt is activated while the CPU is serving
another Interrupt?
Interrupts do not interrupt each other. The priority determines which interrupt handler get
called first if more than one event happen at the same The priority of each interrupt is related to
the address of that interrupt in the interrupt vector. The interrupt that has a lower address, has a
higher priority. For example, the address of external interrupt 0 is 2, while the address of
external interrupt 2 is 6; thus, external interrupt 0 has a higher priority, and if both of these
interrupts are activated at the same time, external interrupt 0 is served first.
2. What is context saving?
The "context saving" means the first thing an interrupt does is to save all the intermediary data (save
W, PROD, tmp, ...), and the last operation is to restore all these data. The W register is always saved,
but all the others are not. You have to tell the compiler to do it (or do it yourself)
3. What is Edge triggered and level triggered interrupts?

Edge-triggered vs. level-triggered interrupts
There are two types of activation for the external hardware interrupts (1) level triggered, and (2)
edge triggered. INT2 s only edge triggered, while INTO and INTI can be level or edge triggered.
As stated before, upon reset INT0 and INTI are low-level-triggered interrupts. The bits of the
MCUCR register indicate the trigger options of INTO and INT1.
The ISC2 bit of the MCUCSR register defines whether INT2 activates in the falling edge or the
rising edge. Upon reset ISC2 is 0, meaning that the external hardware interrupt of INT2 is falling
edge triggered.
4. What address in the interrupt vector table is assigned to timer 1

overflow?
Different addresses are assigned for Timer0 and Timer1 overflow flags in the interrupt vector table.
For timer 1 overflow address in the interrupt vector table is 0012.
5. What is purpose of GICR register
General Interrupt Control Register (GICR)
The GICR Register shown below is used to enable INT0 and INT1 interrupts. These interrupts
correspond to the two physical pins PD3 and PD4 respectively. The INT0 is configured to
produce low level triggered and INT1 as falling edge triggered interrupt respectively. A counter
is increment and displayed when the interrupt occurs.
7 6 5 4 3 2 1
INT1 INT0 INT2 - - - IVSEL
Qno6:
Write comment for each statement
IN R16, PINB //Read Data From Port B and Send it to R16
PORTA.0=~PORTA.0 //Inverse the value of pin0 of PORTA
LDI R20, 0x06 //Load 0x06 in

OUT TCCR1B, R20 //Send it to TCCR1B register of Timer1
DDRC=0xff //Declaring PORTC as output

PORTC=0x00 //Pulling down all the pins of PORTC

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MP

Name Arslan Shabeer

Instructor’s Name Sir Sikender Gull SB

3. What is Edge triggered and level triggered interrupts?

4. What address in the interrupt vector table is assigned to timer 1

5. What is purpose of GICR register

General Interrupt Control Register (GICR)

INT1 INT0 INT2 - - - IVSEL

PORTA.0=~PORTA.0 //Inverse the value of pin0 of PORTA

LDI R20, 0x06 //Load 0x06 in

DDRC=0xff //Declaring PORTC as output

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