Computer Architecture and Organization: Chapter 5: Instruction Sets

Chapter 5: Instruction Sets
Computer Architecture
and Organization
Department Computer Engineering

What is an Instruction Set?
• The complete collection of instructions that are

understood by a CPU
• Machine Code
• Binary 1&0
• Usually represented by assembly codes
Computer Architecture and Organization 2

Elements of an Instruction
• Operation code (Op code)

• Specifies operation to be performed
• Source Operand reference
• Input for the operation
• Result Operand reference
• The operation may produce a result
• Next Instruction Reference
• Where to fetch the next instruction after execution of this

Where have all the Operands Gone?
• Source & result operands can be in one of four areas:

➢ Main memory (or virtual memory or cache)
➢ CPU register
➢ I/O device
➢ Immediate

Instruction Representation
• In machine code each instruction has a unique bit

pattern
• For human consumption (well, programmers anyway) a
symbolic representation is used
• e.g. ADD, SUB, LOAD
• Operands can also be represented in this way
• ADD A,B
• Operation is performed on the content of a location, not
on its address unless it is immediate.

Simple Instruction Format

Instruction Types
• Data processing
• Data storage -main memory & registers
• Data movement – I/O instructions
• Program flow control – Test & branch instructions

Number of Addresses (a)
• 3 addresses
• Operand 1, Operand 2, Result
• a = b + c;
• Not common
• Needs very long words to hold everything

Number of Addresses (b)
• 2 addresses
• One address doubles as operand and result
• a=a+b
• Reduces length of instruction
• Requires some extra work
• Temporary storage to hold some results

Number of Addresses (c)
• 1 address
• Implicit second address
• Usually a register (accumulator)
• Common on early machines

Number of Addresses (d)
• 0 (zero) addresses
• All addresses implicit
• Uses a stack
• Last-in-first-out
• e.g. push a
• push b
• add (0 address instruction)
• pop c
• c=a+b

How Many Addresses
• More addresses
• More complex instructions
• Fewer instructions per program
• Multiple general purpose registers
• Fewer addresses
• Less complex instructions
• More instructions per program
• Faster fetch/execution of instructions
• For reasons of flexibility and ability to use multiple registers, most

contemporary machines employ a mixture of two- and three-address
instructions.

Instruction Set Design
• Affects so many of computer system
• Implementation of the processor
• The programmer requirements must be considered
• The most important fundamental design issues include:
• Operational repertoire: how many & which operations to provide
how complex operations should be
• Data types: type of data upon which operations are performed
• Instruction format: Instruction length, number of address and so on.
• Registers: number of processor registers that can be referenced by
instructions and their use.
• Addressing: The mode or modes by which the address of an operand
is specified.
Electrical Engineering Materials 13

Types of Operand
• Addresses
• Numbers
• Integer/floating point
• Characters
• ASCII etc.
• Logical Data
• Bits or flags

Types of Operation
• Data Transfer
• e.g. Move, POP/PUSH
• Arithmetic
• ADD,SUB,MUL
• Logical
• Bitwise operations e.g. AND, OR, XOR, shift, rotate
• Conversion
• Binary to decimal
• I/O
• System Control
• Transfer of Control
• Branch, interrupt call

Shift and Rotate Operations

Systems Control
• Privileged instructions
• CPU needs to be in specific state
• Kernel mode
• For operating systems use
• Example, access to process control blocks in a
multiprogramming system.

Addressing Modes
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack

Immediate Addressing
• Operand is part of instruction

• Operand = address field
• e.g. ADD 5
• Add 5 to contents of accumulator
• 5 is operand
• No memory reference to fetch data
• Fast
• The size of a number is limited to the size of address
field

Immediate Addressing Diagram
Instruction
Opcode Operand

Direct Addressing
• Address field contains address of operand

• Effective address (EA) = address field (A)
• e.g. ADD A
• Add contents of cell A to accumulator
• Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out effective address
• Limited address space

Direct Addressing Diagram
Instruction
Opcode Address A
Memory
Operand

Indirect Addressing
• Memory cell pointed to by address field contains the

address of (pointer to) the operand
• EA = (A)
• Look in A, find address (A) and look there for operand
• e.g. ADD (A)
• Add contents of cell pointed to by contents of A to accumulator
• Requires two memory reference to fetch the operand:
One to get its address and a second to get its value.

Indirect Addressing …
• Large address space

• 2n address space where n = word length
• May be nested, multilevel, cascaded
• e.g. EA = (((A)))
• Draw the diagram yourself
• Multiple memory accesses to find operand
• Hence slower

Indirect Addressing Diagram
Instruction
Opcode Address A
Memory
Pointer to operand
Operand

Register Addressing
• Operand is held in register named in address filed

• EA = R
• Limited number of registers
• Very small address field needed
• Shorter instructions
• Faster instruction fetch

Register Addressing …
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
• Similar to direct addressing except this time address field
refers to register rather than a main memory address.

Register Addressing Diagram
Instruction
Opcode Register Address R
Registers
Operand

Register Indirect Addressing
• Similar to indirect addressing except this time the

address field refers to a register not memory location.
• EA = (R)
• Operand is in memory cell pointed to by contents of
register R
• Large address space (2n), n is the size of register
• One fewer memory access than indirect addressing

Register Indirect Addressing Diagram
Instruction
Opcode Register Address R
Memory
Registers
Pointer to Operand Operand

Displacement Addressing
• EA = A + (R)
• Address field hold two values
• A = base value
• R = register that holds displacement
• or vice versa
• Known by a variety of names:

• PC- relative addressing
• Base-register addressing
• Indexed addressing

Displacement Addressing Diagram
Instruction
Opcode Register R Address A
Memory
Registers
Pointer to Operand + Operand

Relative Addressing
• Address field of instruction contains displacement value

• R = Program counter, PC
• EA = A + (PC)
• i.e. get operand from A cells from current location
pointed to by PC

Base-Register Addressing
• A holds displacement
• R holds pointer to base address
• EA = A + (R)
• e.g. segment registers in 80x86

Indexed Addressing
• A = base
• R = displacement
• EA = A + (R)
• Good for accessing arrays
• EA = A + (R)
• (R)++

Combinations
• Post-index
• Indexing performed after the indirection
• EA = (A) + (R)
• Pre-index
• Indexing performed before indirection
• EA = (A+(R))
• (Draw the diagrams)

Stack Addressing
• Stack is a reserved block of location.

• Associated with the stack a pointer whose value is address
of top of the stack.
• The stack pointer is maintained in register.
• Thus, references to stack location in memory are in fact
register indirect addressing.
• Instruction need not include a memory reference.
• Operand is (implicitly) on top of stack
• e.g.
• ADD Pop top two items from stack
and add

Instruction Formats
• Layout of bits in an instruction

• Includes Opcode
• Includes (implicit or explicit) operand(s)
• Usually more than one instruction format in an instruction
set.

Assembly Language
• Use hexadecimal rather than binary

• Code as series of lines
• Hex address and memory address
• Need to translate automatically using program
• Add symbolic names or mnemonics for instructions
• Three fields per line
• Location address
• Three letter Opcode
• If memory reference: address
• Need more complex translation program

Program in: Binary Hexadecimal
Address Contents Address Contents
101 0010 0010 0000 0001 101 2201
102 0001 0010 0000 0010 102 1202
103 0001 0010 0000 0011 103 1203
104 0011 0010 0000 0100 104 3204
201 0000 0000 0000 0010 201 0002
202 0000 0000 0000 0011 202 0003
203 0000 0000 0000 0100 203 0004
204 0000 0000 0000 0000 204 0000

Symbolic Program
Address Instruction
101 LDA 201
102 ADD 202
103 ADD 203
104 STA 204
201 DAT 2
202 DAT 3
203 DAT 4
204 DAT 0

Symbolic Addresses
• First field (address) now symbolic

• Memory references in third field now symbolic
• Now have assembly language and need an assembler to
translate
• Assembler used for some systems programming
• Compliers
• I/O routines

Assembler Program
Label Operation Operand

FORMUL LDA I
ADD J
ADD K
STA N
I DATA 2
J DATA 3
K DATA 4
N DATA 0

End of Chapter 5
Computer Architecture
and Organization
Department Computer Engineering

Computer Architecture and Organization: Chapter 5: Instruction Sets

Uploaded by

Copyright:

Available Formats

Computer Architecture and Organization: Chapter 5: Instruction Sets

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Computer Architecture and Organization: Chapter 5: Instruction Sets

Uploaded by

Copyright:

Available Formats

Chapter 5: Instruction Sets

Department Computer Engineering

• The complete collection of instructions that are

Computer Architecture and Organization 2

• Operation code (Op code)

Computer Architecture and Organization 3

• Source & result operands can be in one of four areas:

Computer Architecture and Organization 4

• In machine code each instruction has a unique bit

Computer Architecture and Organization 5

Computer Architecture and Organization 6

Computer Architecture and Organization 7

Computer Architecture and Organization 8

Computer Architecture and Organization 9

Computer Architecture and Organization 10

Computer Architecture and Organization 11

• For reasons of flexibility and ability to use multiple registers, most

Computer Architecture and Organization 12

Electrical Engineering Materials 13

Computer Architecture and Organization 14

Computer Architecture and Organization 15

Computer Architecture and Organization 16

Computer Architecture and Organization 17

Computer Architecture and Organization 18

• Operand is part of instruction

Computer Architecture and Organization 19

Computer Architecture and Organization 20

• Address field contains address of operand

Computer Architecture and Organization 21

Computer Architecture and Organization 22

• Memory cell pointed to by address field contains the

Computer Architecture and Organization 23

• Large address space

Computer Architecture and Organization 24

Computer Architecture and Organization 25

• Operand is held in register named in address filed

Computer Architecture and Organization 26

Computer Architecture and Organization 27

Computer Architecture and Organization 28

• Similar to indirect addressing except this time the

Computer Architecture and Organization 29

Pointer to Operand Operand

Computer Architecture and Organization 30

• Known by a variety of names:

Computer Architecture and Organization 31

Pointer to Operand + Operand

Computer Architecture and Organization 32

• Address field of instruction contains displacement value

Computer Architecture and Organization 33

Computer Architecture and Organization 34

Computer Architecture and Organization 35

• (Draw the diagrams)

Computer Architecture and Organization 36

• Stack is a reserved block of location.

Computer Architecture and Organization 37

• Layout of bits in an instruction

Computer Architecture and Organization 38

• Use hexadecimal rather than binary

Computer Architecture and Organization 39