Chapter 1

INTRODUCTION

Over the last decade, quantum computing has experienced significant

changes and captured worldwide attention. In particular, superconducting qubits
have become the leading candidates for scalable quantum computers, and a
number of cryogenic materials have scientifically demonstrated their potential
uses in constructing qubit chips. However, because of insufficient coherence
time, establishing a robust and scalable quantum platform is still a long-term
goal. Another consideration is the control circuits essential to initializing,
operating and measuring the qubits. To keep noise low, control circuits in close
prox- imity to the qubits require superior reliability in the cryogenic
environment. The realization of the quantum advantage demands qubits with
appropriate circuitry designs to maintain long coherence times and entanglement.
In this work, we briefly summarize the current status of cryogenic materials for
qu- bits and discuss typical cryogenic circuitry designs and integration
techniques for qubit chips. In the end, we provide an assessment of the prospects
of quantum computers and some other promising cryogenic materials.

To date, progress in conventional computing has relied heavily on the

density of transistors on silicon chips doubling every 18 months, a trend
known as Moore’s law after Intel cofounder, Gordon Moore, who predicted the
phenomenon in 1960s. But spi- raling costs and falling yields associated with
further miniaturization have stimulated the search for sophisticated
alternative structures and new materials. One possibility is to apply new
concepts and new physics to the current technologies, as schematically shown in
Fig. 1. Quantum computing (QC) is one of the most revolutionary computing
models, in which information is stored and pro- cessed more efficiently using
switches—known as quantum bits, or ‘‘qubits’’—that can be on and off at the
same time. The full applications of QC are expected to produce globally
revolutionary and profound changes in computation. At present, QC draws huge
investments from both nations and industries, as well as intensive studies from
aca- demic communities. A complete ecological environ- ment for QC research
and development (R&D) is gradually being established. Although QC has made
rapid progress in the past decade, there are still many unresolved problems.
1
For example, as the number of qubits increases, crosstalk and fan-out issues tend to
degrade the performance of the quantum processor. To be effective, QC eventually
will require a noise level low enough to allow error correction to be performed,
which demands improvements over the current state of both qubit design and
external circuitry. With the rapid development and breakthroughs being made in
recent years, many industry giants (e.g., Google, IBM) and startup companies (e.g.,
Rigetti, OriginQ) have poured increasing resources and efforts to compete in this
race. To date, some machines, such as educational quantum instruments and noisy
intermediate-scale quantum (NISQ) devices, have been manufactured for com-
mercial applications.

However, the large-scale and error-corrected quantum computers, which

would be capable of performing useful quantum algo- rithms, still require long-
term effort. Over the last twenty years, scientists have found that cryogenic
quantum materials and cryogenic circuit designs are both important for the
future of QC. Moreover, the focus in up scaling quoits has gradually shifted
from fundamental physics to engineering problems. There are quite a few
candidate materials for qubits, each of which has its own pros and cons. Spin
in semiconducting quantum dots (QDs), phase in superconducting circuits, and
non-commutative exchange in non-Abelian anyonsoffer promising degrees of
freedom for realizing solid-state qubits. In the pursuit of upscaling, many
important devel- opments have been reported in superconducting qubits, thus it
is generally thought that supercon- ducting implementations are currently
ahead of all other qubit implementations. In 2019, quantum supermacy was
demonstrated in a circuit of 53 working superconducting qubits with 86
couplers, and the largest qubit number announced by Google is 72. Recently,
materials with distinct band structures, two-dimensional (2D) natures and
topological properties have attracted considerable attention. Apart from the
ongoing development of spin qubits in silicon, graphene is expected to be a
robust material for hosting spin qubits, owing to its weak spin-orbit and
hyperfine interactions. Charge carriers in few-layer transition metal
dichalcogenides (TMDCs) are simultaneously valley- and spin-po- larized,
providing more degrees of freedom that can be controlled as qubits. Topological
materials, such as 2D/3Dtopological insulators (TIs), Dirac semimetals and

2
Weyl semimetals, for their topologically protected edge and surface states, are
immune from defect scatterings and thus can transmit current effectively.
When topological materials are in contact with s-wave superconductors, it is
possible to host a type of quasiparticles called Majorana bound states (MBSs).
These quasi- particles obey no Abelian (non-commutative)

Fig. 1. The strategies beyond Moore’s law. New applications with current technology, new
materials in replacement of semiconductors and new computation models introduced in
industry.

exchange statistics and are candidates to perform fault-tolerant topological

quantum computing (TQC). Although lots of effort needs to be made before
practical QC applications are possible, these aforementioned materials are under
heavy investi- gation for use in many different QC platforms, such as QDs and
superconducting circuits. On the other hand, external circuitry design is as
important as pursuing high-quality qubits, since QC relies on both qubits and
well-established control means to communicate with them. Solid-state qubits
(e.g., QDs and superconducting circuits) generally operate in the 10mK
environment inside a dilution refrigerator, with high electron mobility transistor
(HEMT) amplifiers thermally anchored at 4K, and control electronic devices
placed at room temperature. In practice, it is hard to thermally isolate the qubits
from the measurement elements, thus noise cannot be completely avoided,
inevitably introducing decoherence of the qubits. To address this issue, a
cryogenic control chip based on a complementary metal-oxide-semiconductor

3
(CMOS) ( < 10K) has been used to prevent the thermal noise caused by room
temperature. This highly-integrated system-on-a-chip (SoC) will simplify
system design and replace the original bulky room temperature instruments. For
example, Google Bristlecone has used an integrated circuit (IC) of a pulse
generator in a 4K environment to directly control low-temper- ature qubits. In
this article, we will discuss the new opportu- nities for cryogenic materials and
cryogenic cir- cuitry designs for quantum computers. In particular, we will
briefly review the current status of quantum materials and circuit integration for
quantum computers.
While development of superconducting and semi- conducting qubits based
on the aforementioned composing materials continue to advance, quantum
materials, for their distinct band structures and topological properties, have also
attracted substan- tial attentions for opportunity in synthesizing new type of
qubits, as will be discussed in the next section.

4
 Chapter 2
QUANTUM MATERIALS FOR QUBITS

Many QC platforms have been investigated and developed. QC platforms

can be classified into atomic systems, photonic systems, NMR systems and
solid-state systems. For solid-state systems, superconducting quantum devices,
semiconductor QDs and topological materials are very important platforms that
are under heavy investigation. We will focus on solid-state platforms which
work in the microwave regime, and discuss the opportunities for new materials.
2.1 Superconducting Qubits
Superconductivity happens when certain materi- als are cooled below a
critical temperature Tc and electrons form pairwise (Cooper pair) condensate,
switching from fermions to bosons. A wavefunction exists in macroscopic scale
and governs quantities such as charge density and phase in a quantum flux
across the entire superconductor.
2.1 Semiconducting Qubits
A semiconducting QD is an artificially structured system that can be filled
with only a few electrons or holes. The charged carriers in this system are
generally confined in a submicron area, and the confinement potential in all
directions is strong enough that results in quantized energy levels. These energy
levels can be observed at low temper- atures. The electronic properties of QDs
are dominated by several effects.
¼

Fig. 2.1 (a) Circuit diagram of an external-flux tunable transmon qubit and (b) schematic of

5
 its physical layout.

Fig. 2.2. (a) Spin-relaxation diagram of a single qubit. The exponential decay of the j1i
density is the signature of decoherence (credit: IBM Q hub at NTU

Fig. 2.3. (a) Schematic view of a lateral QD device defined by metal surface electrodes on a
GaAs/AlGaAs 2DEG system. (b) Electrical network diagram of a single QD

. In two-dimensional electron gas (2DEG) sys- tems, the dot is defined by a

gate-depleted area (Fig. 4a) and is tunnel-coupled to the reservoir on each side,
as indicated by a schematic model shown in Fig. 4b. Thus, varying the voltages

6
 on the surface gates enables several important parameters, such as the number
of electrons and the tunnel barrier resistance, to be finely tuned. Qubits based
on semiconducting QDs have several forms but mainly utilize the spin
properties of electronic states con- fined in the dots. For example, spin-up and
spin- down states in a single QD, two-electron singlet and triplet states in a
double QD and spin-exchange interaction in a triple QD are all candidates for
use in quantum information processing.
2.3 Novel Materials for Qubits

Owing to weak spin-orbit and hyperfine interac- tions, graphene is

expected to be a robust material to preserve spin properties and therefore ideal
for making spin qubits. Attempts to confine and manip- ulate single charges in
graphene quantum dots (GQDs) have been widely studied since 2008,19 when a
series of GQDs fabricated on SiO2 substrate.

Fig. 2.4 . Novel candidate materials for QD qubits. (a) Single electron transport in GQDs on

7
 SiO2 substrate. (b) Gate-defined QDs in suspended bilayer grapheme
Chapter 3
QUBIT OPERATIONS AND CIRCUITRY
Universal quantum computations are realized by virtue of qubit operations
which are closely related to the quantum coherence. Scientists are trying to
fabricate new types of qubits for obtaining much longer coherence time, easier
controllability and connection, higher designability, and better scala- bility.
Taking superconducting qubits as an exam- ple,~ the coherence time has been
increased in the past decade from initial nanoseconds for a charge qubit75 to
around 100 ls for a transmon qubit76 inside a 3D cavity. Single qubit operations,
~ mented by resonant pulses applied through on-chip wires, have been
imple-
improved from several times to now 105 106 times within the coherence time, and
the fidelities of single- and two-qubit gates can reach 99.92% and 99.4%.77
Scientists are making efforts to further improve the coherence time such that it
can be much longer than a threshold time for certain classes of fault-tolerant
quantum error correction codes. However, solving the decoherence problem is
not an easy task. We know that low frequency noise (1/f) is a main intrinsic
limitation on the coherence of superconducting qubits, and mainly results from
the fluctuations of critical- current, charge, and flux, but the microscopic origin
and mechanism of these fluctuations are not well understood. High frequency
noise around the qubit frequency makes energy exchange between envi- ronment
and superconducting qubits, and mainly contributes to energy relaxations of the
qubit. It is believed that the coherence time can be extended by optimizing
designs of circuits, removing impurities and defects of materials, improving
fabricating technologies of devices, and developing new meth- ods for material
engineering on the microscopic scale. Eliminations of decoherence still remain
the biggest challenges in quantum circuits. The current designs of quchips
usually feature multiple qubits with different transition frequencies to avoid qubit
crosstalk. For superconducting quan- tum circuits, the qubits on circuits can be
coupled either directly by capacitance and inductance or indirectly by SQUIDs,
transmission line resonator (cavity), and other means.

The executions of quantum algorithms rely heav- ily on extracting characteristics

of each single-qubit and two-qubit operations. Given a quchip of N qubits, there
× þ ×
8
are at least pq q pc c parameters needed for the peripheral circuits to be
accurately calibrated for generating control and readout sig- nals. pq and pc are
numbers of parameters of a single-qubit and two-qubit operation, respectively,
and q is the number of qubits and c is the connectivity. There are hundreds of
parameters for near term quantum computers with about 100 qubits. This task is
not only laborious, but also mixed with trade-offs, consisting of circular
sequences of pulse-measure-analyze. In current practice, quantum computers are
calibrated fre- quently due to sensitivity to environmental changes.

9
 CHAPTER 4

QUCHIP SCALE-UP AND 3D INTEGRATION FOR QPU

With numbers of qubits growing from 10’s to 100’s and even up to millions,
problems that CPUs and GPUs have encountered in scale-up will also appear in
designs of quantum processing units (QPUs). A QPU consists of multiple
quchips, where each quchip is a monolithic substrate with qubit circuitry
patterned on one or both surfaces. Problems encoun- tered in designing a
quchip can be roughly catego- rized as (1) qubit accessibility and qubit-qubit
connectivity, and (2) control signals and noise management. A common
superconducting quchip usually consists of the following key elements: tunable
qubits, microwave cavities, DC bias lines and microwave buses. It is desired
that every qubit can be individually addressed and can be connected to or
isolated from any other qubit. With qubits and cavities getting gradually
crowded in a quchip, electromagnetic interferences between conducting
geometries have to be well managed to avoid crosstalk. A wide variety of noise
modes generated by quasiparticles from material defects are also a major
consideration for large quchip designs.
Recent progress in the area of cryogenic CMOS device physics and circuit
design have proposed to move analog signal processing functions from room
temperature to 4 K. This will benefit all physical qubits requiring cryogenic
temperature. The num- ber of waveguides attaching to a single quchip is getting
unmanageable as a bottleneck for scale-up and noise management. The ultimate
goal is to move all waveguides to room temperature. In Feb 2020, Intel and
QuTech announced the co-developed Horse Ridge, a chip fabricated with Intel’s
22nm FFL (FinFET Low power) CMOS process for qubit control.84 This chip is
composed mainly of a digital core, an SRAM, and an analog and RF circuit.
The RF line frequency is between 2 GHz and 20 GHz, while the mainstream
superconductor qubit fre- quency is between 4 to 7 GHz, which means that
Horse Ridge is suitable for beyond superconducting qubits and it should be a
universal cryogenic interface between qubits and data acquisition sys- tems.
The chip has a total of 4 RF channels and uses frequency division multiple

10
access (FDMA). Each channel can control 32 qubits and a total of 128 qubits.
The information that controls the RF wave- form is stored in SRAM, which can
be processed quickly with reference to a look up table. The device physics
model at 4 K is different from current mainstream CMOS physics and design.
However, Horse Ridge proves that the CMOS IC fabrication can be leveraged
in the QC domain. We foresee that complicated calibration procedures can be
stored in and carried out by a small to medium size memory and CPU. More
research resources will pour into this area, paralleled with 3D QPU integration.

Fig. 4.1. A conceptual 3D integration of QPU, (a) on the top, the input and output driving
circuitry, in the middle layer, microchip with qubits and transmission lines, and at the
bottom two layers, cavities and wirings

Geometric Considerations

A common transmon with a large shunt capacitor usually spans about 200 lm
in size. A k=4 cavity is usually scaled about 1cm in length. With this large
different in physical scale, a coplanar cavity is usually patterned as a highly
winding supercon- ducting metal line occupying an area with a rea- sonable
aspect ratio. Since a large percentage of quchip area is occupied by cavities, the
11
 ground plane is divided into complicate geometries, which can be a source of
noise. Air bridges over cavities are proposed to connect both sides of ground
planes to improve the distribution of current density.83,85 Air bridges also
facilitate two cavities crossing each other and provide a geometric flexibility for
quchip layout.85 One disadvantage of coplanar cavities is that more than 80% of
electrical field travels through the dissipative silicon substrate resulting in
energy loss. Comparing with cylindrical 3D cavities, the resonance lifetime is
about one magni- tude of order shorter. William O’Brien and the other co-
workers proposed a superconducting ground plane on top of quchip/cavity
plane with a gap of few microns. In this design, dissipation by the silicon is
reduced to less than 50%. 86 Teresa Brecht and the other co-workers proposed a
full supercon- ducting ground enclosure and suspended qubit/cav- ity substrates
with low dielectric constant so as to mimic 3D cavity designs (Fig. 11).87

4.1 Frequency Management

Executing a gate model algorithm involves a timely multiple stream of signals.
A common band of a few GHz is usually divided into many sub-bands with
enough side-band gaps for avoiding inferences among neighboring
qubits/cavities. Qubits and cav- ities are geometrically designed to operate in
differ- ent frequencies. A cavity is usually designed to properly detune with
coupled qubits for readout operations. Frequency assignments are driven by two
criteria: (1) Geometrically adjacent qubits/cav- ities should operate in different
frequencies to avoid crosstalk and unwanted excitations, and (2) Fre- quencies of
qubits coupling to the same cavity should operate within a tunable band so that
one qubit can be tuned to interact with another during two-qubit operations. In
some designs, cavities are made tunable, too, with a SQUID circuit for more
flexible bandwidth management. The FDMA scheme is employed to manage
simultaneous oper- ations of qubits attached to the same driving line. In order to
fully utilize limited quchip I/O points, several cavities may capacitively couple
with a microwave driving bus. Readout and control signals can address one or
more qubits with the FDMA scheme.
4.2 Control Sequence Management

During execution of a quantum algorithm, each operation requires a

varying time duration. Execu- tion following logical sequence defined by algo-

12
rithms can result in poor utilization of qubit resources. Many solutions have been
proposed to solve this problem with software approaches. Quan- tum computer
makers provide compilers that map logical sequences into packets of physical
signal sequences best suited for a given qubit topology. More sophisticated ones
perform certain optimiza- tions, such as maximizing fidelity according to a qubit
characteristics table, and inserting pulses for error correction. While FDMA
addresses the resource utilization in frequency space, concepts like time division
multiple access (TDMA) can be applied to improve hardware efficiency in the
time domain. Kangbo Li and co-workers proposed that a qubit operation can be
divided into a sequence of small pulses with precisely single flux quantum (SFQ)
h/2e.88 Since each SFQ pulse is about 2ps, there is ample time margin within 40
ps when using a central clock of 25 GHz (about 5 times of qubit frequency) to
adjust phase shifts and accommodate the different qubit frequencies. Further
claims have suggested that operations fidelities could also be improved by
intermixing correction signals into SFQ pulses. Combining with FDMA, the
quchip mimics wireless cellular phone networks, which optimize bandwidth and
time utilization for the best total throughput.
4.3 QPU-3D Integrations

For the past few years, several research groups have experimented with
multi-layer 3D integration. In addition to an obvious purpose of scaling up qubit
numbers, connection flexibility is also an important motivation. Many schemes
have been applied to stack multiple silicon substrates in the z direction and form a
3D circuitry. For example, supercon- ducting through silicon via (STSV)
connects circuits on both sides of a silicon substrate. A cavity can span across a
STSV and still maintain very high resonance quality.85 Large numbers of STSV’s
are used to connect ground plans on both sides. A silicon substrate with 200 lm
thickness has proved to be thick enough to provide a proper distance so that
crosstalk between circuits on top and bottom can be minimized. On the substrate
surface, holes of STSV are usually 10 lm to 20 lm in diameter, which are very
economical for area utilization.
Another stacking scheme is flip-binding two cir- cuitry planes face to face
~
with 1 lm gap. With precise alignment, one qubit on one plane can couple with a
cavity on the other. In order toensure gap uniformity across the two substrates,

13
one substrate is etched so that hard stop pillars are formed in multiple places.89
The results show comparable qubit lifetime and operation fidelity as those of 2D
circuitry. STSV and flip-chip binding enable multi-layer integration of QPU,
which increases qubit counts and flexibility of connections. Layers of switching
and routing circuitry for microwave signals can be 3D-integrated with qubit
layers, too. Control/readout signals and bias DC lines from QPU can be
connected to multi-layer PCB’s for on-board signal processing or transmitted to
external data collectors. There are proposals suggesting that some classical
functions, such as sequence timers be integrated inside QPU. More research is
needed for digital circuits working in qubit cryostats and thermal noise issues

superconductivity. The gate-tunable switching between TI and superconductivity

may allow exchange structures, like T-junctions, to be designed by gate in a
single flake to verify the non-Abelian exchange statistics of MFs.

In this review, we have focused on the current status and possible future
development of low- temperature qubit materials and cryogenic CMOS circuit
designs. This is a brief summary of the basic physics of quantum materials and
cryogenic cir- cuits. In addition to superconducting qubits and silicon QDs, other
possible two-dimensional and topological qubits were also introduced.
Moreover, the importance of developing cryogenic peripheral electronic devices
and understanding the solid-state physics of cryogenic CMOS circuits at deep
low temperatures were also described as important R&D directions for future
scale-up of quantum computers. Although QC is still in its early stages,
educational quantum instruments and NISQ devices have gradually started to
be promoted for different applications and can be purchased on the market.
Cryogenic qubits and cryogenic circuitry design will remain the main trends for
commercial quantum computers in the foreseeable future.

14
 Chapter 5
CONCLUSION

QC now is related not only to fundamental physics research but also to

engineering problems. Like IC designs, quchip designs will need tools as well.
We think that there will be computer aided design (CAD) tools specialized for
cryogenic circuits with design parameters very different from those of current IC
circuitry. With the great effort from interdisciplinary experts, scaling qubit
numbers and error reduction are both possibly following a similar Moore’s law
for the next decades. Besides, quantum internet represents another attempt to
increase scalability. It creates a QC cluster by linking multiple QPUs together. If
the QC cluster can be applied to distributed quantum computing, the entire
computation landscape will be signifi- cantly changed.

The ongoing superconducting qubits using Al or Nb materials is

promising. However, other gate- tunable nanostructuresand topological materi-
als with exotic surface states may play an important role in designing new type
of qubits. Although the same approach may be applied to semiconducting QDs,
the current challenges of semiconducting QDs lie in the small number of
entanglements, which is hindered by the fabrication difficulty (shorter gate
separation required) result- ing from the heavy effective mass of silicon. Other
quantum materials, such as graphene and TMDC, have attracted considerable
—
attention due to their distinct band structures, but more progress must be shown
to justify their advantages. Layered 2D TI system, such as monolayer 1T0 WTe2,
is a newly emergedmaterial with gate-tunable superconductivity. The gate-
tunable switching between TI and superconductivity may allow exchange
structures, like T-junctions, to be designed by gate in a single flake to verify the
non-Abelian exchange statistics of MFs.
In this review, we have focused on the current status and possible future
development of low- temperature qubit materials and cryogenic CMOS circuit
designs. This is a brief summary of the basic physics of quantum materials and
cryogenic cir- cuits. In addition to superconducting qubits and silicon QDs, other

15
possible two-dimensional and topological qubits were also introduced.
Moreover, the importance of developing cryogenic peripheral electronic devices
and understanding the solid-state physics of cryogenic CMOS circuits at deep
low temperatures were also described as important R&D directions for future
scale-up of quantum computers. Although QC is still in its early stages,
educational quantum instruments and NISQ devices have gradually started to
be promoted for different applications and can be purchased on the market.
Cryogenic qubits and cryogenic circuitry design will remain the main trends for
commercial quantum computers in the foreseeable future.

16
 CHAPTER 6

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