VLSI TECHNOLOGY

Refrences
1. Integerated Circuits - K.R Botkar 2. Basic VLSI Design Douglas Pucknell 3. VLSI Technology S M Sze

INTRODUCTION & HISTORY

19th Century - Solid-State Rectifiers 1907 - Application of Crystal Detector in Radio Sets 1947 - BJT Constructed by Bardeen and Brattain 1959 Integrated Circuit Constructed by Kilby

Integrated Circuits
An integrated circuit is a collection of discrete elements created by means of a single construction process in which all elements are formed. Components and wiring are all integrated parts of chip and cannot be separated from each other Helping keys to IC manufacturing are
1. 2. Planar transistor Batch Processing

 1958: First integrated circuit

Flip-flop using two transistors Built by Jack Kilby at Texas Instruments

2003
Intel Pentium 4 Qprocessor (55 million transistors) 512 Mbit DRAM (> 0.5 billion transistors)

53% compound annual growth rate over 45 years

No other technology has grown so fast so long

Driven by miniaturization of transistors

Smaller is cheaper, faster, lower in power consumption

 Moore s Law: Fit straight line on semilog scale

Transistor counts have doubled every 26 months
1,000,000,000

100,000,000 Pentium 4 Pentium III Pentium II Pentium Pro Pentium

10,000,000

Transistors

1,000,000 Intel386 100,000 8086 10,000 8008 4004 1,000 8080 80286

Intel486

1970

1975

1980

1985

1990

1995

2000

Year

Integration: Levels SSI: 10gates/ chip: Small signal integration MSI: 1000gates/ chip: Medium Signal Integration LSI: 10,000 gates/chip: Large Signal Integration VLSI: higher that 10K gates/ chips ULSI: higher that 1Million gates/ chips

Choice of scale of integration depends on 1)production volume & flexibilty 2) complexity of required ckt and 3) yield and cost for a particular scale of integeration

 In 1971, minimum dimensions of 10 um in 4004 In 2003, minimum dimensions of .18um in Pentium4. Scaling down forever ? (No, transistors cannot be less than atoms) Many predictions of fundamental limits to scaling have already proven wrong We believe that scaling will continue for at least another decade. What is the future?

 VLSI electronics, the most advanced state of SC electronics forms the basis of 2nd industrial revolution and is the key technology for information age - Microprocessor in 4th gr computers is using LSI/VLSI technology

Advantages of IC s over Discrete Components

Reduced size & weight Increased reliability Reduction in circuit cost Reduction in power consumption Improved speed Quick designing by use of MSI/LSI/VLSI packages IC s facilitates new product development

Si is a better semiconductor material than Ge bcoz

Si can withstand temp Ge can withstand only up to 150degree Celsius 100degree Celsius Ge oxide is unstable Grows a stable oxide 47OhmCm Intrinsic resistivity is high(230000 OhmCm) Electronic grade Si is cheaper than Ge

Classification of IC s
Based on fabrication
1. Monolithic IC:- IC s which are included entirely in a single chip of SemiConductor( usually Si)
 100 s of identical can be built simultaneously on a Si wafer using batch processing

2. Hybrid IC :- It may contain one or more monolithic ckts or individual transistors bonded to an insulating substrate with resistors, capacitors or other ckt elements with appropriate inter connections
 Hybrid ckts offer excellent isolation b/w components & allow the use of more precise resistors & capacitors  Less expensive to build in small numbers  Again classified in to Thick Film & Thin Film IC s

 Based on operation performed

1. Analog IC:- Perform analog or linear operation like amplification, integaeration etc. It deals with analog quqntities like pressure, temp etc 2. Digital IC:- Perform digital operations like AND, OR , NOT etc

Monolithic IC Process

MODULE1

Semiconductor Manufacturing Processes

Wafer Preparation Design

Design Wafer Preparation Front-end Processes Photolithography Etch Cleaning Thin Films Ion Implantation Planarization Test and Assembly

Thin Films

Front-End Processes

Photolithography

Ion Implanta tion Cleaning

Etch

Planarizatio n Test & Assem bly

Sorenson

14

Design
Wafer Preparation Design

Establish Design Rules Circuit Element Design Interconnect Routing Device Simulation Pattern Preparation

Thin Films

Front-End Processes

Photolithography

Ion Implantation

Etch

Cleaning

Planarization

Test & Assembly

Sorenson

15

Logic Circuit Design / Layout Design

A logic circuit diagram is drawn to determine the electronic circuit required for the requested function. Once the logic circuit diagram is complete, simulations are performed multiple times to test the circuits operation.

Wafer Preparation
Wafer Preparation Design

Polysilicon Refining Crystal Pulling & Crystal structure Wafer Slicing & Polishing Epitaxial Silicon Deposition

Thin Films

Front-End Processes

Photolithography

Ion Implantation

Etch

Cleaning

Planarization

Test & Assembly

Sorenson

17

IC device

drain

Polysilicon Refining:EGS Production

Chemical Reactions MGS Production: SiO2 + SiC p Si + SiO + CO Trichlorosilane production & Purification: Si + 3 HCl p HSiCl3 + H2 CVD: 2HSiCl3 + 2H2 p 2Si + 6HCl

Reactants H2 Silicon Intermediates H2SiCl2 HSiCl3

Polysilicon Refining

Sorenson

23

Czochralski Growth Process

Czochralski Process is a Technique in Making SingleCrystal Silicon A Solid Seed Crystal is Rotated and Slowly Extracted from a Pool of Molten Si Requires Careful Control to Give Crystals Desired Purity and Dimensions

Parts Of Apparatus
a) Furnace: Crucible, Susceptor or supporter, rotation mechanism, heating element , power supply & control s/m b) Crystal pulling mechanism: seed shaft or chain, rotation mechanism & seed chuck c) Ambient control: Gas source, flow control, purge tube &exhaust or vaccum mechanism d) Control system: microprocessor, sensors & outputs

CYLINDER OF MONOCRYSTALLINE
The Silicon Cylinder is Known as an Ingot Obtained Single crystal Si is of 99.99999999% purity Typical Ingot is About 1 or 2 Meters in Length Can be Sliced into Hundreds of Smaller Circular Pieces Called Wafers Each Wafer Yields Hundreds or Thousands of Integrated Circuits

Comparisaon

Wafer Shaping, Slicing & polishing

Wafer Shaping

Wafer Slicing & polishing

The Silicon Crystal is Sliced by Using a DiamondTipped Saw into Thin Wafers Sorted by Thickness Damaged Wafers Removed During Lapping Etch Wafers in Chemical to Remove any Remaining Crystal Damage Polishing Smoothes Uneven Surface Left by Sawing Process

Wafer Lapping

Wafer Shaping, Slicing & polishing

Diffusion of Dopant Impurities

Diffusion - Mass transport by atomic motion Mechanisms Gases & Liquids random (Brownian) motion Solids vacancy diffusion or interstitial diffusion In Semiconductors diffusion means the process of Junction formation There are different methods for junction formation. But selective diffusion is an important technique in its controllability, accuracy & versatility Impurity atoms are introduced on to the surface of Si wafer and diffuse in to the lattice bcoz of their tendency to move from regions of high concentration to low concentration

Diffusion is a result of random motion and particles diffuse in the direction of decreasing concentration gradient

Simple Diffusion
Glass tube filled with water. At time t = 0, add some drops of ink to one end of the tube. Measure the diffusion distance, x, over some time. Compare the results with theory. to t1 t2 t3 xo x1 x2 x3 time (s) x (mm)

Diffusion Mechanisms 1. Substitutional Diffusion 2. Interstitial Diffusion

Substitution-diffusion
Vacancy Diffusion:
applies to substitutional impurities like boron. Phosphorus and arsenic dopant atoms exchange with vacancies left by parent atom rate depends on (1) number of vacancies; (2) activation energy to exchange.

increasing elapsed time

Interstitial diffusion
smaller atoms diffuse between atoms( interstitial voids) eg: gold, copper, nickel etc

More rapid than substitutional diffusion and not stable. Usefull in fabrication of digital ICs

Fick s Laws Governing Diffusion Process

1. 2. 3. 4. 5. 6. Diffusion rate of impurities in to the SC depends on following Mechanism of diffusion Temperature Properties of lattice environment Physical properties of impurity Concentration gradient of impurities and The geometry of the parent SC

Diffusion Profiles
Depending on boundary conditions, Fick s 2nd law has two type of solutions. These solutions represent two types of impurity distribution profiles. 1. Constant source diffusion following complementary error function( erfc) 2. Limited source diffusion following Gaussian distribution function

Constant Source(erfc) Diffusion

Impurity concentration at the surface is maintained constant throughout the diffusion cycle i.e N(0, t) = constant = Ns The boundary conditions are N(0, t) = constant = Ns and N(x, t) = 0 initialy When Ficks 2nd law is solved using above boundary condittions we get a solution which folows a complementary error function distribution Commonly used for isolation and emitter diffusion bcoz it maintains a higher surface concentration

Limited Source ( Gaussian) Diffusion

A pre determined amount of impurity is introduced in to the crystal unlike the constant source diffusion Diffusion takes place in two steps 1. Predeposition Step: fixed no:of impurity atoms are deposited on Si wafer during a short time 2. Drive in Step: Impurity source is turned off and impurities deposited already are allowed to diffuse

 When Ficks 2nd law is solved with boundary conditions we get

which is a Gaussian distribution Used when moderately high sheet resistivity is require multiple diffusions are needed Transistor bases are made

Parameters Affecting Diffusion Profile

Solid solubility Diffusion temperature Diffusion time Surface cleanliness and defects in Si crystal pn junction formed using erfc diffusion is modeled as a Step junction and Gaussian diffusion as a linear graded junction

Ion Implanatation System

Properties of Ion Implantation

The depth of penetration of any particular type of ion will increase with increasing accelerating voltage The accelerating voltage may be from 20 kV to 250kV The penetration depth will generally be in the range of 0.1 to 1.0micrometre

Annealing
It is done after ion implantation Annealing is performed to restore the surface region of Si which is heavily damaged due to the ion implantation process back to a well ordered crystalline state To allow the implanted ions in interstitial sites to go in to the substitutional sites in the crystal structure Annealing involve heating of the wafers to a temp range of 600 to 1000degreeCelsius for around 30 minutes

Advantages

- At

low temp also implantation can be done without disturbing previously diffused regions

Thermal Oxidation

Oxidation of Silicon

The role of SiO2 in IC fabrication is as follows It acts as a diffusion mask permitting selective diffusion in to the wafer It protects the junction from moisture and other atmospheric contaminants It serves as an insulator on the wafer surface SiO2 acts as the active gate electrode in MOS structure To isolate one device from another It provides electrical isolation of multilevel metallization used in VLSI
Sacrificial layers are grown and removed to clean up surfaces

The simplest method of producing an oxide layer consists of heating a silicon wafer in an oxidizing atmosphere.

 The thickness of oxide layer depends on temp of the furnace, length of time wafer are in the furnace and flow rate of oxygen Rate of oxidation can be significantly increased by adding water vapour to the oxygen supply to the oxidizing furnace Layer thickness in the range 0.1 to 5microMeter are commonly produced at temp s b/w 1000 & 1200degreeCelsius

 Dry oxide - Pure dry oxygen is employed

Disadvantage - Dry oxide grows very slowly - oxide thickness is small Advantage - Oxide layers are very uniform. - Relatively few defects exist at the oxidesilicon interface (These defects interfere with the proper operation of semiconductor devices) - dielectric strength is high and thus make ideal dielectrics for MOS transistors.

 Wet oxide - In the same way as dry oxides,

but steam is injected Disadvantage - Hydrogen atoms liberated by the decomposition of the water molecules produce imperfections that may degrade the oxide quality. Advantage - Wet oxide grows fast.( four times faster than dry oxide) - Useful to grow a thick layer of field oxide

Key Variables in Oxidation

Temperature
- reaction rate - solid state diffusion

Oxidizing species
- wet oxidation is much faster than dry oxidation

Surface cleanliness
- metallic contamination can catalyze reaction - quality of oxide grown (interface states)