LINEAR INTEGRATED CIRCUITS

1ER
ODERATIONAL AMpLIPIGR
A

ChapterOutline

Introduction
2.0
Basic Difference Amplifier
2.1
Implementing Differential Amplifier with Discrete Component
Reasons for Not
2.2
Characteristics of Operational Amplifier
Basic Concepts and
2.3
Operational Amplifier Parameters
2.4

2.5 IC 741 Operational Amplifier

2.6 Power Supply Requirements for Up-Amp

Inverting Amplifier LIBRARY
2.7
Ground
2.8 Concept of Virtual

2.9 Non Inverting Amplifer

2.10 Summer Amplifier (Summer)

2.11 OP-Amp Integrator

OP-AMP Differentiator
2.12
2.13 OP-Amp Inverter

2.14 OP-Amp Multiplier

2.15 Op-Amp Buffer

2.16 Single Supply Operational Amplifiers

 2.2 LINEAR INTEGRATED CIRCUITs
2.0 INTRODUCTION
The term 'operational amplifier' originated in 1947. The early work with
operational amplifiets 1Op-Amps) concerned on their use in analog simulations
and in the solution of integro-differential equations. Op-Amp is basically a
differential amplifier whose basic function is to amplify the difference between
two input signals. Therefore it is also called as 'difference amplifiers Operational
for insertion into other
amplifier is a high quality amplifier assembly designed
in such a way that its
equipment. In lC technology the Op-Amp is designed
characteristics meet the requirements of many equipments. In the of this chapter

we focus our attention towards operational amplifiers.

2.1 BASIC DIFFERENCE AMPLIFIER

A difference amplifier has following unique properties.

(i) Excellent stability

(ii) High versatile

(ii) Highly immune to interference signals

differential amplifier shown in Fig. 2.1 the two transistors
Consider the diagram of simple
resistors form a bridge.
with their respective collector
characteristics a r e identical, the bridge balances. Thus
the
lf the transistor and resistor
terminals is zero. If we now apply a differential mode input Vd
voltage across the output
out of phase to the inputs of a differential amplifier
so
(A signal applied 180 degrees
is driven to higher condition while the other is
that one transistor of the differential pair
the input voltage applied to the two
driven toward cut-off) and if Ri1. equals R:2.
but opposite in phase. Therefore, if the collector
transistors, will be equal in amplitude
increases, the collector current of Q2 will decrease by the same
amount
current of Qi
and the collector voltage of Q1 will decrease while that of Q2 increases. This results in
terminals that is proportional to the gain of
a difference voltage between the two output
the transistors.

On the other hand, if a common mode input signal Ve (A signal applied in phase to the
inputs
p
of a differential amplifier so that the collector current of the two transistors of
differential amplifier are inphase) is applied the input signals to each transistor will be
equal not only in amplitier but also in phase. As a result, the change in current flow
through both transistors will be identical, the bridge will remain balanced and the voltage
hetween the output terminals will remain zero. Thus, the circuit provides high gain for

diíferential mode signals and no

output at all for common mode signals.
c H A P T E R - 2 | O p e r a t i o n a l Amplifier

Ro 0/P

Pi
Va

RE

FIG 2.1:A Basic Differential Amplifier Circuit

whether difterental or common mode, each transistor has a certain amount
For any signal
of gain. If a common mode signal through the transistor to rise. the
causes the current
voltage drop across the common-emitter resistor also rises. This represents degeneration
For differential mode signals, the emitter resistance is ineffective because the curent through

one transistor rises while that through the other transistor drops by an equal amount. Thus
occurs. The
the current through the emitter resistor remains constant and degeneration
conditions. is unafected
gain for the differential mode signal, therefore assuming match
where as that for the common mode signal in substantially reduced.

The common mode rejection ratio (CMRR) is a ratio of differential mode gain Ap to
the common mode gain Aç. It shows the ability of differential amplifier to discriminate
mode external interfering signal. It is desirable to make this
against common or

factor as high as possible to reduce the effect of external interfering signals. Higher
the emitter resistance the higher the CMRR.
2.2 REASoNS FOR NOT IMPLEMENTING DIFFERENTIAL AMPLIFIER WITH
DISCRETE COMPONENT
Differential amplifier in its discrete component form is not popular due to tollowing
reasons.
1Component with convantional a.c. amplifiercircuit, it is not chifticuit to design because
t
requires directly matched compontnes.
Z. It utilizes a larger number of components.
Tequires a relatively high ratio of active to passive elements. This is a particular
traditionely.
ddvantages with discrete component circuit where active components.
nave been several times more expensive than passive devices.
 2.4
2.3 BASIC CONCEPTS AND LINEAR INTEGRATED CIRCe
The ideal
operational CHARACTERISTICS OF
amplifier is shown in Fig. 2.2 OPERATIONAL
(b). A signal
appearing (a) its AMPLIFIER
the positive at the equivalent
negative terminal vj is inverted at circuit in Fig
terminal v2 the
terminal is called the appears at the output with no change in output, a sig
terminal". In "inverting terminal" and the sign. Hence the
negE
general, output voltage v, is
the positive terminal the
the input
voltages i.e, proportional to directly proportional to the"non-inue
A; is the
voltage gain of va =(vj v2). The constant of -
differene-
the
amplifier. proportionalt

VI

Vo
V2 -AVd
12
Va-Vi-V2
(a) Symbol
(b) Equivalent Circuit
FIG 2.2 : Ideal Op-Amp
.3.1 IDEAL OP-AMP CHARACTERISTICS
The ideal OP-amp has the following characteristics
1. Infinite gain A = 0
2. = l2 = 0 of infinite impedance Z, =

3. Zero output impedance Z = 0

4. Zero output voltage for va = 0 i.e., zero offset

5. Infinite Bandwidth BW =
6. Infinite common mode rejection ratio CMRR =
From the above, it is clear that slightest voltage at the input will cause it to an i
into
saturation at the output.
Hence it is necessary to apply feedback to obtai finite
voltage gain.
PRACTICAL OP-AMP CHARACTERISTICS
.2 amplifiers have
the following values for their
their characteristi«
Practically operational stics.
hundred mega ohms
Several
1. Input impedance Z, =

102
lew ohms Typically
impedance 2,
=

2
2. Output
million (10°)
1
Gain Greater than
3.
3
Greater
than 120
dB
=
CMRR
4
4.
 CHAPTER-2 perational dmpliher 2. 5
JITS OPERATIONAL MPLIFIER PARAMETERS

2.4 become an universal building block for circuit and sus

has
2.2 OP.Amp
widely accepted design terms have eyolved
al at Therefore a number
o Some of
design. comparatit
merits of various Op Amp circuits

ative hich describe th

the
below
d e f i n e d

ting these
are

the currents into the input terrninals with

e of
Current (io): The ditterence of
.
Offset
we suppiy equal
d.c. currents to the two inputs of an OP.

output at zero
volts.
i 0. Because of lack of perfect syrnrnetry in the
Vo
=

we should have
Anthen ideally
p-Amp, such
Op. a case is not obtained. To estabish V, -0
stage of
an
differential
o The input offset current
input
the input current different by an a n o u n t

need to
make
measured under the condition
that u -

0
we 20 to 60 nA and is
nically lies
in the range
must be applied a c r o s s
the input
(Vio): input voltage which
The
Offset Voltage that if equal voltages a r e
fnt
z e r o output voltage.
It is found similarly
obtain
torminals to an input offset voitage Vg
V 0 . To set V, =O requires
inputs,
applied to amplifier of l to 4 mV when the input
voltages a r e z e r o
lies in the range
which typically
that c a n be simultaneously
M a x i m u m range ofinput voltage
Mode Range:
3. Common o r s a t u r a t i o n of amplifier
stages. This
without causing cutoff
applied to both inputs to the input without causing
abnormal
which c a n be applied
is the maximum
voltage third or one-half the
restricted to one

or damage to the OP-Amp. It is

operation
supply voltage.
voltage of supply
Ratio : Input offset voltage change
per
4 Supply Voltage Rejection will produce a change J V,
in the

A change in supply voltage AVcc

voltage change. is normaliy specified
rejection ratio AV,/Vcc
amplifier output. The power supply voltage in the
difference voltage input Vd 0. Typically this ratio is =

for the connection that the

range 10- to 7 x 10-5.
whtch can be
output voltage
. Output Voltage Swing: The maximum peak-to-peak
is zero. Output voltage swing
ODlained without waveform clipping when the d.c. output
of the to 80 percent
from about 50
s Tunction of the supply voltage and may range
Supply voltage. This parameter is useful in switching applications.

of the currents flowing into the two input terminais

nput Bias Current: The average
current flowing into each ol
n the output of zero volt. The input bias current is the
C Two input terminals when they are biased to the same voltage levels.

ower Bandwidth : Maximum frequency over which the full output voitage swing3
can be obtained.
 2.6 INEAR INTEGRATED CIRCUTS
8. Unity Gain Bandwidth : Small signal 3 dB bandwidth. with
operation. unity gain closed looop
9. Slew Rate : It is maximum rate of change of
output voltage,
step input. Iti 1or a
normally measured with unity gain at the zero
is determined crossing point of the output
waveform.
by the capacitance in the amplifier which must be
maximum current available to
charged and the
charge them. The slew rate is measured as d Vo/dt under
the condition that the
input is very fast step of amplitude vhich is very much
than the
amplifier can larger
handle linearly and which carries the amjplifier output from
one
limiting output to the other. Amplifiers are available with slew rate in the range of
50|
mV us 0.50 V/ us and beyond. One
to
important use of the slew rate is that it permits
us to
determine the extent to which the linear
range of operation ot an Op-Amp is
aftected by the speed of the
input signal. The other use of slew rate is
important in
switching applications.
10. Overload Recovery
Time : It is time required for the output stage to return to
active
region when driven into hard saturation. The recovery time depends some what upon
the degree of over load and the feedback
impedance.
11. Common Mode Rejection Ratio (CMMR) YIt is ratio of differential open loop gain to
common mode open loop gain. The CMRR serves as a figure of merit of an Op-Amp.
It measures the closeness of approach to balance in differential amplifier A high CMRR
is desirable. For commercial Op-Amps the CMRR lies in the range 60 to 100 dB.

2.5 IC 7410PERATIONAL AMPLIFIER

Fig. 2.3 shows the block diagram of basic OP-Amp circuit. The first stage of an
Op-Amp is a differential amplifier, that provides most of the circuit gain. It is desirable
to have high gain in this stage so that any short coming in following stages have litle
effect on the output. The 2nd stage i.e., intermediate stage provides some additional
single ended output is used for the second stage. It follows that a
gain. Normally, a

at its output. In a direct coupled system, this d.c. level is

d.c. voltage is present
propagated through the amplifier
chain so that amplitier output voltage would a dc

to a desired a.c. Output signal. Theretore some means of level

component in addition
and linal stage. By eliminatina tho d
between the second
translation is employed
will vary about a zero reference losuel .
the output voltage
level at the final stage, l o a d and also increasina tho
Current in tne
undesired d.c.
preventing any
output voitage swing.

Leve! OP
Differential ntermediatd
O/P
Shifting Stage
Inpui Stage
IP-
S1age
Biock Diagram of
Op-Armp
FIG 2.3:
C H a P T E R 2 ]p e r u t i o n a l t m

lifier
p i n

diagram
of C 741.
af IC
of 741 The imporant ratings of lC 741 15
given beiow
diagram
pin
s h o w s

18 V (max)
Fig
F ia
2.3

S u p p l y
voltage (V)t
1 5 V
15 (max)
V (mar
voltage =t
Input
dissipation
500 mu (max)
00 mw (max)
Power (max)
3
s i g n a l voltage
gain =2,00,000
Large

.
of
of
some
s o m e
parameters
at ambient
temperature 25°Cand V, 15
v a l u
s
e s

Typical
offset
voltage 2 mVv
Input

offset
current
20 nA
Input
current
= 80 nA
Bias
Input
r e s i s t a n c e =
2 Mo
Input
ratio 90 dB tor source resistance< 10 ko
mode rejection
Cammon
10 ko
voltage swing
=
t l4 V for load resistae>
Output

Output
resistance
= 75 n

consumption
=
50 mw
Power

current
= 1.7 mA
Supply

Slew rate (for

RL22 k2) =0.5 V/usec
Offset null
V O/P
N.C 6 5 1. Offset null 2 Inverting input
7
3. Non inverting input V
741 5. Offset null Output
Not connected
7 V

2 3
Offset Inverting Non
null /P Inverting 1/P

FIG 2.4: Pin Diagram of IC 741

2.6 POWERSUPPLY REQUIREMENTS FOR UP-AMP.

The two power supplles
need both positive and negative power supply.
pAmps
u r e d for op-amp are usually equal in magnitude +15V and - 15v. Ihese power
2.5 Shows
VOtages must be in magnitude to a common point or ground. Fig.
/
connection for the IC741 op-amp. Thus for the 741 op-amp pin 15 a
pply
POSnve
supply pin and pin 4 is a negative suppiy pin.
c u A P T E R . 2 ]p e r a i o n a t A m o i ier

m
muus
stt be zero.
er
Moreover, since the input 2.
input
terminals
lerminals

current to the.
the amplifier is zero
impedance i tte
the t h e input
between nfinite,
CH amplilieris inlir

Rr
www
Rs
ww

R,
w

Vin Va -Av

(b) Equivaient Circuit

(a) Circuit

FIG 2.7 Inverting Amplifier

conditions,
the voltage
ideal
Under
zero. It implies that
equal to V
va
difference
potential a s terminal
has s a m e
terminal 1 grounded hence
terminal 2 is
2. Since ground. Thus
also virtually
terminal 1 is
there is a virtual ground Input waveform
that
we can say
terminal. Thus, the current I
atnegative also tlows through
Ks.
flowing through
we can
write
R So,
I R

Vo
R Output waveform

VaR
Au Vin R FIG2.8
The output is
Here A, is referred to as the closed loop gain of the inverting amplifier.
out of phase with input.
2.8 CONCEPTOF VIRTUAL GROUND
node of circuit that is maintained at a steady
Iectronics, a virtual ground is a a
In some
e Ppotential, without being connected directly to the reference potential. and the
the earth
n e reference potential is considered to be that of the surface of
Cnce is called "ground" or "earth" as a consequence.
The and othercircuits
ground aids circuit analysis in operational amplifier
and
ind
provides usefulconcept
practical circuit effects that would be difficult to achieve in other
ways.
 2.8 LINEAR INTEGRATED CIRCUITS
Instead of using two separate
supplies, we can use a single power
supply to obtain +Vcc and -VEE power Invertin

shown in Fig. 2.6. In Fig. 2.6

as input

(a) two
Output
capacitors provide for decoupling of the IC741

power supply, the value

of C is from 0.01
uF to 10 uF. In Fig. 2.6 (b) Zener diode Non-Inverting 3

are used to obtain input

symmetrical suply|
voltages. The value of Rs should be
chosen such that it supplies sufficient
FIG 2.5: Op-Amp Power Supply Connections
current for the diodes to operate in the
avalanche mode. The potentiometer is used in Fig. 2.6 (c) to assume equality between
+Vcc and-VEE values. Diodes D1 and D2 are intended to protect the IC if the positive
and negative leads of the supply voltage Vs are accidentally reversed.

Rs
w
+Vcc (+Vzi)
R

Vs Vs
R C

-VEE (-Vz2)
(a) (b)
D

+Vcc

D2

(c)
FIG 2.6: Different Arangements for Obtaining Positive and Negative Supply Voltages for an Op-Amp
2.7 INVERTINGAMPLIFIER
The circuit diagram of an inverting amplifier using op-amp is shown in Fig. 2.7 (a) and

the equivalent circuit in Fig. 2.7 (6). The inverting operation performed by the circuir
determined by the feedback resistor R and the input resistance Rs Consider theop

as an ideal, so that it will have infinite gain. With this, the potential difference
amp
CHAPTER:2|(erational Amp
l ilf i e r

2.10 SUMMER AMPLIFIFA

M M E R
MPLIFIER (SUM
A M P L I
2.
or the output voltage is
summing
amplifie

mnlifier is
ampli the
prportional
sarne as the
algebraic surm of input
the

The
summing
inverting arnpitier zxepr that t
voltages
In T h put
es.
input
terminals. The
t e r m i n a l s
t
diagrarn of
surnrning armpifer sirg em
has several several

has
2.11
Fig.
in
s h o w n

here
forces ground to exist at the inverting input to the deal
feedback.
more,
the input the ideal
current to
amplifier is zero Thus he
The Further
node at the inverting termina
for the
amplifier
tion

V R V2 -0
R1 R2 R R
therefore, result as V mm
The output voltage

VoR *R
ti
the output oltage is equal to

Thus
weighte
sum of the input
negative

voltages.
FIG2.11 Summing Amplifer
OP-AMP INTEGRATOR
2.11
T circuit diagram of integrator using operational ampiier is shown in Fig 2.12 This
circuit is same as inverting amplifi except that the capacitor C is piaced in the place of
foedback resistor. The input current to the ideal ampliier is zero. The ieedback through

the capacitor C forces a virtual ground to exist at the inverting input terminal. Thus the
voltage across C is simply the output voltage. This voltage can be expressed as

Vo c-V -

V, (0)
R
Because of the virtual ground at inverting
terminal

thus
Vo
RC d t - (0)
V,
FIG 2.12: Integrator
e
àmplifier therefore, provides an which
of the output signal is proportional to tne ntegrei
input voltage.
 2.10 LINEAR INTEGRATED CIRCUITS
An achieve virtual ground circuit is some times called a rail splitter. Such a cires
cuit
an op-amp or some other circuit element that has gain. Since an operational an used
has very high open loop gain. the potential difterent between
ational amplifie
its inputs tend to
tend to zero
with a feedback network is implemented.
2.9 NON INVERTING AMPLIFIER
The circuit diagram of a non-inverting amplifier using operational amplifier ic at
shown
in Fig. 2.9 (a) and equivalent circuit in Fig. 2.9 (b). In this case the input signal
applied directly to the non-inverting input terminal ot the amplifier. Feedback r
gnal
is connected to inverting terminal. esistor
R
ww
-AV
R
ww
ww-
R

(a) Circuit (b) Equivalent Circuit

FIG 2.9: Non-Inverting Amplifier

Under ideal conditions Vd 0 .
Therefore v from the negative terminal
to ground is equal to the input voltage
inNote that V1 is not equal to zero in
casa. meaning that the non-inverting
circuit has no virtual ground at either InputWaveform
one ofits input terminals. Since
V . we obtain.

V R- R,

Trus Output eveform

FIG2.10:
n this case the ourput is in same phase with input.
 TLUNEAR INTEGRATED CIRCUIT
2. 12
2.12 OP AMP DIFFERENTIATOR
operational amplitier is shown in Fig. 2
.13 1
ne circuit diagram of differentiator using
the integrator a r e interchanged. Beca ause
in this circuit the capacitor C and resistor R of n Fig. 2.13 gives
current Ij
terminal. the
of the virtual ground at the inverting

dt
The output voltage i.e.. voltage across
resistor R can be expressed as

Vo Rl
By substituting the value ofl1

We obtain V o -RC dt
an
circuit provides
Thus. the above
to
which is proportional
output signal FIG 2.13: Differentiator
the input voltage.
the derivative of
2.13 OP-AMP INVERTER sign changer. This
is the circuit of
of inverter o r
the circuit diagram
Fig. 2.14 shows
of inverting amplifier.
inverting amplifier. The output R

Vo
Rs
Source resistance and
Where Rs =
www

Feedback resistance R
R =

Rs R s R as shown
in Fig. 2. 14 o

Vm R
Vo Vin FIG 2.14: Inverter
2.14 OP-AMP MULTIPLIER
The multiplier circuit using an operational
amplifier is shown in Fig. 2. 15. This is an
nR
inverting amplifier. Here feedback resistor w.

value R = nR1. From the analysis of inverting

R
amplifier the output voltage is given as w

Vo = - -nR
V
B in

Vo =-n Vin
Thus the output voltage is n times that of
input. The sign can be changed by using
another op-amp sign changer in cascade. FIG2.15: Multiplier
ICHAPTER-2| Operational Ampltfie

OP-AMP BUFFER 2. 13
2.15

16 shows circuit diagrarn of

op-arnp buffer this is the circiuit
Fig. of non
amplifier,
the outputof the amplifier. irverting

FIG 2.16:Buffer

sINGLE SUPPLY OPERATIONAL AMPLIFIERS

2.16
n of op-amps requires only à positive supply For example IC LM324 requires
ositive supply. When en single supply is used, it is
oniy
Do

the 1C.
normally necessary to connect an
circuit to
extra

IM 324 : LM 324 is
quad op-amp integrated circuit with
a
high stability. bandwidth
hich was designed to
operate irom à Single power supply over a wide
range of voltages
it is a 14 pin dual in line package as shown in Fig. 2.17

O u t p u t4 Input I n p u t4
Input 5 Input 3
Output

GND
14 13 12 10

Vcc
Output1| Input
Input 2 nput2
Input ,Output

FIG 2.17 : Pin Diagram of LM 324

 T LINEAR INTEGRATED CIRCUIT
2.14
Features
unity gan
Internally frequency compensated for

Large DC voltage gain 100 dB.

Wide bandwidth 1 MHz

3V to 32 V
Wide power supply range: single supply
voltage.
Essentially independent of supply voltage.
to the power supply
range equal
Ditferential input voltage
OV t1.5 V.
to
Large output voltage swing
CA 3011: CA 3011 is wide band amplifier. The leatures are exceptional high amplifior
ting
lifier
characteristics limit
Excellent input limiting
is 75 dB.
gain at 4.5 MHz
gain, power
wide frequency
at 10.7
MHz is 600 uV
voltage (knee)
Vcc

10
NC
Input

8)Ground
DC in ref

CA 3011

DCFB(3)
bypass

6 NC
Ref bias

Output

Bandwidth is 100 KHz to 20 MHz

FIG 2.18 Capability
 Amplifier

1.15
0prutinnal

TER.2
cHAP SUMMARY
Differential. Amplifier It serves to arnplify the difference between two signals.

Rejection Ratio (CMRR)

Made
C o m m o n Mode
: It is the ratio of
magnitudes of difference
to common ode gain
de gain

CMRR p=lx
Ac
ional Ampi
Operational Amplifier : An op-amp is basically a direct coupled high gain amplifier

feedback to control its overall response characteristics.

with
r t i n g Amplitier : Ihis is the amplitier, whose output is out of phase with input

R
Av
Gain R
Non-:Inverting Amplifier : This is the amplifier, whose output is in same phase with

input

Ay 1+
Gain R,
REVIEW QUESTIONSS
Short Answer Questions

1Mention the important applications of an operation amplifier (Oct Nov. 2012)

functions of an OP-AMP (March April. 2007)
2. State the
3. List the ldeal characteristics of ldeal operational Amplifier.

3. List the practical OP-AMP characteristics

4. Define the terms

(i) Open Loop (March April. 2016)

(ii) Slew rate, CMRR (March April. 2016)
(ii) Input impedance (Z,) (March April. 2016)
5 Define the terms
(i) CMRR
(ii) Input offset voltage (March April. 2016)
(ii) Input offset current
 2. 16 uNEAR INTEGRATED CIRCUITs |
6. Explain the working of OP-AMP summing amplifier.
7. Show that OP-AMP is works as inverter.
8. Show that OP-AMP is work as buffer.

9 Write the features of IC LM324 along with pin dagram.

10. Write the features of IC CA3011 along with pin diagram.

11. Draw the PIN configuration of IC 74 (March/April. 2016)

(March/April. 2016)
12. Draw the PIN out diagram of IC 741.

Essay Type Questions

1. Explain the OP-AMP parameters.
its working with circuit diagram.
What is differential amplifier.
Explain
2.
(Oct/Nov. 2013)
differential amplifier circuit. (Oct/Nou. 2012)
3. Draw and explain the

circuit of operational amplifier and explain.

4. Draw the equivalent
each block. (Oct/Nov. 2012)
5. Draw the block diagram of IC 741 and explain

OP-AMP works as a inverting amplifier.

6. Explain how an

amplifier and derive the equation

7. Draw and explain the circuit of OP-AMP non-inverting (March/April. 2016)
for its voltage gain.
differentiator.
8. Explain how OP-AMP work as integrator and

9. Draw the circuit using operational amplifier

2010)
(April/May. 2011, Oct/Nou. 2011,
(March/April. 2016)
(i) Summer.

(ii) Integrator.
(March/April. 2016)
(iii) Differentiator.

(iv) Inverter.

the of operational amplifier as

10 Explain use
Mar/Apr. 2007
[Oct/Nov. 2014, 2013, 2011, 2010,

(ii) Buffer
(1) Inverter