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Power MOSFET

FEATURES
PRODUCT SUMMARY
• Low Gate Charge Qg Results in Simple Drive
VDS (V) 650
Requirement Available

RDS(on) (Ω) VGS = 10 V 1.8

• Improved Gate, Avalanche and Dynamic dV/dt RoHS*
COMPLIANT
Qg (Max.) (nC) 48 Ruggedness
Qgs (nC) 12 • Fully Characterized Capacitance and Avalanche Voltage
Qgd (nC) 19 and Current
Configuration Single • Compliant to RoHS directive 2002/95/EC

D
TO-252

G D S S

Top View N-Channel MOSFET

ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 650
V
Gate-Source Voltage VGS ± 30
Continuous Drain Currente TC = 25 °C 4.5
VGS at 10 V ID
Continuous Drain Current TC = 100 °C 4.2 A
Pulsed Drain Currenta IDM 18
Linear Derating Factor 0.48 W/°C
Single Pulse Avalanche Energyb EAS 325 mJ
Repetitive Avalanche Currenta IAR 4 A
Repetitive Avalanche Energya EAR 6 mJ
Maximum Power Dissipation TC = 25 °C PD 60 W
Peak Diode Recovery dV/dtc dV/dt 2.8 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150
°C
Soldering Recommendations (Peak Temperature)d for 10 s 300
10 lbf · in
Mounting Torque 6-32 or M3 screw
1.1 N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 24 mH, RG = 25 Ω, IAS = 3.2 A (see fig. 12).
c. ISD ≤ 3.2 A, dI/dt ≤ 90 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. Drain current limited by maximum junction temperature.

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - 65
°C/W
Maximum Junction-to-Case (Drain) RthJC - 2.1

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 650 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mAd - 670 - mV/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 2.5 - 5.0 V
Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA
VDS = 650 V, VGS = 0 V - - 25
Zero Gate Voltage Drain Current IDSS µA
VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 250
Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 3.1 Ab - - 2.1 Ω
Forward Transconductance gfs VDS = 50 V, ID = 3.1 A 3.9 - - S
Dynamic
Input Capacitance Ciss - 1417 -
VGS = 0 V,
Output Capacitance Coss VDS = 25 V, - 177 -
f = 1.0 MHz, see fig. 5
Reverse Transfer Capacitance Crss - 7.0 -
pF
VDS = 1.0 V, f = 1.0 MHz - 1912 -
Output Capacitance Coss
VGS = 0 V VDS = 520 V, f = 1.0 MHz - 48 -
Effective Output Capacitance Coss eff. VDS = 0 V to 520 Vc - 84 -
Total Gate Charge Qg - - 48
ID = 3.2 A, VDS = 400 V
Gate-Source Charge Qgs VGS = 10 V - - 12 nC
see fig. 6 and 13b
Gate-Drain Charge Qgd - - 19
Turn-On Delay Time td(on) - 14 -
Rise Time tr VDD = 325 V, ID = 3.2 A - 20 -
RG = 9.1 Ω, RD = 62 Ω, ns
Turn-Off Delay Time td(off) see fig. 10b - 34 -
Fall Time tf - 18 -
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous Source-Drain Diode Current IS D
- - 4
showing the
integral reverse G
A
Pulsed Diode Forward Currenta ISM p - n junction diode S
- - 21

Body Diode Voltage VSD TJ = 25 °C, IS = 3.2 A, VGS = 0 Vb - - 1.5 V

Body Diode Reverse Recovery Time trr - 493 739 ns
TJ = 25 °C, IF = 3.2 A, dI/dt = 100 A/µsb
Body Diode Reverse Recovery Charge Qrr - 2.1 3.2 µC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
d. t = 60 s, f = 60 Hz.

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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

10 VGS
10
TOP 15V
10V
8.0V
I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
5 5
TJ = 150 ° C

TJ = 25 ° C
1 1

20µs PULSE WIDTH V DS = 100V

4.5V TJ = 25 °C 20µs PULSE WIDTH
0.1 0.1
0.1 1 10 100 4.0 5.0 6.0 7.0 8.0 9.0
VDS , Drain-to-Source Voltage (V) VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics

10 8.0
VGS ID = 3.2A
RDS(on) , Drain-to-Source On Resistance

TOP 15V
10V
I D , Drain-to-Source Current (A)

8.0V
7.0V
6.0V
5.5
5.5V
5.0V
BOTTOM 4.5V
5 5.0
(Normalized)

3.5

4.5V
1 2.0

0.5
20µs PULSE WIDTH
TJ = 150 ° C VGS = 10V
0.1 0.0
1 10 100 -60 -40 -20 0 20 40 60 80 100 120 140 160
VDS , Drain-to-Source Voltage (V) TJ , Junction Temperature ( °C)
Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

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2000 10
V GS = 0V, f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd

ISD , Reverse Drain Current (A)

1600 C oss = C ds + C gd

iss
C, Capacitance (pF)

5
1200

oss TJ = 150 ° C

800
1

400 TJ = 25 ° C
rss

V GS = 0 V
0 A 0.1
1 10 100 1000 0.2 0.4 0.6 0.8 1.0 1.2
VDS , Drain-to-Source Voltage (V) VSD ,Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage

20 10
ID = 3.2 A
OPERATION IN THIS AREA LIMITED
VDS = 520V BY RDS(on)
VGS , Gate-to-Source Voltage (V)

VDS = 325V
16 VDS = 130V 10us
ID , Drain Current (A)

5
12 100us

1ms
8
1
10ms
4
TC = 25 ° C
FOR TEST CIRCUIT TJ = 150 ° C
SEE FIGURE 13 Single Pulse
0 0.1
0 10 20 30 40 50 10 100 1000 10000
QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area

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RD
VDS
6.0
VGS
D.U.T.
5.0 RG
+
- VDD
ID , Drain Current (A)

4.0 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
3.0
Fig. 10a - Switching Time Test Circuit

2.0
VDS
90 %
1.0

0.0
25 50 75 100 125 150
TC , Case Temperature ( ° C) 10 %
VGS
t d(on) tr t d(off) t f
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms

10
Thermal Response (Z thJC )

D = 0.50
1

0.20

0.10
PDM
0.05
0.1
t1
0.02
t2
0.01
Notes:
SINGLE PULSE
(THERMAL RESPONSE) 1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

V DS

15 V tp

L Driver
VDS

RG D.U.T. +
- VDD
A
IAS A
20 V
tp 0.01 Ω I AS

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

5
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800
ID
EAS , Single Pulse Avalanche Energy (mJ)

TOP 2.3A
3.3A QG
BOTTOM 4A
600
10 V
QGS Q GD

400 VG

Charge
200

Fig. 13a - Basic Gate Charge Waveform

0
25 50 75 100 125 150
Starting TJ , Junction Temperature ( °C) Current regulator
Same type as D.U.T.
Fig. 12c - Maximum Avalanche Energy vs. Drain Current

50 kΩ

12 V 0.2 µF
0.3 µF
800
+
VDS
D.U.T. -
V DSav , Avalanche Voltage (V)

780 VGS

3 mA

760
IG ID
Current sampling resistors

740 Fig. 13b - Gate Charge Test Circuit

720

700 A
0 1 2 3 4 5 6
I av , Avalanche Current (A)

Fig. 12d - Typical Drain-to Source Voltage vs. Avalanche

Current

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Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

RG • dV/dt controlled by R G +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor "D"
• D.U.T. - device under test

Driver gate drive

P.W.
Period D=
P.W. Period

VGS = 10 V*

D.U.T. ISD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage Body diode forward drop
Inductor crurent

Ripple ≤ 5 % ISD

* VGS = 5 V for logic level devices

Fig. 14 - For N-Channel

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TO-252AA CASE OUTLINE

E A MILLIMETERS INCHES
C2
b3
DIM. MIN. MAX. MIN. MAX.
L3 A 2.18 2.38 0.086 0.094
A1 - 0.127 - 0.005
b 0.64 0.88 0.025 0.035
b2 0.76 1.14 0.030 0.045
D

b3 4.95 5.46 0.195 0.215

H
C 0.46 0.61 0.018 0.024
C2 0.46 0.89 0.018 0.035
L4

D 5.97 6.22 0.235 0.245

L5

L
gage plane height (0.5 mm)

D1 5.21 - 0.205 -
E 6.35 6.73 0.250 0.265
E1 4.32 - 0.170 -
b b2 C
e H 9.40 10.41 0.370 0.410
A1
e1 e 2.28 BSC 0.090 BSC
e1 4.56 BSC 0.180 BSC
L 1.40 1.78 0.055 0.070
L3 0.89 1.27 0.035 0.050
D1

L4 - 1.02 - 0.040
L5 1.14 1.52 0.045 0.060
ECN: X12-0247-Rev. M, 24-Dec-12
E1 DWG: 5347
Note
• Dimension L3 is for reference only.

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