UNIT

TRANSISTORS: BJT AND FET

3
LESSONS COVERED

3.1 Transistor
3.2 BJT structure, parameters and characteristics, schematic symbol and
construction
3.3 FET: JFET basic structure, parameters, schematic symbol and construction
3.4 FET: JFET, D-MOSFET and E-MOSFET transfer and drain characteristics

LESSON 3.1 TRANSISTOR

 TRANSISTOR (TRANSFER RESISTOR)

A transistor is a semiconductor device used to amplify or switch electronic signals and electrical power. It is
composed of semiconductor material usually with at least three terminals for connection to an external
circuit.

 TRANSISTOR CATEGORIES AND PACKAGING

 General-Purpose/Small-Signal Transistors are generally used for low- or medium-power amplifiers or
switching circuits. The packages are either plastic or metal cases. Certain types of packages contain multiple
transistors.

 Power Transistors are used to handle large currents (typically more than 1 A) and/or large voltages. For
example, the final audio stage in a stereo system uses a power transistor amplifier to drive the speakers.

 RF Transistors are designed to operate at extremely high frequencies and are commonly used for various
purposes in communications systems and other high frequency applications.

Unit 3: Transistors: BJT and FET 56

 TRANSISTOR CONSTRUCTION

Unit 3: Transistors: BJT and FET 57

LESSON 3.2 BIPOLAR JUNCTION TRANSISTOR

 BIPOLAR JUNCTION TRANSISTOR

 It is a three-terminal electronic device made of doped semiconductor material and may be used in
amplifying or switching applications.
 Bipolar transistors are named “BIPOLAR” because their operation involves both electrons and holes.
 A bipolar transistor will have terminals that are labeled: emitter, collector, base.
 Back-to-Back Diode.

 BJT STRUCTURE

 TWO TYPES OF BJT

 NPN two n regions separated by a p region

 PNP two p regions separated by an n region

Unit 3: Transistors: BJT and FET 58

 TRANSISTOR CONFIGURATIONS
1. COMMON EMITTER CONFIGURATION
 Power Gain

2. COMMON BASE CONFIGURATION

 Voltage Gain

3. COMMON COLLECTOR CONFIGURATION

 Current Gain

Biasing the transistor refers to applying voltage to get the transistor to achieve certain operating
conditions.

Common-Emitter Biasing (CE):

 input = VBE & IB
 output = VCE & IC

Common-Base Biasing (CB) :

 input = VEB & IE
 output = VCB & IC

Common-Collector Biasing (CC):

 input = VBC & IB
 output = VEC & IE

 BJT OPERATIONS (BIASING)

COMMON EMITTER

Unit 3: Transistors: BJT and FET 59

 Examine what happens inside the NPN structure
 The left source VBB forward-biases the emitter diode. It pushes the electrons from the emitter to the
base.
 The job of the heavily doped emitter is to emit or inject its free electrons into the base.
 The lightly doped base pass emitter-injected electrons on to the collector.
 The collector is so named because it collects or gathers most of the electrons from the base.
 The right source VCC reverse-biases the collector and attracts the electrons from the collector region,
move through into the external circuit, and then return into the emitter region along with the base
current.

 TRANSISTOR CURRENT

Unit 3: Transistors: BJT and FET 60

 SUBSCRIPT NOTATION AND VOLTAGES

 BJT CHARACTERISTICS and PARAMETERS

DC Beta in Terms of DC Alpha and Vice Versa

Unit 3: Transistors: BJT and FET 61

 CHARACTERISTIC CURVE
COMMON EMITTER CONFIGURATION

Unit 3: Transistors: BJT and FET 62

 SAMPLE PROBLEMS:
1. If a transistor has a DC alpha value of 0.985, what is the Current Gain-DC Beta?

2. Determine the emitter current, ᵦ

DC and αDC for a transistor where IB = 50 mA and IC = 3.65 mA.

3. A transistor has a collector current of 10 mA and a base current of 40 A. What is the current gain and dc
alpha of the transistor?

4. A transistor has a current gain of 175. Determine the dc alpha of the transistor. If the base current is 0.1mA,
what is the collector current?

5. A transistor has a collector current of 2mA. If the current gain is 135, determine the emitter current.

Unit 3: Transistors: BJT and FET 63

LESSON 3.3 FIELD EFFECT TRANSISTOR

 FET
 The FET is the preferred device for most switching applications
 Because there are no minority carriers in an FET. As a result, it can switch off faster since no stored
charge has to be removed from the junction area.
 The term field effect is related to the depletion layers around each p region.
 These depletion layers exist because free electrons diffuse from the n regions into the p regions.
 The recombination of free electrons and holes creates the depletion layers.

 Types of FET’s
 JFET Junction Field Effect Transistor
 MOSFET Metal-Oxide-Semiconductor FET
o Depletion Type
o Enhancement Type

 BJT VS FET
BJT operates based on the actual conduction of currents at the junction, while FET operates based on the
effect of electric field at the junction.

The three terminals of FET:

gate, drain, and source terminal that is equivalent to
the base, collector and emitter terminal for BJT

Important relationships:

Unit 3: Transistors: BJT and FET 64

 JUNCTION FET
 The JFET is always operated with the gate-source pn junction reverse-biased.
 Because of reverse bias, the gate current IG is ≈ 0, which is equivalent to saying that the JFET has an
almost infinite input resistance.

 Types of JFET’s:
a. n-channel
b. p-channel

The n-channel is more widely used.

 Construction (n- channel)

 Three terminals:
1. Drain (D) - connected to n-channel
2. Source (S) - connected to n-channel
3. Gate (G) - connected to the p-type material

 Transfer Characteristics
 The input-output transfer characteristic of the JFET is not as straight forward as it is for the BJT
 In a BJT,  (hFE) defined the relationship between IB (input current) and IC (output current).
 In a JFET, the relationship (Shockley’s Equation) between V GS (input voltage) and ID (output current) is
used to define the transfer characteristics, and a little more complicated (and not linear):

Where:
ID Drain Current
IDSS Drain-Source saturation current (Maximum current, with VGS = 0V)
VGS or VGG Gate-Source Voltage
VP Pinch off voltage ( The value of VGS which causes the JFET to
switch “OFF”)

As a result, FET’s are often referred to a square law devices

Unit 3: Transistors: BJT and FET 65

 Quick Facts
 JFETs are operated by applying voltage across the drain-source terminal called VDS and a reverse-bias
voltage across gate-source terminal called VGG.
 JFETs are normally “ON”, meaning without VGG or VGG = 0V, the channel is wide open, allowing
maximum current (IDSS) to flow when a voltage is applied across the drain-source terminal (VDS).
 When VGG is applied (reverse-bias), the gate-source junction depletion region will widen, causing the
channel to narrow. As the channel narrows, less current can flow.
 Continuously increasing VGG, will narrow further the channel, until it is completely closed, in effect no
more current can flow. At this point the JFET is “OFF”.
 The amount of VGG which causes the channel to close, switching OFF the JFET is called pinch-off
voltage, VP.

 Operating Characteristics

 N-Channel JFET Operation

A. VGG = 0, VDS Some Positive Value
 As the voltage VDS is increased from 0 V to a few volts, the current will increase as determined by
Ohm’s law
 once VDS > VP the JFET has the characteristics of a constant current source.

B. VGG < 0
 The level of VGG that results in ID = 0 mA is defined by VGG = VP, with VP being a negative voltage
for n-channel devices and a positive voltage for p-channel JFETs.

Unit 3: Transistors: BJT and FET 66

 Saturation
At the pinch-off point:
@VGG = 0, VDS Some Positive Value: If VDS is increased to a level where it appears that the two
depletion regions would “touch”, a condition referred to as pinch-off will result

@ VGG < 0: any further increase in VGG does not produce any increase in ID.
 VGS at pinch-off is denoted as Vp.
 On most specification sheets the pinch-off voltage is specified as VGS(off) rather than Vp .
 ID at saturation or maximum is referred to as IDSS.
 The ohmic value of the channel is at maximum.

 ID  IDSS
As VGG becomes more negative:
 the JFET will pinch-off at a lower voltage (Vp).
 ID decreases (ID < IDSS) even though VDS is increased.
 Eventually ID will reach 0A. VGG at this point is called Vp or VGS(off).
 Also note that at high levels of VDS the JFET reaches a breakdown situation.
 ID will increases uncontrollably if VDS > VDSmax.

 P-Channel JFET Operation

P-Channel JFET operates in a similar manner as the n-channel JFET except the voltage polarities and
current directions are reversed

Unit 3: Transistors: BJT and FET 67

 P-Channel JFET Characteristics
As VGG increases more positively
 the depletion zone increases
 ID decreases (ID < IDSS)
 eventually ID = 0A

Also note that at high levels of VDS the JFET reaches a breakdown situation. ID increases uncontrollably if
VDS > VDSmax.

 Transfer (Transconductance) Curve

 From this graph it is easy to determine the value of ID for a given value of VGS
 It is also possible to determine IDSS and VP by looking at the knee where VGS is 0

 Plotting the Transconductance Curve

Using IDSS and VP (or VGS(off)) values found in a specification sheet, the Family of Curves can be plotted
by making a table of data using the following 3 steps:

Unit 3: Transistors: BJT and FET 68

 SAMPLE PROBLEMS:
6. Sketch the transfer curve defined by IDSS = 12 mA and VP = -6 V.

7. Sketch the transfer curve for a p -channel device with IDSS = 4 mA and VP = 3 V

 Quick Facts
 The terminals of JFETs are S-source, D-drain, and G-gate
 For n-channel type JFET, only electrons are the charged carriers used.
 For p-channel type JFET, only holes are the charged carriers used.
 FETs current is from the source (S) to drain (D) passing through the channel that is controlled by the
gate (G)
 The thickness of the channel determines the amount of current can pass from source (S) to drain (D).
Thicker channel, more current. Narrow channel, less current.
 The thickness of the channel depends on the polarity and amount of voltage between the gate (G) and
source (S) terminals, VGG.
 JFET is also constructed from p and n type materials. It also has a depletion region at the pn junction.
 The depletion region widens, as the junction is reverse-bias. The widening of the depletion region
causes the channel to narrow thereby limiting the amount of current flow.

Bipolar Transistor Field Effect Transistor

Emitter - (E) >> Source - (S)
Base - (B) >> Gate - (G)
Collector - (C) >> Drain - (D)

Unit 3: Transistors: BJT and FET 69

 METAL OXIDE SEMICONDUCTOR FET
MOSFETs have characteristics similar to JFETs and additional characteristics that make them very useful

Types of MOSFET’s:
1. D-MOSFET
• Operates in Depletion mode the same way as a JFET when VGG  0
• Operates in Enhancement mode like E-MOSFET when VGG > 0

2. E-MOSFET
• Operates in Enhancement mode
• IDSS = 0 until VGG > VT (threshold voltage)

 DEPLETION TYPE
 The transistor requires the Gate-Source voltage, (VGG) to switch the device "OFF".
 The depletion mode MOSFET is equivalent to a "Normally Closed" switch.

 ENHANCEMENT TYPE
 The transistor requires a Gate-Source voltage, (VGG) to switch the device "ON".
 The enhancement mode MOSFET is equivalent to a "Normally Open" switch.

 D-MOSFET
Symbols

Unit 3: Transistors: BJT and FET 70

 Construction (N-Channel)

 The Drain (D) and Source (S) leads connect to the to n-doped regions
 These N-doped regions are connected via an n-channel
 This n-channel is connected to the Gate (G) via a thin insulating layer of SiO 2
 The n-doped material lies on a p-doped substrate that may have an additional terminal connection
called SS
 There is no direct electrical connection between the gate terminal and the channel of a MOSFET.

 Basic Operation
A D-MOSFET may be biased to operate in two modes:
 the Depletion mode
 the Enhancement mode

 Depletion Mode Operation

The transfer characteristics are similar to the JFET in Depletion Mode operation:
 When VGS = 0V, ID = IDSS
 When VGS < 0V, ID < IDSS
 When VGS > 0V, ID > IDSS
The formula used to plot the Transfer Curve, is:

2
 VGS 
ID = IDSS  1 - 
 VP 

 Enhancement Mode operation

In this mode, the transistor operates with VGS > 0V, and ID increases above IDSS
Shockley’s equation, the formula used to plot the Transfer Curve, still applies but V GS is positive:

2
 VGS 
ID = IDSS  1 - 
 VP 

Unit 3: Transistors: BJT and FET 71

 P-Channel Depletion Mode MOSFET

The p-channel Depletion mode MOSFET is similar to the n-channel except that the voltage polarities and
current directions are reversed

 E-MOSFET
 Construction (N-Channel)

 The Drain (D) and Source (S) connect to the to n-doped regions
 These n-doped regions are not connected via an n-channel without an external voltage
 The Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO2
 The n-doped material lies on a p-doped substrate that may have an additional terminal connection
called SS

 Basic Operation
The Enhancement type MOSFET only operates in the enhancement mode.
 VGS is always positive
 IDSS = 0 when VGS < VT
 As VGS increases above VT, ID increases
 If VGS is kept constant and VDS is increased, then ID saturates (IDSS)
 The saturation level, VDSsat is reached.
 To determine ID given VGS:

ID(on)
ID = k (VGS - VT)2 k=
(VGS(ON) - VT)2

Unit 3: Transistors: BJT and FET 72

 Transfer Curve

 P-Channel Enhancement Mode MOSFETs

The p-channel Enhancement mode MOSFET is similar to the n-channel except that the voltage polarities and
current directions are reversed.

 SUMMARY

Unit 3: Transistors: BJT and FET 73

 Quick Facts
 MOSFET are constructed within a plate or base called the substrate (SS).
 The substrate material is dissimilar to that of the channel. (i.e. for n-channel type, the substrate is p-type
material; for p-channel type, the substrate is n-type material)
 FETs current is from the source (S) to drain (D) passing through the channel that is controlled by the
gate (G).
 The thickness of the channel determines the amount of current can pass from source (S) to drain (D).
Thicker channel, more current. Narrow channel, less current.
 The thickness of the channel depends on the polarity of voltage between the gate (G) and substrate
(SS) terminals, VGS. (The substrate is normally connected to the source terminal).

 The main difference between depletion and enhancement type is that depletion-type initially has a
channel. While enhancement type has none.
 Enhancement type MOSFETs are normally “OFF”. There will be no current flow between source and
drain terminal due to the absence of channel.
 A channel is produced or enhanced between the source and drain terminals when the gate is properly
supplied or biased.
 The amount of voltage needed at the gate terminal before a channel is significantly enhanced is called
the threshold voltage, VTH. At this voltage, current ID starts to flow.
 For n-channel +VGS is needed to enhance a channel.
 For p-channel, -VGS is needed to enhance a channel.

SAMPLE PROBLEMS:
8. Sketch the transfer characteristics for an n -channel depletion-type MOSFET with IDSS = 10 mA and VP = -4 V.

9. Sketch the transfer and drain characteristics of an n-channel enhancement-type MOSFET if VT = 2V, k = 0.278
x 10 -3 A/ V2

Unit 3: Transistors: BJT and FET 74