Aspire S7-191 Wistron Helium UMA

5 4 3 2 1
Hulium
UMA Schematics Document
D
Sandy Bridge D
Intel PCH
C C
DY :None Installed ANNIE: ONLY FOR ANNIE solution.

PSL: KBC795 PSL circuit for 10mW solution installed.
UMA:UMA installed 10mW: External circuit for 10mW solution installed.
65W: for 65W adaptor installed.
90W: for 90W adaptor installed.
B B
W istron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get W istron permission
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
Helium -1
Date: Thursday, August 23, 2012 Sheet 1 of 103
5 4 3 2 1
5 4 3 2 1
CPU DC/DC
Project code:91.4WD01.001
PCB:12222 -1 Helium Block Diagram VT1323SFCX
INPUTS
5V_S5
OUTPUTS
VCC_CORE
42~43
mSATA BD:12757 -1
SYSTEM DC/DC
Light Sensor BD:12759 -1 VT386FCX 45
EL BD:12758 -1 Intel CPU INPUTS OUTPUTS
5V_S5 1D05V_VTT
D
IVY Bridge DDRIII 1066/1333 Channel A
DDR3L 1333 D
14
2C BGA 1023 Pin ULV Memory Down 1 SYSTEM DC/DC
11'6 41
RT8223MZQW
LCD eDP DDRIII 1066/1333 Channel B DDR3L 1333 INPUTS OUTPUTS
\Touch 15 5V_AUX_S5
Screen Memory Down2 3D3V_AUX_S5
DCBATOUT 5V_S5
3D3V_S5
4,5,6,7,8,9,10,11,12,13 SYSTEM DC/DC

RT9026GQW 46
INPUTS OUTPUTS
1D35V_S3 0D675V_S0
DDR_VREF_S3
FDI DMIx4 SYSTEM DC/DC

NCP5911MNTBG 44
INPUTS OUTPUTS
C 5V_S5 VCC_GFXCORE_PWR C
USB 2.0 port:3 Micro HDMI

49 HDMI 51 VT357FCX 46
INPUTS OUTPUTS
Intel 5V_S5 1D35V_S3
Light sensor SMBUS PCI-E X1
CM3218A PCH HM77 LGA WLAN+BT TI CHARGER
BQ24760RSBR 40
X2001 6 USB 2.0/1.1 ports USB 2.0 port:5 INPUTS OUTPUTS
25Mhz 2 USB 3.0 ports
MD222
65 DCBATOUT BT+
ETHERNET (10/100/1000Mb) 26
High Definition Audio SYSTEM DC/DC
CardReader SYW231ABC 47
Micro SD USB 2.0 port:4 SATA ports (4) X2101
32 RTS5138 32 32.768Khz INPUTS OUTPUTS
PCIE ports (4)
LPC I/F 3D3V_S5 1D8V_S0
B USB Charge IC USB 3.0 Port X2 USB 3.0 port:0-1 ACPI 1.1 SYSTEM DC/DC B
96 62 RT9041B 93
INPUTS
26 OUTPUTS
SATA3 x2 Re-Driver SATA3 x2 mSATA
17,18,19,20,21,22,23,24,25,26 56 56 1D8V_S0 1D5V_S0
AZALIA SYSTEM DC/DC

SY8037DDCC 48
SPI
INPUTS OUTPUTS
LPC Bus
5V_S5 0D85V_S0
Internal Digital MIC LPC debug port

Azalia Flash ROM 71 PCB LAYER
CODEC 2MB 60 L1:Top L6:Signal
Combo jack L2:VCC L7:GND
ALC271 Flash ROM KBC Fan 28 L3:Signal L8:Signal
SPI L4:VCC L9:GND
29 4MB 60 L5:Signal L10:Bottom
A
IT8518VG A
Helium
SMBus SMBus
27
Wistron Corporation
2CH SPEAKER Title
4ohm 1w Keyboard backlight Thermal
MAX14521E
Touch
Int. KB Block Diagram
Pad NCT 7718
A3
2569 69 69 2528 Helium -1
5 4 3 2 1
A B C D E
PCH Strapping Chief River Schematic Checklist Rev.1.5 Processor Strapping Chief River Schematic Checklist Rev.1.5
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
1 unless specified otherwise) Value
Reboot option at power-up
SPKR Default Mode: Internal weak Pull-down. Connect a series 1 kOhms resistor on the critical
CFG[0] CFG[0] trace in a manner which does not introduce
No Reboot Mode with TCO Disabled: If the signal is sampled high.
any stubs to CFG[0] trace.
INIT3_3V# Weak internal pull-up. This signal should not be pulled low.
CFG[2] PCIe Static x16 1: Normal Operation; Lane # definition matches
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. Lane Numbering socket pin map definition 1
4 GNT2#/GPIO53 Used as GPIO only. Pull-up resistors are not required on these Reversal 0:Lane Reversed 4
GNT1#/GPIO51 signals. If pull-ups are used, they should be tied to the Vcc3_3 1: Disabled - No Physical Display Port attached to
power rail. CFG[4] Display Port Embedded DisplayPort.
Presence strap 1
Integrated 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when high. 0: Enabled - An external Display Port device is
NOTE: This signal should always be pulled high. connectd to the EMBEDDED display Port
INTVRMEN External 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when Low.
NOTE: This signal should be pulled down to GND through 330 kOhms resistor. CFG[6:5] PCI-Express 00 = 1 x 8, 2 x 4 PCI Express
Port Bifurcation 01 = reserved 1
A strap for selecting DMI and FDI termination voltage. Straps 10 = 2 x 8 PCI Express
DF_TVS DF_TVS needs to be pulled up to VccDFTERM power rail through 2.2 kOhms ±5% resistor. 11 = 1 x 16 PCI Express
configuration lands.
SATA1GP/ This Signal has a weak internal pull-up. CFG[17:7] A test point may be
GPIO19 Note: the internal pull-up is disabled after PLTRST# deasserts. placed
This signal has a weak internal pull-down. on the board for
SATA2GP/ NOTE: The internal pull-down is disabled after PLTRST# deasserts. these lands.
GPIO36 NOTE: This signal should not be pulled high when strap is sampled.
This signal has a weak internal pull-down.

SATA3GP/ NOTE: The internal pull-down is disabled after PLTRST# deasserts. Voltage Rails
POWER PLANE VOLTAGE DESCRIPTION
GPIO37 NOTE: This signal should not be pulled high when strap is sampled. ACTIVE IN
3 5V_S0
3D3V_S0
5V
3.3V 3
HDA_SDO Weak internal pull-down. This signal has a 20k internal pull down resistor. 1D8V_S0 1.8V
1D5V_S0 1.5V
1D05V_VTT 1.05V
0D85V_S0 0.95 - 0.85V
HDA_SYNC On Die PLL VR is supplied by 1.5 V from VCCVRM when sampled high, 1.8 V from VCCVRM 0D75V_S0 0.75V
when sampled low. VCC_CORE 0.35V to 1.5V
S0
Needs to be pulled High for Chief River platform. VCC_GFXCORE 0.4 to 1.25V
1D8V_VGA_S0 1.8V
3D3V_VGA_S0 3.3V CPU Core Rail
1V_VGA_S0 1V Graphics Core Rail
GPIO15
：
This signal has a weak internal pull-down.
NOTE A strong pull-up may be needed for GPIO functionality.
5V_USBX_S3 5V
1D5V_S3 1.5V S3
L_DDC_DATA When '1'- LVDS is detected; When '0'- LVDS is not detected. DDR_VREF_S3 0.75V
This signal has a weak internal pull-down
SDVO_CTRLDATA/ BT+ 6V-14.1V AC Brick Mode only
DCBATOUT 6V-14.1V
DDPC_CTRLDATA/When '1'- Port B is detected; When '0'- Port B is not detected
5V_S5 5V All S states
DDPD_CTRLDATA This signal has a weak internal pull-down 5V_AUX_S5 5V
3D3V_S5 3.3V
3D3V_AUX_S5 3.3V
If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is
DSWVRMEN enabled. 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
If not used, 8.2-kΩ to 10-kΩ pull-up to +V3.3A power-rail.
GPIO28 GPIO28 signal also needs to be pulled up to 3.3V_SUS with 4.7K resistor to ensure
2 proper strap setting when use as the chipset test interface. 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
If Intel LAN is implemented on the platform, SLP_LAN# must be used to control the
GPIO29/ power to the PHY LAN. Powered by Li Coin Cell in G3
SLP_LAN# If integrated Intel LAN is not supported on the platform, GPIO29 can be used as a 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
normal GPIO.
USB Table
SMBus ADDRESSES
PCIE Routing Pair Device
0 USB3.0 Ext. port 2 I 2 C / SMBus Addresses
HURON RIVER ORB
Device Ref Des Address Hex Bus
LANE1 N/A 1 USB3.0 Ext. port 1
2 NC EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 N/A SATA Table 3 touch screen
Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA
LANE3 N/A SATA

4 Card Reader
EC SMBus 2
5 SML1_CLK/SML1_DATA
BT(MD222) PCH SML1_CLK/SML1_DATA
LANE4 WLAN Pair Device eDP
6 SML1_CLK/SML1_DATA
1 CCD Helium
1
LANE5 THUNDERBOLT 0 MSata 7 X
1 MSata 8 X PCH SMBus
PCH_SMBDATA/PCH_SMBCLK
Wistron Corporation
SO-DIMMA (SPD) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
LANE6 THUNDERBOLT 2 N/A 9 NC
SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
Digital Pot PCH_SMBDATA/PCH_SMBCLK
G-Sensor PCH_SMBDATA/PCH_SMBCLK
LANE7 THUNDERBOLT 3 N/A 10 NC MINI PCH_SMBDATA/PCH_SMBCLK
Title
4 N/A 11 NC
PCH_SMBDATA/PCH_SMBCLK Table of Content
LANE8 THUNDERBOLT 5 N/A 12 NC A3
-1
Helium
Thursday, August 23, 2012
Date: Sheet 3 of 103
5 4 3 2 1
SSID = CPU Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1D05V_VTT
CPU1A 1 OF 9 R401
G3 PEG_IRCOMP_R 1 2
PEG_ICOMPI
19 DMI_TXN[3:0] PEG_ICOMPO G1
D DMI_TXN0
DMI_TXN1
M2
P6
DMI_RX#0 PEG_RCOMPO G4 24D9R1F-GP D
DMI_TXN2 DMI_RX#1
P1 DMI_RX#2
DMI_TXN3 P10 H22
DMI_RX#3 PEG_RX#0
19 DMI_TXP[3:0] PEG_RX#1 J21
DMI_TXP0 N3 B22
Note: DMI_TXP1 DMI_RX0 PEG_RX#2
P7 DMI_RX1 PEG_RX#3 D21
DMI
Intel DMI supports both Lane DMI_TXP2 P3 DMI_RX2 PEG_RX#4 A19
DMI_TXP3 P11 D17
Reversal and polarity inversion DMI_RX3 PEG_RX#5
B14
19 DMI_RXN[3:0] PEG_RX#6
but only at PCH side. This is DMI_RXN0 K1 D13
DMI_RXN1 DMI_TX#0 PEG_RX#7
M8 DMI_TX#1 PEG_RX#8 A11
enabled via a soft strap. DMI_RXN2 N4 DMI_TX#2 PEG_RX#9 B10
DMI_RXN3 R2 G8
DMI_TX#3 PEG_RX#10
19 DMI_RXP[3:0] PEG_RX#11 A8
DMI_RXP0 K3 B6
DMI_RXP1 DMI_TX0 PEG_RX#12
M7 DMI_TX1 PEG_RX#13 H8
DMI_RXP2 P4 E5
DMI_RXP3 DMI_TX2 PEG_RX#14
T3 DMI_TX3 PEG_RX#15 K7
PEG_RX0 K22
PEG_RX1 K19
19 FDI_TXN[7:0] PEG_RX2 C21
FDI_TXN0 U7 D19
FDI_TXN1 FDI0_TX#0 PEG_RX3
Note: W11 FDI0_TX#1 PEG_RX4 C19
FDI_TXN2 W1 D16
FDI0_TX#2 PEG_RX5
Intel FDI supports both Lane FDI_TXN3 AA6 FDI0_TX#3 PEG_RX6 C13
FDI_TXN4 W6 D12
Reversal and polarity inversion FDI_TXN5 V4
FDI1_TX#0 PEG_RX7
C11
FDI1_TX#1 PEG_RX8
C FDI_TXN6
C
PCI EXPRESS -- GRAPHICS

but only at PCH side. This is FDI_TXN7
Y2 FDI1_TX#2 PEG_RX9 C9
AC9 FDI1_TX#3 PEG_RX10 F8
Intel(R) FDI
enabled via a soft strap. PEG_RX11 C8
19 FDI_TXP[7:0] PEG_RX12 C5
FDI_TXP0 U6 H6
FDI_TXP1 FDI0_TX0 PEG_RX13
W10 FDI0_TX1 PEG_RX14 F6
FDI_TXP2 W3 K6
FDI_TXP3 FDI0_TX2 PEG_RX15
AA7 FDI0_TX3
FDI_TXP4 W7 G22
FDI_TXP5 FDI1_TX0 PEG_TX#0
T4 FDI1_TX1 PEG_TX#1 C23
FDI_TXP6 AA3 D23
FDI_TXP7 FDI1_TX2 PEG_TX#2
AC8 FDI1_TX3 PEG_TX#3 F21
PEG_TX#4 H19
19 FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#5 C17
Note: 19 FDI_FSYNC1 AC12 FDI1_FSYNC PEG_TX#6 K15
PEG_TX#7 F17
Lane reversal does not apply to 19 FDI_INT U11 FDI_INT PEG_TX#8 F14
A15
FDI sideband signals. AA10
PEG_TX#9
J14
19 FDI_LSYNC0 FDI0_LSYNC PEG_TX#10
19 FDI_LSYNC1 AG8 FDI1_LSYNC PEG_TX#11 H13
PEG_TX#12 M10
PEG_TX#13 F10
PEG_TX#14 D9
24D9R1F-GP R402 J4
DP_COMP PEG_TX#15
1D05V_VTT 1 2 AF3 EDP_COMPIO
AD2 EDP_ICOMPO PEG_TX0 F22
49 CPU_EDP_HPD# AG11 EDP_HPD# PEG_TX1 A23
PEG_TX2 D24
PEG_TX3 E21
AG4 G19
B 49 CPU_EDP_AUX#
49 CPU_EDP_AUX AF4
EDP_AUX#
EDP_AUX
PEG_TX4
PEG_TX5 B18 B
PEG_TX6 K17
eDP
PEG_TX7 G17
49 CPU_EDP_DATA0# AC3 EDP_TX#0 PEG_TX8 E14
49 CPU_EDP_DATA1# AC4 EDP_TX#1 PEG_TX9 C15
Impedance:85 ohm AE11
AE7
EDP_TX#2 PEG_TX10 K13
G13
EDP_TX#3 PEG_TX11
PEG_TX12 K10
Signal Routing Guideline: 49 CPU_EDP_DATA0 AC1 EDP_TX0 PEG_TX13 G10
EDP_ICOMPO keep W/S=12/15 mils and routing 49 CPU_EDP_DATA1 AA4 EDP_TX1 PEG_TX14 D8
AE10 K4
length less than 500 mils. AE6
EDP_TX2 PEG_TX15
EDP_COMPIO keep W/S=4/15 mils and routing EDP_TX3
length less than 500 mils.
IVY-BRIDGE-GP-NF 71.00IVY.A0U
1D05V_VTT
NOTE:
1
R404 Select a Fast FET similar to 2N7002E whose rise/

1KR1J-GP
fall time is less than 6 ns. If HPD on eDP interface is
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up
2
CPU_EDP_HPD#
resistor on the motherboard.
A Helium
A
Wistron Corporation
Title
CPU (PCIE/DMI/FDI)
A3
Helium -1
5 4 3 2 Disabling Guidelines: 1
SSID = CPU CPU1B 2 OF 9
If motherboard only supports external graphics or without eDP:
Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5%
J3 resistor.
BCLK CLK_EXP_P 20
BCLK# H2 CLK_EXP_N 20 Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5%
MISC
resistorpower (~15 mW) may be wasted.
CLOCKS
1D05V_VTT F49
22 H_SNB_IVB# PROC_SELECT#
R501 DPLL_REF_CLK AG3 CLK_DP_P 20
DPLL_REF_CLK# AG1 CLK_DP_N 20
1 2 H_PROCHOT# C57 PROC_DETECT#
1
C501
62R1J-GP
SC47P25V1JN-GP
D D
-SC
2
C49 CATERR# CLK_EXP_P 1 TP501
THERMAL
SM_DRAMRST# 37
CLK_EXP_N 1 TP502
22,27 H_PECI A48 PECI SM_DRAMRST# AT30 2 R502 1
4K99R2F-L-GP CLK_DP_P 1 TP503
R504
BF44 SM_RCOMP_0 R506 1 2 140R2F-GP CLK_DP_N 1 TP504
SM_RCOMP0
DDR3
MISC
27 H_PROCHOT# 1 2 H_PROCHOT#_R C45 BE43 SM_RCOMP_1 R507 1 2 25D5R2F-GP
PROCHOT# SM_RCOMP1 SM_RCOMP_2 R508 1
SM_RCOMP2 BG43 2 200R1F-GP For SIV,please near to CPU
56R1J-GP
22,36 H_THERMTRIP# D45 THERMTRIP#
PRDY# N53
PREQ# N55
TCK L56
TMS L55
PWR MANAGEMENT
J58 XDP_TRST# 1D05V_VTT
TRST#
JTAG & BPM

C48 M60 XDP_TDO 2 3
19 H_PM_SYNC PM_SYNC TDI
L59 XDP_TDO XDP_TRST# 1 4
TDO
RN502
22,36,97 H_CPUPW RGD B46 SRN51J-GP
UNCOREPWRGOOD XDP_DBRESET#
DBR# K58
C 1 R503 2
10KR1J-GP C
37 VDDPW RGOOD VDDPW RGOOD BE45 G58
SM_DRAMPWROK BPM#0
BPM#1 E55
BPM#2 E59
BPM#3 G55
BPM#4 G59
BUF_CPU_RST# D44 H60
RESET# BPM#5
BPM#6 J59
BPM#7 J61
3D3V_S0
RN505
XDP_DBRESET# 1 4
18,27,36,65,71,81,97 PLT_RST# 2 3 BUF_CPU_RST#
1
SRN1KJ-11-GP-U
R505
499R1F-GP
B B
2
A Helium
A
Wistron Corporation
Title
CPU (THERMAL/CLOCK/PM )
A3
Helium -1
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9
CPU1D 4 OF 9
15 M_A_DQ[63:0]
M_A_DQ0 AG6 SA_DQ0 14 M_B_DQ[63:0]
D M_A_DQ1 AJ6 AU36 M_B_DQ0 AL4 D
SA_DQ1 SA_CK0 M_A_DIM0_CLK_DDR0 15 SB_DQ0
M_A_DQ2 AP11 AV36 M_B_DQ1 AL1 BA34
SA_DQ2 SA_CK#0 M_A_DIM0_CLK_DDR#0 15 SB_DQ1 SB_CK0 M_B_DIM0_CLK_DDR0 14
M_A_DQ3 AL6 AY26 M_B_DQ2 AN3 AY34
SA_DQ3 SA_CKE0 M_A_DIM0_CKE0 15 SB_DQ2 SB_CK#0 M_B_DIM0_CLK_DDR#0 14
M_A_DQ4 AJ10 M_B_DQ3 AR4 AR22
M_A_DQ5 SA_DQ4 M_B_DQ4 SB_DQ3 SB_CKE0 M_B_DIM0_CKE0 14
AJ8 SA_DQ5 AK4 SB_DQ4
M_A_DQ6 AL8 M_B_DQ5 AK3
M_A_DQ7 SA_DQ6 M_B_DQ6 SB_DQ5
AL7 SA_DQ7 AN4 SB_DQ6
M_A_DQ8 AR11 M_B_DQ7 AR1
AP6 SA_DQ9 SA_CK1 AT40 AU4 SB_DQ8
M_A_DQ10 AU6 AU40 M_B_DQ9 AT2 BA36
M_A_DQ11 SA_DQ10 SA_CK#1 M_B_DQ10 SB_DQ9 SB_CK1
AV9 SA_DQ11 SA_CKE1 BB26 AV4 SB_DQ10 SB_CK#1 BB36
M_A_DQ12 AR6 M_B_DQ11 BA4 BF27
M_A_DQ13 SA_DQ12 M_B_DQ12 SB_DQ11 SB_CKE1
AP8 SA_DQ13 AU3 SB_DQ12
M_A_DQ14 AT13 M_B_DQ13 AR3
AU13 SA_DQ15 AY2 SB_DQ14
M_A_DQ16 BC7 M_B_DQ15 BA3
BB7 SA_DQ17 SA_CS#0 BB40 M_A_DIM0_CS#0 15 BE9 SB_DQ16
M_A_DQ18 BA13 BC41 M_B_DQ17 BD9 BE41
M_A_DQ19 SA_DQ18 SA_CS#1 M_B_DQ18 SB_DQ17 SB_CS#0 M_B_DIM0_CS#0 14
BB11 SA_DQ19 BD13 SB_DQ18 SB_CS#1 BE47
M_A_DQ20 BA7 M_B_DQ19 BF12
BA9 SA_DQ21 BF8 SB_DQ20
M_A_DQ22 BB9 M_B_DQ21 BD10
AY13 SA_DQ23 BD14 SB_DQ22
M_A_DQ24 AV14 AY40 M_B_DQ23 BE13
SA_DQ24 SA_ODT0 M_A_DIM0_ODT0 15 SB_DQ23
M_A_DQ25 AR14 BA41 M_B_DQ24 BF16 AT43
M_A_DQ26 SA_DQ25 SA_ODT1 M_B_DQ25 SB_DQ24 SB_ODT0 M_B_DIM0_ODT0 14
AY17 SA_DQ26 BE17 SB_DQ25 SB_ODT1 BG47
M_A_DQ27 AR19 M_B_DQ26 BE18
BA14 SA_DQ28 BE21 SB_DQ27
M_A_DQ29 AU14 M_B_DQ28 BE14
C M_A_DQ30 SA_DQ29 M_B_DQ29 SB_DQ28 C
BB14 SA_DQ30 M_A_DQS#[7:0] 15 BG14 SB_DQ29
M_A_DQ31 BB17 AL11 M_A_DQS#0 M_B_DQ30 BG18 M_B_DQS#[7:0] 14
M_A_DQ32 SA_DQ31 SA_DQS#0 M_A_DQS#1 M_B_DQ31 SB_DQ30 M_B_DQS#0
BA45 SA_DQ32 SA_DQS#1 AR8 BF19 SB_DQ31 SB_DQS#0 AL3
M_A_DQ33 AR43 AV11 M_A_DQS#2 M_B_DQ32 BD50 AV3 M_B_DQS#1
M_A_DQ34 SA_DQ33 SA_DQS#2 M_A_DQS#3 M_B_DQ33 SB_DQ32 SB_DQS#1 M_B_DQS#2
AW48 SA_DQ34 SA_DQS#3 AT17 BF48 SB_DQ33 SB_DQS#2 BG11
M_A_DQ35 BC48 AV45 M_A_DQS#4 M_B_DQ34 BD53 BD17 M_B_DQS#3
M_A_DQ36 SA_DQ35 SA_DQS#4 M_A_DQS#5 M_B_DQ35 SB_DQ34 SB_DQS#3 M_B_DQS#4
BC45 SA_DQ36 SA_DQS#5 AY51 BF52 SB_DQ35 SB_DQS#4 BG51
M_A_DQ37 AR45 AT55 M_A_DQS#6 M_B_DQ36 BD49 BA59 M_B_DQS#5
SA_DQ37 SA_DQS#6 SB_DQ36 SB_DQS#5
DDR SYSTEM MEMORY A
M_A_DQ38 AT48 AK55 M_A_DQS#7 M_B_DQ37 BE49 AT60 M_B_DQS#6

SA_DQ38 SA_DQS#7 SB_DQ37 SB_DQS#6
DDR SYSTEM MEMORY B

M_A_DQ39 AY48 M_B_DQ38 BD54 AK59 M_B_DQS#7
M_A_DQ40 SA_DQ39 M_B_DQ39 SB_DQ38 SB_DQS#7
BA49 SA_DQ40 BE53 SB_DQ39
M_A_DQ41 AV49 M_B_DQ40 BF56
BB51 SA_DQ42 BE57 SB_DQ41
M_A_DQ43 AY53 M_B_DQ42 BC59
BB49 SA_DQ44 M_A_DQS[7:0] 15 AY60 SB_DQ43
M_A_DQ45 AU49 AJ11 M_A_DQS0 M_B_DQ44 BE54
M_A_DQ46 SA_DQ45 SA_DQS0 M_A_DQS1 M_B_DQ45 SB_DQ44
BA53 SA_DQ46 SA_DQS1 AR10 BG54 SB_DQ45 M_B_DQS[7:0] 14
M_A_DQ47 BB55 AY11 M_A_DQS2 M_B_DQ46 BA58 AM2 M_B_DQS0
M_A_DQ48 SA_DQ47 SA_DQS2 M_A_DQS3 M_B_DQ47 SB_DQ46 SB_DQS0 M_B_DQS1
BA55 SA_DQ48 SA_DQS3 AU17 AW59 SB_DQ47 SB_DQS1 AV1
M_A_DQ49 AV56 AW45 M_A_DQS4 M_B_DQ48 AW58 BE11 M_B_DQS2
AP50 SA_DQ50 SA_DQS5 AV51 AU58 SB_DQ49 SB_DQS3 BD18
M_A_DQ51 AP53 AT56 M_A_DQS6 M_B_DQ50 AN61 BE51 M_B_DQS4
AV54 SA_DQ52 SA_DQS7 AK54 AN59 SB_DQ51 SB_DQS5 BA61
M_A_DQ53 AT54 M_B_DQ52 AU59 AR59 M_B_DQS6
M_A_DQ54 SA_DQ53 M_B_DQ53 SB_DQ52 SB_DQS6 M_B_DQS7
AP56 SA_DQ54 AU61 SB_DQ53 SB_DQS7 AK61
M_A_DQ55 AP52 M_B_DQ54 AN58
AN57 SA_DQ56 AR58 SB_DQ55
M_A_DQ57 AN53 M_B_DQ56 AK58
AG56 SA_DQ58 AL58 SB_DQ57
B M_A_DQ59 M_B_DQ58 B
AG53 SA_DQ59 AG58 SB_DQ58
M_A_DQ60 AN55 M_B_DQ59 AG59
SA_DQ60 M_A_A[15:0] 15 SB_DQ59
M_A_DQ61 AN52 BG35 M_A_A0 M_B_DQ60 AM60
M_A_DQ62 SA_DQ61 SA_MA0 M_A_A1 M_B_DQ61 SB_DQ60 M_B_A0 M_B_A[15:0] 14
AG55 SA_DQ62 SA_MA1 BB34 AL59 SB_DQ61 SB_MA0 BF32
M_A_DQ63 AK56 BE35 M_A_A2 M_B_DQ62 AF61 BE33 M_B_A1
SA_DQ63 SA_MA2 M_A_A3 M_B_DQ63 SB_DQ62 SB_MA1 M_B_A2
SA_MA3 BD35 AH60 SB_DQ63 SB_MA2 BD33
AT34 M_A_A4 AU30 M_B_A3
SA_MA4 M_A_A5 SB_MA3 M_B_A4
SA_MA5 AU34 SB_MA4 BD30
BB32 M_A_A6 AV30 M_B_A5
15 M_A_BS0 BD37 SA_BS0 SA_MA7 AT32 SB_MA6 BG30
BF36 AY32 M_A_A8 BG39 BD29 M_B_A7
15 M_A_BS1 SA_BS1 SA_MA8 M_A_A9 14 M_B_BS0 SB_BS0 SB_MA7 M_B_A8
15 M_A_BS2 BA28 SA_BS2 SA_MA9 AV32 14 M_B_BS1 BD42 SB_BS1 SB_MA8 BE30
BE37 M_A_A10 AT22 BE28 M_B_A9
SA_MA10 M_A_A11 14 M_B_BS2 SB_BS2 SB_MA9 M_B_A10
SA_MA11 BA30 SB_MA10 BD43
BC30 M_A_A12 AT28 M_B_A11
15 M_A_CAS# BE39 SA_CAS# SA_MA13 AW41 SB_MA12 AV28
BD39 AY28 M_A_A14 AV43 BD46 M_B_A13
15 M_A_RAS# SA_RAS# SA_MA14 M_A_A15 14 M_B_CAS# SB_CAS# SB_MA13 M_B_A14
15 M_A_W E# AT41 SA_WE# SA_MA15 AU26 14 M_B_RAS# BF40 SB_RAS# SB_MA14 AT26
BD45 AU22 M_B_A15
14 M_B_W E# SB_WE# SB_MA15
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
Helium
A A
Wistron Corporation
Title
CPU (DDR)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
D D
CPU1E 5 OF 9
B50 CFG0 BCLK_ITP N59

C51 CFG1 BCLK_ITP# N58
B54 CFG2
D53 CFG3 Pin Name Strap Description Configuration (Default value for each bit is 1 unless specified otherwise) Default Value
CFG4 A51 N42
CFG4 RSVD30
C53 CFG5 RSVD31 L42
C55 CFG6 RSVD32 L45
H49 CFG7 RSVD33 L47 Connect a series 1 kOhms resistor on the critical CFG[0
A55 CFG8 trace in a manner which does not introduce any stubs
H51 CFG9
1
K49 M13 CFG[0] to CFG[0] trace.

CFG10 RSVD34
R702 K53 CFG11 RSVD35 M14 Route as needed from the opposite side of this series
1KR1J-GP F53 U14
CFG12 RSVD36 isolation resistor to the debug port.
G53 CFG13 RSVD37 W14
L51 P13 ITP will drive the net to GND.
2
CFG14 RSVD38
F51 CFG15
D52 CFG16
L53 CFG17 RSVD39 AT49
RSVD40 K24 1: Normal Operation;
PCIe Static x16 Lane Lane # definition matches socket pin map definition
C H43 CFG[2] 0 C
RESERVED
K43
VCC_VAL_SENSE
AH2
Numbering Reversal.
VSS_VAL_SENSE RSVD41
RSVD42 AG13 0:Lane Reversed
RSVD43 AM14
H45 VAXG_VAL_SENSE RSVD44 AM15
K45 VSSAXG_VAL_SENSE 1:Disabled - No Physical Display Port attached to
Embedded DisplayPort
RSVD45 N50
F48 VCC_DIE_SENSE No connect for disable
G48 RSVD47 Display Port
CFG[4] Presence strap 0:Enabled - An external Display Port device is connected to
H48 RSVD6 the Embedded Display Port 0
K48 RSVD7
A4 DC_TEST_A4 1 TP701 TPAD14-OP-GP
DC_TEST_A4
DC_TEST_C4 C4 Pull-down to GND through a 1KΩ ± 5%
BA19 D3 DC_TEST_1
RSVD8 DC_TEST_D3 DC_TEST_D1 1 TP702 TPAD14-OP-GP
resistor to enable port
AV19 RSVD9 DC_TEST_D1 D1
AT21 A58 DC_TEST_A58 1 TP703 TPAD14-OP-GP
RSVD10 DC_TEST_A58
BB21 RSVD11 DC_TEST_A59 A59
BB19 RSVD12 DC_TEST_C59 C59 DC_TEST_2 PCI-Express 00 = 1 x 8, 2 x 4 PCI Express
AY21 RSVD13 DC_TEST_A61 A61 CFG[6:5] Port Bifurcation 01 = reserved
BA22 C61 DC_TEST_3
RSVD14 DC_TEST_C61 Straps 10 = 2 x 8 PCI Express
AY22 RSVD15 DC_TEST_D61 D61 DC_TEST_D61 1 TP704 TPAD14-OP-GP 00
AU19 RSVD16 DC_TEST_BD61 BD61 DC_TEST_BD611 TP705 TPAD14-OP-GP 11 = 1 x 16 PCI Express
AU21 RSVD17 DC_TEST_BE61 BE61
BD21 BE59 DC_TEST_4
RSVD18 DC_TEST_BE59
BD22 RSVD19 DC_TEST_BG61 BG61
BD25 RSVD20 DC_TEST_BG59 BG59 DC_TEST_5 Reserved configuration
BD26 BG58 DC_TEST_BG581 TP706 TPAD14-OP-GP
B RSVD21 DC_TEST_BG58 DC_TEST_BG4 1 TP707 TPAD14-OP-GP
lands. A test point may B
BG22 RSVD22 DC_TEST_BG4 BG4
BE22 BG3 CFG[17:7] be placed on the board
RSVD23 DC_TEST_BG3
BG26 RSVD24 DC_TEST_BE3 BE3 DC_TEST_6 for these lands.
BE26 RSVD25 DC_TEST_BG1 BG1
BF23 BE1 DC_TEST_7
RSVD26 DC_TEST_BE1 DC_TEST_BD1 1 TP708 TPAD14-OP-GP
BE24 RSVD27 DC_TEST_BD1 BD1
Helium
A A
Wistron Corporation
Title
CPU (RESERVED)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
ULV:14W
CPU1F POWER 6 OF 9
Iccmax:33A Iccmax:8.5A
VCC_CORE ICC(TDP-Down):9.7A VCCIO1
AF46 ICC_TDC:8.5A
AG48
VCCIO3
AG50
VCCIO4 1D05V_VTT
A26 AG51
VCC1 VCCIO5
A29 AJ17
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
VCC2 VCCIO6
A31 AJ21
1
1
VCC3 VCCIO7
C801
C802
C803
C804
C805
C806
C807
C808
C809
C810
A34 AJ25
VCC4 VCCIO8
A35
VCC5 VCCIO9
AJ43 change 0603 to 0402
C822
SC10U6D3V2MX-GP-U
C821
SC10U6D3V2MX-GP-U
C820
SC10U6D3V2MX-GP-U
C819
SC10U6D3V2MX-GP-U
C817
SC10U6D3V2MX-GP-U
C815
SC10U6D3V2MX-GP-U
C814
SC10U6D3V2MX-GP-U
A38 AJ47
2
1
VCC6 VCCIO10
A39 AK50
VCC7 VCCIO11
A42 AK51
VCC8 VCCIO12
C26 AL14
2
VCC9 VCCIO13
D C27
VCC10 VCCIO14
AL15 DY D
C32 AL16
VCC11 VCCIO15
C34 AL20
VCC12 VCCIO16
C37 AL22
VCC13 VCCIO17
C39 AL26
SC2D2U6D3V2MX-GP
VCC14 VCCIO18
C811
SC4D7U6D3V2MX-GP-U
C813
SC4D7U6D3V2MX-GP-U
C834
SC4D7U6D3V2MX-GP-U
DY C42
VCC15 VCCIO19
AL45
1
C836
D27 AL48
VCC16 VCCIO20
D32 AM16
VCC17 VCCIO21
D34 AM17
2
2
VCC18 VCCIO22
D37 AM21
VCC19 VCCIO23
D39 AM43
PEG IO AND DDR IO

VCC20 VCCIO24
D42 AM47
VCC21 VCCIO25
E26 AN20
VCC22 VCCIO26
E28 AN42
VCC23 VCCIO27
E32 AN45
VCC24 VCCIO28
E34 AN48
VCC25 VCCIO29
6 2D2U to 3 4D7U E37
VCC26
E38
VCC27
CORE SUPPLY
F25
VCC28
Layout Note: 2.2u Cap place under CPU F26
VCC29 1D05V_VTT
F28
VCC30
F32
VCC31
F34
VCC32
F37 AA14
VCC33 VCCIO30
F38 AA15
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC34 VCCIO31
C823
C824
C825
C826
C827
C828
C829
C830
C847
F42 AB17
VCC35 VCCIO32
1
G42 AB20
VCC36 VCCIO33
H25 AC13
VCC37 VCCIO34
H26 AD16
2
VCC38 VCCIO35
H28 AD18
VCC39 VCCIO36
H29 AD21
VCC40 VCCIO37
H32 AE14
VCC41 VCCIO38
H34 AE15
VCC42 VCCIO39
H35 AF16
VCC43 VCCIO40
H37 AF18
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC44 VCCIO41
C837
C838
C839
C840
C841
C842
C845
H38 AF20
VCC45 VCCIO42
1
H40 AG15
VCC46 VCCIO43
J25 AG16
VCC47 VCCIO44
J26 AG17
2
VCC48 VCCIO45
J28 AG20
VCC49 VCCIO46
J29 AG21
VCC50 VCCIO47
C J32 AJ14 C
VCC51 VCCIO48
J34 AJ15
VCC52 VCCIO49
J35
VCC53
DY
J37
VCC54
J38 PIn BC22 CPU
VCC55
J40
VCC56
J42
VCC57
K26 W16
K27
VCC58 VCCIO50
W17 1.05V H SNB
VCC59 VCCIO51
K29 1.05V_VTT
VCC60
K32 CPU EDS desing guide Rev
K34
VCC61 Power rail 1V L IVB
VCC62
K35
VCC63
change 1 V to 1.05V
K37
VCC64
K39
VCC66 H_VCCP_SEL_L TP801
K42 BC22 1 PROCESSOR 1.05V Quiet rail for DDR block (BGA only)
VCC67 VCCIO_SEL TPAD14-OP-GP
L25
VCC68
L28 +V1.05S_VCCPQE should be short to +V1.05S_VCCP_DDR_R on board
VCC69
L33
VCC70
L36
VCC71 1D05V_VTT
L40
VCC72 1D05V_VTT
N26
VCC73 +V1.05S_VCCPQE 1 R806
QUIET
RAILS
N30 AM25 2
VCC74 VCCPQE1 0R0201-PAD-GP
N34 AN22
1
VCC75 VCCPQE2 C831 1D05V_VTT
N38
VCC76
1
SC1U6D3V2KX-L-1-GP
2
R808
2
R804 75R1J-GP
130R1F-GP
R803
2
43R1J-GP
Place near processor
1
A44 H_CPU_SVIDALRT# 1 2
VIDALERT# VR_SVID_ALERT# 42
B43 H_CPU_SVIDCLK
VIDSCLK H_CPU_SVIDCLK 42
SVID
C44 H_CPU_SVIDDAT
VIDSOUT H_CPU_SVIDDAT 42
1 R801 2 VCC_CORE
B 100R1F-GP B
F43
SENSE LINES
VCC_SENSE VCCSENSE 42
G43 Place near processor
VSS_SENSE VSSSENSE 42
1
R802
AN16 100R1F-GP
VCCIO_SENSE VCCIO_SENSE 45
AN17
VSS_SENSE_VCCIO VSSIO_SENSE 45
2
A A
Helium
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size
CPU (VCC_CORE)
Document Number Rev
A2
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU CPU1G POWER 7 OF 9 Routing Guideline:

Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
AY43 +V_SM_VREF_CNT
SM_VREF +V_SM_VREF_CNT 37
AA46
VREF
VAXG1
AB47 VAXG2
AB50 BE7 M_VREF_DQ_DIMM0_C
Iccmax:18A(GT1) AB51
VAXG3
VAXG4
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ BG7 M_VREF_DQ_DIMM1_C
M_VREF_DQ_DIMM0_C
M_VREF_DQ_DIMM1_C
37
37
AB52
D ICC_TDC:12A(GT1) AB53
VAXG5
VAXG6 D
3
4
VCC_GFXCORE AB55 VAXG7 RN901
AB56 VAXG8
AB58 VAXG9 SRN1K8J-GP
AB59 VAXG10 DY
AC61 VAXG11
AD47
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
1
VAXG12
C901
C902
C903
C904
C905
C906
C907
AD48 VAXG13
1
AD50 VAXG14
AD51 VAXG15 VDDQ1 AJ28
- 1.5V RAILS
AD52 AJ33
2
2
VAXG16 VDDQ2
AD53 VAXG17 VDDQ3 AJ36
AD55 AJ40 1D35V_S0
VAXG18 VDDQ4
AD56 AL30
AD58
VAXG19
VAXG20
VDDQ5
VDDQ6 AL34 Iccmax:5A
AD59 VAXG21 VDDQ7 AL38
AE46 VAXG22 VDDQ8 AL42
C912
SC10U6D3V2MX-GP-U
C911
SC10U6D3V2MX-GP-U
C910
SC10U6D3V2MX-GP-U
C909
SC10U6D3V2MX-GP-U
C928
SC10U6D3V2MX-GP-U
C927
SC10U6D3V2MX-GP-U
C929
SC10U6D3V2MX-GP-U
N45 VAXG23 VDDQ9 AM33
1
P47 VAXG24 VDDQ10 AM36
P48 AM40
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VAXG25 VDDQ11
C908
C920
C921
C922
C926
P50 AN30
2
VAXG26 VDDQ12
1
1
P51 VAXG27 VDDQ13 AN34 DY
P52 VAXG28 VDDQ14 AN38
P53 AR26
DDR3
2
2
VAXG29 VDDQ15
P55 AR28
GRAPHICS
VAXG30 VDDQ16
P56 VAXG31 VDDQ17 AR30
DY P61 VAXG32 VDDQ18 AR32
T48 AR34 1D35V_S0
VAXG33 VDDQ19
T58 VAXG34 VDDQ20 AR36
C T59 AR40 C
VAXG35 VDDQ21
T61 VAXG36 VDDQ22 AV41
U46 AW26
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VAXG37 VDDQ23
C931
C932
C933
C934
C935
C936
C937
C938
C939
C940
V47 VAXG38 VDDQ24 BA40
1
V48 VAXG39 VDDQ25 BB28
V50 VAXG40 VDDQ26 BG33
V51
2
VAXG41
V52 VAXG42 DY
V53 VAXG43
V55 VAXG44
V56 VAXG45
V58 VAXG46
V59 VAXG47
W50 VAXG48
W51 VAXG49
W52 VAXG50
W53 VAXG51
W55 VAXG52
W56 VAXG53
Here Del Pull up R
W61 VAXG54
VCC_GFXCORE Y48 VAXG55
Y61 VAXG56
2
VCCSA_VID0 VCCSA_VID0 48
R901 1D35V_S0 VCCSA_VID1 VCCSA_VID1 48
100R1F-GP
2
QUIET RAILS
AM28 +1.5S_VCCD_Q 1 R907 2 R904 R906
SENSE
LINES
1
VCC_AXG_SENSE VCCDQ1 0R0402-PAD

42 VCC_AXG_SENSE F45 VAXG_SENSE VCCDQ2 AN26 1KR1F-GP 1KR1F-GP
B VSS_AXG_SENSE B
42 VSS_AXG_SENSE G45 VSSAXG_SENSE
1 2
1
2
C919
R902 SC1U6D3V2KX-L-1-GP
100R1F-GP 1D8V_S0
ICC_MAX:1.2A
1.8V RAIL
PROCESSOR DDR 1.5V QUIET RAIL (BGA only)

1
BB3 VCCPLL1
BC1 VCCPLL2 +V1.5S_VCCD_Q should be short to +V1.5S_VCCDDQ on board
BC4 VCCPLL3
1
1
C913
SC10U6D3V3MX-GP
C914
SC1U10V2KX-1GP
VCCSA
2
BC43 TP_VDDQ_SENSE 1 TP901 TPAD14-OP-GP VID0 VID1

VDDQ_SENSE
BA43 TP_VDDQ_VSS 1 TP902 TPAD14-OP-GP ULV
VSS_SENSE_VDDQ
SENSE LINES
L17 VCCSA1 L L 0.9V

L21 VCCSA2
N16 VCCSA3
Pull up page 48 R
0D85V_S0
N20 VCCSA4 L H 0.85V
N22
ICC_MAX:6A
SA RAIL
VCCSA5
P17 VCCSA6
P20 VCCSA7 VCCSA_SENSE U10 VCCSA_SENSE 48 H L 0.775V
R16 VCCSA8
SC10U6D3V2MX-GP-U
C918
SC10U6D3V2MX-GP-U
R18 VCCSA9
1
1
C942
C941
C916
C915
C917
R21 H H 0.75V
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCSA10
U15
VCCSA VID
VCCSA11
V16
2
VCCSA12 VCCSA_VID0
A V17 VCCSA13 VCCSA_VID0 D48 Helium A
lines
V18 D49 VCCSA_VID1

VCCSA14 VCCSA_VID1
V21 VCCSA15
W20 VCCSA16 Wistron Corporation
IVY-BRIDGE-GP-NF 71.00IVY.A0U Title

CPU (VCC_GFXCORE)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU CPU1H 8 OF 9
CPU1I 9 OF 9
A13 VSS1 VSS91 AM38

A17 VSS2 VSS92 AM4
A21 VSS3 VSS93 AM42 BG17 VSS181 VSS250 M4
A33 VSS6 VSS96 AM58 BG28 VSS184 VSS253 N1
D A37 VSS7 VSS97 AN1 BG37 VSS185 VSS254 N17 D
A40 VSS8 VSS98 AN21 BG41 VSS186 VSS255 N21
AA1 VSS13 VSS103 AN40 C29 VSS191 VSS260 N40
AA51 VSS16 VSS106 AN50 D10 VSS194 VSS263 N48
AA52 VSS17 VSS107 AN54 D14 VSS195 VSS264 N51
AA53 VSS18 VSS108 AP10 D18 VSS196 VSS265 N52
AA8 VSS21 VSS111 AP7 D29 VSS199 VSS268 P14
AB16 VSS22 VSS112 AR13 D35 VSS200 VSS269 P16
AB48 AR41 D43 P58
AB61
AC10
VSS25
VSS26
VSS27
VSS115
VSS116
VSS117
AR48
AR61
D46
D50
VSS203
VSS204
VSS205
VSS VSS272
VSS273
VSS274
P59
P9
AC14 VSS28 VSS118 AR7 D54 VSS206 VSS275 R17
AC46 VSS29 VSS119 AT14 D58 VSS207 VSS276 R20
AC6 VSS30 VSS120 AT19 D6 VSS208 VSS277 R4
AD17 VSS31 VSS121 AT36 E25 VSS209 VSS278 R46
AD20 VSS32 VSS122 AT4 E29 VSS210 VSS279 T1
AD4 AT45 E3 T47
AD61
AE13
VSS33
VSS34
VSS35
VSS VSS123
VSS124
VSS125
AT52
AT58
E35
E40
VSS211
VSS212
VSS213
VSS280
VSS281
VSS282
T50
T51
C AE8 AU1 F13 T52 C
VSS36 VSS126 VSS214 VSS283
AF1 VSS37 VSS127 AU11 F15 VSS215 VSS284 T53
AF47 VSS40 VSS130 AU51 F35 VSS218 VSS287 U13
AF48 VSS41 VSS131 AU7 F40 VSS219 VSS288 U8
AF50 VSS42 VSS132 AV17 F55 VSS220 VSS289 V20
AF51 VSS43 VSS133 AV21 G51 VSS221 VSS290 V61
AF52 VSS44 VSS134 AV22 G6 VSS222 VSS291 W13
AF53 VSS45 VSS135 AV34 G61 VSS223 VSS292 W15
AF55 VSS46 VSS136 AV40 H10 VSS224 VSS293 W18
AF59 VSS49 VSS139 AW13 H21 VSS227 VSS296 W8
AG10 VSS50 VSS140 AW43 H4 VSS228 VSS297 Y4
AG47 VSS53 VSS143 AY14 J1 VSS231 VSS300 Y59
AG52 VSS54 VSS144 AY19 J49 VSS232
AG61 VSS55 VSS145 AY30 J55 VSS233
AG7 VSS56 VSS146 AY36 K11 VSS234
AH4 AY4 K21
：
VSS57 VSS147 VSS235
AH58 VSS58 VSS148 AY41 K51 VSS236
A5,A57,BC61,BG5
AJ13 AY45 K8 A5
BG57,C3,E1,E61
VSS59 VSS149 VSS237 VSS_NCTF_1#A5
NCTF TEST PIN

AJ16 VSS60 VSS150 AY49 L16 VSS238 VSS_NCTF_2#A57 A57
AJ20 VSS61 VSS151 AY55 L20 VSS239 VSS_NCTF_3#BC61 BC61
AJ22 VSS62 VSS152 AY58 L22 VSS240 VSS_NCTF_8#BG5 BG5
AJ26 VSS63 VSS153 AY9 L26 VSS241 VSS_NCTF_9#BG57 BG57
AJ30 VSS64 VSS154 BA1 L30 VSS242 VSS_NCTF_10#C3 C3
B B
AJ34 VSS65 VSS155 BA11 L34 VSS243 VSS_NCTF_13#E1 E1
AJ38 VSS66 VSS156 BA17 L38 VSS244 VSS_NCTF_14#E61 E61
NCTF
AJ42 VSS67 VSS157 BA21 L43 VSS245
AJ45 VSS68 VSS158 BA26 L48 VSS246
AJ48 VSS69 VSS159 BA32 L61 VSS247 VSS_NCTF_4 BD3
AJ7 VSS70 VSS160 BA48 M11 VSS248 VSS_NCTF_5 BD59
AK1 VSS71 VSS161 BA51 M15 VSS249 VSS_NCTF_6 BE4
AK52 VSS72 VSS162 BB53 VSS_NCTF_7 BE58
AL10 VSS73 VSS163 BC13 VSS_NCTF_11 C58
AL13 VSS74 VSS164 BC5 VSS_NCTF_12 D59
AL17 VSS75 VSS165 BC57
AL21 VSS76 VSS166 BD12
AL28 BD19 IVY-BRIDGE-GP-NF
VSS78 VSS168
AM13 VSS85 VSS175 BD48
AM30 VSS89 VSS179 BE5
AM34 VSS90 VSS180 BG13
A Helium A
IVY-BRIDGE-GP-NF
Wistron Corporation
Title
CPU (VSS)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
reserve
C C
B B
JE40 delete XDP function

Helium
A
Wistron Corporation A
Title
XDP
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
1D35V_S3 1D35V_S3 1D35V_S3 1D35V_S3

RAM1 RAM2 RAM3 RAM4
K8 E3 M_B_DQ13 K8 E3 M_B_DQ28 K8 E3 M_B_DQ42 K8 E3 M_B_DQ61

VDD DQ0 M_B_DQ12 VDD DQ0 M_B_DQ26 VDD DQ0 M_B_DQ44 VDD DQ0 M_B_DQ57
K2 F7 K2 F7 K2 F7 K2 F7
N1 F2 N1 F2 N1 F2 N1 F2
VDD DQ2 M_B_DQ8 L GROUP VDD DQ2 M_B_DQ30 VDD DQ2 M_B_DQ45 VDD DQ2 M_B_DQ56
R9 F8 R9 F8 R9 F8 R9 F8
M_B_A[15:0] 6 B2 H3 B2 H3 B2 H3 B2 H3
D9 H8 D9 H8 D9 H8 D9 H8
G7 G2 G7 G2 G7 G2 G7 G2
M_B_DQ[63:0] 6 R1 H7 R1 H7 R1 H7 R1 H7
VDD DQ7 VDD DQ7 VDD DQ7 VDD DQ7
N9 N9 N9 N9
VDD M_B_DQ7 VDD M_B_DQ23 VDD M_B_DQ34 VDD M_B_DQ54
D7 D7 D7 D7
DQ8 M_B_DQ1 DQ8 M_B_DQ16 DQ8 M_B_DQ32 DQ8 M_B_DQ50
M_B_DQS#[7:0] 6 A8 C3 A8 C3 A8 C3 A8 C3
VDDQ DQ9 M_B_DQ3 VDDQ DQ9 M_B_DQ19 VDDQ DQ9 M_B_DQ38 VDDQ DQ9 M_B_DQ55
A1 C8 A1 C8 A1 C8 A1 C8
VDDQ DQ10 M_B_DQ0 U GROUP VDDQ DQ10 M_B_DQ17 VDDQ DQ10 M_B_DQ36 VDDQ DQ10 M_B_DQ51
C1 C2 C1 C2 C1 C2 C1 C2
M_B_DQS[7:0] 6 C9 A7 C9 A7 C9 A7 C9 A7
D VDDQ DQ12 M_B_DQ4 VDDQ DQ12 M_B_DQ22 VDDQ DQ12 M_B_DQ33 VDDQ DQ12 M_B_DQ52 D
D2 A2 D2 A2 D2 A2 D2 A2
E9 B8 E9 B8 E9 B8 E9 B8
F1 A3 F1 A3 F1 A3 F1 A3
VDDQ DQ15 VDDQ DQ15 VDDQ DQ15 VDDQ DQ15
H9 H9 H9 H9
VDDQ M_B_DQS0 VDDQ M_B_DQS2 VDDQ M_B_DQS4 VDDQ M_B_DQS6
H2 C7 H2 C7 H2 C7 H2 C7
VDDQ UDQS M_B_DQS#0 U GROUP VDDQ UDQS M_B_DQS#2 VDDQ UDQS M_B_DQS#4 VDDQ UDQS M_B_DQS#6
B7 B7 B7 B7
UDQS# UDQS# UDQS# UDQS#
M_VREF_DQ_DIMMB H1 M_VREF_DQ_DIMMB H1 M_VREF_DQ_DIMMB H1 M_VREF_DQ_DIMMB H1
VREFDQ M_B_DQS1 VREFDQ M_B_DQS3 VREFDQ M_B_DQS5 VREFDQ M_B_DQS7
DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3
VRAM_CH_B_ZQ_1 VREFCA LDQS M_B_DQS#1 L GROUP VRAM_CH_B_ZQ_2 VREFCA LDQS M_B_DQS#3 VRAM_CH_B_ZQ_3 VREFCA LDQS M_B_DQS#5 VRAM_CH_B_ZQ_4 VREFCA LDQS M_B_DQS#7
L8 G3 L8 G3 L8 G3 L8 G3
ZQ LDQS# ZQ LDQS# ZQ LDQS# ZQ LDQS#
MEM_DC ODT
K1 M_B_DIM0_ODT0 6 ODT
K1 M_B_DIM0_ODT0 6
1
1
M_B_A0 N3 M_B_A0 N3 M_B_A0 N3 M_B_A0 N3
R1443 M_B_A1 A0 R1437 M_B_A1 A0 R1438 M_B_A1 A0 R1439 M_B_A1 A0
P7
A1 MEM_DC P7
A1 MEM_DC P7
A1 MEM_DC P7
A1
240R1F-GP M_B_A2 P3 L2 M_B_DIM0_CS#0 6 240R1F-GP M_B_A2 P3 L2 M_B_DIM0_CS#0 6 240R1F-GP M_B_A2 P3 L2 M_B_DIM0_CS#0 6 240R1F-GP M_B_A2 P3 L2 M_B_DIM0_CS#0 6
M_B_A3 A2 CS# M_B_A3 A2 CS# M_B_A3 A2 CS# M_B_A3 A2 CS#
N2 T2 DDR3_DRAMRST# 15,37 N2 T2 DDR3_DRAMRST# 15,37 N2 T2 DDR3_DRAMRST# 15,37 N2 T2 DDR3_DRAMRST# 15,37
M_B_A4 A3 RESET# M_B_A4 A3 RESET# M_B_A4 A3 RESET# M_B_A4 A3 RESET#
P8 P8 P8 P8
2
2
M_B_A5 A4 M_B_A5 A4 M_B_A5 A4 M_B_A5 A4
P2 P2 P2 P2
M_B_A6 A5 M_B_A15 M_B_A6 A5 M_B_A15 M_B_A6 A5 M_B_A15 M_B_A6 A5 M_B_A15
R8 M7 R8 M7 R8 M7 R8 M7
M_B_A7 A6 NC#M7 VRAM_CH_B_ZQ1_1 M_B_A7 A6 NC#M7 VRAM_CH_B_ZQ1_2 M_B_A7 A6 NC#M7 VRAM_CH_B_ZQ1_3 M_B_A7 A6 NC#M7 VRAM_CH_B_ZQ1_4
R2 L9 R2 L9 R2 L9 R2 L9
M_B_A8 A7 NC#L9 M_B_A8 A7 NC#L9 M_B_A8 A7 NC#L9 M_B_A8 A7 NC#L9
T8 L1 T8 L1 T8 L1 T8 L1
M_B_A9 A8 NC#L1 M_B_A9 A8 NC#L1 M_B_A9 A8 NC#L1 M_B_A9 A8 NC#L1
R3 J9 R3 J9 R3 J9 R3 J9
A9 NC#J9 A9 NC#J9 A9 NC#J9 A9 NC#J9
1
M_B_A10 L7 J1 M_B_A10 L7 J1 M_B_A10 L7 J1 M_B_A10 L7 J1
M_B_A11 A10/AP NC#J1 R1444 M_B_A11 A10/AP NC#J1 R1445 M_B_A11 A10/AP NC#J1 R1446 M_B_A11 A10/AP NC#J1 R1447
R7 R7 R7 R7
M_B_A12 A11 240R1F-GP M_B_A12 A11 240R1F-GP M_B_A12 A11 240R1F-GP M_B_A12 A11 240R1F-GP
N7 N7 N7 N7
M_B_A13 A12/BC# M_B_A13 A12/BC# M_B_A13 A12/BC# M_B_A13 A12/BC#
T3
A13 VSS
J8 MEM_DC_8G T3
A13 VSS
J8 MEM_DC_8G T3
A13 VSS
J8 MEM_DC_8G T3
A13 VSS
J8 MEM_DC_8G
M_B_A14 T7 M1 M_B_A14 T7 M1 M_B_A14 T7 M1 M_B_A14 T7 M1
2
A14 VSS A14 VSS A14 VSS A14 VSS
M9 M9 M9 M9
VSS VSS VSS VSS
J2 J2 J2 J2
VSS VSS VSS VSS
M2 P9 M2 P9 M2 P9 M2 P9
6 M_B_BS0 BA0 VSS 6 M_B_BS0 BA0 VSS 6 M_B_BS0 BA0 VSS 6 M_B_BS0 BA0 VSS
N8 G8 N8 G8 N8 G8 N8 G8
M3 B3 M3 B3 M3 B3 M3 B3
T1 T1 T1 T1
VSS VSS VSS VSS
A9 A9 A9 A9
VSS VSS VSS VSS
6 M_B_DIM0_CLK_DDR0 J7 T9 6 M_B_DIM0_CLK_DDR0 J7 T9 6 M_B_DIM0_CLK_DDR0 J7 T9 6 M_B_DIM0_CLK_DDR0 J7 T9
CK VSS CK VSS CK VSS CK VSS
6 M_B_DIM0_CLK_DDR#0 K7 E1 6 M_B_DIM0_CLK_DDR#0 K7 E1 6 M_B_DIM0_CLK_DDR#0 K7 E1 6 M_B_DIM0_CLK_DDR#0 K7 E1
CK# VSS CK# VSS CK# VSS CK# VSS
P1 P1 P1 P1
VSS VSS VSS VSS
6 M_B_DIM0_CKE0 K9 6 M_B_DIM0_CKE0 K9 6 M_B_DIM0_CKE0 K9 6 M_B_DIM0_CKE0 K9
CKE CKE CKE CKE
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
D3 E8 D3 E8 D3 E8 D3 E8
UDM VSSQ UDM VSSQ UDM VSSQ UDM VSSQ
E7 E2 E7 E2 E7 E2 E7 E2
LDM VSSQ LDM VSSQ LDM VSSQ LDM VSSQ
D8 D8 D8 D8
VSSQ VSSQ VSSQ VSSQ
D1 D1 D1 D1
VSSQ VSSQ VSSQ VSSQ
L3 B9 L3 B9 L3 B9 L3 B9
6 M_B_WE# WE# VSSQ 6 M_B_WE# WE# VSSQ 6 M_B_WE# WE# VSSQ 6 M_B_WE# WE# VSSQ
K3 B1 K3 B1 K3 B1 K3 B1
6 M_B_CAS# CAS# VSSQ 6 M_B_CAS# CAS# VSSQ 6 M_B_CAS# CAS# VSSQ 6 M_B_CAS# CAS# VSSQ
J3 G9 J3 G9 J3 G9 J3 G9
6 M_B_RAS# RAS# VSSQ 6 M_B_RAS# RAS# VSSQ 6 M_B_RAS# RAS# VSSQ 6 M_B_RAS# RAS# VSSQ
MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP
MEM_DC MEM_DC MEM_DC MEM_DC
Tracew should be at least 20 mils wide

C
Place these caps C
close to VTT1 and
M_VREF_DQ_DIMMB DDR_VREF_S3 VTT2.
0D675V_S0
DDR_VREF_S3 M_VREF_DQ_DIMMB 0D675V_S0
R1440
37 DDR_WR_VREF_CHB 1 2 1 R1441 2 Layout Note:

1D35V_S3
0R2J-2-GP
SODIMM A DECOUPLING Place these Caps near
0R0402-PAD
DY SO-DIMMA.
1
C1419 C1421
1
SC1U6D3V2KX-L-1-GP
SC1U6D3V2KX-L-1-GP
C1450 C1451
C1412
SCD1U10V1KX-GP
C1414
SCD1U10V1KX-GP
C1411
SCD1U10V1KX-GP
C1413
SCD1U10V1KX-GP
C1457
SCD1U10V1KX-GP
C1458
SCD1U10V1KX-GP
C1459
SCD1U10V1KX-GP
C1460
SCD1U10V1KX-GP
SC1U6D3V2KX-L-1-GP
SC1U6D3V2KX-L-1-GP
2
2
1
1
C1403
SC10U6D3V2MX-GP-U
C1404
SC10U6D3V2MX-GP-U
C1406
SC10U6D3V2MX-GP-U
C1407
SC10U6D3V2MX-GP-U
C1410
SCD1U10V1KX-GP
C1409
SCD1U10V1KX-GP
C1440
SC10U6D3V2MX-GP-U
C1442
SC10U6D3V2MX-GP-U
2
1
1
MEM_DC
2
2
2
MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC
David -SA
MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC
C1424
SCD1U10V1KX-GP
1
C1416
SCD1U10V1KX-GP
C1417
SCD1U10V1KX-GP
C1425
SCD1U10V1KX-GP
C1422
SCD1U10V1KX-GP
C1423
SCD1U10V1KX-GP
C1418
SCD1U10V1KX-GP
C1443
SCD1U10V1KX-GP
C1444
SCD1U10V1KX-GP
C1420
SCD1U10V1KX-GP
C1446
SCD1U10V1KX-GP
C1445
SCD1U10V1KX-GP
1
1
EC1401
SCD1U10V1KX-GP
EC1402
SCD1U10V1KX-GP
EC1403
SCD1U10V1KX-GP
EC1404
SCD1U10V1KX-GP
EC1405
SCD1U10V1KX-GP
EC1406
SCD1U10V1KX-GP
1
2
2
2
2
M_B_DIM0_CLK_DDR0
2
MEM_DC
R1435
MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC
MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC
0D675V_S0
MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC MEM_DC
-SD 33R1F-GP
MEM_DC
0D675V_S0
1
1
C1430
1 2 M_B_DIM0_CKE0 SC1D6P25V1CN-GP
R1407 33R1F-GP 1 2 M_B_A0 M_B_DIM0_CLK_DDR0_R C1432 1 2 SCD1U10V1KX-GP
2
R1419 33R1F-GP MEM_DC
MEM_DC 1 2 M_B_A1
MEM_DC MEM_DC
R1420 33R1F-GP
2
1 2 M_B_A2
1 2 M_B_DIM0_ODT0 R1421 MEM_DC33R1F-GP R1436
R1409 33R1F-GP 1 2 M_B_A3 33R1F-GP
R1422 MEM_DC33R1F-GP
MEM_DC MEM_DC
1 2 M_B_A4 M_B_DIM0_CLK_DDR#0
MEM_DC
1
R1423 33R1F-GP
1 2 M_B_A5
1 2 M_B_DIM0_CS#0 R1424 MEM_DC33R1F-GP
R1411 33R1F-GP 1 2 M_B_A6
MEM_DC 1 2 M_B_A7
1 2 M_B_A8
B
1 M_B_RAS# 2 R1427 MEM_DC33R1F-GP B
R1413 33R1F-GP 1 2 M_B_A9
1 M_B_CAS# 2 R1428 MEM_DC33R1F-GP
R1414 MEM_DC33R1F-GP 1 2 M_B_A10
1 2 M_B_WE# R1429 MEM_DC33R1F-GP
R1430 MEM_DC
33R1F-GP
MEM_DC 1 2 M_B_A12
David -SA 1 2 M_B_A13
1 M_B_BS0 2 R1432 MEM_DC33R1F-GP
R1416 33R1F-GP 1 2 M_B_A14
1 2 M_B_BS1 R1433 MEM_DC33R1F-GP
1 2 M_B_BS2 R1434 MEM_DC33R1F-GP
MEM_DC
MEM_DC
A A
Helium
Wistron Corporation
Title
DDR3L-MEMDOWN
A1
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
1D35V_S3 1D35V_S3 1D35V_S3 1D35V_S3

RAM5 RAM6 RAM7 RAM8
K8 E3 M_A_DQ3 K8 E3 M_A_DQ22 K8 E3 M_A_DQ39 K8 E3 M_A_DQ51

VDD DQ0 M_A_DQ6 VDD DQ0 M_A_DQ21 VDD DQ0 M_A_DQ34 VDD DQ0 M_A_DQ50
K2 F7 K2 F7 K2 F7 K2 F7
N1 F2 N1 F2 N1 F2 N1 F2
R9 F8 R9 F8 R9 F8 R9 F8
6 M_A_A[15:0] B2 H3 B2 H3 B2 H3 B2 H3
D9 H8 D9 H8 D9 H8 D9 H8
6 M_A_DQ[63:0] G7 G2 G7 G2 G7 G2 G7 G2
R1 H7 R1 H7 R1 H7 R1 H7
VDD DQ7 VDD DQ7 VDD DQ7 VDD DQ7
6 M_A_DQS#[7:0] N9 N9 N9 N9
VDD M_A_DQ8 VDD M_A_DQ29 VDD M_A_DQ43 VDD M_A_DQ63
D7 D7 D7 D7
DQ8 M_A_DQ13 DQ8 M_A_DQ28 DQ8 M_A_DQ47 DQ8 M_A_DQ57
6 M_A_DQS[7:0] A8 C3 A8 C3 A8 C3 A8 C3
VDDQ DQ9 M_A_DQ12 VDDQ DQ9 M_A_DQ24 VDDQ DQ9 M_A_DQ45 VDDQ DQ9 M_A_DQ58
A1 C8 A1 C8 A1 C8 A1 C8
C1 C2 C1 C2 C1 C2 C1 C2
C9 A7 C9 A7 C9 A7 C9 A7
D2 A2 D2 A2 D2 A2 D2 A2
E9 B8 E9 B8 E9 B8 E9 B8
D VDDQ DQ14 M_A_DQ10 VDDQ DQ14 M_A_DQ26 VDDQ DQ14 M_A_DQ42 VDDQ DQ14 M_A_DQ61 D
F1 A3 F1 A3 F1 A3 F1 A3
VDDQ DQ15 VDDQ DQ15 VDDQ DQ15 VDDQ DQ15
H9 H9 H9 H9
VDDQ M_A_DQS1 VDDQ M_A_DQS3 VDDQ M_A_DQS5 VDDQ M_A_DQS7
H2 C7 H2 C7 H2 C7 H2 C7
VDDQ UDQS M_A_DQS#1 VDDQ UDQS M_A_DQS#3 VDDQ UDQS M_A_DQS#5 VDDQ UDQS M_A_DQS#7
B7 B7 B7 B7
UDQS# UDQS# UDQS# UDQS#
M_VREF_DQ_DIMMA H1 M_VREF_DQ_DIMMA H1 M_VREF_DQ_DIMMA H1 M_VREF_DQ_DIMMA H1
VREFDQ M_A_DQS0 VREFDQ M_A_DQS2 VREFDQ M_A_DQS4 VREFDQ M_A_DQS6
DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3 DDR_VREF_S3 M8 F3
VRAM_CH_A_ZQ_1 VREFCA LDQS M_A_DQS#0 VRAM_CH_A_ZQ_2 VREFCA LDQS M_A_DQS#2 VRAM_CH_A_ZQ_3 VREFCA LDQS M_A_DQS#4 VRAM_CH_A_ZQ_4 VREFCA LDQS M_A_DQS#6
L8 G3 L8 G3 L8 G3 L8 G3
ZQ LDQS# ZQ LDQS# ZQ LDQS# ZQ LDQS#
K1 M_A_DIM0_ODT0 6 K1 M_A_DIM0_ODT0 6 K1 M_A_DIM0_ODT0 6 K1 M_A_DIM0_ODT0 6
ODT ODT ODT ODT
1
M_A_A0 N3 M_A_A0 N3 M_A_A0 N3 M_A_A0 N3
R1520 M_A_A1 A0 R1543 M_A_A1 A0 R1544 M_A_A1 A0 R1542 M_A_A1 A0
P7 P7 P7 P7
240R1F-GP M_A_A2 A1 240R1F-GP M_A_A2 A1 240R1F-GP M_A_A2 A1 240R1F-GP M_A_A2 A1
P3 L2 M_A_DIM0_CS#0 6 P3 L2 M_A_DIM0_CS#0 6 P3 L2 M_A_DIM0_CS#0 6 P3 L2 M_A_DIM0_CS#0 6
M_A_A3 A2 CS# M_A_A3 A2 CS# M_A_A3 A2 CS# M_A_A3 A2 CS#
N2 T2 DDR3_DRAMRST# 14,37 N2 T2 DDR3_DRAMRST# 14,37 N2 T2 DDR3_DRAMRST# 14,37 N2 T2 DDR3_DRAMRST# 14,37
M_A_A4 A3 RESET# M_A_A4 A3 RESET# M_A_A4 A3 RESET# M_A_A4 A3 RESET#
P8 P8 P8 P8
2
M_A_A5 A4 M_A_A5 A4 M_A_A5 A4 M_A_A5 A4
P2 P2 P2 P2
M_A_A6 A5 M_A_A15 M_A_A6 A5 M_A_A15 M_A_A6 A5 M_A_A15 M_A_A6 A5 M_A_A15
R8 M7 R8 M7 R8 M7 R8 M7
M_A_A7 A6 NC#M7 VRAM_CH_A_ZQ1_1 M_A_A7 A6 NC#M7 VRAM_CH_A_ZQ1_2 M_A_A7 A6 NC#M7 VRAM_CH_A_ZQ1_3 M_A_A7 A6 NC#M7 VRAM_CH_A_ZQ1_4
R2 L9 R2 L9 R2 L9 R2 L9
M_A_A8 A7 NC#L9 M_A_A8 A7 NC#L9 M_A_A8 A7 NC#L9 M_A_A8 A7 NC#L9
T8 L1 T8 L1 T8 L1 T8 L1
M_A_A9 A8 NC#L1 M_A_A9 A8 NC#L1 M_A_A9 A8 NC#L1 M_A_A9 A8 NC#L1
R3 J9 R3 J9 R3 J9 R3 J9
A9 NC#J9 A9 NC#J9 A9 NC#J9 A9 NC#J9
1
M_A_A10 L7 J1 M_A_A10 L7 J1 M_A_A10 L7 J1 M_A_A10 L7 J1
M_A_A11 A10/AP NC#J1 R1545 M_A_A11 A10/AP NC#J1 R1546 M_A_A11 A10/AP NC#J1 R1547 M_A_A11 A10/AP NC#J1 R1548
R7 R7 R7 R7
M_A_A12 A11 240R1F-GP M_A_A12 A11 240R1F-GP M_A_A12 A11 240R1F-GP M_A_A12 A11 240R1F-GP
N7 N7 N7 N7
M_A_A13 A12/BC# M_A_A13 A12/BC# M_A_A13 A12/BC# M_A_A13 A12/BC#
T3
A13 VSS
J8 8G T3
A13 VSS
J8 8G T3
A13 VSS
J8 8G T3
A13 VSS
J8 8G
M_A_A14 T7 M1 M_A_A14 T7 M1 M_A_A14 T7 M1 M_A_A14 T7 M1
2
A14 VSS A14 VSS A14 VSS A14 VSS
M9 M9 M9 M9
VSS VSS VSS VSS
J2 J2 J2 J2
VSS VSS VSS VSS
6 M_A_BS0 M2 P9 6 M_A_BS0 M2 P9 6 M_A_BS0 M2 P9 6 M_A_BS0 M2 P9
BA0 VSS BA0 VSS BA0 VSS BA0 VSS
6 M_A_BS1 N8 G8 6 M_A_BS1 N8 G8 6 M_A_BS1 N8 G8 6 M_A_BS1 N8 G8
6 M_A_BS2 M3 B3 6 M_A_BS2 M3 B3 6 M_A_BS2 M3 B3 6 M_A_BS2 M3 B3
T1 T1 T1 T1
VSS VSS VSS VSS
A9 A9 A9 A9
VSS VSS VSS VSS
6 M_A_DIM0_CLK_DDR0 J7 T9 6 M_A_DIM0_CLK_DDR0 J7 T9 6 M_A_DIM0_CLK_DDR0 J7 T9 6 M_A_DIM0_CLK_DDR0 J7 T9
CK VSS CK VSS CK VSS CK VSS
6 M_A_DIM0_CLK_DDR#0 K7 E1 6 M_A_DIM0_CLK_DDR#0 K7 E1 6 M_A_DIM0_CLK_DDR#0 K7 E1 6 M_A_DIM0_CLK_DDR#0 K7 E1
CK# VSS CK# VSS CK# VSS CK# VSS
P1 P1 P1 P1
VSS VSS VSS VSS
6 M_A_DIM0_CKE0 K9 6 M_A_DIM0_CKE0 K9 6 M_A_DIM0_CKE0 K9 6 M_A_DIM0_CKE0 K9
CKE CKE CKE CKE
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
D3 E8 D3 E8 D3 E8 D3 E8
UDM VSSQ UDM VSSQ UDM VSSQ UDM VSSQ
E7 E2 E7 E2 E7 E2 E7 E2
LDM VSSQ LDM VSSQ LDM VSSQ LDM VSSQ
D8 D8 D8 D8
VSSQ VSSQ VSSQ VSSQ
D1 D1 D1 D1
VSSQ VSSQ VSSQ VSSQ
6 M_A_WE# L3 B9 6 M_A_WE# L3 B9 6 M_A_WE# L3 B9 6 M_A_WE# L3 B9
WE# VSSQ WE# VSSQ WE# VSSQ WE# VSSQ
6 M_A_CAS# K3 B1 6 M_A_CAS# K3 B1 6 M_A_CAS# K3 B1 6 M_A_CAS# K3 B1
CAS# VSSQ CAS# VSSQ CAS# VSSQ CAS# VSSQ
6 M_A_RAS# J3 G9 6 M_A_RAS# J3 G9 6 M_A_RAS# J3 G9 6 M_A_RAS# J3 G9
RAS# VSSQ RAS# VSSQ RAS# VSSQ RAS# VSSQ
MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP
C M_VREF_DQ_DIMMA DDR_VREF_S3 C
R1506
37 DDR_WR_VREF_CHA 1 2 1 R1505 2
0R2J-2-GP
0R0402-PAD
DY
1D35V_S3
David -SA
M_A_DIM0_CLK_DDR0
0D675V_S0
0D675V_S0
C1528
SC10U6D3V2MX-GP-U
C1519
SC10U6D3V2MX-GP-U
C1547
SC10U6D3V2MX-GP-U
C1549
SC10U6D3V2MX-GP-U
C1534
SC10U6D3V2MX-GP-U
C1537
SCD1U10V1KX-GP
C1527
SCD1U10V1KX-GP
C1512
SCD1U10V1KX-GP
C1515
SCD1U10V1KX-GP
C1526
SCD1U10V1KX-GP
C1530
SCD1U10V1KX-GP
C1540
SCD1U10V1KX-GP
C1513
SCD1U10V1KX-GP
C1514
SCD1U10V1KX-GP
C1517
SCD1U10V1KX-GP
C1548
SCD1U10V1KX-GP
C1536
SCD1U10V1KX-GP
C1543
SCD1U10V1KX-GP
C1546
SCD1U10V1KX-GP
C1539
SCD1U10V1KX-GP
C1552
SCD1U10V1KX-GP
C1545
SCD1U10V1KX-GP
C1550
SCD1U10V1KX-GP
C1551
SCD1U10V1KX-GP
C1553
SCD1U10V1KX-GP
C1554
SCD1U10V1KX-GP
1
2
1 2 M_A_A0
1 2 M_A_DIM0_CKE0 R1519 33R1F-GP R1535
R1539 33R1F-GP 1 2 M_A_A1 33R1F-GP
2
2
R1541 33R1F-GP
DY 1 2 M_A_A2 -SD
1
1
R1521 33R1F-GP C1533
1 2 M_A_A3 SC1D6P25V1CN-GP
1 2 M_A_DIM0_ODT0 R1522 33R1F-GP M_A_DIM0_CLK_DDR0_R C1531 1 2 SCD1U10V1KX-GP
2
R1513 33R1F-GP 1 2 M_A_A4
R1523 33R1F-GP
1 2 M_A_A5
2
R1524 33R1F-GP
1 2 M_A_A6 R1536
1 2 M_A_DIM0_CS#0 R1525 33R1F-GP 33R1F-GP
R1511 33R1F-GP 1 2 M_A_A7
DDR_VREF_S3 M_VREF_DQ_DIMMA R1526 33R1F-GP
1
1 2 M_A_A8
R1527 33R1F-GP M_A_DIM0_CLK_DDR#0
1 2 M_A_A9
1 2 M_A_RAS# R1528 33R1F-GP
C1521
SCD1U10V1KX-GP
C1523
SCD1U10V1KX-GP
C1524
SCD1U10V1KX-GP
C1525
SCD1U10V1KX-GP
C1529
SCD1U10V1KX-GP
C1535
SCD1U10V1KX-GP
C1538
SCD1U10V1KX-GP
C1542
SCD1U10V1KX-GP
R1531 33R1F-GP 1 2 M_A_A10

1
1 2 M_A_CAS# R1529 33R1F-GP

R1514 33R1F-GP 1 2 M_A_A11
1 2 M_A_WE# R1530 33R1F-GP
2
R1515 33R1F-GP 1 2 M_A_A12

R1540 33R1F-GP
1 2 M_A_A13
1 2 M_A_BS0 R1532 33R1F-GP
R1516 33R1F-GP 1 2 M_A_A14
1 2 M_A_BS1 R1533 33R1F-GP
R1517 33R1F-GP 1 2 M_A_A15
1 2 M_A_BS2 R1534 33R1F-GP
R1518 33R1F-GP
0D675V_S0
B B
1
C1544 C1541
SC1U6D3V2KX-L-1-GP
SC1U6D3V2KX-L-1-GP
2
A A
Helium
Wistron Corporation
Title
DDR3L-MEMDOWN2
A1
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
Helium
A
Title
DDR3-SODIMM3
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
PCH1D 4 OF 10
RN1702 27 PCH_BKLT_EN J47 AP43
PCH_BKLT_EN L_BKLTEN SDVO_TVCLKINN
1 4 49 PCH_LCDVDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45
2 3 PCH_LCDVDD_EN
49 PCH_BKLT_CTL P45 L_BKLTCTL SDVO_STALLN AM42
SRN100KJ-6-GP AM40
SDVO_STALLP
T40 L_DDC_CLK
K47 L_DDC_DATA SDVO_INTN AP39
SDVO_INTP AP40
T45 L_CTRL_CLK
P39 L_CTRL_DATA
AF37 LVD_IBG SDVO_CTRLCLK P38 PCH_HDMI_CLK 51
AF36 LVD_VBG SDVO_CTRLDATA M39 PCH_HDMI_DATA 51
AE48 LVD_VREFH
AE47 LVD_VREFL DDPB_AUXN AT49
DDPB_AUXP AT47
DDPB_HPD AT40 HDMI_PCH_DET 51
AK39 LVDSA_CLK#
LVDS
AK40 LVDSA_CLK DDPB_0N AV42 HDMI_DATA2_R# 51
DDPB_0P AV40 HDMI_DATA2_R 51
AN48 LVDSA_DATA#0 DDPB_1N AV45 HDMI_DATA1_R# 51
C AM47 AV46 C
LVDSA_DATA#1 DDPB_1P HDMI_DATA1_R 51
Digital Display Interface

AK47 LVDSA_DATA#2 DDPB_2N AU48 HDMI_DATA0_R# 51
AJ48 LVDSA_DATA#3 DDPB_2P AU47 HDMI_DATA0_R 51
DDPB_3N AV47 HDMI_CLK_R# 51
AN47 LVDSA_DATA0 DDPB_3P AV49 HDMI_CLK_R 51
AM49 LVDSA_DATA1
AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
AH47 LVDSB_DATA#1
AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
AH43 LVDSB_DATA0 DDPC_1P AY45
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
AF43 LVDSB_DATA3 DDPC_3N BB47
DDPC_3P BB49
N48 CRT_BLUE DDPD_CTRLCLK M43

P49 CRT_GREEN DDPD_CTRLDATA M36
T49 CRT_RED
3D3V_S0
B B
DDPD_AUXN AT45
CRT
RN1706 T39 AT43
PCH_HDMI_DATA CRT_DDC_CLK DDPD_AUXP
1 4 M40 CRT_DDC_DATA DDPD_HPD BH41
PCH_HDMI_CLK 2 3
DDPD_0N BB43
SRN2K2J-1-GP M47 BB45
CRT_HSYNC DDPD_0P
M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
DDPD_2N BF42
DAC_IREF_R T43 BE42
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42
2
DDPD_3P BG42
R1701
1KR1F-GP PANTHER-GP-NF 71.PANTH.00U
1
if use CRT change 1K to +/- 0.5%

(64.10016.6DL)
A Helium A
Wistron Corporation
Title
PCH (LVDS/CRT/DDI)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1E 5 OF 10
RSVD1 AY7
RSVD2 AV7
BG26 TP1 RSVD3 AU3
BJ26 TP2 RSVD4 BG4
BH25 TP3
D BJ16 TP4 RSVD5 AT10 D
BG16 TP5 RSVD6 BC8
AH38 TP6
AH37 TP7 RSVD7 AU2
AK43 TP8 RSVD8 AT4
AK45 TP9 RSVD9 AT3
C18 TP10 RSVD10 AT1
N30 TP11 RSVD11 AY3
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
AM4 TP14 RSVD14 AV1
AM5 TP15 RSVD15 BB1
Y13 TP16 RSVD16 BA3
K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3
AB46 TP19 RSVD19 BB7
AB45 TP20 RSVD20 BE8
RSVD
RSVD21 BD4
RSVD22 BF6
B21 TP21 RSVD23 AV5

M20 TP22 RSVD24 AV10
AY16 TP23
BG46 TP24 RSVD25 AT8
RSVD26 AY5
RSVD27 BA2
62 USB30_RN1 BE28 USB3RN1
62 USB30_RN2 BC30 USB3RN2 RSVD28 AT12
C BE32 BF3 C
USB3RN3 RSVD29
BJ32
62 USB30_RP1
62 USB30_RP2
BC28
BE30
USB3RN4
USB3RP1 20120404 GPIO USB Table
USB3RP2
BF32
BG32
USB3RP3
C24 USB_PN0 62
Pair Device
USB3RP4 USBP0N
62 USB30_TN1 AV26 USB3TN1 USBP0P A24 USB_PP0 62 0 USB3.0 Ext. port 2
62 USB30_TN2 BB26 USB3TN2 USBP1N C25 USB_PN1 62
AU28 USB3TN3 USBP1P B25 USB_PP1 62 1 USB3.0 Ext. port 1
AY30 USB3TN4 USBP2N C26
62 USB30_TP1 AU26 USB3TP1 USBP2P A26 2 NC
62 USB30_TP2 AY26 USB3TP2 USBP3N K28 USB_PN3 49
AV28 USB3TP3 USBP3P H28 USB_PP3 49 3 touch screen
AW30 USB3TP4 USBP4N E28 USB_PN4 32
USBP4P D28 USB_PP4 32 4 Card Reader
USBP5N C28 USB_PN5 65
USBP5P A28 USB_PP5 65 5 BT(MD222)
USBP6N C29 USB_PN6 49
USBP6P B29 USB_PP6 49 6 CCD
RN1801 INT_PIRQA# K40 N28
SRN8K2J-2-GP-U INT_PIRQB# PIRQA# USBP7N
K38 PIRQB# USBP7P M28 7 X
PCI
CIO_PLUG_EVENT_PCH 1 10 3D3V_S0 INT_PIRQC# H38 L30
INT_PIRQD# Touch_Screen_INT INT_PIRQD# PIRQC# USBP8N
2 9 G38 PIRQD# USBP8P K30 8 X
INT_PIRQC# 3 8 INT_PIRQA# G30
INT_PIRQB# INT_PIRQE# USBP9N
4 7 C46 REQ1#/GPIO50 USBP9P E30 9 NC
USB
3D3V_S0 5 6 TP_IN# C44 C30
REQ2#/GPIO52 USBP10N
E40 REQ3#/GPIO54 USBP10P A30 10 NC
USBP11N L32
B
D47 GNT1#/GPIO51 USBP11P K32 11 NC B
E42 GNT2#/GPIO53 USBP12N G32
F46 GNT3#/GPIO55 USBP12P E32 12 NC
USBP13N C32
USBP13P A32
INT_PIRQE# G42
-SD
49 Touch_Screen_INT
CIO_PLUG_EVENT_PCH G40
C42
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4 USBRBIAS# C33 USB_RBIAS 1 R1804 2
69 TP_IN# D44 22D6R1F-GP
PIRQH#/GPIO5
USBRBIAS B33
K10 PME# 3D3V_PCH_DS3
C6 A14
-SB 5,27,36,65,71,81,97 PLT_RST# PLTRST# OC0#/GPIO59
OC1#/GPIO40 K20
1
LAB OC2#/GPIO41 B17
R1801 1 2 22R1J-GP CLK_PCI_LPC_R H49 C16 R1805
71 CLK_PCI_LPC R1802 22R1J-GP CLK_PCI_FB_R CLKOUT_PCI0 OC3#/GPIO42 10KR1J-GP
20 CLK_PCI_FB 1 2 H43 CLKOUT_PCI1 OC4#/GPIO43 L16
R1803 1 2 22R1J-GP CLK_PCI_KBC_R J48 A16
27 CLK_PCI_KBC R1806 22R1J-GP CLK_PCI_TPM_R CLKOUT_PCI2 OC5#/GPIO9
1 2 K42 D14
2
81 CLK_PCI_TPM CLKOUT_PCI3 OC6#/GPIO10 USB_OC
TPM H40 CLKOUT_PCI4 OC7#/GPIO14 C14
CLK_PCI_TPM PANTHER-GP-NF
CLK_PCI_LPC
71.PANTH.00U
CLK_PCI_FB
CLK_PCI_KBC
OC[3:0]# for Device 29 (Ports 0-7)
DY DY DY DY
EC1801
SC22P25V1JN-GP
EC1802
SC22P25V1JN-GP
EC1803
SC22P25V1JN-GP
EC1804
SC22P25V1JN-GP
A OC[7:4]# for Device 26 (Ports 8-13) A Sku A

1
Wistron Corporation
2

Title
PCH (PCI/USB/NVRAM)
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1C 3 OF 10
4 DMI_RXN[3:0] FDI_TXN[7:0] 4
DMI_RXN0 BC24 BJ14 FDI_TXN0
DMI_RXN1 DMI0RXN FDI_RXN0 FDI_TXN1
BE20 AY14
BG18 BE14
Signal Routing Guideline: BG20 BH13
DMI3RXN FDI_RXN3 FDI_TXN4
4 DMI_RXP[3:0] BC12
FDI_RXN4
DMI_ZCOMP keep W=4 mils and DMI_RXP0 BE24
DMI0RXP FDI_RXN5
BJ12 FDI_TXN5
DMI_RXP1 BC20 BG10 FDI_TXN6
routing length less than 500 mils. DMI_RXP2 BJ18
DMI1RXP FDI_RXN6
BG9 FDI_TXN7
DMI_RXP3 DMI2RXP FDI_RXN7
DMI_IRCOMP keep W=4 mils and BJ20 FDI_TXP[7:0] 4
DMI3RXP FDI_TXP0
D 4 DMI_TXN[3:0] BG14 D
FDI_RXP0
routing length less than 500 mils. DMI_TXN0 AW24
DMI0TXN FDI_RXP1
BB14 FDI_TXP1
DMI_TXN1 AW20 BF14 FDI_TXP2
DMI_TXN2 DMI1TXN FDI_RXP2 FDI_TXP3
BB18 BG13
DMI_TXN3 DMI2TXN FDI_RXP3 FDI_TXP4
AV18 BE12
DMI3TXN FDI_RXP4
DMI
FDI
BG12 FDI_TXP5
4 DMI_TXP[3:0] FDI_RXP5
DMI_TXP0 AY24 BJ10 FDI_TXP6
DMI_TXP1 DMI0TXP FDI_RXP6 FDI_TXP7
AY20 BH9
DMI_TXP2 DMI1TXP FDI_RXP7
AY18
DMI_TXP3 DMI2TXP
AU18
DMI3TXP
AW16
FDI_INT FDI_INT 4 For platforms not supporting Deep S4/S5
1D05V_VTT BJ24
DMI_ZCOMP FDI_FSYNC0
AV12 FDI_FSYNC0 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1901 1 2 49D9R1F-GP DMI_COMP_R BG25
DMI_IRCOMP FDI_FSYNC1
BC10 FDI_FSYNC1 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21
DMI2RBIAS FDI_LSYNC0
AV14 FDI_LSYNC0 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
DY FDI_LSYNC1
BB10 FDI_LSYNC1 4 4.SUSWARN# used as SUSPWRDNACK/GPIO30
R1906
1 2 SYS_PWROK
10KR1J-GP DY
1 R1904 2 PWROK A18 DSWODVREN R1910
100KR1J-GP DSWVRMEN PM_RSMRST#
1 2
0R2J-L-GP
System Power Management

27 PM_SUSACK# C12 E22 PCH_DPWROK 27
SUSACK# DPWROK 3D3V_S0
1
3D3V_S0 R1905 1 2 10KR1J-GP SYS_RESET# K3 B9 PCH_PCIE_WAKE# R1929 R1913
SYS_RESET# WAKE# 100KR1J-GP PM_CLKRUN# 1 2
DS3 8K2R1J-GP
P12 N3 PM_CLKRUN# DY
36 SYS_PWROK
1
SYS_PWROK CLKRUN#/GPIO32
R1931
27 S0_PWR_GOOD 2 R1903 1
0R0402-PAD
PWROK L22
PWROK SUS_STAT#/GPIO61
G8 PM_SUS_STAT# 81 For 0104 GPIO TPM -SD 100KR1J-GP
2
L10 N14
APWROK SUSCLK/GPIO62
B13 D10
37 PM_DRAM_PWRGD DRAMPWROK SLP_S5#/GPIO63
C C
PM_RSMRST# C21 H4 DSWODVREN - On Die DSW VR Enable

RSMRST# SLP_S4# PM_SLP_S4# 27,46
HIGH Enabled (DEFAULT)

27 PM_SUSWARN# K16 F4 PM_SLP_S3# 27
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3#
LOW Disabled
27,97 PM_PWRBTN# E20 G10
PWRBTN# SLP_A#
H20 G16 RTC_AUX_S5

3D3V_S5 27 AC_PRESENT ACPRESENT/GPIO31 SLP_SUS# PM_SLP_SUS# 27,80
BATLOW# E10
BATLOW#/GPIO72 PMSYNCH
AP14 H_PM_SYNC 5
-SD R1915 1 2 330KR2J-L1-GP
R1927 2 DY1 BATLOW#
10KR2J-L-GP H_PM_SYNC 1 TP1905
PM_RI# A10 K14 DSWODVREN
R1932 2 DY1
-SD AC_PRESENT
RI# SLP_LAN#/GPIO29
10KR2J-L-GP PANTHER-GP-NF 71.PANTH.00U
R1924 2 DY1 PM_SUSWARN# PM_RSMRST# 1 R1917 2 RSMRST#_KBC 27

10KR2J-L-GP 3D3V_AUX_S5 1KR1J-GP
D
3D3V_PCH_DS3
Q1901
G LSK3541G1ET2L-GP
2
R1925 2 1 BATLOW# 84.03541.F31

10KR2J-L-GP R1916 3D3V_PCH_DS3 3D3V_AUX_S5
10KR1J-GP
R1926 2 1 PM_RI#
-SE
S
10KR2J-L-GP
1
2
R1907
2 1 PCH_PCIE_WAKE# DY
10KR2J-L-GP R1911 R1909
3V_5V_POK_# Q1902 10KR2J-L-GP 100KR1J-GP
S
LSK3541G1ET2L-GP
R1928
2 DY1 PM_SUSACK# 84.03541.F31
2
1
10KR2J-L-GP
B G Q1902_R 1 R1933 2 B
R1923
2
DY
1
-SD
PM_SUSWARN#
0R0402-PAD
3V_5V_POK 41
10KR2J-L-GP
D
2 R1918 1 PM_SLP_SUS#
DY
1
R1908 2 PM_RSMRST# C1901 1KR1J-GP
1
10KR2J-L-GP SCD1U10V1KX-GP
A A
Helium
Wistron Corporation
Title
PCH (DM I/FDI/PM)
A2
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
3D3V_PCH_DS3
RN2008
SRN2K2J-1-GP
SMB_CLK 4 1
SMB_DATA 3 2
RN2004
SRN2K2J-1-GP
SML0_DATA 4 1
SML0_CLK 3 2
D RN2005 D
SRN2K2J-1-GP
SML1_CLK 4 1
SML1_DATA 3 2
PCH1B 2 OF 10
RN2006
BG34 PCH_GPIO74 2 3
PERN1 EC_SWI# EC_SWI#
BJ34 E12 1 4
PERP1 SMBALERT#/GPIO11
For SIV,please near to PCH AV32
AU32
PETN1
H14 SMB_CLK SRN10KJ-11-GP-U
PETP1 SMBCLK
TP2001
BE34 C9 SMB_DATA DRAMRST_CNTRL_PCH 1 R2009 2
PCIE_RXN4 PERN2 SMBDATA 1KR1J-GP
1 BF34
BB32
PERP2
PETN2
NC
AY32
TPAD14-OP-GP PETP2
SMBUS
TP2002 A12
SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 37
BG36
PCIE_RXP4 PERN3 SML0_CLK
1 BJ36 C8
AV34
PERP3
PETN3
NC SML0CLK
AU34 G12 SML0_DATA
TPAD14-OP-GP PETP3 SML0DATA
65 PCIE_RXN4 BF36
PERN4
BE36
65 PCIE_RXP4
C2001 1 2 SCD1U10V1KX-GP PCIE_TXN4_C AY34
PERP4 WLAN C13 PCH_GPIO74
65
65
PCIE_TXN4
PCIE_TXP4 C2002 1 2 SCD1U10V1KX-GP PCIE_TXP4_C BB34
PETN4
PETP4
SML1ALERT#/PCHHOT#/GPIO74
SML1CLK/GPIO58
E14 SML1_CLK 27,28
3D3V_S0 -1
PCI-E*
BG37 RN2007
PERN5
BH37 M16 SML1_DATA 27,28
PERP5 SML1DATA/GPIO75
AY36 2 3
PETN5
BB36 1 4
PETP5
BJ38
PERN6 SRN2K2J-1-GP
BG38
PERP6 3D3V_S0
Controller
AU36
AV36
PETN6 Thunderbolt CL_CLK1
M7
PETP6
2
Link
BG40 T11 Q2001
PERN7 CL_DATA1 R2004 SMB_DATA
BJ40 6 1 PCH_SMBDATA 69
PERP7
AY40 10KR1J-GP
PETN7
C BB40 P10 5 2 C
PETP7 CL_RST1#
1
BE38 PEG_CLKREQ#_R 4 3
PERN8
BC38
PERP8 2N7002KDW-GP
AW38
PETN8
AY38
PETP8 84.2N702.A3F
2nd = 84.DM601.03F
M10 PEG_CLKREQ#_R
PEG_A_CLKRQ#/GPIO47 PCH_SMBCLK 69
Y40
CLKOUT_PCIE0N SMB_CLK
Y39
CLKOUT_PCIE0P
AB37
PCIE_CLK_REQ0# CLKOUT_PEG_A_N
CLOCKS
J2 AB38
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P
AB49 AV22 CLK_EXP_N 5

CLKOUT_PCIE1N CLKOUT_DMI_N
AB47 AU22 CLK_EXP_P 5
CLKOUT_PCIE1P CLKOUT_DMI_P
[TP pin define]
PCIE_CLK_REQ1# M1 -SB David
PCIECLKRQ1#/GPIO18
AM12 CLK_DP_N 5 Reserve for TP Smbus,
CLKOUT_DP_N
AM13 CLK_DP_P 5 default DY to avoid crosstalk with L5 DDR bus
CLKOUT_DP_P
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P CLK_BUF_EXP_N
BF18
PCIE_CLK_REQ2# CLKIN_DMI_N CLK_BUF_EXP_P
V10 BE18
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P 3D3V_S0 3D3V_S0
UMA_DISCRETE#
65 PCIE_CLK_WLAN#
Y37
CLKOUT_PCIE3N CLKIN_GND1_N
BJ30 CLK_BUF_CPYCLK_N UMA: 1 1
Y36 BG30 CLK_BUF_CPYCLK_P
WLAN DIS :0 1
2
65 PCIE_CLK_WLAN CLKOUT_PCIE3P CLKIN_GND1_P
3D3V_PCH_DS3 A8 R2011 R2012
65 PCIE_WLAN_CLKREQ# PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N
SG(PX) : 0 0
G24 10KR1J-GP 10KR1J-GP
CLKIN_DOT_96N
RN2001
CLKIN_DOT_96P
E24 CLK_BUF_DOT96_P Optimus(Muxless) : 1 0
SRN10KJ-10-GP-U Y43
-SE
1
PCIE_CLK_REQ0# CLKOUT_PCIE4N
1 8 Y45
PCIE_WLAN_CLKREQ# CLKOUT_PCIE4P CLK_BUF_CKSSCD_N
2 7 AK7 UMA_DIS# 22
PCIE_CLK_REQ4# PCIE_CLK_REQ4# CLKIN_SATA_N CLK_BUF_CKSSCD_P DGPU_PRSNT#
3 6 L12 AK5
PCIE_LAN_CLKREQ# PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
4 5
R2013 10KR1J-GP
V45 K45 CLK_BUF_REF14 2 1
RN2002 CLKOUT_PCIE5N REFCLK14IN
V46
SRN10KJ-10-GP-U CLKOUT_PCIE5P
B 1 8 PEG_B_CLKRQ# PCIE_LAN_CLKREQ# L14 H45 RN2009 B
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK CLK_PCI_FB 18
2 7 PCIE_CLK_REQ6# CLK_BUF_CKSSCD_P 2 3
3 6 PCIE_CLK_REQ7# CLK_BUF_CKSSCD_N 1 4
4 5 AB42 V47 XTAL25_IN
CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT SRN10KJ-11-GP-U
AB40 V49
CLKOUT_PEG_B_P XTAL25_OUT RN2012
PEG_B_CLKRQ# E6 CLK_BUF_CPYCLK_P 2 3
PEG_B_CLKRQ#/GPIO56 CLK_BUF_CPYCLK_N 1 4
3D3V_S0 Y47 XCLK_RCOMP 1 R2007 2
XCLK_RCOMP 1D05V_VTT
RN2011 V40 90D9R2F-1-GP SRN10KJ-11-GP-U
PCIE_CLK_REQ1# CLKOUT_PCIE6N RN2013
2 3 V42
PCIE_CLK_REQ2# CLKOUT_PCIE6P CLK_BUF_EXP_P
1 4 2 3
PCIE_CLK_REQ6# T13 CLK_BUF_EXP_N 1 4
PCIECLKRQ6#/GPIO45
SRN10KJ-11-GP-U 48MHZ
CLK48 1 R2014 SRN10KJ-11-GP-U
PCIECLKRQ1# and PCIECLKRQ2# V38 K43 2 CLK48_Cardreader 32
FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 RN2014

V37
CLKOUT_PCIE7P
1
Support S0 power only PCIE_CLK_REQ7# CLKOUTFLEX1/GPIO65
F47 DRAM_TYPE2 33R1J-GP
EC2001
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
2 3
K12 1 4
PCIECLKRQ7#/GPIO46 DRAM_TYPE3 SC10P50V2JN-4GP
H47
2
CLKOUTFLEX2/GPIO66 SRN10KJ-11-GP-U
AK14
CLKOUT_ITPXDP_N DGPU_PRSNT#
AK13 K49
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
PANTHER-GP-NF
71.PANTH.00U
As Flex clocks, can be configured as 48 MHz/
24 MHz, 33 MHz, 27 MHz (Spread or Nonspread),
2012/05/23 For DRAM Setting 3D3V_S0 14.318 MHz. Refer to the PCH External
Design Specification (EDS) for configuration
-SE options of Flex Clocks.
C2006 SC15P50V2JN-2-GP
XTAL25_IN 2 1 -SD
1
R2015 R2016 R2017 X2001

10KR1J-GP 10KR1J-GP 10KR1J-GP XTAL-25MHZ-202-GP
Single HYNIX ELPIDA 8G
1 4
2
A R2006 A
82.30020.I61
22 DRAM_TYPE1 1M1R1F-GP 2ND = 82.30020.K21
DRAM_TYPE2 2 3
DRAM_TYPE3
2
C2005 Helium
1
XTAL25_OUT 1 2
R2018 R2019 R2022
10KR1J-GP 10KR1J-GP 10KR1J-GP SC15P50V2JN-2-GP Wistron Corporation
Dual ELPIDA Hynix_ELPIDA_4G_2G 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
PCH (PCI-E/SMBUS/CLOCK/CL)
A2
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH RTC_AUX_S5
RTC_X1
2 R2108 1 200KR2F-L-GP INTVRMEN- Integrated SUS
2 R2110 1 200KR2F-L-GP
1 R2101 2 RTC_X2 1.05V VRM Enable
SCD1U10V2KX-5GP
1
10MR1J-GP High - Enable internal VRs
C2103
Low - Enable external VRs
-SD
2
D PCH1A 1 OF 10 D
LPC_AD[0..3] 27,71,81
X2101 -SB David
1 2 height concern,do not change to 0603, RTC_X1 A20 C38 LPC_AD0
RTCX1 FWH0/LAD0 LPC_AD1
so change C from 1uF to 0.1uF FWH1/LAD1 A38
LPC
RTC_X2 C20 B37 LPC_AD2
RTCX2 FWH2/LAD2
1
1
XTAL-32D768KHZ-30-GP change R from 20K to 200K for AFR C37 LPC_AD3
C2102 RTC_RST# FWH3/LAD3
82.30001.D51 D20 RTCRST#
2ND = 82.30001.C61 SC18P50V2JN-1-GP D36 LPC_FRAME# 27,71,81
2
2 FWH4/LFRAME#
2
C2101 SRTC_RST# G22 SRTCRST#
1
SC18P50V2JN-1-GP G2101
C2104
E36
SCD1U10V2KX-5GP
LDRQ0#
RTC
GAP-OPEN 2 R2104 1 SM_INTRUDER# K22 K36
1MR1J-GP INTRUDER# LDRQ1#/GPIO23
2
RTC_AUX_S5 1 R2105 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27,81
1
330KR1F-GP INTVRMEN SERIRQ
SATA0RXN AM3 SATA_RXN0 56

HDA_BITCLK N34 AM1
Layout Note:
RTC HDA_BCLK SATA0RXP
AP7
SATA_RXP0 56
mSATA
SATA 6G
SATA0TXN SATA_TXN0 56
HDA_SYNC L34 AP5
Place close together. Reset HDA_SYNC SATA0TXP SATA_TXP0 56
1 2 HDA_SDOUT T10 AM10 SATA_RXN1 56

29 HDA_CODEC_SDOUT R2120 33R2J-L1-GP 29 HDA_SPKR SPKR SATA1RXN
AM8
Layout Note: HDA_RST# K34 HDA_RST#
SATA1RXP
SATA1TXN AP11
SATA_RXP1
SATA_TXN1
56
56 mSATA
SATA1TXP AP10 SATA_TXP1 56
29 HDA_CODEC_RST# 1 2 HDA_RST# HDA_SDO and HDA_BCLK must be
R2121 33R2J-L1-GP length matched to within 500 mils 29 HDA_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
SATA2RXP AD5
G34 HDA_SDIN1 SATA2TXN AH5
1 2 HDA_BITCLK AH4
C 29 HDA_CODEC_BITCLK R2122 33R2J-L1-GP SATA2TXP C
C34 HDA_SDIN2
IHDA
SATA3RXN AB8
Flash Descriptor Security Overide A34 HDA_SDIN3 SATA3RXP AB10
R2107 AF3
1KR1J-GP SATA3TXN
Low = Default SATA3TXP AF1
HDA_SDOUT 1 2 HDA_SDOUT A36
High = Enable 27 ME_UNLOCK HDA_SDO
SATA
SATA4RXN Y7
SATA4RXP Y5
No Reboot Strap C36 HDA_DOCK_EN#/GPIO33 SATA4TXN AD3
SATA4TXP AD1
Low = Default N32 HDA_DOCK_RST#/GPIO13
HDA_SPKR High = No Reboot SATA5RXN Y3
+3VS_+1.5VS_HDA_IO Y1
R2115 SATA5RXP
SATA5TXN AB3
1 2 PCH_JTAG_TCK_BUF J3 AB1
JTAG_TCK SATA5TXP
1 R2102 2 HDA_SDOUT 1D05V_VTT
4K7R1J-GP H7 JTAG_TMS SATAICOMPO Y11 TP2111
JTAG
1KR1J-GP R2112
K5 Y10 SATA_COMP 1 37D4R2F-GP
2 1 HDA_SDIN0
DY JTAG_TDI SATAICOMPI
PLL ODVR VOLTAGE H1
Low = 1.8V (Default)

JTAG_TDO
SATA3RCOMPO AB12
TPAD14-OP-GP
-SD
+3VS_+1.5VS_HDA_IO HDA_SYNC High = 1.5V AB13 SATA3_COMP 1 R2113 2
SATA3COMPI 49D9R1F-GP
1 R2103 2 HDA_SYNC 60 PCH_SPI_CLK T3 SPI_CLK SATA3RBIAS AH1 RBIAS_SATA3 1 R2114 2

1KR1J-GP 750R2F-GP
27,60 PCH_SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14
B R2109 33R1J-GP SPI_CS0# B
27 PCH_SPI_CS1#_R 1 2 PCH_SPI_CS1# T1 3D3V_S0

SPI_CS1#
SPI
R2118 33R1J-GP P3 SATA_LED# RN2103
SATALED# SRN10KJ-10-GP-U
DY
HDA_CODEC_SYNC 1 2 HDA_SYNC 60 PCH_SPI_MOSI V4 V14 SATA_DET#0 SATA_LED# 1 8
29 HDA_CODEC_SYNC SPI_MOSI SATA0GP/GPIO21
R2116 33R1J-GP INT_SERIRQ 2 7
60 PCH_SPI_MISO U3 P1 SATA_DET#0 3 6
HDA_SYNC_R HDA_SYNC SPI_MISO SATA1GP/GPIO19
1 2 4 5
5V_S0 R2106 33R1J-GP
PANTHER-GP-NF 71.PANTH.00U Strap pin ,Internal PU
D
Q2101
G LSK3541G1ET2L-GP
84.03541.F31
For AFR
RTC_RST#
S
D
HDA_CODEC_SYNC
Q2102
G LSK3541G1ET2L-GP
27 RTCRST_ON
HDA_SYNC: 84.03541.F31
This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode.
1K external pull-up resistor is required on this signal on the board.
S
Signal may have leakage paths via powered off devices(Audio Codec)
1
RTC_RST#_R
and hence contend with the external pull-up. HDA_CODEC_BITCLK R2117
A A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device HDA_CODEC_SDOUT 100KR1J-GP Helium A
1
until after the Strap sampling is complete.
EC2102
SC4D7P50V2CN-1GP
EC2103
SC4D7P50V2CN-1GP
R2119
2
2K2R1J-GP
Wistron Corporation
2
DY DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

2

1
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
Note:
For PCH debug with XDP, need to NO STUFF R2218 PCH1F 6 OF 10
TP2201
3D3V_S0 S_GPIO T7 C40 TP_GPIO68 1
BMBUSY#/GPIO0 TACH4/GPIO68 TPAD14-OP-GP
RN2203 EC_SMI# A42 B41 UMA_DIS# 20
H_RCIN# TACH1/GPIO1 TACH5/GPIO69
1 4
2 3 H_A20GATE DGPU_HPD_INTR# H36 C41
TACH2/GPIO6 TACH6/GPIO70
D D
SRN10KJ-11-GP-U EC_SCI# E38 A40
27 EC_SCI# TACH3/GPIO7 TACH7/GPIO71
PCH:no Turbo control via PECI
ICC_EN# C10 GPIO8
KBC(Recommended):EC collect all thermal data and
PCH_GPIO12 C4 Performs Turbo power control
LAN_PHY_PWR_CTRL/GPIO12
PCH_GPIO15 G2 P4 H_A20GATE H_A20GATE 27
GPIO15 A20GATE
AU16 H_PECI_R 1 DY 2
PECI H_PECI 5,27
3D3V_S0 1 R2202 2 PCH_GPIO16 U2 SATA4GP/GPIO16
R2203 0R1J-GP
10KR1J-GP P5 H_RCIN# H_RCIN# 27
RCIN#
GPIO
SATA_RAID0 D40 TACH0/GPIO17 PROCPWRGD AY11 H_CPUPW RGD 5,36,97
CPU/MISC
RAID 0 mSATA H 56 SATA_RAID0
T5 SCLOCK/GPIO22 THRMTRIP# AY10 PCH_THERMTRIP_R 1 R2204 2
390R2F-2GP
H_THERMTRIP# 5,36
Normally mSATA L E8 GPIO24 INIT3_3V# T14
2 PCH_GPIO27 NV_CLE 1D8V_S0

27 PCH_GPIO27# 1
R2223
DY 0R1J-GP
E16 GPIO27 DF_TVS AY1
PLL_ODVR_EN P8 GPIO28
1
TS_VSS1 AH8
PSW _CLR# K1 R2207
STP_PCI#/GPIO34 2K2R1J-GP
TS_VSS2 AK11
GPIO35 K4 GPIO35
2
AH10 Layout Note:
2
G2201 DMI_OVRVLTG TS_VSS3
V8
GAP-OPEN SATA2GP/GPIO36
AK10 These four balls must NV_CLE 1 2
C Pass Word Clear FDI_OVRVLTG M5 SATA3GP/GPIO37
TS_VSS4
connect to GND shared 1 Via R2229 1KR1J-GP
H_SNB_IVB# 5 C
1
MFG_MODE N2 P37
SLOAD/GPIO38 NC_1
EDP#_LVDS M3 FDI_OVRVLTG
SDATAOUT0/GPIO39 FDI TERMINATION VOLTAGE OVERRIDE(Reserved)
3D3V_S0 V13 BG2
20 DRAM_TYPE1 SDATAOUT1/GPIO48 VSS_NCTF_15#BG2
1
RN2201
SRN10KJ-10-GP-U PCH_TEMP_ALERT# V3 BG48 R2208
SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48 FDI_OVRVLTG
1 8 EC_SMI# 10KR1J-GP LOW - Tx, Rx terminated to same voltage
2 7 EC_SCI# USB3_PW R_ON D6 BH3 (GPIO37) (DC Coupling Model DEFAULT)
DGPU_HPD_INTR# GPIO57 VSS_NCTF_17#BH3
3 6
2
4 5 PCH_TEMP_ALERT# BH47
VSS_NCTF_18#BH47
A4 VSS_NCTF_1#A4 VSS_NCTF_19#BJ4 BJ4
RN2202 DMI_OVRVLTG
NCTF
SRN10KJ-10-GP-U A44 BJ44 DMI TERMINATION VOLTAGE OVERRIDE(Reserved)
PSW _CLR# VSS_NCTF_2#A44 VSS_NCTF_20#BJ44
1 8
1
2 7 GPIO35 A45 BJ45
MFG_MODE VSS_NCTF_3#A45 VSS_NCTF_21#BJ45 R2209
3 6
4 5 S_GPIO A46 BJ46 10KR1J-GP DMI_OVRVLTG LOW - Tx, Rx terminated to same voltage
EDP#_LVDS VSS_NCTF_4#A46 VSS_NCTF_22#BJ46
(GPIO36) (DC Coupling Model DEFAULT)
A5 BJ5
2
VSS_NCTF_5#A5 VSS_NCTF_23#BJ5
2
A6 VSS_NCTF_6#A6 VSS_NCTF_24#BJ6 BJ6
A4,A44,A45,A46,A5,A6,B3,B47,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
R2214
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
10KR1J-GP B3 VSS_NCTF_7#B3 VSS_NCTF_25#C2 C2 Internal Pull Down
3D3V_PCH_DS3 B47 C48
1
B VSS_NCTF_8#B47 VSS_NCTF_26#C48 B
D49,E1,E49,F1,F49
RN2206 BD1 D1
USB3_PW R_ON VSS_NCTF_9#BD1 VSS_NCTF_27#D1
1 4
NCTF TEST PIN:

2 3 PCH_GPIO12 BD49 D49 ICC_EN#
VSS_NCTF_10#BD49 VSS_NCTF_28#D49 Integrated Clock Chip Enable(Reserved)
2
SRN10KJ-11-GP-U BE1 E1
VSS_NCTF_11#BE1 VSS_NCTF_29#E1 R2211
1 R2201 2 PCH_GPIO15 BE49 E49 1KR1J-GP ICC_EN# HIGH- DISABLED [DEFAULT]
1KR1J-GP VSS_NCTF_12#BE49 VSS_NCTF_30#E49
(GPIO8)
BF1 F1
1
VSS_NCTF_13#BF1 VSS_NCTF_31#F1
LOW - ENABLED
BF49 VSS_NCTF_14#BF49 VSS_NCTF_32#F49 F49
3D3V_S5
PANTHER-GP-NF
71.PANTH.00U Internal PU
PLL_ODVR_EN PLL ON DIE VR ENABLE

1R2213 2 PCH_GPIO27
10KR1J-GP
2
HIGH- DISABLED [DEFAULT]
R2212 PLL_ODVR_EN
1KR1J-GP (GPIO28)
DY LOW - ENABLED
1
A Helium A
Wistron Corporation
Title
PCH (GPIO/CPU)
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
1D05V_VTT PCH1G POWER 7 OF 10

3D3V_S0
63mA
1.7A
AA23 VCCCORE1 VCCADAC U48
AC23 VCCCORE2
SC10U6D3V2MX-GP-U
C2302
SC1U6D3V2KX-L-1-GP
C2303
SC1U6D3V2KX-L-1-GP
C2304
SC1U6D3V2KX-L-1-GP
AD21
CRT
VCCCORE3
1
D C2301 AD23 U47 D
VCCCORE4 VSSADAC
AF21
VCC CORE
VCCCORE5
AF23
2
VCCCORE6
AG21 VCCCORE7
AG23 VCCCORE8
AG24 VCCCORE9 VCCALVDS AK36
AG26 VCCCORE10
AG27 VCCCORE11 VSSALVDS AK37
AG29 VCCCORE12
AJ23 VCCCORE13
LVDS
AJ26 VCCCORE14 VCCTX_LVDS1 AM37 Disable LVDS
AJ27 VCCCORE15
AJ29 VCCCORE16 VCCTX_LVDS2 AM38
AJ31 VCCCORE17
VCCTX_LVDS3 AP36
3.711A(Total) VCCTX_LVDS4 AP37

1D05V_VTT AN19 VCCIO28
1D05V_VTT BJ22 VCCAPLLEXP

3.711A(Total) VCC3_3_6 V33 228mA(Total)
HVCMOS
AN16 VCCIO15 3D3V_S0
C2306
SC1U6D3V2KX-L-1-GP
C2307
SC1U6D3V2KX-L-1-GP
C2308
SC1U6D3V2KX-L-1-GP
C2309
SC1U6D3V2KX-L-1-GP
AN17 VCCIO16
1
1
VCC3_3_7 V34
1
AN21 C2315
2
2
C VCCIO17 SCD1U10V2KX-L1-GP C
AN26 1D5V_S0
2
VCCIO18
167mA(Total)
AN27 VCCIO19 VCCVRM3 AT16
170mA(Total)
AP21 1D05V_VTT
VCCIO20
AP23 VCCIO21 VCCDMI1 AT20 47mA(Total)
1
DMI
AP24 VCCIO22
C2320 10u 1MHZ,200 mV 0.9ohm 90mA 30% to
VCCIO
SC1U6D3V2KX-L-1-GP
AP26 AB36
10u 1 MHZ,200 mV 0.5ohm 150mA 30%
2
VCCIO23 VCCCLKDMI
75mA
AT24 1D05V_VTT
VCCIO24 L2301
+1.05VS_VCC_DMI_CCI 1 2
AN33 VCCIO25 68.10050.10Z
C2321
SC1U6D3V2KX-L-1-GP
IND-10UH-222-GP
1
3D3V_S0 AN34 AG16
VCCIO26 VCCDFTERM1
228mA(Total)
2
BH29 VCC3_3_3 VCCDFTERM2 AG17
DFT / SPI
1
C2310 AJ16
VCCDFTERM3 1D8V_S0
SCD1U10V2KX-L1-GP 167mA(Total)
1D5V_S0 AP16 2mA
2
VCCVRM2
VCCDFTERM4 AJ17
B B
BG6 VCCAFDIPLL
-SC
1
3D3V_S0 3D3V_S5 C2305 C2319
10mA SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
1D05V_VTT AP17
2
VCCIO27 PCH_VCCSPI_R R2301
V1 1 2
FDI
VCCSPI 0R2J-2-GP
DY
1D05V_VTT AU20 VCCDMI2
1
47mA(Total) C2322
SCD1U10V2KX-L1-GP
PANTHER-GP-NF R2302
1 20R2J-2-GP
71.PANTH.00U
A Helium A
Wistron Corporation
Title
PCH (POWER1)
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
SSID = PCH PCH1J POWER 10 OF 10 1D05V_VTT
AD49 N26
3.711A(Total)
VCCACLK VCCIO29
1
1mA P26 C2423 3D3V_PCH_DS3
VCCIO30 SC1U6D3V2KX-L-1-GP
3D3V_S5 T16 VCCDSW3_3
P28
2
VCCIO31
Check here
A
3D3V_S0 V12 T27
DCPSUSBYP VCCIO32 D2401 5V_PCH_DS3
D 228mA(Total) VCCIO33 T29 RB520SM-30T2R-GP D
T38 3D3V_PCH_DS3
VCC3_3_5 83.1R003.N8F
95mA
K
1
C2402 T23 2nd = 83.R2003.V8F
SC1U10V2KX-1GP VCCSUS3_3_7
BH23 VCCAPLLDMI2
1
T24 C2419
2
VCCSUS3_3_8 SCD1U10V2KX-L1-GP
1D05V_VTT AL29 VCCIO14
V23 1 R2401 2
2
VCCSUS3_3_9
USB
10R2J-2-GP
AL24 V24 3D3V_PCH_DS3
DCPSUS3 VCCSUS3_3_10
1
C2422
P24 SCD1U10V2KX-L1-GP
VCCSUS3_3_6
2
1
AA19 C2421
VCCASW1 SCD1U10V2KX-L1-GP
VCCIO34 T26 1D05V_VTT
AA21
2
VCCASW2
+5VA_PCH_VCC5REFSUS
1mA
AA24 VCCASW3 V5REF_SUS M26
AA26 5V_S0
Clock and Miscellaneous

VCCASW4
DCPSUS4 AN23
1D05V_VTT AA27 VCCASW5
903mA VCCSUS3_3_1 AN24 3D3V_PCH_DS3 DEL D2402
AA29 VCCASW6
AA31 VCCASW7
C2406
SC1U6D3V2KX-L-1-GP
C2407
SC1U6D3V2KX-L-1-GP
C2408
SC1U6D3V2KX-L-1-GP
1mA
1
1
C2403 C2404 AC26 P34 +5VS_PCH_VCC5REF 1 R2402 2
VCCASW8 V5REF
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
10R2J-2-GP
C AC27 C
2
2
VCCASW9
1
N20 3D3V_PCH_DS3 C2427
VCCSUS3_3_2 SC1U10V2KX-1GP
PCI/GPIO/LPC
AC29 VCCASW10
N22
2
VCCSUS3_3_3
AC31 VCCASW11
1
10u 1MHZ,200 mV 0.9ohm 90mA 30% to VCCSUS3_3_4 P20 C2428
AD29 SC1U6D3V2KX-L-1-GP
10u 1 MHZ,200 mV 0.5ohm 150mA 30% VCCASW12
P22
2
VCCSUS3_3_5
AD31 VCCASW13
1D05V_VTT
W21 AA16 3D3V_S0
L2401 VCCASW14 VCC3_3_1
1 2 +1.05VS_VCCA_A_DPL W23 W16
VCCASW15 VCC3_3_8
68.10050.10Z
1
1
C2409 W24 T34 C2425 C2426
IND-10UH-222-GP SC1U6D3V2KX-L-1-GP VCCASW16 VCC3_3_4 SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
W26
2
2
VCCASW17
W29 3D3V_S0
VCCASW18
L2402
W31 VCCASW19 VCC3_3_2 AJ2
1 2 +1.05VS_VCCA_B_DPL
1
68.10050.10Z W33 C2424
VCCASW20
1
C2410 AF13 SCD1U10V2KX-L1-GP

IND-10UH-222-GP SC1U6D3V2KX-L-1-GP VCCIO5
2
+VCCRTCEXT N16 1D05V_VTT
2
DCPRTC
VCCIO12 AH13
1
C2411
SCD1U10V2KX-L1-GP 1D5V_S0 Y49 AH14
B VCCVRM4 VCCIO13 B
2
1
80mA AF14 C2429
+1.05VS_VCCA_A_DPL VCCIO6 SC1U6D3V2KX-L-1-GP
BD47 VCCADPLLA
SATA
AK1
2
+1.05VS_VCCA_B_DPL VCCAPLLSATA
80mA BF47 VCCADPLLB
VCCVRM1 AF11 1D5V_S0

1D05V_VTT C2412 AF17
1D05V_VTT SC1U6D3V2KX-L-1-GP VCCIO7
AF33 VCCDIFFCLKN1
1 2 AF34 VCCDIFFCLKN2 VCCIO2 AC16
55mA AG34 VCCDIFFCLKN3 1D05V_VTT
VCCIO3 AC17
1
C2414 95mA
SC1U6D3V2KX-L-1-GP C2413 AG33 AD17
1D05V_VTT
SC1U6D3V2KX-L-1-GP VCCSSC VCCIO4
-SB
2
1
1 2 C2401 +3VS_+1.5VS_HDA_IO
1 2 +VCCSST V16 SC1U6D3V2KX-L-1-GP
DCPSST 1D05V_VTT R2403
2
C2415 1 2 3D3V_PCH_DS3
SCD1U10V2KX-L1-GP T17 T21
DCPSUS1 VCCASW22
V19 DCPSUS2 0R0603-PAD
903mA
MISC
1D05V_VTT V21 DEL R2404

VCCASW23
1mA
CPU
BJ8 V_PROC_IO
C2417
SC4D7U6D3V2MX-GP-U
C2416
SCD1U10V2KX-L1-GP
C2418
SCD1U10V2KX-L1-GP
VCCASW21 T19
1
+3VS_+1.5VS_HDA_IO
A Helium A
95mA 10mA
2
HDA
A22 P32
RTC
RTC_AUX_S5 VCCRTC VCCSUSHDA

Wistron Corporation
1
6uA C2405
PANTHER-GP-NF SCD1U10V2KX-L1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
71.PANTH.00U 2
1
C2420 Title
SC1U6D3V2KX-L-1-GP DY PCH (POWER2)
2

A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
SSID = PCH PCH1I 9 OF 10
AY4 VSS159 VSS259 H46

AY42 VSS160 VSS260 K18
B11 VSS163 VSS263 K46
B15 VSS164 VSS264 K7
B19 VSS165 VSS265 L18
B23 VSS166 VSS266 L2
B27 VSS167 VSS267 L20
D B31 VSS168 VSS268 L26 D
PCH1H 8 OF 10 B35 L28
VSS169 VSS269
H5 VSS0 B39 VSS170 VSS270 L36
B7 VSS171 VSS271 L48
AA17 VSS1 VSS80 AK38 F45 VSS172 VSS272 M12
AA2 VSS2 VSS81 AK4 BB12 VSS173 VSS273 P16
AA3 VSS3 VSS82 AK42 BB16 VSS174 VSS274 M18
AB11 VSS6 VSS85 AL16 BB24 VSS177 VSS277 M30
AB7 VSS12 VSS91 AL26 BC14 VSS183 VSS283 M46
AC19 VSS13 VSS92 AL27 BC18 VSS184 VSS284 M8
AC2 VSS14 VSS93 AL31 BC2 VSS185 VSS285 N18
AC21 VSS15 VSS94 AL33 BC22 VSS186 VSS286 P30
AC24 VSS16 VSS95 AL34 BC26 VSS187 VSS287 N47
AC33 VSS17 VSS96 AL48 BC32 VSS188 VSS288 P11
AC34 VSS18 VSS97 AM11 BC34 VSS189 VSS289 P18
AC48 VSS19 VSS98 AM14 BC36 VSS190 VSS290 T33
AD10 VSS20 VSS99 AM36 BC40 VSS191 VSS291 P40
AD13 VSS23 VSS102 AM45 BD46 VSS194 VSS294 P7
AD19 VSS24 VSS103 AM46 BD5 VSS195 VSS295 R2
AD24 VSS25 VSS104 AM7 BE22 VSS196 VSS296 R48
C AD26 AN2 BE26 T12 C
VSS26 VSS105 VSS197 VSS297
AD27 VSS27 VSS106 AN29 BE40 VSS198 VSS298 T31
AD33 VSS28 VSS107 AN3 BF10 VSS199 VSS299 T37
AD34 VSS29 VSS108 AN31 BF12 VSS200 VSS300 T4
AD36 VSS30 VSS109 AP12 BF16 VSS201 VSS301 W34
AD37 VSS31 VSS110 AP19 BF20 VSS202 VSS302 T46
AD4 VSS34 VSS113 AP32 BF26 VSS205 VSS305 V11
AD42 VSS36 VSS115 AP4 BD3 VSS207 VSS307 V26
AD8 VSS40 VSS119 AR2 BF8 VSS211 VSS311 V36
AE2 VSS41 VSS120 AR48 BG17 VSS212 VSS312 V39
AE3 VSS42 VSS121 AT11 BG21 VSS213 VSS313 V43
AF10 VSS43 VSS122 AT13 BG33 VSS214 VSS314 V7
AF12 VSS44 VSS123 AT18 BG44 VSS215 VSS315 W17
AD14 VSS45 VSS124 AT22 BG8 VSS216 VSS316 W19
AD16 VSS46 VSS125 AT26 BH11 VSS217 VSS317 W2
AF16 VSS47 VSS126 AT28 BH15 VSS218 VSS318 W27
AF19 VSS48 VSS127 AT30 BH17 VSS219 VSS319 W48
AF24 VSS49 VSS128 AT32 BH19 VSS220 VSS320 Y12
AF26 VSS50 VSS129 AT34 H10 VSS221 VSS321 Y38
B B
AF4 VSS55 VSS134 AU24 BH39 VSS226 VSS328 BG29
AF42 VSS56 VSS135 AU30 BH43 VSS227 VSS329 N24
AF46 VSS57 VSS136 AV16 BH7 VSS228 VSS330 AJ3
AF5 VSS58 VSS137 AV20 D3 VSS229 VSS331 AD47
AF7 VSS59 VSS138 AV24 D12 VSS230 VSS333 B43
AF8 VSS60 VSS139 AV30 D16 VSS231 VSS334 BE10
AG19 VSS61 VSS140 AV38 D18 VSS232 VSS335 BG41
AG2 VSS62 VSS141 AV4 D22 VSS233 VSS337 G14
AG31 VSS63 VSS142 AV43 D24 VSS234 VSS338 H16
AG48 VSS64 VSS143 AV8 D26 VSS235 VSS340 T36
AH11 VSS65 VSS144 AW14 D30 VSS236 VSS342 BG22
AH3 VSS66 VSS145 AW18 D32 VSS237 VSS343 BG24
AH36 VSS67 VSS146 AW2 D34 VSS238 VSS344 C22
AH39 VSS68 VSS147 AW22 D38 VSS239 VSS345 AP13
AH40 VSS69 VSS148 AW26 D42 VSS240 VSS346 M14
AH42 VSS70 VSS149 AW28 D8 VSS241 VSS347 AP3
AH46 VSS71 VSS150 AW32 E18 VSS242 VSS348 AP1
AH7 VSS72 VSS151 AW34 E26 VSS243 VSS349 BE16
AJ19 VSS73 VSS152 AW36 G18 VSS244 VSS350 BC16
AJ21 VSS74 VSS153 AW40 G20 VSS245 VSS351 BG28
AJ24 VSS75 VSS154 AW48 G26 VSS246 VSS352 BJ28
AJ33 VSS76 VSS155 AV11 G28 VSS247
AJ34 VSS77 VSS156 AY12 G36 VSS248
AK12 VSS78 VSS157 AY22 G48 VSS249
AK3 VSS79 VSS158 AY28 H12 VSS250
H18 VSS251
PANTHER-GP-NF H22 VSS252
H24 VSS253
A H26 VSS254 Helium A
H30 VSS255
H32 VSS256
H34
F3
VSS257
VSS258
Wistron Corporation
PANTHER-GP-NF Title
PCH (VSS)
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
Clock(colay)
A2
Helium -1
5 4 3 2 1
SSID = KBC 5 4
3D3V_AUX_S5
3 20111208-SA
D2701
2
SB_20120117_IOAC 1
RTC_AUX_S5 ECSCI#_KBC K A EC_SCI# 22 Wait KBC team assign GPIO
83.1R003.N8F 3D3V_IOAC
3D3V_AUX_S5 RB520SM-30T2R-GP
-SE
2
C2724 C2725 C2726 C2727 C2728 C2729
R2701
1
R2736 2nd = 83.R2003.V8F
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
2 1 KBC_VSTBY_127 0R0201-PAD-GP DY R2781
100KR2J-4-GP
2
C2719
0R0201-PAD-GP
1
-SC
2
SCD1U10V1KX-GP
C2722
2
AP_DET# 65
1
3D3V_AUX_S5
SCD1U10V1KX-GP
2
G690L293T73UF-GP
<-- CHECK
-SC 56 E51_RxD R2757 1
DY
0R2J-L-GP
2 E51_RXD_KBC R2782
PURE_HW_SHUTDOWN# 2
-SD 10KR2J-L-GP
DY
RESET#
VCC
3 (5) U2702 Change 74.00809.S7B
1
KBC_VBAT
1
3D3V_AUX_S5 GND
DY
EC_SLP_S3# EC_SLP_S4# 46
DY
D 3D3V_AUX_S5 3D3V_S0 EC_DRAMRST_GATE 37 1

2
RN2703
4
3
CHG_ON#
STOP_CHG#
U2702 2ND = 74.00809.S7B D
-SD 3D3V_S0 CIO_SCL_OD_R 1 R2759 2 CIO_SCL_OD_R S5_ENABLE 36
1
14K7R1J-GP 2 BAT_SCL 0R0201-PAD-GP SRN100KJ-6-GP
R2708
14K7R1J-GP 2 BAT_SDA
R2717 -SC
R2709
100KR1J-GP
-1 C2723 AVCC PCH_SPI_MOSI_KBC
PCH_SPI_MISO_KBC
60
60
2
1100KR1J-GP2 BAT_IN#
R2760 PCH_SPI_CLK_KBC 60
SCD1U10V1KX-GP
R2711 C2702 PCH_SPI_CS#_SW
1100KR1J-GP2 ECRST# 1 2 E51_RXD_KBC SCD1U10V1KX-GP
-SC
KBC_VCORE 1
49 SENSOR_INT
KBC_VSTBY_127
R2712
DY
-SD 33R2J-L1-GP
CIO_SDA_OD_R_EC 2 R2738
0R0201-PAD-GP
1 CIO_SDA_OD_R_EC S0_PWR_GOOD 19
110KR1F-GP 2 EC_DRAMRST_GATE PM_PWRBTN# 19,97

R2716
R2775
1 2 AD_OFF
D10
K10
A13
A12
B12
3D3V_AUX_S5
M3
1KR1J-GP
D4
D5
N2
N7
N8
D6
K4
E4
E9
K5
B7
A8
B8
A9
J5
J4
KBC1 -SB David
3D3V_S5 -SC
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY_PLL
VBAT
AVCC
VCORE
EGAD/WUI25/GPE1
EGCS#/WUI26/GPE2
EGCLK/WUI27/GPE3
L80HLAT/BAO/WUI24/GPE0
L80LLAT/WUI7/GPE7
HMOSI/WUI42/GPH6/ID6
HMISO/WUI41/GPH5/ID5
HSCK/WUI40/GPH4/ID4
HSCE#/WUI19/GPH3/ID3
GINT/CTS0#/GPD5
RTS1#/WUI5/GPE5
DSR0#/GPG6
ECRST#
3D3V_S0
-SD 21,71,81 LPC_AD[0..3]
R2741
2
RN2721
1 4FAN_TACH1 R2745 LPC_AD0 K1 B4 BAT_SCL 39,40 1 2
LAD0/GPM0 SMCLK0/GPB3
1
2 3FAN_TACH2 100KR1J-GP LPC_AD1 J2 A2 BAT_SDA 39,40 <------ BATTERY / CHARGER 10KR2J-L-GP
E
LPC_AD2 LAD1/GPM1 SMDAT0/GPB4 R2742 C2715
J1 B3 SML1_CLK 20,28
SRN10KJ-11-GP-U LPC_AD3 LAD2/GPM2 SMCLK1/GPC1 PURE_HW_SHUTDOWN#_R SC1U6D3V2KX-L-1-GP
DY H2 B2 SML1_DATA 20,28 28,36 PURE_HW_SHUTDOWN# 1 2 B
1
2
LAD3/GPM3 SMDAT1/GPC2 H_PECI_KBC
B1 1 R2752 2 H_PECI 5,22 10KR1J-GP
SMCLK2/PECI/WUI22/GPF6
110KR1F-GP 2 S5_ENABLE M4 C1 43R1J-GP BLON_OUT 49 Q2701
C
R2722 5,18,36,65,71,81,97 PLT_RST# LPCRST#/WUI4/GPD2 SMDAT2/PECIRQT#/WUI23/GPF7 MMBT3906-4-GP
M1
70 LID_CLOSE# LPCPD#/WUI6/GPE6
D8 A11 CIO_SCL_OD_R_EC 1 R2704 2 AD_OFF 38 84.T3906.A11
CLKRUN#/WUI16/GPH0/ID0 PS2CLK0/CEC/GPF0 0R0201-PAD-GP
K2 B11 2nd = 84.03906.F11
18 CLK_PCI_KBC H1
LPCCLK/GPM4 PS2DAT0/GPF1
A10
USB_PWR_EN 61,62
SB_20120113_IOAC
-SE 21,71,81 LPC_FRAME#
F1
LFRAME#/GPM5
GA20/GPB5
PS2CLK1/DTR0#/GPF2
PS2DAT1/RTS0#/GPF3
PS2CLK2/WUI20/GPF4
B10
D9
PCH_BKLT_EN 17
WIFI_RF_EN 65
TPCLK 69
22 H_A20GATE G2 B9
21,81 INT_SERIRQ SERIRQ/GPM6 PS2DAT2/WUI21/GPF5 TPDATA 69
ECSCI#_KBC N4
TBT_LED ECSCI#/GPD3
2 R2703 1 TBT_LED L2
0R0201-PAD-GP ECRST# ECSMI#/GPD4 3D3V_IOAC
L1 M5 PWRLED 82
3D3V_AUX_S5 WRST# PWM0/GPA0
H4 N5 CHARGE_LED 82
GO2SX 22 H_RCIN# KBRST#/GPB6 PWM1/GPA1
2 R2702 1 GO2SX M2 M6 STDBY_LED 82
0R0201-PAD-GP PWUREQ#/BBO/SMCLK2ALT/WUI38/GPC7 PWM2/GPA2
N6 DC_BATFULL 82
PWM3/WUI32/GPA3
2
K6 FAN1_PWM 28 2 R2710 1 WLAN_PCIE_WAKE#

R2766 PWM4/WUI33/GPA4
19 PM_SUSACK# 1 R2732 2 PM_SUSACK#_R_EC D2 J6 FAN2_PWM 28
330KR2J-L1-GP 0R0201-PAD-GP CTX0/WUI36/GPB2 PWM5/WUI34/GPA5 10KR1F-GP
22 PCH_GPIO27# D1 M7 ME_UNLOCK 21
CRX0/WUI37/GPC0 PWM6/SSCK/WUI35/GPA6
40 CHG_ON# D7 K7 KBC_BEEP 29
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2 PWM7/RIG1#/GPA7
40 STOP_CHG# E8
1
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1
29,82 KBC_PWRBTN# 2 R2767 1 KBC_PWRBTN#_R
M11 FAN_TACH1 28
TACH0A/GPD6
1
470R1J-GP C2704 E51_RXD_KBC A4 M12 OK2GO2SX_N_OD_R_EC 1 R2720 2 OK2GO2SX_N_OD_R_EC 3D3V_AUX_S5

RXD/SIN0/GPB0 TACH1A/WUI39/GPD7
SC220P50V2KX-3GP
G2701 DY 20111208-SA 56 E51_TxD A3 0R0201-PAD-GP

TXD/SOUT0/GPB1
GAP-OPEN C2 AC_IN# 40
2
TMRI0/WUI2/GPC4
1
E1
-SE R2724 1 233R1J-GP KBC_SPI_CLK_R B5
TMRI1/WUI3/GPC6 BAT_IN# 39
-1 R2735
2
60 KBC_SPI_CLK R2770 1 FSCK 143KR2F-GP

233R1J-GP KBC_SPI_CS#_R A7
60 KBC_SPI_CS# FSCE#
C C
R2771 1 233R1J-GP KBC_SPI_SI_R B6 E2 KBC_PWRBTN#_R
60 KBC_SPI_SI FMOSI PWRSW/GPE4
A6 N1
2
60 KBC_SPI_SO FMISO RI1#/WUI0/GPD0 PM_SLP_S3# 19 PCB_VER_AD
N3
RI2#/WUI1/GPD1 PM_SLP_S4# 19,46
-1
1
K13
KSO16/SMOSI/GPC3 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
A1 DY C2717
1
19 PCH_DPWROK RSMRST#_KBC 19
SCD1U10V1KX-GP
J10 R2756
FORCE_PWR_R_EC 49 TS_KBC_INT KSO17/SMISO/GPC5 100KR1F-GP
2 R2740 1 FORCE_PWR_R_EC A5
0R0201-PAD-GP DTR1#/SBUSY/GPG1/ID7
G10 PCB_VER_AD -SD
2
3D3V_SRC_EN ADC0/GPI0 AP_DET#
41 3D3V_SRC_EN E7 G13
2
PROCHOT_EC SSCE0#/GPG2 ADC1/GPI1 ADT_TYPE
E6 G12
3D3V_S0 SSCE1#/FSCE1#/GPG0 ADC2/GPI2 ALL_POWER_OK_KBC_R
F9 1 R2755 2 ALL_POWER_OK 37,42,48
ADC3/GPI3 0R0402-PAD
F13 WLAN_PCIE_WAKE# 65
KCOL0 ADC4/WUI28/GPI4 EC_AGND
M8 F10
-1 KCOL1
KCOL2
J7
N9
KSO0/PD0
KSO1/PD1
KSO2/PD2
ADC5/DCD1#/WUI29/GPI5
ADC6/DSR1#/WUI30/GPI6
ADC7/CTS1#/WUI31/GPI7
F12 PM_SUSWARN#_R_EC
E13
1 R2718
0R0201-PAD-GP
2
AD_IA 40
PM_SUSWARN# 19
PM_SLP_SUS# 19,80
2 R2714 1 TS_KBC_INT KCOL3 M9
KCOL4 KSO3/PD3
69 KCOL[0..15] K8
KSO4/PD4 71.08518.B0U
10KR1F-GP KCOL5 J8 E12 AC_PRESENT_R_EC 1 R2723 2 AC_PRESENT 19
KCOL6 KSO5/PD5 TACH2/GPJ0 0R0201-PAD-GP
N10 D13 BLUETOOTH_EN 65
KCOL7 KSO6/PD6 GPJ1
M10 D12 RTCRST_ON 21
KCOL8 KSO7/PD7 DAC2/TACH0B/GPJ2
N11 C13 FAN_TACH2 28
KCOL9 KSO8/ACK# DAC3/TACH1B/GPJ3
K9 B13
3D3V_AUX_S5
SB_20120117_IOAC
AVCC
KCOL10 N12
KSO9/BUSY
KSO10/PE
DAC4/DCD0#/GPJ4
DAC5/RIG0#/GPJ5
C12
WLAN_PWR_EN# 65
USB_CHG_EN 62
KCOL11 N13
KCOL12 KSO11/ERR#
M13
KCOL13 KSO12/SLCT
L12
KCOL14 KSO13 KBC_CK32K
L13 F2
KCOL15 KSO14 CK32K/GPJ6 KBC_CK32KE
K12 G1
KSO15 CK32KE/GPJ7
2 R2737 1
SC1KP50V2KX-1GP
KSI3/SLIN#
C2721 XTAL-32D768KHZ-30-GP
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
1
33R1J-GP X2701
2
C2730 SCD1U10V1KX-GP 2 R2758
AVSS
1 PLT_RST#_IRST 65 1 2 2ND = 82.30001.C61
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
VSS
0R0201-PAD-GP R2726
2
1
C2731 PC2701 AD_JK
DY 100KR1J-GP
-SD
SC10P50V2JN-4GP
SC10P50V2JN-4GP
2 R2763 1 IT8518VG-PX-GP 82.30001.D51
J12
J13
J9
H12
H9
H10
H13
G9
E5
F5
F4
H5
G5
G4
E10
1
33R1J-GP DY DY
1
R2749
590KR2F-GP
<--Check ADT_TYPE V
EC_AGND
19Vx100K/(590+100)K=2.75V
-SC
2
EC_AGND ADT_TYPE
12.6Vx100K/(590+100)K=1.82V
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
C2720
9Vx100K/(590+100)K=1.31V
1
SCD1U10V1KX-GP
R2750
K
100KR2J-4-GP D2702
Vz=2.85~3.15V
2
MMPZ5225BPT-GP
83.3R003.B3F
2
KROW[0..7] 69
A
H_PROCHOT# 5
GPIO0 High Active 20111208-SA
D
Q2702
B PROCHOT_EC G LSK3541G1ET2L-GP
84.03541.F31
3D3V_S5 B
1
R2748
S
100KR1J-GP
1
R2772
2
DY 4K7R1J-GP
2
1ROM
21,60 PCH_SPI_CS0#_R 2 R2773 1 PCH_SPI_CS#_SW
0R1J-GP
21 PCH_SPI_CS1#_R 2 1
0R1J-GP
R2774
2ROM SB_20120117_IOAC
Wait KBC team assign GPIO
EC_SLP_S3# 0R0402-PAD 2 1 R2747 EC_PM_SLP_S3# 29,36,37,47,62 SB_20120117_IOAC
NONDS3 -SB 3D3V_AUX_S5
PM_SLP_S3# 0R2J-L-GP 2 1 R2706
1
-SD R2777
10KR2J-L-GP
DY
41 3D3V_SRC_EN 3D3V_SRC_EN
2
WLAN_PWR_EN#
2
100KR2J-4-GP
R2780
1
A A
Helium
Wistron Corporation
Title
KBC ITE IT8518VG

A1
Helium -1
5 4 3 2 1
SSID = Thermal 9
FAN1
3D3V_S0_THERMAL 1
R5 R7 2
-1
1
3
3D3V_S0 2 R2801 1 3D3V_S0_THERMAL R2802 R2803 4
0R0201-PAD-GP 2KR1F-GP 18K7R2F-GP 5
SC10U6D3V3MX-GP
27 FAN1_PW M 1 R2808 2 FAN1_PW M_R 6
20.K0785.008
1
C2801 0R0201-PAD-GP FAN_TACH1_C 7
2
DY C2802 8
D SCD1U10V1KX-GP THERM_SYS_SHDN# NCT7718_ALERT# *Layout* 15 mil 5V_S0
10 D
2
PSC-CON8-1-GP
D2801
U2801
A K FAN_TACH1_C
3D3V_S0_THERMAL 7781_SCL 27 FAN_TACH1
1 VDD SCL 8
7718_D+ 2 7 7781_SDA
7718_D- D+ SDA NCT7718_ALERT#
3 D- ALERT# 6 RB520SM-30T2R-GP
THERM_SYS_SHDN# 4 5
T_CRIT# GND 83.1R003.N8F
7718_D+ 2nd = 83.R2003.V8F
NCT7718W -GP
74.07718.0B9
3
1
C2803
Q2803 SC2200P50V2KX-2GP FAN2
1
PMBS3904-1-GP 9
C2828 close to U2801
2
84.03904.L06 1
2
2ND = 84.03904.P11
7718_D- 2
3D3V_S0 3
4
-1
5
Layout notice : 27 FAN2_PW M 1 R2804 2 FAN2_PW M_R 6
0R0201-PAD-GP FAN_TACH2_C 7
20.K0785.008
* Put the C1 2200pF to close the nct7718W 8
*Layout* 15 mil 5V_S0
3
4
10
C * Add ground shielding for D+ and D- traces RN2801 C
* D+/D- route has to be away from the high noise area SRN4K7J-8-GP PSC-CON8-1-GP
* The recommended traces width and ground shielding spacing are 10miles
2
1
Q2801
D2803
49,69 7781_SCL 1 6 SML1_CLK 20,27
2 5 A K FAN_TACH2_C
27 FAN_TACH2
3 4
2N7002KDW -GP RB520SM-30T2R-GP

84.2N702.A3F SML1_DATA 20,27
83.1R003.N8F
2nd = 84.DM601.03F 2nd = 83.R2003.V8F
49,69 7781_SDA
3D3V_S0
2
R2805
Q2802 100KR1J-GP
B B
LSK3541G1ET2L-GP
1
84.03541.F31
D S THERM_SYS_SHDN#
27,36 PURE_HW _SHUTDOW N#
G
Setting 85 ℃ IMVP_PW RGD 36,42
A Helium A
Wistron Corporation
Title
NUVOTON_NCT7718W
A3
Helium
-1
5 4 3 2 1
5 4 3 2 1
5V_S0 5VA_S0
1 R2933 2
0R0402-PAD
HDA_CODEC_SDOUT
HDA_CODEC_BITCLK
3D3V_S0 5V_S0 300mA U2902
1
DY
C2927 1 5
27,36,37,47,62 EC_PM_SLP_S3# EN NC#5
SC1U10V2KX-1GP
G2901 2
2
C2903 C2904 C2906 C2907 GND
5V_S5 3 VIN VOUT 4 Follow U2902 SPEC use 1u to change(10u)
1
1
SC10U6D3V2MX-GP-U
SCD1U10V1KX-GP
SC10U6D3V2MX-GP-U
SCD1U10V1KX-GP
1 2
-SB
1
GAP-CLOSE C2935 G9091-475T12U-GP C2934
2
1
SC1U10V2KX-1GP SC1U10V2KX-1GP
G2903
2
DY Due to layout concern,
1
D 1 2 FC2901 FC2902 74.09091.F3F D
2
change to DGND
SC5P25V1CN-GP
SC5P25V1CN-GP
DY DY CLOSE TO PIN39 and 46 2nd = 74.09198.A7F
GAP-CLOSE
2
AUD_AGND
RN2901
SRN47K-2-GP-U
AUDIO_PC_BEEP 2 1 AUDIO_BEEP 4 1 KBC_BEEP 27
C2921 3 2 HDA_SPKR 21
3D3V_S0 SC1U6D3V2KX-L-1-GP
1
SC100P25V1KX-GP
R2925 C2922
-1 R2906
DMIC_CLK
1 2
DMIC_12
21 HDA_SDIN0 1 R2915 2 0R2J-L-GP 4K7R1J-GP
2
22R1J-GP
COMBO_MIC_JD#
2
21 HDA_CODEC_BITCLK 1 R2914 2
0R0201-PAD-GP
1
21 HDA_CODEC_SDOUT 281
D
FC2903 FC2904
SC22P50V2JN-4GP
SC22P50V2JN-4GP
HDA_CODEC_SYNC 21 Q2901
R2903
2
G LSK3541G1ET2L-GP
PD# EAPD 2 1 84.03541.F31
HDA_CODEC_RST# 21
ACZ_BITCLK_AUDIO_+
1
69 DMIC_CLK NBQ100505T-100Y-N-GP 2 1 L2930 0R1J-GP
69 DMIC_12 NBQ100505T-100Y-N-GP 2 1 L2931 C2909 DY
S
SC22P25V1JN-GP
2
DY
DMIC_DAT_L
DMIC_CLK_L
AC97_DATIN
AUD_3VD_R
C C
COMBO_MIC 1 R2919 2 COMBO_MIC_Q
AUDIO_PC_BEEP
22K1R1F-GP
1
C2930
SC10U6D3V2MX-GP-U
3D3V_S0
2
58 AUD_SPK_R+ AUD_AGND
58 AUD_SPK_R-
U2901
83.02025.0AF
10
11
12
D2909
1
2
3
4
5
6
7
8
9
R2907 1 2 39K2R2F-L-GP AUD_HP1_JD# 58
1 2
DIGITAL DVDD-IO
PD#
RESET#
SDATA-OUT
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
BCLK
DVSS
PCBEEP
DVDD
SDATA-IN
(include thermal pad) SYNC Spilt by DGND AUD_AGND
D2906 AZ2025-01H-GP-U 49 GND ALC268_SENSE_A MIC2V
1 2 48 SPDIFO SENSE_A 13
EAPD 47 14
EAPD LINE2-L/PORT-E-L
1
AZ2025-01H-GP-U 5V_S0 46 PVDD2 LINE2-R/PORT-E-R 15
45 16 MIC2-L_PORT-B C2920 1 2 SC2D2U10V3KX-L-GP R2917
SPK-OUT-R+ MIC2-L/PORT-F-L
83.02025.0AF 44 SPK-OUT-R- MIC2-R/PORT-F-R 17 MIC2-R_PORT-B C2919 1 2 SC2D2U10V3KX-L-GP 2K2R1J-GP
2ND = 83.YSE05.0AF 43 18 ALC268_SENSE_BR2920 1 2COMBO_MIC_JD#
PVSS2 SENSE_B R2928
42 19 20KR2F-L-GP CLOSE TO PIN18
271
2
PVSS1 JDREF COMBO_MIC_R
58 AUD_SPK_L- 41 SPK-OUT-L- MONO-OUT 20 1 2 COMBO_MIC 58
58 AUD_SPK_L+ 40 SPK-OUT-L+ MIC1-L/PORT-B-L 21
1
CLOSE TO PIN38 39 22
HPOUT-R/PORT-I-R
5V_S0
HPOUT-L/PORT-I-L
PVDD1 MIC1-R/PORT-B-R 1KR1J-GP
1
5VA_S0 38 AVDD2 LINE1-L/PORT-C-L 23
MIC1-VREFO-R
JDREF C2926 R2927

MIC1-VREFO-L
37 AVSS2 LINE1-R/PORT-C-R 24
2
MIC2-VREFO
TVL-0402-01-AB1-GP 22K1R1F-GP
D2908 D2905 C2910
ANALOG
LDO-CAP
SCD1U10V1KX-GP
AUD_AGND
AZ2025-01H-GP-U
AZ2025-01H-GP-U
CPVEE
AVDD1
AVSS1
2
2
1
VREF
R2909
CBN
CBP
B B
20KR1F-GP
CLOSE TO PIN19 AUD_AGND
36
35
34
33
32
31
30
29
28
27
26
25
AUD_AGND 5VA_S0
ALC271X-VB6-CG-GP
2
1
MIC2V
LDO_CAP_AUDIO
VREF
83.02025.0AF 71.00271.B03
AUD_CBN
AUD_CBP
HP_OUT_R_AUD
CPVEE
HP_OUT_L_AUD
83.02025.0AF AUD_AGND D2901 83.00400.B1F

1
2ND = 83.YSE05.0AF A K EC_PM_SLP_S3# 27,36,37,47,62

C2913
SCD1U10V1KX-GP 1SS400-2-GP
2
10V change 6.3V For 0603 to 0402

CLOSE TO PIN35 SCD1U10V1KX-GP
-SD del D2904
1
AUD_AGND PD#
C2911 C2915 1 2 AUD_AGND D2902 83.00400.B1F 2nd = 83.2S101.01F
SC2D2U6D3V2MX-GP A K KBC_PWRBTN# 27,82
2
SC10U6D3V2MX-GP-U
58 MB_HP_R
1
58 MB_HP_L CLOSE TO PIN34 1SS400-2-GP
C2914 1 2 AUD_AGND R2910 D2910 83.00400.B1F 2nd = 83.2S101.01F
C2912 4K7R1J-GP A K HDA_CODEC_RST# 21
AUD_AGND 2 1 DY
1SS400-2-GP
2
2
D2907 D2903 SC2D2U6D3V2MX-GP

AZ2025-01H-GP-U
AZ2025-01H-GP-U
SRN51J-GP MIC2V
2 3
1 4
RN2904
A
-SD Helium A
1
83.02025.0AF
83.02025.0AF
2ND = 83.YSE05.0AF
Wistron Corporation
Title
Audio Codec
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
JE40 delete AMP function

C C
B B
Helium
A
Title
Audio AMP
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
Blanking
C C
B B
Helium
A A
Wistron Corporation
Title
AR8158
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
please near to CARD1
5 IN1 CARD-READER
TP3207
SP4
For SIV,please near to u3201 1
3D3V_S0
-SC TP3205
1 USB_PN4
TPAD14-OP-GP
TP3208
1 SP3
SC10U6D3V2MX-GP-U
SCD1U16V2KX-3GP
TPAD14-OP-GP
1
C3201 C3202
TP3206 TPAD14-OP-GP
D DY TP3209 D
1 USB_PP4
2
1 SP8
TPAD14-OP-GP
SP13
SP12
TPAD14-OP-GP
20 CLK48_Cardreader TP3210
U3201
R3201 RTS5138-GR-GP 1 SP10
6K19R2F-GP 71.05138.003
24
23
22
21
20
19
1 2 RREF
TPAD14-OP-GP
XD_D7
SP14
SP13
SP12
SP11
CLK_IN
TP3211
1 18 SP10 1 SP12
R3202 1 0R0402-PAD USB_PN4_R RREF SP10
18 USB_PN4 2 2 DM GPIO0 17
18 USB_PP4 R3203 1 0R0402-PAD
2 USB_PP4_R 3 16
DP SP9 SP8 TPAD14-OP-GP
3D3V_S0 4 3V3_IN SP8 15 TP3212
CARD_3D3V_S0 5 CARD_3V3 SP7 14
6 13 SP6 1 SP13
V18 SP6
XD_CD#
VREG
SP1
SP2
SP3
SP4
SP5
TPAD14-OP-GP
25 GND TP3213
1 SP6
7
8
9
10
11
12
1
C3203
TPAD14-OP-GP
SC1U10V2KX-1GP
2
SP3
SP4
C C
SD_WP(SP1) to GND for Vendor
CARD_3D3V_S0 SP1_R
2
R3204
1
C3204 C3205 C3206

0R2J-2-GP CARD_3D3V_S0 CARD1
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
2
4 VDD 9 9
10 10
12 SP6
SP4 12
7 DAT0 13 13
1
C3207 SP3 8 14
SP13 DAT1 14
1 DAT2
SC1U10V2KX-1GP
SP12 2
2
CD/DAT3
SP8 5 6
SP10 CLK VSS
3 CMD VSS 11
Near CARD1 Pin11, Pin18, Pin22

SDCARD-8P-5-GP
62.10051.B21
B B
Helium
A A
Wistron Corporation
Title
CARDREADER
A3 Helium -1
5 4 3 2 1
A B C D E
4 4
3 3
2 2
Helium
1 1
Wistron Corporation
Title
Reserved
A3
Helium -1
A B C D E
5 4 3 2 1
D D
(Blanking)
C C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
Blanking C
B B
A Helium A
Wistron Corporation
Title
USB 3.0 Controller

A3
Helium -1
5 4 3 2 1
5 4 3 2 1
Power Sequence
SB_20120117_IOAC
74.05244.073 -SD
G5244A31U-GP
R3628
D
28,42 IMVP_PW RGD 1 R3614 2
0R0402-PAD
SYS_PW ROK 19 5V_S5_EN 2 1
DY
3D3V_S5_EN 4
5
EN
GND
DSG
NC#2
3
2
U3615_R 3D3V_S5 3D3V_SRC
-SD D
10KR2J-L-GP 6 1 3D3V_SRC
OUT IN
1
3D3V_S5 1 R3629 2
K
D3602
A C3612
R3614 R3655 0R0603-PAD
27,29,37,47,62 EC_PM_SLP_S3#
SCD01U50V2KX-L-GP
U3615
SCD33U6D3V2KX-1-GP
CRB : 1K DY 100R1J-GP DY
2
1SS400-2-GP
-SD 83.00400.B1F DY
2
SC10U10V3MX-GP
2nd = 83.2S101.01F
1
-SA David C3614 PC3615
DY DY
2
ANNIE Run Power Modify the MOS package for placement 5V_S5
5V_S0
Q3604
C3607
7
IRFHS8342TRPBF-GP
C 1 2 D C
RUN_ENABLE 1 D D 6
U3610 DY SCD1U25V3KX-L-GP 5V_S0
G5938TL1U-GP 2 D D 5
5V_S5 RUN_ENABLE
74.05938.09P
3 G S 4
1
6 1 C3606 84.08342.037 S
27,29,37,47,62 EC_PM_SLP_S3# EN VCC
3D3V_S0 5 2 DY 2ND = 84.00430.03F
8
DC2 GND
SCD22U25V3KX-GP
4 3
5V_S0
SB_20120117_IOAC
2
DC1 HV
3D3V_S5
3D3V_SRC
Q3605 1 R3608 2 PS_S3CNTRL 37,48

100KR1J-GP
7
IRFHS8342TRPBF-GP
1D35V_S0 Change MOS 1D35V_S3 D
D
U3608 1 D D 6
1 S D 8 3D3V_S0 Q3606
2 S D 7 2 D D 5 G LSK3541G1ET2L-GP
27,29,37,47,62 EC_PM_SLP_S3#
3 S D 6 84.03541.F31
D 5 3 G S 4
G
FDMC7696-GP 84.08342.037 S
4
S
84.07696.037 2ND = 84.00430.03F
8
B B
DY
1D05V_VTT 2 R3622 1 H_THERMTRIP# 5,22
56R1J-GP
C
R3601
5,22,97 H_CPUPW RGD 1 2 H_PW RGD_R B Q3601
1KR1J-GP MMBT2222AH-GP
1
DY C3602 84.M2222.011
E
SCD1U10V1KX-GP
R3616
2
5,18,27,65,71,81,97 PLT_RST# 2 1
1
4K7R1J-GP
R3632
2K2R1J-GP
A Helium A
2
SB_20120113_IOAC
D3601
PURE_HW _SHUTDOW N# 27,28
Wistron Corporation
A K 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
41 5V_S5_EN
-SA David Taipei Hsien 221, Taiwan, R.O.C.
1SS400-2-GP
Title
83.00400.B1F Power Plane Enable
-SB David 2nd = 83.2S101.01F Size Document Number Rev
A3
2KR1F-GP
2 1
R3603
S5_ENABLE 27
Helium -1
5 4 3 2 1
5 4 3 2 1
M3 power M3 power
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation
R3707 R3708 R3722
1 0R1J-GP 2 2 1 2 1
DDR_VREF_S3 DY DY DY
0R1J-GP 0R1J-GP
Q3708
D D
AO3418-GP
+V_SM_VREF_CNT 9
15 DDR_W R_VREF_CHA D S M_VREF_DQ_DIMM0_C 9 14 DDR_W R_VREF_CHB D S M_VREF_DQ_DIMM1_C 9
2
D S Q3702 Q3706
R3705 AO3418-GP AO3418-GP
100KR1J-GP 84.03418.031 84.03418.031
G
84.03418.031 MEM_DC
G
1
DRAMRST_CNTRL DRAMRST_CNTRL
package => SOT-23
EC_PM_SLP_S3# 27,29,36,47,62
AO3468->Rds(on) <155-ohm
2N702 Rds(on)->3-ohm Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
0D75V_EN
D
Q3704
G LSK3541G1ET2L-GP
36,48 PS_S3CNTRL
84.03541.F31
S
C 1D35V_S3 C
S3 Power Reduction Circuit

SM_DRAMRST#
1
R3706
1KR1J-GP
1.05VTT_PW RGD 45,48
0.9 from 『0-ohm』 to

R3709 Desing guide updated
『Rev1Kohm 』
2
1 2
2
0R1J-GP
R3710 DY
0R0201-PAD-GP Q3703
LSK3541G1ET2L-GP
5 SM_DRAMRST#
84.03541.F31
1
S D SM_DRAMRST#_D 1 R3718 2 DDR3_DRAMRST# 14,15

1KR1J-GP
1
0D75V_EN 46 DY
C3702
SC100P50V2JN-L-GP
2
Non-DS3
G
1
0D675V_S0
DY C3705 20 DRAMRST_CNTRL_PCH 1 R3714 2 DRAMRST_CNTRL
SCD1U10V1KX-GP 0R2J-L-GP
2
1
R3703
R3715 1 0R0402-PAD
2 22R1J-GP
27 EC_DRAMRST_GATE
1
C3703
B SCD047U6D3V1KX-GP B
2
Close to DIMM
-SB
PS_S3CNTRL_Q
Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK
For Leakage concern
S3 Power Reduction Circuit SM_DRAMPWROK
3D3V_PCH_DS3
3D3V_S5 1D35V_S0
1
Del 1.35 pull high

R3713
1
200R2F-L-GP Q3701
R3702
D
200R2F-L-GP LSK3541G1ET2L-GP
2
19 PM_DRAM_PW RGD 1 IN B VCC 5 84.03541.F31

G
2
36,48 PS_S3CNTRL
27,42,48 ALL_POW ER_OK 1 R3701 2 0D75V_EN_1 2 IN A
0R0201-PAD-GP
SCD1U10V1KX-GP
1
C3701 3 4 VDDPW RGOOD_R 1 R3719 2 VDDPW RGOOD 5

GND OUT Y
DY
S
DY U3701 130R1F-GP
2
45,48 1.05VTT_PW RGD 1 2 74VHC1G09DFT2G-GP

2
R3704 0R1J-GP
73.01G09.AAH R3720
2ND = 73.01G09.0AB 0R1J-GP
DY
OD AND gate required
1
A Helium A
For U3701 not OD AND gate
R3719 to 64.15015.6DL
R3720 to 64.75005.6DL Wistron Corporation
R3702 to DY Taipei Hsien 221, Taiwan, R.O.C.
Title
SM_DRAMPWROK must have a maximum of 15ns rise or fall time
over VDDQ * 0.55± 200mV and the edge must be monotonic ADAPTER
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
ANNIE solution
D D
1Pin=3A
Adaptor in to generate DCBATOUT
DCIN1 AD_JK
5
1
K
3 D3801 PC3802
1
SCD1U50V3KX-L-GP
4 P6SBMJ27APT-GP
2
6 83.P6SBM.DAG
SC1U50V5ZY-1-GP
PC3801 2nd = 83.P6SMB.JAG
2
1
A
ACES-CON4-29-GP
20.F1639.004
C C
AD_JK AD+
PU3802
1 S D 8
2 S D 7
3 S D 6
G D 5
2
FDMC6679AZ-GP
4
PR3807 PC3805
1
B 200KR2F-L-GP SC1U50V5ZY-1-GP 84.06679.B37 B
PWR_AD+_2 2ND = 84.07129.037
2
R2
E
PWR_ADJK_EN B R1 -SB David
R1=22k C height concern
R2=22k R1=22k
1
PR3808
R2=22k PQ3802
3 PWR_ADJK_EN PDTA124EU-1-GP 100KR2J-4-GP
1 R1 84.00124.K1K
27 AD_OFF
2 2nd = 84.00024.01K
2
R2
PQ3801 -SB David
LTC024EUB-FS8-GP
84.00024.A1K
2ND = 84.00124.H1K
-SB David
Helium
A A
Wistron Corporation
Title
DCIN JACK
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
BATTERY CONNECTOR
BT+
D D
PC3901
1
PC3902
SCD1U25V2KX-GP
SC2200P50V2KX-2GP
2
20.F2133.010
BTY1
11
1
PN3901 2
SRN33J-7-GP BT+ 3
1 8 BI 4
27 BAT_IN# 2 7 BAT_IN#_1 5
3 6 BATA_SCL_1 6
27,40 BAT_SCL
4 5 BATA_SDA_1 7
27,40 BAT_SDA
8
9
10
C 12 C
82 BI
ACES-CON10-38-GP
1
K
P3902
PD3901 10KR2F-2-GP
MMPZ5232BPT-GP-U
83.5R603.D3F
2
2ND = 83.5R603.K3F
A
97 BI_BTY1_R
1
EC Protect
0R2J-L-GP
R3904 -SD
Lab
2
B B
Helium
A
Title
BATT CONN
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
AD+_TO_SYS DCBATOUT
SSID = Charger PU4001
PR4004
BT+
AD+ 8 D S 1 PU4002
7 D S 2 1 2 1 S D 8
1
6 D S 3 2 S D 7
5 D G PR4021 3 S D 6
100KR2F-L1-GP D01RL1632F-L-GP-U1 D
G 5
FDMC6679AZ-GP Because 2S2P 8.4V,so DY,Battert always in
K
1
PR4023 AD+ FDMC6679AZ-GP
4
1
1
84.06679.B37 AD+_G_2 PD4002
10KR2F-L1-GP 2ND = 84.07129.037 PG4002 Check VBR(low)
1
84.03541.F31 PR4022 PG4001 GAP-CLOSE-PWR-3-GP 84.06679.B37 DY
VBR is 20~22
SMF18AT1G-GP
LSK3541G1ET2L-GP GAP-CLOSE-PWR-3-GP 2ND = 84.07129.037
A
1
Q4001 -SB David 10KR2F-L1-GP PR4009 PR4011 2ND = 83.SMF18.AAH
height concern 1 DY 2 -SB David
0R2J-L-GP 470KR2J-L1-GP height concern 83.SMF18.0AH
2
DC_IN_D D S
D D
1 2
2
DC_IN_D AD+_G_1
PC4003
SCD1U25V2KX-GP
SCD1U25V2KX-GP
G
DCBATOUT
1
AD+
PC4002
SCD1U25V2KX-GP
AD+_G_1
PWR_CHG_ACN
PC4004
PWR_CHG_ACP
1
1 2 PWR_CHG_VCC
Q4002 PC4005 PC4025 PC4006
D
1
LSK3541G1ET2L-GP PR4006 PR4015 10R5J-GP PC4001 SCD1U25V2KX-GP
CHG_AGND
SC4D7U25V5KX-L2-GP
SC10U25V5KX-1-GP
84.03541.F31 SCD47U25V3KX-1GP
PWR_CHG_ACOKG 316KR2F-L-GP
2
CHG_AGND PWR_CHG_REGN
CHG_AGND
2
PWR_CHG_ACDET
PC4009
S
PD4003
1 PR4008 2PWR_CHG_BTST_R
K A 1 2
CH520S-30PT-GP
0R3J-4-GP SC1U10V3KX-L1-GP
1
PC4017
83.R0203.08F
1
1
SCD047U25V2KX-GP
PR4010 2nd = 83.1R003.I8F
49K9R2F-L-GP PC4010
SCD01U50V2KX-L-GP
42
34
33
32
31
30
15
2
2
PU4003
Charger Current=1.4~3.6A
2
14 PWR_CHG_BTST
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
REGN
BTST D01RL1632F-L-GP-U1
SW#17 17 PL4002
PWR_CHG_VCC 36 21 BT+
AVCC SW#21 PR4017
SW#22 22
23 PWR_CHG_PHASE 1 2 BT+_R 1 2
PWR_CHG_ACN SW#23
37 ACN SW#24 24
PWR_CHG_ACP 38 25
CHG_AGND ACP SW#25 Add PR4033 - 2D2 ohm IND-3D3UH-131-GP
SW#26 26
1
27 add PC4024 - 470pF
SW#27
-SD
GAP-CLOSE-PWR-3-GP
PWR_CHG_ACDET 4 28 PR4033
GAP-CLOSE-PWR-3-GP
C 3D3V_AUX_S5 ACDET SW#28 PR4025 2D2R3J-2-GP C
SW#29
29
DY
2
SCD1U25V2KX-GP
PG4003
PWR_CHG_BAT_SDA 6 43 10R2F-L-GP
PG4004
SDA SW#43 PWR_CHG_CSP
12 1 2
2
CSP
PC4019
PWR_CHG_BAT_SCL 7 11 PWR_CHG_CSN 1 2 PC4023
SCL CSN
1
PR4020 PR4024 PC4020 PC4021 PC4022
3
DY
1
LPMODV#
SC10U25V5KX-1-GP
SC10U25V5KX-1-GP
SC10U25V5KX-1-GP
100KR2F-L1-GP 2 -AC_VOK 7D5R2F-GP PC4024
PWR_CHG_CMPIN EXTPWR#
DYSC470P50V2JN-GP
SCD1U25V2KX-GP
40 9
2
LPREF BM#
Check !!
2
PWR_CHG_ILIM 8 39 PWR_CHG_CMPOUT
pull high R on page 27 Kbc ILIM LPMODI#
PQ4007 CHG_AGND
D
LSK3541G1ET2L-GP
AGND
AGND
AGND
AGND
AGND
AGND
PGND
PGND
PGND
84.03541.F31 5 PWR_CHG_IOUT 1 2 AD_IA 27 PWR_CHG_CSOP_1
IOUT
SCD1U25V2KX-GP
2 1 PWR_CHG_BAT_SCL G PR4013
27,39 BAT_SCL 27 CHG_ON#
1
PG4008 DY BQ24760RSBR-1-GP 0R0402-PAD
1
10
13
16
35
41
18
19
20
GAP-CLOSE-PWR-3-GP PC4013
8K45R2F-2-GP
SC100P50V2JN-L-GP PR4026
PR4028
2
1
PC4016
S
100KR2J-4-GP
2 1 PWR_CHG_BAT_SDA DY
27,39 BAT_SDA
2
1
PG4010 DY BATT_SENSE
1
GAP-CLOSE-PWR-3-GP PC4014
PR4026 Change to DY 74.24760.A73
1
SC100P50V2JN-L-GP 1 2
2
SCD1U25V2KX-GP
PC4011
DY SC100P50V2JN-L-GP
Add PC4013 , PC4014 . 100P , DY
1
PC4012
PG4013
2
GAP-CLOSE-PWR-3-GP
2
CHG_AGND
PC4011 change to 100P
CHG_AGND CHG_AGND
3D3V_AUX_S5
RESET V=0.778V
-SD 19Vx29K/(499+29)K=1.043V
1
PR4031 3D3V_AUX_S5 AD+

Delete PQ4008 9Vx29K/(499+29)K=0.494V
B
100KR2J-4-GP -SC Change Net 8.5Vx29K/(499+29)K=0.466V
B
1
2
1
1 2 PWR_CHG_CMPOUT 3D3V_AUX_S5
27 STOP_CHG# PR4014 R4023 3D3V_AUX_S5 R4031
74.T3895.073
1
PR4002 0R0402-PAD 10KR2J-L-GP 499KR2F-1-GP

DY TPS3895PDRYR-GP
2
1
3D3MR2J-GP DY
2
PR4029 ADT_2NDBT_TYPE 3 4 PWR_CHG_ACOK
100KR2J-4-GP SENSE SENSE_OUT U4003_CD
2 5
2
PWR_CHG_CMPIN U4003_EN GND CT ADT_2NDBT_TYPE

DY R288 U4003_CD
1
ENABLE VCC
6 <--Check ADT_TYPE V
PR4002 DY
2
1
0R2J-2-GP C4026 C4020
-SE -1
1
3D3V_AUX_S5 U4003
SCD1U10V1KX-GP
SCD1U10V1KX-GP
2 1 -AC_VOK R4032
27 AC_IN# C4021 29K4R2F-L-GP
1
SCD1U10V1KX-GP
DY
-SD
2
1
2
PR4007 AD+
294KR2F-2-GP
Change Net
R1 3D3V_AUX_S5
2
PR4007,PR4001
1
1
R4034
2
1
AD+ total power R1 R2 PR4030 499KR2F-1-GP
PR4001 100KR2J-4-GP 19.0Vx14.7K/(499+14.7)K=0.543V
R4024 3D3V_AUX_S5
R2 49K9R2F-L-GP
-1
2
45w 294K 49.9k DY 10KR2J-L-GP 16.8Vx14.7K/(499+14.7)K=0.480V
2
PU4005
1
CHG_AGND
PWR_CHG_ACOK AC_OK_TYPE AC_IN#
AC_OK_TYPE
<- 12.6Vx14.7K/(499+14.7)K=0.360V
60w 187K 49.9k 3 SENSE SENSE_OUT# 4
12.0Vx14.7K/(499+14.7)K=0.343V
2 5 U4005_CD C4022
GND CT
1
SCD1U10V1KX-GP
U4005_EN
90w 121k 49.9k
1 ENABLE# VCC 6
R4035
09.0Vx14.7K/(499+14.7)K=0.257V
change PR4007 to 294K C4024 14K7R2F-L-GP
-SD
2
1
change PR4001 to 49.9K
SCD1U10V1KX-GP
PQ4006 TPS3896PDRYR-GP U4005_CD
D
A LSK3541G1ET2L-GP A
2
84.03541.F31 74.03896.073
2
G AC_IN# C4025
SCD1U10V1KX-GP
DY
Helium
DY 19.0Vx14.7K/(499+14.7)K=0.543V
2
16.8Vx14.7K/(499+14.7)K=0.480V
S
12.6Vx14.7K/(499+14.7)K=0.360V Wistron Corporation

12.0Vx14.7K/(499+14.7)K=0.343V Taipei Hsien 221, Taiwan, R.O.C.
09.0Vx14.7K/(499+14.7)K=0.257V Title
CHARGE BQ24760
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_3p3v5v -SB David

DCBATOUT 5V_PWR_DCBATOUT
SB_20120113_IOAC
3D3V OCP setting PR4107 PG4108 2 1 GAP-CLOSE-PWR
5V OCP setting PR4103
-SD PG4109 2 1 GAP-CLOSE-PWR
1 PR4122 2 PWR_5V_EN PWR_5V_ENTRIP1 PWR_3D3V_ENTRIP2

36 5V_S5_EN
0R0402-PAD PG4110 2 1 GAP-CLOSE-PWR
DY
2
1 PR4127 2
0R2J-L-GP PR4103 PR4107 PG4111 2 1 GAP-CLOSE-PWR
39K2R2F-L-GP 57K6R2F-GP
D 1 PR4124 2 PWR_3D3V_EN D
27 3D3V_SRC_EN
0R0402-PAD PG4115 2 1 GAP-CLOSE-PWR
1
PG4114 2 1 GAP-CLOSE-PWR
DCBATOUT 3D3V_PWR_DCBATOUT
3D3V_PWR 3D3V_SRC
PG4104 GAP-CLOSE-PWR
PG4101 GAP-CLOSE-PWR 1 2 DEL OUTPUT GAP
1 2
SB_20120117_IOAC
PG4102 GAP-CLOSE-PWR 1 2
1 2 PWR_3D3V_UGATE2
PG4106 GAP-CLOSE-PWR 5V_PWR_DCBATOUT
PG4103 GAP-CLOSE-PWR 1 2
1 2 Main source 2nd source
1
D1
D1
D1
D1
G1
1 2 PU4105
FDMC7200S-GP 84.03664.037 84.00038.A37
1
Q1
PU4101 (FDMS3664S) Mount (RJK03P8DPA) Mount
PT4107
PC4130
PC4131
PC4114
SC1KP50V2KX-1GP
SC10U25V5KX-GP
SC10U25V5KX-GP
1
1
Q2
ST15U25VBM-GP PC4117 PT4105
D2/S1
2
SCD1U50V3KX-L-GP
DY ST22U25VDM-1-GP
BOM control
S2
S2
S2
G2
2
10
8
DCBATOUT 2
3D3V_PWR_DCBATOUT 3 DY
PWR_3D3V_LGATE2 1 4
10
9
1
7
PC4113 8 6
1
C PC4129 SCD01U50V2KX-L-GP 5 C
2
PC4112 PC4110 PU4103 need change to TPS51275
SCD1U25V3KX-L-GP
SC4D7U25V5KX-L2-GP
SC4D7U25V5KX-L2-GP
2nd source H is 1.1mm

2
PN:74.51275.003
FDMS3600-02-RJK0215-COLAY-GP
12
PU4103 PU4101
VIN
PR4108 PR4106 PC4118 Design Current = 15A
2D2R3-1-U-GP 2D2R3-1-U-GP SCD1U25V3KX-L-GP
PC4115 25.1A<OCP< 29.3A
2 1PWR_3D3V_BOOT1
1 2PWR_3D3V_BOOT2 9 17 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2
PL4101 VBST2 VBST1
3D3V_PWR SCD1U25V3KX-L-GP PWR_3D3V_UGATE2 10 16 PWR_5V_UGATE1 PL4103 5V_S5
DRVH2 DRVH1
2 1 PWR_3D3V_PHASE2 8 18 PWR_5V_PHASE1 1 2
SW2 SW1
COIL-2D2UH-26-GP PWR_3D3V_LGATE2 11 15 PWR_5V_LGATE1
DRVL2 DRVL1
-SE IND-1D5UH-44-GP-U
1
PT4103
PC4132
-SD
SCD1U10V2KX-5GP
ST220U6D3VBM-2-GP
PG4121 PWR_5V_VOUT1 PG4124
PC4119
14
SCD1U10V2KX-5GP
2
VO1 68.1R510.20E
1
1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1
PWR_3D3V_FB2 PWR_5V_FB1 PT4101 PT4106
Iomax=5A 4
VFB2 VFB1
2 2ND = 68.1R51B.10P
ST220U6D3VDM-23-GP ST100U6D3VAM-3-GP
2
OCP>7.5A 74.51275.003 80.10715.B1L
2
2
2ND = 77.51071.04L
PWR_3D3V_EN 6 20 PWR_5V_EN
EN2 EN1
Del TP4702 by placement
79.22710.20L
PWR_3D3V_ENTRIP2 5 1 PWR_5V_ENTRIP1 2nd = 77.22271.27L
CS2 CS1
PWR_3D3V_VOUT
77.C2271.39L
19 confrim
VCLK
2nd = 77.22271.33L
19 3V_5V_POK 7 21
PGOOD GND
VREG3
VREG5
1
TPS51275RUKR-GP
3
13
PR4111 5V_AUX_S5
B 15K4R2F-GP 3D3V_AUX_S5 B
R1
PWR_5V3D3V_VREG3
PG4125
1PWR_5V3D3V_VREG5
1 2 1 PR4123 2
2
0R0402-PAD
GAP-CLOSE-PWR
R1
1
PR4117
-SA David 33KR2F-2-GP
power suggest default stuff PR4123
1
2
PR4118
R2
1
22KR2F-GP PC4127 PC4126

SC1U6D3V2KX-L-1-GP
-2 Vout = 2 * ( 1 + R1/R2 )
SC1U6D3V2KX-L-1-GP
2
1
= 2 * ( 1 + 15.4K / 22K)
PR4119
= 3.4V 21K5R2F-GP
R2
Close to VFB Pin (pin5) -SB wayler
2
PC4126 is 6.3V have been confirm by power
Vout = 2 * ( 1 + R1/R2 )
= 2 * ( 1 +33K / 21K)
Close to VFB Pin (pin2) = 5.14V
-SB David
3D3V_AUX_S5
1
PR4125 DY PWR_LDO_5V_Vout
DCBATOUT 10KR2J-L-GP
PG4117
1
2 1 PWR_LDO_5V_VIN
1
PR4112
1
PC4137 30KR2F-GP
Lab Lab PC4134
GAP-CLOSE-PWR
SC1U25V3KX-1-GP Lab PU4106 R1 SC1000P50V3JN-GP-U
2
2
2
1 6 PWR_LDO_5V_EN
A VIN EN PWR_LDO_5V_SS A
Delete 2 5
5V_AUX_S5 GND SS PWR_LDO_5V_FB
VOUTLab FB
3 4
RT9022GU6-GP
1
2 PR4126 1PWR_LDO_5V_Vout 74.09022.A3P Helium
DY PR4113
PWR_LDO_5V_SS 10KR2F-2-GP
Lab R2
1
0R2J-2-GP
Wistron Corporation
1
PC4136
2
SC2D2U6D3V3KX-GP Lab PC4135 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
SC22P50V2JN-4GP
2
Lab Title
Close Pu4106 Pin3
Vo=1.25*(1+(R1/R2)) RT8223MZQ_5V/3D3V
Custom
Helium -1
Date: Monday, August 27, 2012 Sheet 41 of 103
5 4 3 2 1
5 4 3 2 1
SSID = CPU.Regulator 1D05V_VTT

Volterra's suggestion:
8 VR_SVID_ALERT# VCC 31x22uF(0603) for 1-PHASE VCC
PR4225
1 130R2F-1-GP
2
VCCAXG 28x22uF(0603) for 1-PHASE VCCAXG
8 H_CPU_SVIDDAT
PR4226
8 H_CPU_SVIDCLK 1 54D9R2F-L1-GP
2
Boot Voltage PR4265 PR4204
27,37,48 ALL_POWER_OK
0V 825ohm 825ohm
D D
1V 191ohm 191ohm
PR4201 change to 21.5 Ohm
1
PR4201
2012 - 0104 , wayler.
21D5R2F-1-GP
PR4204 PR4211 PR4205 PR4262 PR4265
825R2F-GP 0R0402-PAD 61K9R2F-GP 280R2F-1-GP 825R2F-GP
2
PWR_VCORE_VR_ENABLE
PWR_VCORE_R_OSC
PWR_VCORE_R_SEL0
PWR_VCORE_R_SEL1
PWR_VCORE_R_SEL6
PWR_VCORE_VR_READY2
IMVP_PWRGD
PWR_VCORE_VR_TT#
PWR_VCORE_R_SEL4
5V_S5 1D8V_S0 3D3V_S5
1
1
PR4260 PC4211 PR4231
866KR2F-GP SC1U16V2KX-GP 10R2F-L-GP
2
2
2
PC4237
PWR_VCORE_VIN_UVLO_R SCD1U10V2KX-5GP
1 2 GND_1318
49
48
47
46
45
44
43
42
41
40
39
38
37
1
PR4263 PC4214 PU4201
100KR2F-L1-GP SCD1U10V2KX-5GP
R_SEL6
VR_READY2
VR_READY1
VR_TT#
R_SEL4
ALERT#
VDIO
VCLK
VR_ENABLE
R_SEL0
R_SEL1
GND
R_OSC
GND_1318
2
2
PWR_VCORE_VDD3 1 36 PWR_VCORE_R_SEL2 1 PR4207 2 0R2J-2-GP

VDD3 R_SEL2 PWR_VCORE_R_SEL3
1D8V_S0 2 35 1 PR4208 2 191R2F-GP
VDD R_SEL3 PWR_VCORE_R_REF
3 34 1 PR4209 2 20KR2F-L-GP
PWR_VCORE_VIN_UVLO VDD R_REF
1 PR4223 2 4 33
0R0402-PAD PWR_VCORE__PWM3 VIN_UVLO IPH2_2 PWR_VCORE_R_SEL5
5 32 1 PR4210 2 402R2F-GP PWR_AXG_IPH2_1_R 44
PWR_VCORE__PWM2 PWM1_3 R_SEL5 PWR_AXG_PWM2_2
6 31
PWR_VCORE__PWM1 PWM1_2 PWM2_2 PWR_AXG_PWM2_1
43 PWR_VCORE__PWM1 7 30 PWR_AXG_PWM2_1 44
PWR_VCORE__TP_FAULT#1 PWM1_1 PWM2_1 PWR_AXG_TS_FAULT#2 PR4229 R4246
43 PWR_VCORE_IPH1_1_L 43 PWR_VCORE__TP_FAULT#1 8 29 PWR_AXG_TS_FAULT#2 44
TS_FAULT#1 TS_FAULT#2 PWR_AXG_IPH2_1
9 28 1 1K96R2F-1-GP
2 2 1
IPH1_3 IPH2_1 PWR_AXG_MRAMP2
10 27
PWR_VCORE_IPH1_1 IPH1_2 MRAMP2 1KR2F-L-GP
C 1 2 1 2 11 26 C
1
PR4256 PR4216 PWR_VCORE_MRAMP1 IPH1_1 SENSE2+
12 25
SENSE1+
A2_OUT1
A3_OUT1
A3_OUT2
A2_OUT2
SENSE1-
MRAMP1 SENSE2-
1
A_ERR1
A_ERR2
750R2F-GP 1K96R2F-1-GP PR4257 PR4218 PR4212 PC4201
A2_IN1
A3_IN1
A3_IN2
A2_IN2
1
1
15K4R2F-GP 0R2J-2-GP 0R0402-PAD SC10P50V2JN-4GP
1
1
PC4229 PR4261 PR4219 PR4258 DY DY
2
SC10P50V2JN-4GP
0R0402-PAD 0R0402-PAD 0R2J-2-GP PR4215

PC4236 change to 33p DY
2
DY 13KR2F-GP VT1318MFQX-2-GP
2
13
14
15
16
17
18
19
20
21
22
23
24
PC4229 DY PC4201 DY
2
2
2012 - 0104 , wayler. 74.01318.B73
2
2012 - 0104 , wayler.
PWR_VCORE_A_ERR1
PWR_VCORE_A2_IN1
PWR_VCORE_A2_OUT1
PWR_VCORE_A3_IN1
PWR_VCORE_A3_OUT1
PWR_AXG_A3_OUT2
PWR_AXG_A3_IN2
PWR_AXG_A2_OUT2
PWR_AXG_A2_IN2
PWR_AXG_A_ERR2
PC4231 PC4236 GND_1318
SC22P50V2JN-4GP SC33P50V2JN-3GP
2 1 1 2 PWR_AXG_SENSE2_P 2 PR4252 1 VCC_AXG_SENSE 9
GND_1318 0R0402-PAD
PWR_AXG_SENSE2_N 2 PR4254 1 VSS_AXG_SENSE 9
PC4232 PR4234 PC4238 PR4235 -SB David 0R0402-PAD
2 1DY VCORE_IN1_R0 2 6K81R2F-1-GP
1 1 2 VCORE_IN1_L0 1 15KR2F-GP
2 74.01318.A73 is old version
DY Fix SVID issue
SC22P50V2JN-4GP SC680P50V2KX-2GP
PR4255 change to 30K1 Ohm
PR4237 PR4264 PR4233
1 487R2F-GP
2 1 2 VCORE_IN1_R1 1 7K5R2F-1-GP
2 2 10KR2F-2-GP
1 1 PR4251 2 PWR_VCORE_SENSE_P 2012 - 0104 , wayler.
8 VCCSENSE
PR4236 0R0402-PAD
680R2F-GP PC4235 PC4233
RDES R1 1 PR4250 2 PWR_VCORE_SENSE_N SC22P50V2JN-4GP SC22P50V2JN-4GP
R2 8 VSSSENSE
0R0402-PAD 1 2 1 2
PR4255 PC4218 DY DY
PR4244 PC4234
1 2 AXG_IN2_L1 1 2 1 2 AXG_IN2_R0 1 2 PR4240 1 2 665R2F-2-GP
6K81R2F-1-GP
SC22P50V2JN-4GP
30K1R2F-L-GP SC1KP50V2KX-1GP
PR4249
PR4245 PR4239
PC4213 1 10KR2F-2-GP
2 1 2 AXG_IN2_R1 2 1
1 2 VCORE_IPH1_R0 1 2
0R2J-L-GP
PR4238 SC3300P50V2KX-1GP 7K87R2F-GP
B 2K7R2F-GP B

PC4219 PR4239 change to 0 ohm
PR4238 change to 2K7 Ohm PR4243
1 2 AXG_IPH2_R0 1 3K24R2F-GP
2
2012 - 0104 , wayler. 2012 - 0104 , wayler.
SCD01U50V2KX-L-GP
3D3V_S0
PG4201 PR4202
GAP-CLOSE-PWR 1 10KR2F-2-GP
2 IMVP_PWRGD
IMVP_PWRGD 28,36
1 2
PR4203
1 10KR2F-2-GP
2 PWR_VCORE_VR_READY2
GND_1318
1D05V_VTT
PR4206
1 62R2J-GP2 PWR_VCORE_VR_TT#
1
PC4202
SC47P50V2JN-3GP
2
VCC_CORE
PR4222
1 43KR2F-GP
2 PWR_VCORE_MRAMP1
VCC_GFXCORE
PR4227
1 2 PWR_AXG_MRAMP2
A A
56K2R2F-2-GP

2012 - 0104 , wayler. Helium
Wistron Corporation
Title
VT1318+1323_CPU_CORE2+1(1/3)
Helium -1
5 4 3 2 1
5 4 3 2 1
VCC_CORE_PW R_IN
Small caps close to slave for placement
5V_S5 VCC_CORE_PW R_IN
PC4304
PC4305
PC4306
PC4307
PC4308
PC4309
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PG4302 2 1 GAP-CLOSE-PW R
1
PC4310
SCD1U10V2KX-5GP
PG4303 2 1 GAP-CLOSE-PW R DEL OUTPUT GAP
2
D
1D8V_S0 D
C1
C2
C3
C4
PU4301
1
PC4302
VDDH
VDDH
VDDH
VDDH
SC4D7U10V3KX-GP 42 PW R_VCORE__TP_FAULT#1 1 PR4304 2TS_FAULT#_DR1 A1 TS_FAULT# BST B4 PW R_CORE_BT1 PG4306 2 1 GAP-CLOSE-PW R
2
0R0402-PAD
1
A4 VCC
H4 PC4301
VX#H4 SCD22U10V3KX-2GP
H3
ULV Iccmax 9.7A
2
VX#H3 VCC_CORE
VX#H2 H2
PW R_VCORE_PU4301_VDD B1 H1 PL4301
VDD VX#H1
VX#F4 F4
74.01323.A7Z F3 PW R_CORE_VX1 1 2
42 PW R_VCORE_IPH1_1_L B2 ISENSE
VX#F3
VX#F2
VX#F1
F2
F1
IND-D1UH-26-GP
-SB
VX#D4 D4
1
1D8V_S0
PC4321
PC4325
PC4327
PC4328
PC4329
PC4334
PC4335
42 PW R_VCORE__PW M1 B3 PWM VX#D3 D3
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
D2 PR4303
VX#D2
1
D1 100R5F-2-GP
VX#D1
PR4301
PC4303
2
1 2 1 2 A2 GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SCD1U25V2KX-GP
C 10R2F-L-GP C
VT1323SFCX-1-GP David SA
E1
E2
E3
E4
G1
G2
G3
G4
J1
J2
J3
J4
PG4301 SC10U6D3V2MX-GP-U
PC4336
PC4337
PC4338
PC4339
PC4340
PC4330
PC4331
PC4332
PC4333
GAP-CLOSE-PW R
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
1 2
1
2
2
GND_1323S_1
-SB
PC4346
PC4347
PC4348
PC4349
PC4341
PC4342
PC4343
PC4344
PC4345
PC4350
PC4351
PC4352
PC4353
-
2
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
2
1
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC22U4V3MX-GP
B B
A Helium A
Wistron Corporation
Title
VT1318+1323_CPU_CORE2+1(2/3)
Helium -1
5 4 3 2 1
5 4 3 2 1
5V_S5 VCC_GFXCORE_PW R_IN
PG4402 GAP-CLOSE-PW R
1 2
1 2
PG4404 GAP-CLOSE-PW R DEL OUTPUT GAP

1 2
D 1 2 D
1 2
VCC_GFXCORE_PW R_IN
1
PC4403 PC4404 PC4405 PC4406 PC4407 PC4408
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
2
Small caps close to slave for placement
C1
C2
C3
C4
1D8V_S0 PU4401
VDDH
VDDH
VDDH
VDDH
42 PW R_AXG_TS_FAULT#2 1 PR4403 2 TS_FAULT#_DR3 A1 TS_FAULT# BST B4 PW R_AXG_BT3
0R0402-PAD
C C
1
A4 PC4409
VCC
VX#H4 H4 SCD22U10V3KX-2GP IccMax = 6.6A
H3
2
VX#H3
1
PC4401 H2 VCC_GFXCORE
SC4D7U10V3KX-GP PW R_AXG_PU4401_VDD VX#H2 PL4401
B1 VDD VX#H1 H1
F4
2
VX#F4 PW R_AVG_VX1
74.01323.A7Z VX#F3 F3 1 2
F2 IND-D1UH-26-GP
42 PW R_AXG_IPH2_1_R B2 ISENSE
VX#F2
VX#F1 F1 -SB
1
VX#D4 D4
SC10U6D3V2MX-GP-U
PC4410
SC10U6D3V2MX-GP-U
PC4439
B3 D3 PR4402
42 PW R_AXG_PW M2_1 PWM VX#D3
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
D2 100R5F-2-GP
VX#D2
-SB
1
1D8V_S0
PC4411
PC4414
PC4413
VX#D1 D1
2
PR4401 PC4402
2
1 10R2F-L-GP
2 1 2 A2 GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SCD1U25V2KX-GP
VT1323SFCX-1-GP David -SA

E1
E2
E3
E4
G1
G2
G3
G4
J1
J2
J3
J4
PC4429
PC4433
PC4412
PC4425
PC4426
PC4427
PC4431
PC4432
PG4401
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
1
1
GAP-CLOSE-PW R
1 2
2
B
DY B
GND_1323S_3
PC4435
PC4438
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
-SB
1
PC4434
PC4436
PC4437
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
1
2
A Helium A
Wistron Corporation
Title
VT1318+1323_CPU_CORE2+1(3/3)
Helium -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0 5V_S5 1D05V_PW R_IN
140mils or Copper Shape
2
PR4716 DEL OUTPUT GAP
10KR2J-L-GP
1D05V_PW R_IN PG4502 2 1 GAP-CLOSE-PW R
PR4518 PC4505 change to 4.7uF
1
1 2 1.05VTT_PW RGD 37,48
Delete the old version VT386F circuit wayler 2012-0104 PG4503 2 1 GAP-CLOSE-PW R
PC4505
PC4504
SCD1U10V2KX-5GP
SC4D7U6D3V2MX-GP-U
D PC4503 PC4502 PG4504 2 1 GAP-CLOSE-PW R D
1
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
2
-SB 400mils or Copper Shape 1D05V_VTT
Design Current = 12A
OCP> 19.5A
PU4502
PL4502
B5 B2 PW R_1D05V_VX 1 2
VDD VX#B2
PC4506
PC4523
PC4509
PC4510
PC4511
PC4512
PC4513
PC4516
PC4517
PC4530
PC4529
C5 VDD VX#B3 B3
Diff pair VX#B4 B4 IND-D22UH-33-GP
68.R2210.10R
1
2K74R2F-GP PW R_1D05V_VSENSE+ A2 C2 2ND = 68.R2210.10F
SENSE+ VX#C2
1 2 2 6K81R2F-1-GP
1 PW R_1D05V_VSENSE- A3 SENSE- VX#C3 C3 DY
PR4503 PR4504 C4
2
SM30 0629 VX#C4
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
PW R_1D05V_STAT A4
STAT
PR4522 AGND A1
PC4540 1 2 PW R_1D05V_OE A5
150R2F-1-GP 46,47 RUNPW ROK OE AGND_386
1
DY 2 1 2
0R0402-PAD GND B1
VCCIO_SENSE_1
PR4530 SC3300P50V2KX-1GP GND C1
PC4501 VT386FCX-ADJ-GP
1
1 2 PC4639
PC4522
C SC4700P50V2KX-1GP SC2200P50V2KX-2GP C
1
PC4518
PC4519
PC4527
PC4528
SCD1U10V2KX-L1-GP
2
DY
1
DY
2
1
1D05V_VTT
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
PR4501
25K5R2F-GP
1
PG4505
2
DY DY
GAP-CLOSE-PW R
1
2
AGND_386 PR4515
10R2F-L-GP
2
PR4501 change to 25.5K ohm
wayler 2012-0104 close output MLCC
PR4510
0R2J-2-GP
VCCIO_SENSE_C 1 2 VCCIO_SENSE 8
Change to 0603_4V
VSENSE-TRACE DY
ROUTED DIFFERENTIALLY
PARALLEL TO VSENSE+ PR4517
0R2J-2-GP DY
1 2 VSSIO_SENSE 8
B B
close output MLCC

1
PR4520
10R2F-L-GP Change 0R PAD to 0R and DY
2
Helium
A A
Wistron Corporation
Title
VT386_+1.05V_VTT
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
5V_S5 1D35V_PWR_IN
1D35V EN
VT357 for 1D35V
1D35V_PWR_IN
3D3V_S0
R4615
1
27 EC_SLP_S4# 2 1
0R0402-PAD PR4602 PG4604 2 1 GAP-CLOSE-PWR DEL OUTPUT GAP
1
100KR2J-4-GP
1
NON DS3 PR4601 PC4611 PC4612 PC4613 PC4614 PC4615 PG4611 2 1 GAP-CLOSE-PWR
2
R4616 10R3J-3-GP
SC10U10V3MX-GP
SC10U10V3MX-GP
SC10U10V3MX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-L1-GP
19,27 PM_SLP_S4# 2 1
2
VCC1R5A_AVDD
D 0R2J-L-GP RUNPWROK D
1
PC4601
SCD22U10V2KX-L1-GP
2
VCC1R5A_ON_R
C4
C5
B3
E4
E5
AGND_1R5A PU4601
1D35V Vout
AVDD
VDD
VDD
VDD
VDD
OCP = 1.4A
VCC1R5A_IRIP B2
B4
IRIPL
TEMP
VX#D1
VX#D2
D1
D2
-SD 1D35V_S3
VCC1R5A_BIAS A1 D3
BIAS VX#D3 PL4601
VCC1R5A_RSEL A2 D4
R_SEL/ILOAD VX#D4 VCC1R5A_VX
D5 1 2
VX#D5
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SCD1U16V2KX-3GP
SC6800P25V2KX-1GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
VCC1R5A_ON_R VCC1R5A_ON_R A5 A4 IND-D22UH-34-GP
OE VSENSE+
45,47 RUNPWROK B5
STAT VDES
A3 68.R2210.10T DY
PC4629 PC4630
1
For POWER Sequence PC4621 PC4622 PC4623 PC4624 PC4625 PC4626 PC4627 PC4628 PC4632 PC4631
AGND
GND
GND
GND
GND
GND
GND
SCD01U16V2KX-L1-GP
2
1
PR4604 PR4605
1
PC4602 PR4603 VT357FCX-ADJ-007-GP
C1
C2
C3
E1
E2
E3
B1
44K2R2D-GP 6K49R2D-GP 28KR2F-GP
2
AGND_1R5A
collect all AGND referenced VENSE- trace routed differntially parallel to VSENSE+
signals before droping to GND VCC1R5A_VDES SENSE_VCC1R5A
AGND_1R5A
C C
Settin Vout
1 PR4611 2
1
0R0402-PAD
1
PC4604 PR4608 1 PR4609 2
SC2200P50V2KX-2GP 48K7R3F-1-GP 0R0603-PAD
1 PR4610 2
2
AGND_1R5A 0R0603-PAD
2
VCC1R5A_VDES_RR
Don't connect AGND and GND under the chip PR4608 change to 48.7K Ohm
1
Add PR4614 604 Ohm
PR4615
604R3F-1-GP 2012-0104 Wayler
2
SENSE_VCC1R5A_GND
PR4612
0R0402-PAD
0D675V PWR IN
PG4605
1 2
37 0D75V_EN 0.675V PWR_1D5V_VTTIN 1 2 1D35V_S3
VCC1R5A_ON_R 1 2
RT9026 for 0D675V_S0 Iomax=1A
1
GAP-CLOSE-PWR
PR4613 PC4603
SC10U6D3V2MX-GP-U PG4606
0R0402-PAD
0D675V Vout
2
PU4602 1 2 DDR_VREF_PWR
PG4608
PWR_0D75V_EN 7 2 1 2
S3# VLDOIN GAP-CLOSE-PWR 0D675V_S0
PWR_1D5V_EN 9 3 DDR_VREF_PWR
S5# VTT
GAP-CLOSE-PWR
DDR_VREF_S3 PG4607
PC4616 PC4617 4 1 PR4606
1
PGND VDDQSNS 0R0402-PAD

5 1 2
VTTSNS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY DY 8 6 PWR_1D5V_VTTREF 1 2
GND VTTREF
11 10
2
GND VIN GAP-CLOSE-PWR

SC1U10V2KX-1GP
1
PC4607 PC4605 PC4608
1
RT9026GQW-GP-U
PWR_1D5V_VIN
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
2
2
B B
2
PR4607
5D1R2F-GP
2 1 1D35V_PWR_IN
1
PC4606 For Layout check

SC1U10V2KX-1GP
PT9041B for 1D5V_S0
2
3D3V_S5
Iomax=140mA
1D5V LDO Vout
1
PC4618 PU4603
SCD1U10V2KX-L1-GP 1D5V_PWR 1D5V_S0
PG4610
2
1 6 PWR_1D5V_PVIN
VDD VIN
2 5 1 2
GND VOUT PWR_1D5V_FB
3 4
EN ADJ -SB
1
GAP-CLOSE-PWR
1
RT9041B-10GE-GP PR4705
1
88K7R2F-GP PC4713 PC4712 PC4714
SC22P50V2JN-4GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
For POWER Sequence PR4707
2
1 2 PWR_1D5V_S0_EN
47 1D5V_S0_EN
2
2
0R0402-PAD
R1
1
PWR_1D5V_FB
PC4708
SC22P50V2GN-GP
2
1D5V_S0 PWR IN DY
1
A A
PR4706
100KR2F-L1-GP R2
1D8V_S0
PG4609
2
1 2 PWR_1D5V_PVIN
Helium
1
GAP-CLOSE-PWR
Wistron Corporation
1
PC4710 PC4709
setting Vout
SC10U6D3V3MX-GP
SC1U6D3V2KX-L-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
Vout=0.8*(1+R1/R2) Taipei Hsien 221, Taiwan, R.O.C.

2
Title
DC-DC VCC1R5A
A2 -1
Helium
5 4 3 2 1
5 4 3 2 1
PWR_1D8V_PVDD
DEL OUTPUT GAP
D
DY D
1
PC4701 PC4702
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PC4703
SC1U6D3V2KX-L-1-GP
SYW231 for 1D8V_S0
2
2
Iomax=1.242A
1D8V_S0
OCP>5A
2.2A
PU4701
SYW231ABC-GP
PL4701
R4701
PWR_1D8V_PVDD 4 3 PWR_1D8V_PHASE 1 2
IN LX IND-1UH-156-GP
45,46 RUNPWROK 1 2 5 PG GND 2
PWR_1D8V_FB 6 1 68.1R050.10G
FB EN
1
0R0201-PAD-GP
1
PR4703 PC4705
R1
SC22P50V2JN-4GP
200KR2F-L-GP
2
C C
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
46 1D5V_S0_EN
PC4706
PC4707
1
1
PWR_1D8V_FB
2
1
1 PR4702 2 PWR_1D8V_S0_EN
27,29,36,37,62 EC_PM_SLP_S3#
0R0402-PAD PR4704
100KR2F-L1-GP R2
1
PC4704
2
SC22P50V2GN-GP
2
DY
Vo=0.6*(1+(R1/R2))
For layout concern
B
-SB 3D3V_S0
B
3D3V_SRC PWR_1D8V_PVDD
PG4702
1
1 2 DY R4702
100KR2J-4-GP
GAP-CLOSE-PWR
PG4706
2
1 2
1D5V_S0_EN
GAP-CLOSE-PWR
Helium
A
Title
1D8V_S0 SYW231
A4 -1
Helium
5 4 3 2 1
5 4 3 2 1
-SD ALL_POW ER_OK
D
Q4801
G LSK3541G1ET2L-GP VCCSA
SY8037 for VCCSA 36,37 PS_S3CNTRL VID0 VID1 ULV
84.03541.F31 L L 0.9V
S
D D
L H 0.85V
H L 0.775V
H H 0.75V
1 2 3D3V_S0 Vccsa Power Good

PR4803 10KR2J-L-GP
DEL PR4808
ALL_POW ER_OK ALL_POW ER_OK 27,37,42
PW R_VCCSA_VID1 1 PR4804 2 VCCSA_VID1 9

0R0402-PAD
PW R_VCCSA_VID0 1 PR4805 2 VCCSA_VID0 9
0R0402-PAD
5V_S5
DEL OUTPUT GAP
DEL PR4801
PR4806
1.05VTT_PW RGD
1.05VTT_PW RGD 37,45
1 2
1
10R3F-GP PC4810
Vccsa EN
DY
1
C PC4814 SC1U6D3V2KX-L-1-GP C
2
SC1U10V2KX-1GP PC4816
SC2D2U10V3KX-L-GP
2
1227 SA
CYNTEC - PCMB042T-R47MS
Vccsa PWR IN PU4801 package : 4.15 * 4 * 1.8
PW R_VCCSA_VID1 7 ID 7 A ~ 9.5A Design Current =4 A
VCCUSA_SENSE VID1 PW R_VCCSA_VID0
VCCUSA_FB
8 VOUT VID0 6
1.05VTT_PW RGD
DCR = 12.5 ~ 14mOhm 6.6A<OCP< 7.8A
9 FB EN 5
5V_S5 PW R_VCCSA_SVIN 10 4 ALL_POW ER_OK
SVIN PG PL4801 0D85V_S0
PG4801 11 3
PW R_VCCSA_VIN PVIN LX#3
1 2 12 PVIN LX#2 2
13 1 PW R_VCCSA_SW 1 2
GAP-CLOSE-PW R GND LX#1
1
PG4802 PC4807 PC4812 PC4811 COIL-D47UH-9-GP

1 2 SY8037DDCC-GP
SC10U10V3MX-GP
SC10U10V3MX-GP
PC4803 PC4804 PC4805 PC4806

74.08037.B43
SCD1U10V2KX-L1-GP
2
GAP-CLOSE-PW R
1
PG4803
1 2 DY
2
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SCD1U25V3KX-L-GP
GAP-CLOSE-PW R
0D85V_S0
B B
2
VCCUSA_FB PR4811
100R2F-L1-GP-U
2
PC4817
SC68P50V2JN-1GP
1
1
VCCUSA_SENSE 1 PR4810 2 VCCSA_SENSE 9

0R0402-PAD
Helium
A A
Wistron Corporation
Title
SY8037_VCCSA
A3
Helium -1
5 4 3 2 1
SSID = VIDEO
EDP CONNECTOR
Camera Power
EDP1
output turn-0n Rising TIme:1.3ms~2.7ms
3D3V_S0 3D3V_CAMERA_S0
IPEX-CON30-4-GP-U
F4902 current limit:2~3.3A
34
32
30
1 2 Previous parts(74.05285.07F)rise time:1.5ms ~5ms
29 current limit:1.5ms~ 3.5ms LCDVDD
1
CPU_EDP_DATA1#_C C4914 SCD1U10V1KX-GP FUSE-D5A6V-2-GP
28 1 2 CPU_EDP_DATA1# 4
27 CPU_EDP_DATA1_C C4918 1 2 SCD1U10V1KX-GP CPU_EDP_DATA1 4 69.4R500.141 C4903 3D3V_S0
SC10U6D3V2MX-GP-U
26 2nd = 69.4R500.151 Layout 40 mil
2
25 CPU_EDP_DATA0#_C C4908 1 2 SCD1U10V1KX-GP CPU_EDP_DATA0# 4
CPU_EDP_DATA0_C C4907 SCD1U10V1KX-GP U4901
24
23
1 2 CPU_EDP_DATA0 4 6V 0.5A
22 CPU_EDP_AUXP_C C4901 1 2 SCD1U10V1KX-GP 1 6 LCDVDD_U 1 R4951 2
CPU_EDP_AUXN_C CPU_EDP_AUX 4 IN OUT
21 C4906 1 2 SCD1U10V1KX-GP 2 5 0R0603-PAD
20
CPU_EDP_AUX# 4
-1 U4901_R 3
NC#2
DSG
GND
EN
4 PCH_LCDVDD_EN 17
C4910
SC4D7U10V3KX-GP
19 C4911
LCDVDD
-1
SC4D7U10V3KX-GP
18
17 G5244A31U-GP
2
16 74.05244.073
C4909
SC56P50V2JN-2GP
15 R4908
1
14 DBC_EN_C 1 2 DP_HPD0_C R4904
13 33R1J-GP 100R1J-GP DY
12
2
11
2
10
9 BLON_OUT_C
8 LCD_BRIGHTNESS 1 R4907 2 PCH_BKLT_CTL 17
7
6 33R2J-L1-GP LCDVDD
5
4
-SA David
DCBATOUT_LCD
3
2 C4904 C4905
1
SC1U6D3V2KX-L-1-GP
1
SCD1U10V1KX-GP
31
2
33
20.F1407.030
CCD1
23
-SD
21 CPU_EDP_HPD# 4
1 R4920
2 1 2
3
4
D
0R2J-L-GP
5
6 Q4901
7 TS_AGND DP_HPD0_C G LSK3541G1ET2L-GP
7781_SDA 28,69
8 7781_SCL 28,69 Light Sensor 84.03541.F31
9 SENSOR_INT 27
1
10 TS_INT
11 R4902
S
12 100KR1J-GP
USB_PP3 18
13 USB_PN3 18 Touch
14 TS_AGND
2
15 USB_PP6 18 CCD
16 USB_PN6 18
17
18 5V_TS_S0
19 3D3V_CAMERA_S0
20
22 DY DY
1
24 C4951 C4952
SC1P25V1BN-GP
SC1P25V1BN-GP
2
IPEX-CON20-3-GP
20.F1407.020
5V_TS_S0
F4901 DCBATOUT
R4915
POLYSW-1D1A24V-GP-U
DCBATOUT_LCD
1 2
33R2J-L1-GP
TS_KBC_INT 27 5V_S0 R4905 69.50007.A31
BLON_OUT_C
2nd = 69.50007.A41
F4910 27 BLON_OUT 1 2
R4912 2 1
1 2 1KR2J-L2-GP
1
1 2 Touch_Screen_INT 18 C4917 C4916
1
DY C4919 C4915
1
FUSE-D5A6V-2-GP
SC1KP25V1KX-GP
33R2J-L1-GP R4911 SC100P25V1KX-GP SCD1U25V2KX-GP
2
SC10U25V5KX-1-GP
69.4R500.141 C4913 100KR1J-GP
2
SC10U10V3MX-GP
2nd = 69.4R500.151
2
D
DY
Q4902
TS_INT G FK3303010L-GP
84.33030.031
6V 0.5A
S
-1 -SD
A Sku
Wistron Corporation
Title
LCD/Inverter CONN
A2
Helium -1
5 4 3 2 1
Pull High 5V Design on CRT Board

CRT DDCDATA & DDCCLK level shift
D D
C C
B B
A Helium A
Wistron Corporation
Title
CRT Connector
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO -SE

HDMI Level Shifter -SC Micro HDMI CONN
HDMI1
CHASSIS
CHASSIS
21
20
C5103 1 2 SCD1U10V1KX-GP HDMI_CLK_R_C# HPD_HDMI_CON 1

17 HDMI_CLK_R# C5104 SCD1U10V1KX-GP HDMI_CLK_R_C
17 HDMI_CLK_R 1 2 2
D HDMI_DATA2_R_C 3 4 D
C5105 1 2 SCD1U10V1KX-GP HDMI_DATA0_R_C# HDMI_DATA2_R_C# 5 6 HDMI_DATA1_R_C
17 HDMI_DATA0_R# C5106 SCD1U10V1KX-GP HDMI_DATA0_R_C HDMI_DATA1_R_C#
17 HDMI_DATA0_R 1 2 7 8
HDMI_DATA0_R_C 9 10
HDMI_DATA0_R_C# 11 12 HDMI_CLK_R_C
13 14 HDMI_CLK_R_C#
5V_S0 5V_HDMI_S0 15 16
F5101
C5110 1 2 SCD1U10V1KX-GP HDMI_DATA1_R_C# DDC_CLK_HDMI 17 18 DDC_DATA_HDMI
17 HDMI_DATA1_R# C5107 SCD1U10V1KX-GP HDMI_DATA1_R_C
17 HDMI_DATA1_R 1 2 1 2 19
1
C5108 1 2 SCD1U10V1KX-GP HDMI_DATA2_R_C# C5102 22 CHASSIS
17 HDMI_DATA2_R# C5109 SCD1U10V1KX-GP HDMI_DATA2_R_C FUSE-D5A6V-2-GP SCD1U10V1KX-GP
17 HDMI_DATA2_R 1 2 23
69.4R500.141 CHASSIS
2
2nd = 69.4R500.151 SKT-HDMI23-79-GP-U
6V 0.5A 62.10078.D81
8
7
6
5
8
7
6
5
RN5106 RN5107
SRN680J-1-GP SRN680J-1-GP
1
2
3
4
1
2
3
4
HDMI_PLL_GND
5V_S0
C Q5103 C
D
LSK3541G1ET2L-GP
84.03541.F31
G
S
HPD_HDMI_CON
Del 100K 3d3v
3D3V_S0
3
Q5102 1 HDMI_HPD_B 1 2
PMBS3904-1-GP R5111 150KR1J-GP
1
R5125 84.03904.L06 R5110
DY
HDMI_HPD_E 200KR1J-GP
17 HDMI_PCH_DET 1 2 2nd = 84.03904.P11
2
0R0201-PAD-GP
1
R5112
10KR1J-GP
2
B B
D5101
5V_HDMI_S0 A K DDC_DA_P
1SS400-2-GP
83.00400.B1F
2nd = 83.2S101.01F
D5102
A K DDC_DA_P1
1SS400-2-GP
83.00400.B1F
2nd = 83.2S101.01F
1
2
3D3V_S0 RN5105
SRN2K2J-1-GP
Q5104
4
3
4 3 DDC_CLK_HDMI
17 PCH_HDMI_CLK
A Helium A
5 2
6 1
Wistron Corporation
2N7002KDW -GP Taipei Hsien 221, Taiwan, R.O.C.
17 PCH_HDMI_DATA
84.2N702.A3F
DDC_DATA_HDMI Title
2nd = 84.DM601.03F
HDMI Level Shifter/Conn
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
LED BACKLIGHT CONVERTER POWER
D D
C C
B B
A Helium A
Wistron Corporation
Title
eDP
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
Helium
A
Title
S-VIDEO
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
H_CPURST# use pull-up Resistor close

ITP connector 500 mil ( max ),
others place near CPU side.
C C
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
B B
Helium
A
Title
ITP
A4
Helium -1
5 4 3 2 1
SSID = SATA MSATA Connector -SB
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
MSATA1
-1 -SB
SC10U6D3V2MX-GP-U
SC22U6D3V3MX-1-GP
33
SC10U6D3V2MX-GP-U
31
SCD1U10V1KX-GP
3D3V_S0 1 DMP2130L-7-GP
1
84.02130.031 5V_S5
1
DY C5630 DY 2 2ND = 84.03413.A31
C5601 C5602 C5603 C5604 C5605 3
2
4 Q5601
2
5
-2 6
7 +5V_DEBUG_RX D
S -SD
D
8
SCD1U16V2KX-3GP
G
PD on Small MB -SB David +5V_DEBUG_RX 9 C5620
1
Pin 12 For Shark Bay use 10
1
11
12 R5613
2
DEBUG_DET# 13 100KR2J-4-GP
14
鐵鐵鐵
22 SATA_RAID0
Vender suggest 2pin isolated at least 27 E51_RXD 15
2
for Coaxial between 27 E51_TXD 16
17 DEBUG_DET#
18
19
20
21 SATA_TXN0 21
21 SATA_TXP0 22
23
21 SATA_TXN1 24
21 SATA_TXP1 25
SATA_RXP0_IR 26
SATA_RXN0_IR 27
SATA_RXP1_IR
28
29
DEBUG CARD
SATA_RXN1_IR 30
32
34
if mSATA pin 51 present have internal PD,
IPEX-CON30-4-GP-U DY Q5602
20.F1407.030
Redriver
-SD
3D3V_S0 1 R5611 2
0R0402-PAD
1
PS8520BTQFN20GTR-GP C5607
SCD1U10V1KX-GP
2
From MSata Cable(A_IN) SCD01U10V1KX-1GP SATA_RXP0_IR 2 1C5608 SATA_RXP0_I 1 6
SCD01U10V1KX-1GP SATA_RXN0_IR A_INP VDD
2 1C5612 SATA_RXN0_I 2 A_INN VDD 16
SCD01U10V1KX-1GP 2 1C5618 SATA_RXP0_O 15
A_OUTP
To PCH(A_OUT) 21 SATA_RXP0
21 SATA_RXN0
SCD01U10V1KX-1GP 2 1C5619 SATA_RXN0_O 14
A_OUTN
9 A_PRE0_R R5605 1 2DY 4K7R2J-L-GP
SCD01U10V1KX-1GP SATA_RXP1_IR A_PRE0
From MSata Cable(B_IN) 2 1C5616 SATA_RXP1_I 11 B_INP B_PRE0 8 B_PRE0_R R5606 1 2DY 4K7R2J-L-GP
SCD01U10V1KX-1GP SATA_RXN1_IR 2 1C5617 SATA_RXN1_I 12 19 A_PRE1_R R5607 1 2 4K7R2J-L-GP
SCD01U10V1KX-1GP B_INN A_PRE1
2 1C5614 SATA_RXP1_O 5 B_OUTP B_PRE1 17 B_PRE1_R R5608 1 2 4K7R2J-L-GP
21 SATA_RXP1 SCD01U10V1KX-1GP 2 1C5615 SATA_RXN1_O 4 B_OUTN
To PCH(B_OUT) 21 SATA_RXN1
7 U5601_EN C5610 1 2 SCD1U10V1KX-GP
EN U5601_TEST R5609 1
TEST 18 2DY 4K7R2J-L-GP
3 20 U5601_REXT R5610 1 2 4K7R2F-GP
GND REXT
13 GND
21 GND NC#10 10
U5601
A Sku
Wistron Corporation
Title
HDD/ODD
A3
Helium -1
5 4 3 2 1
ESATA Power
D D
C C
USB CHARGER
B B
A Helium A
Wistron Corporation
Title
E-SATA/USB CHARGER
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO LINE OUT
AUD_HP1_JACK_R1 L5803 1 2 0R2J-L-GP MB_HP_R 29

D D
AUD_HP1_JACK_L1 L5802 1 2 0R2J-L-GP MB_HP_L 29
1
EC5821 EC5822
MLVS0603M04-1-GP
MLVS0603M04-1-GP
DY DY
2
C
U2 版版~!!! -SD
C
AUDIO-JK338-GP-U2
5 AUD_HP1_JD# AUD_HP1_JD# 29
3 AUD_HP1_JACK_R1
2 AUD_HP1_JACK_L1
4 AUD_AGND R5815
1 COMBO_MIC_C 2 1 COMBO_MIC COMBO_MIC 29
0R1J-GP
LOUT1
22.10270.L41
Speaker
B B
Connector
SPK1
5
29 AUD_SPK_L- 1
29 AUD_SPK_L+ 2
29 AUD_SPK_R- 3
29 AUD_SPK_R+ 4
6
ACES-CON4-51-GP Helium
20.F2134.004
A
Title
Audio Jack
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
D
7.Must not cross ground moat,except D
RJ-45 moat.
Without LAN
C C
B B
Helium
A
Title
LAN CONNECTOR
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
BIOS PCH_CS0#
SSID = Flash.ROM PCH PCH
(U6001) 2M
PCH_CS1# PCH_CS0#
KBC KBC_CS# BIOS KBC_CS#

KBC KBC
(U6002) 4M (U6001)
3D3V_ROM
-SC 3D3V_ROM
D D
SPI Flash ROM(2M) for PCH
1
C6004 3D3V_S5 2 R6020 1
SCD1U10V1KX-GP 0R0402-PAD
3D3V_ROM
2
3D3V_AUX_S5 2 R6019 1
3D3V_S0
DY
0R2J-L-GP
3
4
3D3V_AUX_S5 RN6002
SRN4K7J-8-GP
-SB
1
C6002
2
1
SCD1U10V1KX-GP PCH_HOLD_0#
1
R6005
-SE DY 4K7R1J-GP
1
3
4
R6004 RN6001 SPI Flash ROM(4M) for KBC
2
DY 4K7R1J-GP SRN4K7J-8-GP
Flash ROM:72.25Q16.B01(2M) 3D3V_ROM
2
2
1
KBC_SPI_HOLD_0#
U6001
PCH_SPI_CLK_ROM
U6002 3D3V_AUX_S5 9
GND U6001_VCC_R
21,27 PCH_SPI_CS0#_R 1 8 1 R6018 2
PCH_SPI_MISO_ROM CS# VCC 0R0402-PAD
9 KBC_SPI_CLK 27 2 7
GND PCH_WP# DO/IO1 HOLD#/IO3
27 KBC_SPI_CS# 1 8 3 6
KBC_SO_R CS# VCC WP#/IO2 CLK PCH_SPI_MOSI_ROM
27 KBC_SPI_SO 1 2 2 7 4 5
R6001 33R1J-GP KBC_SPI_WP# DO/IO1 HOLD#/IO3 GND DI/IO0
3 6
WP#/IO2 CLK
1
4 5 KBC_SPI_SI 27
GND DI/IO0
1
R6009 W25Q16CVZPIG-GP EC6004 EC6005
1
C C
DY 4K7R1J-GP 72.25Q16.G01 DY SC4D7P50V1CN-GP DY SC10P25V1JN-GP
1
1
EC6002 R6008 W25Q32BVZPIG-GP EC6003 EC6001
-SB
2
DY SC4D7P50V1CN-GP DY 4K7R1J-GP DY SC4D7P50V1CN-GP DY SC10P25V1JN-GP
2
72.25Q32.B01
2
2
2
Flash ROM:72.25Q32.B01(4M)
RN6003
1 4 PCH_SPI_CLK_ROM
SSID = RBATT 21 PCH_SPI_CLK
2 3 PCH_SPI_CLK_KBC 27
-SB David(layout placement concern) SRN33J-5-GP-U
RN6004
1 4 PCH_SPI_MOSI_ROM
21 PCH_SPI_MOSI
2 3 PCH_SPI_MOSI_KBC 27
SRN33J-5-GP-U
RN6005
B 27 PCH_SPI_MISO_KBC 1 4 B
PCH_SPI_MISO_ROM 2 3 PCH_SPI_MISO 21
SRN33J-5-GP-U
1
EC6006
DY SC4D7P50V1CN-GP
2
Change P1 to P2 to meet RTC battery pin define
D6002 RTC1
RTC_AUX_S5 3D3V_AUX_S5 RTC_AUX_S5 3
BAT54GP-GP-U 1
R6006
1 2 1 RTC_AUX_S5_R 2
4
3 1KR2F-L-GP
83.R2003.I81 ACES-CON2-38-GP
1
DY 2
C6003
SC1U6D3V2KX-L-1-GP 20.F2134.002
2
A A
RTC battery charger sircuit Helium
Wistron Corporation
Title
Flash(KBC+PCH)/RTC
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = USB
D Change Main source D
1D35V_PWR_IN
Support 2.45A 5V_USB1_S3
U6101
For Layout concern at least 80 mil
at least 80 mil 1 GND OUT#8 8
2 IN#2 OUT#7 7
SC1U10V2KX-1GP
ST100U6D3VAM-3-GP
3 IN#3 OUT#6 6
1
4 5 C6102 TC6101 EC6101 EC6102
62 USB_PWR_EN_R EN/EN# OCB
1
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
C6101 C6105
Right ON MB
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
H active SY6288CCAC-GP
74.06288.079
2
2ND = 74.02001.079
80.10715.B1L
2ND = 77.51071.04L
C C
Change Main source

5V_S5
Support 2.45A 5V_USB2_S3
U6102
at least 80 mil
at least 80 mil 1 GND OUT#8 8
2 IN#2 OUT#7 7 Left ON MB
SC1U10V2KX-1GP
ST100U6D3VAM-3-GP
3 IN#3 OUT#6 6
1
4 5 C6103 TC6102 EC6103 EC6104
27,62 USB_PWR_EN EN/EN# OCB
1
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
C6104
2
SCD1U10V2KX-5GP
L active SY6288DCAC-GP
74.06288.A79
2
2nd 74.02000.B71
B 80.10715.B1L B
2ND = 77.51071.04L
Helium
A
Title
USB Power SW
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
69.10103.041 USB3.0 Port1

JE40 modify
USB_PN1_U 4 3 USB_PN1_L
USB_PP1_U 1 2 U6201 USB_PP1_L

USB 3.0 Connector
L6201 R6201 1 215R2F-2-GP USB30_RN1_R 1 10 USB30_RN1_R
Pin definition
18
18
USB30_RN1
USB30_RP1 FILTER-4P-6-GP R6202 1 215R2F-2-GP USB30_RP1_R 2
3
IN1
IN2
NC#10
NC#9 9
8
USB30_RP1_R
-1 1 POWER
USB30_TXDN1_C
GND GND
USB30_TXDP1_C
C6213 1 2SCD1U10V1KX-GP USB30_TN1_R R6203 1 215R2F-2-GP USB30_TXDN1_C 4 7 USB30_TXDN1_C
18 USB30_TN1 C6212 1 IN3 NC#7
18 USB30_TP1 2SCD1U10V1KX-GP USB30_TP1_R R6204 1 215R2F-2-GP USB30_TXDP1_C 5 IN4 NC#6 6 USB30_TXDP1_C 2 USB 2.0 D-
USB30_RN1
USB30_RP1
D
-SC For RF
TVW DF1004AD0-GP
3 USB 2.0 D+
D
83.01004.0A0 4 GND
For ESD For Connector,So DY
For Connector 5 StdA_SSRX-
1
SC1P50V2CN-1GP
SC1P50V2CN-1GP
SC1P50V2CN-1GP
SC1P50V2CN-1GP
FC6201 FC6202 FC6203 FC6204
6 StdA_SSRX+
2
7 GND
DY DY DY DY
69.10103.041 USB3.0 Port2 8 StdA_SSTX-
4 3 USB_PN2_L 9 StdA_SSTX+
18
18
USB_PN1
USB_PP1 1 2 U6202 USB_PP2_L

-1
USB30_TXDN2_C
USB30_TXDP2_C
L6202 R6208 1 215R2F-2-GP USB30_RN2_R 1 10 USB30_RN2_R
18 USB30_RN2 IN1 NC#10
18 USB30_RP2 FILTER-4P-6-GP R6210 1 215R2F-2-GP USB30_RP2_R 2 9 USB30_RP2_R
IN2 NC#9
USB30_RN2
USB30_RP2
3 GND GND 8
C6214 1 2SCD1U10V1KX-GP USB30_TN2_R R6205 1 215R2F-2-GP USB30_TXDN2_C 4 7 USB30_TXDN2_C
18 USB30_TN2 C6215 1 IN3 NC#7
18 USB30_TP2 2SCD1U10V1KX-GP USB30_TP2_R R6207 1 215R2F-2-GP USB30_TXDP2_C 5 IN4 NC#6 6 USB30_TXDP2_C
-SC For RF
TVW DF1004AD0-GP
1
SC1P50V2CN-1GP
SC1P50V2CN-1GP
SC1P50V2CN-1GP
SC1P50V2CN-1GP
83.01004.0A0 FC6205 FC6206 FC6207 FC6208
For ESD For Connector,So DY
For Connector
2
1D35V_PW R_IN <--This is 5V_S5 DY DY DY DY
C 5V_USB2_S3 5V_USB1_S3
-SE C
1
R6206 USB2 USB1

CHASSIS CHASSIS
10 10
4K7R2J-L-GP
1D35V_PW R_IN <--This is 5V_S5 13

CHASSIS
13
CHASSIS
USB30_TXDP2_C 9 USB30_TXDP1_C 9
1 -SE 1
2
USB30_TXDN2_C 8 USB30_TXDN1_C 8
USB_PN2_L 2 USB_PN1_L 2
SELCDP 7 7
1
USB_PP2_L 3 USB_PP1_L 3
SC10U10V3MX-GP
C6202 C6201 USB30_RP2_R 6 USB30_RP1_R 6

SCD1U10V1KX-GP
4 4
2
USB30_RN2_R 5 USB30_RN1_R 5
1
R6209 12 12
11 CHASSIS 11 CHASSIS
4K7R2J-L-GP
DY CHASSIS CHASSIS
SKT-USB13-105-GP SKT-USB13-105-GP
2
22.10341.C41 22.10341.C41
B
3D3V_AUX_S5 1D35V_PW R_IN
-SD Left ON MB
Right ON MB
B
27,61 USB_PW R_EN 1 R6106 2

DY
2
0R1J-GP R6219 DY R6220
1 R6107 2 100KR1J-GP 4K7R2J-L-GP

27 USB_CHG_EN
0R1J-GP
-1 1D35V_PW R_IN
1
Active:HIGH U8102 This is 5V_S5-->

61 USB_PW R_EN_R 1 R6108 2 USB_PW R_CEN 1 INT GND 9
0R0201-PAD-GP USB_PN1_U 2 8 CB 1 R6120 2 EC_PM_SLP_S3# 27,29,36,37,47
R6221 D- SB#
USB_PP1_U 3 7 0R0201-PAD-GP USB_PN0 18
SELCDP D+ Y-
27 USB_CHG_EN 1 2 4 SEL Y+ 6 USB_PP0 18
DY VDD 5
0R2J-2-GP
PI5USB1457AZAE-GP-U
74.01457.073
A Helium A
Wistron Corporation
Title
USB 3.0 Port

A3
Helium -1
5 4 3 2 1
5 4 3 2 1
Bluetooth Module conn.
D D
C C
Without BT
B B
Helium
A
Title
Bluetooth
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
Finger printer
JE40 delete FP function

C C
F/P
1 8
B B
Helium
A
Title
RESERVED
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
SB_20120113_IOAC
SSID = Wireless
Mini Card Connector(802.11a/b/g/n) 3D3V_IOAC
SC22U6D3V3MX-1-GP
SB_20120113_IOAC
1
C6501 U6502
3D3V_IOAC F12 A1
2
3D3V GND
D
GND A9 D
G4 C1
-SB -SC 3D3VAUX GND
GND C10
1
1
GND D7
C6502 C6503 C6504 27 W IFI_RF_EN 1 R6516 2 W IFI_RF_EN_R G6 E6
0R0201-PAD-GP 0R2J-L-GP U6502_G7 WIFI_DISABLE GND
27 AP_DET# 1 DY 2 G7 F7
2
2
WIFI_LED GND
SCD1U16V2KX-3GP
SC10U6D3V2MX-GP-U
SCD1U16V2KX-3GP
R6525 H2
GND
20 PCIE_RXN4 L6 PERN0 GND B12
20 PCIE_RXP4 L7 PERP0 GND B11
GND A2
20 PCIE_TXN4 L8 PETN0 GND A10
20 PCIE_TXP4 L9 PETP0 GND C4
GND C12
GND D8
27 BLUETOOTH_EN 1 R6515 2 BLUETOOTH_EN_R E12 E7
0R0201-PAD-GP R6526 0R2J-L-GP U6502_G8 BT_DISABLE GND
1 DY 2 G8 F8
-SB 27 AP_DET# BT_LED GND
GND H11
A3
RF suggestion SB_20120113_IOAC 18
18
USB_PP5
USB_PN5
G9
G10
USB_D+
GND
GND A11
C5
USB_D- GND
GND D3
USB_PN5 USB_PP5 3D3V_IOAC D9
PLT_RST#_MD222 GND
D1 PERST# GND E8
GND G1
1
EC6509 DY EC6507 DY EC6503 DY 27 W LAN_PCIE_W AKE# 1 R6514 2 PCIE_W AKE#_W LAN E1 H12
WAKE# GND
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
0R0201-PAD-GP A5
GND
20 PCIE_W LAN_CLKREQ# F1 A12
2
CLKREQ# GND
GND C6
20 PCIE_CLK_W LAN L5 REFCLK+ GND D4
C L4 D10 C
20 PCIE_CLK_W LAN# REFCLK- GND
GND E9
GND G3
GND L1
GND A6
F4 NC#F4 GND B1
F9 NC#F9 GND C7
F10 NC#F10 GND D5
A4 NC#A4 GND E3
G5 NC#G5 GND E10
For SIV,please near to U6502 For SIV,please near to U6502 D12
F5
NC#D12 GND G12
L2
TP6501 TP6504 NC#F5 GND
GND A7
1 PCIE_TXN4 1 PCIE_CLK_W LAN B2
GND
GND C8
TPAD14-OP-GP TPAD14-OP-GP GND D6
GND E4
TP6502 TP6503 GND F3
GND H1
1 PCIE_TXP4 1 PCIE_CLK_W LAN# A8
GND
GND C9
TPAD14-OP-GP TPAD14-OP-GP GND E5
GND F6
GND L10
54.03342.651 GND L11
GND L12
GND L3
B W LAN-MODULE-61-GP B
SB_20120117_IOAC
RDS=70 ohm 3D3V_IOAC 3D3V_S0 -SC
I=1.75A
IOAC circuit R6504
5,18,27,36,71,81,97 PLT_RST#
R6527 1 0R2J-L-GP
2 PLT_RST#_MD222
3D3V_SRC
LOW ENable 2
0R2J-L-GP
1
R6528 1 0R2J-L-GP
2
U6501 27 PLT_RST#_IRST
NON IOAC DY
IOAC at least 80 mil
at least 80 mil 1
2
GND OUT#8 8
7
always low during S3 and S4 state with iRST
IN#2 OUT#7
C6506
3 IN#3 OUT#6 6
1
27 W LAN_PW R_EN# 4 EN/EN# OCB 5 IOAC

1
1
SCD1U10V1KX-GP
SCD1U10V1KX-GP
C6220 EC6512
2
DY SY6288DCAC-GP IOAC
2
74.06288.A79
SC10U6D3V2MX-GP-U
A Helium A
Wistron Corporation
Title
MINICARD(WLAN)/ITP CONN
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A
Title
WWAN Connector(mSATA)
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
Blanking
C C
B B
Helium
A
Title
M-SATA
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A
Title
Light SENSOR
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
TOUCH PAD
SSID = KBC 3D3V_S0
3D3V_S0
R6902
1 2 3D3V_S0_TP1
1
2
1
EC6901
SC56P50V2JN-2GP
RN6901
0R2J-2-GP
SRN4K7J-8-GP
2
D D
4
3
TP1
9
RN6902 1
SRN33J-5-GP-U
27 TPCLK 1 4 TP_CLK 2
2 3 TP_DATA 3
27 TPDATA
20 PCH_SMBDATA
4
5
-1
6
20 PCH_SMBCLK
1 R6901 2 TP_IN#_R 7
20.K0785.008
18 TP_IN# 0R0201-PAD-GP 8
10
PSC-CON8-1-GP
TP_CLK TP_DATA
-SB
1
C6901 C6902
SC5P50V2CN-2GP SC5P50V2CN-2GP
2
0.5 pitch
C C
Internal KeyBoard 5V_S0
Connector
1
EC6902
SC10U10V3MX-GP
2
EL1
13
1
2
KB1
28,49 7781_SCL
3
4
-1
PSC-CON24-GP 5
28,49 7781_SDA
20.K0785.024 6
For DMIC 7 20.K0785.012
8
29 DMIC_12 9
26
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
25
3D3V_S0 10
29 DMIC_CLK 11
KROW7
KROW6
KROW5
KROW4
KROW3
KROW2
KROW1
KROW0
12
14
B PSC-CON12-GP B
KCOL15
KCOL14
KCOL13
KCOL12
KCOL11
KCOL10
KCOL9
KROW [0..7] 27
KCOL8
KCOL7
KCOL6
KCOL5
KCOL4
KCOL3
KCOL2
KCOL1
KCOL0
KCOL[0..15] 27
A Helium A
Wistron Corporation
Title
Key Board/Touch Pad

A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
Change from 3D3V_AUX_KBC to 3D3V_AUX_S5
C C
3D3V_AUX_S5
2
C7001 LID1
SCD1U10V1KX-GP
1
APX9132HAI-TRG-GP
1 VDD 74.09132.C7B
R7001 GND 3
27 LID_CLOSE# 1 2 LID_CLOSE#_1 2 VOUT

1
100R1J-GP
C7002
DY SCD047U16V2KX-1-GP
2
B B
Helium
A
Title
Hall Sensor
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
20.F0866.010
3D3V_S0
ACES-CON10-7-GP
12
21,27,81 LPC_AD0
10
9
-SD
21,27,81 LPC_AD1 8
C
21,27,81 LPC_AD2 7 C
21,27,81 LPC_AD3 6
21,27,81 LPC_FRAME# 5
5,18,27,36,65,81,97 PLT_RST# 4
3
18 CLK_PCI_LPC 2
1
11
DB1
LAB
B B
Helium
A
Title
Dubug connector
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
Micro SD Card Reader

D D
C C
B B
Helium
A
Title
Micro SD Card Reader

A4
Helium -1
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
D D
C C
B B
A Helium A
Wistron Corporation
Title
New Card
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B (Blanking) B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
D
- design PCB pad based on our sensor LGA pad size (add 0.1mm) D
Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
C C
B B
Helium
A
Title
G- Sensor
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
3D3V_S5 3D3V_PCH_DS3
R8001
1 2
0R2J-L-GP
Non-DS3
D D
3D3V_PCH_DS3
3D3V_S5
U8001
DS3
1 IN OUT 6
SC1U10V2KX-1GP
2 NC#2 GND 5
C8001
U8001_R 3 4 DS3_PWRCTL
2 R8002 1 PM_SLP_SUS# 19,27
DSG EN
1
DS3 0R0201-PAD-GP
1
R8006 G5244A31U-GP
2
100R1J-GP
74.05244.073 -SB David
2
1
C8002
SC1U10V2KX-1GP
DS3
2
C C
5V_S5 5V_PCH_DS3
R8003
1 2
0R2J-L-GP
Non-DS3
5V_S5 5V_PCH_DS3
U8002
B DS3 B
1 IN OUT 6
SC1U10V2KX-1GP
2 NC#2 GND 5
C8005
DS3 U8002_R 3 4 DS3_PWRCTL

DSG EN
1
R8007 G5244A31U-GP
2
100R1J-GP
74.05244.073
2
-SB David
1
C8004
SC1U10V2KX-1GP
DS3
2
Helium
A
Title
Deep Standby
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
TPM
D D
3D3V_PCH_DS3
2
DY
R8101
10R2F-L-GP
1
3D3V_S0 1 R8102 2 LPCPD#_TPM
19 PM_SUS_STAT#
For layout concern 0R0402-PAD
U8101
-SB 19 VDD GPIO0/XOR_OUT 1
24 VDD GPIO1 2
1
C8101 C8102 3D3V_SRC 6

GPIO2/GPX
SC10U6D3V3MX-L-GP
SCD1U10V2KX-L1-GP
C 1 R8106 2 U8101_VSB 5 VSB GPIO3/BADD 9 C

0R0402-PAD 15
2
CLKRUN#/GPIO4
LPC_AD0 26 7
LPC_AD1 LAD0 PP
23 LAD1
LPC_AD2 20 3
LPC_AD3 LAD2 NC#3
17 LAD3 NC#10 10 3D3V_S0
NC#11 11
21,27,71 LPC_FRAME# 22 LFRAME# NC#12 12
5,18,27,36,65,71,97 PLT_RST# 16 LRESET# NC#13 13
LPCPD#_TPM 28 14
LPCPD# NC#14
TPM TPM 18 CLK_PCI_TPM 21 LCLK
21,27 INT_SERIRQ 27 SERIRQ VSS 4 LPC_AD[0..3] 21,27,71

VSS 18
8 TEST VSS 25
NPCT420RA0WX-GP
B B
71.00420.B0W
TPM
Helium
A
Title
Reserved
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
PLED1
-SB
Power button LED FRONT_PW RLED#_R Blue 3 - + 1
5V_S5
Blue Orange
FRONT_PW RLED#_Q
-1 STDBY_LED#_R Orange 4 - + 2
D
FRONT_PW RLED#_Q 1 R8201 2 360R2F-GP LED-BO-23-GP
D Q8201 STDBY_LED#_Q 1 R8202 2 750R2F-GP 83.00195.Z70 D
G LSK3541G1ET2L-GP DC_BATFULL#_Q 1 R8203 2 360R2F-GP PLED2
27 PW RLED CHARGE_LED#_Q R8204 750R2F-GP
84.03541.F31 1 2
-SB David
DC_BATFULL#_R Blue 3 - + 1
S
5V_AUX_S5
CHARGE_LED#_R Orange 4 - + 2
LED-BO-23-GP
Power STDBY_LED STDBY_LED#_Q

83.00195.Z70
Q8202
G LSK3541G1ET2L-GP
27 STDBY_LED
84.03541.F31
S
C
Battery LED2(DC_BATFULL) C
PW 1
1 2 KBC_PW RBTN# 27,29
3 4
SW -TACT-4P-106-GP
DC_BATFULL#_Q
62.40009.G61
D
Q8205
G LSK3541G1ET2L-GP
27 DC_BATFULL
84.03541.F31
S
RTC_AUX_S5
-SB
B Battery LED1(CHARGE) BI_R
B
1
R8205
1KR1F-GP
CHARGE_LED#_Q SW -TACT-4P-76-GP
2
3 4
D
Q8208 1 2
G LSK3541G1ET2L-GP
27 CHARGE_LED SW 1
84.03541.F31
62.40009.F11
S
BI
BI 39
connect to Battery connector, confirm
DY
RN8201
1 4 STDBY_LED
A 2 3 PW RLED A
Helium
SRN100KJ-6-GP
RN8202 DY Wistron Corporation

1 4 CHARGE_LED 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2 3 DC_BATFULL Taipei Hsien 221, Taiwan, R.O.C.
SRN100KJ-6-GP Title
LED Bard/Power Button

A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
GPU_PCIE/STRAPPING(1/5)
A2
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
GPU Memory(2/5)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
GPU_DP/LVDS/CRT/GPIO(3/5)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
GPU_POWER(4/5)
A1
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A A
Wistron Corporation
Title
GPU_DPPWR/GND(5/5)
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A Helium A
Wistron Corporation
Title
GPU-VRAM1,2 (1/4)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A A
Wistron Corporation
Title
GPU-VRAM3,4 (2/4)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
GPU-VRAM5,6 (3/4)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A A
Wistron Corporation
Title
GPU-VRAM7,8 (4/4)
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Helium
Wistron Corporation
Title
RT8208B_+VGA_CORE
Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
Blanking
B B
Helium
A
Title
DISCRETE VGA POWER

A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Helium
A
Title
LVDS_Switch
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A Helium A
Wistron Corporation
Title
USB CHG
A3
Helium -1
5 4 3 2 1
5 4 3 2 1
2nd Battery
D D
DC_IN MB
DCBATOUT
DisCharger
Charger Boost to 17V

BQ24760RSBR
C C
DC-DC 5V BT+ Charger

AD+
Battery
USB Charger
DC_IN
Adapter
B B
Helium
A
Title
TOUCH PANEL
A4
Helium -1
5 4 3 2 1
5 4 3 2 1
Check test point
PCB Footprint = HOLE197R94

H2 H3 H5 H8 H10 H11
HOLE HOLE HOLE HOLE HOLE HOLE
DY DY DY DY DY DY 3D3V_S0 1 AFTP1
3D3V_AUX_S5 1 AFTP7
1
3D3V_S5 1 AFTP8
5V_S5 1 AFTP9
D D
1 AFTP10
19,27 PM_PW RBTN#
5,22,36 H_CPUPW RGD 1 AFTP11
5,18,27,36,65,71,81 PLT_RST# 1 AFTP13
BI_BTY1_R 39
34.4QP10.001 34.4QP10.001 34.4QP10.001
HS1 HS2 HS3 -SD
1
STF236R128H34-1-GP STF236R128H34-1-GPSTF236R128H34-1-GP
H4
HOLE237R95-2P-S-GP
DY
1
2
C C
3D3V_S0 DCBATOUT
-SE
EC9727 EC9725 EC9726
1
DY DY DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
2
B B
RF
EMI
5V_S5 AD_JK DCBATOUT BT+
-SB
EC9705 EC9706 EC9707 EC9708 EC9709 EC9710 EC9712 EC9713 EC9714 EC9715 EC9716 EC9717 EC9718 EC9719 EC9720 EC9721 EC9722 EC9723 EC9724
1
1
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
SCD1U10V2KX-L1-GP
SCD1U50V3KX-L-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
2
2
A Helium A
Wistron Corporation
Title
UNUSED PARTS/EMI Capacitors

A3
Helium -1
5 4 3 2 1
5 4 3 2 1
Intel Power Up Sequence Intel S3 Sequence

RTC_AUX_S5
PM_SLP_S4# KBC GPD1
RTC_RST#
PM_SLP_S3# KBC GPD0
DCBATOUT
EC_SLP_S4# KBC GPE1
3D3V_AUX_S5
KBC GPE0 control EC_SLP_S3# KBC GPE2
S5_ENABLE
D D
5V_S5 1D35V_S3
3D3V_S5 5V_S0
KBC GPC3 to PCH
PCH_DPWROK >10ms
PCH to KBC GPI7 3D3V_S0
PM_SLP_SUS#
1D8V_S0
3D3V_PCH_DS3
1D5V_S0
5V_PCH_DS3
KBC GPJ0 to PCH 1D05V_VTT
AC_PRESENT
KBC GPB7 to PCH 0D85V_S0
PM_RSMRST# >10ms
PCH to KBC GPI6 0D675V_S0
PM_SUSWARN#
ALL_POWER_OK KBC GPG2
KBC GPB2 to PCH
PM_SUSACK#
S0_PWR_GOOD KBC GPD5
H_CPUPWRGD PCH to CPU

Press Power button
KBC_PWRBTN# KBC GPE4 VDDPWRGOOD PCH to CPU
KBC GPG6 to PCH
PM_PWRBTN# VCC_CORE
PM_PWRBTN#
IMVP_PWRGD
KBC GPD1
C C
SYS_PWROK
PM_SLP_S4# KBC GPD0
PM_SLP_S3# >30us PLT_RST# PCH to All Device
KBC GPE1
EC_SLP_S4#
KBC GPE2
EC_SLP_S3#
1D35V_S3
5V_S0 Intel Deep S3 Sequence

3D3V_S0
1D8V_S0 PCH_DPWROK
KBC GPC3 to PCH
1D5V_S0 PM_SLP_SUS#
1D05V_VTT 3D3V_PCH_DS3
0D85V_S0 5V_PCH_DS3
0D675V_S0 AC_PRESENT KBC GPJ0 to PCH

KBC GPG2
ALL_POWER_OK PM_RSMRST# KBC GPB7 to PCH
KBC GPD5
S0_PWR_GOOD PM_SUSWARN# PCH to KBC GPI6
PCH to CPU PM_SUSACK# KBC GPB2 to PCH
H_CPUPWRGD
PM_SLP_S4# KBC GPD1
PCH to CPU
VDDPWRGOOD PM_SLP_S3# KBC GPD0
EC_SLP_S4# KBC GPE1
VCC_CORE
EC_SLP_S3# KBC GPE2
B
IMVP_PWRGD B
1D35V_S3
SYS_PWROK
PCH to All Device 5V_S0
PLT_RST#
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D675V_S0
ALL_POWER_OK KBC GPG2
S0_PWR_GOOD KBC GPD5
H_CPUPWRGD PCH to CPU
VDDPWRGOOD PCH to CPU
VCC_CORE
IMVP_PWRGD
A A
SYS_PWROK
PLT_RST# PCH to All Device
Helium
Wistron Corporation
Title
Power Sequence
A1
Helium -1
5 4 3 2 1
5 4 3 2 1
WISTRON CHIEF RIVER POWER UP SEQUENCE DIAGRAM

-9
AC AD+ -6 -6 -6
Adapter in
PWR_5V3D3V_EN 3V_5V_EN S5_ENABLE
D ENC 5V_S5 D
LL1
SWITCH 3D3V_S5 -5
LL2
SWITCH 5V_AUX_S5
RT8223MZQW VREG5
DC/DC 3D3V_AUX_S5 -7
(3V/5V) VREG3
-8
DCBATOUT 3V_5V_POK 3
VIN PGOOD
PM_SLP_S4#
DC 4
BT+ BQ24760RSBR PM_SLP_S3# 5V_S0
Battery Charger SWITCH
-7
3D3V_AUX_KBC
-6 3D3V_S0
ACOK
S5_ENABLE SWITCH
GPE0 1D35V_S0
-4 SWITCH
1
PCH_DPWROK SLP_S4# SLP_S3#
KBC_PWRBTN# KBC GPC3 DPWROK
GPE4
-1 8
Power Button ITE IT8518 AND GATE
PM_SLP_S4# PM_RSMRST# 1.05VTT_PWRGD
GPB7 RSMRST# A VDDPWRGOOD
GPD0
PM_PWRBTN# 11 PM_DRAM_PWRGD Y SM_DRAMPWROK
C GPC4 PWRBTN# DRAMPWRGD B C
3
H_CPUPWRGD H_CPUPWRGD_R
PM_SLP_S3#
GPD1
2 PROCPWRGD UNCOREPWRGOOD
4 Panther Point 12
Ivy Bridge
GPG2 GPE1 GPE2 GPD5 10 PCH CPU
S0_PWR_GOOD
ALL_POWER_OK APWROK
9 16
PWROK PLT_RST# BUF_CPU_RST#
PLTRST# RSTIN#
EC_SLP_S4# SYS_PWROK SVID
5 SYS_PWROK
SLP_SUS#
EC_SLP_S3#
SVID
6 15
13
-3
PM_SLP_SUS#
3D3V_S5
6 DCBATOUT
VIN 1D8V_S0
EC_SLP_S3# VOUT
EN
RUNPWROK
SYW231ABC PGD 13 VIN VCC_CORE
OUTPUT
SVID
7 SVID VCC_GFXCORE
VR OUTPUT
5V_S5 5V_S5
B
9 VT1318MFQX B
-3 1D8V_S0 ALL_POWER_OK IMVP_VR_ON 14

3D3V_S5 VR_ON IMVP_PWRGD
PM_SLP_SUS#
VIN
5V_PCH_DS3
-2 PGOOD
VIN 1D35V_S3
G5244A31U 5 VOUT
7
EC_SLP_S4# VT357FCX VDD VIN
EN RUNPWROK 1D5V_S0
RUNPWROK EN VOUT
PGD RT9041B
3D3V_S5
5
5V_S5
5V_S5 1D35V_S3 14 15
VIN
3D3V_PCH_DS3 -2
G5244A31U IMVP_PWRGD SYS_PWROK
VIN 1D05_VTT
VOUT
5 7
VDDP VIN
RUNPWROK VT386FCX
EC_SLP_S4# DDR_VREF_S3 EN 1.05VTT_PWRGD
EN REF PGOOD
8 RT9026GQW
1.05VTT_PWRGD 0D675V_S0
8
VTT_EN VTT
5V_S5
Power Up Sequence: -9 ~ 16
A A
VIN 0D85_S0
VOUT
8
1.05VTT_PWRGD SY8037DDCC
EN ALL_POWER_OK
PGOOD Helium
9 Wistron Corporation
Title
Power Sequence Diagram

Custom
Helium -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT
Adapter
Power Shape
TPCC8131
D Charger Regulator LDO Switch D
BQ24760RSBR
+AD
Battery
TPS51275RUKR 7A
3D3V_AUX_S5
3D3V_SRC 1.6A
5V_AUX_S5 5V_S5 1.5A
2A
222mA 1.5A
SY6288CCAC IRFHS8342T
C G5244A31U IRFHS8342T IRFHS8342T C
5A
5V_USB1_S3 5V_S0 3D3V_S5
5V_PCH_DS3 3D3V_S0 3A
1.5A 2A
916mA G5244A31U
200mA 872mA
VT1318MFQX 3D3V_CARD_S0 G5244A31U SYW231ABC

VT386FCX SY8037DDCC VT357FCX 2.5A
VT1323SFCX 3D3V_PCH_DS3
1.4A
LCDVDD 1D8V_S0 1.2A

VCC_CORE VCC_GFXCORE 1D05V_VTT 0D85V_S0 1D35V_S3
1.2V=2000mA
B
9.7A 6.6A 15A 169mA B
RT9041B
Thunderbolt Power FDMC7696
RT9026GQW
1D5V_S0
1D35V_S0
3D3V_S0 3D3V_POC G5244A31U 3D3V_LC DDR_VREF_S3
0D675V_S0 169mA
0.24mA
0.24mA
5V_S5->1.5A
1D05V_S0 TPS22924CYZPR 1D05V_LC 5V_S0->(5V_S5 to 5V_S0)->2A
CPU Core ->(Vin is 5_S5, power 約
約 2.4A)->9.7A
0.19mA 0.19mA
GFX Core ->(Vin is 5_S5, power
1.05V_S0->(Vin is 5_S5, power 約
約
1.7A)->6.6A
3.8A)->15A
約約包包
0.85V_S0->(Vin is 5_S5, power 0.8A)->4A
1D05V_S0 TPS22924CYZPR 1D05V_CIO 1.35V_S3->(Vin is 5_S5, power 3A)->8A( 1D35V_S0)
A
1.85A 1.85A
約
12V_MP->(Vin is 5_S5, power
so 5V 18A,DCBATOUT DC mode 電電約電
2.8A)->1A
5V,
Helium
A
1D8V_S0->(Vin is 3.3V_S5, power 約1A)->1242mA Wistron Corporation

3D3V_S5約6A,請請240mA
Title
5V_S0 TPS61087 VCC12V0
Power Block Diagram
1.5A Size Document Number Rev
4.32A A3
-1
Helium
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_PCH_DS3 3D3V_S0 KBC SMBus Block Diagram
‧ ‧ 3D3V_S0
3D3V_S0 ‧
SRN2K2J-1-GP
‧ SRN2K2J-1-GP
DIMM 1
‧ ‧
SRN10KJ-5-GP
‧ ‧
SMBCLK SMB_CLK PCH_SMBCLK
1
TouchPad Conn. 1
‧
SCL
SMBDATA SMB_DATA PCH_SMBDATA
‧
SDA PS2DAT2 / GPF5 TPDATA TPDATA TPDATA
3D3V_S5
PS2CLK2 / GPF4 TPCLK TPCLK TPCLK
‧ 2N7002SPT
3D3V_AUX_KBC
‧
SRN2K2J-8-GP
SML1CLK SML1_CLK
SRN4K7J-8-GP
To KBC & Thermal DIMM 2
‧
SML1DATA SML1_DATA
Battery Conn.
‧
PCH_SMBCLK
SCL SRN33J-3-GP
SML0CLK SML0_CLK PCH_SMBDATA BAT_SCL BATA_SCL_1 CLK_SMB
SDA SMCLK0 / GPB3
SML0DATA SML0_DATA SMBAT0 / GPB4 BAT_SDA BATA_SDA_1 DAT_SMB
3D3V_S0 TouchPad
‧
GAP
‧ KBC PWR_CHG_BAT_SCL SCL

BQ24760RSBR
‧
PCH_SMBCLK PWR_CHG_BAT_SDA SDA
SCLK
PCH SRN2K2J-1-GP
PCH_SMBDATA
SDATA ITE IT8519
3D3V_S0
2 SCL 2
PCH
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI SCLK
Micro HDMI
SDA
‧
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI SDATA
3D3V_S0
‧ SRN2K2J-1-GP
Thermal
‧
‧
L_DDC_CLK LVDS_DDC_CLK_R
7781_SCL SCL
L_DDC_DATA LVDS_DDC_DATA_R
NCT7718W
7781_SDA SDA
‧
3D3V_S0
‧ ‧
SMCLK1 / GPC1 SML1_CLK
2N7002DW-1-GP
CRT_DDC_CLK CRT_DDC_CLK
SMDAT1 / GPC2 SML1_DATA
CRT_DDC_DATA CRT_DDC_DATA
SRN2K2J-1-GP
DDPC_CTRLCLK PCH_DPC_CLK
DDPC_CTRLDATA
PCH_DPC_DATA
SCLK
SDATA
Thunderbolt IC
3 3
4 4
Helium
Wistron Corporation
Title
SMBUS Block Diagram

A2
Helium -1
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
SPKR_OUT_R+/-
DXP P2800_DXP SPKR_OUT_R+/- SPEAKER

MMBT3904-3-GP
SC2200P50V2KX-2GP
DXN P2800_DXN
Place near CPU

Codec
Thermal PWM CORE
ALC271X
NCT7718W HP_OUT_R HP
MMBT3904-3-GP HP_OUT_L
SMCLK1 / GPC1 SML1_CLK SCL T8

OUT
SMDAT1 / GPC2 SML1_DATA SDA
PURE_HW_SHUTDOWN#
2
OTZ THERM_SYS_SHDN#
2N7002
D EN 3V/5V 2
KBC S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)
ITE IT8519
MIC_R Analog
MIC_L
MIC
GPD6 FAN_TACH1
TACH VIN 5V_S0
GPA4 FAN1_PWM
FAN 1
PWM
DMIC_DATA Digital
3 GPJ3 FAN_TACH2
TACH VIN 5V_S0 DMIC_CLK MIC 3
GPA5 FAN2_PWM
FAN 2
PWM
4 Helium 4
Wistron Corporation
Title
Thermal/Audio Block Diagram

Custom
Helium -1
A B C D E
5 4 3 2 1
[Design-Kent] CPU Table PCH Table -SA

(1) change 1U6D3V2 78.10520.LAL to 78.10520.5FL(M) CPU PCH
(2) RAM1~8 change XX.XXXXX.XX Stage P/N Stage P/N
(3) BOM DEL RTC,CPU,PCH PN,PN for PM -SB
(4) LAB1 BOM CHECK ENG-A 71.00IVY.C3U(1.7G) ENG-A 71.0HM77.00U
(5) BOM U6003,4 Change to XX.XXXXX(Lab) ENG-B 71.00IVY.E1U(1.8G) ENG-B 71.0HM77.00U
(6) BOM DCIN2 DEL(Lab) ENG-C 71.00IVY.H0U(1.9G) ENG-C 71.0HM77.A0U -SC
(7) PL4502 to 68.R2210.10R N/A 71.0HM77.A0U
不不不
D
(8) BTY1 Only 4 pcs N/A 71.0HM77.M01 D
(9) SW1 Del Lab1 N/A N/A -SD

(10)LID1 change to 74.05712.0BB(BOM)
Thunderbolt Table RAM Table
Thunderbolt RAM
-SE
[Lab2-Kent]
Stage P/N Stage P/N Stage
(1) SKU 3 use 2nd source
(2) Change 7" to 13" ENG-A N/A ENG-A 72.04216.00U ELPIDA 4G -1
(3) 84.03541.F31 Change ENG-B N/A ENG-B 72.05463.00U Hynix 4G
『』
ADD 2ND=84.33030.031(BOM)(For ESD 2KV) ENG-C N/A ENG-C 72.04216.00U Hynix 2G
-2
『』
(4)PLED1 and PLED2 change from 83.00195.G70 N/A
to 83.00195.Z70 for CSD 1KVESD reqeust N/A
N/A
-SB David
(5) RTC Cable PN place on DIP BOM
[Source]
ROM Table BOM
(6) Del U6002 WSON package on SMT BOM ENG A Sku 1st Source
ADD U6003 TSOP package (72.25Q32.A01 )on DIP BOM U6003/2 ROM 4M U6004 /1 ROM 2M ENG B Sku 2nd Source
Stage P/N Stage P/N ENG C Sku 1st Source
[Lab3-Kent] LAB1 62.10076.011 LAB1 62.10076.011
(1) 84.03541.F31 Change 84.02N05.A3K(ROHM)(For ESD 2KV) LAB2-DIP 72.25Q32.A01 LAB2-DIP NO
C (2) Change 7" to 13" LAB2-SMT 62.10076.011 LAB2-SMT 72.25Q16.G01(U6001) C
(3) RTC Cable PN place on DIP BOM(2nd Source) LAB3 As Lab2 LAB3 As Lab2
(4) Change CPU,PCH,RAM,Thunderbolt LAB4 As Lab2 LAB4 As Lab2
(5) U2702 Change 74.00809.S7B
(6) 78.10323.20L Change 78.10323.5SL(COMMON)
(7) Check page 60 S0 or S5 by david
(8) KBC change 71.08518.B0U
[Lab4-Kent]
(1) Change 7" to 13"( 新新新
) [ENG-Kent]
新新新
[PD-Kent]
(1) Change 7" to 13"( 新新新)
(2) 84.03541.F31 Change 2ND=84.33030.031(BOM)(For ESD 2KV)
2ND=84.02N05.A3K(ROHM)
(1) Change 7" to 13"( )
(2) 84.03541.F31 Change 1st=84.33307.031( )
2ND=84.02N05.B3K(ROHM)
松松 (2) 84.03541.F31 Change 1st=84.33307.031( )
2ND=84.2N022.031(ROHM)
松松
(3) 78.10323.20L Change 78.10323.5SL(COMMON PN)
(3) 78.10323.20L Change 78.10323.5SL(COMMON PN)
(4) Change CPU,PCH,RAM,Thunderbolt (4) Change CPU,PCH,RAM,U6502,R2735
(4) Change CPU,PCH,RAM,U6502
(6) RTC cable 2nd source
(7) 83.R2003.V8F Lab3 缺缺缺缺
Lab4 Main source 2nd source
Main source 2nd source
84.03664.037 84.00038.A37
Main source 2nd source 84.03664.037 84.00038.A37 PU4101 (FDMS3664S) Mount (RJK03P8DPA) Mount
PU4101 (FDMS3664S) Mount (RJK03P8DPA) Mount
84.03664.037 84.00038.A37
PU4101 Mount Mount (5)U3701 3rd source(73.7SH09.0AG)
才才)
(FDMS3664S) (RJK03P8DPA)
(8)U3701 3rd source(73.7SH09.0AG)
B (8) XTAL 要不2nd Source (9)U7501 Change NC.25411.002(ENG1
B
A A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
Title
Change History
A2
Helium -1
5 4 3 2 1

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5 4 3 2 1

DY :None Installed ANNIE: ONLY FOR ANNIE solution.

4,5,6,7,8,9,10,11,12,13 SYSTEM DC/DC

FDI DMIx4 SYSTEM DC/DC

USB 2.0 port:3 Micro HDMI

AZALIA SYSTEM DC/DC

Internal Digital MIC LPC debug port

This signal has a weak internal pull-down.

LANE3 N/A SATA

PCI EXPRESS -- GRAPHICS

R404 Select a Fast FET similar to 2N7002E whose rise/

C49 CATERR# CLK_EXP_P 1 TP501

22,36 H_THERMTRIP# D45 THERMTRIP#

JTAG & BPM

M_A_DQ38 AT48 AK55 M_A_DQS#7 M_B_DQ37 BE49 AT60 M_B_DQS#6

DDR SYSTEM MEMORY B

B50 CFG0 BCLK_ITP N59

K49 M13 CFG[0] to CFG[0] trace.

PEG IO AND DDR IO

SSID = CPU CPU1G POWER 7 OF 9 Routing Guideline:

VCC_AXG_SENSE VCCDQ1 0R0402-PAD

PROCESSOR DDR 1.5V QUIET RAIL (BGA only)

BC43 TP_VDDQ_SENSE 1 TP901 TPAD14-OP-GP VID0 VID1

L17 VCCSA1 L L 0.9V

V18 D49 VCCSA_VID1

IVY-BRIDGE-GP-NF 71.00IVY.A0U Title

SSID = CPU CPU1H 8 OF 9

A13 VSS1 VSS91 AM38

NCTF TEST PIN

JE40 delete XDP function

1D35V_S3 1D35V_S3 1D35V_S3 1D35V_S3

K8 E3 M_B_DQ13 K8 E3 M_B_DQ28 K8 E3 M_B_DQ42 K8 E3 M_B_DQ61

MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP

MEM_DC MEM_DC MEM_DC MEM_DC

Tracew should be at least 20 mils wide

37 DDR_WR_VREF_CHB 1 2 1 R1441 2 Layout Note:

1D35V_S3 1D35V_S3 1D35V_S3 1D35V_S3

K8 E3 M_A_DQ3 K8 E3 M_A_DQ22 K8 E3 M_A_DQ39 K8 E3 M_A_DQ51

MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP

R1531 33R1F-GP 1 2 M_A_A10

1 2 M_A_CAS# R1529 33R1F-GP

R1515 33R1F-GP 1 2 M_A_A12

Digital Display Interface

N48 CRT_BLUE DDPD_CTRLCLK M43

if use CRT change 1K to +/- 0.5%

B21 TP21 RSVD23 AV5

A OC[7:4]# for Device 26 (Ports 8-13) A Sku A

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

System Power Management

PM_RSMRST# C21 H4 DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

H20 G16 RTC_AUX_S5

10KR2J-L-GP PANTHER-GP-NF 71.PANTH.00U

R1924 2 DY1 PM_SUSWARN# PM_RSMRST# 1 R1917 2 RSMRST#_KBC 27

R1925 2 1 BATLOW# 84.03541.F31

AB49 AV22 CLK_EXP_N 5

CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 RN2014

R2015 R2016 R2017 X2001

SSID = PCH RTC_AUX_S5

SATA0RXN AM3 SATA_RXN0 56