Unit-2 BJT Print

Download as pdf or txt
Download as pdf or txt
You are on page 1of 22

UNIT-II

BJT and Applications: BJT operation and characteristics, Voltage Divider Biasing,
BJT as an amplifier and as a switch.
Feedback Amplifiers: Basic Principles and advantages of Negative Feedback.
Block diagram of a general communication system, Need for modulation and types of
modulation.

BJT operation and characteristics


 Bipolar junction transistor (BJT): It is a semiconductor device similar to pn diode.
It is a three-layer device consisting of either two n-type and one p-type (npn) or
two p-type and one n–type material (pnp) with two junctions and three terminals.
The terminals are Emitter (E), Base(B) and Collector(C). The two junctions are
Emitter – Base (EB) junction and Collector – Base (CB) junction. The emitter
layer is heavily doped, base is lightly doped and collector is moderately doped.
Both holes and electrons contribute to the flow of current and hence the name
bipolar junction transistor. The schematic and the symbol are shown in Fig 2.1.

Fig 2.1. Transistor schematic and symbol


Transistor operation: As seen in Fig 2.2 a large number of majority carriers (holes
which constitute the emitter current IE) will diffuse across the forward bias p-n junction
into the n–type material.

Fig 2.2 Transistor operation (pnp)

Since n-type is very thin and has a low conductivity, very small number of these carrier
will take this path of high resistance to the base terminal and this constitutes the base
current IB. A large number these majority carriers will diffuse across the reverse bias
junction into the p- type material to the collector terminal and constitute the collector
current IC.

Therefore , IE = IB+IC

The collector current however comprises of two components the majority and minority
carriers. The minority current is called the leakage current and the symbol is I CO.

i.e., IC = ICmajority + ICBOminority

IC is measured in mA and ICBO is measured in µA or nA. ICBO is similar to reverse


saturation current (IS) in a diode.

To describe the behavior of the device, 2 sets of characteristics are required.


1. Input (I/P) characteristics
2. Output(O/P) characteristics
Relation between α and β
Common base dc current gain α = IC/IE
Common emitter dc current gain, β =IC/IB
Since IE = IB+IC , dividing this equation by IC gives

IE/ IC = IB/ IC +IC/ IC


IE/ IC = IB/ IC +1
1/α = 1+ 1/β (since α = IC/IE and β =IC/IB)
1/α = (β+ 1)/β
α =β/1+β
α(1+β) =β
α+ αβ =β
α=β-αβ
α=β(1-α)
β=α/(1-α)

The 3 main regions of operation of a transistor are: -


1. Cutoff 2. Saturation 3.Active region

1. Cutoff region: Here the two junctions EB and CB are reverse biased. In this
region the device behaves as an open switch.
2. Saturation region: Both the junctions are forward biased. In this region the
device acts like a closed switch.
3. Active region: Here the EB junction is forward biased and CB junction is reverse
biased. In this region the BJT is used as an amplifier.

Note: When EB junction is reverse biased and CB junction is forward biased, this
region is called as inverse active region. The operation in this region is generally not
used in practice.

The transistor can be configured as an amplifier in 3 ways, depending on the common


terminal between the input and the output.

1. Common Base configuration (CB)


2. Common Emitter configuration (CE)
3. Common Collector configuration (CC)
Common Base configuration (CB)
Base is common to both input and output sides of the configuration as shown in fig 2.3.
In this mode E and B are the input terminals and C and B are the output terminals.

Fig2.3: CB configuration

 Input characteristics: A plot of the variation of i/p emitter current IE with variation in
the EB voltage VBE (i/p) for different values of collector base voltage VCB (o/p) is the
i/p characteristics. To obtain the i/p characteristics, VCB is kept constant ,VBE is
varied and value of IE is recorded. The active region is the region normally
employed for linear amplification. After the cut in voltage VBE = 0.7 V, IE increases
with small increase in VBE voltage as seen in Fig 2.4.

Fig 2.4 Input characteristics for CB mode


 Output characteristics: Relates to o/p current IC to the o/p voltage VCB for various
levels of input current IE as shown in Fig 2.5. The three region of interest are :-
Active region: - The active region is defined by the biasing arrangements EB –FB
and CB—RB. This is the normal operating region of the transistor. At lower end of
the active region the emitter current is zero, and the collector current is due to the
reverse saturation current which is very small.
Cut off region: - EB—RB, CB—RB. Region where collector current is zero.
Saturation region: EB—FB, CB—FB. The region of the characteristics to the left of
VCB is 0.
Early Effect. The effect of increase in reverse voltage reducing the effective base
width is called base width modulation or early effect.

Fig 2.5 Output characteristics for CB mode

Common Emitter configuration (CE)


Emitter is common to both i/p and o/p terminals as shown in fig 2.6.

Fig2.6: CE configuration
 Input characteristics: A plot of the variation of i/p base current IB with variation in
the EB voltage VBE (i/p) for different values of collector emitter voltage VCE (o/p) is the
i/p characteristics as seen in Fig 2.7.To obtain the i/p characteristics, V CE is kept
constant, VBE is varied and value of IB is recorded. For fixed value of VBE, IB
decreases with increase in VCE. This is due to the fact that with increase in VCE, the
depletion region of the reverse bias collector base junction widens, reducing base
width.

Fig 2.7 Input characteristics for CE mode

 Output characteristics: Relates to o/p current IC to an o/p voltage VCE for various
levels of input current IB as seen in Fig 2.8. The three regions of interest are: -
Active region: -In this region, the collector current responds more readily to any input
signal since IC is more sensitive. So, the transistor can be used as an amplifier. The
characteristics are not horizontal lines due to fixed IB, the magnitude of IC increases
with increases in VCE due to early effect.
The collector current IC can be derived in active region as before.
In common base mode
IC =-αIE+ICO
IC=α (IB+IC) + ICO
IC=αIB+αIC + ICO
IC(1-α) = αIB+ ICO
IC= αIB/(1-α) + ICO/(1-α)
Substituting β=α/(1-α) and 1/(1-α) = 1+β yields
Ic= βIB+ ICO(1+β)
Cutoff region: the region to the right of the VCE = 0 and below IB= 0 is the cutoff region.
If IB = 0 then IC=IE=(1+β) Ico.
Saturation region: This region lies extremely close to the zero voltage axis, where all
the curves merge and fall rapidly towards the origin. In this region IC is almost
independent of IB.

Fig 2.8 Output characteristics for CE mode

 DC load line: Biasing is application of external dc voltages of correct polarity and


magnitude across the two junctions of the transistor. Since dc biasing is essentially
required for proper operation of the transistor. If the transistor is to be used as an
amplifier then the device should be operated in active region. Similarly if the device is
required to be operated as an electronic switch then it should be operated in saturation
and cut off regions.

 Operating point: Consider the common emitter circuit as shown below. The transistor
EB junction is forward biased by external dc voltage VBB and CB junction is reverse
biased by VCC. When the signal is zero, there exists dc collector current IC and the
output voltage VCE. Consider the common emitter circuit as shown in Fig 2.9.
Fig 2.9 Load line analysis

By applying KVL to the o/p circuit


VCC=ICRC+VCE
VCE=VCC - ICRC
Therefore, IC= (-1/RC) VCE + VCC/RC
The above equation represents a straight line with the slope of (-1/R C).
To draw the DC load line on the o/p characteristics, two points are required.
In the below equation if VCE=0,
IC=(-1/RC) VCE + VCC/RC,
then IC= VCC/RC…………...………(a)
Similarly, if IC=0 then VCC=VCE…………. (b)

Using (a) and (b) a straight line is drawn on the output characteristics. The line
between (a) and (b) is called dc load line. The word dc indicates that only dc condition
is considered with no input signal. During the operation of the transistor for fixed values
of VCC and RC, the values of VCE and IC at different values of IB are given by the
intersection of load line with IB lines as shown in figure. The intersection points on the
load line are called operating point or quiescent point (Q-point). Usually, Q point is said
typically near the middle of dc load line for faithful amplification. If Q point is placed in
saturation or cutoff, results in distortion in the o/p w/f.
Selection of Q-point
When a line is drawn joining the saturation and cut off points, such a line can be called
as Load line. This line, when drawn over the output characteristic curve, makes
contact at a point called as Operating point. This operating point is also called
as quiescent point or simply Q-point. There can be many such intersecting points,
but the Q-point is selected in such a way that irrespective of AC signal swing, the
transistor remains in the active region.
The fig 2.10 shows how to represent the operating point.

Fig2.10: Regions of operations of CE configuration

The operating point should not get disturbed as it should remain stable to achieve
faithful amplification. Hence the quiescent point or Q-point is the value where
the Faithful Amplification is achieved.

Faithful Amplification
The process of increasing the signal strength is called as Amplification. This
amplification when done without any loss in the components of the signal, is called
as Faithful amplification. Faithful amplification is the process of obtaining complete
portions of input signal by increasing the signal strength. This is done when AC signal
is applied at its input.
Fig2.11: Operating point is in the middle of active region

In the above graph fig2.11, the input signal applied is completely amplified and
reproduced without any losses. This can be understood as Faithful Amplification. The
operating point is so chosen such that it lies in the active region and it helps in the
reproduction of complete signal without any loss. If the operating point is considered
near saturation point, then the amplification is as shown in fig 2.12(a).

Fig2.12(a): operating point is considered near saturation point


If the operation point is considered near cut off point, then the amplification is shown
in fig2.12(b).

Fig2.12(b): operating point is considered near cutoff point

Hence the placement of operating point is an important factor to achieve faithful


amplification. But for the transistor to function properly as an amplifier, its input circuit
(i.e., the base-emitter junction) remains forward biased and its output circuit (i.e.,
collector-base junction) remains reverse biased.
The amplified signal thus contains the same information as in the input signal whereas
the strength of the signal is increased.

Key factors for Faithful Amplification


To ensure faithful amplification, the following basic conditions must be satisfied.

 Proper zero signal collector current


 Minimum proper base-emitter voltage (VBE) at any instant.
 Minimum proper collector-emitter voltage (VCE) at any instant.
The fulfillment of these conditions ensures that the transistor works over the active
region having input forward biased and output reverse biased.
BJT Biasing
Biasing is necessary to keep the transistor in the active region by making the EB
junction FB and CB junction RB. Transistor biasing is the establishment of suitable dc
values such as IC, VCE, IB and VBE by using a single dc source. When BJT is properly
biased, faithful amplification will take place. As in CB and CE modes, two dc sources
were used but in order to make biasing circuit simple, stable and economical single
supply is used.
There are 3 different types of biasing circuits
1. Fixed bias or base resistor bias
2. Collector to base bias or biasing with feedback resistor
3. Voltage divider bias or self bias

 Voltage divider biasing: This is the most widely used biasing circuit. In this method
two resistors are connected across the supply VCC which in turn provides biasing.
This biasing circuit is called voltage divider biasing because the supply voltage V CC
is divided by the voltage divider network formed by R1 and R2 as shown in Fig 2.13.
The voltage drop across R2 will FB the EB junction resulting in the base current and
hence the collector current.

Fig 2.13. Voltage divider circuit.

The voltage divider circuit consisting of R1 and R2 can be replaced with its Thevenin’s
equivalent circuit. R1 and R2 should be replaced by Thevenin’s resistance RT in series
with the Thevenin’s voltage VT as shown in Fig 2.14. The Thevenin’s resistance RT can
be determined by setting the dc supply to zero where RT is the parallel combination of
R1 and R2. Similarly, the Thevenin’s voltage VT can be determined as
VT = (R2 VCC)/ (R1+R2)
Fig 2.14. Steps to get Thevenin’s equivalent circuit

By applying KVL to the base circuit in the Fig 2.14,


IB = (VT - VBE) / (RT + RE (β+ 1))
Once IB is determined, IC can be calculated by IC = β IB
In order to find VCE, KVL is applied to collector circuit
VCE = VCC - IC (RC + RE) - IBRE

Bias Stability
The process of making the operating point independent of temperature changes or
variation in transistor parameters is known as stabilization. Once stabilization is done,
IC and VCE become independent of temperature variations. A good biasing circuit
always ensures the stabilization of the operating point.
Stability factor(S): The rate of change of collector current IC w.r.t the collector leakage
current ICO at constant β and IB is called stability factor. Every circuit has three
stabilization factors, one each with respect to ICO, VBE and β. At present only S(ICO) is
considered.
Stability factor, SICO = dIC/ dICO (at constant β & VBE)

The general expression for stability factor:


In active region the basic relationship between IC and IB is
IC = βIB+(1+ β) ICO
Differentiate w.r.t IC considering β constant
S=1+ β /1- β dIB/dICO
Considering for the fixed bias circuit,
IB = (VCC-VBE)/RB
S=1+ β /1- β dIB/dICO
Therefore, for the fixed bias circuit SICO = 1+ β
Similarly considering for the voltage divider circuit
IB = (VT - VBE) / (RT + RE (β+ 1))
S=1+ β /1- β dIB/dICO
Therefore, for the voltage divider circuit SICO = (1+ β) (RT+RE)/ (RT+(1+ β) RE)

Thermal runaway: -
The collector current in BJT is
IC = βIB+(1+ β) ICO

ICO is dependent on temperature. The flow of IC produces heat within the transistor. This
raises the transistor temperature and if no stabilization is done the collector leakage
current also increases. If leakage current increases, IC increases by (1+β) ICO.This IC
will raise the temperature of the transistor, which in turn will cause ICO to increase. This
effect is cumulative and in a matter of seconds, the IC may become very large causing
the transistor to burn out. The self-destruction of an un stabilized transistor is known as
thermal runaway.

Numerical Examples: Refer Tutorials


re-model
Common-Emitter BJT transistor

Fig 2.15(a) below shows the common emitter transistor and Fig 2.14(b) is the re model
for the configuration of (a).

Fig 2.15(a) CE Configuration (b) re-model of CE configuration

For the CE configuration the input terminals are base and emitter terminals and the
output terminals are collector and emitter terminals. The base and emitter are replaced
by a diode, the collector and base terminals are replaced by a current controlled
source. For the ac response the diode is replaced by its equivalent ac resistance.

Input impedance Zi=Vbe / ib = β re if β >>1


Output impedance Zo=Vo/Io = ro
Voltage gain Av=Vo/Vi=-ro/ re
Current gain AI=ic/ib= β

Comparison of CE, CB &CC configurations

CE CB CC
Zi β re re β(re +RE)

Zo ro ro re

Av - ro / re ro / re ~1

AI Β Α (1+β)
 Amplifiers
An amplifier is an electronic circuit that amplifies or magnifies or strengthens the
amplitude of input signal without any distortion.
Basic amplifier circuit is shown in Figure 2.16.

+
Amplifier Vo
Vi
-

Ri Ro

Figure 2.16: Basic amplifier circuit

Let us assume a small sinusoidal signal is applied to the amplifier at the output of the
amplifier the signal must remain sinusoidal in waveform and the frequency of the signal
must remain same as the input.

The ratio of output voltage to the input voltage of the amplifier is called the gain of the
amplifier which is denoted by AV.

The ratio of output current to the input current is called the current gain of the amplifier
which is denoted as AI.

 Decibels:
The term bel is derived from the name of scientist Alexander Graham bell. It was found
that the bel was too large for the unit of measurement, so the decibel (dB) is defined
such that 10 decibels = 1 bel. Gain is generally expressed in dB because the ear
responds to the sound intensities on a logarithmic scale rather than linear scale. It is
easy to express the gain in dB rather than actual numbers
Voltage gain = AV = (o/p voltage) / (i/p voltage)
AV = Vo / Vi
Current gain = AI = (o/p current) / (i/p current)
AI = Io / Ii
Power gain = Ap = (o/p power) / (i/p power)
AP = Po / Pi
Decibel power gain
(AP)dB = 10 log (Po/Pi)
ΔPo = 10 log (P2/P1) dB
Decibel voltage gain
(Ap)dB = 10 log (Po/Pi)
Wkt Po = Vo2 / RL and Pi = Vi2 /Ri
Po/Pi = (Vo2/RL) /(Vo2/Ri) = V02 / Vi2 if RL= Ri
(AP)dB = 10 log (Vo2 /Vi2)
(AP) dB = 20 log (Vo/Vi)
Decibel voltage gain (AV) dB = 20 log (Vo/ Vi)
Decibel current gain (AI)dB = 20 log (Io/Ii)
(AP) dB= 20 log (Io/Ii)

Need for cascading of amplifiers:


The current gain or voltage gain obtainable from a single transistor amplifier stage is
usually in adequate for most of the applications. Hence several amplifiers stage is
connected in cascade.

The amplifiers are connected such that the output of one stage forms the input of the
next stage. Such cascade amplifiers permit realization of any desired voltage or
current.

In the cascading of amplifiers an important consideration is the choice of elements


coupling one stage to the next one. Different coupling methods are used in the different
type of cascade amplifier such as RC coupled amplifier and transformer coupled
amplifier.

Cascaded stages: Figure 2.17 shows N amplifiers connected in cascade.

Fig2.17: Amplifiers connected in cascade


Voltage of 1st stage AV1 = V1/Vi
Voltage of 2nd stage AV2= V2/V1
Voltage gain of Nth stage AVn = (Vo)/(Vn-1)
Overall voltage gain AV = Vo/Vi
AV= Vo/Vn-1* ……...V3/V2 * V2/V1*V1/Vi
= AVn*AV2*AV3*……. AVn
Overall voltage gain in dB
(AV)dB = 20 log (AV)
= 20 log (AV1*AV2*AV3………. AVn)
= 20 log (AV1) + 20log (AV2) +………. + 20log (AVN)
(AV)dB = AV1dB + AV2dB + ……...+AVndB

RC coupled amplifier:
The circuit diagram of RC coupled amplifier is shown in fig 2.18.

The resistors R1, R2, RC, RE forms the voltage divider biasing circuit. The values of
resistors are chosen such that they set proper operating point for the CE amplifier. The
operating point is chosen such that the device works in active region and it acts as an
amplifier. In the fig2.18, the coupling capacitors C1, C2 and bypass capacitor CE.
The impedance of capacitor is given by XC = 1/2πfC. For dc signals f=0. The
impedance XC = ∞. For DC signals capacitor acts as open circuit. In the circuit the
signal source VS and the source is associated with source resistance RS. Note that
source resistance RS is in parallel with R2 this reduces the bias voltage at the base of
the transistor and this intern alters the collector current which is not desired.
The dc signal which in the input of the source signal alters the biasing condition of the
transistor. The capacitor C1 blocks any dc signals entering into the transistor. Similarly,
by connecting RL directly to the amplifier, the dc levels of VC and VCE will change
which again alters the operating conditions of transistor. The output coupling capacitor
C2 blocks dc signals entering the load or entering the next stage of the amplifier and it
allows only ac signals to enter the next stage.
The resistance RE provides bias stabilization to the transistor. But it also reduces the
voltage gain of the amplifier. The bypass capacitor acts as a short circuit for ac signals
and allows to create an ac ground in an amplifier without disturbing its Q-point.
Fig2.18: RC Coupled amplifier

Frequency response:

a) Normalized plot

b) Decibel plot

Fig2.19: Frequency response


The frequency response of an RC coupled amplifier is shown in fig 2.19 can be divided
into 3 regions:
1. Low frequency region: Reactance of a capacitor is given as XC = 1/2πfC
At low frequencies XC increases, this increase in XC drops the signal voltage
across the capacitor and in turn reduces the circuit gain.
2. Mid frequency region: As the frequency range increases, XC becomes very small
and the voltage gain will be maximum and it will be almost constant for a certain
range of frequencies.
3. High frequency range: At higher frequencies the voltage gain decreases due to the
influence of junction capacitances of the transistor. At higher frequencies the
reactance of junction capacitance falls. When the reactance becomes small
enough, they provide shunting effect as they are in parallel with junctions. This
reduces the current gain and in turn reduces the voltage gain.

 Bandwidth (BW) of an amplifier:


Bandwidth of an amplifier is the difference between fC2(higher cutoff freq) and fC1
(lower cutoff freq)

BW of an amplifier = fH – fL.

The BW specifies the range of frequencies over which the gain does not deviate
more than 70.7% of the maximum gain at mid frequency range. The two frequencies
fC1 and fC2 are referred as half power frequencies or half power points or cut off
frequencies. Because the gain or output voltage drops to 70.7% of maximum value
and this represents a power level to one half the power at the reference frequency in
mid frequency range.

Numerical Examples:

1. The output power from an amplifier is 50mW when the signal frequency is 5KHz.
The output power falls to 25mw when the freq is 20 KHz. Calculate the power
change in decibels.
Ans: ΔPo = 10 log [P2/P1]

= 10 log [25m/50m]

ΔPo = -3dB
2. An amplifier has a voltage gain of 100 at 1KHz. The gain falls by 6dB at 1MHz, if
the input is 3mW at 2MHz. calculate the output voltage.
Ans: Gain in dB = 20 log (100) = 40dB

Gain falls by 6dB = 40-6=34dB

(AV)dB = 20 log [Vo/Vi]

34 = 20 log [Vo / 3mW]

Vo = 0.1503V or 150.3mW

Transistor as a switch
The application of transistors is not limited solely to the amplification of signals.
Through proper design, transistors can be used as switches for computer and control
applications. The network of Fig. 2.20 can be employed as an inverter in computer
logic circuitry. Note that the output voltage V C is opposite to that applied to the base
or input terminal. In addition, note the absence of a dc supply connected to the base
circuit. The only dc source is connected to the collector or output side, and for
computer applications is typically equal to the magnitude of the “high” side of the
applied signal—in this case 5 V. The resistor RB will ensure that the full applied voltage
of 5 V will not appear across the base-to-emitter junction. It will also set the IB level for
the “on” condition.

Fig. 2.20: Inverter circuit


Negative Feedback:
The block diagram of a feedback amplifier is shown in fig2.21.

Fig2.21: Simple block diagram of feedback amplifier.


Gain with feedback:

Gain stability with feedback:

Advantages of negative feedback amplifiers:


1. Input impedance increases by a factor of 1+Aβ
2. Output impedance decreases by a factor of 1+Aβ
3. Bandwidth increases by a factor of 1+Aβ
4. Distortion decreases by a factor of 1+Aβ
5. Noise decreases by a factor of 1+Aβ
6. Stability of the gain improves by a factor of 1+Aβ

You might also like