Letter

pubs.acs.org/NanoLett

Graphene/MoS2 Hybrid Technology for Large-Scale Two-

Dimensional Electronics
Lili Yu,*,† Yi-Hsien Lee,‡ Xi Ling,† Elton J. G. Santos,§,# Yong Cheol Shin,∥ Yuxuan Lin,† Madan Dubey,⊥
Efthimios Kaxiras,§,¶ Jing Kong,† Han Wang,*,†,△ and Tomás Palacios*,†
†
Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 77 Massachusetts Avenue,
Cambridge, Massachusetts 02139, United States
‡
Materials Science and Engineering, National Tsing-Hua University, Hsinchu, 30013, Taiwan
§
School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts 02138, United States
∥
Department of Materials Science and Engineering, Massachusetts Institute of Technology, 77 Massachusetts Avenue, Cambridge,
Massachusetts 02139, United States
⊥
United States Army Research Laboratory, 2800 Powder Mill Road, Adelphi, Maryland 20783-1197, United States
¶
Department of Physics, Harvard University, Cambridge, Massachusetts 02138, United States
*
S Supporting Information

ABSTRACT: Two-dimensional (2D) materials have generated great interest in the

past few years as a new toolbox for electronics. This family of materials includes,
among others, metallic graphene, semiconducting transition metal dichalcogenides
(such as MoS2), and insulating boron nitride. These materials and their
heterostructures offer excellent mechanical flexibility, optical transparency, and
favorable transport properties for realizing electronic, sensing, and optical systems
on arbitrary surfaces. In this paper, we demonstrate a novel technology for constructing
large-scale electronic systems based on graphene/molybdenum disulfide (MoS2)
heterostructures grown by chemical vapor deposition. We have fabricated high-
performance devices and circuits based on this heterostructure, where MoS2 is used as
the transistor channel and graphene as contact electrodes and circuit interconnects. We
provide a systematic comparison of the graphene/MoS2 heterojunction contact to
more traditional MoS2-metal junctions, as well as a theoretical investigation, using
density functional theory, of the origin of the Schottky barrier height. The tunability of the graphene work function with
electrostatic doping significantly improves the ohmic contact to MoS2. These high-performance large-scale devices and circuits
based on this 2D heterostructure pave the way for practical flexible transparent electronics.
KEYWORDS: Molybdenum disulfide, graphene, heterostructure, field-effect transistor, integrated circuits, flexible and transparent

A s Moore’s law approaches its physical limit in Si-based

electronics, the device research community has been
actively searching for new material options that can push
2D material devices, the demonstration often remains at the level
of a single device based on the nonscalable exfoliated flakes and
there has been no effort reported to tune the contact
performance beyond its traditional boundaries. The emerging performance.10,16 Besides, a high-quality junction between
alternative, two-dimensional (2D) materials, offers many unique semiconductor and metallic contact with no energy barrier is
properties, making this class of materials very attractive for crucial for high-performance device, which is hard to achieve for
extending electronics into new application domains. In 2D transition metal dichalcogenide (TMD) because of their large
particular, 2D materials1−5 with their excellent mechanical bandgap. In particular, it is essential to study the critical issues of
flexibility and transport properties have attracted great interest large-scale heterogeneous integration of 2D materials and
as a high-mobility alternative to organic semiconductors6,7 and Si
performance of graphene/2D-semiconductors. In this Letter,
nanoribbons;8 these 2D materials could lead to the realization of
we address two crucial issues on future applications of 2D
transparent and bendable electronic systems that can be placed
on a wide variety of surfaces. To harvest their full advantage in electronics: (i) We present the first demonstration of integrated
bendable electronics, it is highly desirable to construct systems graphene/molybdenum disulfide (MoS2) heterostructures using
solely based on 2D materials and their heterostructures.9−11 So a scalable chemical vapor deposition (CVD) process. Specifically,
far, the circuits that have been constructed based on 2D materials
typically rely on a metal to form contacts and interconnects,12−15 Received: December 26, 2013
which is one of the key limitations on the circuit flexibility. Revised: April 19, 2014
Although there are a few reports using graphene as contacts of

© XXXX American Chemical Society A dx.doi.org/10.1021/nl404795z | Nano Lett. XXXX, XXX, XXX−XXX
Nano Letters Letter

Figure 1. (a) Optical micrograph and AFM data (inset) of a single-layer (SL) chemical vapor deposition (CVD) grown MoS2 thin film. (b) Raman
spectroscopy of as-grown SL CVD MoS2 thin film (red line) and the CVD graphene/MoS2 structure. (c) Schematic illustration of important fabrication
steps to make large-scale electronics from graphene/MoS2 heterostructure using MoS2 as channel and graphene as contact electrodes and interconnects.
(d) Optical micrograph (left) and AFM (right) of CVD MoS2 dual gate transistor with graphene as electrodes. The scale bar in AFM image is 10 μm. (e)
Optical micrograph of large-scale chip of MoS2 devices and circuits using CVD graphene as electrodes and interconnects (white dashed box) as well as
control devices and circuits using Ti/Au electrodes in adjacent (red dashed box). Metal pads (gold color) are fabricated on the sample for convenient
measurement. The scale bar is 500 μm.

we have fabricated both discrete transistors and fully integrated transistors (FETs) and systematically benchmark them against
logic circuits using MoS2 as the channel and graphene as contacts its metal counterparts. We find that the tunable Fermi level in
and interconnects by developing a new technology that allows graphene allows excellent work-function match with MoS2,
the selective etching of 2D materials. This process can be used to leading to low contact resistance.
fabricate any 2D heterojunction in large scale. (ii) We report on Recently, high-quality TMD monolayers, including MoS2 and
the performance of graphene-based contacts in MoS2 field effect WS2, have been directly synthesized on diverse surfaces using a
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Nano Letters Letter

Figure 2. Back-gated transport properties of MoS2/graphene (MoS2−G) and MoS2−Ti FETs performance at room temperature. (a) Output
performance of a representative MoS2−G transistor at large field and small field with both negative and positive biases (inset). (b) Transfer
characteristics of MoS2−G transistor with current density on the left axis and transconductance/width on the right axis. (c) Field effect mobilities in
MoS2−G and MoS2−Ti FETs at different source drain voltages. (d) Same as in (b) for the control system MoS2−Ti.

scalable CVD process with the seeding of perylene-3,4,9,10- larger than 2.3 eV, which makes it harder to get good contact with
tetracarboxylic acid tetrapotassium salt (PTAS).17,18 High- than few layer MoS2 (bandgap of 1.2 eV). In graphene/MoS2
quality and large-area MoS2 monolayers were obtained using heterostructures (Figure 1b, black line), the PL intensity is
this technique, leading to the demonstration of highly scalable quenched because the metallic nature of graphene and the PL
electronics based on this atomically thin material.15 We have peak shift to negative value, possibly from doping effect. The two
used these MoS2 monolayers as the channel of transistors. Details peaks at 2.0 and 2.14 eV come from graphene Raman peak of G′
of the growth are described in the Supporting Information. An and G. There is negligible change in the peak spacing between
optical image of as-grown CVD MoS2 is shown in Figure 1a, the E2g mode and the A1g mode in this hybrid structure.24
demonstrating a good uniformity and a high coverage CVD-MoS2 monolayers grown on a 300 nm SiO2/Si substrate
approaching 100%. The sample is continuous over a size of 2 were first patterned to form transistor channels using electron
× 2 cm2, ending with isolated triangular MoS2 structures at the beam lithography (EBL) with poly(methyl methacrylate)
edge (Figure S1b, Supporting Information). Atomic force (PMMA) as the resist. After developing the resist pattern, the
microscopy (AFM) is conducted at one of the isolated triangles exposed parts of the MoS2 sheet are etched away using oxygen
to get the thickness of MoS2 (shown in Figure S1c, Supporting plasma to achieve device isolation. The sample was then coated
Information). The thickness of the CVD MoS2 monolayer is ∼8 with a methyl methacrylate (MMA) (6% concentration in ethyl
Å, which is consistent with the values of MoS2 monolayer lactate)/PMMA (2% concentration in anisole) stack, followed by
reported elsewhere. Raman and photoluminescence (PL) EBL exposure and development, forming a double-layer
spectroscopy were performed using a 532 nm Nd:YAG laser structure with openings on MMA slightly wider than on
on the sample to investigate the quality of MoS2, see Figure 1b. PMMA. Subsequently, 20 nm aluminum oxide (Al2O3) was
The single-layer structure of as-gown MoS2 is confirmed from its deposited by atomic layer deposition (ALD) at 100 °C (below
Raman spectroscopy based on the peak spacing between the E2g the glass transition temperature of PMMA/MMA stack25) using
mode and the A1g mode, which is smaller than 20 cm−1 (Figure trimethylaluminum (TMA) and water as precursors (see
1b, inset). A strong photoluminescence peak located at 1.88 eV Methods), followed by liftoff to form a patterned Al2O3 etch-
shown in Figure 1b corresponds to the carrier recombination stop layer. Large-area single layer graphene was then grown on
across the direct bandgap of single-layer MoS219,20 and implies a copper foils at 1035 °C by CVD method26,27 and transferred28,29
high quality of MoS2 monolayer. Because of the large excitonic (Supporting Information) onto the sample, see Figure 1c, left
binding energy in MoS 2 (0.4−0.8 eV, from theoretic panel. Following a new EBL step, patterned areas of graphene
calculation),21−23 the electronic band gap is estimated to be were etched by oxygen plasma to define the source, drain, and
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Nano Letters Letter

Figure 3. (a) Output characteristics (Id vs Vd) and (b) transfer characteristics (Id vs Vtg) of top-gated MoS2 transistor with Al2O3 as top gate dielectric,
graphene as source, drain, and gate electrodes. Vtg is the top gate voltage. (c) Output voltage as a function of the input voltage for a MoS2−G logic
inverter. Optical image (inset at lower left corner) and schematic of the electronic circuit (inset at upper right corner) for the inverter. (d) The gain of the
inverter, which is larger than 12.

gate of the transistor, while the MoS2 channels were protected by characterize the material properties and device performance,
the Al2O3 etch-stop layer, see Figure 1c, right panel. The sample while inverters and NAND gates demonstrate the scalability and
was then cleaned by acetone and annealed to remove PMMA the potential of this technology for mass production. On the
residues. (Alignment accuracy of this process and alternate same chip, a batch of control devices and circuits were also
lithography methods for EBL is discussed in Supporting fabricated with 15 nm Ti/45 nm Au metal stacks as electrodes
Information). By using patterned etch stop with specific design, (MoS2−Ti devices and circuits), shown in red dashed-line
we are able to make any 2D heterojunction in wafer scale. This rectangles in Figure 1e. We chose Ti here because it is the most
pave the way for large-scale application of 2D heterojunction commonly used metal for MoS2 FET research1,30 and has been
devices, such as heterojunction laser, photodetector, hetero- proposed as excellent metal contacts for n-type MoS2 FET in
junction bipolar transistors, tunneling FET, high-electron- previous theoretical papers.31,32 The MoS2−Ti devices and
mobility-transistor, etc. circuits were also fabricated with Al2O3 as top dielectric layers
Schematic and optical micrograph images of a dual gate FET and graphene as top gate in order to eliminate the effect from
are shown in Figure 1c (right panel) and Figure 1d, respectively. high-κ dielectric and top/back gate couplings while investigating
This device (MoS2−G FET) has MoS2 as channel, ALD Al2O3 as the role of the source drain contacts. This is the first time large-
top gate dielectric, and graphene as source, drain and gate scale graphene/MoS2 hybrid 2D electronics, both grown using
electrodes (connected to metal pads for measurement) and CVD methods in their single-layer form, were fabricated using a
SiO2/Si as back gate. In Figure 1d, the single layer graphene and CMOS-compatible, fully integrated process.
single layer MoS2 can be clearly distinguished through the optical All the fabricated devices and circuits were measured in a
contrast because of the thin material structure and interference vacuum probe station (Lakeshore cryogenics) at a pressure of ∼3
effect between the graphene and MoS2 with the SiO2/Si substrate × 10−6 Torr. During the back-gate sweep measurements, the top
underneath with orange background for SiO2, bright blue squares gates are grounded to avoid the coupling between top and back
for Al2O3, blue for MoS2, and grayish purple for graphene. In the gates.33 We studied about 50 devices that showed highly
AFM image of the channel region, Figure 1d right panel, the reproducible performance. Representative back-gated transport
signature wrinkles on the CVD graphene can be clearly seen. The characteristics of the MoS2−G transistor are shown in Figure 2a,c
surface of the low-temperature ALD Al2O3 layer is uniform and with a device channel length of 12 μm and width of 20 μm. Figure
free of pinholes, with a dielectric thickness of 20 nm as measured 2a shows the output performance (Ids vs Vds) of the devices. The
by AFM. Using this large-scale hybrid structure process, we have current is linear with small source-drain biases (10 meV),
successfully fabricated various devices and integrated circuits on a indicating that the contact between graphene and MoS2 is ohmic.
single chip, shown in Figure 1e. FETs, Hall bars, and The symmetry of the current with respect to the origin at positive
transmission line method (TLM) structures were made to and negative biases (inset of Figure 2a) further verifies the ohmic
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Nano Letters Letter

Figure 4. Temperature-dependent transport, that is, Id−Vbg curves at various temperatures: (a,b) MoS2−G FET, (c,d) MoS2−Ti FET. The source drain
bias for both structures are 0.5 V during measurement. In (b,d) we show the linear fit of Arrhenius plot ln(Id/T3/2)) vs 1000/T.

nature of the contacts. The transfer characteristics (Ids vs Vbg) of degenerate doping of the MoS2 layer. The MoS2−G contact in
MoS2−G and MoS2−Ti FETs (used as control devices with the present work exhibits a state-of-the-art contact resistance
exactly the same geometry) are shown in log scale in Figure 2b,d, between CVD MoS2 and CVD graphene. The use of graphene as
respectively. They both have on/off ratios larger than 106. The contacts for MoS2 FETs, as discussed above, provides 10 times
current density is 8 μA/μm at Vd = 7 V, Vbg = 60 V for MoS2−G lower contact resistance and 10 times higher on-current and
FET, about 12 times higher than that of MoS2−Ti, because of the field-effect mobility than conventional MoS2-metal contacts. In
lower barrier between MoS2 and graphene than that between addition, it has been shown in previous work that graphene-MoS2
MoS2 and Ti. The transconductance per channel width (gm/W = junction is robust with strain of 1.5%.9 This new contact scheme
dId/dVbg/W) of MoS2−G is 0.15 μS/μm with 300 nm SiO2 back is expected to also benefit flexible electronics, where most device
gate oxide, more than 1 order of magnitude higher than that of failures are typically related to crack formation in the metal
MoS2−Ti structures. The field effect mobilities calculated from electrodes.9,36 In addition, graphene can act as transparent
the transfer characteristics are shown in Figure 2c. The field effect electrode for MoS2 optical devices, because the sputtering
mobility is calculated using expression μ = [dId/dVbg] × [L/ process commonly used in the deposition of transparent metal
(WCoxVd)], where Vbg and Vd are the back-gate voltage and indium tin oxide (ITO) is not compatible with fragile single-layer
source-drain voltage, L and W are the channel length and width, MoS2.
and Cox (11 nF) is the capacitance per unit area between the The top-gated performance of the MoS2−G transistors is
channel and the back gate (calculated from 300 nm SiO2).The plotted in Figure 3. The output characteristics show a linear
mobility of MoS2 in MoS2−G structures reaches the peak value of current behavior at low drain bias voltages (0.5 eV), and current
17 cm2/(V s), while the MoS2−Ti structure has a peak mobility saturation at higher biases. In the linear regime at small source-
of only about 1.8 cm2/(V s). This value could be further drain voltages, the current is proportional to Vds, indicating that
improved by elimination of trapping states and by using the source and drain electrodes made of graphene form ohmic
substrates such as boron nitride (BN) to reduce surface contact with MoS2. The current saturates at higher drain bias (Vds
roughness and block substrate charge.34 The measured I−V > Vtg − Vt, where the Vtg is the top-gate voltage while Vt is the
characteristics are fitted to a classic drift-diffusion model to threshold voltage of the device) due to the formation of
extract the contact resistance for MoS2−G and MoS2−Ti FETs. depletion region on the drain side of the gate, as is typical of long
The effective gate voltage Vgs_eff and source drain voltage Vds_eff channel MOSFETs. The onset for current saturation because of
are given by Vgs−eff = Vgs −RsIds, Vds−eff = Vds − (Rs + Rd)Ids, with channel pinch-off follows the relationship Vds > Vtg − Vt with Vt =
Rs, Rd the parasitic series source/drain contact resistances. The −1.7 V. The transfer characteristics are shown in Figure 3b. The
contact resistance is 0.1 and 1 kΩ mm for MoS2−G and MoS2− results show the on−off ratio of the device is larger than 103. The
Ti, respectively. The single layer MoS2 has larger bandgap than transconductance in this device is 0.5 μS/μm at Vd = 7 V (Figure
multilayer MoS2 and the CVD sample has lower doping S3a, Supporting Information). The transconductance drops at
concentration than flakes exfoliated from the mineral. These the high gate voltage region, because of the access resistance.
result in lower density of state, making it more difficult to achieve Further development of self-aligned technology or doping of the
good contacts to single layer CVD MoS2 compared to multilayer access regions could help solve this problem. The subthreshold
flakes, as was also found in other literature reports.3,35 More work swing is 150 mV (Figure S3b, Supporting Information),
is needed to further decrease the contact resistance, especially by corresponding to a midgap interface trap density value of 2.7 ×
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Nano Letters Letter

1012 cm−2 eV−1, using the value of Cox calculated from 20 nm 4b,d for MoS2−G and MoS2−Ti, respectively. When Vd ≥ 3kBT/
thick Al2O3 with a dielectric constant of 7. q,
Using the technology described above, we have built several Vd
basic integrated logic circuits. For example, a fully integrated ⎛ Id ⎞
ln⎜ 3/2 ⎟=−
q φB − ( n ) + ln(A)
inverter was fabricated in depletion mode transistor resistor ⎝T ⎠ kBT
configuration, using two MoS2−G FETs, shown in Figure 3c.
The two transistors act as a switching and a load resistor, The effective SBH can be extracted from the slope of ln(Id/T3/2)
respectively (see schematic diagram, Figure 3c inset). The output − 1/T and the n value we obtain from fitting the Id vs Vd curves.
characteristics of the inverter are shown in Figure 3c. A low The resulting values are shown in Figure 5. The excellent fitting
voltage of −4 V represents a logic state 0 and a voltage close to 0 over all the temperatures is evidenced by the small error bar
V represents logic state 1. The inverter is able to be operated values.
under a supply voltage (Vdd) of 3 V, as shown in Figure 3c. The
voltage gain is close to 12, as shown in Figure 3d. This is the first
demonstration of logic circuits using CVD-grown 2D hetero-
structures that is mass producible. Further improvement in
device and circuit performance can be achieved by changing the
dielectric layers to insulating 2D crystals such as hexagonal boron
nitride or 2D oxides.9−11,37−39
The results from our FETs and circuits demonstrate the
advantages of graphene as a contact material for 2D electronic
systems. They also highlight the key role of the interfacial barrier
height between the active channel and electrodes in device
performance. In the following, we give a systematic comparison
of the barrier between MoS2/graphene and that between MoS2−
Ti in the control structure. To study the barrier height we have
characterized the transport properties at different temperatures
and fitted the data using a thermionic emission model (Figure 4).
The current through a Schottky barrier into 2D material can be
described using the 2D thermal emission equation

⎛ −qφB ⎞⎡ ⎛ qVd ⎞ ⎤
Id = AT 3/2exp⎜ ⎟⎢exp⎜ ⎟ − 1⎥
⎝ kBT ⎠⎢⎣ ⎝ nkBT ⎠ ⎦⎥
⎡ ⎛ qV ⎞ ⎤
= Is⎢exp⎜ d ⎟ − 1⎥
⎢⎣ ⎝ nkBT ⎠ ⎥⎦
Figure 5. (a) Schottky barrier height φB (in meV) and corresponding
error bars, as a function of the gate bias Vbg (in V) for CVD grown
where Id is the current, A is Richardson’s constant, T is the MoS2−G and MoS2−Ti junctions. (b) Experimental setup used (upper
temperature, φB is the barrier between the metal and semi- panel) and schematic band diagram of MoS2/G heterostructure at Vbg =
conductor, kB is the Boltzmann constant, q is the electronic 0 and Vbg > 0 (bottom panel). The corresponding edges of the valence
charge, Vd is the source to drain bias, and n is the nonideal factor band (VB) and the conduction band (CB) are shown, with EF marked by
of the Schottky diode. The power law of T3/2 comes from the the dashed line. (c) Calculated band structures of MoS2/graphene
Boltzmann carrier distribution and the thermal velocity. It is less interface at zero bias and doping (left), zero bias with finite doping
concentration (11.05 × 1012 cm−2) (middle) and 80 V back gate bias at
than T2 commonly found in a 3D system because of the constant the same doping (right). φB is indicated by the vertical arrow pointing
value of the density-of-states in a 2D system.40 n is calculated by from EF to the CB minimum at the K point. The relevant graphene and
fitting the Id versus Vd curves using the expression Id = MoS2 states are shown by blue and red lines, respectively. (d) Calculated
Is[exp(q(Vd − IdRs)/nkBT) −1], where Rs is the series resistance φB (in meV) as a function of the bias voltage Vbg (in V) at different
from the device channel (see details in Supporting Information). doping levels. The horizontal red line at 400 meV shows the value of the
The current as a function of back gate bias for the MoS2−G FET φB expected from the difference between the work function of graphene
at different temperatures is shown in Figure 4a and that for the (4.5 eV) and the electron affinity of MoS2 (∼4.1 eV). The red dots show
MoS2−Ti FET in Figure 4c. For both structures, the current the experimental results from (a).
decreases as temperature decreases. However, the temperature
dependence in MoS2−G is much weaker than that of MoS2−Ti, In MoS2−G, φB decreases dramatically from 110 to 0 meV
indicating a smaller thermal emission barrier in the MoS2−G with the back gate voltage changing from 0 to 35 V, as shown in
structure. In MoS2−G, the threshold voltage shifts to more Figure 5a. Previous studies have shown MoS2/graphene
positive values with decreasing temperature (Figure S4, Schottky barriers ranging from 22 to 260 meV, depending on
Supporting Information) and the mobility remains almost different gate voltage and sample preparation conditions.10,37
constant with the same gate overdrive Vbg − Vt. In the MoS2− The barrier height in MoS2−Ti has relatively weak dependence
Ti structure, the threshold voltage does not change, while the with back gate voltage, changing from 50 to 40 meV with back
transconductance or mobility decreases with decreasing temper- gate changing from 0 to 80 V, as shown in Figure 5a. For an ideal
ature (see Figure S5, Supporting Information). To determine the metal semiconductor contact, φB is determined by the difference
Schottky barrier height (SBH, denoted by φB), we plot ln(Id/ between the work function of the metal (Wm), the affinity of the
T3/2) versus 1000/T for various values of Vbg as shown in Figure semiconductor (χs) and surface potential (ϕs), that is, φB = Wm −
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χs + ϕs. The change of φB in MoS2−G comes from changes in the level of doping. The strong dependence of the value of φB on
both Wm and ϕs, as shown schematically in Figure 5b. In MoS2− the gate voltage, in the range 0 < Vbg < 2 V is due to the very low
Ti, the Wm modulation is very limited, and the change in SBH is density of states near the graphene Dirac point, as mentioned
believed to come from the modulation of midgap interface states above, which results in large shift of the Fermi level for small
that impact ϕs, just like in conventional metal−semiconductor amount of induced charge. For values of Vbg > 6 V, the change in
junctions. φB is smaller, and its slope is almost independent of the doping
The work function of graphene can be modulated by electric level at high concentrations (∼1013 cm−2, see Figure S8 in
field, following the expression: Supporting Information for different values of doping).
In summary, a novel 2D electronic system using hetero-
Wm = E F = −sgn(n0)ℏνF π |n0| , n0 = q(Vbg − Vt) structures of single-layer MoS2 and graphene has been
demonstrated where MoS2 serves as the channel material and
where n0 is the carrier concentration in graphene, ℏ Planck’s graphene is used as both the ohmic and gate contacts, and the
constant, and vF the Fermi velocity.41 It was already found in the interconnects for the 2D electronic system. This technology
past that a change in the value of Vbg by 30 V with 300 nm SiO2 as represents the first large-scale platform for constructing
back gate dielectric can cause a change of around 200 mV in electronics based on van der Waals heterostructures of 2D
graphene work function,41 which is consistent with the change in material monolayers. Both MoS2 and graphene monolayers were
the Schottky barrier height observed in our experimental data. As grown using low-cost CVD methods, which are easily scalable to
a result of this modulation, when the back gate voltage is larger any size on arbitrary substrates. This work lays the foundation for
than 35 V, the Schottky barrier height between MoS2 and a scalable all-2D-material electronics platform capable of taking
graphene is zero and an ohmic contact forms at the MoS2 and full advantage of the mechanical flexibility and electrostatic
graphene junction. Graphene outperforms Ti to contact MoS2 integrity offered by monolayer electronic materials for
with large carrier density which can be achieved using electronic applications in flexible and transparent electronics. Our system-
doping or chemical doping.43 The finite density of states and the atic analysis of using graphene as contact material to interface
tunability of its work function make graphene capable to form with 2D semiconductors (in this study MoS2) for effective carrier
excellent contacts with MoS2 and other semiconductors, offering injection into the channel, demonstrates that the tunable Fermi
new opportunities to design contact and to engineer junction level offers unprecedented flexibility for matching the work-
interfaces.42 function of the contacts with the channel. Combining the many
To elucidate some of the features of the MoS 2 −G advantages of graphene in high frequency electronics,44−46 and
heterostructure, we performed first-principles calculations its potential use as a new interconnect material superior to
using density functional theory (see Methods section for further metals42,47 at the nanometer scale,48 the technological frame-
details). Figure 5c shows the calculated band structure of the work demonstrated in this work opens the door to many new
MoS2−G heterostructure for different doping and electric bias. opportunities for designing novel electronic systems.
In these calculations, we have considered only contact barriers Methods. Low-T ALD. The low-temperature ALD deposition
which arise in the direction perpendicular to the 2D layers. The of Al2O3 was performed on a commercial Savannah ALD system
MoS2−G heterostructure has metallic character with the from Cambridge NanoTech at 100 °C using alternating cycles of
graphene Dirac cone from the dispersion of the pz states falling H2O and trimethylaluminum (TMA) as the precursors. The
within the MoS2 band gap. The polarization of the electronic purge time between each cycle is 60 s to allow the full reaction.
charge at the interface (see Figure S7 in Supporting Information) AFM and Raman Spectroscopy. AFM for identifying the thin
is stronger in graphene interfaces than in late transition metals,41 film thickness was performed on a Veeco Dimension 3100
which will be beneficial to the transfer of electrons from MoS2 to system. Raman spectroscopy was performed with a 532 nm
graphene. Because of the very small density of states near the Nd:YAG laser. All optical micrographs were taken with a Zeiss
Fermi level (around the graphene Dirac point), the behavior of Axio Imager.A1m microscope.
the device is sensitive to the position of EF inside of the band gap, Device and Circuit Characterization. Device characterization
which can be changed by electronic doping or external electric was performed using an Agilent 4155C semiconductor
fields. At conditions of zero external bias and no doping (left parameter analyzer and a Lakeshore cryogenic probe station
panel in Figure 5c), EF is at the Dirac point and corresponds to with micromanipulation probes. All measurements were done in
small charge transfer (∼0.01 electrons per cell from MoS2 to vacuum (3 × 10−6 Torr) at room temperature.
graphene) and relatively weak interactions (∼55 meV per C First-Principles Electronic Structure Calculations. The
atom). At finite doping (middle panel in Figure 5c) or electric calculations reported here are based on density functional theory
fields (right panel in Figure 5c), EF is shifted away from the Dirac calculations using the SIESTA code.49 The generalized gradient
point, which changes the magnitude of the Schottky barrier approximation50 and nonlocal van der Waals density functional51
height φB. In this case, the barrier is given by the difference was used together with double-ς plus polarized basis set, and
between the Fermi level of the combined system and the norm-conserving Troullier-Martins pseudopotentials52 to repre-
conduction band minimum of MoS2 at the k-point in the sent the atomic cores. The resolution of the real-space grid used
Brillouin zone. The results of barrier height change as a function to calculate the Hartree and exchange-correlation contribution to
of the external bias are shown in Figure 5d: At no doping and the total energy was chosen to be equivalent to 150 Ry plane-
zero electric bias, the barrier height is 385 meV, close to the value wave cutoff. Atomic coordinates were allowed to relax using a
of 400 meV obtained by simply calculating the difference conjugate-gradient algorithm until all forces were smaller in
between the graphene work function and the electron affinity of magnitude than 0.01 eV/Å. To simulate the interface between
MoS2. In the real system, a small amount of doping will shift the graphene and MoS2 layers, supercells containing up to 488 atoms
value of φB significantly from this value. When an external electric were constructed using a graphene supercell of 5 × 5 and a MoS2
field is applied, φB decreases monotonically with increasing supercell of 4 × 4 that are approximately lattice matched in
values of the bias. The amount by which φB changes depends on different stacking configurations. To avoid interactions between
G dx.doi.org/10.1021/nl404795z | Nano Lett. XXXX, XXX, XXX−XXX
Nano Letters Letter

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graphene-WS2 heterostructures for flexible and transparent electronics.
*
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CVD growth of MoS2 and single layer graphene, alignment (12) Wang, H.; Hsu, A.; Wu, J.; Kong, J.; Palacios, T. Graphene-Based
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(15) Wang, H.; et al. Large-scale 2D electronics based on single-layer
AUTHOR INFORMATION MoS2 grown by chemical vapor deposition. IEEE Int. Electron Devices
Meet. 2012, 4.6.1−4.6.4, DOI: 10.1109/IEDM.2012.6478980.
Corresponding Authors (16) Bertolazzi, S.; Krasnozhon, D.; Kis, A. Nonvolatile Memory Cells
*E-mail: [email protected]. Based on MoS2/Graphene Heterostructures. ACS Nano 2013, 7, 3246−
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*E-mail: [email protected]. (17) Lee, Y.-H.; et al. Synthesis of Large-Area MoS2 Atomic Layers
Present Addresses with Chemical Vapor Deposition. Adv. Mater. 2012, 24, 2320−2325.
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Department of Chemical Engineering, Stanford University,
Metal Disulfides on Diverse Surfaces. Nano Lett. 2013, 13, 1852−1857.
Stanford, California 94305, United States, SLAC National (19) Mak, K.; Lee, C.; Hone, J.; Shan, J.; Heinz, T. Atomically Thin
Accelerator Laboratory, SUNCAT Center for Interface Science MoS_{2}: A New Direct-Gap Semiconductor. Phys. Rev. Lett. 2010, 105,
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△
IBM T. J. Watson Research Center. Email: [email protected]. (20) Splendiani, A.; et al. Emerging photoluminescence in monolayer
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The authors declare no competing financial interest. molybdenum and tungsten dichalcogenides. Phys. Rev. B 2012, 86,

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ACKNOWLEDGMENTS (22) Berkelbach, T. C.; Hybertsen, M. S.; Reichman, D. R. Theory of
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