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    Lab Title:: Introduction To Microwind and Analysis of CMOS 0.25 Micron

    Uploaded by

    William Gonzales
    This lab introduces students to the Microwind layout tool and analyzing MOSFET characteristics. The tasks include getting familiar with Microwind, designing layouts, and simulating nMOS and pMOS transistors. Students will analyze how changing widths and voltages affects transistor behavior. A report is required discussing the lab contents, design approaches, layouts, simulation results and effects of the width parameter on MOSFETs.

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    Lab Title:: Introduction To Microwind and Analysis of CMOS 0.25 Micron

    Uploaded by

    William Gonzales
    107 views7 pages
    This lab introduces students to the Microwind layout tool and analyzing MOSFET characteristics. The tasks include getting familiar with Microwind, designing layouts, and simulating nMOS and pMOS transistors. Students will analyze how changing widths and voltages affects transistor behavior. A report is required discussing the lab contents, design approaches, layouts, simulation results and effects of the width parameter on MOSFETs.

    Original Description:

    Laboratory 1

    Original Title

    Lab1

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    This lab introduces students to the Microwind layout tool and analyzing MOSFET characteristics. The tasks include getting familiar with Microwind, designing layouts, and simulating nMOS and pMOS transistors. Students will analyze how changing widths and voltages affects transistor behavior. A report is required discussing the lab contents, design approaches, layouts, simulation results and effects of the width parameter on MOSFETs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    107 views7 pages

    Lab Title:: Introduction To Microwind and Analysis of CMOS 0.25 Micron

    Uploaded by

    William Gonzales
    This lab introduces students to the Microwind layout tool and analyzing MOSFET characteristics. The tasks include getting familiar with Microwind, designing layouts, and simulating nMOS and pMOS transistors. Students will analyze how changing widths and voltages affects transistor behavior. A report is required discussing the lab contents, design approaches, layouts, simulation results and effects of the width parameter on MOSFETs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 7

    Lab 01

    Lab Title: Introduction to Microwind and Analysis of CMOS 0.25 micron


    Technology MOSFETs.

    Lab Objective: In this lab students will be introduced to a Layout based EDA
    tool “Microwind” and the introduction will be accompanied with analysis of MOS
    transistors. The tool used in this lab is Microwind.

    The tasks given in the lab include,

    1 Familiarity and Hands on Example using the tool.


    2 Layout Design using the tool.
    3 Study of MOSFET Characteristics.
    4 Analog Simulation of MOSFETs.

    Tool used: Microwind

    Lab Description:
    MOSFET
    The Metal Oxide Semiconductor Field Effect Transistor is very important part of
    Digital Integrated Circuits. It is mostly used as switch in digital design. MOSFET is a
    four terminal device. The voltage applied to the gate terminal determine the current
    flow between drain and source terminals. The body/substrate of the transistor is the
    fourth terminal. Mostly the fourth terminal (body/substrate) of the device is
    connected to dc supply that is identical for all devices of the same type (GND fro
    nMOS and Vdd for pMOS). Usually this terminal is not shown on the schematics.
    nMOS
    The nMOS transistor consists of n+ drain and source diffusion regions, which are
    embedded in a p-type substrate. The electrons in the channel beneath the gate
    between source and drain terminal are responsible for the current flow.
    pMOS
    The pMOS transistor consists of p+ drain and source diffusion regions, which are
    embedded in an n-type substrate. The holes in the channel beneath the gatebetween
    source and drain terminal are responsible for the current flow.
    CMOS
    The CMOS (Complementary MOS) consist of both p-type and n-type MOS. The
    advantage of CMOS is its low power design due its Static behavior.
    Design/ Diagram/Circuit
    Lab Instructions
    a) Open the Microwind2 by double clicking it located in the installed directory of
    microwind2-7

    The following screen will be appeared

    b) Select the foundry using the command File > Select Foundry

    c) Select 0.25-micron process by selecting “cmos025.tec” file. Click Open tab to


    continue.
    d) Save the design as “Lab01” using the command File > Save as.
    e) Create an nMOS by using the nMOS generator button in the Palette

    You can set the width and length of MOS by typing in the fields Width MOS and
    Length MOS either in micron or in lambda units as indicated in the above figure. Click
    on Generate Device Tab to generate the device.
    f) Apply the voltages and output node using the symbol buttons Vdd, Gnd, Add a
    Pulse, and Visible node in the Palette menu, as indicated in the following figure. You
    can use the Stretch/Move command button for these actions.

    g) Click on the Run Tab on the Tool bar menu to start the simulation or using the
    command Simulate > Run Simulation.

    h) Now apply the Vdd to the n+ diffusion or drain terminal instead of Vss, run
    the simulation again.
    Analyze the simulation waveform, use different values of voltages for Vdd by
    double clicking on it and set the voltage level. Now we will make the above
    schematics.
    Similarly the nMOS can be analyzed using different widths and different input
    voltages.

    j) Save the design.

    The characteristics of the pMOS are similar to the nMOS. Design the pMOS
    Layout and analyzed in the similar way as nMOS.
    Explore the Simulation Graphs.
    Lab Report
     Give a short description of the contents of the lab
     Include block diagram/diagrams of your design in the lab report
     Describe your layout design approach parameters and explain the effects of each
    parameter
     Include layout of your design
     Include the results in timing waveform format in your report

    Simulation Analysis (Include in your Lab Report)

    You can increase the table and also the entries for in depth analysis.

    A properly presented in depth analysis with graph based on the table entrieswill be
    highly appreciated.

    Discuss the Effects of width design parameter of the MOS devices on their behavior.

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