400g Im 20210708 Instruction Manual

SEL-400G Relay
Instruction Manual
SEL-400G
Advanced Generator
Protection System
Instruction Manual
20210708
*PM400G-01-NB*
© 2020–2021 by Schweitzer Engineering Laboratories, Inc. All rights reserved.
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representative. PM400G-01
SEL-400G Relay Instruction Manual Date Code 20210708

SEL-400G Relay
Instruction Manual
Table of Contents
R.Instruction Manual
List of Tables................................................................................................................................................................................v
List of Figures ............................................................................................................................................................................xi
Preface .........................................................................................................................................................................................xix
Manual Overview .................................................................................................................................................xix
Safety Information .............................................................................................................................................. xxii
General Information............................................................................................................................................xxiv
Section 1: Introduction and Specifications

Overview...............................................................................................................................................................1.1
Features .................................................................................................................................................................1.5
Models and Options ............................................................................................................................................1.10
Applications ........................................................................................................................................................1.13
Product Characteristics .......................................................................................................................................1.16
Specifications......................................................................................................................................................1.18
Section 2: Installation
Shared Configuration Attributes ...........................................................................................................................2.1
Plug-In Boards ....................................................................................................................................................2.10
Jumpers ...............................................................................................................................................................2.11
Relay Placement .................................................................................................................................................2.17
SEL-2664 and SEL-2664S Application..............................................................................................................2.18
SEL-2664/SEL-2664S/SEL-400G Communication Configuration....................................................................2.20
Connection ..........................................................................................................................................................2.27
AC/DC Connection Diagrams ............................................................................................................................2.39
Section 3: Testing
Low-Level Test Interface ......................................................................................................................................3.1
Relay Test Connections.........................................................................................................................................3.4
Selected Element Tests .........................................................................................................................................3.4
Technical Support ...............................................................................................................................................3.52
SEL-400G Relay Commissioning Test Worksheet.............................................................................................3.53
Section 4: Front-Panel Operations

Front-Panel LCD Default Displays.......................................................................................................................4.1
Front-Panel Menus and Screens............................................................................................................................4.3
Target LEDs ........................................................................................................................................................4.15
Front-Panel Operator Control Pushbuttons.........................................................................................................4.16
One-Line Diagrams.............................................................................................................................................4.18
Section 5: Protection Functions

Application Data ...................................................................................................................................................5.2
Configuration of Voltage Inputs............................................................................................................................5.3
Configuration of Current Inputs............................................................................................................................5.9
Frequency Tracking ............................................................................................................................................5.12
Power System Data .............................................................................................................................................5.15
Pumped Storage ..................................................................................................................................................5.17
Universal Differential Elements..........................................................................................................................5.18
Negative-Sequence Percentage-Restrained Differential Element.......................................................................5.47
Restricted Earth Fault Element ...........................................................................................................................5.50
One Hundred Percent Stator Ground Elements ..................................................................................................5.60
Directional Power Elements ...............................................................................................................................5.76
Date Code 20210708 Instruction Manual SEL-400G Relay

ii Table of Contents
Capability-Based Loss of Field...........................................................................................................................5.80

Impedance-Based LOF Elements .......................................................................................................................5.97
Current Unbalance Elements ............................................................................................................................5.101
Volt/Hertz Elements ..........................................................................................................................................5.104
Split-Phase Protection.......................................................................................................................................5.112
System Backup Protection ................................................................................................................................5.118
Load-Encroachment Logic ...............................................................................................................................5.126
Thermal Model .................................................................................................................................................5.128
RTD Element ....................................................................................................................................................5.136
Out-of-Step Element .........................................................................................................................................5.137
Inadvertent Energization ...................................................................................................................................5.144
Field Ground Protection....................................................................................................................................5.146
Synchronism-Check Element ...........................................................................................................................5.148
Autosynchronizer..............................................................................................................................................5.160
Loss-of-Potential Element ................................................................................................................................5.170
Open-Phase Detection Logic ............................................................................................................................5.175
Breaker Failure Elements..................................................................................................................................5.175
Breaker Flashover Elements .............................................................................................................................5.183
Over- and Underfrequency Elements................................................................................................................5.185
Accumulated Frequency Element .....................................................................................................................5.187
Over- and Under-Rate-of-Change-of-Frequency Element................................................................................5.190
Injection-Based Stator Ground Protection ........................................................................................................5.192
Over- and Undervoltage Elements ....................................................................................................................5.195
Overcurrent Elements .......................................................................................................................................5.199
Selectable Time-Overcurrent Element..............................................................................................................5.207
Directional Elements.........................................................................................................................................5.214
Trip Logic .........................................................................................................................................................5.220
Close Logic .......................................................................................................................................................5.222
Section 6: Protection Application Examples

Potential Transformer Data...................................................................................................................................6.3
Current Transformer Data.....................................................................................................................................6.4
Relay Configuration..............................................................................................................................................6.4
Power System Data ...............................................................................................................................................6.5
Volts-per-Hertz Element 1 (Generator).................................................................................................................6.6
Volts-per-Hertz Element 2 (Generator Step-Up) ..................................................................................................6.6
Synchronism Check ..............................................................................................................................................6.7
Directional Power .................................................................................................................................................6.7
Zone 1 Differential (Generator Zone)...................................................................................................................6.8
Zone 2 Differential (Generator Step-Up)..............................................................................................................6.8
Restricted Earth Fault .........................................................................................................................................6.10
Section 7: Metering, Monitoring, and Reporting

Phasor Reference ..................................................................................................................................................7.1
Metering................................................................................................................................................................7.2
Circuit Breaker Monitor......................................................................................................................................7.18
Station DC Battery System Monitor ...................................................................................................................7.19
Analog Signal Profiling ......................................................................................................................................7.19
Thermal Monitoring............................................................................................................................................7.20
Reporting ............................................................................................................................................................7.24
Section 8: Settings
Alias Settings ........................................................................................................................................................8.1
Global Settings......................................................................................................................................................8.2
Monitor Settings ...................................................................................................................................................8.7
Group Settings ....................................................................................................................................................8.10
Automation Freeform SELOGIC Control Equations ...........................................................................................8.29
Output Settings ...................................................................................................................................................8.29

Table of Contents iii
Front-Panel Settings............................................................................................................................................8.29
Report Settings....................................................................................................................................................8.32
Port Settings ........................................................................................................................................................8.32
Modbus Settings—Custom Map.........................................................................................................................8.33
DNP3 Settings—Custom Maps ..........................................................................................................................8.33
Notes Settings .....................................................................................................................................................8.33
Bay Settings ........................................................................................................................................................8.33
Section 9: ASCII Command Reference

Description of Commands ....................................................................................................................................9.2
Section 10: Communications Interfaces

Communications Database .................................................................................................................................10.1
DNP3 Communication........................................................................................................................................10.7
IEC 61850 Communication ..............................................................................................................................10.28
Synchrophasors .................................................................................................................................................10.57
Modbus TCP Communication ..........................................................................................................................10.59
Section 11: Relay Word Bits

Alphabetical List.................................................................................................................................................11.1
Row List............................................................................................................................................................11.89
Section 12: Analog Quantities

Appendix A: Firmware, ICD File, and Manual Versions
Firmware ..............................................................................................................................................................A.1
SELBOOT ..............................................................................................................................................................A.3
ICD File ...............................................................................................................................................................A.4
Instruction Manual ...............................................................................................................................................A.5
SEL-400G Relay Command Summary

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SEL-400G Relay
Instruction Manual
List of Tables
Table 1.1 Supported 1 A/5 A Terminal Combinations..............................................................................1.11
Table 1.2 Interface Board Information ......................................................................................................1.12

Table 1.3 SEL-400G Relay Characteristics...............................................................................................1.16
Table 2.1 Required Settings for Use With AC Control Signals ..................................................................2.5
Table 2.2 Control Inputs ............................................................................................................................2.11
Table 2.3 Control Outputs .........................................................................................................................2.11
Table 2.4 Main Board Jumpers..................................................................................................................2.12
Table 2.5 Serial Port Jumpers ....................................................................................................................2.14
Table 2.6 I/O Board Jumpers.....................................................................................................................2.17
Table 2.7 SEL-2664S Logical Device: ANN (Annunciation)...................................................................2.21
Table 2.8 Fuse Requirements for the Power Supply .................................................................................2.32
Table 3.1 UUT Database Entries for SEL-5401 Relay Test System Software (Analog Input
Board Y)—5 A Relay .................................................................................................................3.2
Board Z)—5 A Relay .................................................................................................................3.2
Board Y)—1 A Relay .................................................................................................................3.3
Board Z)—1 A Relay .................................................................................................................3.3
Board Z)—0.2 A (Terminal Y Only) Relay ...............................................................................3.4
Table 3.6 Settings to Test the V/Hz Elements .............................................................................................3.6
Table 3.7 Voltage Values ..........................................................................................................................3.10
Table 3.8 Settings to Test the Directional Power Element ........................................................................3.11
Table 3.9 Settings to Test the Capability-Based Loss-of-Field Element...................................................3.15
Table 3.10 Zone 1 Settings ..........................................................................................................................3.16
Table 3.13 Undervoltage Acceleration Settings ..........................................................................................3.17
Table 3.14 Zone 1 Expected Pickup Currents and Corresponding Real and Reactive Power ....................3.20
Table 3.17 Zone 2 Undervoltage Expected Pickup Currents and Corresponding Real and Reac-
tive Power.................................................................................................................................3.22
Table 3.18 Undervoltage Expected Pickup Currents and Corresponding Real and Reactive Power..........3.22
Table 3.19 Zone 3 Undervoltage Expected Pickup Currents and Corresponding Real and Reac-
tive Power.................................................................................................................................3.23
Table 3.20 Settings to Test the Directional Power Element ........................................................................3.24
Table 3.21 Element 1, Level 1 Tests ...........................................................................................................3.26
Table 3.22 Element 1, Level 2 Tests ...........................................................................................................3.27
Table 3.23 Sequence, Magnitude, and Frequency .......................................................................................3.28
Table 3.24 Third Harmonic Common Settings............................................................................................3.28
Table 3.25 Settings to Test the Third Harmonic 64G2 Element .................................................................3.29
Table 3.26 64G2 Level 1 Test Values .........................................................................................................3.31
Table 3.27 Settings to Test the Third Harmonic 64G3 Element .................................................................3.32
Table 3.28 64G3 Settings ............................................................................................................................3.33
Table 3.29 64G3 Level 1 Test Values .........................................................................................................3.34
Table 3.30 Differential Element Settings ....................................................................................................3.36
Table 3.31 Calculate the Current Values in Amperes (Case 1) ...................................................................3.39
Table 3.32 Calculate the Current Values in Amperes (Case 2, Stage 1) .....................................................3.40
Table 3.33 Calculate the Current Values in Amperes (Case 2, Stage 2) .....................................................3.41
Table 3.34 Current Values in Amperes (Case 3) .........................................................................................3.41
Table 3.35 Settings to Test the Autosynchronizer Element ........................................................................3.45

vi List of Tables
Table 3.36 Output Configuration.................................................................................................................3.46

Table 3.37 Disturbance Report Settings ......................................................................................................3.50
Table 4.1 Bay Control..................................................................................................................................4.1
Table 4.2 RMS Quantities ...........................................................................................................................4.2
Table 4.3 Fundamental Quantities ...............................................................................................................4.2
Table 4.4 Energy Quantities ........................................................................................................................4.2
Table 4.5 Differential Quantities .................................................................................................................4.2
Table 4.6 Meter Availability Conditions .....................................................................................................4.4
Table 4.7 Event Elements ..........................................................................................................................4.12
Table 4.8 LED Settings..............................................................................................................................4.15
Table 5.1 Inverting Polarity Setting.............................................................................................................5.2
Table 5.2 Voltage Input Settings .................................................................................................................5.5
Table 5.3 PTCONk Internal Signals and Calculated Voltages ....................................................................5.6
Table 5.4 Current Input Settings..................................................................................................................5.9
Table 5.5 Frequency Tracking Settings .....................................................................................................5.12
Table 5.6 Available Assignments ..............................................................................................................5.12
Table 5.7 Undervoltage Supervision Logic ...............................................................................................5.13
Table 5.8 Power System Data Settings......................................................................................................5.15
Table 5.9 Pumped Storage Settings ...........................................................................................................5.17
Table 5.10 E87Hn Settings ..........................................................................................................................5.25
Table 5.11 Minimum CT Sizing Requirements for the SEL-400G Differential Element...........................5.34
Table 5.12 87 Phase Differential Settings ...................................................................................................5.40
Table 5.13 Pickup, Slope, and Security Settings .........................................................................................5.40
Table 5.14 Unrestrained and RMS Settings ................................................................................................5.42
Table 5.15 Winding Compensation Settings ...............................................................................................5.43
Table 5.16 Compensation Matrices .............................................................................................................5.44
Table 5.17 Inrush Restraint Settings............................................................................................................5.46
Table 5.18 Relationships Among Input Currents and REF Elements .........................................................5.52
Table 5.19 Restricted Earth Fault Element Settings ....................................................................................5.55
Table 5.20 Stator Ground Element Setting..................................................................................................5.60
Table 5.21 Fundamental Neutral Overvoltage Settings...............................................................................5.62
Table 5.22 Third-Harmonic Alternate Switch Settings ...............................................................................5.65
Table 5.23 64G2 Third-Harmonic Element Settings ...................................................................................5.66
Table 5.24 64G3 Third-Harmonic Element Settings ...................................................................................5.69
Table 5.25 64G Output Logic Settings ........................................................................................................5.73
Table 5.26 Directional Power Settings ........................................................................................................5.79
Table 5.27 Typical Motoring Power............................................................................................................5.80
Table 5.28 40P Zone 1 Settings ...................................................................................................................5.82
Table 5.32 40P Dynamic Function Common Settings ................................................................................5.89
Table 5.33 40P Dynamic Function Zone 2 Settings ....................................................................................5.90
Table 5.34 40P Dynamic Function Zone 4 Settings ....................................................................................5.91
Table 5.35 40Z Settings ...............................................................................................................................5.98
Table 5.36 Current Unbalance Setting.......................................................................................................5.103
Table 5.37 Volts per Hertz Operating Signal and Associated Frequency .................................................5.105
Table 5.38 24On Setting ............................................................................................................................5.107
Table 5.39 24TCn Setting..........................................................................................................................5.107
Table 5.40 24CCSn Setting .......................................................................................................................5.108
Table 5.41 Level 1 Settings .......................................................................................................................5.108
Table 5.42 Level 2 Settings .......................................................................................................................5.108
Table 5.43 Level 2 User-Defined Curve Settings......................................................................................5.109
Table 5.44 Split-Phase Settings .................................................................................................................5.116
Table 5.45 System Backup GSU Compensation Angle Settings ..............................................................5.118
Table 5.46 System Backup Compensation Matrices .................................................................................5.119
Table 5.47 Backup Distance Settings ........................................................................................................5.121
Table 5.48 Voltage-Controlled Time-Overcurrent Settings ......................................................................5.122

List of Tables vii
Table 5.49 Voltage-Restrained Time-Overcurrent Settings ......................................................................5.125

Table 5.50 Load Encroachment Settings ...................................................................................................5.127
Table 5.51 Thermal Element Settings .......................................................................................................5.131
Table 5.52 Out-of-Step Settings ................................................................................................................5.141
Table 5.53 Inadvertent Energization Settings............................................................................................5.145
Table 5.54 Field Ground Settings ..............................................................................................................5.147
Table 5.55 Uncompensated and Compensated Angle Checks ..................................................................5.153
Table 5.56 Synchronism-Check Element Settings ....................................................................................5.156
Table 5.57 Types of Pulse Control ............................................................................................................5.160
Table 5.58 Autosynchronizer Settings.......................................................................................................5.167
Table 5.59 Autosynchronizer Active Settings for Each Pulse Control Mode ...........................................5.168
Table 5.60 Autosynchonizer Pulse Control Setting Guidelines ................................................................5.169
Table 5.61 Loss-of-Potential Settings........................................................................................................5.173
Table 5.62 Breaker Failure Settings ..........................................................................................................5.181
Table 5.63 Alternate Breaker Failure Settings ..........................................................................................5.182
Table 5.64 Breaker Flashover Elements Settings ......................................................................................5.185
Table 5.65 Over- and Underfrequency Element Settings ..........................................................................5.186
Table 5.66 Accumulated Frequency Element Settings..............................................................................5.188
Table 5.67 Injection-Based Stator Ground Protection Settings.................................................................5.194
Table 5.68 Operating Quantities................................................................................................................5.195
Table 5.69 Over- and Undervoltage Settings ............................................................................................5.196
Table 5.70 U.S. Operate and Reset Curve Equations ................................................................................5.207
Table 5.71 IEC Operate and Reset Curve Equations.................................................................................5.207
Table 5.72 Fundamental Operating Quantities ..........................................................................................5.212
Table 7.1 Valid Reference Quantities..........................................................................................................7.2
Table 7.2 MET Command ...........................................................................................................................7.2
Table 7.3 Valid Reference Quantities..........................................................................................................7.3
Table 7.4 Quantities in the Fundamental Meter Report ..............................................................................7.4
Table 7.5 Quantities in the RMS Meter Report ...........................................................................................7.6
Table 7.6 Quantities in the MET SEC Report .............................................................................................7.7
Table 7.7 Quantities in the Demand Metering Report.................................................................................7.8
Table 7.8 Demand Metering Operating Quantities......................................................................................7.9
Table 7.9 Quantities in the MET DIF Report ..............................................................................................7.9
Table 7.10 Quantities in the Energy Meter Report......................................................................................7.12
Table 7.11 Quantities in the Harmonic Meter Report .................................................................................7.13
Table 7.12 Synchronism-Check Meter Quantities.......................................................................................7.16
Table 7.13 Min/Max Metering Report Default Quantities ..........................................................................7.17
Table 7.14 RTD Resistance Versus Temperature........................................................................................7.22
Table 7.15 Event Report Nonvolatile Storage Capability When ERDIG = S .............................................7.25
Table 7.16 Event Report Nonvolatile Storage Capability When ERDIG = A ............................................7.25
Table 7.17 Event Types ...............................................................................................................................7.30
Table 8.1 Default Alias Settings ..................................................................................................................8.1
Table 8.2 Global Setting Categories ............................................................................................................8.2
Table 8.3 General Global Settings...............................................................................................................8.2
Table 8.4 Global Enables.............................................................................................................................8.2
Table 8.5 Control Inputs ..............................................................................................................................8.3
Table 8.6 Interface Board #1 Control Inputs ...............................................................................................8.3
Table 8.9 Settings Group Selection .............................................................................................................8.4
Table 8.10 Synchronized Phasor Configuration Settings ..............................................................................8.4
Table 8.11 Phasors Included in the Data q ....................................................................................................8.5
Table 8.12 Phasor Aliases in Data Configuration q ......................................................................................8.5
Table 8.13 Synchronized Phasor Configuration Settings Part 2....................................................................8.6
Table 8.14 Synchronized Phasor Recorder Settings......................................................................................8.6
Table 8.15 Synchronized Phasor Real-Time Control ....................................................................................8.6
Table 8.16 Time and Date Management........................................................................................................8.6
Table 8.17 Data Reset Control.......................................................................................................................8.7

viii List of Tables
Table 8.18 Access Control.............................................................................................................................8.7

Table 8.19 DNP .............................................................................................................................................8.7
Table 8.20 Monitor Setting Categories..........................................................................................................8.7
Table 8.21 Enables.........................................................................................................................................8.7
Table 8.22 Station DC Monitor .....................................................................................................................8.8
Table 8.23 Breaker Monitor Settings.............................................................................................................8.8
Table 8.24 IEC Thermal (49) Elements.........................................................................................................8.9
Table 8.25 Thermal Ambient Compensation...............................................................................................8.10
Table 8.26 Group Setting Categories...........................................................................................................8.10
Table 8.27 Relay Configuration ..................................................................................................................8.11
Table 8.28 Current Transformer Data..........................................................................................................8.13
Table 8.29 Potential Transformer Data .......................................................................................................8.13
Table 8.30 Power System Data....................................................................................................................8.13
Table 8.31 Frequency Tracking Sources .....................................................................................................8.13
Table 8.32 Pumped Storage .........................................................................................................................8.13
Table 8.33 Current Transformer Polarity Terminal Selection.....................................................................8.14
Table 8.34 Zone 1 and Zone 2 Differential Element Configuration............................................................8.14
Table 8.35 Restricted Earth Fault Element..................................................................................................8.15
Table 8.36 Restricted Earth Fault 50 Element.............................................................................................8.15
Table 8.37 Restricted Earth Fault 51 Element.............................................................................................8.15
Table 8.38 Breaker n Inadvertent Energization Protection Logic ...............................................................8.15
Table 8.39 Volts per Hertz Element a .........................................................................................................8.16
Table 8.40 Volts per Hertz Element a Level 2 Definite Time.....................................................................8.16
Table 8.41 Volts per Hertz Element a Level 2, User Defined Curve a .......................................................8.16
Table 8.42 Synchronism Check (25) Reference ..........................................................................................8.16
Table 8.43 Breaker n Synchronism Check (25)...........................................................................................8.17
Table 8.44 Autosynchronism Check Configuration (25A)..........................................................................8.17
Table 8.45 Breaker n Autosynchronism Check (25A) ................................................................................8.17
Table 8.46 Undervoltage (27) Elements 1–6 ...............................................................................................8.18
Table 8.47 Directional Power (32) Element 01–04 .....................................................................................8.18
Table 8.48 Impedance Based Loss of Field (40Z) Element ........................................................................8.18
Table 8.49 PQ-Based Loss-of-Field (40P) Element ....................................................................................8.18
Table 8.50 Current Unbalance (46) Elements 1 and 2.................................................................................8.20
Table 8.51 Terminal n Overcurrent Elements .............................................................................................8.20
Table 8.52 Terminal n Phase Overcurrent Element Level c........................................................................8.21
Table 8.53 Terminal n Negative-Sequence Overcurrent Element Level c ..................................................8.21
Table 8.54 Terminal n Zero-Sequence Overcurrent Element Level c.........................................................8.21
Table 8.55 Terminal n Directional (67) Elements .......................................................................................8.21
Table 8.56 Inverse Time Overcurrent Elements 1–12.................................................................................8.22
Table 8.57 Overvoltage (59) Elements 1–6 .................................................................................................8.22
Table 8.58 Split Phase (60P) Element .........................................................................................................8.22
Table 8.59 Stator Ground (64G) Element....................................................................................................8.23
Table 8.60 Field Ground (64F) Element......................................................................................................8.23
Table 8.61 Stator Ground (64S) Element ....................................................................................................8.24
Table 8.62 Out-of-Step (78) Element ..........................................................................................................8.24
Table 8.63 Frequency (81) Elements...........................................................................................................8.24
Table 8.64 Rate-of-Change-of-Frequency (81R) Elements.........................................................................8.25
Table 8.65 Accumulated Frequency (81A) Elements..................................................................................8.25
Table 8.66 Pole Open Detection ..................................................................................................................8.25
Table 8.67 System Backup Protection.........................................................................................................8.25
Table 8.68 Phase Distance (21P) Element...................................................................................................8.25
Table 8.69 Voltage-Controlled Time-Overcurrent (51C) Element .............................................................8.26
Table 8.70 Voltage-Restrained Time Overcurrent (51V) Element..............................................................8.26
Table 8.71 Load Encroachment ...................................................................................................................8.26
Table 8.72 Loss of Potential ........................................................................................................................8.26
Table 8.73 Breaker Failure Logic ................................................................................................................8.27
Table 8.74 Breaker n Failure Logic .............................................................................................................8.27
Table 8.75 Breaker n Flashover Logic ........................................................................................................8.27

List of Tables ix
Table 8.76 Demand Metering Elements 1–10 .............................................................................................8.28

Table 8.77 Max/Min Metering Elements.....................................................................................................8.28
Table 8.78 Online Logic ..............................................................................................................................8.28
Table 8.79 Trip Logic ..................................................................................................................................8.28
Table 8.80 Close Logic................................................................................................................................8.28
Table 8.81 Front-Panel Settings Defaults ....................................................................................................8.29
Table 8.82 Disturbance Event Recording ....................................................................................................8.32
Table 8.83 MIRRORED BITS Protocol Defaults ............................................................................................8.32
Table 8.84 Modbus TCP Protocol Defaults.................................................................................................8.32
Table 8.85 Bay Settings ...............................................................................................................................8.33
Table 9.1 SEL-400G List of Commands .....................................................................................................9.2
Table 9.2 81A Commands ...........................................................................................................................9.4
Table 9.3 MET Command ...........................................................................................................................9.4
Table 9.4 MET DIF Command....................................................................................................................9.5
Table 9.5 MET E Command........................................................................................................................9.5
Table 9.6 MET H Command .......................................................................................................................9.5
Table 9.7 MET M Command.......................................................................................................................9.6
Table 9.8 MET RMS Command..................................................................................................................9.6
Table 9.9 MET RTD Command ..................................................................................................................9.6
Table 9.10 MET SEC Command...................................................................................................................9.7
Table 9.11 MET SYN Command ..................................................................................................................9.7
Table 9.12 SET Command Overview............................................................................................................9.7
Table 9.13 SHO Command Overview...........................................................................................................9.8
Table 9.14 THE Command Overview ...........................................................................................................9.9
Table 10.1 SEL-400G Database Regions ....................................................................................................10.1
Table 10.2 SEL-400G Database Structure—LOCAL Region.....................................................................10.2
Table 10.3 SEL-400G Database Structure—METER Region ....................................................................10.2
Table 10.4 SEL-400G Database Structure—DEMAND Region.................................................................10.4
Table 10.5 SEL-400G Database Structure—TARGET Region ..................................................................10.4
Table 10.6 SEL-400G Database Structure—HISTORY Region.................................................................10.4
Table 10.7 SEL-400G Database Structure—BREAKER Region ...............................................................10.5
Table 10.8 SEL-400G Database Structure—STATUS Region ...................................................................10.6
Table 10.9 SEL-400G Database Structure—ANALOGS Region ...............................................................10.6
Table 10.10 SEL-400G Binary Input Reference Data Map...........................................................................10.8
Table 10.11 SEL-400G Binary Output Reference Data Map........................................................................10.8
Table 10.12 SEL-400G Binary Counter Reference Data Map ......................................................................10.9
Table 10.13 SEL-400G Analog Input Reference Data Map........................................................................10.10
Table 10.14 SEL-400G Analog Output Reference Data Map .....................................................................10.20
Table 10.15 SEL-400G Object 12 Control Point Operations ......................................................................10.20
Table 10.16 Object 30, 32, FTYPE Event Cause ........................................................................................10.22
Table 10.17 SEL-400G DNP3 Default Binary Input Data Map..................................................................10.22
Table 10.18 SEL-400G DNP3 Default Binary Output Data Map ...............................................................10.25
Table 10.19 SEL-400G DNP3 Default Binary Counter Data Map .............................................................10.25
Table 10.20 SEL-400G DNP3 Default Analog Input Map .........................................................................10.26
Table 10.21 SEL-400G DNP3 Default Analog Output Data Map ..............................................................10.28
Table 10.22 Logical Device: PRO (Protection)...........................................................................................10.28
Table 10.23 Logical Device: MET (Metering)............................................................................................10.49
Table 10.24 SEL-400G Specific Logical Device: ANN (Annunciation) ....................................................10.57
Table 10.25 FLTYPE—Fault Type .............................................................................................................10.57
Table 10.26 FLTCAUS—Fault Cause ........................................................................................................10.57
Table 10.27 Voltage Synchrophasor Names ...............................................................................................10.58
Table 10.28 Current Synchrophasor Names ................................................................................................10.58
Table 10.29 SEL-400G MBAP Header Fields ............................................................................................10.60
Table 10.30 SEL-400G Modbus Function Codes........................................................................................10.60
Table 10.31 SEL-400G Modbus Exception Codes......................................................................................10.61
Table 10.32 01h Read Discrete Output Coil Status Command ...................................................................10.61
Table 10.33 Responses to 01h Read Discrete Output Coil Query Errors....................................................10.62
Table 10.34 02h Read Discrete Input Status Command..............................................................................10.62

x List of Tables
Table 10.35 02h SEL-400G Inputs ..............................................................................................................10.63

Table 10.36 Responses to 02h Read Input Query Errors.............................................................................10.63
Table 10.37 03h Read Holding Register Command ....................................................................................10.63
Table 10.38 Responses to 03h Read Holding Register Query Errors..........................................................10.64
Table 10.39 04h Read Input Register Command.........................................................................................10.64
Table 10.40 Responses to 04h Read Input Register Query Errors ..............................................................10.64
Table 10.41 05h Write Single Coil Command ............................................................................................10.64
Table 10.42 01h, 05h, 0Fh SEL-400G Output Coils ...................................................................................10.65
Table 10.43 Responses to 05h Write Single Coil Query Errors ..................................................................10.70
Table 10.44 06h Preset Single Register Command .....................................................................................10.71
Table 10.45 Responses to 06h Preset Single Register Query Errors ...........................................................10.71
Table 10.46 08h Loopback Diagnostic Command ......................................................................................10.71
Table 10.47 Responses to 08h Loopback Diagnostic Query Errors ............................................................10.71
Table 10.48 0Fh Write Multiple Coils Command .......................................................................................10.72
Table 10.49 Responses to 0Fh Write Multiple Coils Query Errors.............................................................10.72
Table 10.50 10h Preset Multiple Registers Command ................................................................................10.72
Table 10.51 10h Preset Multiple Registers Query Errors............................................................................10.73
Table 10.52 Modbus Analog Quantities Table............................................................................................10.74
Table 10.53 Default Modbus Map...............................................................................................................10.91
Table 11.1 Alphabetical List of Relay Word Bits .......................................................................................11.1
Table 11.2 Row List of Relay Word Bits ..................................................................................................11.89
Table 12.1 Analog Quantities Sorted Alphabetically ..................................................................................12.1
Table 12.2 Analog Quantities Sorted by Function ....................................................................................12.10
Table A.1 Firmware Revision History ........................................................................................................A.2
Table A.2 SELBOOT Revision History ........................................................................................................A.3
Table A.3 ICD File Revision History ..........................................................................................................A.4
Table A.4 Instruction Manual Revision History .........................................................................................A.5

SEL-400G Relay
Instruction Manual
List of Figures
Figure 1.1 SEL-400G Generator Protection Relay .......................................................................................1.1
Figure 1.2 Functional Overview ...................................................................................................................1.5

Figure 1.3 Steam Turbine Generator...........................................................................................................1.14
Figure 1.4 Hydro Generator ........................................................................................................................1.15
Figure 1.5 Combustion Gas Turbine...........................................................................................................1.16
Figure 2.1 SEL-400G Front Panel ................................................................................................................2.2
Figure 2.2 Rear Panel With Fixed Terminal Blocks .....................................................................................2.3
Figure 2.3 Rear Panel Connectorized ...........................................................................................................2.4
Figure 2.4 Standard Control Output Connection ..........................................................................................2.6
Figure 2.5 Hybrid Control Output Connection .............................................................................................2.7
Figure 2.6 INT4 High-Speed Control Output Connection (Three Terminals)..............................................2.7
Figure 2.7 High-Speed Control Output Typical Terminals, INT8................................................................2.8
Figure 2.8 Precharging Internal Capacitance of High-Speed Output Contacts, INT8..................................2.8
Figure 2.9 I/O Interface Board INT2 ..........................................................................................................2.10
Figure 2.13 I/O Interface Board INTD .........................................................................................................2.10
Figure 2.14 Jumper Location on the Main Board .........................................................................................2.12
Figure 2.15 Major Component Locations on the SEL-400G Main Board....................................................2.13
Figure 2.16 Top to Bottom: INT2, INT4, INT7, INT8, and INTD With Jumper Locations
Indicated.................................................................................................................................2.16
Figure 2.17 SEL-400G Chassis Dimensions.................................................................................................2.18
Figure 2.18 AC Connections With NGR on the Secondary Side of the Neutral Grounding
Transformer............................................................................................................................2.19
Figure 2.19 AC Connections With NGR Between the Generator Neutral Point and Ground ......................2.19
Figure 2.20 Insulation Resistance and Capacitance Received From SEL-2664S.........................................2.20
Figure 2.21 Communication Connection Between the SEL-400G, SEL-2664S, and SEL-2664 .................2.21
Figure 2.22 Project Editor .............................................................................................................................2.22
Figure 2.23 Project Editor Dataset Selection ................................................................................................2.23
Figure 2.24 Dataset Editor ............................................................................................................................2.23
Figure 2.25 GOOSE Transmit Editor ...........................................................................................................2.24
Figure 2.26 GOOSE Transmit Editor for Dataset.........................................................................................2.25
Figure 2.27 GOOSE Receive Editor for Remote Analogs............................................................................2.25
Figure 2.28 GOOSE Receive Editor for Virtual Bits....................................................................................2.26
Figure 2.29 Sending CID to SEL-400G........................................................................................................2.26
Figure 2.30 Rear-Panel Symbols ..................................................................................................................2.28
Figure 2.31 Screw-Terminal Connector Keying...........................................................................................2.29
Figure 2.32 Rear-Panel Receptacle Keying ..................................................................................................2.30
Figure 2.33 Power Connection Area of the Rear Panel ................................................................................2.31
Figure 2.34 Control Output OUT215 (INT2) ...............................................................................................2.34
Figure 2.35 SEL-400G to Computer DB-9 Connector Diagram ..................................................................2.36
Figure 2.36 Four 100BASE-FX Port Configuration .....................................................................................2.37
Figure 2.37 Four 10/100BASE-T Port Configuration ..................................................................................2.37
Figure 2.38 100BASE-FX and 10/100BASE-T Port Configuration.............................................................2.38
Figure 2.39 Typical AC Connection Diagram ..............................................................................................2.39
Figure 2.40 Typical DC Connection Diagram ..............................................................................................2.40
Figure 3.1 Low-Level Test Interface J12......................................................................................................3.2
Figure 3.2 Low-Level Test Interface J6........................................................................................................3.2
Figure 3.3 Test Connections for Balanced Load With Three-Phase Current Sources..................................3.4
Figure 3.4 Voltage Test Connections............................................................................................................3.4

xii List of Figures
Figure 3.5 User-Defined V/Hz Curve 1 ........................................................................................................3.5

Figure 3.6 Group Settings for the V/Hz Test ................................................................................................3.7
Figure 3.7 Logic Settings for the V/Hz Test .................................................................................................3.8
Figure 3.8 Front-Panel Settings for the V/Hz Test .......................................................................................3.9
Figure 3.9 SER Settings for the V/Hz Test ...................................................................................................3.9
Figure 3.10 Element Assert and Operate Times (105%) ..............................................................................3.10
Figure 3.11 Element Assert and Operate Times (107%) ..............................................................................3.11
Figure 3.12 Group 1 SET Command ............................................................................................................3.12
Figure 3.13 Voltage/Current Relationship for 32BIA = 0 ............................................................................3.14
Figure 3.14 Voltage/Current Relationship for 32BIA = 1 ............................................................................3.15
Figure 3.15 Example Generator Capability Curve........................................................................................3.17
Figure 3.16 Group 1 Setting Command ........................................................................................................3.18
Figure 3.17 46 Element Testing Group Settings...........................................................................................3.24
Figure 3.18 64G2 Settings ............................................................................................................................3.29
Figure 3.19 64G3 Settings ............................................................................................................................3.33
Figure 3.20 Differential Element Comparator ..............................................................................................3.35
Figure 3.21 Differential Element Characteristic ...........................................................................................3.35
Figure 3.22 Group Settings for the Differential Test ....................................................................................3.36
Figure 3.23 Values for Case 1.......................................................................................................................3.39
Figure 3.24 Values for Case 2.......................................................................................................................3.40
Figure 3.25 Enable Overcurrent Element for Terminal T.............................................................................3.42
Figure 3.26 Enter Overcurrent Element in the SER......................................................................................3.44
Figure 3.27 Autosynchronizer Commissioning Example .............................................................................3.44
Figure 3.28 PULSE OUT201 Event Report..................................................................................................3.47
Figure 3.32 Close Test ..................................................................................................................................3.52
Figure 4.1 Sample ROTATING DISPLAY ..................................................................................................4.3
Figure 4.2 METER Menus............................................................................................................................4.4
Figure 4.3 RMS Metering Screens................................................................................................................4.5
Figure 4.4 Fundamental Metering Screens ...................................................................................................4.7
Figure 4.5 Fundamental Terminal Y Single-Phase Screen ...........................................................................4.8
Figure 4.6 Fundamental Terminal V Single-Phase Screen ...........................................................................4.8
Figure 4.7 Demand Meter Screens................................................................................................................4.9
Figure 4.8 Energy Meter Screens..................................................................................................................4.9
Figure 4.9 Min/Max Meter Screens ............................................................................................................4.10
Figure 4.10 Synchronous Check Meter Screens ...........................................................................................4.11
Figure 4.11 Differential Meter Screen ..........................................................................................................4.11
Figure 4.12 Stator Ground Meter Screen ......................................................................................................4.11
Figure 4.13 Insulation R/C Meter Screen .....................................................................................................4.12
Figure 4.14 EVENT SUMMARY Screen.....................................................................................................4.12
Figure 4.15 BREAKER MONITOR Report Screens....................................................................................4.13
Figure 4.16 VIEW CONFIGURATION Sample Screens.............................................................................4.14
Figure 4.17 Factory-Default Front-Panel Target LEDs ................................................................................4.15
Figure 4.18 Operator Control Pushbuttons and LEDs ..................................................................................4.17
Figure 4.19 Bay Control Screen Selected for Rotating Display ...................................................................4.18
Figure 4.20 Configuring PB1_HMI for Direct Bay Control Access ............................................................4.19
Figure 4.21 Screen 1 .....................................................................................................................................4.19
Figure 4.22 Screen 2 .....................................................................................................................................4.20
Figure 5.1 SEL-400G Voltage Connections and Naming Convention .........................................................5.3
Figure 5.2 Connection of a Three-Phase Voltage for PTCONk = Y ............................................................5.3
Figure 5.3 Connection of a Three-Phase Voltage for PTCONk = D or PTCONk = D1 ...............................5.4
Figure 5.4 Connection of a Neutral or Single-Phase Voltage for PTCONk = D ..........................................5.4
Figure 5.5 Connection of an Open-Corner Delta Voltage for PTCONk = D1..............................................5.4

List of Figures xiii
Figure 5.6 Connection Using One Three-Phase Voltage, Two Single-Phase and the Generator
Neutral Voltage for PTCONZ = Y and PTCONV = 1PH .......................................................5.5
Figure 5.7 Third-Harmonic Comparison and Voltage-Balance LOP Example ............................................5.7
Figure 5.8 Synchronism Check and Voltage-Based LOP.............................................................................5.8
Figure 5.9 IPB Ground Fault Protection and Synchronism Check ...............................................................5.8
Figure 5.10 Generator Differential and Overall Differential ........................................................................5.10
Figure 5.11 Generator and Transformer Differential....................................................................................5.11
Figure 5.12 Transverse Differential and Overall Differential.......................................................................5.11
Figure 5.13 Undervoltage Supervision Logic ...............................................................................................5.13
Figure 5.14 Pumped Storage Example..........................................................................................................5.18
Figure 5.15 40P Element Behavior During Pumped Storage Operation ......................................................5.18
Figure 5.16 Tap and Connection Compensation...........................................................................................5.20
Figure 5.17 Adaptive Differential Elements .................................................................................................5.21
Figure 5.18 AC External Fault Detector .......................................................................................................5.22
Figure 5.19 DC External Fault Detector .......................................................................................................5.22
Figure 5.20 External Fault Detector Combined Logic..................................................................................5.22
Figure 5.21 Internal Fault Detector Logic ....................................................................................................5.23
Figure 5.22 Insignificant Restraint Detection ...............................................................................................5.23
Figure 5.23 RMS Differential Logic.............................................................................................................5.24
Figure 5.24 Unrestrained Differential Logic.................................................................................................5.24
Figure 5.25 Overall Logic With No In-Zone Transformer ...........................................................................5.25
Figure 5.26 Harmonic Blocking and Restraint .............................................................................................5.26
Figure 5.27 Dwell-Time Intervals in the Inrush Currents.............................................................................5.27
Figure 5.28 Sufficient Operate Current Check .............................................................................................5.27
Figure 5.29 Waveshape Dwell-Time Inrush Detection Logic for Three-Legged, Three-Phase
Transformers ..........................................................................................................................5.27
Figure 5.30 Waveshape Dwell-Time Inrush Detection Logic for A-Phase ..................................................5.28
Figure 5.31 Waveshape Blocking Logic.......................................................................................................5.29
Figure 5.32 Differential Currents for an Internal Fault During Inrush Conditions.......................................5.29
Figure 5.33 Fault Current During Energization (Black) Compared With Positive (Red) and
Negative (Blue) Thresholds ...................................................................................................5.30
Figure 5.34 A-Phase Bipolar Low-Set Signature Detection Logic...............................................................5.30
Figure 5.35 A-Phase Bipolar Low-Set Logic................................................................................................5.31
Figure 5.36 A-Phase Unblocking Logic .......................................................................................................5.31
Figure 5.37 A-Phase Bipolar High-Set Signature Detection Logic ..............................................................5.32
Figure 5.38 A-Phase Bipolar High-Set Logic ...............................................................................................5.32
Figure 5.39 CT Unsaturated Logic ...............................................................................................................5.33
Figure 5.40 Overall Logic For an In-Zone Transformer...............................................................................5.34
Figure 5.41 87SLP2n Setting as a Function of CT Sizing Factor.................................................................5.35
Figure 5.42 Example System for CT Selection.............................................................................................5.36
Figure 5.43 Transverse Differential Protection of Parallel-Branch Stator Windings ...................................5.45
Figure 5.44 Differential Operations ..............................................................................................................5.48
Figure 5.45 Negative-Sequence Percentage-Restrained Differential Element .............................................5.49
Figure 5.46 Negative-Sequence Differential-Element Blocking Logic........................................................5.49
Figure 5.47 REF Directional Element...........................................................................................................5.51
Figure 5.48 REF Terminals...........................................................................................................................5.51
Figure 5.49 Reference Current Configuration Examples..............................................................................5.52
Figure 5.50 REF 1 Element Enable Logic ....................................................................................................5.52
Figure 5.51 Algorithm That Performs the Directional Calculations.............................................................5.53
Figure 5.52 REF Element Trip Output..........................................................................................................5.54
Figure 5.53 Internal Fault With LV Breaker Open .......................................................................................5.54
Figure 5.54 Programmable 51 REF Element ................................................................................................5.55
Figure 5.55 REF Neutral Element.................................................................................................................5.55
Figure 5.56 Low-Impedance-Grounded Generator With a Three-Phase Reference CT...............................5.57
Figure 5.57 Low-Impedance-Grounded Generator With a Core-Balance Reference CT.............................5.58
Figure 5.58 Single-Wye Winding Transformer REF....................................................................................5.58

xiv List of Figures
Figure 5.59 Autotransformer REF With Two-HV CTs ................................................................................5.58

Figure 5.60 Ground Fault Simulation for a Low-Impedance-Grounded (400 A) Generator........................5.59
Figure 5.61 Low-Impedance-Grounded Generator Example........................................................................5.59
Figure 5.62 One Hundred Percent Stator Ground Element...........................................................................5.61
Figure 5.63 64G1 Element Logic..................................................................................................................5.61
Figure 5.64 Example System for Setting of the 64G Element......................................................................5.62
Figure 5.65 Third-Harmonic Voltage Distribution (PTCONZ = Y).............................................................5.63
Figure 5.66 Third-Harmonic Voltage Distribution (PTCONZ = D1)...........................................................5.63
Figure 5.67 Third-Harmonic Angle Check ...................................................................................................5.64
Figure 5.68 Typical Third-Harmonic Voltage Distribution in a Generator ..................................................5.64
Figure 5.69 Typical Coverage Provided by the 64G1, 64G2 (Differential Mode), and 64G3
Elements.................................................................................................................................5.65
Figure 5.70 Using Breaker Position to Switch to Alternate Settings............................................................5.65
Figure 5.71 64G2 Third-Harmonic Voltage Differential Logic....................................................................5.66
Figure 5.72 Example of 64G2 Undervoltage Setting From Survey Data .....................................................5.67
Figure 5.73 64G2 Third-Harmonic Undervoltage Logic ..............................................................................5.68
Figure 5.74 64G2 Output Logic ....................................................................................................................5.68
Figure 5.75 Third-Harmonic Components During a Ground Fault ..............................................................5.69
Figure 5.76 64G3 Third-Harmonic Ratio Logic ...........................................................................................5.70
Figure 5.77 64G Integrating Timer ...............................................................................................................5.72
Figure 5.78 64G Output Logic ......................................................................................................................5.72
Figure 5.79 Impact of VT Connections on 64G Security .............................................................................5.74
Figure 5.80 Coordination of the 64G1 With a 15 A KTK-R VT Secondary Fuse .......................................5.75
Figure 5.81 Ground Fault Sequence Networks .............................................................................................5.75
Figure 5.82 Directional Power Elements Operation in the Real/Reactive Power Plane...............................5.77
Figure 5.83 Example of Primary Power Flow and the Corresponding Relay Measurements ......................5.78
Figure 5.84 Directional Power Elements Logic............................................................................................5.78
Figure 5.85 Dependability-Biased Characteristic .........................................................................................5.79
Figure 5.86 Capability-Based LOF (40P) Characteristics ............................................................................5.81
Figure 5.87 40P Zone 1 Characteristic and Associated Settings ..................................................................5.82
Figure 5.88 40P Zone 1 Logic ......................................................................................................................5.83
Figure 5.89 40P Zone 2 Characteristic and Associated Settings ..................................................................5.84
Figure 5.91 40P Zone 3 Characteristic..........................................................................................................5.85
Figure 5.92 40P Zone 3 Examples for Strong and Weak Power Systems ....................................................5.86
Figure 5.94 40P Acceleration Logic .............................................................................................................5.87
Figure 5.95 40P Zone 4 Characteristic and Associated Setting ....................................................................5.88
Figure 5.96 Capability Curve Alarm (Zone 4) Logic ...................................................................................5.88
Figure 5.97 40P Zone 2 Dynamic Cooling Functionality .............................................................................5.90
Figure 5.98 40P Zone 2 Dynamic Voltage Functionality .............................................................................5.91
Figure 5.99 40P Zone 4 Dynamic Cooling Functionality .............................................................................5.92
Figure 5.100 Example System ........................................................................................................................5.93
Figure 5.101 40P Zone 2 Characteristic With Example Settings ...................................................................5.94
Figure 5.102 LOF Operating Characteristic Using (A) a Negative or (B) a Positive Zone 2 Offset..............5.98
Figure 5.103 Impedance LOF Logic...............................................................................................................5.98
Figure 5.104 Frequency of the Induced Rotor Component Because of a Stator Harmonic..........................5.102
Figure 5.105 Current Unbalance Level 1 Logic for Element n (Definite Time) ..........................................5.102
Figure 5.106 Current Unbalance Level 2 I22t Operating Characteristic.......................................................5.103
Figure 5.107 Current Unbalance Logic for Element n, Level 2....................................................................5.103
Figure 5.108 Volts per Hertz Element n, Level 1 Logic...............................................................................5.105
Figure 5.109 Volts per Hertz Element n, Level 2 Characteristic ..................................................................5.106
Figure 5.110 Volts per Hertz Element n, Level 2 Definite-Time Logic .......................................................5.106
Figure 5.111 Volts per Hz, Element n Level 2, User-Defined Curve Logic.................................................5.107
Figure 5.112 Two-Step Characteristic ..........................................................................................................5.109
Figure 5.113 Manufacturer V/Hz Curve .......................................................................................................5.110

List of Figures xv
Figure 5.114 Three-Point Curve ...................................................................................................................5.111

Figure 5.115 Ten-Point Curve ......................................................................................................................5.111
Figure 5.116 Equivalent Circuit for a Single-Turn Fault in a Machine ........................................................5.112
Figure 5.117 Split-Phase Current Variation Over Time ...............................................................................5.114
Figure 5.118 Split-Phase Protection Functions.............................................................................................5.114
Figure 5.119 60P and 60N Operating Signal Selection ................................................................................5.114
Figure 5.120 60P and 60N High Set Levels..................................................................................................5.115
Figure 5.121 60P and 60N Low Set Levels ..................................................................................................5.116
Figure 5.122 Output Logic............................................................................................................................5.116
Figure 5.123 Backup Distance Element........................................................................................................5.120
Figure 5.124 Backup Distance, Zone n Logic (AB Loop Shown)................................................................5.121
Figure 5.125 51C Controlled, Overcurrent Element (A Loop Shown).........................................................5.122
Figure 5.126 51VP Setting Reduction ..........................................................................................................5.124
Figure 5.127 Voltage-Restrained, Phase Overcurrent Element (AB Loop Shown) .....................................5.125
Figure 5.128 Load Encroachment Characteristics ........................................................................................5.126
Figure 5.129 Load Encroachment Logic.......................................................................................................5.127
Figure 5.130 Current and Accumulated Thermal Level (THRL) Versus Time For TCONH = 1,
TCONC = 5, IEQPU = 0.1, KCONS = 1, and FAMB = 0.857............................................5.130
Figure 5.131 Thermal Element Logic ...........................................................................................................5.130
Figure 5.132 Ambient Compensation Logic.................................................................................................5.131
Figure 5.133 THE Report..............................................................................................................................5.134
Figure 5.134 Simplified Timing Characteristic for TCONH = 5, THLT = 105%, KCONS = 1,
and TAMB = 25 ...................................................................................................................5.135
Figure 5.135 RTD Element Logic.................................................................................................................5.136
Figure 5.136 RTD Voting Logic...................................................................................................................5.137
Figure 5.137 Out-of-Step Characteristics .....................................................................................................5.138
Figure 5.138 Single-Blinder Logic ...............................................................................................................5.138
Figure 5.139 Double-Blinder Scheme Characteristic ...................................................................................5.139
Figure 5.140 Double-Blinder Logic..............................................................................................................5.140
Figure 5.141 Slip Counter Zone....................................................................................................................5.141
Figure 5.142 Pole Slip Counter Logic ..........................................................................................................5.141
Figure 5.143 Typical Single-Blinder Settings...............................................................................................5.144
Figure 5.144 INAD Scheme Logic ...............................................................................................................5.145
Figure 5.145 Field Ground Scheme Logic, Level n......................................................................................5.147
Figure 5.146 Generator Voltage Selection....................................................................................................5.148
Figure 5.147 System Voltage Selection ........................................................................................................5.148
Figure 5.148 Generator and System Voltage Magnitude Checks ................................................................5.149
Figure 5.149 Voltage Difference Check .......................................................................................................5.150
Figure 5.150 Voltage Acceptance Window ..................................................................................................5.150
Figure 5.151 Combined Voltage Check Logic .............................................................................................5.150
Figure 5.152 Angle Difference and Slip Calculation....................................................................................5.151
Figure 5.153 Zero-Slip and Slip-Within-Limits Checks...............................................................................5.152
Figure 5.154 Slip Acceptance Window ........................................................................................................5.152
Figure 5.155 Uncompensated Synchronism-Check Logic ...........................................................................5.153
Figure 5.156 Uncompensated Angle Acceptance Window ..........................................................................5.153
Figure 5.157 Compensated and Uncompensated Phasor Relationships .......................................................5.154
Figure 5.158 Compensated Synchronism-Check Logic ...............................................................................5.154
Figure 5.159 Compensated Angle Acceptance Window ..............................................................................5.155
Figure 5.160 Breaker Closed Indication for Breaker Failure........................................................................5.155
Figure 5.161 Close Fail Angle Alarm ...........................................................................................................5.155
Figure 5.162 Synchronizing Voltage Selection Example 1 ..........................................................................5.158
Figure 5.163 Synchronizing Voltage Selection Example 2 ..........................................................................5.159
Figure 5.164 Pulse Control Types.................................................................................................................5.161
Figure 5.165 Start/Cancel Logic ...................................................................................................................5.161
Figure 5.166 Breaker n Voltage Control Logic ............................................................................................5.162
Figure 5.167 Breaker n Frequency Control Logic ........................................................................................5.163

xvi List of Figures
Figure 5.168 Pulse Counter Logic ................................................................................................................5.163

Figure 5.169 Phase Check Logic ..................................................................................................................5.164
Figure 5.170 Frequency Control Characteristic for Slope = 5 and Win= 0.067 ...........................................5.165
Figure 5.171 Voltage Control Characteristic for Slope = 1 and Win = 5 .....................................................5.166
Figure 5.172 Close Test ................................................................................................................................5.167
Figure 5.173 Step Response Test ..................................................................................................................5.169
Figure 5.174 Breaker S External Circuit Wiring Example ...........................................................................5.169
Figure 5.175 Current Disturbance Detector ..................................................................................................5.170
Figure 5.176 Positive-Sequence Voltage Change Detector ..........................................................................5.171
Figure 5.177 Incremental Voltage-Current Detection Logic ........................................................................5.171
Figure 5.178 Three-Phase Undervoltage Logic ............................................................................................5.171
Figure 5.179 Using Third-Harmonic Neutral Voltage to Indicate That the Field Is Energized ...................5.172
Figure 5.180 Negative-Sequence Logic........................................................................................................5.172
Figure 5.181 Voltage-Balance Logic ............................................................................................................5.173
Figure 5.182 Voltage-Current LOP Settings.................................................................................................5.173
Figure 5.183 VT on the System-Side of Generator Breaker.........................................................................5.174
Figure 5.184 A-Phase Open-Phase Detection Logic.....................................................................................5.175
Figure 5.185 Breaker Failure Logic for Breaker n When BF_SCHM = Y...................................................5.176
Figure 5.186 Breaker Failure Logic for Breaker n when BF_SCHM = Y1..................................................5.177
Figure 5.187 Alternate Breaker Failure Logic for Terminal k ......................................................................5.180
Figure 5.188 Current Redistribution in a Dual-Breaker Configuration ........................................................5.180
Figure 5.189 Breaker Flashover Logic .........................................................................................................5.184
Figure 5.190 Frequency Element Logic........................................................................................................5.186
Figure 5.191 Accumulated Frequency Element Logic .................................................................................5.188
Figure 5.192 Example Turbine Operating Limitations During Abnormal Frequency With 81A
Settings.................................................................................................................................5.190
Figure 5.193 81A Command Report.............................................................................................................5.190
Figure 5.194 ROCOF Element Logic ...........................................................................................................5.191
Figure 5.195 AC Connections With NGR on the Secondary Side of the Neutral Grounding
Transformer..........................................................................................................................5.193
Figure 5.196 AC Connections With NGR Between the Generator Neutral Point and Ground ....................5.193
Figure 5.197 Stator Ground Scheme Logic, Level n ....................................................................................5.194
Figure 5.198 Over-/Undervoltage Inverse-Time Characteristic ...................................................................5.195
Figure 5.199 Element n, Level x, Definite-Time Overvoltage (59PnCx = D) ..............................................5.196
Figure 5.200 Element n, Level x, Inverse-Time Overvoltage (59PnCx = I).................................................5.196
Figure 5.201 Element n, Level x, Definite-Time Undervoltage (27PnCx = D) ............................................5.196
Figure 5.202 Element n, Level x, Inverse-Time Undervoltage (27PnCx = I)...............................................5.196
Figure 5.203 Phase Instantaneous Overcurrent Element ..............................................................................5.199
Figure 5.204 Negative-Sequence Instantaneous Overcurrent Element.........................................................5.200
Figure 5.205 Zero-Sequence Instantaneous Overcurrent Element ...............................................................5.201
Figure 5.206 Three Settings Possibilities......................................................................................................5.202
Figure 5.207 ESYSCT Setting, Overcurrent, and Directional Enables ........................................................5.203
Figure 5.208 Frequency Tracking Configuration .........................................................................................5.203
Figure 5.209 Overcurrent Settings ................................................................................................................5.204
Figure 5.210 Overcurrent Configuration for Terminal T..............................................................................5.204
Figure 5.211 Disable Definite-Time Overcurrent Elements .........................................................................5.204
Figure 5.212 Terminal T Directional 51 Element Settings ...........................................................................5.205
Figure 5.213 Overcurrent Configuration for Terminal U .............................................................................5.205
Figure 5.214 U.S. Curves: U1, U2, U3, and U4 ...........................................................................................5.209
Figure 5.215 U.S. Curve U5 and IEC Curves C1, C2, and C3 .....................................................................5.210
Figure 5.216 IEC Curves C4 and C5 ............................................................................................................5.211
Figure 5.217 Time-Overcurrent Element......................................................................................................5.211
Figure 5.218 Zero-Sequence Directional Enable Logic................................................................................5.214
Figure 5.219 Zero-Sequence Directional Element Characteristic.................................................................5.215
Figure 5.220 Zero-Sequence Directional Logic............................................................................................5.216
Figure 5.221 Negative-Sequence Directional Enable Logic.........................................................................5.216

List of Figures xvii
Figure 5.222 Negative-Sequence Directional Logic.....................................................................................5.217

Figure 5.223 Phase Directional Enable Logic ..............................................................................................5.218
Figure 5.224 Phase Directional Declaration Logic .......................................................................................5.218
Figure 5.225 SEL-400G Trip Logic..............................................................................................................5.220
Figure 5.226 Close Logic for Breaker m.......................................................................................................5.222
Figure 6.1 Example System Three-Line Diagram ........................................................................................6.2
Figure 6.2 Potential Transformer ..................................................................................................................6.3
Figure 6.3 Current Transformer ....................................................................................................................6.4
Figure 6.4 Relay Configuration ....................................................................................................................6.5
Figure 6.5 Power System Data......................................................................................................................6.6
Figure 6.6 V/Hz Element 1 ...........................................................................................................................6.6
Figure 6.7 Volts per Hertz Element 2 ...........................................................................................................6.6
Figure 6.8 Synchronism Check SYNCP .......................................................................................................6.7
Figure 6.9 Synchronism Check Phase-to-Phase Voltage..............................................................................6.7
Figure 6.10 Directional Power ........................................................................................................................6.7
Figure 6.11 Zone 1 Differential ......................................................................................................................6.8
Figure 6.12 Example System Partial Three-Line Diagram.............................................................................6.9
Figure 6.13 Zone 2 Differential ......................................................................................................................6.9
Figure 6.14 Restricted Earth Fault ................................................................................................................6.10
Figure 7.1 Fundamental Quantities Report for Terminal G ...............................................................................7.5
Figure 7.2 Complex Power (P/Q) Plane........................................................................................................7.6
Figure 7.3 RMS Report for Terminal G........................................................................................................7.7
Figure 7.4 MET SEC Report.........................................................................................................................7.8
Figure 7.5 Demand Report With Four Elements Enabled ............................................................................7.9
Figure 7.6 Differential-Element Zone 1 Report..........................................................................................7.10
Figure 7.7 Differential-Element Zone 2 Report..........................................................................................7.10
Figure 7.8 Differential Element Reports Including Individual Terminal Compensated Currents in
Differential Zone 1.................................................................................................................7.10
Figure 7.9 Expanded Differential-Element Report .....................................................................................7.11
Figure 7.10 Energy Meter Reports for Terminals G and S ...........................................................................7.12
Figure 7.11 Harmonic Meter Report.............................................................................................................7.13
Figure 7.12 Generator Harmonic Report ......................................................................................................7.14
Figure 7.13 Synchrophasor Report ...............................................................................................................7.14
Figure 7.14 MET RTD Report ......................................................................................................................7.16
Figure 7.15 MET SYN Report ......................................................................................................................7.17
Figure 7.16 Min/Max Meter Report..............................................................................................................7.18
Figure 7.17 Breaker Status and Alarm Logic ...............................................................................................7.19
Figure 7.18 Compressed ASCII Data Display ..............................................................................................7.20
Figure 7.19 Profile Data in Excel Spreadsheet .............................................................................................7.20
Figure 7.20 Profile Data Reset ......................................................................................................................7.20
Figure 7.21 Connection of SEL-2600 RTD Modules to the SEL-400G.......................................................7.21
Figure 7.22 SEL-2600 RTD Monitoring Logic ............................................................................................7.21
Figure 7.23 Connection of RTDs to the SEL-400G......................................................................................7.23
Figure 7.24 Remote Analog RTD Monitoring Logic ...................................................................................7.23
Figure 7.25 Ambient Probe ...........................................................................................................................7.24
Figure 7.26 COMTRADE .CFG File Data for High-Resolution Data .........................................................7.26
Figure 7.27 COMTRADE .CFG File Data for Filtered 2.5 ms Resolution Data..........................................7.27
Figure 7.28 COMTRADE .CFG File Data for Filtered 20 ms Resolution Data...........................................7.28
Figure 7.29 Sample Event Summary Report ................................................................................................7.29
Figure 10.1 MAP 1:METER Command Example ........................................................................................10.7
Figure 10.2 Modbus Event Summary Labels Example ..............................................................................10.93
Figure 10.3 History Command Example ....................................................................................................10.94

Instruction Manual
Preface
This manual provides information and instructions for installing and operating
the relay. The manual is for use by power engineers and others experienced in
protective relaying applications. Included are detailed technical descriptions of
the relay and application examples. While this manual gives reasonable examples
and illustrations of relay uses, you must exercise sound judgment at all times
when applying the relay in a power system.
Manual Overview
The SEL-400G Instruction Manual consists of two volumes:
➤ SEL-400G Instruction Manual
➤ SEL-400 Series Relays Instruction Manual
SEL-400G Instruction Manual

Preface. Describes manual organization and conventions used to present
information, as well as safety information.
Section 1: Introduction and Specifications. Introduces the relay features. Sum-
marizes relay functions and applications. Lists relay specifications, type
tests, and ratings.
Section 2: Installation. Discusses the ordering configurations and interface
features (control inputs, control outputs, and analog inputs, for example).
Provides information about how to design a new physical installation and
secure the relay in a panel or rack. Details how to set relay board jumpers
and make proper rear-panel connections (including wiring to CTs, PTs,
and a GPS receiver). Explains basic connections for the relay communi-
cations ports.
Section 3: Testing. Describes techniques for testing the relay.
Section 4: Front-Panel Operations. Describes the LCD display messages and
menu screens that are unique to the SEL-400G.
Section 5: Protection Functions. Describes the function of various relay pro-
tection elements. Describes how the relay processes these elements. Gives
detailed specifics on protection scheme logic for the differential elements.
Provides trip logic diagrams, and current and voltage source selection
details.
Section 6: Protection Application Examples. Provides an example of configur-
ing the SEL-400G for a common application.
Section 7: Metering, Monitoring, and Reporting. Describes SEL-400G specific
metering, monitoring, and reporting features.
Section 8: Settings. Provides a list of all relay settings and defaults. The set-
tings list is organized in the same order as in the relay and in the SEL Grid
Configurator Software.
Section 9: ASCII Command Reference. Provides an alphabetical listing of all
ASCII commands with examples for each ASCII command option.

xx Preface
Manual Overview
Section 10: Communications Interfaces. Describes the SEL-400G specific

communications characteristics.
Section 11: Relay Word Bits. Contains a summary of Relay Word bits.
Section 12: Analog Quantities. Contains a summary of analog quantities.
Appendix A: Firmware, ICD File, and Manual Versions. Lists the current firmware
and manual versions and details differences between the current and pre-
vious versions.
SEL-400 Series Relays Instruction Manual

Preface. Describes manual organization and conventions used to present
information, as well as safety information.
Section 1: Introduction. Introduces SEL-400 Series Relay common features.
Section 2: PC Software. Explains how to use SEL Grid Configurator and
ACSELERATOR QuickSet SEL-5030 Software.
Section 3: Basic Relay Operations. Describes how to perform fundamental
operations such as applying power and communicating with the relay, set-
ting and viewing passwords, checking relay status, viewing metering
data, reading event reports and Sequential Events Recorder (SER)
records, operating relay control outputs and control inputs, and using
relay features to make relay commissioning easier.
Section 4: Front-Panel Operations. Describes the LCD display messages and
menu screens. Shows you how to use front-panel pushbuttons and read
targets. Provides information about local substation control and how to
make relay settings via the front panel.
Section 5: Control. Describes various control features of the relay, including
circuit breaker operation, disconnect operation, remote bits, and one-line
diagrams.
Section 6: Autoreclosing. Explains how to operate the two-circuit breaker
multishot recloser. Describes how to set the relay for single-pole reclos-
ing, three-pole reclosing, or both. Shows selection of the lead and follow
circuit breakers.
Section 7: Metering. Provides information on viewing current, voltage, power,
and energy quantities. Describes how to view other common internal
operating quantities.
Section 8: Monitoring. Describes how to use the circuit breaker monitors and
the substation dc battery monitors.
Section 9: Reporting. Explains how to obtain and interpret high-resolution raw
data oscillograms, filtered event reports, event summaries, history reports,
and SER reports. Discusses how to enter SER trigger settings.
Section 10: Testing, Troubleshooting, and Maintenance. Describes techniques for
testing, troubleshooting, and maintaining the relay. Includes the list of
status notification messages and a troubleshooting chart.
Section 11: Time and Date Management. Explains timekeeping principles, syn-
chronized phasor measurements, and estimation of power system states
using the high-accuracy time-stamping capability. Presents real-time load
flow/power flow application ideas.

Preface xxi
Manual Overview
Section 12: Settings. Provides a list of all common SEL-400 Series Relay set-
tings and defaults.
Section 13: SELOGIC Control Equation Programming. Describes multiple setting
groups and SELOGIC control equations and how to apply these equations.
Discusses expanded SELOGIC control equation features such as PLC-
style commands, math functions, counters, and conditioning timers. Pro-
vides a tutorial for converting older format SELOGIC control equations to
new freeform equations.
Section 14: ASCII Command Reference. Provides an alphabetical listing of all
ASCII commands with examples for each ASCII command option.
Section 15: Communications Interfaces. Explains the physical connection of
the relay to various communications network topologies. Describes the
various software protocols and how to apply these protocols to substation
integration and automation. Includes details about Ethernet IP protocols,
SEL ASCII, SEL Compressed ASCII, SEL Fast Meter, SEL Fast Operate,
SEL Fast SER, and enhanced MIRRORED BITS communications.
Section 16: DNP3 Communication. Describes the DNP3 communications proto-
col and how to apply this protocol to substation integration and automa-
tion. Provides a Job Done example for implementing DNP3 in a
substation.
Section 17: IEC 61850 Communication. Describes the IEC 61850 protocol and
how to apply this protocol to substation automation and integration.
Includes IEC 61850 protocol compliance statements.
Section 18: Synchrophasors. Describes the Phasor Measurement Unit (PMU)
functions of the relay. Provides details on synchrophasor measurement
and real-time control. Describes the IEEE C37.118 Synchrophasor Proto-
col settings. Describes the SEL Fast Message Synchrophasor Protocol
settings.
Section 19: Digital Secondary Systems. Describes the basic concepts of digital
secondary systems (DSS). This includes both the Time-Domain Link
(TiDL) system and UCA 61850-9-2LE Sampled Values.
Appendix A: Manual Versions. Lists the current manual version and details dif-
ferences between the current and previous versions.
Appendix B: Firmware Upgrade Instructions. Describes the procedure to update
the firmware stored in Flash memory.
Appendix C: Cybersecurity Features. Describes the various features of the relay
that impact cybersecurity.
Glossary. Defines various technical terms used in the SEL-400 series instruc-
tion manuals.

xxii Preface
Safety Information
Safety Information
Dangers, Warnings, and Cautions
This manual uses three kinds of hazard statements, defined as follows:
DANGER
Indicates an imminently hazardous situation that, if not avoided,
will result in death or serious injury.
WARNING
Indicates a potentially hazardous situation that, if not avoided,
could result in death or serious injury.
CAUTION
Indicates a potentially hazardous situation that, if not avoided,
may result in minor or moderate injury or equipment damage.
Safety Symbols
The following symbols are often marked on SEL products.
CAUTION ATTENTION
Refer to accompanying documents. Se reporter à la documentation.
Earth (ground) Terre
Protective earth (ground) Terre de protection
Direct current Courant continu
Alternating current Courant alternatif
Both direct and alternating current Courant continu et alternatif
Instruction manual Manuel d’instructions

Preface xxiii
Safety Information
Safety Marks
The following statements apply to this device.
General Safety Marks
CAUTION ATTENTION
There is danger of explosion if the battery is incorrectly replaced. Replace only with Rayovac Une pile remplacée incorrectement pose des risques d’explosion. Rem-placez seulement
no. BR2335 or equivalent recommended by manufacturer. See Owner’s Manual for safety avec un Rayovac no BR2335 ou un produit équivalent recommandé par le fabricant. Voir le
instructions. The battery used in this device may present a fire or chemical burn hazard if guide d’utilisateur pour les instructions de sécurité. La pile utilisée dans cet appareil peut
mistreated. Do not recharge, disassemble, heat above 100°C or incinerate. Dispose of used présenter un risque d’incendie ou de brûlure chimique si vous en faites mauvais usage. Ne
batteries according to the manufacturer’s instructions. Keep battery out of reach of chil- pas recharger, démonter, chauffer à plus de 100°C ou incinérer. Éliminez les vieilles piles sui-
dren. vant les instructions du fabricant. Gardez la pile hors de la portée des enfants.
CAUTION ATTENTION
To ensure proper safety and operation, the equipment ratings, installation instructions, and Pour assurer la sécurité et le bon fonctionnement, il faut vérifier les classements d’équipe-
operating instructions must be checked before commissioning or maintenance of the equipment ainsi que les instructions d’installation et d’opération avant la mise en service ou
ment. The integrity of any protective conductor connection must be checked before carry- l’entretien de l’équipement. Il faut vérifier l’intégrité de toute connexion de conducteur de
ing out any other actions. It is the responsibility of the user to ensure that the equipment is protection avant de réaliser d’autres actions. L’utilisateur est responsable d’assurer l’instal-
installed, operated, and used for its intended function in the manner specified in this man- lation, l’opération et l’utilisation de l’équipement pour la fonction prévue et de la manière
ual. If misused, any safety protection provided by the equipment may be impaired. indiquée dans ce manuel. Une mauvaise utilisation pourrait diminuer toute protection de
sécurité fournie par l'équipement.
For use in Pollution Degree 2 environment. Pour l'utilisation dans un environnement de Degré de Pollution 2.
Other Safety Marks (Sheet 1 of 2)
DANGER DANGER
Disconnect or de-energize all external connections before opening this device. Contact with Débrancher tous les raccordements externes avant d’ouvrir cet appareil. Tout contact avec
hazardous voltages and currents inside this device can cause electrical shock resulting in des tensions ou courants internes à l’appareil peut causer un choc électrique pouvant
injury or death. entraîner des blessures ou la mort.
DANGER DANGER
Contact with instrument terminals can cause electrical shock that can result in injury or Tout contact avec les bornes de l’appareil peut causer un choc électrique pouvant entraîner
death. des blessures ou la mort.
WARNING AVERTISSEMENT
Use of this equipment in a manner other than specified in this manual can impair operator L’utilisation de cet appareil suivant des procédures différentes de celles indiquées dans ce
safety safeguards provided by this equipment. manuel peut désarmer les dispositifs de protection d’opérateur normalement actifs sur cet
équipement.
Have only qualified personnel service this equipment. If you are not qualified to service this Seules des personnes qualifiées peuvent travailler sur cet appareil. Si vous n’êtes pas quali-
equipment, you can injure yourself or others, or cause equipment damage. fiés pour ce travail, vous pourriez vous blesser avec d’autres personnes ou endommager
l’équipement.
This device is shipped with default passwords. Default passwords should be changed to pri- Cet appareil est expédié avec des mots de passe par défaut. A l’installation, les mots de
vate passwords at installation. Failure to change each default password to a private pass- passe par défaut devront être changés pour des mots de passe confidentiels. Dans le cas
word may allow unauthorized access. SEL shall not be responsible for any damage resulting contraire, un accés non-autorisé á l’équipement peut être possible. SEL décline toute res-
from unauthorized access. ponsabilité pour tout dommage résultant de cet accés non-autorisé.
Do not look into the fiber ports/connectors. Ne pas regarder vers les ports ou connecteurs de fibres optiques.
Do not look into the end of an optical cable connected to an optical output. Ne pas regarder vers l’extrémité d’un câble optique raccordé à une sortie optique.
Do not perform any procedures or adjustments that this instruction manual does not Ne pas appliquer une procédure ou un ajustement qui n’est pas décrit explicitement dans ce
describe. manuel d’instruction.
Incorporated components, such as LEDs and transceivers are not user serviceable. Return Les composants internes tels que les leds (diodes électroluminescentes) et émetteurs-
units to SEL for repair or replacement. récepteurs ne peuvent pas être entretenus par l'usager. Retourner les unités à SEL pour
réparation ou remplacement.
CAUTION ATTENTION
Equipment components are sensitive to electrostatic discharge (ESD). Undetectable perma- Les composants de cet équipement sont sensibles aux décharges électrostatiques (DES).
nent damage can result if you do not use proper ESD procedures. Ground yourself, your work Des dommages permanents non-décelables peuvent résulter de l’absence de précautions
surface, and this equipment before removing any cover from this equipment. If your facility contre les DES. Raccordez-vous correctement à la terre, ainsi que la surface de travail et
is not equipped to work with these components, contact SEL about returning this device and l’appareil avant d’en retirer un panneau. Si vous n’êtes pas équipés pour travailler avec ce
related SEL equipment for service. type de composants, contacter SEL afin de retourner l’appareil pour un service en usine.

xxiv Preface
General Information
Other Safety Marks (Sheet 2 of 2)
CAUTION ATTENTION
Equipment damage can result from connecting ac circuits to Hybrid (high-current interrupt- Des dommages à l’appareil pourraient survenir si un circuit CA était raccordé aux contacts
ing) control outputs. Do not connect ac circuits to Hybrid control outputs. Use only dc cir- de sortie à haut pouvoir de coupure de type “Hybrid.” Ne pas raccorder de circuit CA aux
cuits with Hybrid control outputs. contacts de sortie de type “Hybrid.” Utiliser uniquement du CC avec les contacts de sortie
de type “Hybrid.”
CAUTION ATTENTION
Substation battery systems that have either a high resistance to ground (greater than Les circuits de batterie de postes qui présentent une haute résistance à la terre (plus
10 k) or are ungrounded when used in conjunction with many direct-coupled inputs can grande que 10 k) ou sont isolés peuvent présenter un biais de tension CC entre les deux
reflect a dc voltage offset between battery rails. Similar conditions can exist for battery polarités de la batterie quand utilisés avec plusieurs entrées à couplage direct. Des condi-
monitoring systems that have high-resistance balancing circuits or floating grounds. For tions similaires peuvent exister pour des systèmes de surveillance de batterie qui utilisent
these applications, SEL provides optional ground-isolated (optoisolated) contact inputs. In des circuits d’équilibrage à haute résistance ou des masses flottantes. Pour ce type d’appli-
addition, SEL has published an application advisory on this issue. Contact the factory for cations, SEL peut fournir en option des contacts d’entrée isolés (par couplage optoélectro-
more information. nique). De surcroît, SEL a publié des recommandations relativement à cette application.
Contacter l’usine pour plus d’informations.
CAUTION ATTENTION
Do not install a jumper on positions A or D of the main board J18 header. Relay misoperation Ne pas installer de cavalier sur les positions A ou D sur le connecteur J18 de la carte princi-
can result if you install jumpers on positions J18A and J18D. pale. Une opération intempestive du relais pourrait résulter suite à l’installation d’un cava-
lier entre les positions J18A et J18D.
CAUTION ATTENTION
Insufficiently rated insulation can deteriorate under abnormal operating conditions and Un niveau d’isolation insuffisant peut entraîner une détérioration sous des conditions anor-
cause equipment damage. For external circuits, use wiring of sufficiently rated insulation males et causer des dommages à l’équipement. Pour les circuits externes, utiliser des
that will not break down under abnormal operating conditions. conducteurs avec une isolation suffisante de façon à éviter les claquages durant les condi-
tions anormales d’opération.
CAUTION ATTENTION
Relay misoperation can result from applying other than specified secondary voltages and Une opération intempestive du relais peut résulter par le branchement de tensions et cou-
currents. Before making any secondary circuit connections, check the nominal voltage and rants secondaires non conformes aux spécifications. Avant de brancher un circuit secon-
nominal current specified on the rear-panel nameplate. daire, vérifier la tension ou le courant nominal sur la plaque signalétique à l’arrière.
CAUTION ATTENTION
Severe power and ground problems can occur on the communications ports of this equip- Des problèmes graves d’alimentation et de terre peuvent survenir sur les ports de communi-
ment as a result of using non-SEL cables. Never use standard null-modem cables with this cation de cet appareil si des câbles d’origine autre que SEL sont utilisés. Ne jamais utiliser
equipment. de câble de modem nul avec cet équipement.
CAUTION ATTENTION
Do not connect power to the relay until you have completed these procedures and receive Ne pas mettre le relais sous tension avant d’avoir complété ces procédures et d’avoir reçu
instruction to apply power. Equipment damage can result otherwise. l’instruction de brancher l’alimentation. Des dommages à l’équipement pourraient survenir
autrement.
CAUTION ATTENTION
Use of controls or adjustments, or performance of procedures other than those specified L’utilisation de commandes ou de réglages, ou l’application de tests de fonctionnement dif-
herein, may result in hazardous radiation exposure. férents de ceux décrits ci-après peuvent entraîner l’exposition à des radiations dange-
reuses.
General Information
The SEL-400G Instruction Manual uses certain conventions that identify particu-
lar terms and help you find information. To benefit fully from reading this man-
ual, take a moment to familiarize yourself with these conventions.
Typographic Conventions
There are three ways to communicate with SEL-400 series relays:
➤ Using a command line interface on a PC terminal emulation window,
such as Microsoft HyperTerminal
➤ Using the front-panel menus and pushbuttons
➤ Using Grid Configurator Software or ACSELERATOR QuickSet
SEL-5030 Software

Preface xxv
General Information
The instructions in this manual indicate these options with specific font and for-
matting attributes. The following table lists these conventions:
Example Description
STATUS Commands, command options, and command variables typed at a

command line interface on a PC.
n Variables determined based on an application (in bold if part of a
SUM n command).
<Enter> Single keystroke on a PC keyboard.
<Ctrl+D> Multiple/combination keystroke on a PC keyboard.
Start > Settings PC software dialog boxes and menu selections.
The > character indicates submenus.
ENABLE Relay front- or rear-panel labels and pushbuttons.
MAIN > METER Relay front-panel LCD menus and relay responses visible on
the PC screen. The > character indicates submenus.
Logic Diagrams
Logic diagrams in this manual follow the conventions and definitions shown below.
NAME SYMBOL FUNCTION
+
COMPARATOR A Input A is compared to input B. Output C asserts
— C if A is greater than B.
B
INPUT FLAG A Input A comes from other logic.

A
OR C Either input A or input B asserted cause output C
to assert.
B
A
EXCLUSIVE OR C If either A or B is asserted, output C is asserted.
If A and B are of the same state, C is deasserted.
B
A
NOR C If neither A nor B asserts, output C asserts.
B
A Input A and input B must assert to assert output C.
AND C
B
A If input A is asserted and input B is deasserted,

AND W/ INVERTED INPUT C
B output C asserts. Inverter "O" inverts any input
or output on any gate.
A If A and/or B are deasserted, output C is asserted.
NAND C
B
X
TIME DELAYED PICK UP AND/OR A B X is a time-delay-pickup value; Y is a time-delay-
TIME DELAYED DROP OUT dropout value. B asserts time X after input A
Y asserts; B will not assert if A does not remain
asserted for time X. If X is zero, B will assert
when A asserts. If Y is zero, B will deassert when
A deasserts.
X
A Rising edge of A starts timers. Output B will assert
EDGE TRIGGER TIMER B time X after the rising edge of A. B will remain
Y asserted for time Y. If Y is zero, B will assert for a
single processing interval. Input A is ignored while
the timers are running.
EDGE TRIGGER LATCH A S C takes the value of A on the rising edge of B.
Q C
B R Otherwise, C retains its last value.
SET RESET FLIP FLOP S Input S asserts output Q until input R asserts.
Q
R Output Q deasserts or resets when R asserts.
FALLING EDGE A B B asserts at the falling edge of input A.
RISING EDGE A B B asserts at the rising edge of input A.

xxvi Preface
General Information
Trademarks
Trademarks appearing in this manual are shown in the following table.
ACSELERATOR Architect® MIRRORED BITS®

ACSELERATOR QuickSet® SELOGIC®
Connectorized® SELBOOT®
Technical Support
We appreciate your interest in SEL products and services. If you have questions
or comments, please contact us at:
Schweitzer Engineering Laboratories, Inc.
2350 NE Hopkins Court
Pullman, WA 99163-5603 U.S.A.
Tel: +1.509.338.3838
Fax: +1.509.332.7990
Internet: selinc.com/support
Email: [email protected]

SEL-400G Relay
Instruction Manual
S E C T I O N 1
Introduction and Specifications
Overview
The SEL-400G Advanced Generator Protection System, shown in Figure 1.1,
provides a suite of elements for the comprehensive protection and monitoring of
generators of all types and sizes. In total, the relay consists of 24 analog channels,
of which 18 channels are for 6 three-phase current inputs, and 6 channels are for
2 three-phase voltage inputs. One of the three-phase current inputs can be config-
ured as three single-phase current inputs and one of the three-phase voltage
inputs can be configured as three single-phase voltage inputs.
Figure 1.1 SEL-400G Generator Protection Relay
Protect Generator and Transformer. The SEL-400G includes two differential

zones, one of which can include an in-zone transformer and can accept as
many as six sets of CT inputs to protect both the generator and generator
step-up (GSU) without the need for an additional transformer differential
relay. Each current terminal can be included into either or both differential

1.2 Introduction and Specifications
Overview
zones. Increasing the number of inputs to the differential zone removes the
need to parallel CTs when including various circuits connecting to the zone.
This, in turn, makes it much more practical to provide overcurrent, breaker
failure, and inadvertent energization protection for multiple breakers.
Adaptive Slope Differential. A high-speed algorithm automatically increases
the slope setting during periods when CT saturation is more likely. This pro-
vides greatly increased security for external faults and external transformer
energization during black starting.
Pumped Storage Logic. The SEL-400G internally corrects the phase transposi-
tions introduced by the reversing switch. The logic ensures that the phasing
of the differential element and the phase rotation are correct. This allows a
pumped storage hydro unit to be protected with a single SEL-400G without
the need to externally switch the CT or PT secondary wiring.
SEL-400G, SEL-2664, SEL-2664S Complete Coverage, Online and Off. Combine
the SEL-400G relay, SEL-2664 Field Ground Module, and SEL-2664S Sta-
tor Ground Module for complete generator protection under all operating
conditions, including offline and during starting. Analog measurements from
these modules can be passed to the SEL-400G over an Ethernet connection.
Comprehensive Temperature Monitoring. When the SEL-400G is used in con-
junction with the SEL-2600 RTD Module and/or SEL-2411 Programmable
Automation Controller, as many as 24 temperature measurements over serial
and 24 over Ethernet are available. Each can be programmed for two levels
of thermal protection per element.
Extended Range Frequency Tracking of 5–120 Hz. Generators may, at times,
operate at frequencies significantly different than nominal. The SEL-400G
wide-range frequency tracking algorithm ensures that all protection func-
tions are secure and dependable regardless of the system frequency. The
SEL-400G also independently tracks the generator and system frequencies.
Capability-Based Loss of Field. Use this function to more effectively coordi-
nate with the minimum excitation limiter (MEL), generator capability curve
(GCC), and steady-state stability limit (SSSL). The element can dynamically
adapt with voltage to maintain coordination with the MEL.
Generator Unbalance. In the past, rotor thermal protection elements have
responded only to the negative-sequence component of the fundamental fre-
quency stator current. Generators also have a harmonic current capability
limit. The SEL-400G accounts for heating because of the fundamental and
harmonic components as high as the 15th. In accordance with IEEE C50.12
and IEEE C50.13, each component is scaled by a weighting factor based on
its sequence (positive or negative) and its harmonic order. This weighting
factor accounts for skin effect. Two elements are provided, each of which
can respond either to the fundamental or the fundamental plus harmonics.
Thermal Overload Modeling. The SEL-400G provides thermal overload protec-
tion based on the thermal model described in IEC standard 60255-149. The
model can be biased by ambient temperature if the RTD option is used.
Breaker Failure Protection. High-speed breaker failure is provided for as many
as four breakers with breaker flashover logic and a slip frequency check for
non- or low-current protection.
Out-of-Step Tripping. The SEL-400G provides dual zone, single- or double-
blinder out-of-step tripping (OST) with independent pole slip counters for
generator and system OST coordination.

Introduction and Specifications 1.3
Overview
Adaptive Split-Phase Compensation. Split-phase protection can detect a wide

range of stator winding faults. This scheme can be negatively impacted by
both steady-state and transient circulating currents. The SEL-400G provides
the ability to detect and nullify the standing current offset. The element is
also supervised by an external fault detector. This provides security without
compromising on operating speed.
Disturbance Report. The SEL-400G triggers disturbance reports with record
lengths of as long as 300 seconds (5 minutes). As many as four records can
be stored. Each record can have 20 analog and 800 digital quantities at a
sampling rate of 20 ms. The disturbance report can be configured to include
filtered quantities (fundamental, rms, harmonics, etc.), frequency, power,
protection operating signals, and transducer inputs. Digitals include protec-
tion Relay Word bits, contact inputs, and remote digitals received over a
communications channel. Use the disturbance recorder to capture power
swings, synchronizing events, and slowly evolving protection operations.
Synchrophasors. The SEL-400G provides synchrophasor measurement of all
18 current and 6 voltage channels available in the relay, including derived
positive-sequence quantities. The relay complies with the
IEEE C37.118.1 (2011) synchrophasors standard. Time-stamping of gener-
ating station data can be very useful for monitoring and validating various
generator control system performances. This includes terminal voltages, ter-
minal currents, speed, active power, field voltage, field current, temperature,
etc. Synchrophasors provide a mechanism to time stamp the generator data
and make them readily available for online and offline control system moni-
toring applications like generator model validation, automatic voltage regu-
lator (AVR) or excitation control system performance, power system
stabilizer (PSS) tuning and performance, and governor control tuning and
performance. The SEL-400G creates synchrophasor data by using standard
transducers and can transmit these data using the IEEE C37.118 format. In
addition, the SEL-400G can be programmed to store a PMU record length of
180 seconds based on user-settable disturbance triggers. The SEL-400G sup-
ports real-time control applications through use of synchrophasors.
Digital Relay-to-Relay Communications. Use MIRRORED BITS communications
to monitor internal element conditions among relays within a station, or
among stations, by using SEL fiber-optic transceivers. Send digital, analog,
and virtual terminal data over the same MIRRORED BITS channel. Receive
synchrophasor data from as many as two other devices transmitting
IEEE C37.118 format synchrophasors at rates as fast as 60 messages per sec-
ond. The SEL-400G time correlates the data for use in SELOGIC control
equations.
Automatic Generator Synchronization for as Many as Three Breakers. The
SEL-400G-1 provides comprehensive automatic synchronization control of
governor and voltage regulator. Several control modes are supported includ-
ing proportional pulse width, proportional pulse frequency, and fixed pulse.
The SEL-400G uses control pulses to interface with the generator controls.
Automation. Take advantage of enhanced automation features that include
programmable elements for local control, remote control, protection latch-
ing, and automation latching.
Local metering on the large-format, front-panel LCD eliminates the need for
separate panel meters.
Programmable display points on the front-panel LCD can be customized to
provide meaningful operator information for a wide variety of operating and
protection events.

Overview
Three EIA-232 serial ports and two 10/100 Mbps Ethernet ports efficiently
transmit key information, including:
➤ Metering data
➤ Protection element and control I/O status
➤ IEEE C37.118 synchrophasors
➤ IEC 61850 GOOSE messages
➤ Sequential Events Recorder (SER) reports
➤ Breaker monitor reports
➤ Summary event reports
➤ Time-synchronization reports
Use expanded SELOGIC control equations with math and comparison func-
tions in control applications.
Incorporate as many as 250 lines of protection logic along with 1000 lines of
automation logic to accelerate and improve control actions.
High-isolation control input circuits allow reliable interface points for inputs
from other systems.
Comprehensive Metering. Use the extensive metering values in the SEL-400G
to allow operators to eliminate standalone meters. Use full metering capabil-
ities of the SEL-400G that include rms, fundamental, maximum/minimum,
demand/peak, energy, harmonics, differential, synchronism-check, synchro-
phasor, and thermal values.
Breaker and Battery Monitoring. Schedule breaker maintenance when accumu-
lated breaker duty indicates possible excess contact wear. The SEL-400G
records electrical and mechanical operating times for both the last operation
and the average of operations since function reset. Breaker monitoring pro-
vides notification of substation battery voltage problems using voltage dip
detection during trip or close operations.
Ethernet Access. Access all relay functions with the optional Ethernet card.
Use IEC 61850, Modbus TCP, or DNP3 protocol directly to interconnect
with automation systems. You can also connect to DNP3 or Modbus TCP
networks through a communications processor. Use File Transfer Protocol
(FTP) for high-speed data collection. Connect to substation or corporate
LANs to transmit synchrophasors in the IEEE C37.118 format, using TCP or
UDP internet protocols.
Oscillography. Record voltages, currents, and internal logic points at sampling
rates as fast as 8 kHz and with time stamp based on absolute time. Phasor
and harmonic analysis features allow investigation of relay and system per-
formance.
SER. Record the last 1000 entries, including setting changes, relay startup,
password access, and as many as 250 selectable logic elements.
Rules-Based Settings Editor. Use an ASCII terminal to communicate and set
the relay, or use the PC-based SEL Grid Configurator Software to configure
the SEL-400G, view a replica of the relay front- panel HMI, analyze fault
records with relay element response, and view real-time phasors and har-
monic levels.

Features
Features
The SEL-400G contains many protection, automation, and control features.
Figure 1.2 presents a simplified functional overview of the relay.
ANSI NUMBERS/ACRONYMS AND FUNCTIONS

21 Phase Distance
SYSTEM 23 RTD Temperature—SEL-2600
SEL-400G 24 Volts/Hertz
3 S 50BF 25 Synchronism Check
S 25A Autosynchronizer
3I0
3I0
27 Undervoltage
BRM DFR HMI LGC MET PMU 32 Directional Power
REF 40 Loss of Field
1 85 16 40P Capability-Based Loss of Field
IY2 RTU SBM SER SIP RIO SEC 46 Current Unbalance
49 IEC 60255-Compliant Thermal Model
GSU 50BF Breaker Failure Overcurrent
3 T 50 51 50N Neutral Overcurrent
T T 50 (P, G, Q) Overcurrent (Phase, Ground, Neg. Seq.)
AUX VAV, VCV LOP 87 51N Neutral Time-Overcurrent
V 2 51 (P, G, Q) Time-Overcurrent (Phase, Ground, Neg. Seq.)
24 59 Overvoltage
2 64G1 Stator Ground (Fundamental Neutral Overvoltage)
3 W
64G2 Third-Harmonic Difference/Undervoltage
64G3 Third-Harmonic Ratio
50BF 64F Rotor Ground—SEL 2664
25 25 U
64S Stator Ground (Subharmonic Injection)—SEL 2664S
U AU
67 (P, G, Q) Directional Overcurrent (Phase, Ground, Neg. Seq.)
78 Out-of-Step
3 U IN P 81 (O, U) Over- and Underfrequency
AD 67 GQ
81A Accumulated Frequency
81R (O, U) Over- and Under-Rate-of-Change-of-Frequency
24 27 59 81
1 85 RIO SEL MIRRORED BITS® Communications
3 Z 87 (U, R, Q) Universal Differential (Unrestrained, Restrained, Neg. Seq.)
87 DFR Event and Disturbance Reports
1
HMI Operator Interface
As Many LOP
INAD Inadvertent Energization
as 24 Z
Temperature 46 LGC Expanded SELOGIC® Control Equations
Elements LOP Loss of Potential
P1, P2 MET High-Accuracy Metering
SEL-2600 23 49 PMU Synchrophasors
SEL-2600
SEL-2664 3 X REF Restricted Earth Fault
40/
21 32 40P 78 RTU Remote Terminal Unit
SER Sequential Events Recorder
VV2 64 64G ADDITIONAL FUNCTIONS
G1 2/3
3V0
3V0
16 SEC Access Security (Serial, Ethernet)
BRM Breaker Wear Monitor
SEL-2664S
P5 64 64 LDP Load Data Profiling
S F SBM Station Battery Monitor
= serial communications
SIP Software-Invertible Polarities
Figure 1.2 Functional Overview
The SEL-400G includes the following features:

Distance Protection With Load Encroachment (21). The SEL-400G provides
two phase impedance elements with load encroachment blinders. A reverse
reach setting is also included. Transformer phase shift compensation is pro-
vided to ensure correct reach for power system faults.
RTD Temperature (23). When the SEL-400G is used in conjunction with the
SEL-2600 and/or the SEL-2411, as many as 24 thermal elements in the relay
can be programmed for two levels of thermal protection per element. Each
RTD input provides an alarm and trip temperature pickup setting in degrees
C, provides open and shorted RTD detection, and is compatible with the fol-
lowing three-wire RTD types:
➤ PT100 (100-ohm platinum)
➤ Ni100 (100-ohm nickel)

Features
➤ Ni120 (120-ohm nickel)

➤ Cu10 (10-ohm copper)
Additionally, you can configure and use the winding RTDs and the ambient
temperature RTD to bias the generator thermal model and thermal protec-
tion.
Volts-Per-Hertz Elements (24). The SEL-400G provides two volts/hertz ele-
ments, each with inverse-time and definite-time characteristics. Each ele-
ment has two levels, one of which can be used for alarming and the other for
tripping. You can assign each to different potential, allowing both the gener-
ator and transformer to be protected using separate elements. You can enable
a composite inverse-time characteristic with a two-step definite-time charac-
teristic, a definite/inverse-time characteristic, or a simple inverse-time char-
acteristic. The SEL-400G also provides a custom curve option.
Synchronism Check (25). The SEL-400G provides synchronization-check ele-
ments for as many as three breakers. The synchronism-check function is
extremely accurate and provides supervision for acceptable voltage window
and maximum percentage difference, maximum and minimum allowable slip
frequency, target closing angle, and breaker closing delay. Use the distur-
bance report to capture complete information on the five latest paralleling
operations, including generator and system voltages and frequencies, slip
frequency, and phase angle when the close was initiated. The relay also
keeps a running average of the breaker close time.
Autosynchronizer (25A). Selected SEL-400G-1 models have a built-in auto-
synchronizer function for as many as three breakers. The element monitors
the voltage across the selected breaker and sends variable control pulses to
the generator field voltage regulator and the prime mover speed control gov-
ernor.
The 25A implements three types of pulse control:
PW Proportional pulse width—the pulse width is proportional to the

error signal (slip or voltage difference) and the pulse period is fixed.
PF Proportional pulse frequency—the pulse width is fixed and the pulse
frequency is proportional to the error signal.
FD Both the pulse width and pulse frequency are fixed.
Once frequency, voltage, and phase are matched, the function sends a close
command to the selected breaker. The close command is time-advanced by
using the slip measurement and breaker close time such that the primary
contacts close when the voltage angle across the breaker is zero. Use the
integrated disturbance report to capture generator synchronizing events.
Over- and Undervoltage Protection (27, 59). Phase, phase-to-phase, and posi-
tive-sequence undervoltage (27), overvoltage (59), residual overvoltage
(59G), and negative-sequence overvoltage (59Q) help you create protection
and control schemes, such as undervoltage load shedding or standby genera-
tion start/stop schemes.
➤ Phase and phase-to-phase undervoltage elements based on configu-
rable operating quantities operate with the minimum of the measured
voltage magnitudes; these elements operate when any single mea-
surement falls below the set thresholds.
➤ Phase and phase-to-phase overvoltage elements operate with the
maximum of the measured voltage magnitudes.
➤ The positive-sequence undervoltage elements operate when the cal-
culated positive-sequence voltage V1 drops below the set thresholds.

Features
➤ The positive-sequence overvoltage elements operate when the calcu-

lated positive-sequence voltage V1 exceeds the set thresholds.
➤ The negative-sequence overvoltage elements operate when the calcu-
lated negative-sequence voltage V2 exceeds set thresholds.
➤ The residual-ground voltage element operates when the zero-
sequence voltage 3V0 exceeds the set point. All voltage elements
provide definite-time delay settings.
Six over- and six undervoltage elements are provided. Both definite-time and
inverse-time characteristics are selectable.
Directional Power Detection (32). Sensitive directional power elements in the
SEL-400G provide anti-motoring and/or low forward power tripping. As
many as four elements for detecting real (W) or reactive (VARs) directional
power flows, having independent time delays and sensitivities, are provided.
Directly trip the generator under loss-of-prime mover conditions to prevent
prime movers from motoring, or use low forward power indication as a trip-
ping interlock when an orderly shutdown is required.
The SEL-400G includes a biased characteristic. This provides extra depend-
ability for a motoring event where motoring power is very low and reactive
power is high. Under these circumstances, small angle errors associated with
the instrument transformers can have a more significant impact on the power
calculation.
The directional power element can be assigned to a dedicated CT. It also
incorporates an integrating timer.
Loss-of-Field Protection (40). Two offset positive-sequence mho elements
detect loss-of-field conditions. Settable time delays help reject power swings
that pass through the machine impedance characteristic. By using the
included directional supervision, one of the mho elements can be set to coor-
dinate with the generator MEL and its SSSL.
Capability-Based Loss of Field Protection (40P). Use this function to more
effectively coordinate with the GCC, SSSL, and under-excitation limiter
(UEL). The element can dynamically shift with voltage to maintain coordi-
nation with the UEL. This element provides an alarm for operation outside
the GCC. It also provides a trip for an under-excitation event. It can alarm or
trip for an SSSL event.
Current Unbalance (46). Negative-sequence current heats the rotor at a higher
rate than positive-sequence current. The negative-sequence definite-time ele-
ment provides alarm for early stages of an unbalanced condition. The
inverse-time overcurrent element provides tripping for sustained unbalance
conditions to prevent machine damage. The inverse-time negative-sequence
element provides industry standard I22 • t protection curves. The element
accounts for heating due to the harmonic components as high as the 15th. In
accordance with IEEE C50.12 and IEEE C50.13, each component is scaled
by a weighting factor based on its sequence (positive or negative) and its har-
monic order.
Thermal Model (49). The SEL-400G thermal element provides thermal over-
load protection based on the thermal model described in IEC standard
60255-149. The model can be biased by ambient temperature if the RTD
option is used. The relay operates a thermal model with a trip value defined
by the relay settings and a present heat estimate that varies with time and
changing generator current.

Features
Overcurrent Protection (50/67). The SEL-400G provides complete overcurrent

protection with as many as four sets of three-phase CTs. One set of three-
phase CTs can be configured as single-phase current inputs for applications
requiring neutral CT inputs. Phase overcurrent protection is provided for all
three-phase inputs. The following overcurrent elements are provided.
Instantaneous Overcurrent Elements (50). All instantaneous overcurrent ele-
ments provide torque control and definite-time delay settings.
➤ As many as four instantaneous phase overcurrent elements (50P).
➤ As many as four instantaneous negative-sequence overcurrent (50Q)
elements.
➤ As many as four residual-ground instantaneous overcurrent (50G)
elements. These elements use calculated residual (3I0) current levels.
Split Phase Overcurrent Protection (60). The high-set element is implemented
as a conventional split phase function, i.e., a definite-time overcurrent ele-
ment with unique pickup settings for the A-, B-, and C-Phases.
The adaptive low-set element is intended for use where there is a steady-state
offset in the split phase current. The adaptive offset logic provides more sen-
sitivity by tracking the value of the offset and subtracting this value from the
operating signal.
The element is supervised by the external fault detector (differential ele-
ment) for increased security for external events.
Time-Overcurrent Elements (51). The SEL-400G provides as many as 12 con-
figurable time-overcurrent elements. These time-overcurrent elements sup-
port the IEC and US (IEEE) time-overcurrent characteristics.
Electromechanical disk reset capabilities are provided for all time-overcur-
rent elements.
Directional Instantaneous Overcurrent Elements (67). The following direc-
tional overcurrent elements are available in the SEL-400G with directional
control.
➤ As many as four directional phase overcurrent elements (67P).
➤ As many as four directional negative-sequence overcurrent elements
(67Q).
➤ As many as four directional ground overcurrent elements (67Q).
Inadvertent Energization Detection (INAD). The breaker for an out-of-service
generator may be closed inadvertently. The SEL-400G detects this condition
by using voltage, current, and other supervisory conditions you select
through a SELOGIC control equation. The INAD logic is available for as
many as four breakers.
Breaker Failure Protection (50BF). The SEL-400G offers high-speed breaker
failure protection for as many as four three-pole breakers. Use the breaker
failure detection to issue retrip commands to the failed breaker, or to trip
adjacent breakers by using the relay contact output logic or communications-
based tripping schemes.
Loss-of-Potential Logic (60). Relay functions that use phase voltages or sym-
metrical component voltages rely on valid inputs to make the correct deci-
sions. The LOP logic detects open voltage transformer fuses or other
conditions that cause a loss of relay secondary voltage input. The SEL-400G
with voltage inputs includes loss-of-potential logic that detects one, two, or
three potentially blown fuses. When two three-phase voltages are available,
the SEL-400G can implement a traditional voltage-balance LOP scheme.

Features
100 Percent Stator Ground Detection (64G). The SEL-400G detects stator
ground faults on high-impedance grounded generators using a conventional
neutral overvoltage element and either a third-harmonic voltage detection
scheme or the SEL-2664S Stator Ground Protection Relay. Together these
functions provide 100 percent stator winding coverage.
The neutral overvoltage element (64G1) detects winding ground faults in
approximately 90 percent of the winding.
Two third-harmonic schemes are provided:
➤ The 64G2 requires a grounded-wye terminal PT. It operates on the
difference between the third harmonic at the neutral and terminals. It
offers sensitive resistive fault coverage but requires a third-harmonic
survey for determination of optimal settings. This scheme incorpo-
rates built-in logic to adapt to changes in terminal capacitance when
a low-side generator breaker is present.
➤ The 64G3 operates on the ratio of the third harmonic at the neutral
and to the total third harmonic. It is less sensitive than the 64G2 but
does not require a third-harmonic survey. If a grounded-wye terminal
PT is available, the total third harmonic is measured as the vector
sum of the neutral and terminal third harmonic voltages. If a
grounded-wye terminal PT is not available, a patented algorithm esti-
mates the total third harmonic using terminal voltages and currents.
The 64G output logic incorporates an acceleration path and an integrating
timers to ensure correct operation for intermittent ground faults.
Field Ground Protection (64F). The SEL-400G, with the SEL-2664 Field
Ground Module, detects field ground faults by measuring field insulation-to-
ground resistance by using the switched dc voltage injection method. Two-
level protection for alarm and trip functions is provided.
Stator Ground Protection Using Subharmonic Injection (64S). Combine the
SEL-400G and the SEL-2664S Stator Ground Protection Relay to provide
rapid and reliable detection of stator ground faults under all operating condi-
tions (including offline) by using patented Multi-Sine injection from the
SEL-2664S and 100 percent stator ground protection (64G) in the
SEL-400G. The SEL-2664S remains operational at standstill and during
starting.
Out-of-Step Protection (78). SEL-400G relays use a single- or a double-blinder
scheme, depending on user selection, to detect an out-of-step condition. In
addition to the blinders, the scheme uses a mho circle that restricts the cover-
age of the out-of-step function to the desired extent. Furthermore, both
schemes contain current supervision and torque control to supervise the
operation of the out-of-step element. The out-of-step protection also
employs a reactance line to divide the characteristic into a generator and sys-
tem zone, each with independent pole slip counters.
Frequency Elements (81). Six independent levels of over- or underfrequency
elements detect abnormal frequency operating conditions. Use the inde-
pendently time-delayed output of these elements to trip or alarm.
Phase undervoltage supervision prevents undesired frequency element oper-
ation during start up, shutdown, and faults, and while the field is de-ener-
gized. A frequency element can act as an offline overspeed function. The
relay can measure frequency at a minimum of 5 volts secondary, allowing it
to respond to the residual core flux prior to field application. Unsupervised
Relay Word bits are provided for use in custom generator overspeed
schemes.

Models and Options
Rate-of-Change-of-Frequency Elements (81R). Six independent rate-of-change-

of-frequency (ROCOF) elements are provided with individual time delays
for use when frequency changes occur, for example, when there is a sudden
unbalance between generation and load. They speed up control action or
switching action such as network decoupling or load shedding. Each element
includes logic to detect either increasing or decreasing frequency and above
or below nominal frequency. Any of the six levels of ROCOF elements can
operate as either an under-ROCOF element or as an over-ROCOF element.
Off-Frequency Accumulators (81AC). The SEL-400G tracks the total time-of-
operation in as many as eight off-nominal frequency bands. If the off-nomi-
nal time of operation exceeds one of the independent time set points, each
band can be configured to accumulate-only, trip, or alarm. The relay also
supports continuous bands.
Universal Differential Protection (87-1, -2). When specified, the SEL-400G
detects faults in the generator zone and in the overall zone using a secure,
sensitive current differential function. This function has a sensitive percentage-
restrained differential element and an unrestrained element. The differential
function provides the unique capability of power transformer and CT con-
nection compensation. This allows you to conveniently include the unit step-
up transformer in the generator differential zone using wye-connected CTs
for both input sets. The relay allows you to choose harmonic blocking, har-
monic restraint, or both, providing a reliable differential protection during
transformer inrush conditions. Even-numbered harmonics (second and
fourth) provide security during energization, while fifth-harmonic blocking
provides security for overexcitation conditions. Set second-, fourth-, and
fifth-harmonic thresholds independently. The dual-slope percentage restraint
characteristic improves element security for through-fault conditions.
REF. Apply the restricted earth fault (REF) protection feature for the sensitive
detection of internal ground faults on grounded wye-connected windings.
The neutral current CT provides the operating current. Polarizing current is
derived from the residual current calculated for the protected winding. A
sensitive directional element determines whether the fault is internal or
external. Zero-sequence current thresholds and selectable CT saturation
logic supervise tripping. The REF scheme is applicable to single-phase banks
with one CT on each neutral.
Pumped Storage Logic. Switching from generator to pump mode impacts ele-
ments that use sequence components. This can be addressed by dynamically
changing the phase rotation setting. A second impact occurs if the differen-
tial zone includes the reversing switch. In the past, this was addressed by the
switching of the CT secondary wiring. The SEL-400G solution addresses
both problems using an intuitive approach. The user identifies any CTs and
PTs that are downstream from the reversing switch. The relay then rolls the
phasing internally to correct the phase change introduced in the primary cir-
cuit.
Models and Options

The SEL-400G is available as an 8U size accommodating as many as three inter-
face boards. Select I/O boards from a choice of five interface boards, each board
designed to provide a wide range of input and output combinations to tailor the
relay for your specific application. If your application requires more I/O, add
contact I/O with the SEL-2505/SEL-2506 Remote I/O Module.

Models and Options
Firmware Options
The SEL-400G comes in two different ordering options: Generator Protection
Relay (SEL-400G-0) and Generator Protection Relay and Autosynchronizer
(SEL-400G-1). The SEL-400G-1 has the same relay functionality and adds the
autosynchronizer function.
Current Channel Options

Select the CT secondary current for Terminals S, T, and U as either 1 A or 5 A
(all three phases of all three terminals as 1 A or 5 A). For Terminals W and X,
select the CT secondary current as 1 A or 5 A. For the three inputs of Terminal Y,
various combinations can be selected for each of the inputs.
NOTE: For Options 1, 2, and 3, the Table 1.1 Supported 1 A/5 A Terminal Combinations
Y terminal can be configured in
software as three-phase or single-
phase. For Options 4–8, the Y terminal Terminals S, T, U Terminals W, X, IY1, IY2, IY3
can only be configured as single
phase. A three-phase Y input can be Terminal S = 5 A Terminal W = 5 A
included in a differential zone. A Terminal T = 5 A Terminal X = 5 A
single-phase Y input can be used as
the operate signal for the REF, ground Terminal U = 5 A Terminal IY1, IY2, IY3 = 5 A, 5 A, 5 A
overcurrent, and ground directional
elements. Terminal S = 1 A Terminal W = 5 A
Terminal T = 1 A Terminal X = 5 A
Terminal U = 1 A Terminal IY1, IY2, IY3 = 1 A, 1 A, 1 A
Terminal W = 1 A
Terminal X = 1 A
Terminal IY1, IY2, IY3 = 1 A, 1 A, 1 A
Terminal W = 5 A
Terminal X = 5 A
Terminal IY1, IY2, IY3 = 5 A, 1 A, 1 A
Terminal W = 5 A
Terminal X = 5 A
Terminal IY1, IY2, IY3 = 0.2 A, 0.2 A, 0.2 A
Terminal W = 1 A
Terminal X = 1 A
Terminal IY1, IY2, IY3 = 0.2 A, 0.2 A, 0.2 A
Terminal W = 5 A
Terminal X = 5 A
Terminal IY1, IY2, IY3 = 5 A, 5 A, 0.2 A
Terminal W = 5 A
Terminal X = 5 A
Terminal IY1, IY2, IY3 = 1 A, 1 A, 0.2 A
Voltage Channel Options

300 V phase-to-neutral wye configuration PT inputs
Connector Type
➤ Screw-terminal block inputs
➤ Connectorized

Models and Options
Conformal Coat
Conformal coating provides an additional barrier to harsh environments, such as
high humidity and airborne contaminants. See selinc.com/conformalcoating/ for
more information.
Interface Board (I/O) Options

Select from four interface boards to provide flexibility with the diverse I/O
requirements when installing the SEL-400G at power plants, transmission, and
distribution networks. You can install the interface boards in any combination in
the relay. Table 1.2 provides I/O information about the main board and the four
interface boards.
Table 1.2 Interface Board Information
Board Name Inputs Description Outputs Description
INT2 8 Optoisolated, independent, level-sensitive 13 Standard Form A

2 Standard Form C
INT4 18 Two sets of 9 common optoisolated, level-sensitive 6 High-speed, high-current interrupting, Form A
6 Optoisolated, independent, level-sensitive 2 Standard Form A
INT7 8 Optoisolated, independent, level-sensitive 13 High-current interrupting, Form A
2 Standard Form C
INT8 8 Optoisolated, independent, level-sensitive 8 High-speed, high-current interrupting, Form A
INTD 24 Optoisolated, common, level-sesitive 8 Standard Form A
Voltage ranges for the inputs on the main board as well as for the inputs on the
four interface boards are as follows:
➤ 24 Vdc
➤ 48 Vdc
➤ 110 Vdc
➤ 125 Vdc
➤ 220 Vdc
➤ 250 Vdc
Power Supply Options

➤ 24–48 Vdc
➤ 48–125 Vdc or 110–120 Vac
➤ 125–250 Vdc or 110–240 Vac
Ethernet Connection Options

Ethernet card with port combinations of:
➤ Four copper (10BASE-T/100BASE-TX)
➤ Four fiber (100BASE-FX)

Applications
Two sets:
➤ Both copper (10BASE-T/100BASE-TX)
➤ Both fiber (100BASE-FX)
➤ One copper (10BASE-T/100BASE-TX) and one fiber
(100BASE-FX)
Ethernet Communications Protocols

➤ FTP
➤ Telnet
➤ DNP3
➤ PRP
➤ IEC 61850
➤ Modbus TCP
Ordering Assistance
Contact the SEL factory or your local Technical Service Center for ordering
information (see Technical Support on page 3.52). You can also view the latest
ordering information on the SEL website at selinc.com.
Applications
Steam Turbine
Figure 1.3 shows the SEL-400G applied to a large steam turbine. One differential
element is fed from CTs at the generator neutral and generator terminals. A sec-
ond differential is fed from CTs at the generator neutral, AUX transformer, and
GSU HV breakers. REF protection is implemented on the GSU HV winding.
Synchronism-check and autosynchronizing are implemented on each breaker.
High-speed breaker failure and inadvertent energization is provided for each
breaker.
Field ground protection is provided by the SEL-2664. One-hundred percent sta-
tor ground is provided by the SEL-2664S. RTD temperature sensing is provided
by the SEL-2600. The SEL-400G can interface with two SEL-2600 Modules for
a total of 24 RTDs.
Overcurrent protection is provided for the HV side of the AUX transformer.
The directional power element (32) can also be fed from a dedicated metering-
class CT (not shown).

Applications
SEL-2664S SEL-2664
GSU
G
V2 X Z W S Y1 T U V1 V3
24 27 59 81 87 REF
REF 50BF 50BF 25 25
G 1
64 64
S G
64
F 21 32 40 78 49 46 87
T
SEL-400G
Figure 1.3 Steam Turbine Generator
Hydro Generator
Figure 1.4 shows the SEL-400G applied to a large hydro generator. The
SEL-400G can track frequency as high as 120 Hz, ensuring the accuracy of all
protection functions.
In this application, one differential element provides transverse differential pro-
tection by using the branch CTs at the generator neutral. These currents are sum-
mated to provide the generator neutral-side current. The second differential
element provides overall differential protection using the neutral branch currents,
the braking and exciter transformer CTs and the GSU HV breaker CT.
Adaptive split phase protection is provided using the inter-neutral CT. The use of
the inter-neutral CT provides sensitive protection. REF protection is imple-
mented on the GSU HV winding (not shown).
When three-phase voltages are available on both sides of the sync-breaker, the
SEL-400G provides additional security against VT wiring errors, equivalent to a
three-phase synchronism-check.
The frequency element can act as an offline overspeed function. It measures at a
minimum of 5 volts secondary, allowing it to respond to the residual core flux
prior to field application.

Applications
BRAKE AUX
TXFR
SEL-2664S SEL-2664
V2 X W Y Z U T S V1, V3
87 50 50 50BF 25A
64 IN
S 24 27 59 81 51 51 AD
64 64
F G
32 40 78 21 46 49 87
SEL-400G
Figure 1.4 Hydro Generator
Combustion Gas Turbine

Figure 1.5 shows the SEL-400G applied to a combustion gas turbine. A load
commutated inverter (LCI) is typically used for starting these generators.
To provide effective protection during starting, inputs S, T, U, and Y1 are fre-
quency-tracked using the system frequency, which is derived from the V voltage
input. The same approach can be employed for other generators that start at off-
nominal frequency such as pumped storage hydro or cross-compound units. See
Frequency Tracking on page 5.12 for more details. One differential element pro-
tects the generator and the second protects the GSU.
The V input can be configured to provide ground fault protection for the iso-
phase bus duct by using an open-corner delta connection. The SEL-2664S pro-
vides ground fault protection throughout the start process.

Product Characteristics
LCI
SEL-2664S SEL-2664 START
GSU
V2 X Z U W V1, V3 S Y1 T
24 27 59 81 25A 50BF REF 50BF

64 64
S G
64 21 32 40 78 49 46 87G
F
SEL-400G
Figure 1.5 Combustion Gas Turbine
Each SEL-400-series relay shares common features, but has unique characteris-
tics. Table 1.3 summarizes the unique characteristics for the SEL-400G.
Table 1.3 SEL-400G Relay Characteristics (Sheet 1 of 2)
Characteristic Value
Standard Processing Rate 2.5 ms

Battery Monitor One
Autorecloser None
SELOGIC
Protection Freeform 250 lines
Automation Freeform 10 blocks of 100 lines each
SELOGIC Variables 64 protection
256 automation
SELOGIC Math Variables 64 protection
256 automation
Conditioning Timers 32 protection
32 automation
Sequencing Timers 32 protection
32 automation
Counters 32 protection
32 automation
Latch Bits 32 protection
32 automation

Table 1.3 SEL-400G Relay Characteristics (Sheet 2 of 2)
Characteristic Value
Control
Remote Bits 64
Breakers Four: S, T, U, Y
Three-pole only
Disconnects 10
Bay Control Supported
Metering
Maximum/Minimum Metering Supported
Energy Metering Supported
Synchronism Check Metering Supported
Demand Metering Supported
Instantaneous Metering Supported

Specifications
Specifications
Section
SEL-400G1Introduction and Specifications
Relay
A/D Current Limit
Compliance
Note: Signal clipping may occur beyond this limit.
Designed and manufactured under an ISO 9001 certified quality
management system 5 A Nominal: 247.5 A
FCC Compliance Statement 1 A Nominal: 49.5 A

This equipment has been tested and found to comply with the limits 0.2 A Nominal: 9.9 A
for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against AC Voltage Inputs
harmful interference when the equipment is operated in a Three-phase, four-wire (wye), and two PT delta and single-phase (only
commercial environment. This equipment generates, uses, and can V terminal) connections are supported.
radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful Rated Voltage Range: 55–250 VLN (V and Z terminals)
interference in which case the user will be required to correct the Operational Voltage Range: 0–300 VLN
interference at his own expense.
Ten-Second Thermal
UL Listed to U.S. and Canadian safety standards Rating: 600 Vac
(File E212775; NRGU, NRGU7)
Burden: 0.1 VA @ 125 V
CE Mark
Frequency and Rotation
General Rotation: ABC
AC Analog Inputs ACB
Nominal Frequency Rating: 50
Sampling Rate: 8 kHz
60
AC Current Inputs (Secondary Circuits) Frequency Tracking Tracks between 5.0–120.0 Hz
Note: Current transformers are Measurement Category II. (Requires PTs): Below 5.0 Hz = 5.0 Hz
Above 120.0 Hz = 120.0 Hz
Input Current
Maximum Slew Rate: 30 Hz/s
5 A Nominal: S, T, U, W, X, and Y terminals
1 A Nominal: S. T, U, W, X, and Y terminals Power Supply
0.2 A/1 A/5 A Nominal: Y terminal only (REF) 24–48 Vdc
Current Rating (With DC Offset at X/R = 10, 1.5 cycles) Rated Voltage: 24–48 Vdc
5 A Nominal: 91.0 A Operational Voltage Range: 18–60 Vdc
1 A Nominal: 18.2 A Vdc Input Ripple: 15% per IEC 60255-26:2013
0.2 A Nominal: 3.64 A Interruption: 20 ms at 24 Vdc, 100 ms at 48 Vdc

per IEC 60255-26:2013
Continuous Thermal Rating
Burden: <40 W
5 A Nominal: 15 A
20 A (+55°C) 48–125 Vdc or 110–120 Vac
1 A Nominal: 3A Rated Voltage: 48–125 Vdc, 110–120 Vac

4 A (+55°C) Operational Voltage Range: 38–140 Vdc
0.2 A Nominal: 0.6 A 85–140 Vac
0.8 A (+55°C) Rated Frequency: 50/60 Hz
Saturation Current (Linear) Rating Operational Frequency
5 A Nominal: 100 A Range: 30–120 Hz
1 A Nominal: 20 A Vdc Input Ripple: 15% per IEC 60255-26:2013
0.2 A Nominal: 4A Interruption: 14 ms @ 48 Vdc, 160 ms @ 125 Vdc

per IEC 60255-26:2013
One-Second Thermal Rating
Burden: <40 W, <90 VA
5 A Nominal: 500 A
125–250 Vdc or 110–240 Vac
1 A Nominal: 100 A
Rated Voltage: 125–250 Vdc, 110–240 Vac
0.2 A Nominal: 20 A
Operational Voltage Range: 85–300 Vdc
One-Cycle Thermal Rating 85–264 Vac
5 A Nominal: 1250 A-peak Rated Frequency: 50/60 Hz
1 A Nominal: 250 A-peak Operational Frequency
0.2 A Nominal: 50 A-peak Range: 30–120 Hz
Burden Rating Vdc Input Ripple: 15% per IEC 60255-26:2013
5 A Nominal: 0.5 VA at 5 A Interruption: 46 ms @ 125 Vdc, 250 ms @ 250 Vdc

per IEC 60255-26:2013
1 A Nominal: 0.1 VA at 1 A
Burden: <40 W, <90 VA
0.2 A Nominal: 0.02 VA at 0.2 A

Specifications
Control Outputs Fast Hybrid (High-Speed High-Current Interrupting)

Note: IEEE C37.90-2005 and IEC 60255-27:2013 Rated Voltage: 24–250 Vdc
Update Rate: 2.5 ms Operational Voltage Range: 0–300 Vdc
Make (Short Duration 30 Adc Operating Time: Pickup 0 µs (resistive load)
Contact Current): 1,000 operations at 250 Vdc Dropout 8 ms (resistive load)
2,000 operations at 125 Vdc Short-Time Thermal
Limiting Making Capacity: 1000 W at 250 Vdc (L/R = 40 ms) Withstand: 50 Adc for 1 s
Mechanical Endurance: 10,000 operations Continuous Contact 6 Adc at 70°C
Current: 4 Adc at 85°C
Standard
Contact Protection: MOV protection across open contacts
Rated Voltage: 24–250 Vdc 300 Vdc continuous voltage
110–240 Vrms
Limiting Breaking 10,000 operations
Operational Voltage Range: 0–300 Vdc Capacity/Electrical 4 operations in 1 second, followed by
0–264 Vrms Endurance: 2 minutes idle
Operating Time: Pickup 6 ms (resistive load)
Dropout 6 ms (resistive load)
Rated Voltage Resistive Break Inductive Break
Short-Time Thermal
Withstand: 50 A for 1 s 24 Vdc 10 Adc 10 Adc (L/R = 40 ms)
Continuous Contact 6 A at 70°C 48 Vdc 10 Adc 10 Adc (L/R = 40 ms)
Current: 4 A at 85°C 125 Vdc 10 Adc 10 Adc (L/R = 40 ms)
Contact Protection: MOV protection across open contacts 250 Vdc 10 Adc 10 Adc (L/R = 20 ms)
264 Vrms continuous voltage
300 Vdc continuous voltage Note: Do not use hybrid control outputs to switch ac control signals.
Limiting Breaking 10,000 operations These outputs are polarity-dependent.
Capacity/Electrical 10 operations in 4 seconds, followed by Control Inputs
Endurance: 2 minutes idle
Optoisolated (Use With AC or DC Signals)
Inductive Break INT2, INT7, and INT8

Interface Boards: 8 inputs with no shared terminals
Rated Voltage Resistive Break L/R = 40 ms (DC)
PF = 0.4 (AC) INT4 and INTD Interface 6 inputs with no shared terminals
Boards: 18 inputs with shared terminals
24 Vdc 0.75 Adc 0.75 Adc (2 groups of 9 inputs with each group
48 Vdc 0.63 Adc 0.63 Adc sharing one terminal)
125 Vdc 0.30 Adc 0.30 Adc Voltage Options: 24, 48, 110, 125, 220, 250 V
250 Vdc 0.20 Adc 0.20 Adc Current Drawn: <5 mA at nominal voltage
<8 mA for 110 V option
110 Vrms 0.30 Arms 0.30 Arms
DC Thresholds (Dropout Thresholds Indicate Level-Sensitive Option)
240 Vrms 0.20 Arms 0.20 Arms
24 Vdc: Pickup 19.2–30.0 Vdc
Hybrid (High-Current Interrupting) Dropout: <14.4 Vdc
Rated Voltage: 24–250 Vdc 48 Vdc: Pickup 38.4–60.0 Vdc;

Dropout <28.8 Vdc
Operational Voltage Range: 0–300 Vdc
110 Vdc: Pickup 88.0–132.0 Vdc;
Operating Time: Pickup 6 ms (resistive load) Dropout <66.0 Vdc
Dropout 6 ms (resistive load)
125 Vdc: Pickup 105–150 Vdc;
Short-Time Thermal Dropout <75 Vdc
Withstand: 50 Adc for 1 s
Continuous Contact 6 Adc at 70°C Dropout <132 Vdc
Current: 4 Adc at 85°C
Contact Protection: MOV protection across open contacts Dropout <150 Vdc
300 Vdc continuous voltage
AC Thresholds (Ratings Met Only When Recommended Control Input
Limiting Breaking 10,000 operations Settings Are Used—see Table 2.1.)
Capacity/Electrical 4 operations in 1 second, followed by
Endurance: 2 minutes idle 24 Vac: Pickup 16.4–30.0 Vac rms
Dropout: <10.1 Vac rms
48 Vac: Pickup 32.8–60.0 Vac rms;
Rated Voltage Resistive Break Inductive Break Dropout <20.3 Vac rms
24 Vdc 10 Adc 10 Adc (L/R = 40 ms) 110 Vac: Pickup 75.1–132.0 Vac rms;
48 Vdc 10 Adc 10 Adc (L/R = 40 ms) Dropout <46.6 Vac rms
125 Vdc 10 Adc 10 Adc (L/R = 40 ms) 125 Vac: Pickup 89.6–150.0 Vac rms;
Dropout <53.0 Vac rms
250 Vdc 10 Adc 10 Adc (L/R = 20 ms)
220 Vac: Pickup 150.3–264 Vac rms;
Dropout <93.2 Vac rms
250 Vac: Pickup 170.6–300 Vac rms;
Dropout <106 Vac rms
Sampling Rate: 2 kHz

Specifications
Communications Ports Wire Sizes and Insulation

EIA-232: 1 front and 3 rear Wire sizes for grounding (earthing), current, voltage, and contact
connections are dictated by the terminal blocks and expected load
Serial Data Speed: 300–57600 bps
currents. You can use the following table as a guide in selecting wire
Communications Card Slot for Optional Ethernet Card sizes. The grounding conductor should be as short as possible and
sized equal to or greater than any other conductor connected to the
Ordering Option: 10/100BASE-T device, unless otherwise required by local or national wiring
Connector Type: RJ45 regulations.
Ordering Option: 100BASE-FX Fiber-Optic
Connector Type: LC Connection Type Min. Wire Size Max. Wire Size
Fiber Type: Multimode Grounding (Earthing) 14 AWG (2.5 mm2) N/A
Connection
Wavelength: 1300 nm
Current Connection 16 AWG (1.5 mm2) 10 AWG (5.3 mm2)
Source: LED
Potential (Voltage) 18 AWG (0.8 mm2) 14 AWG (2.5 mm2)
Min. TX Power: –19 dBm
Connection
Max. TX Power: –14 dBm
Contact I/O 18 AWG (0.8 mm2) 10 AWG (5.3 mm2)
RX Sensitivity: –32 dBm
Other Connection 18 AWG (0.8 mm2) 10 AWG (5.3 mm2)
Sys. Gain: 13 dB
Time Inputs Type Tests
IRIG Time Input—Serial Port 1 Installation Requirements
Input: Demodulated IRIG-B Overvoltage Category: 2
Rated I/O Voltage: 5 Vdc Pollution Degree: 2
Operational Voltage Range: 0–8 Vdc Safety
Logic High Threshold: 2.8 Vdc Product Standards IEC 60255-27:2013
Logic Low Threshold: 0.8 Vdc IEEE C37.90-2005
21 CFR 1040.10
Input Impedance: 2.5 k
Dielectric Strength: IEC 60255-27:2013, Section 10.6.4.3
IRIG-B Input—BNC Connector 2.5 kVac, 50/60 Hz for 1 min: Analog
Input: Demodulated IRIG-B Inputs, Contact Outputs, Digital
Inputs
Rated I/O Voltage: 5 Vdc 3.6 kVdc for 1 min: Power Supply,
Operational Voltage Range: 0–8 Vdc Battery Monitors
2.2 kVdc for 1 min: IRIG-B
Logic High Threshold: 2.2 Vdc 1.1 kVdc for 1 min: Ethernet
Logic Low Threshold: 0.8 Vdc Impulse Withstand: IEC 60255-27:2013, Section 10.6.4.2
Input Impedance: >1 k IEEE C37.90-2005
Common Mode:
Dielectric Test Voltage: 0.5 kVac
±1.0 kV: Ethernet
PTP—Ethernet Port 5A, 5B ±2.5 kV: IRIG-B
Input: IEEE 1588 PTPv2 ±5.0 kV: All other ports
Differential Mode:
Profiles: Default, C37.238-2011 (Power Profile) 0 kV: Analog Inputs, Ethernet,
Synchronization Accuracy: ±100 ns @ 1-second synchronization IRIG-B, Digital Inputs
intervals when communicating directly ±5.0 kV: Standard Contact Outputs,
with master clock Power Supply Battery Monitors
+5.0 kV: Hybrid Contact Outputs
Operating Temperature
Insulation Resistance: IEC 60255-27:2013, Section 10.6.4.4
–40° to +85°C (–40° to +185°F) >100 M @ 500 Vdc
Note: LCD contrast impaired for temperatures below –20° and above +70°C. Protective Bonding: IEC 60255-27:2013, Section 10.6.4.5.2
Stated temperature ranges not applicable to UL applications. <0.1  @ 12 Vdc, 30 A for 1 min
Humidity Object Penetration: IEC 60529:2001 + CRGD:2003
Protection Class: IP30
5% to 95% without condensation
Max Temperature of Parts
Weight (Maximum) and Materials: IEC 60255-27:2013, Section 7.3
8U Rack Unit: 20.4 kg (45 lb) Flammability of Insulating IEC 60255-27:2013, Section 7.6
Materials: Compliant
Terminal Connections
Rear Screw-Terminal Tightening Torque, #8 Ring Lug
Minimum: 1.0 Nm (9 in-lb)
Maximum: 2.0 Nm (18 in-lb)
User terminals and stranded copper wire should have a minimum
temperature rating of 105°C. Ring terminals are recommended.

Specifications
Electromagnetic (EMC) Immunity Power Supply Immunity: IEC 61000-4-11:2004

IEC 61000-4-17:1999/A1:2001/A2:2008
Product Standards: IEC 60255-26:2013 IEC 61000-4-29:2000
IEC 60255-27:2013 AC Dips & Interruptions
IEEE C37.90-2005 Ripple on DC Power Input
Surge Withstand Capability IEC 61000-4-18:2006 + A:2010 DC Dips & Interruptions
(SWC): IEEE C37.90.1-2012 Gradual Shutdown/Startup (DC only)
Slow Damped Oscillatory, Common Discharge of Capacitors
and Differential Mode: Slow Ramp Down/Up
±1.0 kV Reverse Polarity (DC only)
±2.5 kV Damped Oscillatory IEC 61000-4-10:2016
Fast Transient, Common and Magnetic Field: Level 5:
Differential Mode: 100 A/m
±4.0 kV
EMC Compatibility
Electrostatic Discharge IEC 61000-4-2:2008
(ESD): IEEE C37.90.3-2001 Product Standards: IEC 60255-26:2013
Contact: Emissions: IEC 60255-26:2013, Section 7.1
±8 kV Class A
Air Discharge: 47 CFR Part 15B
±15 kV Class A
Radiated RF Immunity: IEEE C37.90.2-2004 Canada ICES-001 (A) / NMB-001 (A)
IEC 61000-4-3:2006 + A1:2007 + Environmental
A2:2010
20 V/m (>35 V/m, 80% AM, 1 kHz) Product Standards: IEC 60255-27:2013
Sweep: 80 MHz to 1 GHz Cold, Operational: IEC 60068-2-1:2007
Spot: 80, 160, 450, 900 MHz Test Ad: 16 hours at –40°C
10 V/m (>15 V/m, 80% AM, 1 kHz)
Cold, Storage: IEC 60068-2-1:2007
Sweep: 80 MHz to 1 GHz
Test Ad: 16 hours at –40°C
Sweep: 1.4 GHz to 2.7 GHz
Spot: 80, 160, 380, 450, 900, 1850, Dry Heat, Operational: IEC 60068-2-2:2007
2150 MHz Test Bd: 16 hours at +85°C
Electrical Fast Transient IEC 61000-4-4:2012 Dry Heat, Storage: IEC 60068-2-2:2007
Burst (EFTB): Zone A: Test Bd: 16 hours at +85°C
±2 kV: Communication ports Damp Heat, Cyclic: IEC 60068-2-30:2005
±4 kV: All other ports Test Db: +25°C to +55°C, 6 cycles
(12 + 12-hour cycle), 95% RH
Surge Immunity: IEC 61000-4-5:2005
Zone A: Damp Heat, Steady State: IEC 60068-2-78:2013
±2 kVL-L Severity: 93% RH, +40°C, 10 days
±4 kVL-E Cyclic Temperature: IEC 60068-2-14:2009
±4 kV: Communication ports Test Nb: –40°C to +80°C, 5 cycles
Note: Cables connected to IRIG-B ports
shall be less than 10 m in length for Vibration Resistance: IEC 60255-21-1:1988
Zone A compliance. Class 2 Endurance, Class 2 Response
Zone B: Shock Resistance: IEC 60255-21-2:1988
±2 kV: Communication ports Class 1 Shock Withstand, Class 1 Bump
Conducted Immunity: IEC 61000-4-6:2013 Withstand, Class 2 Shock Response
20 V/m; (>35 V/m, 80% AM, 1 kHz) Seismic: IEC 60255-21-3:1993
Sweep: 150 kHz–80 MHz Class 2 Quake Response
Spot: 27, 68 MHz
Reporting Functions
Power Frequency IEC 61000-4-16:2015
Immunity (DC Inputs): Zone A: High-Resolution Data
Differential: 150 VRMS Rate: 8000 samples/second
Common Mode: 300 VRMS 4000 samples/second
Power Frequency Magnetic IEC 61000-4-8:2009 2000 samples/second
Field: Level 5: 1000 samples/second
100 A/m; 60 Seconds; 50/60 Hz Output Format: Binary COMTRADE
1000 A/m 1 to 3 Seconds; 50/60 Hz Note: Per IEEE C37.111-2013, Common Format for Transient Data
Note: 50G1P 0.05 (ESS = N, 1, 2)
Exchange (COMTRADE) for Power Systems.
50G1P 0.1 (ESS = 3, 4)
Event Reports
Length: 0.25–24 seconds (based on LER and
SRATE settings)
Volatile Memory: 3 s of back-to-back event reports sampled
at 8 kHz
Nonvolatile Memory: At least 4 event reports of a 3 s duration
sampled at 8 kHz
Resolution: 2.5 ms

Specifications
Disturbance Recorder Differential Elements (Unrestraint)

Length: 60–300 seconds Pickup Range: (1.0–20.0) • TAP
(based on DRLER setting)
Pickup Accuracy: ±5% of user setting, ±0.02 • INOM A
Volatile Memory: At least 1 DR event of 300 s duration
Pickup Time 0.7 cyc minimum
sampled at 50 Hz
(Filtered Unrestraint): 0.85 cyc typical
Nonvolatile Memory: At least 4 DR events of 300 s duration 1.2 cyc maximum
sampled at 50 Hz
Pickup Time 0.25 cyc minimum
Resolution: 20 ms for all elements (Raw Unrestraint): 0.5 cyc typical
1.0 cyc maximum
Event Summary
Note: The raw unrestraint pickup is set to U87P • 2 • 2
Storage: 100 summaries
Harmonic Elements (2nd, 4th, 5th)
Breaker History
Setting Range: OFF, 5–100% of fundamental
Storage: 128 histories
Pickup Accuracy: 1 A nominal ±5% ±0.02 A
Sequential Events Recorder 5 A nominal ±5% ±0.10 A
Storage: 1000 entries Time-Delay Accuracy: 0.1% + 1 processing interval
Trigger Elements: 250 relay elements Negative-Sequence Differential Element
Resolution: 0.5 ms for contact inputs Pickup Range: 0.05–1 per unit
Resolution: 2.5 ms for all elements Slope Range: 5–100%
Processing Specifications Pickup Accuracy: ±5% of user setting, ±0.02 • INOM A
AC Voltage and Current Inputs Maximum Pickup/Dropout

Time: 2 cycles
8000 samples per second, 3 dB low-pass analog filter cut-off frequency
at 3.1 kHz, ±5% Winding Coverage: 2%
Digital filtering Incremental Restraint and Operating Threshold Current Supervision
Full-cycle cosine after low-pass analog filtering
Setting Range: 0.1–10.0 per unit
Analog Update Rate (Arate)
Accuracy: ±5% ±0.02 • INOM
Open-Phase Detection Logic
Frequency (Hz) Update Rate (ms)
3 elements per terminal (S, T, U, Y)
20 < F  120 2.5
Pickup Range
10 < F  20 5
1 A Nominal: 0.04–1.00 A
5 < F  10 7.5
5 A Nominal: 0.2–5.00 A
Protection and Control Processing Maximum Pickup/Dropout
Time: 1/2 cyc + 0.0025 ms
2.5 ms (minimum)
Restricted Earth Fault (REF)
Control Points
Three Elements: 1 per IY1, IY2, IY3
64 remote bits
64 local control bits Setting Range: 0.05–3 per unit
32 latch bits in protection logic Pickup Accuracy
32 latch bits in automation logic
1 A Nominal: 0.01 A
Relay Element Pickup Ranges and Accuracies 5 A Nominal: 0.05 A
Differential Elements (General) Maximum Pickup/Dropout
Number of Zones: 2 (A, B, and C elements) Time: 1.25 cyc + Arate + 0.0025 s
Number of Terminals: 6 Instantaneous/Definite-Time Overcurrent Elements (50)

TAP Pickup: (0.1–32.0) • INOM A secondary Phase- and Negative-Sequence, Ground-Residual Elements
TAP Range: TAPMAX/TAPMIN 35 Setting Range
Time-Delay Accuracy: ±0.1% plus ±2.5 ms 5 A Nominal: 0.25–100.00 A secondary, 0.01-A steps
Differential Elements (Restraint) 1 A Nominal: 0.05–20.00 A secondary, 0.01-A steps
Pickup Range: 0.1–4.0 per unit Accuracy (Steady State)
Pickup Accuracy: 1 A nominal: ±5% 5 A Nominal: ±0.05 A plus ±3% of setting

5 A nominal: ±5% ±0.10 A 1 A Nominal: ±0.01 A plus ±3% of setting
Pickup Time 1.25 cyc minimum Transient Overreach (Phase and Ground Residual)
(If E87UNB = N): 1.25 cyc + 2.5 ms typical
1.25 cyc + 5.0 ms max 5 A Nominal: ±5% of setting, ±0.10 A
Pickup Time 0.5 cyc minimum 1 A Nominal: ±5% of setting, ±0.02 A

(If E87UNB = Y): 0.5 cyc + 2.5 ms typical Transient Overreach (Negative Sequence)
1.5 cyc max
5 A Nominal: ±6% of setting, ±0.10 A
Slope Setting Range: 5%–90%
Time-Delay Range: 0.00–400 s

Specifications
Timer Accuracy: ±0.005 s plus ±0.1% of setting Negative-Sequence Directional Element

Maximum Pickup/Dropout Number: 4 (1 each for S, T, U, Y)
Time: 1.25 cyc + Arate + 0.005 s
Outputs: Forward and reverse
Adaptive Time-Overcurrent Elements (51S and 51CV)
Polarization Quantity: Negative-sequence voltage
Setting Range (Adaptive Within the Range)
Operate Quantity: Negative-sequence current (3I2)
5 A Nominal: 0.25–16.00 A secondary, 0.01 A steps
Sensitivity: 0.05 • INOM A of secondary 3I2
1 A Nominal: 0.05–3.20 A secondary, 0.01 A steps
Accuracy: ±0.05  secondary
Accuracy (Steady State)
Transient Overreach: +5% of setting
5 A Nominal: ±0.05 A plus ±3% of setting
Maximum Delay: 1.25 cycles + Arate + 5 ms
1 A Nominal: ±0.01 A plus ±3% of setting
Undervoltage and Overvoltage Elements (27/59)
Transient Overreach
Setting Ranges
Phase Elements: 2–300 VLN in 0.01-V steps
Phase-to-Phase
Time Dial Range Elements: 4–520 VLL in 0.01-V steps
U.S.: 0.50–15.00, 0.01 steps Sequence Elements: 2–300 VLN in 0.01-V steps
IEC: 0.05–1.00, 0.01 steps Pickup Accuracy (Steady State)
Timing Accuracy: ±1.25 cyc ± 5 ms ±4% of curve time (for Phase Elements: ±3% of setting, ±0.5 V
current between 2 and 30 multiples of
pickup) Phase-to-Phase Elements
Wye): ±3% of setting, ±0.5 V
Curves operate on definite time for current greater than 30 multiples of
pickup. Phase-to-Phase Elements
(Delta): ±3% of setting, ±1 V
Reset: 20 ms or electromechanical reset
emulation time Sequence Elements: ±5% of setting, ±1 V
Pickup Accuracy (Transient Overreach)
Voltage-Controlled Overcurrent Element
Phase Elements: ±5%
Setting Range: 0.25–16.00 A, sec
Phase-to-Phase Elements
Curve: U1–U5, C1–C5
Wye): ±5%
Time Dial: 0.05–15.0
Phase-to-Phase Elements
EM Reset: Y, N (Delta): ±5%
Pickup Accuracy: ±1.25 cyc + Arate + 0.005s Sequence Elements: ±5%
Time-Delay Accuracy: ±0.1% of setting ±0.005 s Maximum Pickup/Dropout Time
Voltage-Restrained Overcurrent Element Phase Elements: 1.25 cycles ± Arate + 5.0 ms
Setting Range: 2.00–16.00 A, sec Phase-to-Phase Elements
Wye): 1.25 cycles ± Arate + 5.0 ms
Curve: U1–U5, C1–C5
Sequence Elements: 1.25 cycles ± Arate + 5.0 ms
Time Dial: 0.50–15.00
Time Delay Accuracy: ±0.1% of user setting ±5 ms
EM Reset: Y, N
Inverse Time Delay
Pickup Accuracy: ±1.25 cyc + Arate + 0.005 s Accuracy: ±1% of user setting ±5 ms
Time-Delay Accuracy: ±0.1% of setting ±0.005 s
Underfrequency and Overfrequency Elements (81)
Phase Directional Elements (67) Setting Range: 5.01–119.99 Hz, 0.01-Hz steps
Number: 4 (1 each for S, T, U, Y) Accuracy, Steady State ±0.005 Hz for frequencies between 40.00
Outputs: Forward and reverse Plus Transient: and 70.00 Hz
Accuracy: ±0.05  secondary Maximum Pickup/Dropout
Time: 3.0 cycles
Transient Overreach: +5% of set reach
Setting Range, 20.00–200.00 VLN (Wye) or VLL (Open-
Maximum Delay: 1.25 cycles + Arate + 5 ms Undervoltage Blocking: Delta)
Ground Directional Elements Pickup Accuracy,
Number: 4 (1 each for S, T, U, Y) Undervoltage Blocking: ±2% ±0.5 V
Outputs: Forward and reverse Time-Delay Range: 0.05–400.00 s, 0.01-s increment
Polarization Quantity: Zero-sequence voltage Time-Delay Accuracy: ±0.1% of setting ±0.005 seconds
Operate Quantity: Zero-sequence current (3I0) Accumulated Frequency Elements (81A)
(where 3I0 = IA + IB + IC) Setting Range: 5.01–119.99 Hz, 0.01-Hz steps
Sensitivity: 0.05 • INOM A of secondary 3I0 Accuracy, Steady State ±0.005 Hz for frequencies between 40.00
Accuracy: ±0.05  secondary Plus Transient: and 70.00 Hz
Transient Overreach: +5% of set reach Maximum Pickup/Dropout 0–400 s for 81AD
Time: and 0.5–6000 for band times
Maximum Delay: 1.25 cycles + Arate + 5 ms
Time-Delay Range: 0.050–80.000 s, 0.005-s increment
Time-Delay Accuracy: ±0.1% of setting ±0.005 seconds

Specifications
Rate-of-Change-of-Frequency Elements (81R) Synchronism-Check Elements (25)

Setting Range: –29.95 to 29.95 Hz/s, 0.05-Hz/s steps Slip Frequency PU Range: 0.005-0.500 Hz, 0.001 Hz steps
Setting Range, 20.00–200.00 VLN (wye) or VLL (open- Slip Frequency PU
Undervoltage Blocking: delta) Accuracy: ±0.0025 Hz plus ±2% of setting
Accuracy: ±0.005 Hz/s frequencies between 20.00 Close Angle Range: 3.0-80 degrees, 0.1-degree steps
and 80.00 Hz
Close Angle Accuracy: ±3 degrees
Pickup Accuracy,
Undervoltage Blocking: ±2% ±0.5 V Autosynchronism Elements (25A)
Time-Delay Range: 0.050–80.000 s, 0.005 s increment Frequency Matching
Time-Delay Accuracy: ±0.1% of setting ±5 ms seconds Raise/Lower: Digital Output

Setting Range, Control OFF, Proportional Width, Fixed Duration,
Mho Phase Distance Elements
Pulse Mode: Proportional Frequency
Number of Zones: 2
Setting Range, Control
Pickup Range Slope: 0.01–100 Hz/s
5 A Nominal: OFF, 0.05 to 100 ohms, sec Setting Range, Control
Pulse Period: 0.000–60 s
1 A Nominal: OFF, 0.25 to 500 ohms, sec
Offset Range
Pulse Duration: 0.000–60 s
5 A Nominal: 0.00–10 ohms, sec
Timing Accuracy: ±1% ±5.0 ms
1 A Nominal: 0.00–50 ohms, sec
Voltage Matching
Pickup Accuracy: ±5% of user setting ±0.1 Inom
Raise/Lower: Digital Output
Maximum Operating Time: 1.00 cycle + Arate + 10 ms
Setting Range, Control OFF, Proportional Width, Fixed Duration,
Time Delay Accuracy: ±0.1% of user setting ± 5 ms Pulse Mode: Proportional Frequency
Breaker Inadvertent Energization Protection Logic Setting Range, Control
Slope: 0.01–100 V/s
Setting Range, Overcurrent
5 A Nominal: 0.25–5.00 A secondary, 0.01 A steps Pulse Period: 0.000–60 s
1 A Nominal: 0.05–1.00 A secondary, 0.01 A steps Setting Range, Control
Accuracy (Steady State) Pulse Duration: 0.000–60 s
5 A Nominal: ±0.05 A plus ±3% of setting Timing Accuracy: ±0.1% ±5.0 ms
1 A Nominal: ±0.01 A plus ±3% of setting Time-Delay Range,
Control Expiration: 0.000–400 s
Transient Overreach
Time-Delay Accuracy,
Control Expiration: ±0.1% of setting ±5 ms
Breaker Failure Instantaneous Overcurrent
Setting Range,
Undervoltage: 1.00–300 V, sec in 0.01-V steps Setting Range
Accuracy, Undervoltage: ±2% ±0.5 V 5 A Nominal: 0.50–50 A secondary, 0.01-A steps
Time-Delay Range (Arm/ 1 A Nominal: 0.10–10.0 A, 0.01-A steps

Disarm): 0.0000–100 s Accuracy
Time-Delay Range: 0.0000–10 s 5 A Nominal: ±0.05 A, ±3% of setting
Time-Delay Accuracy: ±0.1% of setting ±0.005 s 1 A Nominal: ±0.01 A, ±3% of setting
Volts/Hertz Elements (24) Transient Overreach
Definite-Time Element 5 A Nominal: ±5%, ±0.10 A
Setting Range: 100–200% steady state 1 A Nominal: ±5%, ±0.02 A
Pickup Accuracy, Steady- Maximum Pickup Time: 1.25 cyc + Arate + 5 ms
State: ±1% of set point Maximum Dropout Time: 1.25 cyc + Arate + 5 ms
Maximum Pickup/Dropout Maximum Reset Time: 1.25 cyc + Arate + 5 ms
Time: 1.5 cycles + delay time setting
Time-Delay Range: 0.0000–20 s, 0.0025 s steps
Time-Delay Range: 0.040–6000 s
Time-Delay Accuracy: ±0.1% of setting ±5 ms
Time-Delay Range, Reset: 0.040–6000 s
Breaker Flashover Elements
User-Definable Curve Element Setting Range: 0.50–50 A secondary, 0.01 A steps
Setting Range: 100–200% Accuracy, Steady State

Plus Transient: ±5% of setting, ±0.10 A
Pickup Accuracy: ±1% of set point
Maximum Pickup/Dropout
Reset Time-Delay Range: 0.040–6000 s Time: 1.25 cyc + Arate + 2.5 ms
Timing Accuracy: ±0.1% ±0.1% of curve time ±5 ms Time-Delay Range: 0.00–100.00 s, 0.01-s steps

Specifications
Directional Overpower/Underpower Element (32) Pickup Accuracy: Harmonic filtering is run every 5 s
Operating Quantities: OFF, 3PmF, 3QmF,3PqpF, 3QqpF Time-Delay Accuracy: ±0.1% of setting ±0.005 seconds
(m = S, T, U, Y, G Harmonic Filtering
qp = ST, TU, UW, WX) Accuracy Range: 20–80 Hz of tracked frequency
Setting Range Split-Phase Element (60P/N)
5 A: –2000.00 to 2000.00 VA, 0.02 VA, sec
Setting Range
steps
5 A Nominal: 0.1–100 A, sec, 0.01 A sec step
1 A: –400.00 to 400.00 VA, 0.02 VA, sec steps
1 A Nominal: 0.02–20 A, sec, 0.01 A sec steps
Pickup Accuracy: ±3% of setting and ±5 VA, power factor
>±0.5 at nominal frequency 0.2 A Nominal: 0.01–4 A, sec, 0.01 A sec steps
Time-Delay Range: 0.000–400 s Time-Delay Range: 0.000–400 s
Time-Delay Accuracy: ±0.1% of setting ±5 ms Time-Constant Range: 1–2400 s
Impedance-Based Loss of Field Element (40Z) Pickup Accuracy: ±1% of setting
Zone 1 Time-Delay Accuracy: ±0.1% of setting ±5.0 ms
Setting Range, Mho Diameter 100% Stator Ground Element (64G)
5 A Nominal: OFF, 0.1–100 ohms, sec Setting Range, Voltage: 0.1-150.0 volts sec
1 A Nominal: OFF, 0.5–500 ohms, sec Pickup Accuracy: ±3% of setting, ±0.1 V
Setting Range, Offset Reactance Setting Range, Power Supervision
5 A Nominal: –50.0 to 0 ohms, sec 5 A Nominal: OFF, 1.00–2000 VA sec, 0.01 VA steps
1 A Nominal: –250.0 to 0 ohms, sec 1 A Nominal: OFF, 0.20–400 VA sec, 0.01 VA steps
Pickup Accuracy: ±3% at an impedance angle of –90 Time-Delay Range: 0.000–400 s
degrees Time-Delay Accuracy: ±0.1% of setting ±5.0 ms
Zone 2
Field Ground Element (64F)
Setting Range, Mho Diameter
Setting Range: OFF, 0.5–200 kilohms
5 A Nominal: OFF, 0.1–100 ohms, sec
Pickup Accuracy: Defined by the SEL-2664
1 A Nominal: OFF, 0.5–500 ohms, sec
Time-Delay Range: 0.000–400 seconds
Setting Range, Offset Reactance
Time-Delay Accuracy: ±0.1% of setting ±5.0 ms
5 A Nominal: –50.0 to 50 ohms, sec
Injection-Based Stator Ground Element (64S)
1 A Nominal: –250.0 to 250 ohms, sec
Setting Range: OFF, 0.1–10 kilohms
Setting Range, Supervision
Angle: –20.0 to 0 deg in 0.1 deg steps Pickup Accuracy: Defined by the SEL-2664S
Pickup Accuracy: ±3% at an impedance angle of –90 Time-Delay Range: 0.000–400 seconds
degrees Time-Delay Accuracy: ±0.1% of setting ±5.0 ms
Time-Delay Range: 0.000–400 s Out-of-Step Element (78)
Time-Delay Accuracy: ±0.1% of setting ±0.005 s Setting Range, Mho and Blinder Reach
PQ-Based Loss of Field Element (40P) 5 A Nominal: 0.05 to 100 ohms, sec
Setting Range, Zones 1, 2, 4 1 A Nominal: 0.25 to 500 ohms, sec
5 A Nominal: –2000.00 to –1.00 VA sec, 0.01 VA sec Setting Range, Current Supervision
step
5 A Nominal: 1.00–100 A, sec
1 A Nominal: –400.00 to –0.20 VA, sec, 0.01 VA sec
step 1 A Nominal: 0.20–20 A, sec
Setting Range, Zones 2 and 4 Time-Delay Range, OOS: 0.000–1 s

(Ranges Depend on GCC Point Specifying) Time-Delay Range, Trip: 0.000–1 s
5 A Nominal: –2000.00 to 2000.00 VA sec, 0.01 VA sec Time-Delay Range, Trip
steps Duration: 0.000–5 s
1 A Nominal: –400.00 to 400.00 VA sec, 0.01 VA sec Setting Range, Generator
steps Slip Counter: 1–5
Pickup Accuracy: ±3% of setting and ±5 VA, power factor > Setting Range, System Slip
±0.5 at nominal frequency Counter: OFF, 1–10
Time-Delay Range: 0.000–400 s Setting Range, Total Slip
Time-Delay Accuracy: ±0.1% of setting ±0.005 s Counter: OFF, 1–10
Current Unbalance Element (46) Time-Delay Range, Slip

Counter Reset: 0.000–1 s
Operate Quantity: I2GP, I2GPEQ
Setting Range %: OFF, 2–100
Level 1 Delay: 0.000–1000.000 s
Level 2 Time Dial: 1–100 s

Specifications
Accuracy (Steady State) Phase Current Angle

5 A Nominal: ±5% of setting plus ±0.01 A for SIR 5 A Model: ±0.6°in the current range (0.05–0.5) •
(source to line impedance ratio) < 30 INOM
±10% of setting plus ±0.01 A for 30  ±0.2°in the current range (0.5–3.0) •
SIR  60 INOM
1 A Nominal: ±5% of setting plus ±0.05 A for SIR 1 A Model: ±0.6°in the current range (0.05–0.5) •
(source to line impedance ratio) < 30 INOM
±10% of setting plus ±0.05 A for 30  ±0.2°in the current range (0.5–3.0) •
SIR  60 INOM
Transient Overreach: <5% of setting plus steady-state accuracy 0.2 A Model: ±1.5°in the current range (0.05–0.5) •
INOM
±0.3°in the current range (0.5–3.0) •
Load Encroachment Element INOM
Setting Range, Impedance Reach Sequence Current Magnitude
5 A Nominal: 0.05 to 64 ohms, sec 5 A Model: ±0.3% plus ±4 mA (0.5–100 A s)
1 A Nominal: 0.25 to 320 ohms, sec 1 A Model: ±0.3% plus ±0.8 mA (0.1–20 A s)
Setting Range, Forward Sequence Current Angle
Load Angle: –90.0 to 90 deg All Models: ±0.3°
Setting Range, Reverse
Load Angle: 90.0 to 270 deg
Voltages
300 V Maximum Inputs
Impedance Accuracy: ±3%
Phase and Phase-to-Phase ±2.5% ±1 V (5–33.5 V)
Voltage Magnitude: ±0.1% (33.5–300 V)
Bay Control Phase and Phase-to-Phase ±1.0° (5–33.5 V)
Breakers: 4 maximum Angle: ±0.5° (33.5–300 V)
Disconnects (Isolators): 10 maximum Sequence Voltage Magnitude ±2.5%, ±1 V (5–33.5 V)
(V1, V2, 3V0): ±0.1% (33.5–300 V)
Time-Delay Range: 0.020–2000 s, 5 ms step
Sequence Voltage Angle ±1.0° (5–33.5 V)
Time-Delay Accuracy: ±0.1% of setting ±5.0 ms (V1, V2, 3V0): ±0.5° (33.5–300 V)
Station DC Battery System Monitor Power
Rated Voltage: 15–300 Vdc MW (P), Per Phase (Wye), 3 (Wye or Delta) Per Terminal
Operational Voltage Range: 0–350 Vdc ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (1)
Input Sampling Rate: 2 kHz ±0.7% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (3)
Processing Rate: 5 ms MVAr (Q), Per Phase (Wye), 3 (Wye or Delta) Per Terminal
Operating Time: 1.5 seconds (element dc ripple) ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 0, 0.5 lead, lag (1)
30 ms(all elements but dc ripple) ±0.7% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 0, 0.5 lead, lag (3)
Setting Range MVA (S), Per Phase (Wye), 3 (Wye or Delta) Per Terminal
DC Settings: 1 Vdc Steps (OFF, 15–300 Vdc) ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (1)
±0.7% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (3)
AC Ripple Setting: 1 Vac Steps (1–300 Vac)
PF, Per Phase (Wye), 3 (Wye or Delta) Per Terminal
Pickup Accuracy: ±10% ±2 Vdc (dc ripple)
±3% ±2 Vdc (all elements but dc ripple) ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (1)
Metering Accuracy
Energy
All metering accuracies are based on an ambient temperature of 20°C
and nominal frequency. MWh (P), Per Phase (Wye), 3 (Wye or Delta)
Absolute Phase-Angle Accuracy ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 1, 0.5 lead, lag (1)
IA, IB, and IC per
Terminal: 0.2 A, 1 A, and 5 A MVARh (Q), Per Phase (Wye), 3 (Wye or Delta)
VA, VB, and VC Per ±1% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 0, 0.5 lead, lag (1)
Terminal: ±0.125° ±0.7% (0.1–1.2) • INOM, 33.5–300 Vac, PF = 0, 0.5 lead, lag (3)
Currents Demand/Peak Demand Metering
Phase Current Magnitude Time Constants: 5, 10, 15, ..., 250, 255, 300 minutes
5 A Model: ±0.2% plus ±4 mA (0.05–3.0) • INOM IA, IB, and IC per ±0.2% ±0.0008 • INOM,
Terminal: (0.1–1.2) • INOM
1 A Model: ±0.2% plus ±0.8 mA (0.05–3.0) • INOM
3I2 per Terminal
0.2 A Model: ±0.2% plus ±0.8 mA (0.05–0.5) • INOM
3I0 (IG) per Terminal ±0.3% ±0.0008 • INOM,
±0.2% plus ±0.4 mA (0.5–3.0) • INOM
(Wye-Connected Only): (0.1–20) • INOM

Specifications
Optional RTD Elements

(Models Compatible With SEL-2600 Series RTD Module)
24 RTD inputs via SEL-2600 Series RTD Module and SEL-2800
Fiber-Optic Transceiver
Monitor Ambient or Other Temperatures
PT 100, NI 100, NI 120, and CU 10 RTD-Types Supported, Field
Selectable
As long as 500 m Fiber-Optic Cable to SEL-2600 Series RTD Module
Synchrophasor
Number of Synchrophasor
Data Streams: 5
Number of Synchrophasors for Each Stream:
24 Phase Synchrophasors (6 Voltage and 18 Currents)
8 Positive-Sequence Synchrophasors (2 Voltage and 6 currents)
Number of User Analogs
for Each Stream: 16
Number of User Digitals
for Each Stream: 64
Synchrophasor Protocol: IEEE C37.118-2011, 2014a
Synchrophasor Data Rate: As many as 60 messages per second
Synchrophasor Accuracy
Voltage Accuracy: ±1% Total Vector Error (TVE)
Range 30–150 V, fNOM ±5 Hz
Current Accuracy: ±1% Total Vector Error (TVE)
Range (0.1–2.0) • INOM A, fNOM ±5 Hz
Synchrophasor Data Records as much as 120 s
Recording: IEEE C37.232-2011, File Naming
Convention
Breaker Monitoring
Running Total of
Interrupted Current (kA)
per Pole: ±5% ±0.02 • INOM
Percent kA Interrupted for
Trip Operations: ±5%
Percent Breaker Wear per
Pole: ±5%
Compressor/Motor Start
and Run Time: ±1 s
Time Since Last Operation: ±1 day

Instruction Manual
S E C T I O N 2
Installation
The first steps in applying the SEL-400G Advanced Generator Protection System
are installing and connecting the relay. This section describes installation require-
ments for the physical configurations of the SEL-400G.
To install and connect the relay safely and effectively, you must be familiar with
relay configuration features and options and relay jumper configuration. You
should carefully plan relay placement, cable connections, and relay communica-
tion. This section also contains drawings of typical ac and dc connections to the
SEL-400G (see AC/DC Connection Diagrams on page 2.39). Use these drawings
as a starting point for planning your particular relay application. Consider the fol-
lowing when installing the SEL-400G.
➤ Shared Configuration Attributes on page 2.1
➤ Plug-In Boards on page 2.10
➤ Jumpers on page 2.11
➤ Relay Placement on page 2.17
➤ SEL-2664 and SEL-2664S Application on page 2.18
➤ SEL-2664/SEL-2664S/SEL-400G Communication Configuration on
page 2.20
➤ Connection on page 2.27
➤ AC/DC Connection Diagrams on page 2.39
It is also very important to limit access to the SEL-400G settings and control
functions by using passwords. For information on relay access levels and pass-
words, see Changing the Default Passwords in the Terminal on page 3.11 in the
SEL-400 Series Relays Instruction Manual.
For more introductory information on using the relay, see Section 2: PC Software
and Section 3: Basic Relay Operations in the SEL-400 Series Relays Instruction
Manual.
Shared Configuration Attributes

There are common or shared attributes among the many possible configurations
of the SEL-400G. This section discusses the main shared features of the relay.
Relay Sizes
SEL produces the 8U relay in rack-mount versions. The relay has provision for
two additional I/O boards. Relay sizes correspond to height in rack units, U,
where U is approximately 44.45 mm (1.75 in).

2.2 Installation
Front-Panel Templates
Front-panel templates are the same for all sizes of the relay. Figure 2.1 illustrates
an example front-panel templates. The front panel has three pockets for slide-in
labels: one pocket for the target LED labels, and two pockets for the operator
control labels. Figure 2.1 shows the front-panel pocket areas and openings for
typical relay orientations; dashed lines denote the pocket areas. Refer to the
instructions included in the Configurable Label kit for information on reconfigur-
ing front-panel LED and pushbutton labels.
SCHWEITZER
ENGINEERING
SEL–400G ENABLED
TARGET
LABORATORIES PROTECTION AUTOMATION CONTROL RESET
PORT F TRIP
87 GEN DIFF GENBKR TRIP
87 GSU DIFF FIELD TRIP
REF PMVR TRIP
24 VOLTS/HZ AUX TRIP
64 STA GND GEN ONLINE
64 FLD GND 46 CUR UNB
40 LOF 49 THERMAL
ESC 32 REV PWR 27/59 VOLT

ENT
81 O/U FREQ 60 LOP
78 OOS
SYS BACKUP
GENBKR FAIL
Figure 2.1 SEL-400G Front Panel
Rear Panels
Figure 2.3 shows the 8U rear panel with Connectorized inputs.
Connector Types
Screw-Terminal Connectors—I/O and Battery Monitor/Power
Connection to the relay I/O and Monitor/Power terminals on the rear panel is
through screw-terminal connectors. You can remove the entire screw-terminal
connector from the back of the relay to disconnect relay I/O, dc battery monitor,
and power without removing each wire connection. The screw-terminal connec-
tors are each uniquely keyed (see Figure 2.31) and will only fit into one slot on

Installation 2.3
the rear panel. In addition, the receptacle key prevents you from inverting the
screw-terminal connector. This feature makes relay removal and replacement eas-
ier.
Secondary Circuit Connectors

Fixed Terminal Blocks
Connect CT and PT inputs to the fixed terminal blocks in the bottom two rows of
the relay rear panel. You cannot remove these terminal blocks from the relay rear
panel. These terminals offer a secure high-reliability connection for CT and PT
secondaries.
Connectorized
The Connectorized SEL-400G features receptacles that accept plug-in/plug-out
connectors for terminating CT and PT inputs. This requires ordering a Connec-
torized wiring harness kit (SEL-WA0487E) with mating plugs and wire leads.
Figure 2.3 shows the relay with Connectorized CT and PT analog inputs (see
Connectorized on page 2.33 for more information).
10/100BASE-T EIA-232
1 1
9 9
PORT 3 PORT 2
LNK LNK LNK LNK 1
ACT PORT 5A ACT PORT 5B ACT PORT 5C ACT PORT 5D TIME IRIG–B PORT 1
BAY 1 BAY 2 BAY 3 BAY 4
OUT01 OUT02 OUT03 OUT04 OUT05 OUT06 OUT07 OUT08 OUT09 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 IN01 IN02 IN03 IN04 IN05 IN06 IN07 IN08
200 200
B 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 B
300 300
C 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 C
400 400
D 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 D
IAS IBS ICS IAT IBT ICT IAU IBU ICU VAV VBV VCV MONITOR POWER
VV1 VV2 VV3 Vdc 1
+ – + /H – /N
GND
Y 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Y
25 26 27 28 29 30 31 196-1984.A
IAW IBW ICW IAX IBX ICX IAY IBY ICY VAZ VBZ VCZ
IY1 IY2 IY3 VZ2
Z 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Z
196-1986.A
Figure 2.2 Rear Panel With Fixed Terminal Blocks

2.4 Installation
10/100BASE-T / 100BASE-FX EIA-232

1 1
9 9
PORT 3 PORT 2
LNK LNK LNK LNK 1
ACTPORT 5A ACT PORT 5B ACTPORT 5C ACT PORT 5D TIME IRIG–B PORT 1
BAY 1 BAY 2 BAY 3 BAY 4
IN04 IN05 IN06 IN07 IN08 IN09 IN10 IN11 IN12 COM IN16 IN17 IN18 IN19 IN20 IN21 IN22 IN23 IN24 COM
OUT01 OUT02 OUT03 OUT04 OUT05 OUT06 OUT07 OUT08 IN01 IN02 IN03 IN13 IN14 IN15
200 HS HS HS HS HS HS 200
B 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 B
IN04 IN05 IN06 IN07 IN08 IN09 IN10 IN11 IN12 COM IN16 IN17 IN18 IN19 IN20 IN21 IN22 IN23 IN24 COM
OUT01 OUT02 OUT03 OUT04 OUT05 OUT06 OUT07 OUT08 IN01 IN02 IN03 IN13 IN14 IN15
300 HS HS HS HS HS HS 300
C 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 C
OUT01 OUT02 OUT03 OUT04 OUT05 OUT06 OUT07 OUT08 IN01 IN02 IN03 IN04 IN05 IN06 IN07 IN08
400 HS HS HS HS HS HS HS HS 400
D 01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 D
IAS IBS ICS IAT IBT ICT IAU IBU ICU VAV VAV MONITOR POWER
VV1 VV1 Vdc 1
19 20 + – + /H – /N
VBV VBV
VV2 VV2
21 22 GND
VCV VCV
VV3 VV3
Y 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 23 24 Y
25 26 27 28 29 30 31 196-1983.A
IAW IBW ICW IAX IBX ICX IAY IBY ICY

IY1 IY2 IY3 VAZ VAZ
19 20
VBZ VBZ
VZ2 VZ2
21 22
VCZ VCZ
Z 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 23 24 Z
196-1985.A
Figure 2.3 Rear Panel Connectorized
Secondary Circuits
The SEL-400G presents a low burden load on the CT secondaries and PT second-
aries. The relay accepts the following five sets of three-phase CT inputs:
➤ IAS, IBS, and ICS
➤ IAT, IBT, and ICT
➤ IAU, IBU, and ICU
➤ IAW, IBW, and ICW
➤ IAX, IBX, and ICX
If the Y terminals is configured as Y, a sixth three-phase CT input is available as
follows:
IAY, IBY, and ICY
WARNING If the Y terminals is configured as 1PH, then the relay also accepts the following
Before working on a CT circuit, first three single-phase CT inputs, primarily for restricted earth fault protection: IY1,
apply a short to the secondary wind- IY2, and IY3.
ing of the CT.
For 5 A terminals, the rated nominal input current, INOM, is 5 A. For 1 A termi-
nals, the rated nominal input current, INOM, is 1 A. For 0.2 A terminals, the

Installation 2.5
rated nominal input current, INOM, is 0.2 A. Continuous input current for both
relay types is 3 • INOM (or 4 • INOM as high as 55°C). See AC Current Inputs
(Secondary Circuits) on page 1.18 for complete CT input specifications.
The relay also accepts the following two sets of three-phase potentials from
power system PT or CCVT (capacitor-coupled voltage transformer) secondaries.
➤ VAV, VBV, and VCV
➤ VAZ, VBZ, and VCZ
The SEL-400G supports several variations of VT configurations and connections.
See Configuration of Voltage Inputs on page 5.3 for more information.
The nominal line-to-neutral input voltage for the PT inputs is 67 volts with a
range of 0–300 volts, and a burden of less than 0.1 VA at 125 volts, L-N. PT con-
nections can be four-wire (wye) or open-delta connections.
Control Inputs
The SEL-400G inputs on the I/O interface boards (INT2, INT4, INT7, INT8, or
INTD I/O boards) are fixed pickup threshold, optoisolated, control inputs. Spec-
ify the pickup voltage level for each board when you order the relay. Use these
inputs for monitoring change-of-state conditions of power system equipment.
Inputs can be independent or common. Independent inputs have two separate
ground-isolated connections, with no internal connections among inputs. Com-
mon inputs share one input leg in common; all input legs of common inputs are
ground-isolated. Each group of common inputs is isolated from all other groups.
Nominal current drawn by these inputs is 8 mA or less with six voltage options
covering a wide range of voltages, as listed in Interface Board (I/O) Options on
page 1.12. You can debounce the control input pickup delay and dropout delay
separately for each input, or you can use a single debounce setting that applies to
all the contact input pickup and dropout times (see Global Settings on page 8.2).
AC Control Signals
Optoisolated control inputs can be used with ac control signals, within the ratings
shown in Interface Board (I/O) Options on page 1.12. Table 2.1 shows the spe-
cific pickup and dropout time-delay settings necessary when applying ac to the
inputs.
Table 2.1 Required Settings for Use With AC Control Signalsa
Relay Recognition Time

Global
Description Entryb for AC Control Signal
Settings
State Change
INnmmPUc Pickup Delay 2.5 ms 10 ms

INnmmDOc Dropout Delay 17.5 ms 20 ms
a
First set Global setting EICIS := Y to gain access to the individual input pickup and dropout timer
settings.
b These are the only setting values that SEL recommends for detecting ac control signals. Other
values may result in inconsistent operation.
c Where n is 1 for Interface Board 1, 2 for Interface Board 2, and 3 for Interface Board 3; mm is the
number of available contact inputs depending on the type of board.

2.6 Installation
Control Outputs
I/O control outputs from the relay include standard outputs, hybrid (high-current
interrupting) outputs, and high-speed high-current interrupting outputs. Form A
(normally open) output contacts are individually isolated, and Form C outputs
share a common connection between the NC (normally closed) and NO (nor-
mally open) contacts.
The relay updates control outputs every 2.5 ms. Updating of relay control outputs
does not occur when the relay is disabled. When the relay is reenabled, the con-
trol outputs assume the state that reflects the protection processing at that instant.
Standard Control Outputs

The standard control outputs are dry Form A (NO) contacts rated for tripping
NOTE: You can use ac or dc circuits
with standard control outputs. duty. Ratings for Standard outputs are 30 A make, 6 A continuous, and 0.75 A or
less break (depending on circuit voltage). Standard contact outputs have a maxi-
mum voltage rating of 250 Vac/330 Vdc. Maximum break time is 6 ms with a
resistive load. The maximum pickup time for the standard control outputs is
6 ms. Figure 2.4 shows a representative connection for a Form A standard control
output on the main board I/O terminals.
OUT04
O7
O8
Figure 2.4 Standard Control Output Connection
See Control Outputs on page 2.6 for complete standard control output specifica-
tions.
Hybrid (High-Current Interrupting) Control Outputs

CAUTION The hybrid (high-current interrupting) control outputs are polarity-dependent and
Equipment damage can result from are capable of interrupting high-current, inductive loads. Hybrid control outputs
connecting ac circuits to hybrid (high- use an insulated gate bipolar junction transistor (IGBT) in parallel with a
current interrupting) control outputs.
Do not connect ac circuits to hybrid mechanical contact to interrupt (break) highly inductive dc currents. The contacts
control outputs. Use only dc circuits can carry continuous current while eliminating the need for heat sinking and pro-
with hybrid control outputs.
viding security against voltage transients.
With any hybrid output, break time varies according to the L/R (circuit inductive/
resistive) ratio. As the L/R ratio increases, the time needed to interrupt the circuit
fully increases also. The reason for this increased interruption delay is that circuit
current continues to flow through the output MOV after the output deasserts until
all of the inductive energy dissipates. Maximum dropout (break) time is 6 ms
with a resistive load, the same as for the standard control outputs. The other rat-
ings of these control outputs are similar to the standard control outputs, except
that the hybrid outputs can break current as great as 10 A. Hybrid contact outputs
have a maximum voltage rating of 330 Vdc.

Installation 2.7
The maximum contact closing time for the hybrid control outputs is 6 ms.
Figure 2.5 shows a representative connection for a Form A hybrid control output
on the main board I/O terminals.
OUT01
+
O1
O2
Figure 2.5 Hybrid Control Output Connection
See Control Outputs on page 2.6 for complete hybrid control output specifica-
tions.
High-Speed, High-Current Interrupting Control Outputs

In addition to the standard control outputs and the hybrid control outputs, the
INT4 and INT8 I/O interface boards offer high-speed high-current interrupting
control outputs. An MOV protects against excess voltage transients for each con-
tact. These control outputs have a resistive load contact closing time of 10 s,
which is much faster than the 6 ms contact closing time of the standard and
hybrid control outputs. The high-speed contact outputs open at a maximum time
of 8 ms. The maximum voltage rating is 250 Vac/330 Vdc. See Control Outputs
on page 2.6 for more information.
Figure 2.6 shows a representative connection for a Form A high-speed contact
output on the INT4 I/O interface terminals. The HS marks are included to indi-
cate that this is a high-speed control output.
OUT01
HS
01
02
Figure 2.6 INT4 High-Speed Control Output Connection (Three Terminals)
Figure 2.7 shows a representative connection for a Form A fast hybrid control
output on the INT8 I/O interface terminals.
The INT8 high-speed contact output uses three terminal positions, while the
INT4 high-speed contact output uses two. The third terminal of each INT8 high-
speed control output is connected to precharge resistors that can be used to miti-
gate transient inrush current conditions, as explained below. A similar technique
can be used with INT4 board high-speed control outputs using external resistors.
Short transient inrush current can flow at the closing of an external switch in
series with open high-speed contacts. This transient will not energize the circuits
in typical relay-coil control applications (trip coils and close coils), and standard
auxiliary relays will not pick up. However, an extremely sensitive digital input or

2.8 Installation
light-duty, high-speed auxiliary relay can pick up for this condition. This false
pickup transient occurs when the capacitance of the high-speed output circuitry
charges (creating a momentary short circuit that a fast, sensitive device sees as a
contact closure). A third terminal (03 in Figure 2.7) provides an internal path for
precharging the high-speed output circuit capacitance when the circuit is open.
1 MΩ
03
1 MΩ
02
01
Figure 2.7 High-Speed Control Output Typical Terminals, INT8
Figure 2.8 shows some possible connections for this third terminal that will elim-
inate the false pickup transients when closing an external switch. In general, you
must connect the third terminal to the dc rail (positive or negative) that is on the
same side as the open external switch condition. If an open switch exists on either
side of the output contact, then you can accommodate only one condition because
two open switches (one on each side of the contact) defeat the precharge circuit.
(+) (+)
01
Load
02 03
02 03
01
Load
(–) (—)
Precharge Circuit
Path Internal to High
Speed Control Output
Figure 2.8 Precharging Internal Capacitance of High-Speed Output

Contacts, INT8
For wiring convenience, on the INT8 I/O Interface Board, the precharge resistors
shown in Figure 2.8 are built into the I/O board, and connected to a third termi-
nal. On the INT4 I/O Interface Board, there are no built-in precharge resistors,
and each high-speed control output has only two terminal connections.
IRIG-B Inputs
The SEL-400G has a regular IRIG-B timekeeping mode, and a high-accuracy
IRIG-B timekeeping mode. The IRIG-B serial data format consists of a 1-second
frame containing 100 pulses divided into fields, from which the relay decodes the
second, minute, hour, and day fields and sets the internal time clock upon detect-
ing valid time data in the IRIG time mode. There is one IRIG-B input on the
SEL-400G rear panel, capable of supporting the HIRIG mode.

Installation 2.9
IRIG-B Pins of Serial Port 1

This IRIG-B input is capable of regular IRIG mode timekeeping only. Timing
accuracy for the IRIG time mode is 500 µs.
IRIG-B BNC Connector

This IRIG-B input is capable of both modes of timekeeping. If the connected
timekeeping source is qualified as high-accuracy, the relay enters the HIRIG
mode, which has a timing accuracy of 1 µs. If both inputs are connected, the
SEL-400G will use the IRIG-B BNC connector signal if a signal is detected.
Battery-Backed Clock
If relay input power is lost or removed, a lithium battery powers the relay clock,
providing date and time backup. The battery is a 3 V lithium coin cell, Rayovac
no. BR2335 or equivalent. If power is lost or disconnected, the battery discharges
to power the clock. At room temperature (25°C), the battery will operate for
approximately 10 years at rated load.
When the SEL-400G is operating with power from an external source, the self-
discharge rate of the battery is very small. Thus, battery life can extend well
beyond the nominal 10-year period because the battery rarely discharges after the
relay is installed. The battery cannot be recharged.
If the relay does not maintain the date and time after power loss, replace the bat-
tery (see Replacing the Lithium Battery on page 10.27 in the SEL-400 Series
Relays Instruction Manual).
Communications Interfaces
The SEL-400G has several communications interfaces you can use to communi-
cate with other intelligent electronic devices (IEDs) via EIA-232 ports: PORT 1,
PORT 2, PORT 3, and PORT F. See Section 10: Communications Interfaces for more
information and options for connecting your relay to the communications inter-
faces.
An optional Ethernet card provides Ethernet capability for the SEL-400G. An
Ethernet card gives the relay access to popular Ethernet networking standards
including TCP/IP, FTP, Telnet, DNP3, IEEE C37.118 Synchrophasors, and
IEC 61850 over local area and wide area networks (the Ethernet card with
IEC 61850 support is available at purchase as a factory-installed option). For
information on DNP3 applications, see Section 16: DNP3 Communication in the
SEL-400 Series Relays Instruction Manual. For information on Modbus TCP
applications, see Modbus TCP Communication on page 10.59. For more informa-
tion on IEC 61850 applications, see Section 17: IEC 61850 Communication in
the SEL-400 Series Relays Instruction Manual.

2.10 Installation
Plug-In Boards
Plug-In Boards
The SEL-400G is available in 8U (option of three interface boards).
An optional Ethernet plug-in communications card allows you to use TCP/IP,
FTP, Telnet, DNP3, LAN/WAN, and IEC 61850 applications on an Ethernet net-
work. This card is only available at the time of purchase of a new SEL-400G as a
factory-installed option or as a factory-installed conversion to an existing relay.
I/O Interface Boards

You can choose among five input/output interface boards (INT2, INT4, INT7,
INT8, and INTD) for I/O. Figure 2.9–Figure 2.12 show the rear screw-terminal
connectors of these interface boards.
Figure 2.9 I/O Interface Board INT2
Figure 2.13 I/O Interface Board INTD
I/O of the interface boards vary by the type and amount of output capabilities.
Table 2.2 lists the inputs of the I/O interface boards, and Table 2.3 lists the out-
puts of the I/O interface boards.

Installation 2.11
Jumpers
Table 2.2 Control Inputs
Board Independent Contact Pairs Common Contacts
INT2, INT7, and INT8 8

INT4, INTD 6 Two sets of 9
Table 2.3 Control Outputs
Standard Fast Hybrida Hybridb

Board
Form A Form C Form A Form A
INT2 13 2
INT4 2 6
INT7 2 13
INT8 8
INTD 8
a
High-speed/high-current interrupting.
b High-current interrupting.
Ethernet Card Option

You can add Ethernet communications protocols to the SEL-400G by purchasing
the Ethernet card option. Factory-installed in the rear relay Port 5, the Ethernet
card provides Ethernet ports for industrial applications that process data traffic
between the SEL-400G and a LAN.
Jumpers
The SEL-400G contains jumpers that configure the relay for specific operating
modes. These jumpers are located on the main board (the top board) and the I/O
interface boards (one or two boards located immediately below the main board).
Main Board Jumpers

The jumpers on the main board of the relay perform these functions:
➤ Temporary/emergency password disable
➤ Circuit breaker and disconnect control enable
➤ Rear serial port +5 Vdc source enable
Figure 2.15 shows the positions of the main board jumpers. The main board
jumpers are in two locations. The password disable jumper and circuit breaker
control jumper are at the front of the main board. The serial port jumpers are on
the EIA-232 card.
Password and Circuit Breaker Jumpers

You can access the password disable jumper and circuit breaker control jumper
without removing the main board from the relay cabinet. Remove the SEL-400G
front cover to view these jumpers (use appropriate ESD precautions). The pass-
word and circuit breaker jumpers (position number J18) are located on the front
of the main board, immediately left of the power connector (see Figure 2.14).

2.12 Installation
Jumpers
CAUTION There are four jumpers denoted D, BREAKER, PASSWORD, and A from left to
Do not install a jumper on Positions A right (position D is on the left). Position PASSWORD is the password disable
or D of the main board J18 header. jumper; position BREAKER is the circuit breaker control enable jumper. Posi-
Relay misoperation can result if you
install jumpers on positions J18A or tions D and A are for SEL use. Figure 2.14 shows the jumper header with the cir-
J18D. cuit breaker/control jumper in the ON position and the password jumper in the
OFF position; these are the normal jumper positions for an in-service relay.
Table 2.4 lists the jumper positions and functions.
OFF
ON
BREAKER
PASSWORD
D
Power Connector
5 4 3 2 1
OFF
J18
ON
9 8 7 6
D C B A
Jumper Location
Figure 2.14 Jumper Location on the Main Board
Table 2.4 Main Board Jumpersa
Jumper Jumper
Jumper Function
Location Position
A Front OFF For SEL use only

PASSWORD Front OFF Enable password protection
(normal and shipped position)
ON Disable password protection
(temporary or emergency only)
BREAKER Front OFF Disable circuit breaker commands
(OPEN and CLOSE) and output PULSE
commandsb (shipped position)
ON Enable circuit breaker command (OPEN and
CLOSE) and output PULSE commandsb
D Front OFF For SEL use only
a ON is the jumper shorting both pins of the jumper location. Place the jumper over one pin only for
OFF.
b Also affects the availability of the Fast Operate Breaker Control Messages and the front-panel
LOCAL CONTROL > BREAKER CONTROL and LOCAL CONTROL > OUTPUT TESTING
screens.
The password disable jumper, PASSWORD, is for temporary or emergency sus-

pension of the relay password protection mechanisms. Under no circumstance
should you install PASSWORD on a long-term basis. The SEL-400G ships with
password disable jumper PASSWORD OFF (passwords enabled).
The circuit breaker control enable jumper, BREAKER, supervises the CLOSE n
command, the OPEN n command, the PULSE OUTnnn command, and front-
panel local bit control. To use these functions, you must install Jumper
BREAKER. The relay checks the status of the circuit breaker control jumper
when you issue CLOSE n, OPEN n, PULSE OUTnnn, and when you use the
front panel to close or open circuit breakers, control a local bit, or pulse an out-
put. The SEL-400G ships with circuit breaker Jumper BREAKER OFF. For com-

Installation 2.13
Jumpers
missioning and testing of the SEL-400G contact outputs, it may be convenient to

set BREAKER ON, so that the PULSE OUTnnn commands can be used to
check output wiring. BREAKER must also be set ON if SCADA control of the
circuit breaker via Fast Operate is required, or if the LOCAL CONTROL > BREAKER
CONTROL screens are going to be used.
Analog Connector
Analog Connector
J12
J6
Bay Connector
Battery
I/O Connector
Bay Connector
HMI Connector
Bay Connector
Power Connector
J18
A
PASSWORD
Bay Connector
BREAKER
D
PORT F
Figure 2.15 Major Component Locations on the SEL-400G Main Board

2.14 Installation
Jumpers
Serial Port Jumpers

Place jumpers on the EIA-232 board to connect +5 Vdc to Pin 1 of each of the
three rear-panel EIA-232 serial ports. The maximum current available from this
Pin 1 source is 0.5 A. The Pin 1 source is useful for powering an external modem.
Table 2.5 describes the JMP1 and JMP2 positions. Refer to Figure 2.15 for the
locations of these jumpers. The relay ships with JMP1A, JMP2A, and JMP2B
OFF (no +5 Vdc on Pin 1).
Table 2.5 Serial Port Jumpers
Jumper Jumper A or Jumper

Function
Label Jumper B Positiona
JMP1 A OFF Serial PORT 1, Pin 1 = not connected

ON Serial PORT 1, Pin 1 = +5 Vdc
B — Not used
JMP2 A OFF Serial PORT 2, Pin 1 = not connected
B OFF Serial PORT 3, Pin 1 = not connected
a
ON is the jumper shorting both pins of the jumper. Place the jumper over one pin only for OFF.
Changing Serial Port Jumpers

You must remove the main board to access the serial port jumpers. Perform the
following steps to change the JMP2, JMP3, and JMP4 jumpers in an SEL-400G.
Step 1. Follow your company standard to remove the relay from service.
Step 2. Disconnect power from the SEL-400G.
DANGER Step 3. Retain the GND connection, if possible, and ground the equipment to
Contact with instrument terminals can an ESD mat.
cause electrical shock that can result
in injury or death. Step 4. Remove the communications cable connected to the front-panel
serial port, if applicable.
WARNING Step 5. Remove the rear-panel EIA-232 PORTS mating connectors.
Have only qualified personnel service
this equipment. If you are not quali-
fied to service this equipment, you can Unscrew the keeper screws and disconnect any serial cables
injure yourself or others, or cause connected to the Port 1, Port 2, and Port 3 rear-panel receptacles, as
equipment damage.
well as the BNC and Ethernet connectors.
CAUTION Step 6. Remove all Ethernet and IRIG-B connections.
Equipment components are sensitive
to electrostatic discharge (ESD). Step 7. Loosen the four front-panel screws (they remain attached to the front
Undetectable permanent damage can panel), and remove the relay front panel.
result if you do not use proper ESD
procedures. Ground yourself, your Step 8. Remove the 34-pin ribbon cable from the front panel by pushing the
work surface, and this equipment
before removing any cover from this extraction ears away from the connector.
equipment. If your facility is not
equipped to work with these compo- Step 9. Disconnect the power, interface board, and analog input board cables
nents, contact SEL about returning from the main board.
this device and related SEL equipment
for service. Step 10. Carefully pull out the drawout assembly containing the main board.
Step 11. Locate the jumper you want to change.
Jumpers JMP2, JMP3, and JMP4 are located at the rear of the main
board, directly in front of Port 3, Port 2, and Port 1, respectively (see
Figure 2.15).
Step 12. Install or remove the jumper as needed (see Table 2.5 for jumper
position descriptions).

Installation 2.15
Jumpers
Step 13. Reinstall the SEL-400G main board and reconnect the power,
interface board, and analog input board cables.
Step 14. Reconnect the cable removed in Step 7 and reinstall the relay front-
panel cover.
Step 15. Reattach the rear-panel connections.
Step 16. Reconnect any serial, BNC, or Ethernet cables that you removed
from the relay in the disassembly process.
Step 17. Follow your company standard procedure to return the relay to
service.
I/O Interface Board Jumpers

Jumpers on the I/O interface boards identify the particular I/O board configura-
tion and I/O board control address. Five I/O interface boards are available: INT2,
INT4, INT7, INT8, and INTD. The jumpers on these I/O interface boards are at
the front of each board, as shown in Figure 2.16.

2.16 Installation
Jumpers
Figure 2.16 Top to Bottom: INT2, INT4, INT7, INT8, and INTD With Jumper Locations Indicated
To confirm the positions of your I/O board jumpers, remove the front panel and
visually inspect the jumper placements. Table 2.6 lists the four jumper positions
for I/O interface boards. Refer to Figure 2.16 for the locations of these jumpers.

Installation 2.17
Relay Placement
The I/O board control address has a hundreds-series prefix attached to the control
inputs and control outputs for that particular I/O board chassis slot. A 6U chassis
has a 200-addresses slot for inputs IN201, IN202, etc., and outputs OUT201,
OUT202, etc. A 7U chassis has a 200-addresses slot and a 300-addresses slot.
The drawout tray on which each I/O board is mounted is keyed. See Installing
Optional I/O Interface Boards on page 10.29 in the SEL-400 Series Relays
Instruction Manual for information on the key positions for the 200-addresses
slot trays and the 300-addresses slot trays.
Table 2.6 I/O Board Jumpers
I/O Board
JMP1A/ JMP1B/ JMP2A/ JMP2B/
Control
JMP49Aa JMP49Ba JMP50Aa JMP50Ba
Address
2XX OFF OFF OFF OFF

3XX ON OFF ON OFF
4XX OFF ON OFF ON
a INT4 I/O interface board jumper numbering.
Relay Placement
Proper placement of the SEL-400G helps make certain that you receive years of
trouble-free power system protection. Use the following guidelines for proper
physical installation of the SEL-400G.
Physical Location
You can mount the SEL-400G in a sheltered indoor environment (a building or an
enclosed cabinet) that does not exceed the temperature and humidity ratings for
the relay.
The relay is rated at Installation/Overvoltage Category II and Pollution Degree 2.
This rating allows mounting the relay indoors or in an outdoor (extended) enclo-
sure where the relay is protected against exposure to direct sunlight, precipita-
tion, and full wind pressure, but neither temperature nor humidity are controlled.
You can place the relay in extreme temperature and humidity locations. The tem-
perature range over which the relay operates is –40° to +185°F (–40° to +85°C,
see Operating Temperature on page 1.20). The relay operates in a humidity range
from 5 percent to 95 percent, no condensation, and is rated for installation at a
maximum altitude of 2000 m (6560 ft) above mean sea level.
Rack Mounting
The semiflush mount results in a small panel protrusion from the relay rack rails
of approximately 27.9 mm (1.1 in).
See Figure 2.17 for exact mounting dimensions. Use four screws of the appropri-
ate size for your rack.

2.18 Installation
SEL-2664 and SEL-2664S Application
RACK-MOUNT CHASSIS PANEL-MOUNT CHASSIS
*10.48 *10.48
[266.3] [266.2]
TOP TOP #10-32
STUD
1.12 1.12
[28.4] [28.6]
19.80
19.00
[502.9]
[482.6]
13.97 11.00 15.40

FRONT FRONT SIDE
[354.8] [279.4] [391.2]
3.00
[76.2]
18.31
[465.1]
17.63
Ø0.25
[447.8]
[6.4]
13.85 11.00
*ADD 0.30 [7.6] FOR CONNECTORIZED RELAYS PANEL CUTOUT
[351.8] [279.4]
3.00
[76.2]
LEGEND 18.31
in [465.1]
[mm] i9377a
Figure 2.17 SEL-400G Chassis Dimensions
Panel Mounting
Place the panel-mount versions of the SEL-400G in a switchboard panel. See the
drawings in Figure 2.17 for panel cut and drill dimensions (these dimensions
apply to both the horizontal and vertical panel-mount relay versions). Use the
supplied mounting hardware to attach the relay.

The SEL-400G is equipped with protecting the generator stator winding from
ground fault for 100 percent of the stator windings. The 64G1 element in the
SEL-400G uses the fundamental frequency generator neutral voltage to protect as
much as 95 percent of the stator winding, while the 64G2 and 64G3 elements
protect the remaining stator winding by using the third-harmonic component of
the machine.
In addition to the stator winding ground fault that is based on 64G elements, the
SEL-400G uses 64S logics to protect the generator from a ground fault at stator
winding. It also uses the 64F logic to protect the field winding.

Installation 2.19
The 64S and 64F elements operate based on subscribed insulation resistor values
from the SEL-2664S Stator Ground Protection Relay and the SEL-2664 Field
Ground Module. The SEL-2664S is connected to the generator neutral and
injects a multi-sine current (I_SRC). Injecting a subharmonic signal onto the sta-
tor requires the SEL-2664S to be connected to the stator winding either through
the neutral grounding transformer (NGT) when the neutral grounding resistor
(NGR) is located on the NGT secondary (Figure 2.18) or through a voltage trans-
former of sufficient thermal rating if the NGR is connected between ground and
the generator neutral point (Figure 2.19). For complete guidance on SEL-2664S
application design and settings considerations, see the SEL-2664S Stator Ground
Protection Relay Instruction Manual.
NGT
SEL-2664S
I_SRC
D02/VN
NGR
D01/NN
CTN
X1 X2 2-C Twisted Pair.

Do not ground the
CTN leads.
C02
IN
C01
Figure 2.18 AC Connections With NGR on the Secondary Side of the Neutral
Grounding Transformer
Neutral Voltage
Transformer
SEL-2664S
I_SRC
D02/VN
NGR
D01/NN
X2
C02
CTN IN
X1
C01
2-C Twisted Pair. Do not
ground the CTN leads.
Figure 2.19 AC Connections With NGR Between the Generator Neutral Point
and Ground
From the injected I_SRC, the SEL-2664S calculates the insulation resistance and
capacitances and make them available to the SEL-400G through GOOSE mes-
sages. The SEL-2664 Field Ground Module directly measures the field insulation
resistance and sends it to the SEL-2664S, where the SEL-2664S makes it avail-
able as a GOOSE message for the SEL-400G. Note in Figure 2.20, the SEL-2664
is connected to the SEL-2664S.

2.20 Installation
SEL-2664/SEL-2664S/SEL-400G Communication Configuration
SEL-2664S
Vn_X10 Re(Vn_X10)
Samples Im(Vn_X10) INS_RES
INS_CAP
IEC 61850 Interface
IEC 61850 Interface

I_SRC Multifrequency Re(ISRC)
Samples DFT Voltage Im(ISRC) Impedance RA[256]
and Current Calculation SEL-400G
[Real and
Imaginary]
64kOK
IN
Samples Re(IN)
Im(IN) FLDRES (Rf)
SEL-2812MR/MT
Fiber ST
Connection k = S, F
q
SEL-2664
q The SEL-2664 can either connect directly to Port 2 of the SEL-2664S (see
Figure 2.21) or through an SEL-2812MR/MT to Port 3.
Figure 2.20 Insulation Resistance and Capacitance Received From SEL-2664S
The SEL-400G subscribes to SEL-2664S as a remote measurement device to

directly collect three analog values and one digital quality bit as GOOSE mes-
sages via IEC-61850 protocol. The two SEL-2664S calculated analog values are
the stator insulation resistor INS_RES and capacitor INS_CAP. The other analog
is the SEL-2664 measured field resistor FLDRES value that was directly sent to
the SEL-2664S from the SEL-2664. All three analogs are mapped to remote ana-
log RA[256] to be available in the SEL-400G for logic operation and metering
purposes. In addition to the three analogs, a digital quality bit that is programed
in the SEL-2664S to indicate the quality of the analogs made available.
SEL-2664/SEL-2664S/SEL-400G Communication
Configuration
The SEL-400G can receive stator insulation resistance and capacitance (as well
as other signals) from an SEL-2664S over a communications channel. In addi-
tion, the SEL-400G can receive field insulation resistance from an SEL-2664 via
the SEL-2664S. These signals can then be mapped to the injection-based stator
ground fault function (64S) and the field ground fault function (64F). These sig-
nals can also be assigned to the analog signal profiling function and to event
reporting.
The physical communications connections are shown in Figure 2.21. The Ether-
net Port 5 of the SEL-400G is connected to Port 1 of the SEL-2664S. A duplex,
multimode fiber-optic cable (SEL-C808) can be used for this connection. The
serial port (TX) on the SEL-2664 is connected to the RX of Port 2 of the
SEL-2664S. A simplex, multimode fiber-optic cable (SEL-C807) is used for this
connection.

Installation 2.21
SEL-400G SEL-C808 Multimode

Fiber-Optic Cable
Ethernet Switch
SEL-C807 62.2/200 m PORT 1: Dual Fiber-Optic

Multimode Fiber-Optic Cable PORT 2: Fiber-Optic
Ethernet Ports
EIA-232 Serial Ports
Can Use 1A or 1B
SEL-2664 SEL-2664S
Figure 2.21 Communication Connection Between the SEL-400G, SEL-2664S,

and SEL-2664
The IEC 61850 protocol is used for communications between the SEL-400G and
the SEL-2664S. After establishing communications between the two relays, use
ACSELERATOR Architect SEL-5032 Software to map the logical nodes in the
SEL-400G IED capability description (ICD) file for GOOSE receive and
SEL-2664S data set for transmit.
The SEL-400G IEC 61850 compatibility library provides the logical nodes for
the stator insulation resistance and capacitance streamed directly from the
SEL-2664S and for the field insulation resistance indirectly sent from the
SEL-2664 via the SEL-2664S. The SEL-2664 transmits the measured field insu-
lation resistance to the SEL-2664S, and the subscribing unit, the SEL-400G,
receives this measurement from the SEL-2664S along with the stator insulation
resistance and capacitance measured values.
As Table 2.7 indicates, the SEL-400G IEC 61850 library describes the functional
constraint, the logical nodes, and their attributes. The three analog signals avail-
able to the SEL-400G as GOOSE messages are mapped using Architect to be
received and mapped to remote analogs. There is also a quality bit (SV01) that
provides an indication to the SEL-400G on the health of the analog data.
Table 2.7 SEL-2664S Logical Device: ANN (Annunciation)
Logical Node Attribute Data Source Comment
Functional Constraint = MX
RESGGIO16 AnIn01.instMag.f INS_RES Stator Insulation Resistance
RESGGIO16 AnIn02.instMag.f INS_CAP Stator Insulation Capacitance
RESGGIO16 AnIn04.instMag.f FLDRES Field Insulation Resistance
Functional Constraint = ST
SVGGIO3 Ind01.stVal–Ind08.stVal SV01–SV08 SELOGIC Variables (SV01)
The following steps summarize the process of configuring each relay for trans-
mission and reception of the items listed in Table 2.7 by using Architect.

2.22 Installation
Step 1. In the Architect project editor (Figure 2.22), add the two devices
(SEL-400G and SEL-2664S) and enter the communications details
for each device.
Figure 2.22 Project Editor
Step 2. From the project editor, select the Datasets tab (Figure 2.23) and
select New.

Installation 2.23
Figure 2.23 Project Editor Dataset Selection
Step 3. Referring to Table 2.7, select the appropriate functional constraint

(Figure 2.24) and drag and drop the four data attributes to the
window on the right. Make a note of the name and description fields.
Use an identifiable name and description for your project.
Figure 2.24 Dataset Editor

2.24 Installation
Step 4. Select the GOOSE Transmit tab and select New.
Figure 2.25 GOOSE Transmit Editor
Step 5. From GOOSE transmit window (Figure 2.26), open the Datasets tab
at the bottom of the window and select the data set name as it was set
on the data set editor at Figure 2.24. Fill out the message name and
GOOSE ID and configure the address data.

Installation 2.25
Figure 2.26 GOOSE Transmit Editor for Dataset
Step 6. Highlight on the SEL-400G device from the left window and select
GOOSE Receive (Figure 2.27). Collapse the SEL-2664S tab from
the middle window and drag all three analog GOOSE attributes to the
right side of the window under RA for remote analogs.
Figure 2.27 GOOSE Receive Editor for Remote Analogs
Step 7. Do the same to the fourth item in the list (digital quantity) under VB
for virtual bit (Figure 2.28).

2.26 Installation
Figure 2.28 GOOSE Receive Editor for Virtual Bits
Step 8. Select OK on (Figure 2.26) and right-click SEL-2664S under the

project name (Figure 2.27) and select Send CID. Make sure the CID
file is saved in the SEL-2664S by typing GOOSE on the terminal.
Figure 2.29 Sending CID to SEL-400G
Step 9. Right-click SEL-400G under the project name and select SEND
CID (Figure 2.29). Make sure the CID file is saved in the SEL-400G
by typing GOOSE on the terminal.

Installation 2.27
Connection
Step 10. To verify the reception of insulation resistance and capacitance for
metering or 64S and 64F logic operations, map the received remote
analogs to the analog quantities of 64S and 64F and map the received
digital virtual bit to 64S and 64F quality bit settings as shown.
PORT 5
E61850 := Y
EGSE := Y
From group settings
E64S := Y
E64F := Y
64FIRM := RA001
64FIQ := VB001
64SIRM := RA002
64SICM := RA003
64SIQ := VB002
Map RA[256] to PMVnn and map VBnn to PSVnn to show the received analog
and digital quantities through MET PMV.
The fundamental metering in the MET G command displays the resistance and
capacitance values of the stator and field insulations as they are received by the
SEL-400G. The total operating time to update changing values including the con-
figurable time delay could be as long as 500 ms.
Insulation Resistance Insulation Capacitance
Stator (kOhms) ----- Stator (uF) -----

Field (kOhms) --------
=>>
Connection
CAUTION The SEL-400G is available in many different configurations, depending on the
Insufficiently rated insulation can number and type of control inputs, control outputs, and analog input termination
deteriorate under abnormal operat- you specified at ordering. This section presents a representative sample of relay
ing conditions and cause equipment
damage. For external circuits, use wir- rear-panel configurations and the connections to these rear panels.
ing of sufficiently rated insulation that
will not break down under abnormal When connecting the SEL-400G, refer to your company plan for wire routing
operating conditions.
and wire management. Be sure to use wire that is appropriate for your installation
with an insulation rating of at least 90°C.
Rear-Panel Layout
Figure 2.2–Figure 2.3 show some of the available SEL-400G rear panels.
All relay versions have screw-terminal connectors for I/O, power, and battery
monitor. You can order the relay with fixed terminal blocks for the CT and PT
connections, or you can order SEL Connectorized rear-panel configurations that
feature plug-in/plug-out PT connectors and shorting CT connectors for relay ana-
log inputs.

2.28 Installation
Connection
The screw-terminal connections for the INT2 and the INT7 I/O interface boards
are the same. The INT8 I/O interface board has control output terminals grouped
in threes, with the fourth terminal as a blank additional separator (Terminals 4, 8,
12, 16, 20, 24, 28, and 32). The INT4 and INT8 I/O interface boards both contain
fast hybrid control outputs, but use a different terminal layout—see Control Out-
puts on page 2.6 for details.
For more information on the main board control inputs and control outputs, see
IRIG-B Inputs on page 2.8. For more information on the I/O interface board con-
trol inputs and control outputs, see I/O Interface Board Jumpers on page 2.15.
Rear-Panel Symbols
There are important safety symbols on the rear of the SEL-400G (see
Figure 2.30). Observe proper safety precautions when you connect the relay at
terminals marked by these symbols. In particular, the danger symbol located on
the rear panel corresponds to the following: Contact with instrument terminals
can cause electrical shock that can result in injury or death. Be careful to limit
access to these terminals.
Danger (Caution, Grounding AC/DC Input Symbol DC Input Symbol

risk of danger) Terminal
Symbol Symbol
Figure 2.30 Rear-Panel Symbols
Screw-Terminal Connectors
Terminate connections to the SEL-400G screw-terminal connectors with ring-
type crimp lugs. Use a #8 ring lug with a maximum width of 9.1 mm (0.360 in).
The screws in the rear-panel screw-terminal connectors are #8-32 binding-head,
slotted, nickel-plated brass screws. Tightening torque for the terminal connector
screws is 1.0 Nm to 2.0 Nm (9 in-lb to 18 in-lb).
You can remove the screw-terminal connectors from the rear of the SEL-400G by
unscrewing the screws at each end of the connector block. Perform the following
steps to remove a screw-terminal connector.
Step 1. Remove the connector by pulling the connector block straight out.
Note that the receptacle on the relay circuit board is keyed; you can
insert each screw-terminal connector in only one location on the rear
panel.
Step 2. To replace the screw-terminal connector, confirm that you have the
correct connector and push the connector firmly onto the circuit
board receptacle.
Step 3. Reattach the two screws at each end of the block.
Changing Screw-Terminal Connector Keying

You can rotate a screw-terminal connector so that the connector wire dress posi-
tion is the reverse of the factory-installed position (for example, wires entering
the relay panel from below instead of from above). In addition, you can move
similar function screw-terminal connectors to other locations on the rear panel.
To move these connectors to other locations, you must change the screw-terminal
connector keying. Inserts in the circuit board receptacles key the receptacles for

Installation 2.29
Connection
only one screw-terminal connector in one orientation. Each screw-terminal con-

nector has a missing web into which the key fits (see Figure 2.31). If you want to
move a screw-terminal connector to another circuit board receptacle or reverse
the connector orientation, you must rearrange the receptacle keys to match the
screw-terminal connector block. Use long-nosed pliers to move the keys.
Figure 2.32 shows the factory-default key positions.
Webs Removed for Keying

(Receptacle Keys Fit Here)
Top View
Front View
Figure 2.31 Screw-Terminal Connector Keying

2.30
SEL-400G Relay
Installation
Connection
Figure 2.32
200-Addresses
Receptacles
A B C 1 2 3 A B C 1 2 3
Instruction Manual
300-Addresses
Receptacles
A B C 1 2 3 A B C 1 2 3 A B C 1 2 3
Rear-Panel Receptacle Keying

400-Addresses
Receptacles
A B C 1 2 3 A B C 1 2 3 A B C 1 2 3
Key Inserts
(One Pair for Each
Screw-Terminal Connector)
Date Code 20210708

Installation 2.31
Connection
Grounding
Connect the grounding terminal (#Y31) labeled GND on the rear panel to a rack
frame ground or main station ground for proper safety and performance. This
protective earthing terminal is in the lower right side of the relay panel. The sym-
bol that indicates the grounding terminal is shown in Safety Symbols on page xxii
in the Preface. Use 2.5 mm2 (14 AWG) or larger wire less than 2 m (6.6 ft) in
length for this connection. This terminal connects directly to the internal chassis
ground of the SEL-400G.
Power Connections
The terminals labeled POWER on the rear panel (#Y29 and #Y30) must connect to a
power source that matches the power supply characteristics that your SEL-400G
specifies on the rear-panel serial number label (see Power Supply on page 1.18,
for complete power input specifications). For the relay models that accept dc
input, the serial number label specifies dc with the symbol shown in Figure 2.30.
Terminal Y29 Terminal Y31

Terminal Y30
Figure 2.33 Power Connection Area of the Rear Panel
The POWER terminals are isolated from chassis ground. Use 0.8 mm2 (18 AWG)
NOTE: The combined voltages
applied to the POWER and MONITOR or larger wire to connect to the POWER terminals. Connection to external power
terminals must not exceed 600 V (rms must comply with IEC 60947-1 and IEC 60947-3 and must be identified as the
or dc).
disconnect device for the equipment. Place an external disconnect device, switch/
fuse combination, or circuit breaker in the POWER leads for the SEL-400G; this
device must interrupt both the hot (H/+) and neutral (N/–) power leads. The cur-
rent rating for the power disconnect circuit breaker or fuse must be 20 A maxi-
mum.
Operational power is internally fused by power supply Fuse F1. Table 2.8 lists the
SEL-400G power supply fuse requirements. Be sure to use fuses that comply
with IEC 127-2.
You can order the SEL-400G with one of three operational power input ranges
listed in Table 2.8. Each of the three supply voltage ranges represents a power
supply ordering option. As noted in Table 2.8, model numbers for the relay with
these power supplies begin 0487E3Xn (or 487E4Xn), where n is 2, 4, or 6, to
indicate low, medium, and high voltage input power supplies, respectively. Note
that each power supply range covers two widely used nominal input voltages.
The SEL-400G power supply operates from 30 Hz to 120 Hz when ac power is
used for the POWER input.

2.32 Installation
Connection
Table 2.8 Fuse Requirements for the Power Supply
Operational Model
Rated Voltage Fuse F1 Fuse Description
Voltage Range Number
24–48 Vdc 18–60 Vdc T5.0AH250V 5x20 mm, time-lag, 0487E3X2

5.0 A, high break or
capacity, 250 V 0487E4X2
48–125 Vdc or 38–140 Vdc or T3.15AH250V 5x20 mm, time-lag, 0487E3X4
110–120 Vac 85–140 Vac 3.15 A, high break or
(30–120 Hz) capacity, 250 V 0487E4X4
125–250 Vdc or 85–300 Vdc or T3.15AH250V 5x20 mm, time-lag, 0487E3X6
110–240 Vac 85–264 Vac 3.15 A, high break or
(30–120 Hz) capacity, 250 V 0487E4X6
The SEL-400G accepts dc power input for all power supply models. The 48–125 Vdc
supply also accepts 110–120 Vac; the 125–250 Vdc supply also accepts 110–240 Vac.
When connecting a dc power source, you must connect the source with the
proper polarity, as indicated by the + (Terminal #Y29) and – (Terminal #Y30) sym-
bols on the power terminals. When connecting to an ac power source, the + Ter-
minal #Y29 is hot (H), and the – Terminal #Y30 is neutral (N). Each model of the
SEL-400G internal power supply exhibits low power consumption and a wide
input voltage tolerance. For more information on the power supplies, see Power
Supply on page 1.18.
Monitor Connections (DC Battery)

The SEL-400G monitors one dc battery system. For information on the battery
monitoring function, see Station DC Battery System Monitor on page 7.19. Con-
nect the positive lead of the battery system to Terminal #Y25 and the negative lead
to Terminal #Y26. (Usually the battery system is also connected to the rear-panel
POWER input terminals.)
Secondary Circuit Connections

CAUTION The SEL-400G has five sets of three-phase current inputs, three single-phase cur-
Relay misoperation can result from
applying anything other than speci- rent inputs that can be reconfigured as a three-phase input, a three-phase voltage
fied secondary voltages and currents. input, and three single-phase voltage inputs that can be reconfigured as a three-
Before making any secondary circuit
connections, check the nominal volt-
phase voltage input. Shared Configuration Attributes on page 2.1 describes these
age and nominal current specified on inputs in detail. The alert symbol and the word DANGER on the rear panel indicate
the rear-panel nameplate. that you should use all safety precautions when connecting secondary circuits to
these terminals.
DANGER
Contact with instrument terminals
can cause electrical shock that can To verify these connections, use SEL-400G metering (see Metering on page 7.2).
result in injury or death. You can also review metering data in an event report that results when you issue
the TRIGGER command (see Triggering Data Captures and Event Reports on
page 9.7 in the SEL-400 Series Relays Instruction Manual).
Fixed Terminal Blocks

Each V and Y input has two labels corresponding to whether it is configured as a
three-phase (ABC) or a single-phase (123) input. Connect the secondary circuits
to the Y and Z terminal blocks on the relay rear panel. Note the polarity dots
above the odd-numbered terminals for CT inputs. Similar polarity dots are above
the odd-numbered terminals for PT inputs.

Installation 2.33
Connection
Connectorized
For the Connectorized SEL-400G, order the wiring harness kit, SEL-WA0487E.
The wiring harness contains eight prewired connectors for the relay current and
voltage inputs.
You can order the wiring harness with various wire sizes and lengths. Contact
your local Technical Service Center or the SEL factory for ordering information.
Perform the following steps to install the wiring harness:
Step 1. Plug the CT shorting connectors into terminals #Y01 through #Y18 and
#Z01 through #Z18 as appropriate.
Odd-numbered terminals are the polarity terminals.
Step 2. Secure the connector to the relay chassis with the two screws located
on each end of the connector.
When you remove the CT shorting connector, pull straight away
from the relay rear panel.
As you remove the connector, internal mechanisms within the
connector separately short each power system current transformer.
You can install these connectors in only one orientation.
Step 3. Plug the PT voltage connectors into terminals #Y19 to #Y24 for the
VV inputs, and #Z19 to #Z24 for the VZ inputs, as appropriate.
Odd-numbered terminals are the polarity terminals. You can install
these connectors in only one orientation.
Control Circuit Connections

You can configure the SEL-400G with many combinations of control inputs and
control outputs. See IRIG-B Inputs on page 2.8 and I/O Interface Boards on
page 2.10 for information about I/O configurations. This section provides details
about connecting these control inputs and outputs. Refer to Figure 2.2–Figure 2.4
for representative rear-panel screw-terminal connector locations.
Control Inputs
NOTE: The combined voltages Table 2.2 lists the control inputs available with the relay.
applied to the INnnn and OUTnnn
terminals must not exceed 600 V
(rms or dc).
Optoisolated
Optoisolated control inputs are not polarity sensitive. These inputs respond to
voltage of either polarity, and can be used with ac control signals when properly
configured.
Note that INTC and INTD I/O interface boards have two sets of nine inputs that
share a common leg (see Figure 2.9).
Assigning
To assign the functions of the control inputs, see Operating the Relay Inputs and
Outputs on page 3.54 in the SEL-400 Series Relays Instruction Manual for more
details. You can also use SEL Grid Configurator Software to set and verify oper-
ation of the inputs.

2.34 Installation
Connection
Control Outputs
The SEL-400G has the following three types of outputs:
➤ Standard outputs
➤ Hybrid (high-current interrupting) outputs
➤ High-speed, high-current interrupting (for example: INT4 board
OUT01). See Control Outputs on page 2.6 for more information.
You can connect the standard outputs and the high-speed, high-current interrupt-
ing outputs in either ac or dc circuits. Connect the high-current interrupting out-
puts to dc circuits only. The screw-terminal connector legends alert you about
these requirements by showing polarity marks on the hybrid (high-current inter-
rupting) contacts and HS marks on the high-speed, high-current interrupting con-
tacts. Two pairs of Form C contacts are on the main board.
Alarm Output
The relay monitors internal processes and hardware in continual self-tests. Also
see Relay Self-Tests on page 10.19 in the SEL-400 Series Relays Instruction Man-
ual. If the relay senses an out-of-tolerance condition, the relay declares a Status
Warning or a Status Failure. The relay signals a Status Warning by pulsing the
HALARM Relay Word bit (hardware alarm) to a logical 1 for five seconds. For a
status failure, the relay latches the HALARM Relay Word bit at logical 1.
To provide remote alarm status indication, connect the b contact of an output con-
tact to your control system remote alarm input. Figure 2.34 shows the configura-
tion of the a and b contacts of control output OUT215, using INT2 as an example.
a b
N/O N/C
(connect alarm here)
OUT215 C OUT215
Figure 2.34 Control Output OUT215 (INT2)
Program OUT215 to respond to NOT HALARM by entering the following

SELOGIC control equation with a communications terminal, with Grid Configu-
rator.
OUT215 := NOT HALARM
When the relay is operating normally, the NOT HALARM signal is at logical 1
and the b contacts of control output OUT215 are open.
When a status warning condition occurs, the relay pulses the NOT HALARM
signal to logical 0 and the b contacts of OUT215 close momentarily to indicate
an alarm condition.
For a status failure, the relay disables all control outputs and the OUT215 b con-
tacts close to trigger an alarm. Also, when relay power is off, the OUT215 b con-
tacts close to generate a power-off alarm. See Relay Self-Tests on page 10.19 in
the SEL-400 Series Relays Instruction Manual for information on relay self-tests.

Installation 2.35
Connection
The relay pulses the SALARM Relay Word bit for software programmed condi-
tions; these conditions include settings changes, access level changes, and alarm-
ing after three unsuccessful password entry attempts.
The relay also pulses the BADPASS Relay Word bit after three unsuccessful
password entry attempts.
You can add the software alarm SALARM to the alarm output by entering the
following SELOGIC control equation.
OUT215 := NOT (HALARM OR SALARM)
Tripping and Closing Outputs

To assign the control outputs for tripping, see Setting Outputs for Tripping and
Closing on page 3.60 in the SEL-400 Series Relays Instruction Manual. In addi-
tion, you can use the SET O command; see SET on page 9.7 for more details.
IRIG-B Input Connections

The SEL-400G accepts a demodulated IRIG-B signal through two types of rear-
panel connectors. These IRIG-B inputs are the BNC connector labeled IRIG-B and
Pin 4 (+) and Pin 6 (–) of the DB-9 rear-panel serial port labeled PORT 1. When
you use the PORT 1 input, ensure that you connect Pins 4 and 6 with the proper
polarity. See Communications Ports Connections on page 2.36 for other DB-9
connector pinouts and additional details.
These inputs accept the dc shift time-code generator output (demodulated)
IRIG-B signal with positive edge on the time mark. See Section 11: Time and
Date Management in the SEL-400 Series Relays Instruction Manual for more
information on IRIG-B inputs.
The PORT 1 IRIG-B input connects to a 2.5 k grounded resistor and goes through
a single logic signal buffer. The PORT 1 IRIG-B is equipped with robust ESD and
overvoltage protection but is not optically isolated. When you are using the PORT 1
input, ensure that you connect Pin 4 (+) and Pin 6 (–) with the proper polarity.
The IRIG network should be properly terminated with an external termination
resistor (SEL 240-1802, BNC Tee, and SEL 240-1800, BNC terminator, 50 ohm)
placed on the unit that is farthest from the source. This termination provides
impedance matching of the cable for the best possible signal-to-noise ratio.
Where distance between the SEL-400G and the IRIG-B sending device exceeds
the cable length recommended for conventional EIA-232 metallic conductor
cables, you can use transceivers to provide isolation and to establish communica-
tion to remote locations.
Conventional fiber-optic and telephone modems do not support IRIG-B signal
transmission. The SEL-2810 Fiber-Optic Transceiver/Modem includes a channel
for the IRIG-B time code. These transceivers enable you to synchronize time pre-
cisely from IRIG-B time-code generators (such as the SEL-2032 Communica-
tions Processor) over a fiber-optic communications link.
For ease of connection or for runs as long as 91.44 m (300 ft) between the
IRIG-B generator and the SEL-400G, use the BNC IRIG-B input to connect the
IRIG-B input of the SEL-400G to the IRIG-B generation equipment. Make this
connection with a 50-ohm coaxial cable assembly.

2.36 Installation
Connection
Communications Ports Connections

The SEL-400G has three rear-panel EIA-232 serial communications ports
labeled PORT 1, PORT 2, and PORT 3 and one front-panel port, PORT F (see
Section 10: Communications Interfaces). In addition, the rear panel features PORT
5 for an optional factory-installed Ethernet communications card. For additional
information about communications topologies and standard protocols that are
available in the SEL-400G, see Section 10: Communications Interfaces, DNP3
Communication on page 10.7, IEC 61850 Communication on page 10.28, and
Modbus TCP Communication on page 10.59.
Serial Ports
The SEL-400G serial communications ports use EIA-232 standard signal levels
in a DB-9 connector. To establish communication between the relay and a DTE
device (a computer terminal, for example) with a DB-9 connector, use an
SEL-C234A cable. Alternatively, you can use an SEL-C662 cable to connect to a
USB port.
Figure 2.32 shows the configuration of an SEL-C234A cable that you can use for
basic ASCII and binary communication with the relay. A properly configured
ASCII terminal, terminal emulation program, or Grid Configurator along with
the SEL-C234A cable provide communication with the relay in most cases.
9-Pin DTE
SEL-400G Relay Device
Pin Pin Pin Pin
Func. # # Func.
RXD 2 3 TXD
TXD 3 2 RXD
GND 5 5 GND
CTS 8 8 CTS
7 RTS
1 DCD
4 DTR
6 DSR
SHIELD
SHELL NO CONNECTION
Figure 2.35 SEL-400G to Computer DB-9 Connector Diagram
Serial Cables
CAUTION Using an improper cable can cause numerous problems or failure to operate, so
Severe power and ground problems you must be sure to specify the proper cable for application of your SEL-400G.
can occur on the communications Several standard SEL communications cables are available for use with the relay.
ports of this equipment as a result of
using non-SEL cables. Never use stan-
dard null-modem cables with this
equipment.

Installation 2.37
Connection
The following list provides additional rules and practices you should follow for
successful communication using EIA-232 serial communications devices and
cables.
➤ Route communications cables well away from power and control
circuits. Switching spikes and surges in power and control circuits
can cause noise in the communications circuits if power and control
circuits are not adequately separated from communications cables.
➤ Keep the length of the communications cables as short as possible to
minimize communications circuit interference and also to minimize
the magnitude of hazardous ground potential differences that can
develop during abnormal power system conditions.
➤ Ensure that EIA-232 communications cable lengths never exceed
15.25 m (50 ft), and always use shielded cables for communications
circuit lengths greater than 13.05 m (10 ft).
➤ Modems provide communication over long distances and give
isolation from ground potential differences that are present between
device locations (examples are the SEL-2800 series transceivers).
➤ Lower data speed communication is less susceptible to interference
and will transmit greater distances over the same medium than higher
data speeds. Use the lowest data speed that provides an adequate data
transfer rate.
Ethernet Network Connections

The optional Ethernet card for the relay can use either the connection on Port C or
Port D to operate on a network. These ports can work together to provide a pri-
mary and backup interface. Other operating modes (FIXED and SWITCHED)
are also available. The following list describes the Ethernet card port options.
➤ 10/100BASE-T. 10 Mbps or 100 Mbps communications using Cat 5
cable (category 5 twisted-pair) and RJ45 connector
➤ 100BASE-FX. 100 Mbps communications over multimode fiber-
optic cable using LC connector
Ethernet Card Rear-Panel Layout

Rear-panel layouts for the three Ethernet card port configurations are shown in
Figure 2.36–Figure 2.38.
CAUTION
Use of controls or adjustments, or per- LNK LNK LNK LNK
formance of procedures other than
those specified herein, may result in
hazardous radiation exposure.
WARNING ACT
PORT 5A ACT
PORT 5B ACT
PORT 5C ACT
PORT 5D
Do not perform any procedures or
adjustments that this instruction man- Figure 2.36 Four 100BASE-FX Port Configuration
ual does not describe.
WARNING LNK LNK LNK LNK

Incorporated components, such as
LEDs, transceivers, and laser emitters,
are not user serviceable. Return units
to SEL for repair or replacement.
ACT ACT
PORT 5A ACT PORT 5B PORT 5C ACT
PORT 5D
Figure 2.37 Four 10/100BASE-T Port Configuration

2.38 Installation
Connection
LNK LNK LNK LNK
ACT ACT ACT ACT

PORT 5A PORT 5B PORT 5C PORT 5D
Figure 2.38 100BASE-FX and 10/100BASE-T Port Configuration
Twisted-Pair Networks
While Unshielded Twisted Pair (UTP) cables dominate office Ethernet networks,
Shielded Twisted Pair (STP) cables are often used in industrial applications. The
SEL-400G Ethernet card is compatible with standard UTP cables for Ethernet
networks as well as STP cables for Ethernet networks.
Typically UTP cables are installed in relatively low-noise environments including
NOTE: Use caution with UTP cables
as these cables do not provide offices, homes, and schools. Where noise levels are high, you must either use
adequate immunity to interference in STP cable or shield UTP using grounded ferrous raceways such as steel conduit.
electrically noisy environments unless
additional shielding measures are
employed. Several types of STP bulk cable and patch cables are available for use in Ethernet
networks. If noise in your environment is severe, you should consider using fiber-
optic cables. We strongly advise against using twisted-pair cables for segments
that leave or enter the control house.
If you use twisted-pair cables, you should use care to isolate these cables from
sources of noise to the maximum extent possible. Do not install twisted-pair
cables in trenches, raceways, or wireways with unshielded power, instrumenta-
tion, or control cables. Do not install twisted-pair cables in parallel with power,
instrumentation, or control wiring within panels; rather, make them perpendicular
to the other wiring.
You must use a cable and connector rated as Category 5 (Cat 5) to operate the
twisted-pair interface (10/100BASE-T) at 100 Mbps. Because lower categories
are becoming rare and because you may upgrade a 10 Mbps network to
100 Mbps, we recommend using all Cat 5 components.
Some industrial Ethernet network devices use 9-pin connectors for STP cables.
The Ethernet card RJ45 connectors are grounded so you can ground the shielded
cable using a standard, externally shielded jack with cables terminating at the
Ethernet card.

Installation 2.39
AC/DC Connection Diagrams
IAS
Y01 Y02
IBS
Y03 Y04
ICS
Y05 Y06
52-HV
IAY
IY1
Z13 Z14
IBY
IY2
Z15 Z16
ICY
IY3
Z17 Z18
Generator
Step-Up IAU
Y13 Y14
IBU
Y15 Y16
ICU
Y17 Y18
VAV
VV1
Y19 Y20
VBV
VV2
Y21 Y22
VCV
VV3
Y23 Y24
IAW
Z01 Z02
IBW
Z03 Z04
ICW
Z05 Z06
52-LV
IAT
Y07 Y08
IBT
Y09 Y10
ICT
Y11 Y12
VAZ
Z19 Z20
VBZ
VZ2
Z21 Z22
VCZ
Z23 Z24
Generator
IAX
Z07 Z08
IBX
Z09 Z10
ICX
Z11 Z12
SEL-400G (partial)
Figure 2.39 Typical AC Connection Diagram

2.40 Installation
+DC –DC
52A
A21 IN A22
203
52B
A17 IN A18
201
52Bx 52-HV
closing A01 A02 CC
control
OUT201
52Ax
A05 A06
TC
OUT203
Generator
GSU Fault
Step-Up
A25 IN A26
205
52A NOTE:
A23 IN A24
204 Additional I/O and relay
logic may be necessary for
52B a specific application
A19 IN A20
202
52-LV
52Bx
closing A03 A04 CC
control
OUT202
52Ax
A07 A08
TC
OUT204
Turbine Fault
A27 IN A28
206
Exciter Fault
A29 IN A30
207 Generator
52b Field BKR
A31 IN A32
208
Trip Field BKR
OUT205 52Ax
A09 A10
TC
Trip Turbine
OUT206
A11 A12
Initiate
A14 OUT207 Transfer
A13 A15
Relay Trouble
OUT208 A17
Ann.
A16 A18
Figure 2.40 Typical DC Connection Diagram

Instruction Manual
S E C T I O N 3
Testing
This section provides guidelines for determining and establishing test routines for
the SEL-400G Advanced Generator Protection System. Follow the standard prac-
tices of your company in choosing testing philosophies, methods, and tools.
Section 10: Testing, Troubleshooting, and Maintenance in the SEL-400 Series
Relays Instruction Manual provides additional information related to testing.
Topics presented in this section include the following:
➤ Low-Level Test Interface on page 3.1
➤ Relay Test Connections on page 3.4
➤ Selected Element Tests on page 3.4
➤ Technical Support on page 3.52
➤ SEL-400G Relay Commissioning Test Worksheet on page 3.53
The SEL-400G is factory-calibrated; this section contains no calibration informa-
tion. If you suspect that the relay is out of calibration, contact your Technical Ser-
vice Center or the SEL factory.
Low-Level Test Interface

You can test the relay in two ways: by using secondary injection testing or by
applying low-magnitude ac voltage signals to the low-level test interface. This
section describes the low-level test interface between the calibrated input module
and the separately calibrated processing module.
Access the test interface by removing the relay front panel. At the right side of
the relay main board is the processing module. Inputs to the processing module
are multipin connectors J6 and J12, the analog or low-level test interface connec-
tions. Receptacle J12 is on the right side of the main board, with J6 located 5 cm
(2 in) behind J12; see Figure 2.15 for a locating diagram.
CAUTION Figure 3.1 shows the J12 low-level interface connections and signal scaling fac-
The relay contains devices sensitive to tors. The J6 interface has the same scaling factors as the front interface, but with
electrostatic discharge (ESD). Unde- the channel allocation shown in Figure 3.2. Remove the ribbon cable between the
tectable permanent damage can
result if you do not use proper ESD two modules to access the outputs of the input module and the inputs to the pro-
procedures. Ground yourself, your cessing module (relay main board). You can test the relay processing module by
work surface, and this equipment
before removing any cover from this using signals from a low-level test source, such as the SEL-RTS Low-Level
equipment. If your facility is not Relay Test System. Never apply voltage signals greater than 6.6 V peak-to-peak
equipped to work with these compo-
nents, contact SEL about returning
to the low-level test interface.
this device and related SEL equipment
for service.
NOTE: The relay front, I/O, and CAL

boards are not hot-swappable.
Remove all power from the relay
before altering ribbon cable
connections.

3.2 Testing
LOW-LEVEL TEST INTERFACE

-15V +15V N/C GND VBAT VCV VBV VAV ICU IBU IAU ICT IBT IAT ICS IBS IAS
-15V +15V GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
INPUT MODULE OUTPUT (J13) : 66 mV AT NOMINAL CURRENT (1 A OR 5 A)

1.25 Vdc AT NOMINAL 125 Vdc BATTERY
PROCESSING MODULE INPUT (J12) : 6.6 Vp-p MAXIMUM
U.S. PATENT 5,479,315 SEL-400G xxx-xxxx
Figure 3.1 Low-Level Test Interface J12
LOW-LEVEL TEST INTERFACE

-15V +15V N/C GND N/C VCZ VBZ VAZ ICY IBY IAY ICX IBX IAX ICW IBW IAW
-15V +15V GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
INPUT MODULE OUTPUT (J13) : 66 mV AT NOMINAL CURRENT (1 A OR 5 A or 0.2 A)

1.25 Vdc AT NOMINAL 125 Vdc BATTERY
PROCESSING MODULE INPUT (J6) : 6.6 Vp-p MAXIMUM
U.S. PATENT 5,479,315 SEL-400G xxx-xxxx
Figure 3.2 Low-Level Test Interface J6
Use signals from the low-level relay test system to test the relay processing mod-
ule. These signals simulate power system conditions, taking into account PT ratio
and CT ratio scaling. Use relay metering to determine whether the applied test
voltages and currents produce correct relay operating quantities. The UUT data-
base entries for the SEL-400G in the SEL-5401 Relay Test System Software are
shown in Table 3.1–Table 3.6.
Table 3.1 UUT Database Entries for SEL-5401 Relay Test System Software
(Analog Input Board Y)—5 A Relay
Channel Label Scale Factor Unit
1 IAS 75 A
2 IBS 75 A
3 ICS 75 A
4 IAT 75 A
5 IBT 75 A
6 ICT 75 A
7 IAU 75 A
8 IBU 75 A
9 ICU 75 A
10 VAV 150 V
11 VBV 150 V
12 VCV 150 V
(Analog Input Board Z)—5 A Relay (Sheet 1 of 2)
1 IAW 75 A
2 IBW 75 A
3 ICW 75 A

Testing 3.3
(Analog Input Board Z)—5 A Relay (Sheet 2 of 2)
4 IAX 75 A
5 IBX 75 A
6 ICX 75 A
7 IY1 75 A
8 IY2 75 A
9 IY3 75 A
10 VAZ 150 V
11 VBZ 150 V
12 VCZ 150 V
(Analog Input Board Y)—1 A Relay
1 IAS 15 A
2 IBS 15 A
3 ICS 15 A
4 IAT 15 A
5 IBT 15 A
6 ICT 15 A
7 IAU 15 A
8 IBU 15 A
9 ICU 15 A
10 VAV 150 V
11 VBV 150 V
12 VCV 150 V
(Analog Input Board Z)—1 A Relay
1 IAW 15 A
2 IBW 15 A
3 ICW 15 A
4 IAX 15 A
5 IBX 15 A
6 ICX 15 A
7 IY1 15 A
8 IY2 15 A
9 IY3 15 A
10 VAZ 150 V
11 VBZ 150 V
12 VCZ 150 V

3.4 Testing
Relay Test Connections
(Analog Input Board Z)—0.2 A (Terminal Y Only) Relay
1 IY1 3 A
2 IY2 3 A
3 IY3 3 A
Relay Test Connections

Figure 3.3 shows the test set and relay connections for three-phase current injection.
NOTE: The procedures specified in
this section are for initial relay testing
only. Follow your company policy for
connecting the relay to the power Current Source
system. A B C A B C N
N
WARNING
Before working on a CT circuit, first
apply a short to the secondary wind-
ing of the CT.
IAW IBW ICW IAX IBX ICX IY1 IY2 IY3

Z01 Z03 Z05 Z07 Z09 Z11 Z13 Z15 Z17
SEL-400G
(partial)
Z02 Z04 Z06 Z08 Z10 Z12 Z14 Z16 Z18
Figure 3.3 Test Connections for Balanced Load With Three-Phase Current
Sources
Figure 3.4 shows the test set and relay connections for three-phase voltage injection.
Voltage Source Voltage Source
VA VB VC VX VN VA VB VC VX VN
VAZ VBZ VCZ VV2 VAZ VCZ VV2

Z19 Z21 Z23 V21 Z19 Z23 V21
Z20 Z22 Z24 V22 Z20 Z24 V22
SEL-400G SEL-400G
(partial) (partial)
(A) PTCONZ = Y (B) PTCONZ = D, D1
Figure 3.4 Voltage Test Connections
Selected Element Tests

This section discusses tests of selected functions in the SEL-400G. These tests
are designed to show a method of testing a function in an easy way while at the
same time familiarizing you with other functions such as programming logic
functions, Sequential Event Recorder (SER), and the front panel. Each test starts

Testing 3.5
with the default settings to avoid unexpected results from previous programming
when testing other functions. This section provides tests for the following relay
elements:
➤ Volts/Hertz elements
➤ Directional power elements
➤ Capability-based loss of field elements
➤ Current unbalance elements
➤ 100 percent stator ground elements
➤ Universal differential elements
The following paragraphs describe when each type of test is performed, the goals
of testing at that time, and the relay functions that you need to test at each point.
This information is intended as a guideline for testing SEL relays.
Volts/Hertz
Although the V/Hz element offers definite-time and user-defined elements, this
test shows how to test the user-defined function. For this test, you program a
SELOGIC variable to assert LEDs on the front panel to indicate the status of the
V/Hz element. You also program the SER to record the status of the V/Hz ele-
ment, and then use these recorded values to calculate the element operating
time(s).
Figure 3.5(A) shows a curve with four points defined, and Figure 3.5(B) shows an
intermediate point Pt (107,?) between Point 24U1101 and Point 24U1102.
24U1101 (105,20) 24U1101 (105,20)
Pt (107,?)
Time (seconds)
Time (seconds)
24U1102 (110,10) 24U1102 (110,10)
24U1103 (115,5) 24U1103 (115,5)
24U1104 (120,2) 24U1104 (120,2)
V/Hz (percent) V/Hz (percent)

(A) (B)
Figure 3.5 User-Defined V/Hz Curve 1
Because the relay linearly interpolates these data points, use Equation 3.1 to cal-
culate the operating time for a V/Hz value of 107 percent.
t1 – t2 t1  P2 – t2  P1
t = -------------------  Pt + ----------------------------------------
P1 – P2 P2 – P1
Equation 3.1
where:
t1 = the operate time value of 24U1101 (20)
P1 = the percentage V/Hz value of 24U1101 (105)
t2 = the operate time value of 24U1102 (10)
P2 = the percentage V/Hz value of 24U1102 (110)
Pt = the percentage V/Hz value of 107 percent

3.6 Testing
20 – 10 20 • 110 – 10 • 105
t = ------------------------ • 107 + -------------------------------------------------
105 – 110 110 – 105
t = 16 seconds
Equation 3.2
Table 3.6 Settings to Test the V/Hz Elements
Setting
Setting Comments
Category
E24 = 1 Group Enable the V/Hz elements

2401 = VPMAXZF Group Set the operating quantity equal to the maxi-
mum phase-to-phase voltage for Terminal Z
24TC1 = 0 Group Disable the definite-time V/Hz elements
24CCS1 = UI Group Select user-defined curve
24U1TC1 = 1 Group Enable the logic for user-defined curves
24U1NP1 = 4 Group Specify a curve with 4 points
24U1101 = 105,20 Group Coordinates for Point 1
PSV01 = 24RPU1 > 105 Protection Logic PSV01 asserts when V/Hz exceeds 105 per-
(SET L) cent
PSV02 = 24RPU1 > 107 Protection Logic PSV02 asserts when V/Hz exceeds 107 per-
cent
PB1_LED = PSV01 Front panel Pushbutton LED 1 reports the status of
(SET F) PSV01
PB1_COL = AG Front panel LED is amber when PSV01 asserts, and green
when PSV01 deasserts
PB2_LED = PSV02 Front panel Pushbutton LED 2 reports the status of
PSV02
PB2_COL = AG Front panel LED is amber when PSV02 asserts, and green
when PSV02 deasserts
PSV01,“V/Hz picked up” Report (SER) Reports and time-stamps when PSV01 asserts
(SET R)
24U1T1,“V/Hz timed Report (SER) Reports and time-stamps when V/Hz ele-
out” ments times out

Testing 3.7
Figure 3.6 shows the group settings (Group 1) for this test.
=>>SET TE <Enter>
Group 1
Potential Transformer Data
PT connection for Term V (OFF,Y,D,D1,1PH) PTCONV := 1PH ?Y <ENTER>

PT connection for Term Z (Y,D,D1) PTCONZ := Y ? <ENTER>
PT Ratio Term V (1.0-10000) PTRV := 200.0 ?2000
<ENTER>
PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ?2000
<ENTER>
PT Nominal Voltage (L-L) Term V (30.00-300 V,sec) VNOMV := 110.00 ? <ENTER>
PT Nominal Voltage (L-L) Term Z (30.00-300 V,sec) VNOMZ := 110.00 ? <ENTER>
Current Transformer Data
CT Connection for Term Y (1PH,Y) CTCONY := 1PH ?Y <ENTER>

CT Ratio Term S (OFF,1.0-50000) CTRS := 4000.0 ?100 <ENTER>
CT Ratio Term T (OFF,1.0-50000) CTRT := 400.0 ?100 <ENTER>
CT Ratio Term U (OFF,1.0-50000) CTRU := 12000.0?100 <ENTER>
CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ?100 <ENTER>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ?100 <ENTER>
CT Ratio Term Y (OFF,1.0-50000) CTRY := OFF ?100 <ENTER>
Relay Configuration
Advanced Settings (Y,N) EADVS := N ? <ENTER>

En. Pump Storage (OFF or combo of S,T,U,W,X,Y,V,Z) EPS := OFF ? <ENTER>
Enable Sys Volt Term (OFF,V) ESYSPT := "V1" ?V <ENTER>
Enable Gen Neut Cur Terms (combo of W,X) EGNCT := "X" ?W,X <ENTER>
Enable System Cur Terms (OFF or combo of S,T,U,Y) ESYSCT := "S,T" ?S <ENTER>
En. Power Calc Term (OFF or S) EPCAL := "S" ?OFF <ENTER>
Enable Volts per Hertz Elements (N,1-2) E24 := 2 ?1 <ENTER>
Enable Synch. Check (OFF or S) E25 := "S" ?OFF <ENTER>
Enable Under Voltage Elements (N,1-6) E27 := N ? <ENTER>
Enable Directional Power (N,1-4) E32 := 1 ?N <ENTER>
Enable Loss of Field (OFF or combo of Z,P) E40 := "Z" ?OFF <ENTER>
Enable Current Unbalance Elements (N, 1-2) E46 := 1 ?N <ENTER>
Enable 50 Elements (OFF or S) E50 := OFF ? <ENTER>
Enable Inverse Time Overcurrent Elements (N,1-12) E51 := N ? <ENTER>
Enable Over Voltage Elements (N,1-6) E59 := 1 ?N <ENTER>
Enable 60P Split Phase Element (N,T,U,W,X,Y) E60P := N ? <ENTER>
Enable 60N Split Phase Element (N,Y1,Y2,Y3) E60N := N ? <ENTER>
Enable 64G Element (OFF or combo of G1,G2,G3) E64G := "G1,G3"?OFF <ENTER>
Enable 64F Field Ground Element (Y,N) E64F := N ? <ENTER>
Enable 64S Stator Ground Element (Y,N) E64S := N ? <ENTER>
Enable Out-of-Step Element (N,1B,2B) E78 := 1B ?N <ENTER>
Enable Frequency Elements (N,1-6) E81 := 2 ?N <ENTER>
Enable Accumulated Freq Elements (N,1-8) E81A := N ? <ENTER>
Enable Rate of Change of Freq Elements (N,1-6) E81R := N ? <ENTER>
Enable Differential Elements (N,1-2) E87 := 2 ?N <ENTER>
Enable REF Element (OFF or combo of Y1,Y2,Y3) EREF := "Y1" ?OFF <ENTER>
Enable Inad. Ener. Prot. (OFF or S) EINAD := "S" ?OFF <ENTER>
Enable Pole Open (OFF or S) EPO := "S,T" ?OFF <ENTER>
Load Encroachment (Y,N) ELOAD := N ? <ENTER>
Enable Loss of Potential (OFF or combo of V,Z) ELOP := "Z" ?OFF <ENTER>
Enable Brkr Fail. Prot. (OFF or S) EBFL := "S,T" ?OFF <ENTER>
Enable Brkr Flash Ovr. (OFF or S) EBFO := "S" ?OFF <ENTER>
Enable System Backup Protection (N,51C,51V,21P) EBUP := 21P ?N <ENTER>
Enable Demand Metering (N,1-10) EDEM := N ? <ENTER>
Enable Max/Min Metering (N,1-30) EMXMN := 12 ?N <ENTER>
Power System Data
Generator Max. MVA (1-5000 MVA) MVAGEN := 555 ? <ENTER>

Generator L-L Voltage (1.00-100 kV) KVGEN := 24.00 ? <ENTER>
Generator D-Axis Synch Reactance (0.100-4) XDGEN := 1.810 ? <ENTER>
Transformer Leakage Reactance (0.010-10) XTXFR := 0.042 ? <ENTER>
Equivalent System Reactance (0.010-10) XESYS := 0.200 ? <ENTER>
Frequency Tracking Sources
Frequency Source for Current Term S (G,S) FTSRCS := S ?G <ENTER>

Frequency Source for Current Term T (G,S) FTSRCT := S ?G <ENTER>
Frequency Source for Current Term U (G,S) FTSRCU := G ? <ENTER>
Frequency Source for Current Term W (G) FTSRCW := G ?
Frequency Source for Current Term X (G) FTSRCX := G ?
Frequency Source for Current Term Y (G,S) FTSRCY := G ? <ENTER>
Frequency Source for Voltage Term V (S) FTSRCV := S ?
Frequency Source for Voltage Term Z (G) FTSRCZ := G ?
Figure 3.6 Group Settings for the V/Hz Test

3.8 Testing
Volts per Hertz Element 1
24 Element 1 Operating Quantity 24O1 := VPMAXZF? <ENTER>

24 Element 1 Level 1 Pick Up (100-200%) 24D1P1 := 110 ? <ENTER>
24 Element 1 Level 1 Time Delay (0.040-6000 s) 24D1D1 := 10.000 ? <ENTER>
24 Element 1 Torque Control (SELogic Eqn)
24TC1 := 1
? 0 <ENTER>
24 Element 1 Level 2 Comp. Curve (OFF,DD,U1,U2) 24CCS1 := OFF ?U1 <ENTER>
Volts per Hertz Element 1 Level 2, User Defined Curve 1
24 Element 1 Curve 1 Torque Control (SELogic Eqn)

24U1TC1 := 1
?
24 Element 1 No. of Point on User 1 Curve (3-20) 24U1NP1 := 3 ?4 <ENTER>
24 Ele. 1 Cur. 1,Pnt. 01 (100-200%,0.040-6000 s)
24U1101 := 200, 400.000
? 105,20 <ENTER>
24 Ele. 1 Cur. 1,Pnt. 02 (100-200%,0.040-6000 s)
24U1102 := 200, 400.000
? 110,10 <ENTER>
24 Ele. 1 Cur. 1,Pnt. 03 (100-200%,0.040-6000 s)
24U1103 := 200, 400.000
? 115,5 <ENTER>
24 Ele. 1 Cur. 1,Pnt. 04 (100-200%,0.040-6000 s)
24U1104 := 200, 400.000
? 120,2 <ENTER>
24 Element 1 Curve 1 Reset Time (0.010-400 s) 24U1CR1 := 0.010 ? <ENTER>
Generator Monitoring Logic
Generator Online Logic (SELogic Eqn)

ONLINE := NA
? END <ENTER>
Group 1
Save settings (Y,N) ?Y <ENTER>

Saving Settings, Please Wait...........
Settings Saved
=>>
Figure 3.6 Group Settings for the V/Hz Test (Continued)
Figure 3.7 shows the Protection Logic setting for the test. Protection SELOGIC
variable PSV01 asserts when the analog output (24RPU1, see Equation 5.53)
exceeds 105 percent, and PSV02 asserts when 24RPU1 exceeds 107 percent.
Protection math variables PMV01 and PMV02 are included for easy monitoring
of the values 24RPU1 and VPMAXZF.
=>>SET L TE <Enter>
Protection 1
1: # BREAKER S OPEN AND CLOSE CMD

? >
21:
? PSV01:=24RPU1 > 105 <Enter>
22:
? PSV02:=24RPU1 > 107 <Enter>
23:
? PMV01:=24RPU1 <Enter>
24:
? PMV02:=VPMAXZF <Enter>
25:
? END <Enter>
Save settings (Y,N) ?Y <Enter>

Settings Saved
=>>
Figure 3.7 Logic Settings for the V/Hz Test
Program the front-panel pushbutton LEDs to indicate the status of PSV01 and
PSV02. Set the LED to show amber when PSV01 (PB1_LED) and PSV02
(PB2_LED) are asserted, and to show green when PSV01 and PSV02 are deas-
serted. Figure 3.8 shows the front-panel LED programming.

Testing 3.9
=>>SET F TE <Enter>
Front Panel
Front Panel Settings
Front Panel Display Time-Out (OFF,1-60 mins) FP_TO := 15 ?

Enable LED Asserted Color (R,G) EN_LEDC := G ?
Trip LED Asserted Color (R,G) TR_LEDC := R ?
Pushbutton LED 1 (SELogic Equation)
PB1_LED := NA
? PSV01 <Enter>
PB1_LED Assert & Deassert Color (Enter 2: R,G,A,O) PB1_COL := AO ?AG <Enter>
PB2_LED := NA
? PSV02 <Enter>
PB2_LED Assert & Deassert Color (Enter 2: R,G,A,O) PB2_COL := AO ?AG <Enter>
PB3_LED := NA
? END <Enter>

Settings Saved
=>>
Figure 3.8 Front-Panel Settings for the V/Hz Test
Use the SER to record the exact time when PSV01 and PSV02 assert, and when
the output from the V/Hz element (24U1T1) asserts. Calculate the operating time
of the V/Hz element by finding the difference between these two times.
Figure 3.9 shows the SER programming.
=>>SET R TE <Enter>
Report
SER Chatter Criteria
Automatic Removal of Chattering SER Points (Y,N) ESERDEL := N ? <Enter>
SER Points
(Relay Word Bit, Reporting Name, Set State Name, Clear State Name, HMI Alarm)
1:
? PSV01,"V/Hz picked up 105" <Enter>
2:
? PSV02,"V/Hz picked up 107" <Enter>
3:
? 24U1T1,"V/Hz timed out" <Enter>
4:
? END <Enter>

Settings Saved
=>>
Figure 3.9 SER Settings for the V/Hz Test
This concludes the settings and programming. At this point, pushbutton

PB1_LED and PB2_LED must both show green. Refer to Equation 5.53 to see
the logic that determines 24RPU and Figure 5.111 to see the logic that deter-
mines output 24U1T1. Notice that Equation 5.53 compares the maximum phase-

3.10 Testing
to-phase voltage with the nominal phase-to-phase voltage. To monitor 24RPU1

and VPMAXZF, perform a MET PMV command while running the test condi-
tions below.
Step 1. Connect an injection set as shown in Figure 3.4 to the PT Z
terminals.
Step 2. Calculate the line-to-line voltage for the nominal line-to-neutral
voltage of 63.5 V (63.5 • (3) = 110). Next, calculate 105 percent
and 107 percent of 110 V to determine the magnitude of VPMAXZF
that will cause PSV01 and PSV02 to assert. Start off by injecting the
voltage values shown in the Initial Voltage (105%) column in
Table 3.7.
Step 3. Slowly increase the A-Phase voltage until PB1_LED changes from
green to amber. Record this voltage value in Table 3.7. Perform a
MET PMV command and record the values of PMV01 and PMV02
in the table.
Step 4. Turn off the injection set.
Step 5. Clear the SER by typing SER C <Enter>. Enter Y <Enter> at the
prompt: Are you sure (Y/N)?
Table 3.7 Voltage Values
Initial Voltage Initial Voltage

Recorded Voltage Recorded Voltage
(105%) (107%)
VA = 68 0° VA = VA = 710° VA =
PMV01 = % PMV01 = %
PMV02 = V PMV02 = V
VB = 63.5–120° VB = 63.5–120° VB = 63.5–120° VB = 63.5–120°
VC = 63.5120° VC = 63.5120° VC = 63.5120° VC = 63.5120°
Step 6. Inject the relay with the recorded voltages for at least 22 seconds
(verify that PB1_LED is amber, and PB2_LED is green).
Step 7. Stop the injection and turn the test set off. Type SER <Enter> to see
the element assert and operate times, as shown in Figure 3.10.
=>>SER <Enter>
Relay 1 Date: 12/16/2019 Time: 11:45:25.880

Station A Serial Number: 1181300592
FID=SEL-400G-X581-V0-Z001001-D20191209
# DATE TIME ELEMENT STATE

2 12/16/2019 11:45:02.6000 V/Hz picked up 105 Asserted
1 12/16/2019 11:45:22.5850 V/Hz timed out Asserted
=>>
Figure 3.10 Element Assert and Operate Times (105%)
Because we are testing point (105,20), we expect the V/Hz element

to assert after 20 seconds. Calculate the trip time as follows:
Trip time = 11:45:22.5850 – 11:45:02.6000 = 19.985 seconds.
This result is within the tolerance range of the V/Hz element.
Step 8. With the test set connected, repeat Step 1 through Step 5, noting the
voltage when PB2_LED changes from green to amber in Step 3
(PB1_LED also changes from green to amber).
Step 9. Inject the relay with the recorded voltages for at least 18 seconds
(verify that both PB1_LED and PB2_LED are amber).

Testing 3.11
Step 10. Stop the injection and turn the test set off. Type SER <Enter> to see
the element assert and operate times, as shown in Figure 3.11.
=>>SER <Enter>
Relay 1 Date: 12/16/2019 Time: 11:51:05.099

FID=SEL-400G-X581-V0-Z001001-D20191209
# DATE TIME ELEMENT STATE

1 12/16/2019 11:50:57.3800 V/Hz timed out Asserted
=>>
Figure 3.11 Element Assert and Operate Times (107%)
Because we are testing point (107,16), we expect the V/Hz element

to assert after 16 seconds. Calculate the trip time as follows:
Trip time = 11:50:57.3800 – 11:50:41.4550 = 15.925 seconds
This result is within the tolerance range of the V/Hz element. This
concludes the V/Hz tests for this example; use similar tests to test
more points on the curve.
Directional Power Element

This section provides a test to verify the operation of the directional power ele-
ment. You can use the test connections of Figure 3.3 and Figure 3.4(a).
In this example, Element 1 is configured for a generator motoring application.
This element operates from a three-phase, real or reactive power quantity that is
calculated by the relay in secondary VA. The equations for three-phase real and
reactive power are:
P = 3 • V L – N • I • cos 
Q = 3 • V L – N • I • sin 
where:
 = the angle between VL-N and I
The settings for this test are shown in Table 3.8.
Table 3.8 Settings to Test the Directional Power Element
Setting Category Comments
E32 = 1 Group Enable Element 1

32O01 = 3PGF Group Use generator real power as the operating signal
32MOD01 = O Group Set the element for overpower operation
32BIA01 = 0 Group Disable the biased characteristic
32ANG01 = 1 Group Set the bias angle to 1 degree
32PP01 = –10 Group Set the pickup to be negative
32RS01 = Y Group Set the timer reset to instantaneous
32PD01 = 2.0 Group Set the timer delay to 2 seconds
32TC01 = 1 Group Assert torque control

3.12 Testing
=>>SET TE <Enter>
Group 1
PT connection for Term V (OFF,Y,D,D1,1PH) PTCONV := 1PH ?Y <Enter>

PT connection for Term Z (Y,D,D1) PTCONZ := Y ? <Enter>
PT Ratio Term V (1.0-10000) PTRV := 200.0 ?2000
<Enter>
PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ?2000
<Enter>
PT Nominal Voltage (L-L) Term V (30.00-300 V,sec) VNOMV := 110.00 ? <Enter>
PT Nominal Voltage (L-L) Term Z (30.00-300 V,sec) VNOMZ := 110.00 ? <Enter>
CT Connection for Term Y (1PH,Y) CTCONY := 1PH ?Y <Enter>

CT Ratio Term S (OFF,1.0-50000) CTRS := 4000.0 ?100 <Enter>
CT Ratio Term T (OFF,1.0-50000) CTRT := 400.0 ?100 <Enter>
CT Ratio Term U (OFF,1.0-50000) CTRU := 12000.0?100 <Enter>
CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ?100 <Enter>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ?100 <Enter>
CT Ratio Term Y (OFF,1.0-50000) CTRY := OFF ?100 <Enter>
Relay Configuration
Advanced Settings (Y,N) EADVS := N ? <Enter>

En. Pump Storage (OFF or combo of S,T,U,W,X,Y,V,Z) EPS := OFF ? <Enter>
Enable Sys Volt Term (OFF,V) ESYSPT := "V1" ?V <Enter>
Enable Gen Neut Cur Terms (combo of W,X) EGNCT := "X" ?W,X <Enter>
Enable System Cur Terms (OFF or combo of S,T,U,Y) ESYSCT := "S,T" ?S <Enter>
En. Power Calc Term (OFF or S) EPCAL := "S" ? <Enter>
Enable Volts per Hertz Elements (N,1-2) E24 := 2 ?N <Enter>
Enable Synch. Check (OFF or S) E25 := "S" ?OFF <Enter>
Enable Under Voltage Elements (N,1-6) E27 := N ? <Enter>
Enable Directional Power (N,1-4) E32 := 1 ? <Enter>
Enable Loss of Field (OFF or combo of Z,P) E40 := "Z" ?OFF <Enter>
Enable Current Unbalance Elements (N, 1-2) E46 := 1 ?N <Enter>
Enable 50 Elements (OFF or S) E50 := OFF ? <Enter>
Enable Inverse Time Overcurrent Elements (N,1-12) E51 := N ? <Enter>
Enable Over Voltage Elements (N,1-6) E59 := 1 ?N <Enter>
Enable 60P Split Phase Element (N,T,U,W,X,Y) E60P := N ? <Enter>
Enable 60N Split Phase Element (N,Y1,Y2,Y3) E60N := N ? <Enter>
Enable 64G Element (OFF or combo of G1,G2,G3) E64G := "G1,G3"?OFF <Enter>
Enable 64F Field Ground Element (Y,N) E64F := N ? <Enter>
Enable 64S Stator Ground Element (Y,N) E64S := N ? <Enter>
Enable Out-of-Step Element (N,1B,2B) E78 := 1B ?N <Enter>
Enable Frequency Elements (N,1-6) E81 := 2 ?N <Enter>
Enable Accumulated Freq Elements (N,1-8) E81A := N ? <Enter>
Enable Rate of Change of Freq Elements (N,1-6) E81R := N ? <Enter>
Enable Differential Elements (N,1-2) E87 := 2 ?N <Enter>
Enable REF Element (OFF or combo of Y1,Y2,Y3) EREF := "Y1" ?OFF <Enter>
Enable Inad. Ener. Prot. (OFF or S) EINAD := "S" ?OFF <Enter>
Enable Pole Open (OFF or S) EPO := "S,T" ?OFF <Enter>
Load Encroachment (Y,N) ELOAD := N ? <Enter>
Enable Loss of Potential (OFF or combo of V,Z) ELOP := "Z" ?OFF <Enter>
Enable Brkr Fail. Prot. (OFF or S) EBFL := "S,T" ?OFF <Enter>
Enable Brkr Flash Ovr. (OFF or S) EBFO := "S" ?OFF <Enter>
Enable System Backup Protection (N,51C,51V,21P) EBUP := 21P ?N <Enter>
Enable Demand Metering (N,1-10) EDEM := N ? <Enter>
Enable Max/Min Metering (N,1-30) EMXMN := 12 ?N <Enter>
Power System Data
Generator Max. MVA (1-5000 MVA) MVAGEN := 555 ? <Enter>

Generator L-L Voltage (1.00-100 kV) KVGEN := 24.00 ? <Enter>
Generator D-Axis Synch Reactance (0.100-4) XDGEN := 1.810 ? <Enter>
Transformer Leakage Reactance (0.010-10) XTXFR := 0.042 ? <Enter>
Equivalent System Reactance (0.010-10) XESYS := 0.200 ? <Enter>
Frequency Source for Current Term S (G,S) FTSRCS := S ?G <Enter>

Frequency Source for Current Term T (G,S) FTSRCT := S ?G <Enter>
Frequency Source for Current Term U (G,S) FTSRCU := G ?
Frequency Source for Current Term W (G) FTSRCW := G ?
Frequency Source for Current Term X (G) FTSRCX := G ?
Frequency Source for Current Term Y (G,S) FTSRCY := G ?
Frequency Source for Voltage Term V (S) FTSRCV := S ?
Frequency Source for Voltage Term Z (G) FTSRCZ := G ?
Figure 3.12 Group 1 SET Command

Testing 3.13
Current Transformer Polarity Terminal Selection
CT Polarity For Terminal S (P,N) CTPS := P ? <Enter>
Directional Power (32) Element 01
Dir Power Element 01 Operating Quantity 32O01 := 3PGF ? <Enter>

Dir Power Element 01 Operating Mode (U,O) 32MOD01 := O ? <Enter>
Dir Power Element 01 Bias (SELogic Eqn)
32BIA01 := NA
? 0 <Enter>
Dir Power Element 01 Bias Angle (-5.00 to 5 deg) 32ANG01 := 1.00 ? <Enter>
Dir Power Element 01 PU (-400.00 to 400 VA,sec) 32PP01 := -10.00 ? <Enter>
Dir Power Element 01 Inst Reset (Y,N) 32RS01 := y ? <Enter>
Dir Power Element 01 Time Delay (0.000-400 s) 32PD01 := 2.000 ? <Enter>
Dir Power Element 01 Torque Cont (SELogic Eqn)
32TC01 := 1
? <Enter>

ONLINE := 52CLS
? END <Enter>

Settings Saved
=>>
Figure 3.12 Group 1 SET Command (Continued)
In a similar manner to Volts/Hertz on page 3.5, you can program SELOGIC vari-
ables to assert LEDs on the front panel to indicate the status of the directional
power element. You can also program the SER to record the status of the element,
and then use these recorded values to calculate the element operating time(s). The
active Relay Word bits for this test are the following.
32P01 Directional Power Element 1 Picked Up

32T01 Directional Power Element 1 Timed Out
Generator power for this example is calculated by the relay by using the W termi-
nal current and the Z terminal voltage input. The default value of the Z input line-
to-line nominal voltage, VNOMZ, is 110 volts. Nominal line-to-neutral voltage is
therefore, 110 V / 3 = 63.51 V.
Unity Power Factor Test

At unity power factor and for a line-to-line voltage magnitude of VNOMZ, the
element should pick up for a secondary current magnitude of:
–10 VA
I = --------------------------------------------------- = 0.052 A 180
3 • 63.51 V • cos 0
Test Steps
Step 1. Inject a balanced three-phase voltage with a magnitude of 63.51 V.
Step 2. Inject a balanced three-phase current with a magnitude of 0.025 A
and an angle, , of 180°. The element should not operate.
Step 3. Increase the three-phase current magnitude until the element picks
up. Record this value as the measured pickup.
Step 4. Maintain the current until the element times out. Record the
difference between the Timed Out and Picked Up Relay Word bits as
the measured time delay.
Step 5. Deassert and reassert torque control. Confirm that the element resets
and picks up again.

3.14 Testing
Rated Power Factor Test (32BIA = 0)

Assuming a rated power factor of 0.85, the reactive power in secondary VA is:
2 2
Q = 3 • 63.51 V • 5 A • 1 – 0.85 = 501.84 VA
At the pickup setting, the corresponding angle  is:
–1 501.84
 = 180 + tan  ---------------- = 91.14
 –10 
At rated power factor and for a line-to-line voltage magnitude of VNOMZ, the
element should pick up for a secondary current of:
–10 VA
I = ------------------------------------------------------------ = 2.638 A
3 • 63.51 V • cos 91.14
Test Steps
and angle, , of 0°. The element should not operate.
Step 3. Rotate the angle, , until the element picks up. Record this value as
the measured pickup angle.
I = 2.638 A
θ = 91.14°
V = 63.51 V
Figure 3.13 Voltage/Current Relationship for 32BIA = 0
Step 4. Maintain the current until the element times out. Record the
difference between the Timed Out and Picked Up Relay Word bits as
Rated Power Factor Test (32BIA01 = 1)

In this test, the biasing feature of the directional power element is enabled. We
assume that the bias angle is equal to 1 degree.
Assuming a rated power factor of 0.85, the reactive power in secondary VA is:
2 2
Q = 3 • 63.51 V • 5 A • 1 – 0.85 = 501.84 VA
At this value, the value of P for which the element is expected to pick up is:
501.84
P = –10 + ---------------------------- = –1.24 VA
tan  90 – 1 
At the pickup setting, the corresponding angle  is:
–1 501.84
 = 180 + tan  ---------------- = 90.14
 –1.24 

Testing 3.15
At rated power factor and for a line-to-line voltage magnitude of VNOMZ, the
element should pick up for a secondary current of:
–1.24 VA
I = ------------------------------------------------------------ = 2.664 A
3 • 63.51 V • cos 90.14
Test Steps
and angle, , of 0°. The element should not operate.
Step 3. Rotate the angle, , until the element picks up. Record this value as
the measured pickup angle.
I = 2.664 A
= 90.14°
V = 63.51 V
Figure 3.14 Voltage/Current Relationship for 32BIA = 1
Step 4. Maintain the current until the element operates. Record this value as
Capability-Based Loss of Field (40P)

This section provides a test to verify the operation of the capability-based loss of
field element. You can use the test connections of Figure 3.3 and Figure 3.4(A).
ables to assert LEDs on the front panel to indicate the status of the 40P element.
You can also program the SER to record the status of the element, and then use
these recorded values to calculate the element operating time(s). The active Relay
Word bits for this test are:
40P1 Capability Loss-of-Field Zone 1 picked up

40P1T Capability Loss-of-Field Zone 1 timed out
In this example, Zones 1, 2, and 3 are enabled. Testing of Zone 4 is similar to

testing of Zone 2. Dynamic cooling capability is disabled. The settings for this
test are shown in Table 3.9.
Table 3.9 Settings to Test the Capability-Based Loss-of-Field Element

(Sheet 1 of 2)
PTCONZ = Y Group Set the PT connection for Terminal Z to Y

PTRZ = 120 Group Set the Terminal Z PT ratio to 120

3.16 Testing
Table 3.9 Settings to Test the Capability-Based Loss-of-Field Element

(Sheet 2 of 2)
VNOMZ = 115 Group Set the Terminal Z nominal voltage to 13800/120 = 115 V (L-L)
EGNCT = W Group Assign the generator current to use Terminal W
CTRW = 1600 Group Set the Terminal W CT ratio to 8000/5
E40 = P Group
MVAGEN = 90 Group Set the generator nominal MVA to 90
KVGEN = 13.8 Group Set the generator nominal voltage to 13.8 kV
XDGEN = 1.78 Group Set the direct-axis synchronous impedance to 1.78 pu on the
generator base
XTXFR = 0.08 Group Set the direct-axis synchronous impedance to 0.08 pu on the
generator base
XESYS = 0.32 Group Set the direct-axis synchronous impedance to 0.32 pu on the
generator base
Table 3.10 Zone 1 Settings
E40PZ = Z1, Z2, Group

Z3
40P1P = –312.5 Group Set the Zone 1 reactive power offset to –312.5 MVA
40P1DIR = –10 Group Set the Zone 1 characteristic angle to –10°
40P1D = 0.25 Group Set the Zone 1 delay to 0.25 s
40P1TC = 1 Group Assert the Zone 1 torque control
40P2SEG = L Group Set the Zone 2 characteristic to Linear

40PUP5 = 520.8, Group Set the Zone 2 real/reactive power at Point 5 of the UEL
40PUQ5 = –78.1
40PUP6 = 182.3, Group Set the Zone 2 real/reactive power at Point 6 of the UEL
40PUQ6 = –156.3
40PUQ7 = –156.2 Group Set the Zone 2 real/reactive power at Point 7 of the UEL
40PK = 1 Group Set the Zone 2 voltage coefficient to 1
40P2M = 1.10 Group Set the Zone 2 margin at 110%
40P2D = 60 Group Set the Zone 2 UV pickup delay to 60 s
40PZ2TC = 1 Group Assert the Zone 2 torque control
40P3D = 10 Group Set the Zone 3 pickup delay

40P3TC = 1 Group Assert the Zone 3 torque control

Testing 3.17
Table 3.13 Undervoltage Acceleration Settings
40PUVP = 92 Group Set the Zone 2 undervoltage supervision at 10%

40PAD = 0.5 Group Set the UV acceleration delay to 0.5 s
LAG
GCC
P
20 40 60 80 100
LEAD
100, –15
–20
T3c Zone 2
0, –30 35, –30 UEL T2c
T2a T2b
–40 T3b
Zone
T3a 3
–60 T1a
T1b
T1c Zone
1
System Parameters
Generator MVA: 90 MVA
Generator Nominal Voltage: 13.8 kV
Direct-Axis Synchronous Reactance (XDGEN): 1.78 pu
Transformer Leakage Reactance (XTXFR): 0.08 pu
System Reactance (XESYS): 0.32 pu
Note: Impedances are in per unit using the generator nominal MVA and voltage
Figure 3.15 Example Generator Capability Curve

3.18 Testing
=>> SET S TE <Enter>

Group 1
PT connection for Term V (OFF,Y,D,D1,1PH) PTCONV := 1PH ? <Enter>

PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ?120 <Enter>
PT Nominal Voltage (L-L) Term Z (30.00-300 V,sec) VNOMZ := 110.00 ?115 <Enter>
PT Ratio Term V1 (OFF,1.0-10000) PTRV1 := 200.0 ? <Enter>
PT Nominal Voltage Term V1 (30.00-300 V,sec) VNOMV1 := 110.00 ? <Enter>
CT Connection for Term Y (1PH,Y) CTCONY := 1PH ? <Enter>

CT Ratio Term S (OFF,1.0-50000) CTRS := 4000.0 ? <Enter>
CT Ratio Term T (OFF,1.0-50000) CTRT := 400.0 ? <Enter>
CT Ratio Term U (OFF,1.0-50000) CTRU := 12000.0? <Enter>
CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ?1600
<Enter>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ? <Enter>
CT Ratio Term Y1 (OFF,1.0-50000) CTRY1 := 100.0 ? <Enter>
Relay Configuration

En. Pump Storage (OFF or combo of S,T,U,W,X,Z) EPS := OFF ? <Enter>
Enable Gen Neut Volt Term (OFF,V2) EGNPT := V2 ? <Enter>
Enable Sys Volt Term (OFF or combo of V1,V3) ESYSPT := "V1" ? <Enter>
Enable Gen Neut Cur Terms (combo of W,X) EGNCT := "X" ?W <Enter>
Enable System Cur Terms (OFF or combo of S,T,U) ESYSCT := "S,T" ? <Enter>
En. Power Calc Term (OFF or combo of S,T) EPCAL := "S" ?OFF <Enter>
Enable Synch. Check (OFF or combo of S,T) E25 := "S" ?OFF <Enter>
Enable Directional Power (N,1-4) E32 := 1 ?N <Enter>
Enable Loss of Field (OFF or combo of Z,P) E40 := "Z" ?P <Enter>
Enable 50 Elements (OFF or combo of S,T) E50 := OFF ? <Enter>
Enable 60P Split Phase Element (N,U,W) E60P := N ? <Enter>
Enable Inad. Ener. Prot. (OFF or combo of S,T) EINAD := "S" ?OFF <Enter>
Enable Pole Open (OFF or combo of S,T) EPO := "S,T" ?OFF <Enter>
Enable Loss of Potential (OFF or Z) ELOP := "Z" ?OFF <Enter>
Enable Brkr Fail. Prot. (OFF or combo of S,T) EBFL := "S,T" ?OFF <Enter>
Enable Brkr Flash Ovr. (OFF or combo of S,T) EBFO := "S" ?OFF <Enter>
Power System Data
Generator Max. MVA (1-5000 MVA) MVAGEN := 555 ?90 <Enter>

Generator L-L Voltage (1.00-100 kV) KVGEN := 24.00 ?13.8
<Enter>
Generator D-Axis Synch Reactance (0.100-4) XDGEN := 1.810 ?1.78
<Enter>
Transformer Leakage Reactance (0.010-10) XTXFR := 0.042 ?0.08
<Enter>
Equivalent System Reactance (0.010-10) XESYS := 0.200 ?0.32
<Enter>
Figure 3.16 Group 1 Setting Command

Testing 3.19
Frequency Source for Current Term S (G,S) FTSRCS := S ? <Enter>

Frequency Source for Current Term T (G,S) FTSRCT := S ? <Enter>
Frequency Source for Current Term U (G,S) FTSRCU := G ? <Enter>
Frequency Source for Current Term W (G) FTSRCW := G ? <Enter>
Frequency Source for Current Term X (G,S) FTSRCX := G ? <Enter>
Frequency Source for Current Term Y1 (G,S) FTSRCY1 := S ? <Enter>
Frequency Source for Current Term Y2 (G,S) FTSRCY2 := G ? <Enter>
Frequency Source for Voltage Term Z (G) FTSRCZ := G ? <Enter>
Frequency Source for Voltage Term V1 (S) FTSRCV1 := S ? <Enter>
Frequency Source for Voltage Term V2 (G) FTSRCV2 := G ? <Enter>
Frequency Source for Voltage Term V3 (G,S) FTSRCV3 := G ? <Enter>
Generator Capability Based Loss of Field (40P) Element
Enable 40P Zones (Combo of Z1,Z2,Z3,Z4) E40PZ := "Z1,Z2"?Z1,Z2,Z3

<Enter>
Enable Zone 2 Dynamic Capability (Y,N) E40P2D := N ? <Enter>
40P Zone 1 Pickup (-2000.00 to -1 VA,sec) 40P1P := -100.00?-312.5
<Enter>
40P Zone 1 Time Delay (0.000-400 s) 40P1D := 0.250 ? <Enter>
40P Zone 1 Torque Cont (SELogic Eqn)
40P1TC := NOT LOPZ
? 1 <Enter>
40P Zone 1 Directional Sup Ang (-30.0 to 30 deg) 40P1DIR := 10.0 ?-10 <Enter>
40P Zone 2 Segment shape (C,L) 40P2SEG := C ?L <Enter>
40P Zone 2 P Power Pt 5 (1.00-2000 VA,sec) 40PUP5 := 80.00 ?520.8
<Enter>
40P Zone 2 Q Power Pt 5 (-2000.00 to 2000 VA,sec) 40PUQ5 := -60.00 ?-78.1
<Enter>
40P Zone 2 P Power Pt 6 (1.00-2000 VA,sec) 40PUP6 := 40.00 ?182.3
<Enter>
40P Zone 2 Q Power Pt 6 (-2000.00 to 0 VA,sec) 40PUQ6 := -80.00 ?-156.3
<Enter>
40P Zone 2 Q Power Pt 7 (-2000.00 to -1 VA,sec) 40PUQ7 := -100.00?-156.2
<Enter>
40P Zone 2 Margin from UEL (1.05-1.25) 40P2M := 1.20 ?1.10
<Enter>
40P Zone Voltage Coefficient (0-2) 40PK := 2 ?1 <Enter>
40P Zone 2 Time Delay (0.000-400 s) 40P2D := 0.500 ?60 <Enter>
40P2TC := NOT LOPZ
? 1 <Enter>
40P Zone 3 Time Delay (0.000-400 s) 40P3D := 10.000 ? <Enter>
40P3TC := NOT LOPZ
? 1 <Enter>
40P U/V Element PU (OFF,2.00-300 V,sec) 40PUVP := OFF ?92 <Enter>
40P Accelerated Time Delay (0.000-400 s) 40PAD := 10.000 ?0.5 <Enter>

ONLINE := 52CLS
? END <Enter>

Settings Saved
=>>
Figure 3.16 Group 1 Setting Command (Continued)
The scaling factor between primary MVA and secondary VA is:
6 6
10 10
SF = --------------------------------------- = --------------------------- = 5.208
PTRZ • CTRG 120 • 1600
Zone 1 Test
Zone 1 will be tested at Points T1a, T1b, and T1c, as shown in Figure 3.15. The
test will be carried out at nominal voltage. The operating equation of Zone 1 at
nominal voltage can be written as:
Z1_OP = Q   40P1P + P • tan 40P1DIR 

3.20 Testing
Therefore, the secondary current at nominal voltage at each test point is given by:
P + j  40P1P + P • tan  40P1DIR   P + j  – 312.5 + P • tan  – 10  

I = --------------------------------------------------------------------------------------- = ----------------------------------------------------------------------------
3 • VNOMZ 3 • 115
Table 3.14 lists the expected pickup current for each test and the corresponding
real and reactive power at nominal voltage.
Table 3.14 Zone 1 Expected Pickup Currents and Corresponding Real and Reactive Power
Real Power—P Reactive Power—Q

Current Magnitude Current Angle
Test
(Secondary A) (Degrees)
(Primary MVA) (Secondary VA) (Primary MVA) (Secondary VA)
T1a 0 0.00 –60 –312.50 1.569 –90

T1b 20 104.17 –63.53 –330.83 1.66 –86.5
T1c 40 208.33 –67.05 –349.22 1.76 –83.5
Test Steps
Step 1. Inject a balanced three-phase voltage with a phase-to-phase
magnitude of 115 V.
Step 2. Inject a balanced three-phase current with a magnitude of 0.1 A and
current angle shown for T1a. Zone 1 should not operate.
Step 3. Increase the current magnitude until Zone 1 picks up. Record this
value as the measured pickup.
Step 4. Maintain the current until Zone 1 times out. Record the difference
between the Timed Out and Picked Up Relay Word bits as the
measured time delay.
Step 5. Deassert and reassert torque control. Confirm that Zone 1 resets and
picks up again.
Step 6. Repeat Step 2, Step 3, and Step 4 for tests T1b and T1c.
Zone 2 Test
Zone 2 will be tested at Points T2a, T2b, and T2c, as shown in Figure 3.18. The
operating equation of Zone 2 at nominal voltage can be written as:
Z2_OP = Q   40UQ7 + P • tan   • 40P2M

where Ø accounts for the sloped section of the UEL and can be calculated as:
–1 40UPQ5 – 40PUQ6 –1 – 99 –  – 156.3 

 = tan  -------------------------------------------------- = tan  -------------------------------------- = 9.6
 40PUP5 – 40PUP6   520.8 – 182.3 
The secondary current at nominal voltage at each test point is given by:
P + j  40PUQ7 +  P – 40PUP6  • tan   • 40P2M

I = ------------------------------------------------------------------------------------------------------------------------------
3 • VNOMZ
P + j  –156.2 +  P – 182.3  • tan  9.6   • 1.1
= ---------------------------------------------------------------------------------------------------------------
3 • 115
real and reactive power.

Testing 3.21

Test
T2a 0 0.00 –33 –171.88 0.86 –90

T2b 20 104.17 –33 –171.88 1.01 –58.8
T2c 50 260.42 –30.21 –157.34 1.53 –31.1
Test Steps
magnitude of 115 V.
the current angle shown for T2a. Zone 2 should not operate.
Step 5. Deassert and reasserted torque control. Confirm that Zone 2 resets
and picks up again.
Zone 3 Test
The element will be tested at Points T3a, T3b and T3c as shown in Figure 3.18.
The operating equation of Zone 3 at nominal voltage can be written as:
Z3OP = S   cos  + j sin   • SR + SC
where:
1 1 1
SR = ---  -------- + --------- • MVAGEN • SF
2  XS XD
1 1 1
SC = j ---  -------- – --------- • MVAGEN • SF
2  XS XD
The current at nominal voltage at each test point is given by:
 cos  + j sin   • SR + SC
I = ----------------------------------------------------------------
3 • 115
Table 3.16 lists the expected pickup current for three values of  and the corre-
sponding real and reactive power.
 Real Power—P Reactive Power—Q Current Current

Test Magnitude Angle
(Degrees) (Primary MVA) (Secondary VA) (Primary MVA) (Secondary VA) (Secondary A) (Degrees)
T3a –90 0.00 0.00 –50.56 –263.34 1.32 90.0

T3b –75 35.66 185.73 –45.87 –238.89 1.52 52.1
T3c –60 68.89 358.80 –32.10 –167.20 1.99 25.0

3.22 Testing
Test Steps
magnitude of 115 V.
angle shown for T3a. The element should not operate.
and picks up again.
Undervoltage Test
Zone 2 operates via the accelerated tripping path when the positive-sequence sec-
ondary voltage is less than the 40PUVP setting. The Zone 2 characteristic can
shift dynamically with voltage depending on the 40P2K setting.
For this test, a voltage that is 1 volt less than the 40PUVP setting (92 volts) will
be applied. The Zone 2 voltage coefficient, 40P2K, equals 1. The secondary cur-
rent is given by:
91 1
 P + j  40UQ7 + P • tan    • 40P2M •  -----------------------
 VNOMZ P + j  –156.2 + P • tan  13   • 1.1
I = ------------------------------------------------------------------------------------------------------------------------------------- = -------------------------------------------------------------------------------------
3 • 91 3 • 115
real and reactive power. Note that because 40P2K = 1, the current is the same as
that of the test carried out at nominal voltage but the corresponding power is
reduced by a factor of 91/115.
Table 3.17 Zone 2 Undervoltage Expected Pickup Currents and Corresponding Real and Reactive Power
 Real Power—P Reactive Power—Q Current Magnitude Current Angle

Test
(Degrees) (Primary VA) (Primary VA) (Secondary A) (Degrees)
T2d 0 0 –26.11 0.863 90

T2e 0 15.83 –26.11 1.009 58.78
T2f 13 39.65 –23.37 1.519 30.57
Table 3.18 Undervoltage Expected Pickup Currents and Corresponding Real and Reactive Power

Test
T2a 0 0.00 –33 –171.88 0.86 –90

T2b 20 104.17 –33 –171.88 1.01 –58.8
T2c 50 260.42 –30.21 –157.34 1.53 –31.1

Testing 3.23
Test Steps
magnitude of 52.0 V.
the current angle shown for T2d. Zone 2 should not operate.
and picks up again.
Step 6. Repeat Step 2, Step 3, and Step 4 for tests T2e and T2f.
Zone 3 Undervoltage Test

The Zone 3 characteristic shifts dynamically with the square of the voltage using
the 40PK.
Table 3.19 lists the expected pickup current for three values of  and the corre-
sponding real and reactive power. Note the current magnitude is reduced by a fac-
tor of (91/115) of the value the nominal voltage test and the corresponding power
is reduced by a factor of (91/115)2.
Table 3.19 Zone 3 Undervoltage Expected Pickup Currents and Corresponding Real and Reactive Power
 Real Power—P Reactive Power—Q Current Magnitude Current Angle

Test
(Degrees) (Primary VA) (Primary VA) (Secondary A) (Degrees)
T3d –90 0 –10.17 0.931 90

T3e –75 8.51 –9.05 1.137 46.77
T3f –60 16.43 –5.76 1.595 19.33
Test Steps
Step 1. Inject a balanced three-phase voltage with a magnitude of 91 V.
current angle shown for T3d. Zone 3 should not operate.
and picks up again.
Step 6. Repeat Step 2, Step 3, and Step 4 for tests T3e and T3f.
Current Unbalance
This section provides a test to verify the operation of the current unbalance ele-
ment. The test connections of Figure 3.3 reference current connection circuit and
can be used.

3.24 Testing
In this example, Element 1 is enabled and configured to include harmonics. The

harmonic weighting factors for selected harmonics and sequence components.
The settings for this test are shown in Table 3.20.
Table 3.20 Settings to Test the Directional Power Element
MVAGEN = 95 Group Set the generator nominal MVA to 90

KVGEN = 13.8 Group Set the generator nominal KV to 13.8
EGNCT = X Group Set the generator neutral current to Terminal X
CTRX = 1000 Group Set Terminal X CT ratio to 5000/5
E46 = 1 Group Enable Element 1
46Q1P1 = 2% Group Set Level 1 to pick up at 2% of INOMGS or 0.08 A
46QOP1 = I2GPEQ Group Use the operating signal that includes harmonics
46Q1D1 = 30 sec Group Set the Level 1 timer delay to 2 seconds
46Q1P2 = 5% Group Set Level 2 to pick up at 5% of INOMGS or 0.2 A
46Q1K2 = 10 Group Set the Level 2 time multiplier to 10
46Q1TC = 1 Group Assert torque control
The SEL-400G calculates the nominal generator current INOMGS as:
MVAGEN • 1000 90 • 1000

INOMGS = ----------------------------------------------------------- = ------------------------------------------ = 3.765
3 • KVGEN • CTRX 3 • 13.8 • 1000
=>>SET TE <Enter>
Group 1

PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ? <Enter>

CT Ratio Term S (OFF,1.0-50000) CTRS := 4000.0 ? <Enter>
CT Ratio Term T (OFF,1.0-50000) CTRT := 400.0 ? <Enter>
CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ? <Enter>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ?1000
<Enter>
Figure 3.17 46 Element Testing Group Settings

Testing 3.25
Relay Configuration

Enable Sys Volt Term (OFF or combo of V1,V3) ESYSPT := "V1" ? <Enter>
Enable Gen Neut Cur Terms (combo of W,X) EGNCT := "X" ? <Enter>
En. Power Calc Term (OFF or combo of S,T) EPCAL := "S" ? <Enter>
Enable Synch. Check (OFF or combo of S,T) E25 := "S" ?OFF <Enter>
Enable Current Unbalance Elements (N, 1-2) E46 := 1 ? <Enter>
Enable 60P Split Phase Element (N,U,X) E60P := N ? <Enter>
Power System Data
Generator Max. MVA (1.0-5000 MVA) MVAGEN := 555.0 ?95 <Enter>

Generator L-L Voltage (1.00-100 kV) KVGEN := 24.00 ?13.8
<Enter>
Frequency Source for Current Term S (G,S) FTSRCS := S ? <Enter>

Frequency Source for Current Term T (G,S) FTSRCT := S ? <Enter>
Frequency Source for Current Term U (G,S) FTSRCU := G ? <Enter>
Frequency Source for Current Term W (G,S) FTSRCW := G ? <Enter>
Frequency Source for Current Term X (G) FTSRCX := G ? <Enter>
Frequency Source for Current Term Y1 (G,S) FTSRCY1 := S ? <Enter>
Frequency Source for Voltage Term V1 (S) FTSRCV1 := S ? <Enter>
Frequency Source for Voltage Term V3 (G,S) FTSRCV3 := G ? <Enter>
Figure 3.17 46 Element Testing Group Settings (Continued)

3.26 Testing
Current Transformer Polarity Terminal Selection
CT Polarity For Terminal S (P,N) CTPS := P ? <Enter>
Current Unbalance (46) Element 1
46 Element 1 Operate Quantity 46QO1 := I2GP ?I2GPEQ

<Enter>
46 Element 1 Level 1 PU (OFF,2-100 %) 46Q1P1 := 8 ?2 <Enter>
46 Element 1 Level 2 PU (OFF,2-100 %) 46Q1P2 := 8 ?5 <Enter>
46 Element 1 Level 1 Delay (0.000-1000 s) 46Q1D1 := 30.000 ? <Enter>
46 Element 1 Level 2 Time Dial (1-100 s) 46Q1K2 := 10 ? <Enter>
46 Element 1 Torque Control (SELogic Eqn)
46Q1TC := 1
? <Enter>

ONLINE := 52CLS
? END <Enter>

Settings Saved
=>>
Figure 3.17 46 Element Testing Group Settings (Continued)
ables to assert LEDs on the front panel to indicate the status of the current unbal-
ance element. You also program the SER to record the status of the element, and
then use these recorded values to calculate the element operating time(s). The
active Relay Word bits for this test are as follows:
46Q11 Current Unbalance 1 Level 1 picked up

46Q1T1 Current Unbalance 1 Level 1 timed out
46Q12 Current Unbalance 1 Level 2 1 picked up
46Q1T2 Current Unbalance 1 Level 2 timed out
Element 1, Level 1 Test

Test Steps
Step 1. Inject a balanced three-phase current with the sequence (positive or
negative) and frequency shown for the tests shown in Table 3.21.
Swap two phases of the current when injecting a negative-sequence
quantity.
Step 2. Increase the three-phase current magnitude until Level 1 picks up.
Note that harmonic quantities are updated every 5 seconds so the
signal should be ramped slowly to account for the update rate.
Record this value as the measured pickup. No operation is expected
for Test 1.
Table 3.21 Element 1, Level 1 Tests (Sheet 1 of 2)
Expected Pickup Injected Frequency of the Weighting Factor

Test Harmonic (n) i I2GPEQ
(A sec) Quantity Current (Hz) n + i  2
1 No Op fund pos 60 1 –1 0.000 0
2 0.214 fund neg 60 1 +1 1.000 0.020
3 0.303 2nd pos 120 2 –1 0.707 0.020
4 0.174 2nd neg 120 2 +1 1.225 0.020
5 0.151 5th pos 300 5 –1 1.414 0.020
6 0.123 5th neg 300 5 +1 1.732 0.020

Testing 3.27
Table 3.21 Element 1, Level 1 Tests (Sheet 2 of 2)

7 0.096 11th pos 660 11 –1 2.236 0.020
8 0.088 11th neg 660 11 +1 2.450 0.020
9 0.081 13th pos 780 13 –1 2.450 0.020
10 0.075 13th neg 780 13 +1 2.646 0.020
Step 3. Maintain the current until Level 1 times out. Record the difference
Step 4. Deassert and reasserted torque control. Confirm that Level 1 resets
and picks up again.
Step 5. Set 46QO1 = I2GP. Repeat Test 3 from Table 3.21. Confirm that
Level 1 does not pick up. Set 46QO1 = I2GPEQ again.
Element 1, Level 2 Test

Test Steps
Step 1. Inject a balanced three-phase current with the sequence and
frequency shown for Test 1 shown in Table 3.22. Swap two phases of
the current when injecting a negative-sequence quantity.
Step 2. Increase the three-phase current magnitude until Level 2 picks up.
Note that harmonic quantities are updated every 5 seconds so the
signal should be ramped slowly to account for the update rate.
Record this value as the measured pickup.
Step 3. Deassert and reasserted torque control. Confirm that Level 1 resets
and picks up again.
Step 4. Set 46QO1 = I2GP. Repeat Test 3 from Table 3.22. Confirm that
Level 1 does not pick up. Set 46QO1 = I2GPEQ again.
Table 3.22 Element 1, Level 2 Tests

1 No Op fund pos 60 1 –1 0.000 0
2 0.085 fund neg 60 1 +1 1.000 0.020
3 0.120 2nd pos 120 2 –1 0.707 0.020
Step 5. Inject a balanced three-phase current with the sequence, magnitude,

and frequency shown for the tests shown in Table 3.23. Swap two
phases of the current when injecting a negative-sequence quantity.
Step 6. Record the difference between the Timed Out and Picked Up Relay
Word bits as the measured time delay.

3.28 Testing
Table 3.23 Sequence, Magnitude, and Frequency
Weighting Factor Expected

Injected Magnitude Injected Frequency of the
Test Harmonic (n) i Operate
(A sec) Quantity Current (Hz) n + i  2 Time (s)
1 2.125 fund neg 60 1 +1 1.000 40

2 3.007 2nd pos 120 2 –1 0.707 40
3 4.250 fund neg 60 1 +1 1.000 10
Third-Harmonic Tests
This section provides a test to verify the operation of the 64G2 and 64G3 ele-
ments. This test uses the test connection of Figure 3.4(A).
Because these elements operate from the third-harmonic component of the volt-
age, we must inject a composite voltage with a fundamental component (50 or
60 Hz) and a third harmonic into the Z terminal.
Note that the third-harmonic component should be injected into all three phases
with an angle of zero between each phase.
Note also that the element asserts 64GAAL when the angle between the third-
harmonic voltage drops at the generator terminals and neutral is outside the set-
ting range 64GANCH and 64GANCL. For a secondary injection test that uses the
circuit of Figure 3.4(A), this angle will be in the range of 180 degrees.
The common settings are shown in Table 3.24.
Table 3.24 Third Harmonic Common Settings
E64G = G2 Group Enable the 64G2 element

VNOMZ = 115 Group Set the Terminal Z nominal voltage to 13800 / 120 = 115
PTCONV = 1PH Group Set the PT connection for Terminal V to single-phase
PTRV2 = 57 Group Set the V2 terminal PT ratio to 57
VNOMV2 = 115 Group
The SEL-400G calculates the generator total third harmonic, VG3F, as:
PTRZ
VG3F = VN3F + ----------------------------- • 3V0Z3F
3 • PTRV2
VG3FM = mag(VG3F)
VG3FA = angle(VG3F)

Testing 3.29
64G2 Third-Harmonic Test

ables to assert LEDs on the front panel to indicate the status of the 64G2 element.
Word bits for this test are:
64GAAL Third-harmonic angle check alarm

64GALT Alternate settings selected
64G2DEN Third-harmonic differential is enabled
64G2DIF Third-harmonic differential asserted
64G2 Third-harmonic Element 2 pickup
64G2T Third-harmonic Element 2 delayed pickup
64G2TC 64G2 torque control bit
RB01, RB02 Remote bits
The settings for the 64G2 are shown in Table 3.25.
Table 3.25 Settings to Test the Third Harmonic 64G2 Element
64GALT = RB01 Group Set the switch to Level 2 Settings (SV) to RB01
64G2P1 = 2 Group Set the 64G2 Level 1 Pickup to 1
64G2R1 = 1.0 Group Set the 64G2 Level 1 Ratio to 1.0
64G2P2 = 2.5 Group Set the 64G2 Level 2 Pickup to 2
64G2R2 = 1.1 Group Set the 64G2 Level 2 Ratio to 1.1
64G2D = 0.05 Group Set the 64G2 Time Delay to 0.05
64G2TC = RB02 Group Set the 64G2 Torque Control to RB02
==>>SET S TE <Enter>
Group 1

PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ?120 <Enter>
PT Nominal Voltage (L-L) Term Z (30.00-300 V,sec) VNOMZ := 110.00 ?115 <Enter>
PT Ratio Term V2 (OFF,1.0-10000) PTRV2 := 200.0 ?57 <Enter>
PT Nominal Voltage Term V2 (30.00-300 V,sec) VNOMV2 := 110.00 ?115 <Enter>

CT Ratio Term U (OFF,1.0-50000) CTRU := 12000.0?100 <Enter>
CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ?100 <Enter>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ?100 <Enter>
Figure 3.18 64G2 Settings

3.30 Testing
Relay Configuration

Enable Sys Volt Term (OFF or combo of V1,V3) ESYSPT := "V1" ?OFF <Enter>
Enable System Cur Terms (OFF or combo of S,T,U) ESYSCT := "S,T" ?S <Enter>
En. Power Calc Term (OFF or S) EPCAL := "S" ?OFF <Enter>
Enable 50 Elements (OFF or S) E50 := OFF ? <Enter>
Enable 60P Split Phase Element (N,T,U,X) E60P := N ? <Enter>
Enable 64G Element (OFF or combo of G1,G2,G3) E64G := "G1,G3"?G2 <Enter>
Enable Inad. Ener. Prot. (OFF or S) EINAD := "S" ?OFF <Enter>
Enable Pole Open (OFF or S) EPO := "S,T" ?OFF <Enter>
Enable Brkr Fail. Prot. (OFF or S) EBFL := "S,T" ?OFF <Enter>
Enable Brkr Flash Ovr. (OFF or S) EBFO := "S" ?OFF <Enter>
Power System Data

Frequency Source for Current Term S (G) FTSRCS := G ? <Enter>

Frequency Source for Current Term T (G) FTSRCT := G ? <Enter>
Frequency Source for Current Term U (G) FTSRCU := G ? <Enter>
Frequency Source for Current Term Y1 (G) FTSRCY1 := G ? <Enter>
Figure 3.18 64G2 Settings (Continued)

Testing 3.31
Stator Ground (64G) Element
64G Alternate Setting (SELogic Eqn)

64GALT := NA
? RB01 <Enter>
64G Angle Check Low (-179.99 to 180 deg) 64GANCL := 45.00 ? <Enter>
64G Angle Check High (-179.99 to 180 deg) 64GANCH := -135.00? <Enter>
64G2 Ratio Correction [2] (0.10-10) 64G2R1 := 1.00 ? <Enter>
64G2 Ratio Correction [2] (0.10-10) 64G2R2 := 1.00 ?1.1 <Enter>
64G2 Voltage Pickup 1 (0.10-150 V,sec) 64G2P1 := 2.00 ? <Enter>
64G2 Voltage Pickup 2 (0.10-150 V,sec) 64G2P2 := 2.00 ?2.5 <Enter>
64G2 Element Delay (0.000-400 s) 64G2D := 1.000 ?0.05
<Enter>
64G2 Element Torque Cont (SELogic Eqn)
64G2TC := 1
? RB02 <Enter>
64G Normal Trip Input (SELogic Eqn)
64GTIN := 64G1T OR 64G2T OR 64G3T
? <Enter>
64G Accelerated Input (SELogic Eqn)
64GAIN := 64G1 OR 64G2 OR 64G3
? <Enter>
64G Accelerated Torque Cont (SELogic Eqn)
64GATC := NA
? <Enter>
64G Accelerated PU Delay (0.000-400 s) 64GAPU := 0.200 ? <Enter>
64G Accelerated DO Delay (0.000-400 s) 64GADO := 15.000 ? <Enter>

ONLINE := 52CLS
? END <Enter>

Settings Saved
==>>
Figure 3.18 64G2 Settings (Continued)
The operating equation for Level 1 is:
64G2 = V3DIF  64G2P1

where:
PTRZ
V3DIF = ----------------------------- • 3V03FM • 64R1 – VN3FM
3 • PTRV2
Table 3.26 shows the test values and expected results. 64G2DEN asserts when
there is enough third harmonic for the element to operate, and 64G2DIF asserts
when V3DIF is greater than the pickup setting.
Table 3.26 64G2 Level 1 Test Values
Terminal Z Terminal V2
Test 3rd Harmonic 3rd Harmonic 3V03ZM VN3FM V3DIF 64G2DEN 64G2DIF
Voltage Voltage
1 0 2.05 0 2.04 –2.04 ON OFF

2 3.0 2.05 2.99 2.04 0.00 ON OFF
3 5.79 2.05 5.77 2.04 2.01 ON ON
Test Steps
Step 1. Issue the CON 01 C and CON 02 S commands to the relay. Check
that 64GALT is not asserted by issuing TAR 64GALT. Also, confirm
that the torque bit is asserted by issuing TAR 64G2TC.
Step 2. Inject a balanced three-phase voltage with a magnitude of 66.39 V at
the fundamental frequency into the A-Phase of the Z terminal.

3.32 Testing
Step 3. Inject the voltage with the magnitude shown for Test 1 into the
V2 terminal at the third-harmonic frequency.
Step 4. Confirm that V3DIF has the value shown for Test 1 and that the
operands assert as shown.
Step 5. Add a third-harmonic component to the voltage injected into the
B-phase of the Z terminal with the value shown in Test 2.
Step 6. Confirm that (V3DIF + VN3FM) / VT3FM is equal to the 64G2R1
setting.
Step 7. Increase the magnitude of the Terminal 2 third-harmonic component
until the element picks up as indicated by assertion of 64G2DIF.
Step 8. Confirm that the value of V3DIF is equal to the 64G2P1 setting.
Step 9. Maintain the voltage until 64G2D times out and 64G2T asserts.
Record the difference between 64G2T and 64G2 as the measured
time delay, 64G2D.
Step 10. Deassert and reassert the torque control by issuing the CON 02 C
and then CON 02 S commands to the relay. Confirm that the element
resets and picks up again.
Step 11. Set 64GALT to 1 by issuing the CON 01 S command and repeat
Step 3 through Step 10 to test Level 2.
64G3 Test
ables to assert LEDs on the front panel to indicate the status of the 64G3 element.
Word bits for this test are as follows:
64GAAL 64G3 Third-harmonic voltage angle alarm

64G3EN 64G3 Third-harmonic ratio is enabled
64G3 64G3 Third-harmonic ratio pickup
64G3T 64G3 Third-harmonic ratio timed out
RB03 Remote bit
The common settings are shown in Table 3.27.
Table 3.27 Settings to Test the Third Harmonic 64G3 Element
E64G = G3 Group Enable the 64G3 element

VNOMZ = 115 Group Set the Terminal Z nominal voltage to 13800 / 120 = 115
PTCONV = 1PH Group Set the PT connection for Terminal Y to single-phase
PTRV2 = 57 Group Set the Terminal V2 PT ratio to 57
Table 3.28 shows the settings for 64G3.

Testing 3.33
Table 3.28 64G3 Settings
64G3P1 = 2 Group 64G3 voltage pickup

64G3R1 = 0.15 Group 64G3 ratio pickup
64G3R2 = 0.2 Group Alternate ratio pickup
64G3D = 0.05 Group 64G3 time delay
64G3TC = RB03 Group 64G3 torque control (SV)
64GALT = RB01 Group Deassert the switch to Level 2 settings (SV)
=>>SET E64G TE <Enter>

Group 1
Relay Configuration
Enable 64G Element (OFF or combo of G1,G2,G3) E64G := "G2" ?G3 <Enter>
Enable 64F Field Ground Element (Y,N) E64F := N ?END <Enter>

Settings Saved
=>>
=>>SET 64GALT TE <Enter>

Group 1
Stator Ground (64G) Element
64G Alternate Setting (SELogic Eqn)

64GALT := RB01
? <Enter>
64G Angle Check Low (-179.99 to 180 deg) 64GANCL := 45.00 ? <Enter>
64G Angle Check High (-179.99 to 180 deg) 64GANCH := -135.00? <Enter>
64G3 Ratio Correction 1 (0.01-1) 64G3R1 := 0.15 ? <Enter>
64G3 Ratio Correction 2 (0.01-1) 64G3R2 := 0.15 ?0.2 <Enter>
64G3 Voltage Pickup 1 (0.10-150 V,sec) 64G3P1 := 2.00 ? <Enter>
64G3 Element Delay (0.000-400 s) 64G3D := 1.000 ?0.05
<Enter>
64G3 Element Torque Cont (SELogic Eqn)
64G3TC := 1
? RB03 <Enter>
64G Normal Trip Input (SELogic Eqn)
64GTIN := 64G1T OR 64G2T OR 64G3T
? END <Enter>

Settings Saved
=>>
Figure 3.19 64G3 Settings
The operating equation for this function is:
64G3 = V3RAT  64G3R1

where:
VN3FM
V3RAT = ---------------------
VG3FM
The test values and expected results are shown in Table 3.29. Note that 64G3 uses
the total third harmonic. 64GAAL asserts when the angle between 3V03ZM and
VN3F is outside the setting range 64GANCH and 64GANCL. 64G3EN asserts
when there is sufficient third harmonic for the element to operate, and 64G3
asserts when the element has picked up.

3.34 Testing
Table 3.29 64G3 Level 1 Test Values
Terminal Z Terminal V2
Test 3rd Harmonic 3rd Harmonic 3V0ZM VN3FM V3RAT 64GAAL 64G3EN 64G3
Voltage Voltage
1 0 2.05 0 2.04 1 OFF ON OFF

2 10 2.05 9.97 2.04 0.23 OFF ON OFF
3 16.6 2.05 16.52 2.04 0.15 OFF ON ON
Test Steps
Step 1. Issue the CON 01 C and CON 03 S commands to the relay. Check
that 64GALT is not asserted by issuing TAR 64GALT. Also, confirm
that the torque bit is asserted by issuing TAR 64G3TC.
Step 2. Inject a balanced three-phase voltage with a magnitude of 66.39 V at
the fundamental frequency into the A-Phase of the Z terminal.
Step 3. Inject the voltage into the V2 terminal at the third-harmonic
frequency. Increase the magnitude until 64G3EN asserts.
Step 4. Confirm that the 64GAAL is deasserted and that V3RAT = 1.
Step 5. Confirm that the value of VN3FM is slightly greater than 64G3P1.
Step 6. Add a third-harmonic component to the voltage injected into the B-
Phase of the Z terminal. Increase the magnitude until the 64G3
asserts.
Step 7. Confirm that 64GAAL is not asserted.
Step 8. Record that the value of V3RAT is equal to 64G3R1.
Step 9. Maintain the voltage until 64G3D times out and 64G3T asserts.
Record the difference between 64G3T and 64G3 as the measured
time delay, 64G3D.
Step 10. Deassert and reassert the torque control by issuing the CON 03 C
and then CON 03 S commands to the relay. Confirm that the element
resets and picks up again.
Step 11. Set 64GALT to 1 by issuing the CON 01 S command and repeat
Step 3 through Step 10 to test Level 2.
87RA, 87RB, and 87RC Restrained Differential Elements

This section provides tests to show the operation of the restraint differential ele-
ment under the following system conditions (for ease of testing consider only two
terminals [Terminal S and Terminal T]):
➤ Internal fault
➤ External fault with heavy CT saturation
➤ Evolving fault, causing the relay to trip on Slope 2
In general, the relay uses Equation 3.3 and Equation 3.4 to calculate the opera-
tional operating current (IOPOP) and the restraint current (IRT).
IOP OP = IAS + IAT

Equation 3.3
IRT = IAS + IAT

Equation 3.4

Testing 3.35
Equation 3.3 calculates the absolute value of the vector sum of IAS and IAT ,
and Equation 3.4 calculates the sum of the absolute values of IAS and IAT .
Equation 3.5 is the third equation that the differential element uses to make a trip/
no trip decision.
SLP
IOP  IRT  = ----------- • IRT
100
Equation 3.5
Equation 3.5 provides the reference value (from the slope setting) for various
restraint values, as shown in Figure 3.21.
IOPOP
Output
IOP(IRT)
(reference)
Figure 3.20 Differential Element Comparator
Each processing interval, the relay calculates IRT (Equation 3.4), uses this calcu-
lated IRT value to calculate IOP(IRT) (Equation 3.5), and compares this calcu-
lated IOP(IRT) value with the result of Equation 3.3 (IOPOP).
Figure 3.21 shows the characteristic of the differential element, together with
IOPOP. In Figure 3.21, the shaded area (area below the SLP line) is the non-oper-
ating or restraint area, and the area above the SLP line is the operating or tripping
area.
IOP(IRT)
Operating Area
Result of
IOP(IRT)
P(IRT,IOP)
Result of SLP
IOPOP
Non-operating Area
IRT
Figure 3.21 Differential Element Characteristic
To simplify Equation 3.3, consider a fixed angular relationship of 180 degrees

between IAS and IAT , i.e., IAS = IAS0° and IAT = IAT180°. With this rela-
tionship, both IAS and IAT are real numbers, and Equation 3.3 becomes:
IOP OP = IAS – IAT

Equation 3.6
or
IAS = IOP OP + IAT

Equation 3.7

3.36 Testing
Also, from Equation 3.4,
IAS = IRT – IAT

Equation 3.8
Combine Equation 3.7 and Equation 3.8 to solve for IAT as follows:
IRT – IOP OP
IAT = ---------------------------------
2
Equation 3.9
With this value, use Equation 3.8 to calculate IAS as follows:
IRT + IOP OP
IAS = ---------------------------------
2
Equation 3.10
Connect a three-phase test set to the SEL-400G as shown in Figure 3.3. Change
the following settings, as shown in Table 3.30 and Figure 3.22.
Table 3.30 Differential Element Settings
Setting Setting Category Comment
E87Z2 = S, T Group Include Terminals S and T for the differential element

87P11 = 0.3 Group Restraint differential element pickup
87SLP12 = 30 Group Set Slope 1 to 30 percent
87SLP22 = 60 Group Set Slope 2 to 60 percent
=>>SET TE <Enter>
Group 1

PT Ratio Term Z (1.0-10000) PTRZ := 200.0 ? <Enter>

CT Ratio Term W (OFF,1.0-50000) CTRW := 4000.0 ? <Enter>
CT Ratio Term X (OFF,1.0-50000) CTRX := 4000.0 ? <Enter>
Figure 3.22 Group Settings for the Differential Test

Testing 3.37
Relay Configuration

Enable Gen Neut Volt Term (OFF,V2) EGNPT := V2 ?OFF <Enter>
Enable Sys Volt Term (OFF or combo of V1,V2,V3) ESYSPT := "V1" ?OFF <Enter>
En. Power Calc Term (OFF or combo of S,T) EPCAL := "S" ?OFF <Enter>
Enable Over Voltage Elements (N,1-6) E59 := N ? <Enter>
Enable Differential Elements (N,1-2) E87 := 2 ? <Enter>
Power System Data


Figure 3.22 Group Settings for the Differential Test (Continued)

3.38 Testing
Zone 1 Differential Element Configuration
87 Zone 1 Terminals (Combo of S,T,W,X) E87Z1 := "W,X" ? <Enter>

87 Zone 1 In-Zone Transformer (Y,N) E87XFR1 := N ? <Enter>
87 Zone 1 En. Unres. Diff. (OFF or combo of F) E87U1 := OFF ? <Enter>
87 Zone 1 Term. W Current Tap (0.50-175 A,sec ) 87WTAP1 := 1.00 ? <Enter>
87 Zone 1 Term. X Current Tap (0.50-175 A,sec ) 87XTAP1 := 1.00 ? <Enter>
87 Zone 1 External Fault Detect DO (0.0200-1.2 s) 87EFDO1 := 1.0000 ? <Enter>
87 Zone 1 Oper. Current Sensitive PU (0.10-4) 87P11 := 0.25 ? <Enter>
87 Zone 1 Oper. Current Secure PU (0.10-4) 87P21 := 0.50 ? <Enter>
87 Zone 1 Slope 1 Percentage (5.00-90%) 87SLP11 := 10.00 ? <Enter>
87 Zone 1 Switch to Secure (SELogic Eqn)
87ASEC1 := CONA1
? <Enter>
87BSEC1 := CONB1
? <Enter>
87CSEC1 := CONC1
? <Enter>
87 Zone 1 Restrained Element TC (SELogic Eqn)
87RTC1 := 1
? 0 <Enter>
87 Zone 1 RMS Element PU (OFF,1.00-20) 87RMP1 := OFF ? <Enter>
87 Zone 2 Terminals (Combo of S,T,W,X) E87Z2 := "S,T" ? <Enter>

87 Zone 2 In-Zone Transformer (Y,N) E87XFR2 := Y ? <Enter>
87 Zone 2 Harm. Blk. & Restr. (Combo of B,BW,R,RW) E87H2 := "B" ?R <Enter>
87 Zone 2 En. Unres. Diff. (OFF or combo of F,R,W) E87U2 := OFF ?F <Enter>
87 Zone 2 Enable Neg. Seq. Differential (Y,E,N) E87Q2 := N ?Y <Enter>
87 Zone 2 Term. S CT Conn. Compensation (0-13) 87SCTC2 := 0 ?12 <Enter>
87 Zone 2 Term. T CT Conn. Compensation (0-13) 87TCTC2 := 0 ?12 <Enter>
87 Zone 2 Transformer Max. MVA (OFF,1-5000 MVA) MVA2 := OFF ?100 <Enter>
87 Zone 2 Term. S L-L Voltage (1.00-1000 kV) VTERMS2 := 275.00 ? <Enter>
87 Zone 2 Term. T L-L Voltage (1.00-1000 kV) VTERMT2 := 275.00 ?132 <Enter>
87 Zone 2 Term. S Current Tap (0.50-175 A,sec ) 87STAP2 := 2.10 ? <Enter>
87 Zone 2 Term. T Current Tap (0.50-175 A,sec ) 87TTAP2 := 4.37 ? <Enter>
87 Zone 2 Oper. Current Sensitive PU (0.10-4) 87P12 := 0.25 ?0.3 <Enter>
87 Zone 2 Slope 1 Percentage (5.00-90%) 87SLP12 := 10.00 ?30 <Enter>
87 Zone 2 Slope 2 Percentage (5.00-90%) 87SLP22 := 75.00 ?60 <Enter>
87ASEC2 := CONA2
? <Enter>
87BSEC2 := CONB2
? <Enter>
87CSEC2 := CONC2
? <Enter>
87RTC2 := 1
? <Enter>
87 Zone 2 Unrestrained Element PU (1.00-20) 87UP2 := 8.00 ? <Enter>
87 Zone 2 Unrestrained Element TC (SELogic Eqn)
87UTC2 := 1
? <Enter>
87 Zone 2 2nd-Harmonic Percentage (OFF,5-100%) 87PCT22 := OFF ?15 <Enter>
87 Zone 2 4th-Harmonic Percentage (OFF,5-100%) 87PCT42 := OFF ?15 <Enter>
87 Zone 2 5th-Harmonic Percentage (OFF,5-100%) 87PCT52 := OFF ?35 <Enter>
87 Zone 2 5th-Harmonic Alarm PU (OFF,0.02-3.2) 87TH5P2 := OFF ? <Enter>
87 Zone 2 Neg. Seq. Operate Current PU (0.05-1) 87QP2 := 0.30 ? <Enter>
87 Zone 2 Neg. Seq. Slope (5-100%) 87QSLP2 := 25 ? <Enter>
87 Zone 2 Neg. Seq. Delay (0.0000-200 s) 87QD2 := 0.2000 ? <Enter>
87 Zone 2 Neg. Seq. TC (SELogic Eqn)
87QTC2 := NOT 87QB2 AND NOT CON2
? END <Enter>

Settings Saved
=>>
Figure 3.22 Group Settings for the Differential Test (Continued)

Testing 3.39
With arbitrary values IRT = 3 per unit, SLP1 = 30, and SLP2 = 60 percent, use
Equation 3.12 and Equation 3.13 to calculate IOP(IRT) values for Slope 1 and
Slope 2:
30
IOP  IRT  = --------- • 3 = 0.9 pu (Slope 1)
100
Equation 3.11
60
IOP  IRT  = --------- • 3 = 1.8 pu (Slope 2)
100
Equation 3.12
Case 1: Internal Fault

Select an IOPOP value greater than 1.8 to ensure that the relay will operate, such
as 3 per unit. Figure 3.23 shows the selected point P(3,3), which is well within
the tripping area (shaded area).
IOP(IRT)
P(3,3)
3
1.8
Tripping
Area
%
= 60
P2
SL 0%
1=3
SLP
0.3
Restraint
Area
IRT
3
Figure 3.23 Values for Case 1
For this test, inject current into Terminal S only, i.e., InT (n = A, B, C) = 0, and
InS = 3 per unit. Convert per-unit values (pu) to ampere values, by multiplying
the per-unit values with the TAPS value (2.1), as shown in Table 3.31.
Table 3.31 Calculate the Current Values in Amperes (Case 1)
Current (per unit) Current (Amperes)
IAS = 30°pu • 2.1 IAS = 6.30°A

IBS = 3–120°pu • 2.1 IBS = 6.3–120°A
ICS = 3120°pu • 2.1 ICS = 6.3120°A
Step 1. Inject balanced 6.3 A into Terminal S for 100 ms, then stop.
Step 2. Verify that LEDs 3, 4, and 5 are illuminated.
Step 3. Press the TARGET RESET button to reset the LEDs.
Case 2: External Fault With Heavy CT Saturation

This test simulates an external fault that eventually results in extreme CT satura-
tion that would have caused the relay to trip if the relay were still operating on
Slope 1. However, because the relay switched to Slope 2, the relay does not oper-

3.40 Testing
ate for this fault for less than one second. This test will be run in two stages, the
first stage simulating an external fault without CT saturation and the second stage
introducing heavy CT saturation.
Step 1. For Stage 1, select a large IRT value that will simulate an external
fault without CT saturation (IOPOP is zero); a good value for IRT is
3 pu. Figure 3.24 shows the selected point P1(3,0).
IOP(IRT)
%
= 60
Tripping P2
SL
Area
1.8
P2(3,1.2)
%
1.2 1 = 30
SLP
0.9
0.3
P1(3,0)
IRT
3
Figure 3.24 Values for Case 2
Step 2. Calculate IAS and IAT for the point P1(3,0):
IRT + IOP OP 3+0

IAS = --------------------------------- = ------------ = 1.5
2 2
Equation 3.13
IRT – IOP OP 3–0

IAT = --------------------------------- = ------------ = 1.5
2 2
Equation 3.14
Convert per-unit values (pu) to ampere values by multiplying the per-
unit values with the TAP values, as shown in Table 3.32.
Table 3.32 Calculate the Current Values in Amperes (Case 2, Stage 1)
IAS = 1.50°pu • 2.1 IAS = 3.150°A

IBS = 1.5–120°pu • 2.1 IBS = 3.15–120°A
ICS = 1.5120°pu • 2.1 ICS = 3.15120°A
IAT = 1.5180°pu • 4.37 IAT = 6.56180°A
IBT = 1.560°pu • 4.37 IBT = 6.5660°A
ICT = 1.5–60°pu • 4.37 ICT = 6.56–60°A
Step 3. For Stage 2, select an IOPOP value between 0.9 pu and 1.8 pu that
will simulate CT saturation. Accounting for the group settings of the
relay, a good choice for IOPOP would be 1.2 pu. Figure 3.24 shows
the selected point P2(3,1.2) and the area between the two slopes
(shaded area).

Testing 3.41
Step 4. Calculate IAS and IAT for the point P2(3,1.2):
IRT + IOP OP 3 + 1.2

IAS = --------------------------------- = ---------------- = 2.1
2 2
Equation 3.15
IRT – IOP OP 3 – 1.2

IAT = --------------------------------- = ---------------- = 0.9
2 2
Equation 3.16
As before, convert the pu values to ampere values by multiplying by
the appropriate TAP values, as shown in Table 3.33.
Table 3.33 Calculate the Current Values in Amperes (Case 2, Stage 2)
IAS = 2.10°pu • 2.1 IAS = 4.410°A

IBS = 2.1–120°pu • 2.1 IBS = 4.41–120°A
ICS = 2.1120°pu • 2.1 ICS = 4.41120°A
IAT = 0.9180°pu • 4.37 IAT = 3.93180°A
IBT = 0.960°pu • 4.37 IBT = 3.9360°A
ICT = 0.9–60°pu • 4.37 ICT = 3.93–60°A
Step 5. Inject the currents for Stage 1 shown in Table 3.32 into Terminal S
and Terminal T for 1.8 cycles, and then inject the currents for Stage 2
shown in Table 3.33 into Terminal S and Terminal T for 800 ms.
Step 6. Verify that LEDs 3, 4, and 5 are NOT illuminated, i.e., the relay did
not trip.
Case 3: Evolving Fault, Causing the Relay to Trip on Slope 2

This test is for a fault that starts out as an external fault (causing the relay to
switch to Slope 2), but then evolves into an in-zone fault. The worst case for this
fault is when there is only one source, i.e., when the fault moves to an internal
fault, the side where the external fault was, does not contribute any fault current.
This test is in two stages: Stage 1 for the external fault (no saturation) and Stage 2
for the evolved fault.
Table 3.34 Current Values in Amperes (Case 3)
Current (Amperes) Stage 1 Current (Amperes) Stage 2
IAS = 4.20°A IAS = 4.20°A

IBS = 4.2–120°A IBS = 4.2–120°A
ICS = 4.2120°A ICS = 4.2120°A
IAT = 8.74180°A IAT = 0
IBT = 8.7460°A IBT = 0
ICT = 8.74–60°A ICT = 0

3.42 Testing
Step 1. Enable an overcurrent element for Terminal T, and set the pickup
value to 0.5 A, as shown in Figure 3.25.
=>>SET S TE E50 <Enter>

Group 1
Relay Configuration
Enable 50 Elements (OFF or combo of S,T) E50 := OFF ?T <Enter>

Enable Over Voltage Elements (N,1-6) E59 := N ? <Enter>
Enable 67 Dir. Elements (OFF or T) E67 := OFF ? <Enter>
Enable Out-of-Step Element (N,1B,2B) E78 := N ? <Enter>
Enable Frequency Elements (N,1-6) E81 := N ? <Enter>
Enable Differential Elements (N,1-2) E87 := 2 ? <Enter>
Enable REF Element (OFF or combo of Y1,Y2,Y3) EREF := OFF ? <Enter>
Enable Inad. Ener. Prot. (OFF or combo of S,T) EINAD := OFF ? <Enter>
Enable Pole Open (OFF or combo of S,T) EPO := OFF ? <Enter>
Enable Loss of Potential (OFF or Z) ELOP := OFF ? <Enter>
Enable Brkr Fail. Prot. (OFF or combo of S,T) EBFL := OFF ? <Enter>
Enable Brkr Flash Ovr. (OFF or combo of S,T) EBFO := OFF ? <Enter>
Enable System Backup Protection (N,51C,51V,21P) EBUP := N ? <Enter>
Enable Max/Min Metering (N,1-30) EMXMN := N ? <Enter>
Power System Data


87 Zone 1 Terminals (Combo of S,T,W,X) E87Z1 := "W,X" ? <Enter>

87 Zone 1 In-Zone Transformer (Y,N) E87XFR1 := N ? <Enter>
87 Zone 1 En. Unres. Diff. (OFF or combo of F) E87U1 := OFF ? <Enter>
87 Zone 1 Term. W Current Tap (0.50-175 A,sec ) 87WTAP1 := 1.00 ? <Enter>
87 Zone 1 Term. X Current Tap (0.50-175 A,sec ) 87XTAP1 := 1.00 ? <Enter>
87ASEC1 := CONA1
? <Enter>
87BSEC1 := CONB1
? <Enter>
87CSEC1 := CONC1
? <Enter>
87RTC1 := 0
? <Enter>
Figure 3.25 Enable Overcurrent Element for Terminal T

Testing 3.43
87 Zone 2 Terminals (Combo of S,T,W,X) E87Z2 := "S,T" ? <Enter>

87 Zone 2 In-Zone Transformer (Y,N) E87XFR2 := Y ? <Enter>
87 Zone 2 Harm. Blk. & Restr. (Combo of B,BW,R,RW) E87H2 := "R" ? <Enter>
87 Zone 2 En. Unres. Diff. (OFF or combo of F,R,W) E87U2 := "F" ? <Enter>
87 Zone 2 Enable Neg. Seq. Differential (Y,E,N) E87Q2 := Y ? <Enter>
87 Zone 2 Term. S CT Conn. Compensation (0-13) 87SCTC2 := 12 ? <Enter>
87 Zone 2 Term. T CT Conn. Compensation (0-13) 87TCTC2 := 12 ? <Enter>
87 Zone 2 Transformer Max. MVA (OFF,1-5000 MVA) MVA2 := 100 ? <Enter>
87 Zone 2 Term. S L-L Voltage (1.00-1000 kV) VTERMS2 := 275.00 ? <Enter>
87 Zone 2 Term. T L-L Voltage (1.00-1000 kV) VTERMT2 := 132.00 ? <Enter>
87 Zone 2 Term. S Current Tap (0.50-175 A,sec ) 87STAP2 := 2.10 ? <Enter>
87 Zone 2 Term. T Current Tap (0.50-175 A,sec ) 87TTAP2 := 4.37 ? <Enter>
87ASEC2 := CONA2
? <Enter>
87BSEC2 := CONB2
? <Enter>
87CSEC2 := CONC2
? <Enter>
87RTC2 := 1
? <Enter>
87 Zone 2 Unrestrained Element PU (1.00-20) 87UP2 := 8.00 ? <Enter>
87 Zone 2 Unrestrained Element TC (SELogic Eqn)
87UTC2 := 1
? <Enter>
87 Zone 2 2nd-Harmonic Percentage (OFF,5-100%) 87PCT22 := 15 ? <Enter>
87 Zone 2 4th-Harmonic Percentage (OFF,5-100%) 87PCT42 := 15 ? <Enter>
87 Zone 2 5th-Harmonic Percentage (OFF,5-100%) 87PCT52 := 35 ? <Enter>
87 Zone 2 5th-Harmonic Alarm PU (OFF,0.02-3.2) 87TH5P2 := OFF ? <Enter>
87 Zone 2 Neg. Seq. Operate Current PU (0.05-1) 87QP2 := 0.30 ? <Enter>
87 Zone 2 Neg. Seq. Slope (5-100%) 87QSLP2 := 25 ? <Enter>
87 Zone 2 Neg. Seq. Delay (0.0000-200 s) 87QD2 := 0.2000 ? <Enter>
87 Zone 2 Neg. Seq. TC (SELogic Eqn)
87QTC2 := NOT 87QB2 AND NOT CON2
? <Enter>
Overcurrent Elements Terminal T
Type of O/C Elems Enabled Term. T (Combo of P,Q,G) E50T := "P" ? <Enter>
Terminal T Phase Overcurrent Element Level 1
Phase Inst O/C Pickup Lvl 1 (OFF,0.25-100 A,sec) 50TP1P := OFF ?0.5 <Enter>
Phase Inst O/C Lvl 1 Torque Ctrl (SELogic Eqn)
67TP1TC := 1
? <Enter>
Phase Inst O/C Lvl 1 Delay (0.000-400 s) 67TP1D := 0.000 ? <Enter>
Terminal T Phase Overcurrent Element Level 2
Phase Inst O/C Pickup Lvl 2 (OFF,0.25-100 A,sec) 50TP2P := OFF ?END <Enter>

Settings Saved
=>>
Figure 3.25 Enable Overcurrent Element for Terminal T (Continued)
Step 2. Enter the setting in Figure 3.26 to include the overcurrent element in
the SER.

3.44 Testing
=>>SET R TE <Enter>
Report
SER Chatter Criteria
Automatic Removal of Chattering SER Points (Y,N) ESERDEL := N ?
SER Points
(Relay Word Bit, Reporting Name, Set State Name, Clear State Name, HMI Alarm)
1:
? 50TP1 <Enter>
2:
? TR01 <Enter>
3:
? END <Enter>

Settings Saved
=>>
Figure 3.26 Enter Overcurrent Element in the SER
Step 3. Inject the current shown in the Stage 1 column of Table 3.34 into
Terminal S and Terminal T for 200 ms, then inject the Stage 2
currents for 200 ms.
Step 4. Issue the SER command and calculate the time difference between
the deassertion of 50TP1 and the assertion of TR01. This must be
less than two cycles.
Autosynchronizer
This section provides a commissioning example for the autosynchronizer, which
includes steps for determination of autosynchronizer settings that govern control
pulse slope, period, and duration (25AVSLP, 25AVPER, 25AVDUR, 25AFSLP,
25AFPER, and 25AFDUR).
24 kV/230 kV
Synchronizing Ynd1 System
Breaker
Generator PTZ
PTV3
GND
VZ VV3
SEL-400G
Figure 3.27 Autosynchronizer Commissioning Example
This section assumes that the Breaker S synchronism-check element will be used.
The settings for this function are shown in Table 3.35. In this example, an auto-
synchronism operation is configured to start (25ASTS) through use of IN201 and
is configured to cancel (25ACNS) through use of IN202. Alternately, front-panel
pushbuttons can be assigned to these settings.

Testing 3.45
Table 3.35 Settings to Test the Autosynchronizer Element
SYNCP = VABZ Group Use AB-Phase voltage

SYNCSS = VV3 Group Use A-Phase voltage
KSSM = 1 Group No magnitude mismatch assumed
KSSA = 0 Group No angle mismatch assumed
25VLS = 55 Group Allow synchronizing to a minimum of 55 V
25VHS = 75 Group Allow synchronizing to a maximum of 75 V
25VDIFS = 5 Group Allow a maximum voltage difference of 5%
25GVHIS = Y Group Generator voltage high is required
25SFBKS = 0.067 Group Allow maximum slip frequency of 0.067 Hz
25ANGS = 10 Group Max. ang. diff. uncompensated angle of 10 degrees
25ADS = 0.016 Group Require an uncompensated sync for 10 cycles
25ANGCS = 5 Group Allow a max. ang. diff. compensated of 5 degrees
TCLSBKS = 0.083 Group Breaker S close time is 5 cycles
25GFHIS = Y Group Generator frequency high is required
25AFMOD = PW Group Pulse width frequency control selected for this example
25AVMOD = PW Group Pulse width voltage control selected for this example
BSYNBKS = 52A_S Group Block synchronism check when breaker is closed
CFANGS = 10 Group Close failure angle at 10 degrees
Settings for the pulse control characteristics for frequency and voltage matching
are often made in the field. The generator controls (governor and voltage regula-
tor) and their associated systems (prime mover and field) constitute a complex
electromechanical system with multiple gains and time constants. Often, infor-
mation is not available to determine settings in advance. Measurements made in
the field during initial setup can be used to tune the system.
NOTE: This procedure does not Optimal tuning of the settings for the pulse control characteristic is important to
replace your company’s procedures
and safe work practices. performance of the system. Too aggressive settings can increase the time it takes
to synchronize a generator because the control overshoots the sync acceptance
bands and causes the control to hunt. On the opposite side, setting the control
characteristic too low causes the control to take a long time to move the con-
trolled parameter into the sync acceptance band.
Circuit Breaker Timing Test

The close time of the breaker is used by the synchronism-check element to ensure
making of the breaker primary contacts at the instant that the generator and sys-
tem come into synchronism. SEL recommends that this setting be confirmed as
part of the commissioning of the autosynchronizer. This setting can be deter-
mined from a traditional offline breaker timing test.
Autosynchronizer Test Setup

➤ The generator must be offline and operating at nominal frequency
and voltage.
➤ The frequency and voltage on the system-side of the breaker must be
at nominal values.

3.46 Testing
➤ Because the generator is energized, all protection functions must be

in service.
➤ The breaker closing circuit must be isolated from the breaker close
coil to ensure that the generator breaker cannot be inadvertently
closed.
➤ In the following procedure, we assume that synchronism-check
Element S is used to supervise the breaker and that the SEL-400G
outputs are configured as shown in Table 3.36. Make the necessary
substitutions for applications that use different synchronism-check
elements or output contacts.
Table 3.36 Output Configuration
OUT201 := 25AFR
OUT202 := 25AFL
OUT203 := 25AVR
OUT204 := 25AVL
OUT205 := CLSS
➤ Ensure that the Event Reporting Analogs (ERAQ) include the

following values:
➢ 25SLIPS
➢ FREQP
➢ FREQPS
➢ 25DIFVS
➢ 25VPFM
➢ 25VPSA
➤ Ensure that the Event Reporting Digitals (ERDG) include the
following values:
➢ 59VPS
➢ 59VSS
➢ BSYNBKS
➢ 25ENBKS
➢ SFZBKS
➢ SFBKS
➢ FAST
➢ SLOW
➢ 25AS
➢ 25CS
➢ GENVHIS
➢ GENVLOS
➢ 25VDIFS
➢ 52CLS
➤ Ensure that the Event Report (ER) trigger includes the TESTPUL
OR CLOSES values

Testing 3.47
Frequency Control Step Response Test

This procedure determines the gain and time constant for a first-order equivalent
representation of the governor systems.
To carry out this procedure, place the BREAKER jumper on the main board of the
SEL-400G in the ON position. This allows the PULSE command to be used to
pulse the control outputs. Return this jumper to its original state when testing is
completed.
Step 1. Go to Access Level 2.
Step 2. Issue the MET SYN S 5 command. This will return the
measurements associated with the Breaker S synchronism-check
function. Five sets of measurements will be returned at a rate of
approximately twice a second. Confirm that the slip (SLIPS) is stable
and in the range of ±0.1 Hz.
Step 3. Issue the PULSE OUT201 command to cause a frequency raise
pulse of 1-second duration.
Step 4. Issue the FILE READ command to retrieve the event report
triggered by Step 2) as shown in Figure 3.28.
Figure 3.28 PULSE OUT201 Event Report
Step 5. Record K as 1 Hz/s and T as 0.925 s for this event.

Step 6. Repeat Step 3 through Step 5 three more times.
Step 7. Issue the PULSE OUT202 command to cause a frequency lower
pulse of 1-second duration.
triggered by Step 7 as shown in Figure 3.29.

3.48 Testing
Step 9. Record K as 1 Hz/s and T as 0.925 s for this event.

Step 11. Calculate K and T as the average of the eight events.
Step 12. Use Table 5.60 to calculate the 25AFDUR, 25AFPER, and 25AFSLP
settings.
Voltage Control Step Response Test

This procedure determines the gain and timer constant for a first-order equivalent
representation of the AVR/exciter systems.
To carry out this procedure, place the BREAKER jumper on the main board of the
SEL-400G in the ON position. This allows the PULSE command to be used to
pulse the control outputs. Return this jumper to its original state when testing is
completed.
Step 1. Go to Access Level 2.
Step 2. Issue the MET SYN S 5 command. This will return the
measurements associated with the Breaker S synchronism-check
function. Five sets of measurements will be returned at a rate of
approximately twice a second. Confirm that the voltage different
(VDIFS) is stable and in the range of ±1.%.
Step 3. Issue the PULSE OUT203 command to cause a voltage raise pulse
of 1-second duration.
triggered by Step 3 as shown in Figure 3.30.

Testing 3.49
Step 5. Record K as 3.56 V/s and T as 0.588 s for this event.

Step 7. Issue the PULSE OUT204 command to cause a voltage lower pulse
of 1-second duration.
triggered by Step 7, as shown in Figure 3.31

3.50 Testing
Step 9. Record K as 3.49 V/s and T as 0.588 s for this event.

Step 11. Calculate K and T as the average of the eight events.
Step 12. Use Table 5.60 to calculate the 25AVDUR, 25AVPER, and
25AVSLP settings.
Autosynchronizer Isolated Close Test

This test confirms operation of the autosynchronizer pulse control and synchro-
nism-check functions.
We assume that the control pulse settings have been adjusted as required by the
results from the frequency and voltage control step response tests.
The disturbance report will be used to capture the close operation by using the
settings shown in Table 3.37.
Table 3.37 Disturbance Report Settings
EDR = Y Enable the disturbance report

DRLER = 300 Set the record length to 300 seconds
DRPRE = 100 Set the predisturbance length to 100 seconds
The state of the system will be the same as that of previous tests. Namely, the
generator must be offline and operating at nominal frequency and voltage, the
frequency and voltage on the system-side of the breaker must be at nominal val-

Testing 3.51
ues, and the breaker closing circuit must be isolated from the breaker close coil to
allow the relay to issue a close command without inadvertently closing the gener-
ator breaker.
Step 1. If possible, adjust the generator voltage and frequency to be outside
the acceptance windows of the synchronism-check element.
Step 2. Use the TAR command to confirm that BSYNBKS is deasserted.
This is a supervisory input that blocks a normal autosynchronization
operation.
Step 3. Initiate an autosynchronization operation via the operator interface.
Use the TAR command to confirm that 25AACT asserts
immediately.
Step 4. The autosynchronization operation will terminate once the 25ACD
timer expires. Use the FILE READ command to retrieve the
disturbance report from Step 3. This report will be generated from
the assertion of the CLSS Relay Word bit.
Step 5. From the report, confirm that 25AVR and/or 25AVL pulses were
generated while the voltage difference was outside the synchronism-
check voltage-difference acceptance window. Matching of voltage
should occur in a reasonable time frame and with no tendency for
hunting.
Step 6. From the report, confirm that 25AFR and/or 25AFL pulses were
generated while the frequency difference was outside the
synchronism-check slip acceptance window. Matching of frequency
should occur in a reasonable time frame and with no tendency for
hunting. Note in this example that the autosynchronizer is configured
for biased operation.
Step 7. From the report, confirm that the 25CS asserted in advance of the
generator and system coming into synchronism. The time of advance
closing should agree with the measured slip and TCLSBKn setting.
Step 8. From the report, confirm that CFS asserts. This is expected because
the breaker does not close for this test.
Step 9. Use the SER command to confirm that 25ASTO asserts and the
scheme resets (25AACT deasserts). This is also expected since the
breaker does not close for this test.
Synchronism-Check Final Phasing Confirmation

Prior to allowing the synchronism-check function to supervise breaker closing, it
is critical to confirm the overall correctness of the phase relationships between
the primary system and the secondary voltage circuits. This could, for instance,
entail opening an upstream breaker and then closing the generator breaker to
safely apply the generator voltages to both sides of the breaker. The secondary
phasing can then be confirmed. Follow your company’s operating practices to
make these final checks.
Autosynchronizer Final Close Test

On completion of all the preceding tests, the autosynchronizer can be used to
carry out synchronized closing of the breaker.
The breaker closing circuit is connected to the breaker close coil to allow the
relay to issue a close to the generator breaker.

3.52 Testing
Technical Support
Step 1. Initiate an autosynchronization operation via the operator interface.

Step 2. The autosynchronization operation will terminate when the breaker
closes (assertion of 52CLS). Use the FILE READ command to
retrieve the event report from Step 1. This report will be generated
either from the assertion of the CLSS Relay Word bit or from the
expiration of the 25ACD timer (25ASTO).
Step 3. From the report, confirm the making of the breaker primary contacts
at the instant of the generator and system coming into synchronism.
There may be some disturbance in the instantaneous voltages and
currents because of pole scatter, but the effect should be minimal.
Step 4. From the report, confirm that CFS does not assert.
Step 5. Use the SER command to confirm that 25ASTO also does not assert.
Figure 3.32 Close Test
Technical Support
We appreciate your interest in SEL products and services. If you have questions
or comments, please contact us at:
Schweitzer Engineering Laboratories, Inc.
2350 NE Hopkins Court
Pullman, WA 99163-5603 U.S.A.
Tel: +1.509.338.3838
Fax: +1.509.332.7990
Internet: selinc.com/support
Email: [email protected]

Testing 3.53
SEL-400G Relay Commissioning Test Worksheet

System Information
System Settings
RID (Relay identification) =
TID (Terminal identification) =
MVA (Maximum transformer rating) =
Terminal Sa Terminal Ta Terminal Ua Terminal Wa Terminal Xa Terminal Ya
Current
transformer
ratio: CTRS = CTRT = CTRU = CTRW = CTRX = CTRY =
Connection
compensation: 87SCTCn = 87TCTCn = 87UCTCn = 87WCTCn = 87XCTCn = 87YCTCn =
Nominal
line-to-line
voltage (kV): VTERMSn = VTERMTn = VTERMUn = VTERMWn = VTERMXn = VTERMYn =
TAP
calculation: 87STAPn = 87TTAPn = 87UTAPn = 87WTAPn = 87XTAPn = 87YTAPn =
a n = 1, 2.
Differential Settings
87P1n = 87SLP1n = 87SLP2n = 87UPn =
Metered Load (Data taken from substation panel meters, not the SEL-400G)
 Readings
Terminal S Terminal T Terminal U Terminal W Terminal X Terminal Y
from meters
Megawatts: MWS = MWT = MWU = MWW = MWX = MWY =
MVARs: MVARS = MVART = MVARU = MVARW = MVARX = MVARY =
MVA
calculation: MVAS = MVAT = MVAU = MVAW = MVAX = MVAY =
MVA calculation:
2 2
MVAn = MWn + MVARn
Calculated Relay Load
Primary
Amperes
calculation: ISpri = ITpri = IUpri = IWpri = IXpri = IYpri =
Secondary
Amperes
calculation: ISsec = ITsec = IUsec = IWsec = IXsec = IYsec =

3.54 Testing
Primary amperes calculation:
MVAn  1000
Inpri = --------------------------------------
3  VTERMn
Secondary amperes calculation:
Inpri
In sec = ---------------
CTRn
Connection Check
System load conditions should be higher than 0.1 A secondary. 0.5 A secondary
is recommended for the best results.
Differential Connection (Issue MET DIF <Enter> to Serial Port or Front Panel)
Operate
Current: IOPA = IOPB = IOPC =
Restraint
Current: IRTA = IRTB = IRTC =
Mismatch
Calculation: MMA = MMB = MMC =
Check individual current magnitudes, phase angles, and operate and restraint currents in an event report if mismatch is not less than
0.10.
Mismatch calculation:
IOPn
MMn = -------------
IRTn
Magnitude, Angle, and Phase Rotation Check

Issue MET SEC <Enter> to the serial port or front panel.
A-Phase Secondary
Amperes: IAS = IAT = IAU = IAW = IAX = IAY =
A-Phase Angle:
B-Phase Secondary
Amperes: IBS = IBT = IBU = IBW = IBX = IBY =
B-Phase Angle:
C-Phase Secondary
Amperes: ICS = ICT = ICU = ICW = ICX = ICY =
C-Phase Angle:

Testing 3.55
Terminal 1 Terminal 2 Terminal 3 Terminal 4

90 90 90 90
135 45 135 45 135 45 135 45
±180 0 ±180 0 ±180 0 ±180 0
–135 –45 –135 –45 –135 –45 –135 –45

–90 –90 –90 –90
1. Calculated relay amperes match MET SEC amperes?
2. Phase rotation is as expected for each terminal?
3. Do angular relationships among terminals correspond to expected
results? (Remember that secondary current values for load current
flowing out of a terminal will be 180° out-of-phase with the
reference phase position for that terminal. The reason is that CT
polarity marks normally face away from the transformer on all
terminals.)

SEL-400G Relay
Instruction Manual
S E C T I O N 4
Front-Panel Operations
There are two prominent functions of the front panel, i.e., front-panel operations
and the bay controller. This section describes the front-panel operations, and Bay
Control Front-Panel Operations on page 5.12 in the SEL-400 Series Relays
Instruction Manual describes the bay controller. Using the front panel, you can
analyze power system operating information, view and change relay settings, col-
lect power system data, and perform relay control functions. For ease of naviga-
tion, the front-panel menu is a straightforward menu driven control structure
presented on the front-panel LCD. Front-panel targets and other LED indicators
give a quick look at SEL-400G Advanced Generator Protection System operation
status. You can perform often-used control actions rapidly by using the large
direct-action pushbuttons. All of these features help you operate the relay from
the front panel and include:
➤ Reading metering
➤ Inspecting targets
➤ Accessing settings
➤ Controlling relay operations
This section includes the following:
➤ Front-Panel LCD Default Displays on page 4.1
➤ Front-Panel Menus and Screens on page 4.3
➤ Target LEDs on page 4.15
➤ Front-Panel Operator Control Pushbuttons on page 4.16
➤ One-Line Diagrams on page 4.18
Front-Panel LCD Default Displays

The SEL-400G has two screen scrolling modes: autoscrolling and manual scroll-
ing. After front-panel time-out, the relay enters the autoscrolling mode, and the
LCD presents each of the display screens in this sequence:
➤ Any active (filled) alarm points screens
➤ Any active (filled) display points screens
➤ One-line diagrams
➤ Enabled metering screens
Table 4.1 through Table 4.5 show the screens available for display on the front
panel in the autoscrolling mode.
Table 4.1 Bay Control
Screen Description
ONELINE Bay Control screen

4.2 Front-Panel Operations
Front-Panel LCD Default Displays
Table 4.2 RMS Quantities
Screen Description
RMSZV Generator line-to-line rms voltage screen

RMSGVI Generator rms current and voltage screen
Table 4.3 Fundamental Quantities
Screen Description
FUNVV System fundamental line-to-line voltage, frequency, and VDC

screen
FUNZV Generator fundamental line-to-line voltage, frequency, and VDC
screen
FUN1VV Fundamental single-phase voltage screen
a
FUNmVI Terminal m fundamental phase current and voltage screen
FUN1YI Fundamental single-phase current screen
a
FUNmSQ Terminal m fundamental sequence voltage and current screens
a
FUNmPQ Terminal m fundamental real (P) and reactive (Q) screen
a
FUNmVA Terminal m fundamental apparent power and power factor screen
a m = S, T, U, Y, G.
Table 4.4 Energy Quantities
Screen Description
a
ENRMETm Terminal m energy screen
a m = S, T, U, Y, G.
Table 4.5 Differential Quantities
Screen Description
DIFFMET Differential quantities screen
Use the front-panel settings (the SET F RDD command from a communications
port or the Front Panel settings in SEL Grid Configurator Software) to select
which screens to enable. Enter each of the screens you need on a separate line.
The relay will display the screens in the sequence that you enter. Figure 4.1
shows a sample ROTATING DISPLAY consisting of an example alarm points screen
(see Alarm Points on page 4.7 in the SEL-400 Series Relays Instruction Manual),
an example display points screen (see Display Points on page 4.10 in the
SEL-400 Series Relays Instruction Manual), and the metering screen FUNGVI
(see Table 4.2).

Front-Panel Operations 4.3
Front-Panel Menus and Screens
ROTATING DISPLAY
*Hot-Spot Alarm
Press to acknldge
ROTATING DISPLAY
Bank 1 Cooling Fans
--Running--
Bank 2 Cooling Fans
--Stopped--
ROT.DISP: FND TRM G

CURRENT (A)
IA = 150.1 3°
IB = 155.0 –120°
IC = 151.3 121°
VOLTAGE <Z> (kV)
VA = 13.812 –1°
VB = 13.116 –120°
VC = 13.322 120°
FREQG = 59.050 Hz
VDC = 24.1 V
Figure 4.1 Sample ROTATING DISPLAY

Operate the SEL-400G front panel through a sequence of menus that you view on
the front-panel display. The MAIN MENU is the introductory menu for other front-
panel menus. These additional menus allow you onsite access to metering, con-
trol, and settings for configuring the SEL-400G to your specific application
needs. Use the following menus and screens to set the relay, perform local control
actions, and read metering:
➤ Support Screens
➢ Contrast
➢ Password
➤ MAIN MENU
➢ METER
➢ EVENTS
➢ BREAKER MONITOR
➢ RELAY ELEMENTS
➢ LOCAL CONTROL
➢ SET/SHOW
➢ RELAY STATUS
➢ VIEW CONFIGURATION
➢ DISPLAY TEST

➢ RESET ACCESS LEVEL

➢ ONELINE DIAGRAM
See Section 4: Front-Panel Operations in the SEL-400 Series Relays Instruction

Manual for information on most of these screens. The following screen descrip-
tions are unique to the SEL-400G.
Meter
The SEL-400G displays metering screens on the LCD. Highlight METER on the
MAIN MENU screen to select these screens. The METER MENU, shown in Figure 4.2,
allows you to choose the following metering screens corresponding to the relay
metering modes:
➤ RMS METER
➤ FUNDAMENTAL METER
➤ DEMAND METER
➤ ENERGY METER
➤ METER MIN/MAX
➤ SYNCHRONOUS CHECK
➤ DIFFERENTIAL METER
➤ STATOR GROUND METER
➤ INSULATION R/C METER
MAIN MENU
METER
EVENTS
BREAKER MONITOR
RELAY ELEMENTS
LOCAL CONTROL
SET/SHOW
RELAY STATUS
VIEW CONFIGURATION
DISPLAY TEST
RESET ACCESS LEVEL
ONE LINE DIAGRAM
METER MENU
RMS METER
FUNDAMENTAL METER
DEMAND METER
ENERGY METER
METER MIN/MAX
SYNCHRONOUS CHECK
DIFFERENTIAL METER
STATOR GROUND METER
INSULATION R/C METER
Figure 4.2 METER Menus
Figure 4.2 shows the nine categories of meter screens available in the SEL-400G.
Table 4.6 summarizes the conditions under which these categories are displayed
and also states how the FTSRCm (m = S, T, U, W, X, Y), PTCONk (k = V, Z),
CTCONY, EPCAL, ESYSPT, and ESYSCT settings influence the displays.
Table 4.6 Meter Availability Conditions (Sheet 1 of 2)
Meter Dependencies
RMS Meter None

Fundamental Meter None
Demand Meter EDEM  N
Energy Meter None

Table 4.6 Meter Availability Conditions (Sheet 2 of 2)
Meter Dependencies
Meter Min/Max EMXMN  N

Synchronous Check E25  OFF
Differential Meter E87  N
Stator Ground Meter E64G  OFF
Insulation R/C Meter E64S  N or E64F  N
a
FTSRCm Voltage Terminal Z is associated with Current Terminal m
when FTRCm = G.
ESYSPT Voltage Terminal V is associated with Current Terminal m
when FTRCm = S and ESYSPT = V. Voltage Terminal Z is
associated with Current Terminal m when FTSRCm = S and
ESYSPT  V.
ESYSCT Fundamental metering screens are shown only for terminals
included in the ESYSCT setting. Terminal G screens are
always shown.
EPCAL Power and energy screens are shown only for terminals
included in the EPCAL setting. Terminal G screens are
always shown.
PTCONkb Zero-sequence voltage is available when PTCONk = Y. Sin-
gle-phase voltages are available when PTCONk = 1PH.
CTCONY Single-phase currents are available when CTCONY = 1PH.
a If CTCONY = 1PH, m = S, T, U, W, X. If CTCONY = Y, m = S, T, U, W, X, Y.
b
k = V, Z.
RMS Meter
To view the rms meter values, select METER from the main menu and press ENT,
then press ENT with RMS METER highlighted. This shows the screen with the TER-
MINAL G and TERMINAL Z options. With TERMINAL G highlighted, press ENT to see
the generator currents and voltages, as shown in Figure 4.3(A). With TERMINAL Z
highlighted, press ENT to see the generator line-to-line voltages, as shown in
Figure 4.3(B).
RMS METER RMS METER

TERMINAL G TERMINAL G
TERMINAL Z TERMINAL Z
RMS MET: TERMINAL G RMS MET: TERMINAL Z

CURRENT (A) VOLTAGE PT Z (kV)
IA = 00000.0 VAB = 000.000
IB = 00000.0 VBC = 000.000
IC = 00000.0 VCA = 000.000
VOLTAGE Z (kV) FREQG = 000.000 Hz
VAB = 000.000 VDC = 000.0 V
VBC = 000.000
VCA = 000.000
(A) (B)
Figure 4.3 RMS Metering Screens

Fundamental Meter
The fundamental meter provides a phase voltage and current screen. As well as
sequence component, active, reactive, and apparent power screens as shown in
Figure 4.4. Figure 4.4(b) shows the fundamental metering screen for Terminal S.
Notice that the fundamental meter includes the angular relationships, using the
positive-sequence voltage of Terminal Z as reference. Press the down arrow to
move to the Terminal S sequence screen. This screen shows the positive, nega-
tive, and zero-sequence voltage and currents for Terminal S. Zero-sequence volt-
ages are not shown when the PTs are connected in delta. Press the down arrow to
move to Screens (d) and (e). They show the fundamental real, reactive and appar-
ent power, and the power factors.

FUNDAMENTAL METER
TERMINAL Z
TERMINAL V
TERMINAL S
TERMINAL T
TERMINAL U
TERMINAL Y
TERMINAL G
(a)
FND MET: TERMINAL S
CURRENT(A)
IA = 00000.0 –000°
IB = 00000.0 –000°
IC = 00000.0 –000°
VOLTAGE Z (kV)
VAB = 000.000 –000°
VBC = 000.000 –000°
VCA = 000.000 –000°
FREQ = 000.000 Hz
VDC = 000.0 V
(b)
FND MET: TERMINAL S
CURRENT (A)
I1 = 00000.00 –000°
3I2 = 00000.00 –000°
3I0 = 00000.00 –000°
VOLTAGE Z (kV)
V1 = 000.00 –000°
3V2 = 000.00 –000°
3V0 = 000.00 –000°
(c)
FND MET: TERMINAL S
ACTIVE POWER (MW)
A = –00000.0
B = –00000.0
C = –00000.0
3P = –00000.0
REACT. PWR(MVAr)
A = –00000.0
B = –00000.0
C = –00000.0
3Q = –00000.0
(d)
FND MET: TERMINAL S
APPARENT PWR(MVA)
A = –00000.0
B = –00000.0
C = –00000.0
3S = –00000.0
POWER FACTOR
A = 0.00 (LEAD/LAG)
B = 0.00 (LEAD/LAG)
C = 0.00 (LEAD/LAG)
3P = 0.00 (LEAD/LAG)
(e)
Figure 4.4 Fundamental Metering Screens
Figure 4.5 shows the single-phase currents for Terminal Y when CTCONY =
1PH.

FND MET: TERMINAL Y

CURRENT (A)
IY1 = 00000.0 –000°

IY2 = 00000.0 –000°
IY3 = 00000.0 –000°
Figure 4.5 Fundamental Terminal Y Single-Phase Screen
Figure 4.6 shows the single-phase voltages for Terminal V when PTCONV =
1PH.
FND MET: TERMINAL V

VOLTAGE PT V (kV)
VV1 = 000.000 –000°
VV2 = 000.000 –000°
VV3 = 000.000 –000°
Figure 4.6 Fundamental Terminal V Single-Phase Screen
Demand Meter
In the SEL-400G, the demand meter operate quantities are not fixed. Instead of
fixed operating quantities, select a suitable operating quantity (see Section 12:
Analog Quantities) for each of the 10 demand elements (see Demand Meter on
page 7.8 for more information).
Because you can select the number of demand elements, there will be either one
or two sets of demand meter screens. If you select five or fewer demand ele-
ments, then there is only one screen; for greater than five demand elements, there
are two screens. Figure 4.7 shows the demand screens. Screen (A) shows the
selected demand element operating quantities (a second screen is shown only if
more than five operating quantities are selected). Also, each operating quantity
can be either a rolling or a thermal calculation. This selection is shown by ROLL
PK or THERM PK following the operating quantity in Screen (A). Screen (B) and
Screen (C) show reset options for demand and maximum demand quantities. Use
the left arrow and right arrow pushbuttons to select a NO or YES response to the
reset prompt, and then press ENT to reset all of the metering quantities.

DEMAND METER DEMAND METER DEMAND METER

DISPLAY DEMAND DISPLAY DEMAND DISPLAY DEMAND
RESET DEMAND RESET DEMAND RESET DEMAND
RESET PEAK DEMAND RESET PEAK DEMAND RESET PEAK DEMAND
DEMAND METER RESET DEMAND RESET PEAK DEMAND

<DMOQ01> = 0000.0
ROLL PK = 0000.0
• LAST DEMAND RESET: LAST MAX DEMAND

• RESET:
• mm/dd/yyy hh:mm:ss mm/dd/yyy hh:mm:ss
<DMOQ10> = 0000.0 RESET DEMAND NOW? RESET MAX NOW?

ROLL PK = 0000.0 NO YES NO YES
(A) (B) (C)
Figure 4.7 Demand Meter Screens
Energy Meter
Energy metering screens follow the demand meter screens. Figure 4.8(A) shows
the screen for Terminal S, Figure 4.8(B) the energy reset screen. Use the left
arrow and right arrow pushbuttons to select a NO or YES response to the reset
prompt, and then press ENT to reset all of the metering quantities.
ENERGY METER ENERGY METER

DISPLAY ENERGY DISPLAY ENERGY
RESET ENERGY RESET ENERGY
ENERGY METER RESET ENERGY

TERMINAL S
ENERGY EXPORT
3P = 0000.00 MWh
3Q = 0000.00 MVARh LAST ENERGY RESET:
ENERGY IMPORT mm/dd/yyy hh:mm:ss
3P = 0000.00 MWh
3Q = 0000.00 MVARh RESET ENERGY NOW?
ENERGY TOTAL NO YES
3P = 0000.00 MWh
3Q = 0000.00 MVARh
(A) (B)
Figure 4.8 Energy Meter Screens
Min/Max Meter
In the SEL-400G, the min/max meter operate quantities are not fixed. Instead of
fixed operating quantities, select a suitable operating quantity (see Section 12:
Analog Quantities) for each of the 30 min/max elements (see Metering on
page 7.2 for more information).

Because you can select the number of demand elements, there will be as many as
30 meter min/max screens. Figure 4.9(A) shows the selected min/max element
operating quantity, the minimum and maximum values and associated time-
stamps. Figure 4.9(B) is for resetting. Use the left arrow and right arrow pushbut-
tons to select a NO or YES response to the reset prompt, and then press ENT to reset
the minimum and maximum values.
METER MIN/MAX METER MIN/MAX

DISPLAY MIN/MAX DISPLAY MIN/MAX
RESET MIN/MAX RESET MIN/MAX
DISPLAY MIN/MAX RESET MIN/MAX

IMAXSF
MIN 0.15
DATE: mm/dd/yyyy
TIME: hh/mm/ss LAST MIN/MAX RESET:
mm/dd/yyy hh:mm:ss
MAX 2.511E10
DATE: mm/dd/yyyy RESET MIN/MAX NOW?
TIME: hh/mm/ss NO YES
(A) (B)
Figure 4.9 Min/Max Meter Screens
Synchronous Check Meter

Following the meter min/max screens are the synchronous check meter screens.
The SEL-400G provides a synchronism check element for each breaker (S, T, U,
and Y), and a screen is provided for each enabled element as shown in
Figure 4.10(A).
The screen of Figure 4.10(B) shows the status of the breaker (open or closed)
according to the 52CLn status. Also shown is the magnitude of the generator
voltage (VPFM), the system voltage (VSFM), the percentage voltage difference
(DIFV), the angle difference (ANG), the frequency difference (SLIP), and the
generator and system frequencies (FREQG and FREQS).

MET. SYNCH. CHECK

BREAKER S
BREAKER T
BREAKER U
BREAKER Y
(A)
BREAKER S
STATUS: OPEN
VPFM 000.00 (V)
VSFM 000.00 (V)
DIFV 000.00 (%)
ANG –000.00
SLIP 000.000 (Hz)

FREQG 000.000 (Hz)
FREQS 000.000 (Hz)
(B)
Figure 4.10 Synchronous Check Meter Screens
Differential Meter
Differential operate and restraint current are metered for each enabled zone, as
shown in Figure 4.11. The SEL-400G provides a differential metering screen for
two possible zones, according to the E87 setting.
DIFFERENTIAL METER
FAULT QUANTITIES
(pu of TAP)
Zone 1 Zone 2
IOPA = 0.00 0.00
IOPB = 0.00 0.00
IOPC = 0.00 0.00
IRTA = 0.00 0.00

IRTB = 0.00 0.00
IRTC = 0.00 0.00
Figure 4.11 Differential Meter Screen
Stator Ground Meter

The SEL-400G provides a stator ground metering screen, as shown in
Figure 4.12, to monitor the protection analogs used in the stator ground element.
See One Hundred Percent Stator Ground Elements on page 5.60 for more infor-
mation.
STATOR GROUND METER

VNFM 0.00 V
VNFA 0°
VG3FM ------ V
VG3FA ----°
3V0Z3M ------ V
3V0Z3A ----°
V3DIF ------ V
V3RAT --- PU
Figure 4.12 Stator Ground Meter Screen

Insulation R/C Meter

Insulation R/C metering is the final front-panel display screen. The SEL-400G
provides stator and field insulation metering, as shown in Figure 4.13, which dis-
plays the measured insulation resistances and capacities.
INSULATION R/C METER

64SIR 0.00 kΩ
64SIC 0.00 uF
64FIR 0.00 kΩ
Figure 4.13 Insulation R/C Meter Screen
Events
The SEL-400G front panel features summary event reporting, which simplifies
post-fault analysis. These summary event reports include the items shown in
Table 4.7.
Table 4.7 Event Elements
Event Description
87 ZONE 1, 87 ZONE 2, REF Differential elements involvement for event reports gener-
ated by 87A, 87B, or 87C of Zones 1 and 2. REF is the
OR combination of REFF1, REFF2, and REFF3
EX TRIP Rising edge of TRIPEX (Excitation TRIP)
PM TRIP Rising edge of TRIPPM (Prime Mover TRIP)
AUX TRIP Rising edge of TRIPAUX
TRIP Rising edge of Relay Word bit TRIP
ER (event report trigger) Rising edge of ER (SELOGIC control equation)
TRIG Execution of the TRIGGER (TRI) command (manually
triggered)
EVENT SUMMARY 10002 EVENT SUMMARY 10002 EVENT SUMMARY 10002 EVENT SUMMARY 10002
10/15/2019 GROUP 1 TARGETS: TARGETS: FAULT QUANTITIES
15:09:02.846 ALIAS 17 ALIAS 18 (pu of TAP)
ALIAS 19 ALIAS 20 ZONE 1 ZONE 2
EVENT: ER ALIAS 21 ALIAS 22 IOPA = 0.03 0.03
GEN FREQ: 59.997 ALIAS 23 ALIAS 24 IOPB = 3.30 3.31
SYS FREQ: 60.000 IOPC = 3.28 3.28
IRTA = 1.39 1.39
IRTB = 3.30 3.31
IRTC = 3.34 3.35
(A) (B) (C) (D)

Figure 4.14 EVENT SUMMARY Screen
To assist with fault analysis, the SEL-400G displays the targets that asserted
during the event on the front panel. Use the right arrow pushbutton to move from
Screen (A) to Screen (B) in Figure 4.14. There are 24 alias items (ALIAS 01
through ALIAS 24), one for each of the front-panel LEDs. Use the SET T com-
mand to enter alias settings for Relay Word bits TLED_1 through TLED_24. If
no alias is defined for a particular TLED_x (x = 1 through 24), then the TLED_x

Relay Word bit name is displayed. Also, if the particular TLED_x target is not set
to be a tripping target, (i.e., TxLEDL setting is N), then it is not displayed.
Figure 4.14(D) shows the differential quantities for the event.
Breaker Monitor
The SEL-400G features an advanced circuit breaker monitor. Select BREAKER
MONITOR screens from the MAIN MENU to view circuit breaker monitor alarm data
on the front-panel display. Figure 4.15 shows the case where Monitor setting
EBMON = S T U, i.e., three breakers are enabled. (If only one breaker is enabled
[e.g., EBMON = S], then Figure 4.15(b) is not shown, and Figure 4.15(c) appears
directly). Use the navigation pushbuttons to choose between BREAKER S,
BREAKER T, or BREAKER U. Press ENT to view the selected circuit breaker monitor
information, as shown in Figure 4.15(c). The BKR n ALARM COUNTER screen dis-
plays the number of times the circuit breaker exceeded certain alarm thresholds
(see Circuit Breaker Monitor on page 7.18).
MAIN MENU
METER
EVENTS
BREAKER MONITOR
RELAY ELEMENTS
LOCAL CONTROL
SET/SHOW
RELAY STATUS
VIEW
CONFIGURATION
DISPLAY TEST
RESET ACCESS LEVEL
ONE LINE DIAGRAM
(a)
BKR ALARM SUBMENU
BREAKER S
BREAKER T
BREAKER U
BREAKER Y
(b)
BKR S ALARM COUNTER
ALARM COUNT
MECH. OP. TIME 0
ELEC. OP. TIME 0
BKR INACTIVITY 0
MOTOR RUNTIME 0
CURRENT
INTERRUPTED 0
LAST RESET:
02/03/2008
(c)
BKR ALARM COUNTER
NONE OF THE BREAKER

ALARMS ARE ENABLED.
(d)
Figure 4.15 BREAKER MONITOR Report Screens

Figure 4.15(d) shows the screen when no breaker monitors are enabled
(EBMON = OFF).
View Configuration
You can use the front panel to view detailed information about the configuration
of the firmware and hardware components in the SEL-400G. In the MAIN MENU,
highlight the VIEW CONFIGURATION option by using the navigation pushbuttons
and press ENT. The relay presents seven screens in the order shown in Figure 4.16.
Use the navigation pushbuttons to scroll through these screens. When finished
viewing these screens, press ESC to return to the MAIN MENU.
CONFIGURATION INFO
FID=SEL-400G-R100-
V0-Z001001-D2020XXXX
PART NUMBER: 0400G0X
6XX1B8XXH8242424
S/N=1201200391 CONFIGURATION INFO
SELBOOT: MAINBOARD:
BFID=SLBT-4XX- CODE FLASH: 12 MB
XXXX-V0-Z001002- DATA FLASH:116 MB
D2020XXXX RAM: 64 MB
CHECKSUM: 3796 EEPROM: 128 KB
CONFIGURATION INFO
ANALOG BOARD A:
S: CURRENTS: 5 A
T: CURRENTS: 5 A
U: CURRENTS: 5 A
V: VOLTAGE : 67 V
CONFIGURATION INFO
ANALOG BOARD B:
W: CURRENTS: 5 A
X: CURRENTS: 5 A
Y1: CURRENTS: 5 A
Y2: CURRENTS: 5 A
Y3: CURRENTS: 5 A
Z: VOLTAGE : 67 V
CONFIGURATION INFO
INTERFACE BOARDS:
BOARD 1:XX INPUTS
XX OUTPUTS
BOARD 2:NOT
INSTALLED
EXTENDED FEATURES:
IEC 61850 CONFIGURATION INFO
COMMS CONFIGURATION:
BAY 1 - SERIAL 87L
BAY EMPTY
BAY 2 - SERIAL 87L
BAY EMPTY
BAY 3 - ETHERNET
PORT 5A: FIBER CONFIGURATION INFO
PORT 5B: COPPER IF THE CONFIGURATION
PORT 5C: FIBER IS NOT WHAT YOU
PORT 5D: COPPER EXPECTED, CONTACT
BAY 4 - RS-232/IRIG SEL FOR ASSISTANCE.
Figure 4.16 VIEW CONFIGURATION Sample Screens

Target LEDs
Target LEDs
The SEL-400G gives you at-a-glance confirmation of relay conditions via 24
color-programmable operation and target LEDs, located in the middle of the
relay front panel, as shown in Figure 4.17. To provide clear visual indication,
choose between red and green for the ENABLED and TRIP LED colors. For the
remaining LEDs, choose among red, green, or amber.
ENABLED
TARGET
TRIP RESET
87 GEN DIFF GENBKR TRIP
87 GSU DIFF FIELD TRIP
REF PMVR TRIP
24 VOLTS/HZ AUX TRIP
64 STA GND GEN ONLINE
64 FLD GND 46 CUR UNB
40 LOF 49 THERMAL
32 REV PWR 27/59 VOLT
81 O/U FREQ 60 LOP
78 OOS
SYS BACKUP
GENBKR FAIL
Figure 4.17 Factory-Default Front-Panel Target LEDs
A description of the general operation and configuration of these LEDs is pro-

vided in Section 4: Front-Panel Operations in the SEL-400 Series Relays Instruc-
tion Manual. Please note that the SEL-400G has alternate behavior on the
Tn_LED bits: they latch independent of the trip condition.
Table 4.8 shows the LED labels (top to bottom in Figure 4.17) and the actual set-
tings.
Table 4.8 LED Settings (Sheet 1 of 2)
LED Label Settings Comment
87 GEN DIFF 87Z1 Zone 1 differential element asserted

87 GSU DIFF 87Z2 Zone 2 differential element asserted
REF REF Restricted earth fault
24 VOLTS/HZ 24D1T1 OR 24D2T1 Volts/hertz
64 STA GND 64GT Stator ground element asserted
64 FLD GND 64F1T OR 64F2T Field ground element asserted
40 LOF 40Z1T OR 40Z2T OR 40P1T OR 40P2T Loss-of-field element asserted
32 REV PWR 32T01 Directional power Element 1 asserted
81 O/U FREQ 81D1T OR 81D2T OR 81D3T OR 81D4T OR Over- or underfrequency element asserted
81D5T OR 81D6T
78 OOS 78OST Out-of-step detected
SYS BACKUP 51CT OR 51VT OR 21PZ1T OR 21PZ2T Backup protection element asserted
GENBKR FAIL FBFS Breaker failure, Terminal S
GENBKR TRIP TRIPS Trip logic asserted, Terminal S
FIELD TRIP TRIPEX Generator exciter trip

Front-Panel Operator Control Pushbuttons
Table 4.8 LED Settings (Sheet 2 of 2)
LED Label Settings Comment
PMVR TRIP TRIPPM Generator prime mover trip

AUX TRIP TRIPAUX Generator auxiliary trip
GEN ONLINE ONLINE Generator online logic asserted
46 CUR UNB 46Q1T1 OR 46Q1T2 OR 46Q2T1 OR 46Q2T2 Current unbalance element asserted
49 THERMAL THRLT1 OR THRLT2 OR THRLT3 IEC thermal element asserted
27/59 VOLT 271P1T OR 591P1T Over- or undervoltage element asserted
60 LOP LOPZ Loss of potential, Terminal Z
You can reprogram all of these indicators except the ENABLED and TRIP LEDs to
reflect other operating conditions than the factory-default programming
described in this section. Settings Tn_LED are SELOGIC control equations that,
when asserted during a relay trip event, light the corresponding LED. Parameter n
is a number from 1 through 24 that indicates each LED.
Program settings TnLEDL := Y to latch the LEDs when the Tn_LED SELOGIC
control equation is true, regardless of the status of TRIP. The LEDs will reset
with a subsequent TRIP or a TARGET RESET via the front panel or the TAR R com-
mand. When you set TnLEDL := N, the trip latch supervision has no effect and
the LED follows the state of the Tn_LED SELOGIC control equation. The relay
reports these targets in event report summaries. The asserted and deasserted col-
ors for the LED are determined with settings TnLEDC. Options include red,
green, amber, or off.
After setting the target LEDs, issue the TAR R command or press the TARGET
RESET button on the front panel to reset the target LEDs.
Use the slide-in labels to mark the LEDs with custom names. Included on the
SEL-400 Series Product Literature DVD is a custom label template to print labels
for the slide-in label areas.

The SEL-400G front panel features large operator control pushbuttons coupled
with color-programmable annunciator LEDs for local control. Figure 4.18 shows
this region of the relay front panel with configurable front-panel labels.

Annunciator LED
Operator
Control Pushbutton
Figure 4.18 Operator Control Pushbuttons and LEDs
There are two ways to program the operator control pushbuttons. The first is
through front-panel settings PBnn_HMI (nn = 1–12). These settings allow any of
the operator control pushbuttons to be programmed to display a particular HMI
screen category. The HMI screen categories available are Alarm Points, Display
Points, Event Summaries, SER, and Bay Control. Front-panel setting NUM_ER
allows the user to define the number of event summaries that are displayed via
the operator control pushbutton; it has no effect on the event summaries automat-
ically displayed or the event summaries available through the main menu. Each
HMI screen category can be assigned to a single pushbutton.
Attempting to program more than one pushbutton to a single HMI screen cate-
gory will result in an error. After assigning a pushbutton to an HMI screen cate-
gory, pressing the pushbutton will jump to the first available HMI screen in that
particular category. If more than one screen is available, a navigation scroll bar
will be displayed. Pressing the navigation arrows will scroll through the available
screens. Subsequent pressing of the operator control pushbutton will advance
through the available screens, behaving the same as the right arrow or down
arrow pushbutton. Pressing the ESC pushbutton will return the user to the ROTAT-
ING DISPLAY. The second way to program the operator control pushbutton is
through SELOGIC control equations, using the pushbutton output as a program-
ming element.
Using SELOGIC control equations, you can readily change the default LED func-
tions. Use the slide-in labels to mark the pushbuttons and pushbutton LEDs with
custom names to reflect any programming changes that you make. The labels are
keyed; you can insert each Operator Control Label in only one position on the
front of the relay. Included on the SEL-400 Series Product Literature DVD is a
template for printing slide-in labels. See the instructions included in the Configu-
rable Label kit for more information on changing the slide-in labels.
The SEL-400G has two types of outputs for each of the front-panel pushbuttons.
Relay Word bits represent the pushbutton presses. One set of Relay Word bits fol-
lows the pushbutton and another set pulses for one processing interval when the
button is pressed. Relay Word bits PB1–PB12 are the “follow” outputs of opera-
tor control pushbuttons. Relay Word bits PB1_PUL–PB12PUL are the pulsed
outputs.

One-Line Diagrams
Annunciator LEDs for each operator control pushbutton are PB1_LED–

PB12_LED. The asserted and deasserted colors for the LED are determined with
settings PBnnCOL. Options include red, green, amber, or off. You can change the
LED indications to fit your specific control and operational requirements. This
programmability allows great flexibility and provides operator confidence and
safety, especially in indicating the status of functions that are controlled both
locally and remotely.
One-Line Diagrams
One-line diagrams are fully explained in Section 5: Control in the SEL-400
Series Relays Instruction Manual. The SEL-400G supports as many as ten
scrollable single-line diagrams from the HMI, with the first single-line diagram
appearing in the rotating display.
By using Grid Configurator, you can include the bay control screens in the rotat-
ing display. Select ONELINE (found under Front Panel settings), selectable
screens, as shown in Figure 4.19.
Figure 4.19 Bay Control Screen Selected for Rotating Display
You can also configure an HMI pushbutton to give you direct access to the bay
control screen. Figure 4.20 shows an example of how to configure HMI Pushbut-
ton 3 to provide this access by selecting the BC option from the drop-down menu.

One-Line Diagrams
Figure 4.20 Configuring PB1_HMI for Direct Bay Control Access
Panning
When you specify a custom layout that is too large for one screen, you can take advan-
tage of the panning feature to display sections not visible in the present screen view.
Figure 4.21 and Figure 4.22 show an example station with a breaker-and-a-half applica-
tion.
BB1
SW1
CT1
Screen 1 SW2
BKR1
SW3 SW4
SW5
Common CT2
CT
TT22
Area BBKR2
BKR RR22
CT3
SW6
SW7
Screen 2 BKR3
SW8
CT4
BB2
Figure 4.21 Screen 1

One-Line Diagrams
BB1
SW1
CT1
Screen 1 SW2
BKR1
SW3 SW4
SW5
Common CT2
CCTT2
T2
Area BBKR2
BK KKR2
R22
CT3
SW6
SW7
Screen 2 BKR3
SW8
CT4
BB2
Figure 4.22 Screen 2
Panning is discontinuous and necessitates your toggling between two front-panel

screens.
➤ Screen 1 plus the common area (Figure 4.21)
➤ Screen 2 plus the common area (Figure 4.22)
When you specify a custom screen, be sure to separately specify these three areas.

data set5SEL-400G
Instruction Manual Relay
S E C T I O N 5
Protection Functions
This section provides a detailed explanation of the SEL-400G Advanced Genera-
tor Protection System protection functions. Each section provides an explanation
of the function, along with a list of the corresponding settings and Relay Word
bits. Logic diagrams and other figures are included. The following functions are
discussed in this section:
NOTE: Each SEL-400G is shipped ➤ Application Data on page 5.2.
with default factory settings. Calculate
the settings for your application to ➤ Configuration of Voltage Inputs on page 5.3
ensure secure and dependable
protection. Document and enter the ➤ Configuration of Current Inputs on page 5.9
settings (see Section 8: Settings).
➤ Frequency Tracking on page 5.12
➤ Power System Data on page 5.15
➤ Pumped Storage on page 5.17
➤ Universal Differential Elements on page 5.18
➤ Negative-Sequence Percentage-Restrained Differential Element on
page 5.47
➤ Restricted Earth Fault Element on page 5.50
➤ One Hundred Percent Stator Ground Elements on page 5.60
➤ Directional Power Elements on page 5.76
➤ Capability-Based Loss of Field on page 5.80
➤ Impedance-Based LOF Elements on page 5.97
➤ Current Unbalance Elements on page 5.101
➤ Volt/Hertz Elements on page 5.104
➤ Split-Phase Protection on page 5.112
➤ System Backup Protection on page 5.118
➤ Load-Encroachment Logic on page 5.126
➤ Thermal Model on page 5.128
➤ Out-of-Step Element on page 5.137
➤ Inadvertent Energization on page 5.144
➤ Field Ground Protection on page 5.146
➤ Synchronism-Check Element on page 5.148
➤ Autosynchronizer on page 5.160
➤ Loss-of-Potential Element on page 5.170
➤ Open-Phase Detection Logic on page 5.175
➤ Breaker Failure Elements on page 5.175
➤ Breaker Flashover Elements on page 5.183
➤ Over- and Underfrequency Elements on page 5.185
➤ Accumulated Frequency Element on page 5.187
➤ Over- and Under-Rate-of-Change-of-Frequency Element on
page 5.190

5.2 Protection Functions
Application Data
➤ Injection-Based Stator Ground Protection on page 5.192

➤ Over- and Undervoltage Elements on page 5.195
➤ Overcurrent Elements on page 5.199
➤ Selectable Time-Overcurrent Element on page 5.207
➤ Trip Logic on page 5.220
➤ Close Logic on page 5.222
Application Data
It is faster and easier for you to calculate the settings for the SEL-400G if you
collect the following information before you begin:
➤ Generator/transformer data
➤ System phase rotation and nominal frequency
➤ Highest expected load current
➤ Current transformer primary and secondary ratings and connections
➤ Voltage transformer ratios and connections,
➤ Type and location of resistance temperature devices (RTDs), if used
➤ Expected fault current magnitudes for ground and three-phase faults
Inverting Polarity of Current and Voltage Inputs

The relay can change the polarity of the CT and PT inputs. This ability allows the
user to change CT and PT polarity digitally to correct for incorrect wiring to the
input on the back of the relay. You can change the polarity on a per-terminal or
per-phase basis, but you must practice extreme caution when using this function.
The change of polarity applies directly to the input terminal and is carried
throughout all calculations, metering, and protection logic.
The EINVPOL setting is always hidden on the front-panel HMI.
Table 5.1 Inverting Polarity Setting
Default
Setting Prompt Range
Value
EINVPOL Enable Invert Polarity (Off or OFF, Combo of Spa, Tp, Up, Wp, OFF
combo of terminals) Xp, Ynb, Vp, and Zp
a Where p = A, B, C. Entering a terminal without specifying a phase designation applies the setting
to all phases of that terminal. For example, EINVPOL := SA, SB, X inverts the polarity of the A-
and B-Phases for Terminal S and all phases for Terminal X.
b
Where n = 1, 2, 3. For example, EINVPOL := Y1, Y3 inverts the polarity of the Y1 and Y3 terminals.
If redundant entries of terminals are used, such as W, WA or X, XC, the relay dis-
plays the following error message: Redundant entries for terminal [m].
Inverse Polarity in Event Reports

In raw or high-resolution COMTRADE event reports, terminals that have EIN-
VPOL enabled do not show the polarity as inverted. The raw COMTRADE must
display the values as they are applied to the back of the relay. This also ensures
that when you use an event playback, the setting is applied to the signals coming
in the back of the relay and recreates the event properly.

Protection Functions 5.3
Configuration of Voltage Inputs
Filtered or low-resolution and disturbance COMTRADE show the polarity as

inverted. The filtered and disturbance events display the analogs as the relay uses
them in processed logic; therefore, the inverted polarity is shown.

The SEL-400G has six voltage inputs that are arranged into two groups: V and Z.
The voltage inputs are configurable, which allow them to be applied in a wide
variety of applications as described in Figure 5.2 through Figure 5.6.
The Z terminal is dedicated to measuring the voltage at the generator terminals.
The Z terminal can be configured for wye or open-delta PTs. Protection elements
associated with the generator, such as 21, 32, 40, 51V/C, and 78, use the Z inputs
for voltage. Accordingly, the SEL-400G derives the generator frequency source
from the Z terminal.
The V terminal is available for measuring the power system voltage in synchro-
nizing applications but can be used for other purposes. The V terminal can be
configured for wye, open-delta, or single-phase PTs.
Voltage Input Connections

Figure 5.1 shows the SEL-400G voltage rear connections and internal naming
convention.
S Terminal T Terminal U Terminal V Terminal
IAS IBS ICS IAT IBT ICT IAU IBU ICU VAV VBV VCV
(VV1) (VV2) (VV3)
W Terminal X Terminal Y Terminal Z Terminal
(IY1) (IY2) (IY3) (VZ2)
Figure 5.1 SEL-400G Voltage Connections and Naming Convention
When PTCONk = Y (k = V or Z), a three-phase voltage can be connected as

shown in Figure 5.2. The voltage signals are named internally as VAk, VBk, and
VCk.
A B C
a VAk
b VBk
c VCk
n
k = V or Z
Figure 5.2 Connection of a Three-Phase Voltage for PTCONk = Y

When PTCONk = D or D1, a three-phase voltage can be connected as shown in

Figure 5.3. The voltage signals are named internally as VAk and VCk. Note that
the VBk input is not used in Figure 5.3 and this input is named internally as Vk2.
A B C A B C
a VAk a VAk
b b
c VCk c VCk
k = V or Z
Connection 1 Connection 2
Figure 5.3 Connection of a Three-Phase Voltage for PTCONk = D or

PTCONk = D1
When PTCONk = D, a neutral or single-phase voltage can be connected as shown

in Figure 5.4. This allows the Vk2 input to be applied to protection applications
that use the generator neutral voltage or in single-phase voltage applications.
A B C A B C
VAZ Vk2
VCZ
52
VAZ
VCZ
Vk2
k = V or Z
Generator Neutral Application Synchronism-Check Application
Figure 5.4 Connection of a Neutral or Single-Phase Voltage for PTCONk = D
When PTCONk = D1, an open-corner delta voltage can be connected as shown in

Figure 5.5. This allows the zero-sequence voltage and third-harmonic voltage to
be measured.
VAk
A B C
VCk
Vk2
k = V or Z
Figure 5.5 Connection of an Open-Corner Delta Voltage for PTCONk = D1

When PTCONV = 1PH, three single-phase voltages can be connected to the relay
by using the V input. The voltage signals are named internally as VV1, VV2, and
VV3. Figure 5.6 shows an example connection when PTCONZ = Y and
PTCONV = 1PH.
52 52
VV1
VV3
a VAZ
b VBZ
c VCZ
n
VV2
Figure 5.6 Connection Using One Three-Phase Voltage, Two Single-Phase and
the Generator Neutral Voltage for PTCONZ = Y and PTCONV = 1PH
Table 5.2 Voltage Input Settings
Setting Prompt Range Default Category
PTCONV PT connection for Term V OFF, Y, D, D1, 1PH 1PH Group

PTCONZ PT connection for Term Z Y, D, D1 Y Group
a
PTRk PT Ratio Term k 1.0–10000 200 Group
VNOMka PT Nominal Voltage (L-L) 30–300 110 Group
Term. k (V, sec)
PTRbb PT Ratio Term b OFF, 1.0–10000 200 Group
b
VNOMb PT Nominal Voltage Term b 30–300 110 Group
(V, sec)
EGNPT Enable Gen Neut Volt Term OFF, V2, Z2 V2 Group
ESYSPT Enable Sys Volt Term OFF, V, or combo of OFF Group
V1, V2, V3
a k = V, Z.
b b = V1, V2, V3, Z2.
PTCONk determines the quantities which are calculated by the relay. These are
summarized in Table 5.3. Figure 5.2–Figure 5.6 show the voltage connections
corresponding to the PTCONk setting.

Table 5.3 PTCONk Internal Signals and Calculated Voltages
PTCONk Available Internal Signals Calculated Voltages
Y VAk, VBk, VCk Phase-to-phase, phase-to-neutral, positive-, nega-

tive-, and zero-sequence voltages for terminals V
and Z
Third-harmonic voltage for terminal Z
D VAk, Vk2, VCk Phase-to-phase, positive-, and negative-sequence
voltages
D1 VAk, Vk2, VCk Phase-to-phase, positive-, negative- and zero-
sequence voltages
1PH VV1, VV2, VV3
NOTE: Neither VV2 nor VZ2 is EGNPT defines the generator neutral voltage. Either of the B-Phase voltage
assignable if PTCONV = Y or
PTCONZ = Y. Once assigned, this inputs (VV2 or VZ2) can be assigned to this input.
voltage is used by the generator
ground fault elements. The relay uses the potential transformer ratio settings (PTRk and PTRb) to con-
vert measured secondary phase-to-neutral voltages into primary phase-to-phase
voltages for display in the meter report. These settings are also used in certain
protection functions.
NOTE: If PTCONV = Y, PTRV2 and VNOMk and VNOMb are the nominal system line-to-line voltage in secondary
VNOMV2 are not available. If
PTCONZ = Y, PTRZ2 and VNOMZ2 are volts.
not available. Similarly PTRV1,
VNOMV1, PTRV3, VNOMV3, are For example, for a PT with a nominal line-to-line voltage of 13.8 kV and a sec-
available only if PTCONV = 1PH.
ondary nominal line-to-line voltage of 115 V (VNOM), the
PTR = 13.8 kV/115 V = 120.
System Frequency Source

ESYSPT defines the system frequency source. Enabling the system frequency
source allows the relay to independently track the generator frequency and sys-
tem frequency. This is important in synchronism-check applications or in appli-
cations with a breaker on the LV side of the generator step-up (GSU) where the
generator and system frequency can be different. Valid settings are:
ESYSPT := Available when PTCONV :=
V Y, D, D1
V2 D, D1
V1, V2, V3 1PH
For more information on frequency tracking, see Frequency Tracking on

page 5.12.
Voltage Configuration Examples

The SEL-400G provides considerable flexibility when configuring voltage
inputs. Specific settings depend on the primary system layout, VT connections,
and protection requirements. The following section provides several examples.

Third-Harmonic Comparison and Voltage-Balance LOP

This example shows a typical application with a grounded-wye VT at the genera-
tor terminals. The protection functions identified with an * always use the Z input
for voltage. Other functions such as voltage and frequency have selectable oper-
ating signals. This example also uses a third-harmonic comparison scheme
(64G2/3) and a voltage-balance loss-of-protection (LOP) (60) scheme. Third-har-
monic comparison schemes use voltage drops at the neutral and terminals of the
generator. In this application, the terminal measurement is calculated from the
three phase-to-ground Z voltage measurements. The voltage-balance LOP
scheme compares the positive-sequence voltages from two VT windings. The V
input is configured as D, which allows the positive and negative voltage to be
derived using the A and C inputs, allowing the V2 input to be used to measure the
generator neutral voltage. See Configuration of Voltage Inputs on page 5.3 for
wiring details.
VV2 3 VZ VAV, VCV

64G 27
24 * = 21P, 32, 40, 51V, 78
1 59
* 81
PTCONZ := Y
PTCONV := D
64G EGNPT := V2
3V0 60
2/3 ESYSPT := OFF
Figure 5.7 Third-Harmonic Comparison and Voltage-Balance LOP Example
Synchronism Check and Voltage-Based LOP

This example shows a typical application with an open-delta VT at the generator
terminals. The protection functions identified with an * always use the Z input for
voltage. Other functions such as voltage and frequency have selectable operating
signals. This example also uses a synchronism-check element (25) and a voltage-
balance LOP (60) scheme. Both voltage inputs are configured as D, allowing the
Z2 input to measure the generator neutral voltage and the V2 input to be used for
synchronism-check. The voltage-balance LOP scheme compares the positive-
sequence voltages from two VT windings. Because ESYSPT = V2, the relay
measures the system frequency by using V2, and this input will be frequency-
tracked by using the system frequency. See Configuration of Voltage Inputs on
page 5.3 for wiring details.

SEL-2664S
S
VZ2 VAZ, VCZ VAV, VCV VV2

27 81 27
64G 81
59 59
1
* 24
PTCONZ =: D
* = 21P, 32, 40, 51V, 78
PTCONV := D
EGNPT := Z2 25
ESYSPT := V2 60
S
Figure 5.8 Synchronism Check and Voltage-Based LOP
Iso-Phase Bus (IPB) Ground Fault Protection and Synchronism Check

This example shows a typical application with a low-voltage generator breaker.
The protection functions identified with an * always use the Z input for voltage.
Other functions such as voltage and frequency have selectable operating signals.
This example also uses a synchronism-check element (25) and IPB (590) protec-
tion. The Z voltage input is configured as D, allowing the Z2 input to measure the
generator neutral voltage. The V input is configured as D1, allowing the V2 input
to be connected to the open-corner delta winding on the system-side VT. Because
ESYSPT = V, the relay measures the system frequency by using VA and VC.
This allows V/Hz protection to be applied on both sides of the generator breaker.
Also, three-phase voltage checks can be carried out on both sides of the breaker.
These checks reduce the possibility of an out-of-phase synchronism event caused
by a VT wiring error (see Synchronism-Check Element on page 5.148).
SEL-2664S
VZ2 VAZ, VCZ VAY, VCY VY2
64G 27 27
590
1 59 59
PTCONZ =: D 24 24
PTCONV := D1
EGNPT := VZ2
ESYSPT := V *
25
* = 21P, 32, 40, 51V, 78
Figure 5.9 IPB Ground Fault Protection and Synchronism Check

Configuration of Current Inputs

The SEL-400G has 18 current inputs that are arranged into 6 groups: S, T, U, W,
X, and Y. The current inputs are configurable, allowing them to be applied in a
wide variety of applications as described in this section.
The SEL-400G implements a virtual terminal denoted as G. This is the current at
the neutral side of the generator. Either the W, X, or a combination of the W and
X terminals can be assigned as the generator current. The 21, 40, 46, 51V/C, and
78 use the generator current.
The S, T, and U terminals are available for measuring current at the terminals of
the generator or HV terminals of the GSU. A variety of overcurrent, breaker fail-
ure and inadvertent energization functions can use these currents.
The Y terminal can be configured as a three-phase terminal or three single-phase
terminals. When they are configured as single phase (CTCONY = 1PH), neutral
overcurrent and restricted earth fault (REF) functions can use these terminals.
All of the current terminals are assignable to either differential zone including Y
[depending on the current channel options (see Current Channel Options on
page 1.11) and when CTCONY = Y].
Table 5.4 Current Input Settings
EGNCT Enable Gen Neut Cur Terms Combo of W, X X Group

ESYSCT Enable System Cur Terms OFF or combo of S, T, U, Y S Group
EPCAL Enable Power Calc Terms OFF or combo of S, T, U, Y S Group
CTCONY CT Connection for Term Y 1PH, Y 1PH Group
a
CTRm CT Ratio Term m OFF, 1.0–50000 12000 Group
CTRYnb CT Ratio Term Y3 OFF, 1.0–50000 100 Group
a
m = S, T, U, W, X, Y.
b n = 1, 2, 3.
The EGNCT setting is used to define the three-phase current on the neutral side
of the generator (G). Protection elements associated with the generator (21P, 40,
46, 51V/C, and 78) use this current. Valid selections for this setting are W, X, and
the combination of W and X (for generators with two neutrals).
The ESYSCT setting determines the terminals at the output of the generator. The
overcurrent and breaker failure elements use these currents.
Currents do not need to be assigned to EGNCT to be used by the differential ele-
ments.
Power calculations are carried out for any terminals included in the EPCAL set-
ting. Note that power calculations are always carried out for the generator neutral
current (terminal G).
The Y current input can be configured either as a three-phase or a single-phase
input by using the CTCONY setting. If CTCONY := Y, the Y terminal is avail-
able for the differential element. If CTCONY := 1PH, the individual Y terminals
are available for single-phase current and REF elements, but it is unavailable for
phase/sequence current elements, breaker failure, differential elements, and
power calculations.

CTRY is unavailable if CTCONY := 1PH. Similarly, CTRY1, CTRY2, and

CTRY3 are unavailable if CTCONY := Y.
Always enter the CTRm and CTRY3 settings with reference to a 1 A secondary.
For example, if the S-terminal CT ratio is 600/5 CT, enter CTRS = 120.
Current Configuration Examples

The SEL-400G provides considerable flexibility when configuring current
inputs. Specific settings depend on the primary system layout and protection
requirements. The following section provides several examples.
Generator Differential and Overall Differential

In this example, generator and overall differentials are implemented. The genera-
tor differential primarily provides an indication that a fault is internal or external
to the generator. Various overcurrent and breaker failure elements are available
on the S, T, U, and Y current terminals.
X W Z Y S T U
EGNCT =: X
CTCONY := Y 87
E87Z1 := W, X 1 87
E87Z2 := S, T, U, X, Y 2
*
* = 21P, 32, 40, 46, 78
Figure 5.10 Generator Differential and Overall Differential
Generator and Transformer Differential

NOTE: The SEL-400G allows the There is a low-voltage breaker in this application. Each differential is overlapping
directional power element to be fed
from a dedicated CT. Some CTs may this breaker. The S, T, U, and Y current terminals are frequency-tracked at the
have both a protection class and a system frequency. The X and W inputs are frequency-tracked at the generator fre-
metering class rating. If CT does not
have a protection class rating, it
quency. See Frequency Tracking on page 5.12 for configuration details. In this
should not be used for protection example, the directional power element is fed from a dedicated metering class
functions other than the directional CT.
power element.

Metering
class
X Y Z S** W V** T** U**
CTCONY := Y
EGNCT := X 32 87
EPCAL := Y 2
E87Z1 := W, X
* = 21P, 40, 46, 78 87 ** Frequency tracking using
E87Z2 := S, T, U * 1 the system voltage (V)
Figure 5.11 Generator and Transformer Differential
Transverse Differential and Overall Differential

In this example, the generator has two parallel branches. This uses one differen-
tial to provide fast and secure protection for turn faults and the second to provide
overall differential. Balancing the transverse differential is accomplished using
the winding compensation feature of the differential protection (see Differential
Element Operating Characteristic on page 5.20). The Y current terminal is con-
figured as three single-phase inputs. This allows the Y1 input to provide sensitive
split-phase protection by using an inter-neutral CT and Y2 to provide REF pro-
tection for the transformer (not shown). The W and X terminals are internally
summed to provide the generator neutral current.
BRAKE
CTCONY := 1PH
EGNCT := W, X Y2
Y1 X W E87Z1 := W, X Z S T U
E87Z2 := S, T, U, W, X
87 87
1 * 2
* = 21P, 32, 40, 46, 78
Figure 5.12 Transverse Differential and Overall Differential

Frequency Tracking
Frequency Tracking
Table 5.5 Frequency Tracking Settings

a
FTSRCm Frequency Source for Current Term m G, S G Group
b
FTSRCYn Frequency Source for Current Term Yn G, S G Group
c
FTSRCk Frequency Source for Voltage Term k G, S G Group
FTSRCVn Frequency Source for Voltage Term Vn G, S G Group
a
m = S, T, U, W, X, Y.
b n = 1, 2, 3.
c
k = V, Z.
The SEL-400G can track the frequency of both the generator (G) and system (S)
independently. The Z voltage input is used for tracking the generator frequency
(FREQPG). The ESYSPT setting determines the voltage used for tracking the
system frequency (FREQPS). This is a subgroup of the V voltage inputs (see Sys-
tem Frequency Source on page 5.6). If ESYSPT is set to OFF, the relay does not
calculate the system frequency.
The frequency source settings (FTSRCm) define which frequency source is used
to track a particular input. If ESYSPT = OFF, all inputs are frequency-tracked
using the generator frequency. Table 5.6 describes the available assignments. In
the case of single-phase inputs, individual assignments can be made for each
phase.
Table 5.6 Available Assignments
Input Frequency Tracking Source
Z Voltage, W and FREQPG is always used.

X Currents
V Voltage If ESYSPT =V, FREQPS is used; otherwise it is assignable to FREQPG
or FREQPS by using FTSRCV.
V1, V2, and V3 If ESYSPT includes V1 or V2 or V3, FREQPS is used for the included
inputs inputs. If EGNPT = V2, FREQPG is used for that input. Otherwise each
input is assignable using FTSRCV1, FTSRCV2, and FTSRCV3.
S, T, U, and Y Each input is assignable using FTSRCS, FTSRCT, FTSRCU, and FTS-
Currents RCY.
As noted in the previous table, the Z, W, and X terminals always use FREQPG as
the frequency tracking source. The FTSRC setting is viewable for these terminals
but cannot be changed from G.
For many applications, all frequency source assignments can be left at their
default assignments and all frequency tracking will be carried out using
FREQPG.
Tracking of the system frequency is primarily used when a synchronism-check
function is enabled or when there is a breaker on the low side of the transformer
and the generator can be operated at an off-nominal frequency; for example, a
combustion gas turbine that uses static starting. In this case, all the inputs to each
differential zone can be tracked at the same frequency.
If a system frequency has been defined, independent V/Hz operating signals can
also be configured. See Volt/Hertz Elements on page 5.104 for more details.

Frequency Tracking
Undervoltage Supervision Logic

Relay Word bits 27B81a and 27B81Ra (where a = G or S), the output of the logic
in Figure 5.13, supervises the associated frequency elements (those mapped to
the same frequency source) for system undervoltage conditions. In the logic, the
comparator compares the absolute value of the tracking voltage quantity (Vtr)
against the 81UVSP or 81RUVSP setting value. Table 5.7 shows the various
equations used to calculate the generator and system tracking voltage quantities
in various cases.
Table 5.7 Undervoltage Supervision Logic
Generator Frequency Tracking
PTCONZ := Y Vtr = VAZ – VBZ / 2 – VCZ / 2

PTCONZ := D, D1 Vtr = (VAZ – VCZ) / 2
System Frequency Tracking
PTCONV := Y ESYSPT := V Vtr = VAV – VBV / 2 – VCV / 2

PTCONV := D ESYSPT := V Vtr = (VAV – VCV) / 2
ESYSPT := V2 V = VBV
PTCONV := 1PHa ESYSPT := V1, V2 Vtr = (VAV + VBV) / 2
ESYSPT := V1, V3 Vtr = (VAV + VCV) / 2
ESYSPT := V2, V3 Vtr = (VBV + VCV) / 2
ESYSPT := V2 Vtr = VBV
ESYSPT := V1, V2, Vtr = (VAV + VCV) /2
V3
PTCONV := D1 ESYSPT := V Vtr = (VAV – VCV) / 2
All other cases Vtr = 0
a
When PTCONV is configured as 1PH, VV1 corresponds to VAV, VV2 corresponds to VBV, and VV3
corresponds to VCV.
Relay Word bit 27B81a asserts if Vtr falls lower than the 81UVSP setting value
for longer than a cycle at the associated frequency. Relay Word bit 27B81Ra
asserts if Vtr falls below the 81RUVSP setting value for longer than a cycle at the
associated frequency.
81UVSP
or 1.0 cyc 27B81a
81RUVSP or
27B81Ra
|Vtr| 0.0
Figure 5.13 Undervoltage Supervision Logic
Calculate the 81UVSP and 81RUVSP Setting Values

Because the relay accepts voltage input from the PTs in any combination, Valpha
can have different values, depending on the voltage inputs. In general, the follow-
ing examples use the average (60 percent) of the 50–70 percent undervoltage
range that the IEEE C37.117 Guide recommends. Also, the calculations are
based on an rms phase-to-neutral value of 67 V for the PT inputs, although the
81UVSP setting is a peak value and not an rms value. The following calculations
only show 81UVSP, same can be used for 81RUVSP.

Frequency Tracking
Case 1: Wye-Connected PT
In this case, VA, VB, and VC are three-phase phase-to-neutral voltages. Use
Equation 5.1 to calculate the nominal value of the tracking voltage quantity as
follows:
Vtr = 2 • 1.5 • 67 V
Equation 5.1
Vtr = 142.13 V
Equation 5.2
Set 81UVSP to 60 percent of this value:
81UVSP = 0.6 • 142.13 V

Equation 5.3
81UVSP = 85.28 V
Equation 5.4
Case 2: Delta-Connected PT
In this case, Terminal A measures VAB and Terminal C measures VCB.
VAB – VCB VCA

Vtr = -------------------------------- = -------------
2 2
Equation 5.5
67
Vtr = 3• 2 • ------ = 82.0579 V
2
Equation 5.6
Set 81UVSP to 60 percent of Equation 5.6.
81UVSP = 0.6 • 82.06 = 49.23 V

Equation 5.7
Case 3: Single-Phase PT Input, Connected to the B-Phase Input

In this case, the B-Phase input voltage is used for tracking frequency.
Vtr = 2 • 67 = 94.7523 V
Equation 5.8
81UVSP = 0.6 • 94.75 = 56.85 V

Equation 5.9

Power System Data
Case 4: Single-Phase PT Input, Connected to the A-Phase and C-

Phase Inputs
In this case, the A-Phase and C-Phase input voltages are used for tracking fre-
quency.
67 + 67
Vtr = 2 • ------------------ = 94.7523 V
2
Equation 5.10
81UVSP = 0.6 • 94.75 = 56.85 V

Equation 5.11
Power System Data

SEL-400G calculates various quantities internally by using the manufacturer data
entered by the user. These data are used to set the steady-state stability limit
(SSSL) element, i.e., the Zone 3 element of a generator capability-based loss-of-
field (LOF) element (40P3). It also is used by the relay to calculate the rated cur-
rent of the generator for the current unbalance element (46). This approach can
reduce the setting errors while minimizing the setting effort. SEL Grid Configu-
rator Software also uses these settings in addition to the existing protection set-
tings to plot the characteristics of the LOF elements (40P, 40Z) in both the R-X
plane and P-Q plane, phase distance element (21P), and out-of-step (78) element.
Table 5.8 Power System Data Settings
MVAGEN Generator Max, MVA 1–5000 555 Group

KVGEN Generator L-L Voltage, kV 1.00–100 24 Group
XDGEN Generator D-Axis Synch Reactance, p.u 0.100–4 1.81 Group
XTXFR Transformer Leakage Reactance, p.u 0.010–10 0.042 Group
XESYS Equivalent System Reactance, p.u 0.010–10 0.2 Group
XQGEN Generator Q-Axis Synch Reactance, p.u 0.100–4 1.81 Group
XDPGEN Generator D-Axis Trans Reactance, p.u 0.100–4 0.17 Group
Z1MAG Positive Sequence System Impedance for Plots, p.u 0.010–10 0.15 Group
Z1ANG Positive Sequence System Impedance Angle for Plots, deg 45.0–90 84 Group
CRITANG Critical Clearing angle, deg 80.0–170 120 Group
RLP Relay Active Power Loadability Limit, p.u 0.01–2 0.8 Group
RLQ Relay Reactive Power Loadability Limit, p.u –2.00 to 2 0.8 Group
RLV Relay Voltage Loadability Limit, p.u 0.50–1.25 0.95 Group
RLM Relay Loadability Limit Margin, % 0.1–100 15 Group
a
UPSRVR UPSR voltage ratio 0.50–1.5 0.7 Group
PV1PU Generator Positive Sequence Voltage for Plots, p.u 0.50–1.5 1 Group
PQPLOT P-Q Plane in Primary Or Secondary for Plots P, S P Group
a UPSR = Unstable Power Swing Region (future).

Power System Data
INOMGS, the rated current of the generator is calculated as:
1000
INOMGS =  MVAGEN • -----------------------------------------------------------
 3 • KVGEN • CTRG
Equation 5.12
where:
CTRG = CTRW if EGNCT has W
CTRG = CTRX if EGNCT has X only
Note that the MVAGEN value entered should be the rated MVA of the generator.
If the generator MW rating at a rated lagging power factor is given, MVAGEN
should be obtained by dividing the MW rating by the PF. Incorrect MVAGEN
value will effect the current unbalance element calculations.
XDGEN, XQGEN, XDPGEN, XTXFR, XESYS, and Z1MAG all must be in pu
and must be referred to generator base.
If the system equivalent reactance is given in ohms at the GSU HV side, it should
be converted to generator base as in Equation 5.13.
XESYS  KVLVGSU 2
XESYS  pu  =  --------------------------- •  -------------------------------
 ZNOMGS  KVHVGSU
Equation 5.13
where:
KVHVGSU = GSU high-voltage side L-L voltage
KVLVGSU = GSU low-voltage side L-L voltage
ZNOMGS = the impedance-base value and is calculated as follows:
ZNOMGS = (KVGEN2 / MVAGEN) • (CTRG / PTRZ)
The relay internally calculates ohmic values by multiplying the pu quantities with
ZNOMGS variable. 40P3 uses the ohmic values to provide SSSL protection for
the generator. The 40P3 implementation details are given in a capability curve-
based LOF element.
Grid Configurator Plots

The theoretical dynamic stability limit (TDSL) plot can be seen in the loss-of-
field plots. This limit is derived from a solution of the two-axis, synchronous gen-
erator model in the transient state (J.H. Walker, Operating characteristics of
salient pole machines).
This plot requires XDGEN, XQGEN, and XDPGEN settings. The PQPLOT set-
ting enables the user to view the LOF elements in P-Q plane either in primary
(Setting P) or secondary (Setting S) quantities. Setting P enables the user to see
all the LOF elements in the manufacture generator capability curve (GCC) while
Setting S eases the testing of the LOF elements.
The 78 plot uses the Z1MAG setting, which is the Thevenin equivalent of a posi-
tive-sequence impedance of a power system from the GSU terminals. The 78 plot
uses a setting CRITANG (critical clearing angle), and the default value is
120 degrees.

Pumped Storage
Grid Configurator also provides relay loadability operating point in the 21P plot
to observe if this point encroaches inside the load-responsive protective elements,
e.g., 21P. Necessary settings adjustments can be done based on this plot. This
operating point requires the settings in pu of RLP, RLQ, RLV, and RLM. The
relay loadability can be calculates as follows:
2 ZNOMGS
ZRLSEC =  1 + RLM  • RLV • ------------------------------------------
RLP – RLQ • 1j
Equation 5.14
PV1PU, the generator positive-sequence voltage, can be varied from 0.50–1.5 pu

to observe the voltage coordination of the 40P and 40Z elements in both the R-X
plane and the P-Q plane. The plots can also display underexcitation limiter
(UEL) and GCC characteristics. Using the PV1PU setting, the necessary coordi-
nation can also be ensured among UEL and the 40P/40Z elements.
Pumped Storage
Table 5.9 Pumped Storage Settings
EPS En. Pump Storage OFF or combo of S, T, OFF Group

U, W, X, Y, V, Z
PSMODE Pumped Storage Mode Active SELOGIC Variable NA Group
PSPHREV Transposed Phases AB, BC, CA AB Group
The pumped storage logic corrects the transposition introduced by the reversing
switch in a pumped storage scheme. The logic is equivalent to the method used
with EM relays that use external switches.
NOTE: Phase rotation is always The EPS setting enables the logic and identifies the affected voltage and current
defined by the power system.
terminals. These will be the downstream terminals (on the machine side) of the
reversing switch. Terminals that are configured as single phase are not trans-
posed. PSPHREV defines which phases are transposed when the machine
switches to motor mode.
PSMODE is a SELOGIC control equation that determines when the machine is
operating in motor mode. This will be primarily driven by the reversing switch
status, but it also allows the user to build additional security for this indication.
For example, a transition from generator to motor only occurs when the machine
is offline
The following is an example. The 25, 32, 40, 46, 78, and 87 are all impacted by
the reversing switch. The generator is converted from generator to motor opera-
tion by transposing the B- and C-Phases, as shown in Figure 5.14. However, we
only need to identify the terminals downstream from the reversing switch. How-
ever, because the Z terminal is transposed for the other generator elements, the W
terminal (not shown) also needs to be transposed.

Universal Differential Elements
GEN
A A
B B
C MOT C
A A
C B
B C
X Z S V T
EGNCT := X T
E87Z1 := X, S, T
EPS := X, Z 25
PSPHREV : = BC
87
T * Z1
* = 21P, 32, 40, 46, 78
Figure 5.14 Pumped Storage Example
In pumped storage applications, the direction of real power flow in motor-mode

is opposite to that during generator-mode. To ensure correct behavior in both
operating modes, the element responds to the absolute value of real power. This
makes the characteristics shown in the previous figure symmetrical about the ver-
tical (Q) axis.
Normal Normal
Generating P
Motoring
Region Region
Figure 5.15 40P Element Behavior During Pumped Storage Operation

Introduction
The SEL-400G provides two universal differential elements for selective, high-
speed protection for internal faults. Use these elements in conjunction with the
100 percent stator ground protection, restricted earth-fault protection, and nega-
tive-sequence differential protection to provide comprehensive protection for the
generator and GSU.
The differential elements use an adaptive-slope percentage differential character-
istic, as opposed to a dual-slope characteristic. Using an advanced adaptive-slope
algorithm that includes filtered differential elements as well as instantaneous dif-

ferential elements, the SEL-400G operates substantially faster than relays that
use legacy differential characteristic. The external/internal fault detection super-
vision adds security during external faults with CT saturation.
The first step in configuring a zone is the selection of the currents that make up
the zone by using the E87Zn setting. The same current terminal can be shared by
both zones. Note that terminals within a zone must use the same frequency track-
ing source. See Frequency Tracking on page 5.12 for more information.
Each element can be configured with or without an in-zone transformer. When
the in-zone transformer setting, E87XFRn, is set to Y, the element becomes a
fully featured transformer differential element with the following added func-
tions:
➤ Connection compensation
➤ Waveshape-based inrush detection
➤ Harmonic inrush blocking and restraint
➤ Raw unrestrained differential
➤ Negative-sequence differential
If E87XFRn = N, the E87Hn and E87Qn settings are forced to their default val-
ues and hidden.
See Section 6: Protection Application Examples for application examples.
Compensation Calculations
The relay carries out tap and winding compensation calculations on the currents
that make up the zone to ensure that they sum to zero under normal operation.
Currents not included in a zone are forced to zero.
Tap compensation accounts for differences in current magnitude caused by an in-
zone transformer or caused by differing CT ratios. The relay uses the following
equation to automatically calculate the tap values. In this case, the tap settings are
visible but cannot be changed.
MVAn • 1000
87kTAPn = --------------------------------------------------------------------
3 • VTERMmn • CTRm
where:
MVAn = Transformer maximum MVA
VTERMmn = Terminal line-to-line voltage of the winding (kV)
CTRm = CT ratio
If MVAn is set to OFF, the automatic tap calculation is not done and the
87mTAPn settings must be entered manually.
The relay checks that the currents making up the zone are not severely mis-
matched by checking that the ratio of the largest to the smallest tap setting for the
zone is less than or equal to 35. If not, the last setting entry is rejected.
Connection compensation takes the form of a 3 x 3 matrix with elements deter-
mined according to the winding connection associated with the particular current.
If E87XFRn = N, the identity matrix is used, which is equivalent to no connec-
tion compensation. See Discussion on CT Connection Compensation on
page 5.43 for additional details on connection compensation.

Figure 5.16 shows how tap and connection compensations are carried out by the
relay.
Filtered 87SMn Filtered

IASF X X X 87ASFn
1
IBSF X X X 87BSFn
87STAPn
ICSF X X X 87CSFn
•••
•••
•••
•••
Filtered 87YMn Filtered
IAYF X X X 87AYFn
1
IBYF X X X 87BYFn
87YTAPn
ICYF X X X 87CYFn
Filtered 87SMn Instantaneous

IASDS X X X 87ASDSn
1
IBSDS X X X 87BSDSn
87STAPn
ICSDS X X X 87CSDSn
•••
•••
•••
Filtered ••• 87YMn Instantaneous
IAYDS X X X 87AYDSn
1
IBYDS X X X 87BYDSn
87YTAPn
ICYDS X X X 87CYDSn
Figure 5.16 Tap and Connection Compensation
Refer to Winding Compensation Settings for In-Zone Transformers on page 5.42

for details.
Differential Element Operating Characteristic

The relay calculates the filtered differential current (87pOPFn) and the filtered
restraint current (87pRTFn) by using the following definitions:
87pOPFn = | m 87pmFn |
87pRTFn = c • m | 87pmFn |
NOTE: Factor c is 0.5 in the SEL-387 where:
and SEL-587 relays. Take this into
consideration when calculating the p = Phases A, B, and C
slope setting.
n = Differential zones (1 and 2)
m = The current terminals making up the zone (S, T, U, W, X, and
Y) as defined by the E87Zn setting
c= 1
87pmFn The fundamental value of the terminal currents making up the
zone
For operating quantities (87pOPFn) exceeding the pickup level and falling in the
operate region of Figure 5.17, the filtered differential element issues an output.
There are two slope settings: Slope 1 (87SLP1n) and Slope 2 (87SLP2n) and two
pickup settings: Pickup 1 (87P1n) and Pickup 2 (87P2n). Slope 1 and Pickup 1
are effective during normal operating conditions. Assertion of the external fault
detector, CONpn, puts the element into a secure mode to avoid possible misoper-

ation resulting from an external fault with CT saturation. Slope 2 is effective at

this time. See AC and DC External Fault Detection Logic on page 5.21 for a
description of the external fault detector.
Additional security is provided by the second pickup setting, 87P2n during
black-starting applications. Switchover to this pickup is controlled by the
87pSECn Relay Word bit.
See Setting Guidelines for 87 Phase Differential on page 5.40 for additional
details on setting the pickup and slope.
NOTE: By default, 87pSECn is set to
the external fault detector (CONpn). E87Z1
This setting is fine for the majority of
applications. The addition of this IpS
87SLP21
87pOPF1
setting offers the capability to create Operate
custom logic to further condition the IpT Region
transition to high-security mode.
Tap and 87SLP11
IpU
Connection
IpW Compensation 87P21 Restraint
87P11 Region
IpX
87pRTF1
IpY
E87Z2 CONp1 87pSEC1
87pOPF2
87SLP22
Operate
Region
Tap and 87SLP12
Connection
Compensation 87P22
Restraint
87P12 Region
87pRTF2
CONp2 87pSEC2
Figure 5.17 Adaptive Differential Elements
AC and DC External Fault Detection Logic

The ac external fault detector anticipates fast ac saturation that occurs because of
high-magnitude currents. The logic uses the principle that operating and restraint
currents increase simultaneously for internal faults but that only the restraint cur-
rent increases for external faults (if there is no CT saturation). Instantaneous dif-
ferential current (87pOPIn) and restraint current (87pRTIn) are calculated from
the instantaneous terminal currents. The relay uses the following definitions:
87pOPIn = m 87pmDSn
87pRTIn = m | 87pmDSn |
where:
p = Phases A, B, and C
n = Differential zones (1 and 2)
m = The current terminals making up the zone (S, T, U, W, X, and
Y) as defined by the E87Zn setting
87pmDSn = The instantaneous sample values of the terminal currents mak-
ing up the zone

One-cycle delta quantities are derived from these values. The ac external fault
detector asserts for a change in restraint current without a corresponding change
in differential current. 87KRDn and 87DIRTn are calibration settings. The logic
requires approximately 1/8 cycle of saturation-free current to operate.
Figure 5.18 shows the logic.
87pOPIn 1-cycle
abs delta
87KRDn
abs
1-cycle 1/8
87pRTIn cyc CONpACn
delta 87DIRTn 0
Figure 5.18 AC External Fault Detector
NOTE: Timers that are associated The dc external fault detector anticipates slower dc saturation that occurs because
with sample-based logic are shown in
cycles. Other timers are shown in of low-magnitude currents that contain long-lasting dc components. The dc com-
seconds or milliseconds. ponents of the individual terminal currents are calculated by averaging the instan-
taneous values over one cycle.
Figure 5.19 shows the dc external fault detector logic. The output asserts when a
significant dc component is present in any of the currents that make up the zone,
and there is relatively little differential current. Once the output is asserted, a spu-
rious differential current exceeding the slope (87KRDn) will not reset the output.
Assertion of DCpn is controlled by calibration settings that are factory-set at 0.05
and 0.3, meaning the dc component must be greater than 5 percent of Inom and
also greater than 30 percent of the fundamental component.
IFLTpn
87pOPFn
87pRTFn 87kRDn
50 ms
CONpDCn
DCpn
5 ms
Figure 5.19 DC External Fault Detector
After some time, a saturated CT erases the dc component from its output, but the
CONpn Relay Word bit asserts for a minimum of three cycles. The dropout is fur-
ther extended by the fault reset timer (87EFDOn). This timer has a default value
of 1 second. If there is an evolving internal fault (WFLTpn), the external fault
reset timer is forced to drop out immediately, forcing the element out of high-
security mode. WFLTpn is described in following sections.
CONpACn 0
CONpDCn 3 cyc
CONpn
0
t CONpDCn
reset
0 (Setting)
WFLTpn 87EFDOn
1 cyc
Figure 5.20 External Fault Detector Combined Logic

Internal Fault Detection Logic

While the high-security mode provides satisfactory security for through faults,
this mode can cause the relay to operate slower for evolving faults (where the
fault starts as an external fault and then develops into an internal fault).
Figure 5.21 shows the logic. The comparator in the upper left corner of the figure
asserts when the instantaneous differential current exceeds the product of the
instantaneous restraint current and a slope setting. The raw operate quantity,
87pOPIn, must also exceed the setting 87Pn before this comparator can assert.
The slope switches dynamically to the secure value if there is an external fault
(CONpn) and there is no indication of saturation in the differential current
(CTUpn). CTUpn is described in the following section.
The upper path provides instantaneous fault detection. This path is conditioned
by a timer. This delay prevents a pickup because of operation of an in-zone surge
arrestor. The timer delay is factory-set at 1/4 of a power system cycle. Relay
Word bit GFLTpn asserts when the instantaneous fault detection logic detects an
internal fault. This path is supervised by CONpn and therefore will not assert
IFLTpn if the element is already in high-security mode.
The lower path is conditioned by the moving window fault detection logic.
During a fault with CT saturation, the CT is expected to come out of saturation in
the second half-cycle. Therefore, this logic checks that differential current still
exists on a consecutive measurement one-half cycle after RDIFFpn asserts. Relay
Word bit WFLTpn asserts when the moving window fault detector logic declares
an internal fault. This path is not supervised by CONpn and therefore will assert
IFTpn if the element is already in high-security mode.
87pOPIn CONpn
Instananeous
87pRTMn K
0
If (CONpn and NOT CTUpn): Moving IFLTpn
K = 87SLP2n / 100 Window 2 cyc
WFLTpn
Otherwise:
K = 87SLP1n / 100
Figure 5.21 Internal Fault Detector Logic
Insignificant Restraint Detection

The element uses the logic of Figure 5.22 to check that there is essentially no
restraint current. This will be the case for a generator prior to synchronizing or a
transformer prior to energization.
0.025 40 INRpn
ms 40
87pRTFn
ms 2 other INRn
phases
Figure 5.22 Insignificant Restraint Detection
RMS Differential Logic

The relay calculates the rms differential current (87pOPRn) from the currents
making up the zone. This rms filter has a length of 160 ms. Consequently, it
ramps more slowly than the filtered differential current (at nominal frequency)
but remains accurate in situations where the generator frequency may differ sig-

nificantly from nominal and the relay is unable to track frequency, for example, a
hydro generator during dynamic braking. It is not supervised by any logic other
than its own torque-control Relay Word bit (87RMTCn).
87pOPRn 87pRMSn
87RMPn
other
phases 87RMSn
87RMTCn
Figure 5.23 RMS Differential Logic
Unrestrained Logic
The unrestrained differential detects high-magnitude internal faults. It provides
three mechanisms for tripping: a filtered-unrestrained logic (87UFn), a raw-unre-
strained logic (87URn, and the waveshape-based, bipolar high-set logic
(87BPHn). Note that only the filtered, unrestrained element is available when
there is no in-zone transformer.
The filtered-unrestrained logic operates when the filtered differential current
exceeds the unrestrained pickup setting.
The raw-unrestrained logic can be substantially faster than the filtered logic. It
uses the 1-cycle change in the raw differential current (see AC and DC External
Fault Detection Logic on page 5.21). The pickup setting is scaled by k, which is a
calibration with a factory setting of 2 • 2. The 2 accounts for the difference
between peak and rms and the two accounts for dc offset in the raw waveform.
The bipolar high-set function is more sensitive that either the filtered- or raw-
unrestrained functions because it can differentiate between inrush and internal
fault current. See Waveshape-Based Inrush Detection Logic on page 5.26 for
details.
87pOPFn
(Setting) 87pUFn
87UPn
other 87UFn
phases
E87Un has F
87UTCn
87pDOPn 1/16
CYC
k 87AURn
0
CONpn other 87URn

phases 87Un
CTUpn E87Un has R
87BPHn
E87Un has W
Figure 5.24 Unrestrained Differential Logic
Overall Logic (No In-Zone Transformer)

For applications without an in-zone transformer (E87XFRn = N), the overall
logic is represented in Figure 5.25. The restrained differential Relay Word bit
(87R) asserts when the operate current exceeds the pickup setting and also
exceeds the product of the restraint current and the slope setting. The CONpn
Relay Word bit controls the application of the secure slope setting. Assertion is
supervised by the internal fault detector.

A dynamic security timer shown in the figure delays operation by 7.5 ms if either
the CONpn or INRpn Relay Word bits are asserted. Operation is delayed by
15 ms if both Relay Word bits are asserted. The timer output is ANDed with the
restrained torque-control Relay Word bit (87RTCn) to produce the restrained dif-
ferential output 87Rn. The restrained, unrestrained and rms Relay Word bits are
then combined to produce the differential output 87Zn.
87pOPFn CONpn t = 2.5 ms

INRpn
87pSECn
t = 7.5 ms
87P2n 1
87P1n 0 t = 15 ms
CONpn
87SLP2n/100 1
87SLP1n/100 0 87pRTKn + t
X 87pOPn 87pRn
87pRMFn —
0.1 sec
87THRFn other 87Rn
IFLTpn phases
87RTCn 87U 87Zn
87RMSn
Figure 5.25 Overall Logic With No In-Zone Transformer
In-Zone Transformer Applications

Transformer inrush appears as differential current. The SEL-400G provides har-
monic logic and waveshape logic to detect this condition and prevent a potential
misoperation.
Harmonic logic is active when E87XFRn =Y. Inrush detection is enabled by
using the E87Hn setting, as indicated in Table 5.10.
Table 5.10 E87Hn Settings
E87H Setting Description
R, RW Harmonic restraint is enabled

B, BW Harmonic blocking is enabled
RW, BW Waveshape-based inrush detection is enabled
Harmonic Restraint and Harmonic Blocking

The harmonic-blocking functions always operate in cross-blocking mode,
whereby the relay blocks all phases when the harmonic magnitude of any phase
exceeds the harmonic setting. By contrast, the harmonic restraint functions
always operate in independent blocking mode, i.e., there is no cross blocking
between phases.
The second- and fourth-harmonic quantities shown in Figure 5.26 are also used
to boost the restraint signal.
Harmonic components are filtered from the differential currents. Even-numbered
harmonics (second and fourth) provide security during energization, while fifth-
harmonic blocking provides security for overexcitation conditions. These values
are scaled using the 87PCT2n, 87PCT4n, and 87PCT5n settings and then com-
pared with the filtered differential current to produce Relay Word bits for use by
the harmonic blocking and restraint logic. After scaling the values, the relay com-
pares each harmonic value against the fundamental quantity 87pOPFn. Output
87XB2n (cross blocking) is the OR combination of the second or fourth-har-

monic blocking values from the other phases. 87XB2n, together with fifth-har-
monic blocking, 87pB5n, are used in the harmonic blocking path of the overall
logic as shown in Figure 5.40.
Output 87XB2n is also used to block the negative-sequence differential element
during inrush conditions (see Figure 5.26).
The harmonic integrity timers prevent differential element misoperation when
harmonic content momentarily drops below the harmonic threshold setting. The
control input at the bottom of the timer means that the DO timer is not timing if
the input picks up. If the input picks up continuously for 25 ms, the harmonic
integrity timer activates the 15 ms dropout timer. After activation, the dropout
timer keeps the output asserted for 15 ms after timer input deasserts. However, if
the input picks up again, the DO timer stalls, i.e., does not continue to count until
the input has dropped out again. For example, if the input drops out for 5 ms,
picks up and then drops out a second time, the timer output resets after 10 ms.
Note that the integrity timer for the fifth harmonic is disabled when 87UBLpn
asserts.
87THRHn
87pOPFn
87pB2n
other 87B2n
87pM2n 100 87pK2n phases
87PCT2n
87XB2n 25 ms 87XB2Tn*
Harmonic 87pM4n 100 87pK4n other
87pOPIn phases 15 ms
Filters 87PCT4n
Harmonic integrity
timers
87pM5n 100 87pK5n 87pB5n 25 ms 0 87pB5Tn*
87PCT5n
15 ms 0 1
other 87B5n
phases 87UBLpn
87TH5Dn
87pAP5n
87TH5Pn 87AP5n t
other 87AD5n
phases 0
* Not available as Relay Word bits.
Figure 5.26 Harmonic Blocking and Restraint
Waveshape-Based Inrush Detection Logic

Although inrush currents are typically rich in even-numbered harmonics (the sec-
ond harmonic in particular), some power transformers, especially the new
designs with the core material improved for lower losses, produce low levels of
these harmonics. These low harmonic levels can challenge the effectiveness of
traditional harmonic-blocking and harmonic-restraint schemes.
The waveshape-based inrush detection element addresses inrush conditions that
contain low second- and fourth-harmonic content by using a dwell-time algo-
rithm. The magnetizing currents of a three-phase, three-legged transformer
exhibit intervals where the currents are both small and flat (see Figure 5.27),
called dwell times, which coincide with one another in each phase. The dwell-
time algorithm uses this small and flat interval to detect transformer inrush and
supervise the percentage-restrained differential elements. For three-phase trans-
formers built from single-phase units or four- or five-legged cores, the dwell

times still exist in each phase but do not necessarily coincide. Thus the dwell-
time algorithm requires information about the transformer construction, estab-
lished via the 87COREn setting before it can activate the appropriate logic.
Current (pu)
0
Dwell Time
–5
0 1 2 3 4
Time (cycles)
Figure 5.27 Dwell-Time Intervals in the Inrush Currents
Dwell-Time Algorithm for Three-Legged, Three-Phase Transformers

Setting 87COREn = T enables the dwell-time algorithm for three-legged, three-
phase transformers.
The dwell-time logic first performs a supervisory check whereby it confirms that
there is sufficient differential current to activate the dwell-time algorithm. If
either the filtered A-Phase operate current or the negative-sequence operate cur-
rent is above half of their respective pickup thresholds, 87TMAn asserts to indi-
cate sufficient operate current magnitude, as shown in Figure 5.28. If any phase
has sufficient operate current, the three-legged operate current magnitude check,
87TMn, asserts. Assertion of 87TMn is a required condition for operation of the
three-legged dwell-time logic, as shown in Figure 5.29.
87AOPFn
0.5 • 87P1n
87TMAn
0.5 • 87QOPFn 87TMBn

87TMn
0.5 • 87QPn E87Qn
87TMCn
Figure 5.28 Sufficient Operate Current Check
|87AOPn|
|87BOPn| 1-A
|87COPn|
87COREn = T
87AOPIn di/dt abs 87WBn
87TMn
87BOPIn di/dt abs A 87TSn
87COPIn di/dt abs

PU
87AOPFn DO
87BOPFn B
87COPFn
C
Figure 5.29 Waveshape Dwell-Time Inrush Detection Logic for Three-Legged, Three-Phase Transformers

The three-legged dwell-time algorithm executes on a sample-by-sample basis

and works as follows:
➤ The relay adds the absolute values of the raw (unfiltered) differential
current in all three phases (87AOPIn, 87BOPIn, and 87COPIn) (see
Figure 5.29) to form a portion of the dwell-time identifier signal.
During inrush conditions, this signal is low for the duration of the
dwell-time periods because all three differential currents exhibit their
dwell periods at the same time.
➤ To provide resiliency against gradual CT saturation that may occur
during inrush, the relay forms a second measure of the dwell-time
pattern by summing the absolute values of the derivatives of the raw
differential currents. Because all three inrush currents are
coincidentally flat during the dwell-time periods, this signal is low
during the dwell-time periods of the inrush currents.
➤ The two portions of the dwell-time identifier signal are multiplied by
a scaling factor and added together. The resulting signal is low during
the dwell-time periods, high during internal faults, and resilient to
gradual CT saturation during inrush.
➤ The relay creates an adaptive threshold by taking a fraction of the
three-phase sum of the filtered operating currents (87AOPFn,
87BOPFn, and 87COPFn) (see Figure 5.29). A comparator checks if
the level of the dwell-time identifier signal is below the adaptive
threshold for the duration of the pickup time (PU). If so, then
87TWBn asserts, indicating that the relay has identified an inrush
condition through use of waveshape recognition. The dropout time
(DO) is set for one power system cycle and is necessary to keep
87TWBn continually asserted until the dwell-time of the next
subsequent cycle, maintaining reliable inrush detection.
Dwell-Time Algorithm for Single-Phase Units, or Four- or Five-

Legged Three-Phase Transformers
When a three-phase transformer is constructed with single-phase transformers or
with a four- or five-legged core, the individual phase dwell-time intervals are not
aligned in time. In a transformer built with single-phase units or with a four- or
five-legged core, the flux in each core can be independent, meaning the three
cores go in and out of saturation independently. Therefore, one instance of the
dwell-time algorithm is required for each phase of the transformer.
Setting 87COREn = S segregates the inrush detection dwell-time logic into indi-
vidual phases, such as in the A-Phase logic shown in Figure 5.30. The logic is
identical to the three-legged core logic shown in Figure 5.29, except that it only
uses a single-phase current rather than a three-phase sum.
|87AOPInn| 1-A
87COREn = S
87TMAn 87WBAn
87AOPIn di/dt abs A 87TSAn
PU
87AOPFn B DO
Figure 5.30 Waveshape Dwell-Time Inrush Detection Logic for A-Phase

Figure 5.31 shows the waveshape-based inrush blocking logic used by the differ-
NOTE: For a more detailed
discussion and analysis of the ential elements. If the logic identifies magnetizing inrush current through use of
waveshape inrush detection method, waveshape recognition, the 87WBn Relay Word bit asserts. The logic uses phase-
refer to the technical paper, Low
Second-Harmonic Content in specific Relay Word bits (87WBAn, 87WBBn, and 87WBCn) to block the per-
Transformer Inrush Currents – centage-restrained differential elements, as shown in Figure 5.31. The negative-
Analysis and Practical Solutions for
Protection Security by Steven Hodder,
sequence differential element is blocked by the 87WBn Relay Word bit, as shown
Bogdan Kasztenny, Normann Fischer, in Figure 5.46.
and Yu Xia (available at selinc.com).
87WBA
87WBB 87WB
87WBC
Figure 5.31 Waveshape Blocking Logic
Waveshape-Based Bipolar Unblocking Logic

A waveshape-based bipolar differential overcurrent element allows for improve-
ments in the operation of the restrained and unrestrained differential elements.
Figure 5.32 shows the differential currents for an internal transformer fault that
develops during transformer energization. The first part of the figure shows the
unipolar characteristic of the differential currents during an inrush condition.
When the internal fault occurs on one phase, the resulting waveform has a bipolar
characteristic as shown in blue.
10
8
Differential Currents (A secondary)
6
4
2
0
–2
–4
–6
–8
0 20 40 60 80 100 120 140 160
Time (ms)
Figure 5.32 Differential Currents for an Internal Fault During Inrush Conditions
Figure 5.33 shows the differential current of the faulted phase of Figure 5.32
superimposed on two thresholds. Note that during inrush conditions (the first
72 milliseconds), the current is negative and it repeatedly crosses the negative
threshold (the dashed blue line in Figure 5.33). The current during this time does
not cross the symmetrically placed positive threshold (the dashed red line). When
the internal fault occurs, the current crosses the negative threshold and then
crosses the positive threshold shortly afterwards. Using this information, we cre-
ate a pair of bipolar differential overcurrent elements: a low-set element that we
can use to unblock the inrush blocking functions of the relay and a high-set ele-
ment that we can use for unrestrained differential protection. Because the ele-
ments work on a bipolar principle, we set the thresholds relatively sensitively and
still ensure security during inrush conditions.

10
Positive Threshold
Phase A Current
5
(A secondary)
0
–5
Negative Threshold
–10
0 20 40 60 80 100 120 140 160
Bipolar Check
4
2
0 Output
0 20 40 60 80 100 120 140 160
Time (ms)
Figure 5.33 Fault Current During Energization (Black) Compared With Positive
(Red) and Negative (Blue) Thresholds
As shown in Figure 5.34, the A-Phase, low-set bipolar differential overcurrent

element compares the unfiltered (raw) operate current, 87AOPIn (see
Figure 5.34), against positive (+L) and negative (–L) thresholds. The B- and C-
Phase logic is similar. If the current exceeds the positive threshold for a short
duration (PKPBP timer), a window equal to the DPOBP timer opens to wait for
the current to decrease below the negative threshold. If it does, the relay declares
the current to be symmetrical and not an inrush current. Mirrored logic covers the
negative polarity. The magenta trace in Figure 5.33 is the output of the bipolar
low-set overcurrent element, shown in Figure 5.34 as 87TBLn.
+L PKPBP
DPOBP
87AOPIn 87TBLAn
PKPBP
–L
DPOBP
Figure 5.34 A-Phase Bipolar Low-Set Signature Detection Logic
Prior to using the low-set bipolar overcurrent element as an unblocking function,

the relay performs additional security checks, as shown in Figure 5.35, to ensure
that the bipolar logic is asserting properly. The first is a sudden change detection
logic, which confirms that the bipolar nature of the differential current is caused
by an internal short circuit rather than by gradual CT saturation occurring during
inrush conditions. The sudden change detection logic monitors the absolute value
of the per-cycle difference of the operate current and checks that this difference is
significant (above the +L threshold). The output of the comparator passes
through a pickup timer (PKPS) for security, and a dropout timer (DPOS) ensures
that the sudden change detection logic coordinates with the input from the unsu-
pervised bipolar low-set logic, 87TBLn.
The other security check (shown in Figure 5.35) ensures that the bipolar logic
does not assert because of CT saturation when an external fault condition is
detected (CONAn must be deasserted, see Figure 5.35). However, if the CT is
deemed to be in an unsaturated state following the external fault, as indicated by
CTUAn asserting, the bipolar logic can assert. When the bipolar low-set logic,

87TBLAn, asserts, along with the security checks, the bipolar low-set element,
87BPLAn, asserts. The B- and C-Phase supervised low-set logic is similar to the
A-Phase logic.
87TBLAn
87AOPIn |∆87AOPIn| 1/4 cyc

87BPLAn
+L 1/2 cyc 87BPLBn 87BPLn
87BPLCn
CONAn
CTUAn
Figure 5.35 A-Phase Bipolar Low-Set Logic
The unblocking logic makes direct use of the bipolar low-set element, as shown
in Figure 5.36. When you enable the unblocking logic via the E87UNBn setting,
the unblocking Relay Word bit, 87UBLAn, asserts for one cycle following the
assertion of the bipolar low-set element, 87BPLAn. The B- and C-Phase
unblocking logic is similar to the A-Phase logic.
0
87BPLAn 87UBLAn
E87UNBn = Y
20 ms 87UBLBn 87UBLn
87UBLCn
Figure 5.36 A-Phase Unblocking Logic
When the unblocking logic asserts, the following changes occur to the phase-
restrained differential elements, as shown in Figure 5.36:
➤ The second- and fourth-harmonic cross blocking, 87XB2n, and
waveshape-based inrush blocking, 87WBAn, are canceled in the
harmonic-blocked differential element.
➤ The waveshape-based inrush blocking, 87WBAn, is canceled in the
harmonic-restrained differential element.
➤ The second- and fourth-harmonic magnitudes are removed from the
restraint current, 87ARTHn, of the harmonic-restrained differential
element.
➤ The fifth-harmonic integrity timer used by the phase-restrained
elements is bypassed (although direct assertions of the 87AB5n
Relay Word bit still block the elements).
➤ The delay time of the adaptive security timer decreases.
The following changes are made to the negative-sequence differential element
when the unblocking logic asserts, as shown in Figure 5.45 and Figure 5.46:
➤ The second- and fourth-harmonic cross blocking, 87XB2n, and
waveshape-based inrush blocking, 87WBn, are canceled.
➤ The negative-sequence differential element delay timer, 87QDn, is
bypassed.
A high-set version of the bipolar differential overcurrent element is available for
use as an unrestrained differential element and is identical to the low-set version
except that it uses a threshold that is a multiple (m) of the low-set threshold (L),
as shown in Figure 5.37 and Figure 5.38.

+m • L PKPBP
DPOBP
87AOPIn 87TBHAn
87TBHBn 87TBHn
PKPBP 87TBHCn
–m • L
DPOBP
Figure 5.37 A-Phase Bipolar High-Set Signature Detection Logic
87T_B2A
87AOPIn |∆87AOPIn| PKPS

87TBHAn
+m • L DPOS 87TBHBn 87BPHn
87TBHCn
CONAn
CTUAn
Figure 5.38 A-Phase Bipolar High-Set Logic
As shown in Figure 5.38, the unrestrained differential element can use the bipolar
high-set element, 87BPHA, for unrestrained tripping.
Using Harmonic and Waveshape Logic in the Differential Elements

The enable settings options for the various percentage-restrained differential ele-
ments (E87Hn and E87Q) allow for each element to provide inrush security by
using only the harmonic-based method (setting option B or R), by using either
NOTE: Consider enabling all of the the harmonic- or waveshape-based blocking methods for the harmonic-blocked
harmonic and waveshape functions
through the E and W settings options differential element and negative-sequence differential element (setting option
for the settings E87HB, E87HR, and BW), or by adding waveshape-based blocking to the harmonic-restrained differ-
E87Q as well as setting E87UNBL = Y
to gain the best security and speed
ential element (setting option RW). As shown in Figure 5.39 and Figure 5.46, the
performance from the differential appropriate inrush blocking methods are activated or deactivated depending on
elements. the enable settings option.
The waveshape-based unblocking logic is separate from the inrush blocking logic
and is enabled in all the percentage-restrained differential elements (87HB,
87HR, and 87Q) when setting E87UNBL = Y (see Waveshape-Based Bipolar
Unblocking Logic on page 5.29). Should the unblocking logic assert, indicating
that the logic detected an internal fault, the relay cancels the inrush security
checks and modifies the security timers in the differential elements (see
Figure 5.39, Figure 5.45, and Figure 5.46), allowing for improved element oper-
ating times. Consider enabling the unblocking logic to gain speed improvements
for all internal fault types and conditions.
CT Unsaturate Logic
The CT unsaturate logic ensures that the internal fault detector switches out of
secure mode if there are no signs of CT saturation. The relay uses the harmonic
components from the differential current. The CTUpn Relay Word bit asserts fol-
lowing an assertion of CONpn when the differential current is less than 10 per-
cent of the restraint current, the total harmonic current is less than 10 percent of
the restraint, and there are no appreciable dc components in the currents making
up the zone (see Figure 5.39). Note that if there is no in-zone transformer
(E87XFRn = N), the harmonic calculation is not carried out and the harmonic
currents are forced to zero.

87pOPFn
87pRTFn 0.1
CONpn 0.5 s
CTUpn
0
87pM2n +
87pM4n +
87pM5n +
DCpn
Figure 5.39 CT Unsaturated Logic
Overall Logic for In-Zone Transformer Applications

For applications with an in-zone transformer (E87XFRn = Y), the overall logic is
represented in Figure 5.40. The logic can be divided into three sections: the har-
monic blocking path, the harmonic restraint path, and the dynamic security timer.
The logic restrained Relay Word bit (87R) asserts via either path when the oper-
ate differential current exceeds the pickup setting and also exceeds the product of
the restraint current and the slope setting. The CONpn Relay Word bit controls
the application of the secure slope setting. Assertion is supervised by the internal
fault detector.
The harmonic blocking path asserts the 87pRHBn Relay Word bit. This path is
disabled if E87Hn does not include B or BW. This path is blocked by the cross
blocking Relay Word bit, and also by a high fifth harmonic.
The harmonic restraint path asserts the 87pRHRn Relay Word bit. This path is
disabled if E87Hn does not include R or RW. This path uses the second and
fourth harmonics to boost the restraint signal 87pRTHn. It is blocked by a high
fifth harmonic.
Both paths are blocked by waveshape inrush detection, if enabled. Waveshape
unblocking overrides waveshape blocking. It also overrides cross blocking and
removes harmonic boosting from the restraint signal.
A dynamic security timer shown in the figure adds a delay in a similar manner to
that shown in Figure 5.40, but is augmented by waveshape-based unblocking
(87UBLpn). Operation is delayed by 7.5 ms if either the CONpn or INRpn Relay
Word bits are asserted. Operation is delayed by 15 ms if both Relay Word bits are
asserted. However, if INRpn is asserted and 87UBLpn subsequently asserts, then
the delay is reduced from 7.5 ms to 2.5 ms. Similarly, If both CONpn and INRpn
Relay Word bits are asserted and then 87UBLpn subsequently asserts, the delay
is reduced from 15 ms to 7.5 ms.
The timer output is ANDed with the restrained torque-control Relay Word bit
(87RTCn) to produce the restrained differential output 87Rn. The restrained,
unrestrained, and rms Relay Word bits are then combined to produce the differen-
tial output 87Zn.

E87Hn has B or BW
87WBpn CONpn
t = 2.5 ms
E87Hn has BW
87XB2Tn 87pHBn 87UBLpn
INRpn
87UBLpn t = 7.5 ms
87pB5Tn
87pOPFn + t = 15 ms
RDIFA 87pRHBn
(Setting) –
87pSECn
(Settings)
1
87P2n
0 IFLTpn t 87pRn
87P1n CONpn 20
(Settings) ms
1 other
87SLP2n / 100 87Rn
0 87pRTKn + phases
87SLP1n / 100 X + 87pRHRn
– RDIFA 87RTCn 87Un 87Zn
87pRMFn 87pOPFN –
1 87pRTHn + 87RMSn
++ 0 - +
87pK2n RDIFA
+ –
87pK4n
87UNBLpn
87THRFn
E87Hn has R or RW
87WBpn
87pHRn
87UBLpn
E87Hn contains RW
87pB5Tn
Figure 5.40 Overall Logic For an In-Zone Transformer
CT Selection
CT selection criteria in the SEL-400G are defined in terms of the saturation fac-
tor (KS) for ANSI applications, and the transient dimensioning factor (KTD in
IEC 61869) shown in Table 5.11. Remanence is considered via the remanence
over-dimensioning factor (KREM) which is consistent with both IEEE C37.110
and IEC 61869, as shown in Equation 5.15. The CT selection guidance is only
applicable when 87UNBL = N.
1
K REM = ---------------------------------------
1 – Remanence
Equation 5.15
For example, a low remanence CT type, such as IEC TPY, that holds a maximum
remanence of 10 percent has a KREM of 1.1. The remanence level considered is
based on industry guidance on expected worst-case levels of remanence, as high
as 80 percent.
Table 5.11 Minimum CT Sizing Requirements for the SEL-400G Differential

Element
Minimum VANSI, Minimum VA

CT Specification KREM KS, KTD
ALF Rating
ANSI C (60 Hz) 100 N/A 3.0 1.8

IEC 5P, 10P (50 Hz) 20 2.5 5.0 1.6
IEC 5PR, 10PR (50 Hz) 15 2.5 1.1 1.6
IEC PX (50 Hz) 20 2.5 5.0 1.6
IEC PXR (50 Hz) 15 2.5 1.1 1.6
IEC TPX (50 Hz) 20 2.5 5.0 1.6
IEC TPY (50 Hz) 15 2.5 1.1 1.6

IF
V ANSI   K REM • K S  •  ---- • R B
 N
Equation 5.16
IF
 K REM • K TD  •  ---- •  R B + R CT 
 N
ALF  -------------------------------------------------------------------------------------------
VA
 ------------------- +  I
 I RATED RATED • R CT 
Equation 5.17
where:
VANSI = the ANSI C voltage rating at the CT terminals (in volts)
ALF = the accuracy limit factor of the CT
IF = the fault current in primary amperes
IRATED = the CT rated secondary current (in amperes)
N= the CT turns ratio
RB = the connected burden in ohms including the secondary wiring
and relay burden
RCT = the CT resistance in ohms
The values in Table 5.11 apply for a 87SLP2n setting of 90 percent. In many
applications, the actual oversizing factor will be greater than that shown in the
table. In this case, the 87SLP2 setting may be relaxed, as shown in Figure 5.41, to
obtain a lower 87SLP2n setting.
100
60 Hz
50 Hz
90
87SLP2 Setting (%)
80
70
60
50
0 1 2 3 4 5 6 7 8 9 10
CT Transient Dimensioning Factor (KS/KTD)
Figure 5.41 87SLP2n Setting as a Function of CT Sizing Factor
CT Selection Example
The following system is used to demonstrate the CT requirements.

Strongest
154 MVA, 13.8 kV GSU Source With All
ZG“ = 0.163 pu 13.2 kV/230 kV Lines in Service
CT1 CT3 CT2 CT4
Z1 = 0.0561 pu
F3 F1 ZT = 0.0622 pu F2
87G
87T
Figure 5.42 Example System for CT Selection
Parameter Data
Rated current of generator/GSU transformer (including 50% margin) 9,664/555 A

Generator current for three-phase fault at F1 39,530 A
GSU current for three-phase fault at F2 28,610/1,642 A
Generator and GSU transformer current for single-line-to-ground 21,770/2,164 A
(SLG) fault at F2
GSU transformer current for 3P fault at F3 with strongest system con- 54,460/3,126 A
nected and all lines in service
ANSI CT Sizing Example

We assume a 60 Hz system with 5 A CT secondary rating. For this example, we
assume 300 feet of 10 AWG wire at 75°C. This gives a one-way lead resistance
of approximately 0.372 . We also assume a CT resistance of 2.5 m per turn.
CT Ratio Selection for CT1 and CT2 (87G Zone 1)

Select a CT ratio via Equation 5.18 where IFMAX is the maximum external fault
current seen by the CTs.
I FMAX
N   K REM • K S  •  -----------------
 100 
Equation 5.18
For the example of Figure 5.42, the maximum current occurs for a three-phase
fault at F1.
IFMAX
 K REM • K S  •  ----------------- =  3 • 1.8  •  39530 A
--------------------- = 2135
 100 A   100 A 
Equation 5.19
Applying Equation 5.19, for CT1 and CT2, we choose a CT ratio of 2400.
Sizing CT Rated Voltage for CT1 and CT2 (87G Zone 1)

The ANSI voltage rating for CTs may be selected via Equation 5.16, as shown in
Equation 5.20.
39530 A
V ANSI   3 • 1.8  •  --------------------- • 0.372  = 33.1 V
 2400 
Equation 5.20

However, according to Table 5.11, the minimum VANSI is 100, therefore we

choose a C100 CT. Note that because we sized our CTs larger than required, we
can lower the 87SLP2n setting. Calculate the CT over-dimensioning by taking
the ratio of the saturation voltage of the CT (Equation 5.21) compared to the
application (Equation 5.22), as shown in Equation 5.23. Note that RCT is 6 
(2400 turns • 0.0025 /turn). If available, use RCT and saturation voltage of the
CT (Equation 5.21) from the data sheet instead.
V SAT_CT  100 + 20 • 5 A • 6  = 700 V

Equation 5.21
39530 A
V SAT   3 • 1.8  •  --------------------- •  0.372  + 6   = 566.7 V
 2400 
Equation 5.22
V SAT_CT
K S_EFF =  ---------------------- • 1.8 = 2.22
 V SAT 
Equation 5.23
Both CT1 and CT2 correspond to the 87G Zone. Referring to Figure 5.41, we
select an 87SLP21 setting for 87G of 85 percent.
CT Ratio Selection for CT3 (87T Zone 2)

Using Equation 5.18, the CT ratio for CT3 may be calculated via Equation 5.24.
The maximum external fault current is for a three-phase fault at F1.
IFMAX 54460 A
 K REM • K S  •  ----------------- =  3 • 1.8  •  --------------------- = 2941
 100 A   100 A 
Equation 5.24
For CT3, we choose a CT ratio of 3000.
Sizing CT Rated Voltage for CT3 (87T Zone 2)

The ANSI voltage rating for CTs may be selected via Equation 5.16 as shown in
Equation 5.25.
54460 A
V ANSI   3 • 1.8  •  --------------------- • 0.372  = 36.5 V
 3000 
Equation 5.25
According to Table 5.11, the minimum VANSI is 100, therefore we choose a C100
CT. Note that because we sized our CTs larger than required, we can lower the
87SLP2n setting. Calculate the CT over-dimensioning by taking the ratio of the
saturation voltage of the CT (Equation 5.26) compared to the application
(Equation 5.27), as shown in Equation 5.28. Note that RCT is 7.5  (3000 turns •
0.0025 /turn). If available, use RCT and saturation voltage of the CT
(Equation 5.26) from the data sheet instead.
V SAT_CT  100 + 20 • 5 A • 7.5  = 850 V

Equation 5.26

54460 A
V SAT   3 • 1.8  •  --------------------- •  0.372  + 7.5   = 771.7 V
 3000 
Equation 5.27
850
K S_EFF =  ------------- • 1.8 = 1.98
 771.7
Equation 5.28
CT Ratio Selection for CT4 (87T Zone 2)

The maximum current seen by the HV CT is for a 3P fault at F3 as applied in
Equation 5.29.
I FMAX
 K REM • K S  •  ----------------- =  3 • 1.8  •  3126 A
------------------ = 168.8
 100 A   100 A 
Equation 5.29
For CT4, we obtain a CT ratio of 200.
Sizing CT Rated Voltage for CT4 (87T Zone 2)

The worst-case external 3P fault is at F3 and the worst-case SLG fault is at F2.
Applying Equation 5.16, the ANSI voltage rating for the HV CT can be calcu-
lated via Equation 5.30 and Equation 5.31.
3126 A
V ANSI   3 • 1.8  •  ------------------ • 0.372  = 31.4 V
200
Equation 5.30
2164 A
V ANSI   3 • 1.8  •  ------------------ •  2 • 0.372   = 43.5 V
 200 
Equation 5.31
According to Table 5.11, the minimum VANSI is 100, therefore we choose a C100
CT. Note that because we sized our CTs larger than required, we can lower the
87SLP2n setting. Calculate the CT over-dimensioning by taking the ratio of the
saturation voltage of the CT (Equation 5.32) compared to the application
(Equation 5.33), as shown in Equation 5.34. Note that RCT is 0.5  (200 turns •
0.0025 /turn). If available, use RCT and saturation voltage of the CT
(Equation 5.32) from the data sheet instead.
V SAT_CT  100 + 20 • 5 A • 0.5  = 150 V

Equation 5.32
2164 A
V SAT   3 • 1.8  •  ------------------ •  2 • 0.372  + 0.5   = 72.7 V
 200 
Equation 5.33
150
K S_EFF =  ---------- • 1.8 = 3.71
 72.7
Equation 5.34
For the 87T, the LV CT has an effective KS of 1.98, whereas the HV CT has a
higher KS_EFF of 3.71. Choose the lower value (1.98) in this case. Referring to
Figure 5.41, we select an 87SLP22 setting for 87T of 87 percent.

IEC CT Sizing
We size a 50 Hz 1A Class P 5P CT in this example. We assume 100 m of
2.5 mm2 wire at 75°C. This gives a one-way lead resistance of approximately
0.841 . We also assume CT winding resistance of 6 m per turn.
VA Rating for All CTs (CT1, CT2, CT3, and CT4)

Because we assumed the same lead length for all CTs, we use the same burden
resistance of 0.840 . Choose a VA rating per Equation 5.35.
2
VA = 1 • 0.841 = 0.841
Equation 5.35
Per Table 5.11, choose a VA rating of 2.5.
CT Ratio Selection for All CTs (CT1, CT2, CT3, and CT4)
Based on the maximum LV load current of 9664 A, choose 10000:1 CTs for CT1,
CT2 and CT3.
Based on the maximum HV load current of 555 A, choose 600:1 for CT4.
ALF for CT1 and CT2 (87G Zone 1)

For the 10000:1 CT, RCT = 60 . ALF, per Equation 5.17, through use of values
from Table 5.11, can be calculated via Equation 5.36. The worst-case external
fault is at F1.
39530
 5 • 1.6  •  --------------- •  0.841  + 60  
 10000
ALF  ---------------------------------------------------------------------------------------------------- = 30.78
2.5 + 60
Equation 5.36
Choosing the next highest ALF of 40, we choose a 2.5 VA 5P 40 CT for this
application. The effective KTD is shown in Equation 5.37.
40
K TD_EFF =  ------------- • 1.6 = 2.08
 30.78
Equation 5.37
We look at Figure 5.41 for an 87SLP21 of 83 percent.
ALF for CT3 (87T Zone 2)

For the 10000:1 CT, RCT = 60 . EAL, per Equation 5.17, through use of values
from Table 5.11, can be calculated via Equation 5.38. The worst-case fault cur-
rent is the 3P fault at F3.
54460
 5 • 1.6  •  --------------- •  0.841  + 60  
 10000
ALF  ---------------------------------------------------------------------------------------------------- = 42.41
2.5 + 60
Equation 5.38
Choosing the next highest ALF of 50, we choose a 2.5 VA 5P 50 CT for this
application. The effective KTD is shown via Equation 5.39.

50
K TD_EFF =  ------------- • 1.6 = 1.89
 42.41
Equation 5.39
ALF for CT4 (87T Zone 2)

For the 600:1 CT, RCT = 3.6 . The worst-case 3P external fault and SLG fault
are at F2. The ALF for both fault types can be found via Equation 5.40 and
Equation 5.41.
3126 A
 5 • 1.6  •  ------------------ •  0.841  + 3.6  
 600 
ALF 3P  --------------------------------------------------------------------------------------------------------- = 30.3
2.5 + 3.6
Equation 5.40
2164 A
 5 • 1.6  •  ------------------ •  2 • 0.841  + 3.6  
 600 
ALF SLG  ------------------------------------------------------------------------------------------------------------------ = 24.98
2.5 + 3.6
Equation 5.41
If we use 2.5 VA 5P 40 CT for this application, we get the effective KTD shown in
Equation 5.42.
40
K TD_EFF =  ---------- • 1.6 = 2.1
 30.3
Equation 5.42
The minimum over-dimensioning for the 87T zone applying CT3 (1.89 from
Equation 5.39) and CT4 (2.1 from Equation 5.42) is 1.89. This provides us an
87SLP22 of 85 percent.
Setting Guidelines for 87 Phase Differential

Table 5.12 87 Phase Differential Settings
E87Zn 87 Zone n Terminals Combo of S, T, U, W, X Group

W, X, Y
E87XFRn 87 Zone n In-Zone Transformer Y, N N Group
Use the E87Zn setting to enable a zone and to specify which terminals make up
the zone. A minimum of two terminals must be selected to enable a zone.
Depending on the application, you may not need all of these inputs for the differ-
ential protection.
Use the E87XFRn setting to specify that a transformer is within the zone. When
set to Y, the element carries out TAP and connection compensation. If inrush is
possible, then harmonic blocking and harmonic restraint can be enabled.
Table 5.13 Pickup, Slope, and Security Settings (Sheet 1 of 2)
87P1n 87 Zone n Oper. Current Sensitive PU 0.10–4 0.25 Group

87P2n 87 Zone n Oper. Current Secure PU 0.10–4 0.5 Group
87SLP1n 87 Zone n Slope 1 Percentage 5.00–90% 10 Group

Table 5.13 Pickup, Slope, and Security Settings (Sheet 2 of 2)
87SLP2n 87 Zone n Slope 2 Percentage 5.00–90% 75 Group

87RTCn 87 Zone n Restrained Element TC SELOGIC control 1 Group
equation
87pSECn 87 Zone n Switch to Secure (SELOGIC SELOGIC control CONpn Group
Equation) equation
87EFDOn 87 Zone n External Fault Detect DO 0.0200–1.2 s 1 Group
Generator Differential Application

The following settings are suggested for the generator differential relay applica-
tion.
0.25 • Relay Nominal Current

87P1n = ------------------------------------------------------------------------- pu
TAP
87SLP1n accommodates CT and relay errors under steady-state conditions.
87SLP1n = 10%
If the unit is a black-start unit, 87P2n should be set higher than 87P1n, as shown
in the following equation. Otherwise, it can be set the same as 87P1n.

87P2n = ---------------------------------------------------------------------- pu
TAP
Refer to CT Selection on page 5.34 for guidelines on setting 87SLP2n.
Transformer or Overall Differential Application

The following settings are suggested for the unit or transformer differential relay.

87P1  2n = ------------------------------------------------------------------------- pu
TAP
The relay uses the MVA, terminal voltage, CT ratio, and CT connection settings
you have entered and calculates the TAP values automatically. You can view
these values by using the Grid Configurator.
In addition to CT and relay errors, 87SLP1n accommodates minor errors caused
by transformer turns errors and steady-state magnetizing current. This translates
to a minimum Slope 1 setting of 20 percent. If the transformer includes a tap-
changer, the slope setting is increased using the following calculation.
 TAP Changer % 
SLPTPCH = 7.5% • --------------------------------------------
10%
This results in a Slope 1 setting of
87SLP1n = 20% + SLPTPCH

Add another 7.5 percent to 87SLP1n for each 10 percent TAP (e.g., if the tap-
changer supports a 20 percent change, 87SLP1n setting can be set to 20% +
(20% / 10%) • 7.5% = 35%.

While 87PCT2/4 settings are intended to provide restraint/blocking because of

conditions that excite the transformer magnetizing branch such as inrush, these
settings also provide additional security during external fault conditions involv-
ing CT saturation. Hence for in-zone transformer applications with default
87PCT2/4 settings, use the following equation to determine 87SLP2 setting irre-
spective of CT dimensions.
NOTE: The SEL-400G and SEL-487E 87SLP2n = max(90%, (SLP2CT + SLPTPCH)) (assuming 87PCT2/4 =
restraint quantity (87pRTFn)
calculation differs from the
15%)
SEL-300G, SEL-587, and SEL-387 by a
factor of 2. To achieve the same where SLP2CT is the Slope 2 setting determined during CT selection (see
relative slope for the differential Figure 5.41).
elements in the SEL-487E, SEL-387,
SEL-587, and SEL-787, this factor of 2
must be accounted for. The 87pSECn, 87EFDOn, and 87RTCn can be left at their default values. Alternate
relationships between slope settings settings may be considered in unusual applications—for example, severe CT mis-
for the five relays are shown here:
match.
Slope 1400G/487E = 1/2 • Slope 1387/587/
787
Table 5.14 Unrestrained and RMS Settings
Slope 2400G/487E = 1/2 • Slope 2387/
587/787
87UPn 87 Zone n Unrestrained Element PU 1.00–20 pu 8 Group

87UTCn 87 Zone n Unrestrained Element TC SELOGIC control 1 Group
(SELOGIC Equation) equation
87RMPn 87 Zone n RMS Element PU OFF, 1.00–20 pu OFF Group
(OFF, 1.00–20)
87RMTCn 87 Zone n RMS Element TC SELOGIC control 1 Group
(SELOGIC Equation) equation
Set the unrestrained element pickup, 87UPn, to operate for very heavy current
levels that clearly indicate an internal fault. For in-zone transformer applications,
this is typically about 8 times tap. The unrestrained differential element only
responds to the fundamental frequency component of the differential operating
current. It is unaffected by the slope settings, and there is no harmonic blocking/
restraint for this element during inrush conditions. Thus, you must set the ele-
ment pickup level high enough that the element does not react to large inrush cur-
rents.
The rms element is used for instances where the generator operates at an off-
nominal frequency but the relay might be unable to track frequency. One example
is dynamic braking of a hydro generator. In this case, the generator speed is
ramping down but the generator terminals are shorted and the relay cannot mea-
sure the correct frequency. The generator is offline so CT saturation for external
faults is not a concern. Set the rms element pickup, 87RMPn below the minimum
expected fault current. Torque-control the element so that it is enabled only when
dynamic braking is active.
Winding Compensation Settings for In-Zone Transformers

The SEL-400G provides winding compensation for in-zone transformer applica-
tions. For a detailed discussion on the selection of transformer compensation set-
tings see the technical paper Beyond the Nameplate—Selecting Transformer
Compensation Settings for Secure Differential Protection by Barker Edwards,
David G. Williams, Ariana Hargrave, Matthew Watkins, and Vinod K. Yedidi,
available at selinc.com.

Table 5.15 Winding Compensation Settings
MVAn 87 Zone n Transformer Max. MVA OFF, 1–5000 MVA OFF Group
VTERMmn 87 Zone n Term. m L-L Voltage 1.00–1000 kV 275 Group
87mCTCn 87 Zone n Term. m CT Conn. Com- 0–13 0 Group
pensation
87mTAPn 87 Zone n Term. m Current Tap 0.50 to 175 A, sec 1 Group
87mANGn 87 Zone n Term. m Ang. Comp. –179.99 to 180.00 deg 30 Group
For MVAn, use the highest expected transformer rating, such as the forced oil
and air cooled (FOA) rating or a higher emergency rating, when setting the maxi-
mum transformer capacity.
For VTERMnm, enter the nominal line-to-line transformer terminal voltages. If
the transformer differential zone includes a load tap changer, assume that the tap
changer is in the neutral position. The setting units are kilovolts.
Discussion on CT Connection Compensation

Setting 87mCTCn specifies which compensation matrix the differential element
is to use. The setting values are 0 through 13. These values physically represent
the number of increments of 30 degrees that a balanced set of currents with ABC
phase rotation will be rotated in a counterclockwise direction when multiplied by
the CTC matrix. For example, setting 87STCS = 1 rotates the Terminal S set of
currents counterclockwise by 30 degrees.
If a balanced set of currents with ACB phase rotation undergoes the same exer-
cise, the rotations by the CTC matrices are in the clockwise direction.
The CTC(0) setting value creates no changes in the currents. Referring to
Figure 5.16:
87AmFn = IAmF
87BmFn = IBmF
87CmFn = ICmF
The 87nCTCm = 1 setting performs a 30-degree compensation in the counter-
clockwise direction, as would a delta CT connection of type DAB (Dy1). This
connection results from the following relationships:
IAmF – IBmF
87AmFn = ------------------------------------
3
IBmF – ICmF
87BmFn = ------------------------------------
3
ICmF – IAmF
87CmFn = ------------------------------------
3
Setting 87nCTCm = 1 realizes the above mentioned relationships, and the relay
uses the following CTC(1) matrix to compensate the currents:

1 –1 0
1
 CTC  1   = ------- • 0 1 –1
3
–1 0 1
The compensation matrix CTC(12) is similar to CTC(0), in that it produces no
phase shift (or, more correctly, 360 degrees of shift) in a balanced set of phasors
separated by 120 degrees. However, it removes zero-sequence components from
the terminal currents, as do all of the matrices having non-zero values of m, i.e.,
all matrices except CTC(0).
2 –1 –1
1
 CTC  12   = --- • – 1 2 – 1
3
–1 –1 2
that is,
2 • IAmF – IBmF – ICmF

87AmFn = -------------------------------------------------------------------
3
– IAmF + 2 • IBmF – ICmF
87BmFn = ------------------------------------------------------------------------
3
– IAmF – IBmF – 2 • ICmF
87CmFn = -----------------------------------------------------------------------
3
We could use this type of compensation in applications having wye-connected
transformer windings (no phase shift) with wye CT connections for each wind-
ing. Using 87mCTCn = 12 for each terminal removes zero-sequence components,
just as connection of the CTs in delta would do, but without producing a phase
shift. (You could also use 87mCTCn = 1 or 11 for this same application, yielding
compensation similar to that from connection of the CTs on both sides in DAB or
DAC.) The effect of each compensation on balanced three-phase currents is to
rotate the currents m • 30 degrees without a magnitude change. Table 5.16 shows
the complete list of compensation matrices.
Table 5.16 Compensation Matrices (Sheet 1 of 2)
1 –1 0 1 –2 1
1 1
 CTC  1   = ------- • 0 1 –1  CTC  2   = --- • 1 1 –2
3 3
–1 0 1 –2 1 1
0 –1 1 –1 – 1 2
1 1
 CTC  3   = ------- • 1 0 –1  CTC  4   = --- • 2 –1 –1
3 3
–1 1 0 –1 2 – 1
–1 0 1 –2 1 1
1 1
 CTC  5   = ------- • 1 –1 0  CTC  6   = --- • 1 –2 1
3 3
0 1 –1 1 1 –2
–1 1 0 –1 2 – 1
1 1
 CTC  7   = ------- • 0 –1 1  CTC  8   = --- • – 1 – 1 2
3 3
1 0 –1 2 –1 –1

Table 5.16 Compensation Matrices (Sheet 2 of 2)
0 1 –1 1 1 –2
1 1
 CTC  9   = ------- • – 1 0 – 1  CTC  10   = --- • – 2 1 1
3 3
1 –1 0 1 –2 1
1 0 –1 2 – 1 –1
1 1
 CTC  11   = ------- • – 1 1 0  CTC  12   = --- • – 1 2 – 1
3 3
0 –1 1 –1 –1 2
If 87mCTCn is set to 13, the compensation matrix for Terminal m is defined

using Equation 5.43.
 cos  87mANGn  cos  87mANGn + 120  cos  87mANGn – 120  

2 
87mMn = ---  cos  87mANGn – 120  cos  87mANGn  cos  87mANGn + 120  
3 
 cos  87mANGn + 120  cos  87mANGn – 120  cos  87mANGn  
Equation 5.43
The setting 87mANGn specifies the phase rotation produced by the compensa-
tion matrix and has a range of –179.99 to 180.00 degrees.
For example, setting 87SCTC1 = 13 and 87SANG1 = 15 degrees rotates a bal-
anced set of Terminal S currents counterclockwise by 15 degrees in an ABC sys-
tem. In an ACB system, the rotation is in the clockwise direction.
Upon your entry of an MVAn setting (i.e., MVA is not set to OFF), the relay uses
the MVA, terminal voltage, CT ratio, and CT connection settings you have
entered and calculates the TAP values automatically. You can also enter tap val-
ues directly. Set MVA = OFF, and enter the TAPS–TAPX values directly, along
with the other pertinent settings. The relay calculates TAP with the following
limitations:
➤ The TAP settings are within the range 0.1 • INOM and 35 • INOM
(INOM = 1 A or 5 A)
➤ The ratio of the highest (TAPm / INOMm) to the lowest (TAPm /
INOMm) is less than or equal to 35.
Winding compensation can also be applied for transverse differential protection
of generators with parallel branches, as shown in Figure 5.43. This scheme can
be used as an alternative to conventional split-phase schemes. In this application,
the compensation matrices act to balance the differential under normal operation.
W X SEL-400G W S T
CTC0 (0°) CTC0 (0°)
87 CTC4 (120°) 87
1 1
CTC6 (180°) CTC8 (240°)
Figure 5.43 Transverse Differential Protection of Parallel-Branch Stator

Windings

Table 5.17 Inrush Restraint Settings
E87Hn 87 Zone n Enable Harmonic Block OFF, B, BW, R, RW B Group

and Restraint
87COREn 87 Zone n XFMR Core Type, Three T, S T Group
or Single
E87UNBn 87 Zone n Enable Wave-Shape Y, N N Group
Inrush Unblocking
NOTE: If a transformer is within the
zone, 87PCT2n, 87PCT4n, and 87PCT2n 87 Zone n Second-Harmonic OFF, 5% to 100% OFF Group
87PCT5n must be set properly. Percentage
87PCT4n 87 Zone n Fourth-Harmonic OFF, 5% to 100% OFF Group
Percentage
87PCT5n 87 Zone n Fifth-Harmonic OFF, 5% to 100% OFF Group
Percentage
87TH5Dn 87 Zone n Fifth-Harmonic Alarm 0.0000 to 200 sec- 0.5 Group
Delay onds
87TH5Pn 87 Zone n Fifth-Harmonic Alarm OFF, 0.2–3.2 OFF Group
Threshold p.u.
E87Hn (87 Zone n Enable Harmonic Block and Restraint)

Each zone includes harmonic blocking and harmonic restraint functions. Select
the element most suited for your application. You can enable harmonic blocking
or harmonic restraint by selecting E87Hn = B or E87Hn = R, respectively. Both
can be enabled simultaneously by selecting E87Hn = B, R. In addition, either can
be employed with waveshape-based detection by selecting BW (versus B) or RW
(versus R). The harmonic-blocking element is generally faster, but because of
cross blocking, it has reduced dependability when energizing a faulted trans-
former. Harmonic restraint is generally slower but has improved dependability
when energizing a faulted transformer. Also, because the harmonics are summed,
harmonic restraint is more secure during inrush conditions if both 87PCT2n and
87PCT4n are set.
87COREn (Transformer Core Type, Three-Legged or Individual Cores)

The waveshape-based dwell-time algorithm for inrush detection must be adjusted
based on the transformer core type. 87COREn defaults to T for three-legged,
three-phase transformers. The setting 87COREn = S is for transformers made
with single-phase units or with a four- or five-legged core.
E87UNBn (Enable Waveshape Unblocking Logic)

The waveshape-unblocking logic provides sensitive detection of internal faults
and cancels the inrush blocking functions used by the phase-restrained and nega-
tive-sequence differential elements, improving element operation times for inter-
nal faults. Enable the unblocking logic by setting E87UNBn = Y.

Negative-Sequence Percentage-Restrained Differential Element
87PCT2n, 87PCT4n, 87PCT5n (Second-, Fourth-, and Fifth-Harmonic

Percentage of Fundamental)
NOTE: The larger the 87PCT2n, The SEL-400G measures the amount of second-, fourth-, and fifth-harmonic cur-
87PCT4n, or 87PCT5n, the smaller
the effect of the setting. rent flowing in the transformer. With older transformers, magnetizing inrush cur-
rent contains high percentages of second and fourth harmonics. However, some
types of newer transformers may require setting the threshold as low as 7 percent.
87TH5Pn, 87TH5Dn (Fifth-Harmonic Alarm Threshold and Delay)

When the volt/hertz function is unavailable, use the fifth-harmonic measurement
to assert an alarm output during startup. This alarm indicates current in excess of
the rated transformer excitation current. At full load, an 87TH5Pn setting of 0.1
corresponds to 10 percent of the fundamental current. Use Timer 87TH5Dn to
prevent the relay from indicating transient presence of fifth-harmonic currents.
You might consider triggering an event report if transformer excitation current
exceeds the fifth-harmonic threshold.
There are two criteria for setting 87TH5Pn:
87TH5Pn • TAPMIN  0.05 • INOM
87TH5Pn • TAPMAX  35 • INOM
where TAPMIN and TAPMAX are the least and greatest values, respectively, of the
tap settings.
Negative-Sequence Percentage-Restrained Differential

Element
During heavy load conditions, the resulting increase in restraint current renders
the phase-differential element less sensitive, particularly from detecting trans-
former winding interturn faults. Because negative-sequence currents are unaf-
fected by load in a balanced system, the negative-sequence percentage
differential element provides sensitive protection for transformer winding inter-
turn faults. This function is not effective for generator stator winding faults and is
disabled when E87XFRn = N.
Figure 5.44 shows the trajectory of a fault that shorts out 2 percent of the
A-Phase winding of a three-phase transformer. In the phase-differential operation
portion of Figure 5.44, the transformer is fully loaded, and the phase-differential
relay operates when the operate current reaches around 0.43 per unit. Figure 5.44
also shows the negative-sequence differential element response for the same
fault. Because balanced load does not affect negative-sequence current, the nega-
tive-sequence element operates when the operate current reaches 0.3 per unit.

Phase-Differential Operation Negative-Sequence Differential Operation

1.0 0.75
Operate Current (per unit)

0.8 0.60
Operate Current (per unit)
5% 5%
0.6 =2 0.45 =2
pe pe
slo slo
0.4 87QP 0.30
087P 0.3
0.2 0.15
0.1
0.5 1.0 1.5 2.0 2.5 3.0 0.2 0.4 0.6 0.8 1.0 1.2
Restraint Current (per unit) Restraint Current (per unit)
Figure 5.44 Differential Operations
The relay uses filtered compensated currents (see Figure 5.45) and Equation 5.44
to calculate the negative-sequence currents for each terminal included in the dif-
ferential element (ABC phase rotation) when you have enabled the element
through the E87Q setting. The element calculates the negative-sequence operat-
ing and restraint current as shown in Equation 5.45 and Equation 5.46, respec-
tively.
NOTE: The 87Q element currents
are set in per unit of the 87nAPm 87AmFn
values (see Figure 5.16).
87QmFn = 1 a 2 a • 87BmFn
87CmFn
Equation 5.44
where:
a = ej120
a2 = ej240
87QOPFn = 87QmFn
Equation 5.45
87QRTFn = max  87QmFn 

Equation 5.46
Figure 5.45 shows the logic that forms the negative-sequence differential ele-
NOTE: CON is the OR combination of
CONAn, CONBn, CONCn (see ment. In the figure, the relay calculates the operating current in a similar manner
Figure 5.20). to that of the phase-restrained differential element. However, the restraint current
is the maximum of the negative-sequence currents among the terminals that are
part of the differential calculations. After evaluating the operating and restraint
currents in the differential element, the relay verifies that torque-control
(87QTCn) is asserted. This SELOGIC variable has a default value of NOT CONn
and NOT 87QBn. The default assignment checks that the fault is internal and that
the negative-sequence blocking logic is deasserted. (see Figure 5.46).

87QP
(Setting)
87QSFn
Operating
Quantity
87QDn
87QTFn 87QOPFn 0
87Qn
0 1
Negative-Sequence
87QYFn Differential Element
f(87QSLPn)
|87QSFn| Restraint
Quantity
|87QTFn| 87QRTFn
max (|87QSFn| . . . |87QYFn|)
|87QYFn|
87QTCn
87UBLn
Figure 5.45 Negative-Sequence Percentage-Restrained Differential Element
As shown in Figure 5.45, if you have enabled the unblocking logic and 87UBLn
asserts, the relay bypasses the 87QDn timer, allowing the negative-sequence dif-
ferential element to operate faster.
87UBLn
E87Qn = Y or E
87XB2n 87QBn
E87Qn = E
87WBn
87B5n
Figure 5.46 Negative-Sequence Differential-Element Blocking Logic
The negative-sequence differential element blocking logic illustrated in

Figure 5.46 secures the element during inrush or overexcitation conditions.
Enable or disable the inrush security checks via the negative-sequence differen-
tial element enable setting (E87Qn). If you have selected harmonic-based inrush
security by setting E87Qn = Y or E, an assertion of the second- and fourth-har-
monic cross-blocking logic, 87XB2n, (see Figure 5.26) asserts 87QBn and
blocks the element. If you have also enabled waveshape-based inrush security by
setting E87Qn = E, an assertion of the waveshape inrush blocking logic, 87WBn,
(see Figure 5.31) asserts 87QBn and blocks the element. If you have enabled the
unblocking logic and 87UBLn asserts (see Figure 5.36), indicating detection of
an internal fault, the relay cancels the inrush blocking of both the harmonic- and
waveshape-based methods. If the fifth-harmonic overexcitation cross-blocking
logic (87B5n) asserts, 87QBn asserts and blocks the element.
E87Qn Enable Negative-Sequence Differential Element

The E87Qn setting enables the negative-sequence differential element, and the
setting option controls the method of inrush security. Set E87Qn = Y to provide
inrush blocking that uses only the harmonic-based method. Set E87Qn = E to
provide inrush blocking from either the harmonic- or waveshape-based methods.

Restricted Earth Fault Element
87QPn Negative-Sequence Differential-Element Operating Current

Pickup
Set the negative-sequence differential element to improve sensitivity to internal
transformer winding turn-to-turn faults during heavy load conditions. 87QPn is
the negative-sequence pickup threshold of the element, and is set in per unit of
the 87nTAPm values.
87QSLPn Negative-Sequence Differential Slope

The 87QSLPn setting defines the slope of the negative-sequence differential ele-
ment. Unlike the phase-restrained differential elements, there is only one slope to
set because the negative-sequence element is blocked if an external fault is
detected (when the CONn Relay Word bit asserts).
87QDn Negative-Sequence Differential-Element Delay

The output of the negative-sequence differential element can be delayed for
added security. Set the negative-sequence differential element 87QDCn delay to
the recommended delay of 0.2 seconds.
87QTCn Negative-Sequence Differential-Element Torque Control

SELOGIC control equation 87QTCn provides a method to externally control the
enabling of the 87Q pickup. The default setting is recommended in Figure 5.46.

This function is used to provide selective ground fault protection for a low-
impedance grounded generator or for the wye winding of a transformer. In either
application, the phase-differential element may only detect faults on the upper
portion of the winding. The REF scheme can provide better coverage for faults
near the neutral. Historically, two operating principles have been applied for
selective ground fault protection: ground differential and REF. The ground differ-
ential as implemented in a digital relay is challenged because it will be a low-
impedance implementation and could misoperate for CT saturation for a close-in
phase-to-phase or three-phase fault. The operating signal of the REF scheme is
derived from a CT in the ground connection of the generator or transformer.
Therefore, it picks up only in the case of a true ground fault. Operation of the
REF scheme is supervised by a zero-sequence directional check. The directional
check is more tolerant of CT errors as compared to a conventional zero-sequence
differential scheme. However, the REF scheme needs additional logic to ensure
that it operates in the case that there is no current for the directional check. This
could happen for example, if a ground fault occurs on a generator that is ener-
gized but not yet connected to the system.
Figure 5.47 shows the characteristic of the REF element, with the shaded area
indicating the tripping area. The operating current is derived from a single-phase
input connected to a CT in the ground connection of the generator or transformer.
The SEL-400G uses a Y current input as the operating current for an REF ele-
ment. The reference current is derived from a set of three phase currents (S, T, or
U) or another Y input.

REFRF1
31OSF Scaling Operating

Current
310TF Scaling Reference
Current
Internal Fault
Reference
31OUF Scaling Area
Current
(Forward Fault)
IY2F Scaling External Fault
Area
(Reverse
IY3F Scaling Fault)
Operating
Current
Scaling
IY1F
Figure 5.47 REF Directional Element
Because the REF element employs a neutral CT at neutral end of the winding and
a set of three CTs at the HV end of the winding, REF protection can detect only
ground faults within that particular generator or wye-connected transformer
winding. The element is restricted in the sense that protection is limited to ground
faults within a zone defined by neutral and reference CT placement.
The REF element uses comparison of zero-sequence currents, so the reference
CTs must be connected in wye for the element to function. Delta-connected CTs
cancel out all zero-sequence components of the currents, eliminating one of the
quantities the REF element needs for comparison.
To enable an REF element, Terminal Y must be configured as three single-phase
current inputs (CTCONY := 1PH). In this case, IAY, IBY, and ICY are unavail-
able and IY1, IY2, and IY3 are available. Figure 5.48 shows the 24 analog inputs
of the SEL-400G.
S Terminal T Terminal U Terminal V Terminal
IAS IBS ICS IAT IBT ICT IAU IBU ICU VAV VBV VCV
W Terminal X Terminal Y Terminal Z Terminal
(IY1) (IY2) (IY3)
REF Single-Phase Input

Terminals
Figure 5.48 REF Terminals
Table 5.18 shows the relationships among the input currents of the Y terminal
and the REF elements. These relationships are not settable; they are fixed and
must be observed when you use the REF function. For example, if you select
REF 1 for your application, wire the input current from the neutral CT to IY1.

Table 5.18 Relationships Among Input Currents and REF Elements
Input Current REF Element
IY1 REF Element 1

IY2 REF Element 2
IY3 REF Element 3
The reference current is defined using the REFR1n setting. This setting allows
for several possible configurations of the REF element. Figure 5.49 shows two
examples. In Figure 5.49(A), the REF1 is applied to a low-impedance-grounded
generator. At the its terminals, the generator is equipped with a core balance CT
that is connected to the Y2 input and used as the reference current for the scheme.
In Figure 5.49(B), a transformer is feeding a ring bus through two breakers.
REF3 provides REF protection. The currents from each breaker are connected to
the S and T inputs where they are summated and used as the reference current.
REFRF1 := Y2 REFRF3 := S, T
Y2 S
Y1 Y3
(A) (B)
Figure 5.49 Reference Current Configuration Examples
Figure 5.50 shows the REF 1 element logic diagram (REF 2 and REF 3 have sim-
ilar diagrams) that produces the REF enable output.
1 IOREFM1 C1
IY1FM
INOMY1
10 s REFOCT1
30 s
REF 1 element
C2 enabled
REF50G1 0.8
IRREFM1
q
TCREF1
q See Figure 5.51.
Figure 5.50 REF 1 Element Enable Logic
IY1FM is the magnitude of the input current from the neutral CT connected to
Terminal IY1.
Comparator C1 compares the normalized IY1FM value against the REF50G1
Group setting and asserts if the measured quantity exceeds the threshold. Com-
parator C2 compares 0.8 of the REF50G1 setting value against the magnitude of
the reference current. The 0.8 multiplier secures the operation of the REFF1 ele-
ment. This ensures that the nondirectional output (NDREF1) does not assert for
an external fault (see Figure 5.52).

The output of the comparators, together with the torque-control equation

TCREF1, enables the REF 1 element, which supervises the directional calcula-
tions (see Figure 5.51). Note that the REF 1 enable declaration is also secured
against an open circuit or a setting error (REF50G) via REFOCT1.
Figure 5.51 shows the logic that performs the directional calculations.
REFRF1 contains m
or a
1
0
2 Sm 3I0mFN1 1 IRREF1
3IOmF CTRm CTRY1 • INOMY1
MAG IRREFM1
m = S, T, U
a = 2, 3
1
0
2 Sa IpYFN1
IaYF CTRYa
1 IOREF1 Re(IRREF1 • (IOREF1*)) REFTQ1

IY1F
INOMY1
REFRF1 contains m
* = Conjugate
1
0
2 Sm 1 IQREF1
3I2mF CTRm CTRY1 • INOMY1
MAG IQREFM1
REF 1 Enabled
from q
q Figure 5.50.
Figure 5.51 Algorithm That Performs the Directional Calculations
Switch S (S, T, U, 2, 3) selects the zero-sequence and negative-sequence vector

currents from those CTs that are part of the REF calculations, as determined by
Group setting REFRF1, where m = S, T, U, and a = 2, 3 for REF1. For a single-
wye winding, the logic requires one neutral CT and one set of line CTs for the
REF function. If this set of line CTs is from Terminal S, then Switch SS is in
Position 2, while all other cells of Switch S remain in Position 1. Current inputs
from those terminals in Position 1 are not included in any REF element calcula-
tions.
Next, the currents are converted to primary values by multiplying each current by
the appropriate CT ratio. The relay then sums these currents vectorially to pro-
duce the reference current. To bring this value to the same base as the neutral CT,
the algorithm divides the reference current by the product of the CT ratio and the
neutral CT nominal current. These calculations produce the reference current,
IRREF1. IY1F is normalized to produce the operating current, IOREF1, in vector
form.
When REF 1 enabled asserts, the relay enables the directional calculations. To
determine the direction, the algorithm calculates the real part of the product of
the reference quantity and the conjugate of the operating quantity. This calcula-
tion yields the signed torque quantity REFTQ1 (this calculation is equivalent to
the product of |IOPR1|, |IREFR1|, and the cosine of the angle between them).
REFTQ1 is positive if the angle is within ±90 degrees, indicating a forward or
internal fault. Otherwise, REFTQ1 is negative, indicating a reverse or external
fault.
Figure 5.52 shows the REF output logic.

IRREFP1
NDREF1
IONRFP1 30
ms REFF1
TCREF1 0 REF
REFF2
IQREFM1
2.5 ms REFF3
REF50G1 REFBLK1
1s
0.10 REF 1 Enabled
MAX (IOREFM1, from q
IRREFM1)
2.5 ms
REFTQ1
1s
THRES1
–1 REFR1
REFTQ1
q Figure 5.50.
Figure 5.52 REF Element Trip Output
REF schemes are generally susceptible to external LLG faults that produce CT
saturation. Therefore, the scheme is supervised if the negative-sequence current
is greater than the pickup REF50G1 and also more than 10 times greater than
either I0REFM1 or IRREFM1.
If there is current flow at the terminals of the protected device (generator or trans-
former), the REF forward asserts when REFTQ1 is greater than THRES1 and
REF reverse asserts when REFTQ1 is less than THRES1. THRES1 is an adaptive
threshold that ensures security for very small currents or for an angle near +90 or
–90 degrees. A forward fault is declared when the element is enabled (see
Figure 5.50) and is not blocked by REFBLK1.
The logic declares a forward (internal) fault via the nondirectional path, NDREF1,
for the condition that current flows in the neutral (IONRFP1 asserts) but no cur-
rent flows at the terminals of the generator or transformer (IRREFP1 is deas-
serted) and the torque equation (TCREF1) is satisfied. Use TCREF1 to further
qualify the nondirectional output by checking, for example, the status of a
breaker.
Figure 5.53 shows the need for the nondirectional tripping path. A directional
check requires both an operating signal and a reference signal. If Fault F1 occurs
with the breaker open, no current flows through the breaker CT, and there is no
reference quantity present.
HV LV
52 52
F1
Figure 5.53 Internal Fault With LV Breaker Open
For fast tripping, include REFF1, the output of the REF element, into one or
more of the trip equations (Group settings TRk) as appropriate. If you want addi-
tional security, use the programmable 51 element in Figure 5.54 to delay trip-
ping. In Figure 5.54, the overcurrent element uses the neutral current (IY1FM) as

an input quantity. To avoid inadvertent tripping for external faults, use REFF1
(see Figure 5.52) in the torque-control equation (RF51TC1) of the overcurrent
element.
(Operating Quantity)
IY1FM
REF51P1 REF51T1
(Setting)
REF51C1
(Setting) Programmable
Time-Overcurrent REF511
RF51TD1 Element (51)
(Setting)
RF51RS1
(Setting) REF51R1
REFF1
(Setting)
Figure 5.54 Programmable 51 REF Element
Neutral Element
For applications such as frame leakage protection or sustained ground fault pro-
tection, the REF element includes a definite-time overcurrent (50) element.
Figure 5.55 shows the REF50 element, with neutral current IY1FM as an input
quantity. If IY1FM exceeds the REF50P1 setting, REF501 asserts and starts the
REF Definite-Time Timer. If IY1FM exceeds the REF50P1 setting for a period
exceeding the REF50D1 timer setting, REF50T1 asserts. Disable this element by
setting REF50P1 = OFF.
NOTE: Identify which of the current
inputs the relay processes, excluding REF
the three REF (IY1, IY2, IY3) channels. Definite-
Although you may have already set Time Timer
ECTTERM while establishing IY1FM REF50D1
differential protection, the setting REF50P1 REF50T1
appears here as a reminder that the (Setting) 0
relay only accepts enabled terminals
as reference quantities for the REF REF50P1 = OFF REF501
(Setting)
element.
Figure 5.55 REF Neutral Element
Applications and Setting Descriptions

Table 5.19 Restricted Earth Fault Element Settings
EREF Enable REF Element OFF or combo of Y1, Y2, Y3 OFF Group
REFRFna Rest Qty REF n OFF or combo of S, T, U, Y1, Y2, Y3 OFF Group
REF50Gna Residual Current Sensitivity Pickup 0.05–3 (per unit) 0.25 Group
a
TCREFn Torque Control REF Element n SV 1 Group
a
REF50Pn REF Op. Current Inst O/C n Pickup OFF, 0.25–100 (A sec) OFF Group
a
REF50Dn REF Inst O/C n Delay 0.0000–400 (s) 0.2 Group
a
RF50TCn REF Inst O/C n Torque Cont SV 1 Group
a
REF51Pn REF Inv. Time O/C n PU OFF, 0.25–16 (A sec) OFF Group
a
REF51Cn REF Inv. Time O/C n Curve U1–U5, C1–C5 U1 Group
RF51TDna REF Inv. Time O/C n Time Dial 0.50–15 0.5 Group
a
RF51RSn REF Inv. Time O/C n EM Reset Y, N N Group
a
RF51TCn REF Inv. Time O/C n Torque Cont SV 1 Group
a n = 1–3.

REF Directional Element Enable (EREF)

Use the EREF setting to enable the number of REF elements appropriate for the
application. Setting EREF = N disables all REF elements, but not the neutral ele-
ment. There are no neutral input current/REF element assignment settings: the
relationships are fixed as in Table 5.18.
Therefore, when you set EREF = 1, the REF element evaluates only an input con-
nected to Terminal IY1; the element ignores inputs connected to IY2 and IY3.
Restraint (Reference) Quantity (REFRFn)

Setting REFRFn (n = 1–3) identifies the terminal or combination of terminals the
REF element must include when it calculates the reference current (closing the
cells of Switch S in Figure 5.50 and Figure 5.51).
Residual Current Sensitivity Threshold (REF50Gn)

You can set the residual current sensitivity threshold to as low as 0.05 times nom-
inal current (0.25 A for 5 A nominal CT current), the minimum residual current
sensitivity of the relay. However, the minimum acceptable value of REF50Gn
must be greater than any natural 3I0 unbalance resulting from load conditions.
REF Torque Control (TCREFn)

SELOGIC control equation TCREFn provides a method to externally control the
enabling of the directional calculations (see Figure 5.50).
REF Neutral Element Instantaneous Overcurrent Pickup (REF50Pn)

REF50Pn is the instantaneous overcurrent pickup setting for the neutral element
(see Figure 5.55).
REF Neutral Element Overcurrent Time Delay (REF50Dn)

REF50Dn is the time-delay setting for the instantaneous overcurrent element of
the neutral element (see Figure 5.55).
REF Neutral Element Overcurrent Torque Control (RF50TCn)

RF50TCn is the torque-control setting for the instantaneous neutral overcurrent
element (see Figure 5.54).
REF TOC (51) Pickup (Plug) (REF51Pn)

REF51Pn is the time-overcurrent pickup (plug) setting for the programmable 51
element (see Figure 5.54).
REF TOC (51) Curve (REF51Cn)

REF51Cn is the time-overcurrent curve selection setting for the programmable
51 element (see Figure 5.54).

REF TOC (51) Time Dial (RF51TDn)

RF51TDn is the time-dial (time multiplier) setting for the programmable 51 ele-
ment (see Figure 5.54).
REF TOC (51) Electromechanical Reset (RF51RSn)

RF51RSn is the time-dial (time multiplier) electromechanical reset setting for the
programmable 51 element (see Figure 5.54).
REF TOC (51) Torque Control (RF51TCn)

RF51TCn is the torque-control setting for the programmable 51 element
(see Figure 5.54).
Selection of the Restraint Quantity

The operating quantity/reference quantity relationship is defined by the relay set-
tings (rather than a fixed relationship in hardware), so you can apply the REF ele-
ments to any primary plant configuration with the correct CT arrangement. In
general, identify all terminals that are electrically connected to the grounded
winding that you want to protect with the REF element. Then enter those termi-
nals at the REFRFn setting. The following are examples of a few applications.
Figure 5.56 shows a low-impedance-grounded generator with a three-phase CT
at the generator terminals. Set EREF = Y1 to enable this REF element (this set-
ting dictates that we connect the neutral CT to Terminal IY1) and set
REFRF1 = S.
52
S
EREF Y1
ES
C EN
T
G
SEL-400G REFRF1 S
Y1
Terminal Y—REF 1
(Neutral CT)
Figure 5.56 Low-Impedance-Grounded Generator With a Three-Phase

Reference CT
Figure 5.57 shows a low-impedance-grounded generator connected to the system

by using a high-voltage cable. A core-balance CT is located at the power cable
system-side termination. Set EREF = Y1 to enable this REF element and set
REFRF1 = Y2 to provide a reference current by using the Y2 terminal. Note that
if the core balance CT is located below the cable termination, the sheath ground
must be routed through the CT. Otherwise, the zero-sequence current will be can-
celed by the sheath current and there will be no output from the CT during a fault.

Power
Cable
Y2
EREF Y1
ES
C EN
T
G
SEL-400G REFRF1 Y2
Y1
Figure 5.57 Low-Impedance-Grounded Generator With a Core-Balance

Reference CT
Figure 5.58 shows an ungrounded LV winding and a grounded-wye HV winding.

Set EREF = Y2 to enable one REF element (this setting dictates that we connect
the neutral CT to Terminal IY2). Terminal T electrically connects to the winding
earmarked for REF protection. Therefore, set REFRF2 = T.
LV HV
52 EREF Y2
T 3
52 REFRF2 T
ES
C EN
T
SEL-400G
Y2
1
Figure 5.58 Single-Wye Winding Transformer REF
Figure 5.59 also shows an autotransformer, but in this application, the HV side
has two CTs (breaker-and-a-half application). Set EREF = Y1 to enable one REF
element (this setting dictates that we use IY1). In this case, Terminal S,
Terminal T, and Terminal U connect electrically to the winding earmarked for
REF protection. Therefore, set REFRF1 = S, T, U.
52
52
3 3 EREF Y1
3 1 REFRF2 S, T, U
(Neutral CT) U T
Y1
ES
C T
EN
S SEL-400G
Figure 5.59 Autotransformer REF With Two-HV CTs

Setting Guidelines for Low-Impedance-Grounded Generators

The available ground fault current is a function the grounding resistor size and
the fault location. Grounding resistors are often specified in terms of available
current, for example 200 or 400 primary amperes. Figure 5.60 shows the simula-
tion results for a ground fault on a generator that is grounded through a 400 A
resistor. The simulation ran for a two different MVA ratings. Note that the varia-
tion of the current with fault location is approximately linear when the fault is
closer to the neutral. In this example, the fault current at 10 percent of the wind-
ing is approximately 10 percent of 400 A, or 40 A.
5 MVA Generator
400
200 MVA Generator
320
Neutral Current (A) 240
160
80
0
0 10 20 30 40 50 60 70 80 90 100
Fault Location Measured From the Neutral (%)
Figure 5.60 Ground Fault Simulation for a Low-Impedance-Grounded (400 A)
Generator
The example of Figure 5.61 shows two identical low-impedance-grounded gener-

ators connected to the same bus and with the same sized neutral grounding resis-
tors. With an internal ground fault on G1 at an arbitrary location, the neutral
currents, I1 and I2 have the same value. Therefore, coordination using simple
overcurrent elements is problematic. In contrast, the REF scheme provides selec-
tivity by checking the direction between the current at the neutral and at the ter-
minals.
G1 REF
Irated = 800 A G2
R1
Irated= 200 A
I2
I1
CTN
50:5
Figure 5.61 Low-Impedance-Grounded Generator Example
The REF element picks up when the generator neutral current exceeds the pickup
setting. This setting is scaled to the nominal secondary neutral current. For the
example shown in Figure 5.61, assume that R1 is sized to provide 200 A of fault
current, the neutral CT (CT1N) has a ratio of 50:5, and a coverage of 90 percent
of the winding is desired. The required pickup setting would be:
5 1
Pickup = 10% • 200 • ------ • --- = 0.4
50 5

One Hundred Percent Stator Ground Elements
Performance for Steady-State CT Errors

The security provided by the REF element is very good because the operating
signal is derived from the generator neutral current. The element cannot pickup
unless there is a true ground fault. However, the directional check uses the gener-
ator terminal current, which is typically measured by a three-phase set of CTs
that are sized for the rated current of the generator. The relay calculates 3I0 from
these CTs, and CT errors will create a steady-state 3I0 error. If this error is signif-
icant in the relation to the fault current magnitude, then the element could pick up
for an external ground fault. Setting the pickup greater than the worst-case 3I0
error ensures secure operation.
In the previous example, at full load, assume that the measured worst-case 3I0 at
the generator terminals is 5 percent or 40 amperes primary. For secure operation,
the pickup should be:
5 1
Pickup = 40 • ------ • --- = 0.8
50 5
With a 200-ampere resistor, this translates to a coverage of
100% • (200 – 40) / 200 = 80% of the winding. You could still choose the 90 per-
cent coverage setting. The element will not operate unless there is a ground fault
but, in this case, a fault between 10–20 percent of G2 could cause both machines
to trip.

Use this element to detect ground faults on the stator of unit-connected, high-
impedance grounded machines. Application of a combination of the elements
shown in Figure 5.62 achieves 100 percent coverage of the stator winding.
Table 5.20 Stator Ground Element Setting
E64G Enable 64G Protection Combination of G1, G1, G3 Group

G2, G3, OFF
Use the E64Gn setting to enable a combination of the elements shown. If the
relay is used to protect a low impedance grounded machine, these elements are
not effective and should be disabled.
The outputs from the various functions are combined in the 64G output logic.
The output logic incorporates an acceleration path and integrating timer to
achieve dependable operation for stator grounds while remaining secure for
external events (see 64G Output Logic on page 5.70).

SEL-2664S
Coverage
64G1
64G2
64G3
64S
Z2 or V2 0% 50% 100% Z
64 64 64 64 64
S1 S2 G1 G2 G3
Figure 5.62 One Hundred Percent Stator Ground Element
Fundamental Neutral Overvoltage (64G1)

The 64G1 is an overvoltage element responding to the magnitude of the funda-
mental frequency component of the voltage measured at the generator neutral.
Under normal operation, this voltage will be approximately zero. When a ground
fault occurs in the winding of a high-impedance grounded generator, a funda-
mental frequency voltage appears at the generator neutral. The neutral voltage
magnitude during the fault is proportional to the fault location within the winding
measured from the generator neutral towards the terminals.
There are two 64G1 elements, each with its own pickup, delay and torque-control
settings. Figure 5.63 shows the 64G1 logic. The 64G1Pn setting defines the
pickup sensitivity of the element. Setting 64G1Pn to OFF disables the level. The
64G1Dn setting defines the element time delay. The 64G1TCn torque-control
setting disables the element when its result is logical 0. This setting can normally
be left at its default value of 1. The 64G1 and 64G1T Relay Word bits are com-
bined with the other stator ground protection functions in the 64G output logic.
Relay
Word
Bits
SELOGIC
64G1n
64G1TCn Setting
VNFM
64G1Dn
Setting 64G1Tn
64G1Pn
0
64G1Pn = OFF
64G11
64G1
64G12
64G1T1
n = 1, 2 64G1T
64G1T2
Figure 5.63 64G1 Element Logic

Setting Guidelines for the Fundamental Neutral Overvoltage Function

Table 5.21 Fundamental Neutral Overvoltage Settings

a
64G1Pn Neutral O/V Level n Pickup 0.0–150.0 volts sec., OFF Group
OFF
64G1Dna Neutral O/V Level n Time Delay 0.00–400.00 seconds 1 Group
a
64G1TCn Neutral O/V Level n Torque SELOGIC variable 1 Group
Control (SV)
a n = 1, 2.
The example system in Figure 5.64 illustrates setting calculations for the 64G1,
64G2, and 64G3.
VGPP = 20.0 kV
m
XC0 = –j6.6 k
PTRZ = 174
PTRN = 87 ZVT = (3989 + 9883j) primary
(1 – m ) • VGPN VN 64G1
RN = 2.2 k primary
Figure 5.64 Example System for Setting of the 64G Element
We assume the goal to provide coverage of 95 percent of the winding (m = 0.95).

The voltage measured by the 64G1 will be:
 1 – m  • VG PP  1 – 0.95  • 20.0 kV
64G1P1 = ---------------------------------------- = -------------------------------------------------- = 6.7 V
PTRN 3 • 87
The setting for 64G1D1 should be long enough to secure the element for GSU
HV faults and VT secondary ground faults. Note that the 64G output logic sec-
tion provides dependable accelerated tripping for all of the 64G functions (see
64G Output Logic on page 5.70).
Third-Harmonic Voltage Elements (64G2 and 64G3)

These elements use the third-harmonic voltage produced by the generator to
detect ground faults near the generator neutral. The third-harmonic behaves like a
zero-sequence component and produces third-harmonic voltage drops at the ter-
minals and the neutral. If the generator terminal VT is connected as shown in
Figure 5.65 and PTCONZ = Y, the relay can calculate the third-harmonic voltage
drop at the terminals.

V3
V3
V3
Third Third
Harmonic Harmonic
Voltage VAZ3F VBZ3F VCZ3F Voltage
VV23F Drop Drop
Figure 5.65 Third-Harmonic Voltage Distribution (PTCONZ = Y)
If the generator terminal VT is connected as shown in Figure 5.66 and

PTCONZ = D1, the relay can also directly measure the third-harmonic voltage
drop at the terminals by using this connection.
V3
V3
V3
VV23F Third Third

Harmonic Harmonic
Voltage VZ23F Voltage
Drop Drop
Figure 5.66 Third-Harmonic Voltage Distribution (PTCONZ = D1)
If the generator terminal PT is not connected as shown in Figure 5.65 or

Figure 5.66, the third-harmonic voltage drop at the terminals cannot be calcu-
lated or measured.
NOTE: In general, third-harmonic The SEL-400G calculates the following third-harmonic quantities. VN3F is cor-
schemes that use the third-harmonic
voltage drops at both the generator rected for mismatch between the generator terminal and neutral VTs. The total
terminals and the neutral are more third-harmonic produced by the machine (VG3) is a vector sum. Therefore, to
secure and easier to set.
measure VG3F, the generator neutral voltage measurement must be connected as
shown in Figure 5.65 and Figure 5.66.
VN3F = VV23F
3V0Z3F = VAZ3F + VBZ3F + VCZ3F for PTCONZ = Y
3V0Z3F = VZ23F for PTCONZ = D1
3V03ZF PTRZ
VG3F = --------------------- • ------------------- + VN3F
3 PTRV2
PTRZ
PTR COMP = ----------------------------------
 3 • PTRV2 
NOTE: IF PTCONZ = D, VG3 is forced The SEL-400G carries out an angle check, as shown in Figure 5.67, to confirm
to zero. Similarly, if EGNPT = OFF, VN3
is forced to zero. the correct wiring.

3V0Z3M
0.5 V
VN3FM
Setting
0.5 s
64GANCH 64GAAL
3V0Z3A 0
+
–
VN3FA
Setting
64GANCL
Figure 5.67 Third-Harmonic Angle Check
The default values of 64ANCL and 64ANCH are 45 and –135 degrees.
Typically, a generator produces varying amounts of third-harmonic voltage,
depending on machine construction and loading. Note that the third-harmonic
characteristics of generators have been observed to change over time.
Figure 5.68(A) shows the typical variation in the third-harmonic voltage magni-
tude on a healthy machine. Figure 5.68(B) shows how the voltage distributions
shifts because of a fault. A fault at the neutral reduces VN3FM to zero and
increases 3V0Z3M. A fault at the terminals reduces 3V0Z3M to zero and
increases VN3FM. There is a point near the center of the winding (o) in
Figure 5.68 where a fault produces no shift in the third-harmonic distribution.
VN3FM 3V0Z3M VN3FM 3V0Z3M
al
ad neutr
l Lo u lt a t the m
Ful Fa at
Fault
ad a ult
No Lo N o F
m
0 Volts
0 Volts
als
termin
a u lt at the
o F
0.0 Winding position measured from 1.0 0.0 Winding position measured from 1.0
neutral (per-unit) neutral (per-unit)
(A) Third Harmonic Variation Because of Loading (B) Third Harmonic Variation Because of a Fault
Figure 5.68 Typical Third-Harmonic Voltage Distribution in a Generator
Third-Harmonic Operating Principles

The SEL-400G provides two third-harmonic voltage elements; each using a dif-
ferent operating principle. Either scheme can provide protective coverage for the
bottom portion of the winding. In general, the 64G2 provides greater coverage
but requires a third-harmonic survey to ensure that the element is secure under all
operating conditions. The 64G3 provides less coverage but does not require a sur-
vey. The following figure compares the resistive coverage of the 64G2 (differen-
tial mode) and the 64G3 for a typical application.

NOTE: In contrast with the

SEL-300G and SEL-700G, the 64G2 Stator Ground Protection Schemes
element of the SEL-400G does not 2000
provide coverage at the generator 64G1
terminals. This change improves 1800
security. When combined with the
64G2
64G1, 100 percent coverage is 1600 64G3
achieved.
1400
Fault Resistance ()

1200
1000
800
600
400
200
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Fault Location (pu of stator winding)
Figure 5.69 Typical Coverage Provided by the 64G1, 64G2 (Differential Mode),
and 64G3 Elements
Third-Harmonic Alternate Settings

In some applications, the third-harmonic distribution may undergo significant
changes during generator operation. For example, if the generator has a breaker
on the low-voltage side of the GSU, the capacitance at the generator terminals
can increase significantly when the breaker is closed. The SEL-400G provides
two pickup and two ratio settings for the 64G2 element and two pickup settings
for the 64G3 element. The element/function dynamically switches between these
settings based on the 64GALT setting. This allows optimal settings to be applied.
52
SEL-400G
64
G2
64GALT
64
G3
Figure 5.70 Using Breaker Position to Switch to Alternate Settings
Table 5.22 Third-Harmonic Alternate Switch Settings
64GALT 64G Alternate Setting SELOGIC variable OFF Group
64G2 Third-Harmonic Element

The 64G2 element can operate as a neutral third-harmonic differential when the
SEL-400G is connected as shown in Figure 5.65 or Figure 5.66. Note that PTCONZ
must be set to Y or D1. If PTCONZ = D, then 64G2 switches to undervoltage mode.

64G2 Third-Harmonic Differential Mode

In differential mode, this element operates on the premise that VG3F changes
during normal generator operation. The difference between the 3V0Z3F and
VN3F magnitudes is defined by the shunt network impedances (see Figure 5.65
and Figure 5.66) and therefore, this ratio does not change substantially.
Figure 5.71 shows the logic.
Referring to Figure 5.71, the value V3DIF is given as:
V3DIF = PTR COMP • 3V0Z3M • 64G2Rp – VN3FM
where p is 1 or 2 and refers to the normal and alternate settings
Relay
Word
Bits
VG3FM
64G2DEN
PTRCOMP • 3V0Z3M
Settings X
0
64G2R1
64G2R2 +
1 V3DIF
64G2DIF
VN3FM –
Settings
64G2P1
0
64G2P2
1
SELOGIC
64GALT
Figure 5.71 64G2 Third-Harmonic Voltage Differential Logic
The 64G2Rp setting is calculated to minimize V3DIF over the operating range of
the generator. The 64G2Pp setting determines the sensitivity of the element. This
setting should be set with margin greater than the largest value of V3DIF over the
operating range of the generator after 64G2Rp has been selected.
Setting Guidelines for the 64G2 Third-Harmonic Element

(Differential Mode)
Table 5.23 64G2 Third-Harmonic Element Settings
64G2Ppa 64G2 Voltage Pickup p OFF, 0.1–150 2 Group

a
64G2Rp 64G2 Ratio Correction p 0.10–10 1 Group
64GALT 64G Alternate Setting SELOGIC variable NA Group
64G2D 64G2 Element Delay 0.000–400 s 1 Group
64GPMN 64G2 Minimum Power OFF, 0–2000 VA sec OFF Group
64GPMX 64G2 Maximum Power OFF, 0–2000 VA sec OFF Group
64G2TC 64G2 Element Torque Control SELOGIC variable 1 Group
a
p = 1, 2.
Because of the variations in the third harmonic, SEL recommends that you carry
out a survey of VN3F and 3V0Z3F while the generator MW and MVAR output
varies. Use the relay METER command to record the measured third-harmonic
voltages, then calculate the settings. At a minimum, these measurements must be

taken at no-load and full-load conditions. SEL recommends that measurements

be taken at several intermediate loads as well to ensure that the data include the
full range of variation of third-harmonic voltage.
For a detailed explanation of the procedure for setting the element by using the
third-harmonic measurements at several load outputs, see the SEL application
guide Setting the 64G1 and 64G2 Elements in SEL Generator Protection Relays
(AG2005-08) on the SEL website.
64G2 Third-Harmonic Undervoltage Mode

The 64G2 can be applied as a neutral third-harmonic undervoltage element. The
element automatically switches to undervoltage operation if PTCONZ = D.
When in undervoltage mode the 64G2Pp setting defines the minimum magnitude
of VN3F for pickup.
Undervoltage mode is blocked if the positive-sequence voltage is less than 0.8 of
VNOM / 3. It can also be further supervised over a selectable window of for-
ward real power, as shown in Figure 5.73.
The 64G2PMN and 64G2PMX settings define a window of forward power
within which the 64G2 undervoltage element is blocked. If the 64GPMN setting
is OFF, then blocking occurs when power is less than the 64GPMX setting. If the
64G2PMX setting is OFF, then blocking occurs when power is greater than the
64G2PMN setting. If both settings are OFF, then power supervision is disabled.
The 64G2UEN Relay Word bit provides an indication that the element is avail-
able to operate if a ground fault occurs.
PF = 0.90 PF = 0.95
PF = 0.85
6
64G2PMN
64G2PMX
Neutral Third-Harmonic Voltage (V sec)
64G2UEN 64G2UEN
Asserted Asserted
4
PF = 1.00
PF = –0.85
2
PF = –0.90
PF = –0.95
64G2Pp
40 80 120 160
Real Power (W sec)
Figure 5.72 Example of 64G2 Undervoltage Setting From Survey Data

Setting
64G2P1
0 Relay
Word
64G2P2 Bits
1
SELOGIC VN3FM 64G2UV
64GALT
64G2PMN
|3PGF|
64G2PMX = OFF AND 64G2PMN = OFF
|3PGF|
64G2PMX
V1ZFM 64G2UEN
VNOMZ
0.8 •
3
Figure 5.73 64G2 Third-Harmonic Undervoltage Logic
Setting Guidelines
It is critical to carry out a third-harmonic survey over the generator real and reac-
tive power operating range to determine the optimal pickup setting. If the third-
harmonic is reduced to a very low value over a range of generator loading, the
64G2PMX and 64G2PMN settings can be used to block operation over this
range.
64G2 Output Logic

Figure 5.74 shows the output logic for the 64G2 element. Additional supervision
can be applied using the torque-control input. The 64G2D has a default time
delay of one second.
Relay
Word Relay
Bits Word
64G2DIF 64G2D Bits
64G2UV 64G2T
0
SELOGIC
64G2TC 64G2
Figure 5.74 64G2 Output Logic
64G3 Third-Harmonic Element

Figure 5.75 is used to develop the principle of operation of this function. In this
figure, m defines the location of the fault in per-unit, measured from the generator
neutral. V3 is an arbitrary value of third harmonic produced by the machine at an
instant in time.

V3
V3
m (1 –m)
V3 V3
m
VN3F VAZ3F VBZ3F VCZ3F
Figure 5.75 Third-Harmonic Components During a Ground Fault
For simplicity, we assume that all VT ratios are equal to one. For a fault at m:
VN3F = m • V3
VAZ3F + VBZ3F + VCZ3F

3V0Z3F = ------------------------------------------------------------------------
3
 V3 – m • V3  +  V3 – m • V3  +  1 – m  • V3
= ------------------------------------------------------------------------------------------------------------------------
3
=  1 – m  • V3
VG3F = VN3F + 3V0Z3F = m • V3 +  1 – m  • V3 = V3

and
VN3F m • V3
------------------- = ------------------ = m
VG3 V3
Accordingly, the ratio of |VN3F| / |VG3F| is used as the operating signal for this
element.
Setting Guidelines for the 64G3 Third-Harmonic Element

Table 5.24 64G3 Third-Harmonic Element Settings
64G3Rpa 64G3 Element Ratio p 0.01–1.00 0.15 Group

64G3D 64G3 Element Delay 0.00–400.00 s 1 Group
64G3P1 64G3 Element Pickup 1 0.10–150.00 2 Group
64G3TC 64G3 Element Torque Control SELOGIC variable 1 Group
a p = 1, 2.
As shown in Figure 5.76, the 64G3 element operates when 64G3Rp  |VN3F| /
|VG3F|. During normal operation, this ratio is typically in the range of 0.4–0.85.
For a fault near the generator neutral, the ratio will be equal to the location of the
fault (measured from the neutral). A setting of 0.15 provides a reasonable overlap
with the 64G1 element. A third-harmonic survey is usually not required for this
element.

Settings
64G3R1
0
64G3R2 Relay
1 Word
SELOGIC
64GALT Bits
64G3
VN3FM V3RAT 64G3D
64G3T
0
VG3FM
64G3EN
Setting
64G3P1
SELOGIC
64G3TC
Figure 5.76 64G3 Third-Harmonic Ratio Logic
Multi-Machine Ground Fault Voltage Comparison

During a ground fault, the ratio of the fundamental neutral and fundamental ter-
minal voltages provides a measure of the location of the fault within the winding.
Similarly, the ratio of the neutral third-harmonic and the total third-harmonic
voltages provides a similar location measurement. In applications with multiple
high-impedance grounded machines sharing a common bus, the two ratios will
agree for the faulted generator but will differ for the healthy generator. If the
ground fault is on the bus, all ratios will agree and give an indication close to 1.
Equation 5.47 compares the fundamental and third-harmonic ratios to determine
how closely they agree. The value of 64GMMS will be 1 when the ratios are in
exact agreement. A selective tripping scheme can be implemented by comparing
the values of 64GMMS among all of generators on a bus and tripping the unit
with the highest value first. These values need to be exchanged among relays
over a communications channel. Additional SELOGIC is required to implement
the scheme logic. The value of 64GMMS is calculated when E64G has G2 or G3,
and PTCONZ! = D.
 
VN3F VNF
64GMMS = 1 – MIN  ---------------- – ------------------------------------------ , 1
 VG3F PTRZ 
 V1ZF • ------------------- 
PTRV2
Equation 5.47
64G Output Logic

A stator ground fault often begins as an intermittent fault. When the fault is inter-
mittent, transients occur at every restrike. For an intermittent fault at the termi-
nals, the fault energy caused by capacitive discharge can be much higher than that
of a solid fault. Furthermore, the healthy phases are also exposed to recurring
voltage transients. Therefore, it is important to clear faults as quickly as possible.

However, it is also possible for ground fault protection to pick up for external
events under conditions such as the following:
➤ A ground fault on the high-voltage side of the GSU can result in an
increase in the generator neutral voltage because of coupling through
the capacitance between the HV and LV windings.
➤ Depending on the VT connections, a ground fault on the VT
secondary wiring can also result in an increase in the generator
neutral voltage until the fault is cleared by the VT fuses.
The SEL-400G 64G output logic incorporates two mechanisms to provide more
effective tripping for ground faults.
Acceleration Path
The first mechanism is an acceleration path. Acceleration schemes discriminate
between faults within the generator zone and those occurring elsewhere. Identifi-
cation of the fault within the generator zone removes the need to time-coordinate.
Custom schemes can be implemented in SELOGIC and assigned to the 64ATC
SELOGIC control equation.
Integrating Timer
The second mechanism that provides improved performance for intermittent
faults is an integrating timer. The timer operates as follows: when the input
asserts, the timer accumulator increases linearly at a rate defined by the PU delay
setting. If the input deasserts, the accumulated value is frozen. If the input reas-
serts, the timer accumulator increases once again. If the input is deasserted for a
period longer than the dropout time, the timer output resets.

Timer
Input
Time (s)
Timer
Accumulator
64GAPU
64GADO
t < 64GADO
Time (s)
Timer
Output
Time (s)
Figure 5.77 64G Integrating Timer
Figure 5.78 shows the output logic. The upper path is fed by the SELOGIC vari-
able 64GTIN. It can be considered as the nonaccelerated or normal path for trip-
ping. Elements assigned to this path operate via their own delay timers (64G1D,
64G2D, and 64G3D), regardless of the behavior of the acceleration logic or inte-
grating timer.
The lower path is fed by the SELOGIC variable 64GAIN. This is the accelerated
path. The default assignment is 64G1 OR 64G2 OR 64G3. The accelerated path
is supervised by the 64GATC SELOGIC variable and drives the integrating timer.
The integrating timer is intended to have a shorter pickup delay (64GD) as com-
pared with the 64G1D, 64G2D, and 64G3D pickup delays.
SELOGIC
Settings
64GTIN
64GAPU
64GAIN 64GT
64GATC
64GADO
Figure 5.78 64G Output Logic

64G Output Logic Setting Guidelines

Table 5.25 64G Output Logic Settings
64GTIN 64G Normal Trip Input SELOGIC variable 64GT1 OR 64GT2 Group
OR 64GT3
64GAIN 64G Accelerated Input SELOGIC variable 64G1 OR 64G2 Group
OR 64G3
64GATC 64G Accelerated SELOGIC variable NA Group
Torque Cont
64GAPU 64G Accelerated PU 0.000–400.000 seconds 0.20 Group
Delay
64GADO 64G Accelerated DO 0.000–400.000 seconds 15 Group
Delay
The delayed output Relay Word bits of the individual ground fault functions are
assigned to 64TIN by default. The pickup Relay Word bits of the individual
ground fault functions are assigned to 64AIN by default.
The recommended setting for the 64GATC is:
64GATC := NOT 46Q11
This assignment checks that there are no GSU HV faults that the 64G elements
could detect. It uses the pickup Relay Word bit of the generator unbalance ele-
ment. To provide correct supervision, this element must be enabled. It will typi-
cally be set to pick up at 5–10 percent of the generators negative-sequence
withstand. In this case, this Relay Word bit should assert dependably for any
faults at the GSU HV terminals.
The 64GAPU can be set in the range of 0.08–0.20 seconds. The default setting is
intended to be long enough to avoid tripping for a VT secondary fault. See VT
Secondary Ground Faults on page 5.73.
The 64GADO setting determines the duration until the timer accumulator reset
following deassertion of the input. They can be set in the range of 5–15 seconds.
VT Secondary Ground Faults

As mentioned earlier, generator ground fault schemes can respond to a ground on
the secondary of the VT. There are several ways to deal with this issue.
Alternate VT Connections
The generator terminal VT connection determines the protection functions that
can be applied and the security risk to the 64G function. Connection A in
Figure 5.79 can provide phase-to-phase, phase-to-ground, positive-, negative-,
zero-sequence, and third-harmonic voltages. However, Connection A also puts
the 64G at risk for a VT secondary ground.
Connections B or C in Figure 5.79 provide phase-to-phase, positive-, and nega-
tive-sequence voltages and do not put 64G at risk. These connections allow most
generator protection functions to operate with the exception of the 64G2 (differ-
ential mode), 64G3, and zero-sequence overvoltage elements. However, if an
open-corner delta-connected VT winding (Connection D) is available, the
SEL-400G allows these functions to operate using this connection.
The use of Connection B, C, or D allows the 64GD timer setting to be reduced.

A B C
a VAk
b VBk
c VCk
(A) 64G at risk for faults at a, b, and c
A B C VAk A B C A B C
a a VAk o Vk2
b b
c VCk VCk
c
n
(B) 64G not at risk (C) 64G not at risk (D) 64G not at risk
Figure 5.79 Impact of VT Connections on 64G Security
VT Fuse Coordination
If Connection A of Figure 5.79 is used then the 64G must be delayed to coordi-
nate with the VT secondary fuses. The 59G element voltage pickup is converted
to an equivalent minimum amperage pickup. The coordination process is illus-
trated using the example system of Figure 5.64.
The minimum VT secondary fault current for which the 64G1 responds is:
3 • 64G1Pn • PTRN
IFminsec = ----------------------------------------------------- • PTRZ
Z0
where PTRN = PTRV2 if EGNPT = V2 and PTRN = PTRZ2 if EGNPT = V2.

And Z0 is:
3 • RN • XC 0
Z 0 = ------------------------------------
3 • RN + XC 0
If XC0 is not known, |Z0| can be estimated as:
3 • RN
Z 0 = ------------------
2
Then, referring to the example system of Figure 5.64:
2 • 6.7 • 87 • 174
IFmin sec = ------------------------------------------------- = 65.2 A
2200
In Figure 5.80, the time-current current for a 15 A, KTK-R fuse is plotted.
IFminsec is superimposed on the plot. A 0.2-second pickup delay (64GD) results
in a margin of approximately 80 ms or 5 cycles.

1.0
64GD pickup delay
Time (seconds)
0.1
64G1 pickup
0.01
10
100
1000
Current (A)
Figure 5.80 Coordination of the 64G1 With a 15 A KTK-R VT Secondary Fuse
Sequence Voltage Acceleration

A third way to address the issue of VT secondary grounds is based on sequence
voltage checks. The sequence networks for a ground fault at the generator termi-
nals and a VT secondary ground fault is shown in Figure 5.81.
I1 ZVT
Z1 Z1
V1 V1
VGPN VGPN
I2
ZVT
Z2 V2 V2
Z2
I0 ZVT
Z0 3RN XC0 VN Z0 VN
(A) Fault at the Generator Terminals (B) VT Secondary Fault
Figure 5.81 Ground Fault Sequence Networks
In Figure 5.81(A), Z0 >> Z2, therefore V2 is expected to be virtually zero for a

stator fault. In Figure 5.81(B), ZVT >> Z2. The ratio of V2 / VN can be written as:
V2 I 2 • Z VT
-------- = ---------------------
VN I0 • Z0

Directional Power Elements
Because the currents in the three sequence networks are equal:
Z VT
V 2 = ---------- • V N
Z0
We can substitute VN with the pickup setting of the 64G1 reflected to the pri-
mary. Using the values from the example system of Figure 5.64 and calculating
the negative-sequence voltage for a VT secondary fault in secondary volts as:
PTRN • 64G1P1 87
3V2ZFM = 3 • ZVT 3989 + 9883j • --------
- = 3 • -------------------------------
------------ • ------------------------------------------- - 174- • 6.7 V = 22 V
Z0 PTRZ 3300 – 3300j
where PTRN = PTRV2 if EGNPT = V2 and PTRN = PTRZ2 if EGNPT = V2.

A safety margin of 50 percent can be applied to this value. The acceleration
torque-control equation now becomes:
64GATC := (NOT 46Q11) AND (3V2ZFM < 11)
Fuse coordination is not required in this approach. However, the previous calcu-
lations use the impedance of the VT (ZVT). This value is not provided on the VT
nameplate. If it is also not provided by the manufacturer, an estimate of ZVT can
be calculated from the VT nameplate data.

You can enable as many as four independent three-phase power elements in the
SEL-400G relay. Each enabled element can be set to detect real power or reactive
power. When voltage inputs to the relay are taken from delta-connected PTs, the
relay cannot account for unbalance in the voltages when calculating the power.
Take this into consideration in applying the power elements.
The configuration options provide a wide variety of protection and control appli-
cations. Typical applications are:
➤ Reverse or low-forward power for generator anti-motoring protection
➤ Overpower and/or underpower protection/control
➤ VAR control for capacitor banks
➤ Detection of power export in DG applications
Figure 5.82 shows how the operating characteristic of a power element can be
defined in the real-reactive power plane through the configuration of the 32On,
32MODn, and 32PPn settings.

Q Q
Operate Operate Operate Operate

Region Region Region Region
For For P For For P
32MODn = U 32MODn = O 32MODn = O 32MODn = U
32PPn 32PPn
(A) 32O = 3PnF, 32PPn 0 (B) 32O = 3PGF, 32PPn

0
Q Q
Operate Region
For
32MODn = O Operate Region
32PPn For
32MODn = U
P P
Operate Region 32PPn

For
32MODn = U Operate Region
For
32MODn = O
(C) 32O = 3QnF, 32PPn 0 (D) 32O = 3QnF, 32PPn
0
Figure 5.82 Directional Power Elements Operation in the Real/Reactive Power
Plane
For example, to set an element as a conventional reverse power element, select a

real-power operating signal, set 32PPn to be less than zero, and set
32MODn = O. This results in the operating characteristic given in Figure 5.82.
To set an element as a conventional low forward power element, select a real-
power operating signal, set 32PPn to be greater than zero, and set 32MODn = U.
This results in the operating characteristic given in Figure 5.82.
In the SEL-400G, the calculated real and reactive power have the same sign as
the power flowing in the primary system when the polarity marks of the VT and
CTs are connected to the polarity marks on the relay. Note that a CT is often ori-
ented with its polarity marks facing away from its associated generator, breaker,
or transformer, as shown in Figure 5.83. In this example, real and reactive power
are flowing out of the generator and into the GSU and AUX transformers, as indi-
cated by the red and blue arrows. Because of the orientation of the CTs, the relay
measures positive watts and VARs at the generator neutral and at the AUX trans-
former terminals, and negative watts and VARs flowing out of the breaker lead-
ing to the GSU.

To AUX
Positive watts
Positive VARs
To GSU
W S T
3PGF is positive (EGNCT = W) 3PSF is positive 3PTF is negative
3QGF is positive 3QSF is positive 3QTF is negative
SEL-400G
Figure 5.83 Example of Primary Power Flow and the Corresponding Relay
Measurements
Figure 5.84 shows the element logic.
S2 32Pnn
0 Integrating Timer
32Onn S1
1 1 32PDnn
32PPnn 0 32Tnn
32TCnn 0.75 •
32PDnn
S1 (SELOGIC Control Equation)
1
S1 = 0 if 32MODnn = O (Over) S2 = 0 if 32PPnn
0
1 if 32MODnn = U (Under) 1 if 32PPnn 0 32RSnn
Figure 5.84 Directional Power Elements Logic
During a motoring event, the power element may dropout repeatedly because of
the oscillation of the rotor. The directional power element incorporates an inte-
grating timer to provide faster operation for these events. If enabled, the timer
element does not reset immediately following a dropout. Instead, the timer is dec-
remented at 1.33 times faster than its pickup rate. The timer can be forced to reset
immediately by setting 32RSnn to Y.
Biased Operation
In some instances, a generator may motor while supplying significant reactive
power to the system. Angle errors associated with the instrument transformers
can cause a loss of dependability when motoring at a lower power factor.

Bias
Angle Q
Unbiased
Characteristic
PM
P
Biased
Characteristic
Figure 5.85 Dependability-Biased Characteristic
The bias angle has a default setting of 1 degrees.

Biased operation can only be enabled when the element is also configured to
respond to real power.
Table 5.26 Directional Power Settings
Settinga Prompt Range Default Category
32Onn Dir Power Element nn Operating Quantity 3PmF, 3QmFb 3PGF Grouped
32MODnn Dir Power Element nn Operating Mode O, U O Grouped
32BIAnn Dir Power Element nn Bias SELOGIC NA Grouped
32ANGnn Dir Power Element nn, Bias Angle 0.01 to 5 1 Grouped
32PPnn Dir Power Element nn PU –2000.00 to 2000 VAc –10 Grouped
32PDnn Dir Power Element nn Time Delay 0.000 to 400 s 2 Grouped
32RSnn Dir Power Element nn Inst Reset Y, N Y
32TCnn Dir Power Element nn Torque Control SELOGIC 1 Grouped
a
nn = 01–04.
b m = S, T, U, Y, or G.
c
The range shown is for a 5 A CT. Divide by 5 for 1 A rated CTs.
Generator Motoring Application

Generator motoring occurs when the prime mover input power to the generator is
cut off while the generator is connected to the system. When this happens, the
generator acts as a synchronous motor to drive the prime mover shaft. In steam-
turbine prime mover applications, generator motoring can quickly damage the
turbine by causing overheating. In applications of other prime movers, motoring
can cause mechanical damage and/or unsafe operating conditions.
For this application, it is assumed that the real power measured by the relay is
negative during motoring. Accordingly, the element is configured as a reverse
power element, with 32PPn selected to be less than zero and 32MODn selected
as O.
For motoring protection of the generator, the pickup, 32PPn is usually set at 1/2
of the expected motoring power. This provides a margin in the case, for instance
that a steam unit motors with the main valve not fully closed. The motoring
power should be available from the generator manufacturer. It is a good idea to
verify the pickup through a live trip test, if possible.

Capability-Based Loss of Field
Table 5.27 Typical Motoring Power
Prime Mover Power (pu)
Diesel 0.05–0.25
Gas Turbine >0.50
Hydro 0.002–0.02
Steam 0.005–0.03
The dependability-biased characteristic is enabled using the 32BIAn. It is not

required for the following applications:
➤ Motoring power is high (greater than 5 percent).
➤ Motoring power is low, but the generator will not motor with
significant VARs (sequential trip or exciter is always in power factor
regulation mode).
➤ Motoring power is low, but the angle errors are known to be less than
0.25 degrees (such as when the CTs and VTs haves a metering class
specification or when instrument transformer accuracy has been
measured and accounted for).
The 32BIAn setting is implemented as a SELOGIC control equation. Set it to 1 to
enable biased operation. This implementation also permits dynamic application
of biased operation.
There is a maximum permissible time that a generator can operate in a motoring
mode without damage. The anti-motoring element time delay setting, 32PDn
must be set less than this value. This value should be obtained from the generator
manufacturer. It is also the case that the reverse power element can pick up for a
stable power swing. The time delay setting must be set longer than this value
which can be determined from a transient stability study.

In addition to the impedance-based LOF, the SEL-400G includes a capability-
based LOF element that defines characteristics that emulate the various capabil-
ity curves associated with a synchronous generator. These characteristics are
defined in the real and reactive power (PQ) plane. The relay implements the fol-
lowing zones:
➤ Zone 1. Operates quickly for severe LOF events
➤ Zone 2. Operates for underexcitation events. Coordinates with the
UEL and stator end-core heating limit (SECHL).
➤ Zone 3. Operates for a loss of steady-state stability. Coordinates with
the SSSL.
➤ Zone 4. Alarms for abnormal loading. Coordinates with the GCC.
Each zone is designed to operate independently of the other zones. The imped-
ance-based (40) element can be enabled simultaneously with any of the 40P
zones. Figure 5.86 shows the operating characteristics and the associated set-
tings.

Lagging Power Factor

Normal
Operation P
Region
Leading Power Factor

E3 E4
ZONE 2 ZON ZON
ZONE
1
Figure 5.86 Capability-Based LOF (40P) Characteristics
40P Zone 1
A generator can lose synchronism if it suffers a complete loss of field, especially
when it is operating near full load. A loss of field can occur for a variety of
events, such as a short or open circuit. The machine can be damaged quickly
because of the resulting overspeed and torque pulsations. The slip resulting from
the overspeed can induce currents on the damper bars and rotor body and can
damage the rotor because of excessive heating. A LOF event also poses a risk to
the power system. The Zone 1 element is intended to provide high-speed protec-
tion. The characteristic is located farther from the GCC, which makes it more
secure during stable power swings. This allows it to be set with a short delay with
no additional supervision, which is important for dependability. This zone is
analogous to the Zone 1 of the impedance-based LOF element. This characteris-
tic is defined by a reactive offset setting (40P1P) and a slope setting (40P1DIR).

Normal
Q Operation
P
3PGF
GCC
GCC
40P1P
QPKP_Z1
40P1DIR
Fault
Zone 1
Trip Region
3QGF
Figure 5.87 40P Zone 1 Characteristic and Associated Settings
Table 5.28 40P Zone 1 Settings
Setting Prompt Rangea Default Category
E40PZ 40P Enable Z1, Z2, Z3,Z4 Z1, Z2 Group

40P1P 40P Zone 1 pickup (VA, sec) –2000.0 to –1 –100 Group
40P1DIR 40P Zone 1 characteristic angle (deg) –30 to 30 –20 Group
40P1D 40P Zone 1 delay (seconds) 0.000 to 400 0.25 Group
40P1TC 40P Zone 1 torque control (SELOGIC SV NOT LOPZ Group
Eqn)
a The ranges and default settings shown are for a 5 A CT. Divide by 5 for 1 A rated CTs.
In general, the relay measures the generator real power, 3PGF, in secondary watts
and applies it to a characteristic equation to calculate a reactive power pickup
threshold, QPKP_Z1. It then checks if the generator reactive power 3QGF, in sec-
ondary VARs, is less than the pickup threshold, QPKP_Z1. For the 40P Z1 ele-
ment the characteristic equation is:
3 • V1ZFM 2
QPKP_Z1 =  40P1P •  ---------------------------------- + 3PGF • tan  40P1DIR 
  VNOMZ  
Note that the voltage term makes this characteristic static in the impedance plane.
Figure 5.88 shows the logic for the 40P Zone 1. The following criteria should be
considered for the 40P1D setting:
➤ Short enough to prevent damage for a loss of field at full power (refer
to the guidance of the generator manufacturer).
➤ Short enough to allow the element to time out before the onset of
pole slipping
If these criteria result in a delay of less the 0.25 seconds, then a check should be
carried out to ensure that the element does not misoperate for stable power
swings.

40P1
QPKP_Z1
3QGF 40P1D
40P1T
0
40P1TC
(in seconds)
Figure 5.88 40P Zone 1 Logic
40P Zone 2
The Zone 2 element protects against sustained operation in the underexcited
region of the PQ plane, below the GCC in Figure 5.89. Round-rotor generators
can suffer damage because of end-iron heating when operating in this region.
Underexcited operation can occur for several reasons, including high system
voltage or problems with nearby generators. The role of the underexcitation lim-
iter is to prevent operation in the underexcited region.
It is paramount that the 40P element does not operate for an event that can be cor-
rected via the generator controls. The 40P Zone 2 element is designed to closely
coordinate with the UEL. The element uses a curve-fitting algorithm to generate
the characteristic equation. This is illustrated in Figure 5.89, where:
QPKP = function(3PGF)
40P2SEG 40P Zone 2 shape C, L C Group

40PUP5 40P Zone 2 real power at point 5 of the UEL (VA, sec) 1.00 to 2000 80 Group
40PUQ5 40P Zone 2 reactive power at point 5 of the UEL (VA, sec) –2000.0 to 2000 –60 Group
40PUP6 40P Zone 2 real power at point 6 of the UEL (VA, sec) 1.00 to 2000 40 Group
40PUQ6 40P Zone 2 reactive power at point 6 of the UEL (VA, sec) –2000.00 to 0 –80 Group
40PUQ7 40P Zone 2 reactive power of UEL at point 7 of the UEL (VA, sec) –2000.00 to –1 –100 Group
40P2M 40P Zone 2 margin from UEL 1.05 to 1.25 1.2 Group
40P2D 40P Zone 2 pickup delay (seconds) 0.000–400 0.5 Group
40P2TC 40P Zone 2 torque control (SELogic equation) SV NOT LOPZ Group
40PK 40P zone voltage coefficient 0–2 2 Group
Referring to Figure 5.89, the Zone 2 characteristic is defined by three coordinate-

pairs (Points 5, 6, and 7) in the PQ plane. Using these settings, the relay fits either
a curve or linear segments through the three points. The points are taken directly
from a plot of the UEL. This allows the Zone 2 characteristic to closely match the
shape of the UEL. The characteristic is then scaled by the Zone 2 margin setting
(40P2M) to provide coordination with the UEL. The characteristic is bounded
within the lower half of the PQ plane (3QGF < 0).

P P
GCC GCC
3PGF
3PGF

40UP5,
40PUP5, 40UQ5
40P2M 40PUQ5 40P2M
40PUP6, UEL 40UP6,
40PUQ7 40PUQ6 40UQ7 40UQ6 UEL
QPKP_Z2 Zone 2 QPKP_Z2 Zone 2
Trip Region Trip Region
Q Q
a) 40P2SEG = L b) 40P2SEG = C
Figure 5.89 40P Zone 2 Characteristic and Associated Settings
The logic for the 40P Zone 2 is shown in Figure 5.90. The Zone 2 characteristic
will often be large enough to cause the element to pick up for a stable power
swing. The 40P2D setting should be set short enough to prevent generator dam-
age for sustained operation outside the SECHL (refer to the guidance of the gen-
erator manufacturer). If this time is less than 0.25 seconds, then a study must be
carried out to ensure that Zone 2 does not misoperate for a stable power swing.
The Zone 2 logic also implements an accelerated tripping path that is supervised
by an undervoltage check. During a true underexcitation event, the terminal volt-
age will be reduced. If this path is used, and the 40PAD delay is less than 0.25
seconds, then the undervoltage pickup setting must be set less than the minimum
voltage expected during a stable power swing.
40P2
QPKP_Z2
3QGF 40P2D
40P2T
0
40P2TC
(in seconds)
40P Zone 3
This zone is intended for detection of a loss of steady-state stability. Steady-state
stability can occur when the automatic voltage regulator (AVR) is operated in
manual mode. Manual operation is normally not permitted but some AVRs may
transfer to manual for a PT fuse loss or loss-of-potential, for example. Often, in
strong power systems, the SSSL will be situated outside the GCC, but for weak
systems, the SSSL can intrude into the GCC. In this case, the generator could
lose synchronism while still operating within the GCC. The 40P Zone 3 element
is intended to detect this occurrence. Figure 5.91 shows Zone 3 superimposed
onto the GCC.


GCC
Normal
Operation P
Region

SSSL
Zone 3
Trip Region
Figure 5.91 40P Zone 3 Characteristic
40PUVP 40P U/V Element PU (V, sec) OFF, 2.00–300.0 OFF Group
40P3D Zone 3 time delay (seconds) 0.000–400 10 Group
40P3TC Zone 3 torque control (SELOGIC equation) SV NOT LOPZ Group
The SSSL characteristic is implemented as a circle that is bounded within the

lower half of the P-Q plane (3QGF < 0). Only the d-axis synchronous impedance
(setting XDGEN) and the impedance of the weakest equivalent power system
impedance (settings XESYS and XTXFR) are required to set this zone.
The characteristic equation of the SSSL in the PQ plane is given by
Equation 5.48.
 2  2 
jV1ZFM – j V1ZFM
40PSSL = re   3PGF + j3QGF – -------------------------------------------------------------------------------------- •  -------------------------------------------------------- – 3PGF – j3QGF 
   XESYS + XTXFR  • ZNOMGS   XDGEN • ZNOMGS 
Equation 5.48
where:
XESYS = the impedance of the power system in per-unit ohms
XDGEN = the direct-axis synchronous impedance of the generator in per-
unit ohms
XTXFR = the transformer leakage reactance in per-unit
ZNOMGS = (KVGEN2 / MVAGEN) • (CTRG / PTRZ)

V1ZFM2
Center = j
2
( XESYS +1 XTXFR – XDGEN
1
)
V1ZFM2 1 1
Radius = j
2
( XDGEN +
XESYS + XTXFR
)
P
Weak
System
Strong
System
Trip
Region
Figure 5.92 40P Zone 3 Examples for Strong and Weak Power Systems
Because Zone 3 replicates the SSSL, it is static in the impedance plane. Note that
value of 40PSSL calculation changes sign from positive to negative at the onset
of a loss of stability when the AVR is in Manual mode. If the AVR is in Auto-
matic mode, the 40PSSL calculation could also transition from positive to nega-
tive during underexcited operation but without a loss of stability. However, in this
case, the terminal voltage is expected to remain close to nominal.
0
40PSSL
40P3
–0.5
3QGF 40P3D
40P3T
0
40P3TC
(in seconds)
Application of the Zone 3 element is largely dependent on the specifics of the

system:
➤ If studies show that the SSSL cannot intrude into the GCC (because
the system is strong) or if the excitation system does not allow the
possibility of manual AVR operation (because of design
redundancies), Zone 3 can be disabled.
➤ Otherwise, if a loss of steady-state stability is possible and manual
AVR operation is possible:
➢ Zone 3 can be used to produce an alarm to indicate that, at the
present level of real and reactive loading, a transfer to manual
AVR operation will result in a loss of steady-state stability.
➢ The AVR may provide an indication that it has transferred to
manual. If available, this signal could be used to torque-control
the element. In this case, the element could be used for tripping.

➢ An actual loss of steady-state stability should be accompanied

by reduced terminal voltage. Accordingly, an undervoltage
element could be used to torque-control the element. In this case,
the element could be used for tripping. A study is required to
confirm the undervoltage pickup setting.
Accelerated Trip
The collapse of the terminal voltage or the field voltage provides an additional
confirmation of an LOF event. Use Figure 5.94 to provide accelerated tripping.
Settings
40PUVP 40PAD
V1ZFM 40PAT
0
40P2 (In seconds)
40PUV
40P3
Figure 5.94 40P Acceleration Logic
Both the Zone 2 and Zone 3 are accelerated to trip if V1ZFM is less than the
pickup setting along with a zone assertion.
40P Zone 4
This zone is intended to provide an alarm when the machine is operated outside
the of the GCC. The logic includes a margin setting to allow the alarm to assert
before reaching the boundary of the GCC.
The relay fits a curve for each segment using seven sets of PQ coordinates. The
settings 40PQ1 and 40PQ7 define the upper and lower coordinates where the
GCC intersects the Q axis (P = 0). The settings 40PP3 and 40PQ3 define the
intersection between Segments 1 and 2. The settings 40PP5 and 40PQ5 define the
intersection between Segments 2 and 3. The settings 40P2, 40Q2, 40P4, 40Q4,
40P6, and 40Q6 define the curvature of each of the three segments. The exact
locations of the coordinates defined by these last settings are not critical but
should be chosen at the approximate midpoints of each segment.
Table 5.31 40P Zone 4 Settings (Sheet 1 of 2)
40P4SEG 40P Zone 4 shape C, L C Group

40PQ1 40P Zone 4 reactive power at point 1 of the GCC (VA, sec) 1.00 to 2000 100 Group
40PP2 40P Zone 4 real power at point 2 of the GCC (VA, sec) 1.00 to 2000 40 Group
40PQ4 40P Zone 4 reactive power at point 4 of the GCC (VA, sec) –2000.0 to 2000 0 Group
40PQ5 40P Zone 4 reactive power at point 5 of the GCC (VA, sec) –2000.0 to 2000 –60 Group
40PQ6 40P Zone 4 reactive power at point 6 of the GCC (VA, sec) –2000 to 0 –80 Group
40PQ7 40P Zone 4 reactive power at point 7 of the GCC (VA, sec) –2000 to –1 –100 Group

Table 5.31 40P Zone 4 Settings (Sheet 2 of 2)
40PRU 40P Rated Power at Unity PF (VA, sec) 1.00 to 2000 100 Group
40P4M 40P Zone 4 margin 0.60 to 1 0.8 Group
40P4D 40P Zone 4 delay (seconds) 0.000 to 400 10 Group
40P4TC 40P Zone 4 torque control (SELOGIC Eqn) SV NOT LOPZ Group
Use the 40PRU setting to specify the generator rated power at Unity Power Fac-
tor at maximum cooling. This setting is used in conjunction with the 40PRUD
setting when the dynamic cooling feature is enabled. The analog value 40PPU
will be scaled between the 40PRU and 40RUD settings based on the cooling
level, 40DAM.
Q 40PQ1
1 Zone 4
40PP2, Alarm Region
GCC 40PQ2
40PQMX
40PP3,
40PQ3
3PGF, 2
3QGF
40PPMX
40P4M
40PP4,
40PQ4
40PP5,
40PQMN 3 40PQ5
Zone 4
40PP6, Alarm Region
40PQ7 40PQ6
Figure 5.95 40P Zone 4 Characteristic and Associated Setting
40PQMN
40P4
3QGF
3QGF 40P4D
40PQMX 40P4T
0
3PGF
40PPMX
40P4TC
Figure 5.96 Capability Curve Alarm (Zone 4) Logic

Dynamic Functionality
In general, the real and reactive power that a generator can deliver varies directly
with the ability to cool the machine. The GCC is essentially a representation of
the safe thermal operating limits of the generator. In round-rotor generators the
SECHL segment of the GCC can also vary with the terminal voltage. As a result,
some modern generator control systems adapt the generator operating limits
based on cooling capability and/or voltage magnitude.
In the SEL-400G, the Zone 2 and Zone 4 characteristics can be configured to
adapt so that these zones maintain coordination with the UEL and GCC.
Figure 5.97 and Figure 5.98 show the impact in protection coverage achieved by
this dynamic behavior.
Table 5.32 40P Dynamic Function Common Settings
40PDAM Cooling level SV RTS01TV Group

40PDAQ Cooling level quality SV RTS01OK Group
40PDAMX 40P Analog Meas Max Curve –99999.000 to 30 Group
99999
40PDAMN 40P Analog Meas Min Curve –99999.000 to 50 Group
99999
40PK 40P Zone Voltage Coefficient 0, 1, 2 2 Group
For cooling, a change of the zone characteristic is implemented through the intro-
duction of a second set of settings which correspond to the minimum cooling
capability. The relay also needs a measurement of the cooling level, (40PDAM).
This, for example, could be a measurement of hydrogen pressure, ambient tem-
perature, or other input that represents the present cooling level of the generator.
The 40PDAM signal is wired to a transducer input. The signal is then scaled from
0 at minimum cooling to 1 at maximum cooling as follows:
40PDAM – 40PDAMN
40PX = min  1, max  0 ---------------------------------------------------------------- 
  40PDAMX – 40PDAMN 
Equation 5.49
The relay then uses the 40PX value to linearly interpolate between the minimum
and maximum characteristic. A quality indicator is provided for the cooling level
measurement, 40PDAQ. If 40PDAQ = 0, the 40PX calculation is forced to 1,
which shifts the zone characteristic to its maximum position.
For voltage, the zone characteristic is scaled using a terminal voltage measure-
ment and exponent setting.
3 • V1ZFM 40PK
 ----------------------------------
 VNOMZ 
Equation 5.50
The 40PK setting has a range of 0, 1, and 2 and a default setting of 2. The default
setting results in a characteristic that is fixed in the impedance plane and is appro-
priate for hydro generators. A 40PK setting of 0 results in a characteristic that is
fixed in the PQ plane.

Zone 2 Dynamics
The Zone 2 element can be configured to adapt its characteristic based on cool-
ing. This functionality is enabled by setting E40P2D = Y. If the setting
E40P2D = Y, then the SEL-400G provides additional settings for the location of
the UEL during maximum cooling conditions.
Table 5.33 40P Dynamic Function Zone 2 Settings
E40P2D Enable dynamic capability curve Y, N N Group

40PUP5D 40P Zone 2 maximum real power at point 5 1.00 to 130 Group
of the UEL (VA, sec) 2000
40PUQ5D 40P Zone 2 maximum reactive power at –2000.00 –110 Group
point 6 of the UEL (VA, sec) to 2000
40PUP6D 40P Zone 2 maximum real power at point 6 1.00 to 90 Group
of the UEL (VA, sec) 2000
40PUQ6D 40P Zone 2 maximum reactive power at –2000.00 –130 Group
point 6 of the UEL (VA, sec) to 0
40PUQ7D 40P Zone 2 maximum reactive power of –2000.00 –100 Group
UEL at point 7 of the UEL (VA, sec) to 2000
As shown in Figure 5.97, the relay calculates QPKP′ and QPKPD′. The relay
uses the 40PX signal to interpolate between the minimum and maximum values
as follows:
QPKP = QPKP +  QPKPD – QPKP  • 40PX

Equation 5.51
P
GCC at
GCC at
3PGF
Maximum
Minimum Cooling
Cooling
40PUP5, 40PUP5D,
40PUQ5 40PUQ5D
UEL at
Minimum
Cooling
QPKP Zone 2
40P2M Characteristic
40PUQ7 QPKPD Maximum
40PUP6,
40PUQ7D 40PUQ6 40PUP6D, Cooling
40PUQ6D Zone 2 Unprotected region that
Q UEL at Minimum results when there is no
Maximum Cooling shifting of Zone 2 to account
Cooling for cooling
Figure 5.97 40P Zone 2 Dynamic Cooling Functionality
As mentioned, the GCC of round-rotor machines adapt with voltage and some
UELs can also adapt to maintain coordination with the GCC. In these UELs, the
characteristic is scaled using a voltage measurement and an exponent setting
(40PK).
Accordingly, the 40P element includes a voltage exponent setting. This results in
a Zone 2 pickup threshold of:
3 • V1ZFM 40PK
QPKP_Z2 = QPKP •  ----------------------------------
 VNOMZ 

Figure 5.98 shows Zone 2 applied to a round-rotor generator. Note that for an
increase in terminal voltage, the reactive power that the generator can safely
absorb is reduced, as denoted by the upward movement of the GCC. Also, if the
UEL is configured for K = 2, the AVR reactive power limit increases for an
increase in voltage as denoted by the downward movement of the UEL. The UEL
is not coordinated with the GCC at this voltage and the machine is under-pro-
tected. Selecting K = 0 for the UEL makes it stationary in the P-Q plane. The
Zone 2 element is also configured for 40PK = 0 in this example, making it sta-
tionary in the PQ plane and ensuring that it maintains coordination with the UEL.
40PUP5,
40PUQ5
UEL
K=2 40P2M
Zone 2 VT = 1.0 pu GCC at
40PK = 2 VT = 1.05 pu
VT = 1.0 pu 40PUP6,
40PUQ6
40PUQ7 UEL at
VT = 1.05 GCC at
40PK = 2 VT = 1.0 pu
Zone 2
VT = 1.05
Q Unprotected region that 40PK = 2
results when Zone 2 shifts
downward in response to
an increase in voltage
Figure 5.98 40P Zone 2 Dynamic Voltage Functionality
Zone 4 Dynamics
The Zone 4 element can dynamically expand and contract to follow the GCC that
varies as a function of cooling level. If the setting E40P4D = Y, then the
SEL-400G provides additional settings for the GCC under changing cooling con-
ditions.
Table 5.34 40P Dynamic Function Zone 4 Settings
E40P4D Enable 40P Zone 4 dynamic capability curve Y, N N Group

40PQ1D 40P Zone 4 maximum reactive power at point 1 of the GCC (VA, sec) 1.00 to 2000 150 Group
40PP2D 40P Zone 4 maximum real power at point 2 of the GCC (VA, sec) 1.00 to 2000 90 Group
40PQ4D 40P Zone 4 maximum reactive power at point 4 of the GCC (VA, sec) –2000.00 to 2000 0 Group
40PQ5D 40P Zone 4 maximum reactive power at point 5 of the GCC (VA, sec) –2000.00 to 2000 –110 Group
40PQ6D 40P Zone 4 maximum reactive power at point 6 of the GCC (VA, sec) –2000.00 to 0 –130 Group
40PQ7D 40P Zone 4 maximum reactive power at point 7 of the GCC (VA, sec) –2000.00 to –1.00 –100 Group
40PRUD 40P Rated Power at Unity PF (VA, sec) 1.00–2000 150 Group

Use the 40PRUD setting to specify the generator rated power at Unity Power
Factor at minimum cooling. This setting is used in conjunction with the 40PRU
setting when the dynamic cooling feature is enabled. The analog value 40PPU
will be scaled between the 40PRU and 40RUD settings based on the cooling
level, 40DAM.
The relay uses the 40PX signal to interpolate between the maximum and mini-
mum values as follows:
QPKPMX = QPKPMX +  QPKPMXD – QPKPMX  • 40PX

QPKPMN = QPKPMN +  QPKPMND – QPKPMN  • 40PX
PPKP = PPKP +  PPKPD – PPKP  • 40PX
Q GCC at Maximum Cooling

40PQ1D GCC at Minimum Cooling
1 40PP2D,
40PQ1 40PP2, 40PQ2D
40PQ2
QPKPMX 40PP3D, Alarm
40PQ3D Region
QPKPMXD
40PP3,
40PQ3
2
3PGF,
3QGF
PPKPD
PPKP
P
40PP4, 40PP4D,
40PQ4 40PQ4D
40PP5,
QPKPMND 40PQ5 40PP5D,
QPKPMN 3 40PQ5D
40PQ7
40PQ7D 40PP6, 40PP6D,
40PQ6 40PQ6D Alarm
Region
Figure 5.99 40P Zone 4 Dynamic Cooling Functionality
3 • V1ZFM 0
QPKPMX_Z4 = QPKPMX •  ----------------------------------
 VNOMZ 
3 • V1ZFM 40PK
QPKPMN_Z4 = QPKPMN •  ----------------------------------
 VNOMZ 
3 • V1ZFM 2
PPKP_Z4 = PPKP •  ----------------------------------
 VNOMZ 
Setting Guidelines
In the following example, the system of Figure 5.100 is used to provide the steps
for application of the 40P to a combustion gas turbine. In this application, the
UEL does not shift to account for cooling and has a voltage coefficient, K of 0. It
is assumed that an “AVR transferred to manual” signal is available for Zone 3 and
that a measurement of inlet temperature is wired to the relay.

Q (MVAr)
70
35, 65 Inlet Air Temp
60º F
60 120º F
54
30, 50
81, 39
40
64, 32
88, 20
20
70, 15
LAG
72, 0 P (MVA)
20 40 60 80 90, 0 100
LEAD
75, –5
45, –15
UEL
–20
–20 K=0 50, –20
–27
50, –25
-40
Figure 5.100 Example System
System Parameters
Generator Rated MVA 90 MVA

Generator Rated Voltage 13.8 kV
PT Ratio (PTR) 120
CT Ratio (CTR) 800
Direct-Axis Synchronous Reactance (Xd) 2.08 p.u. at the generator base
System Reactance (XS)a 0.36 p.u. at the generator base
a Includes the generator step up and the equivalent power system impedance.
We define a scaling factor to be used in the subsequent calculations:
1 MVA
SF = ------------------------------ = 10.42
PTR • CTR
Zone 1 Settings
For this application, set 40P1P as follows:
2 • Rated MVA 2 • 90
40P1P = – --------------------------------------- • SF = – --------------- • 10.42 = – 901.4
X d  pu  2.08
The 40P1DIR default setting is –20 degrees. These settings result in a character-
istic similar to that shown in Figure 5.87.
For this application, the delay and torque-control settings are left at their default
values.

The following Zone 1 settings are applied to the relay:

➤ 40P1P = –901.4
➤ 40P1DIR = –20
➤ 40P1D = 0.25
➤ 40P1TC = NOT LOPZ
Zone 2 Settings
Select a linear characteristic for Zone 2.
From Figure 5.101, we obtain the coordinates for the UEL, which are then trans-
lated to relay settings using SF.
40PUP5 = 75 • 10.42 = 781.3

75 MW, –5 MVAR
40PUQ5 = –5 • 10.42 = –52.1
40PUP6 = 50 • 10.42 = 521
50 MW, –15 MVAR
40PUQ6 = –15 • 10.42 = –156.3
0 MW, –20 MVAR 40PUQ7 = –20 • 10.42 = –208.3
A margin setting of 120 percent is applied. This results in the following Zone 2
characteristic.
72, 0 P (MVA)
20 40 60 80 90, 0 100
LEAD
75, -5
50, -15
–20 UEL
–20 50, -20
–27
50, -25
Q (MVAr)
–40
Figure 5.101 40P Zone 2 Characteristic With Example Settings
Accelerated tripping of Zone 2 is implemented if the positive-sequence voltage

drops to 80 percent of nominal.
13800 V
40PUVP = 0.8 ---------------------- = 53.1 V
3 • 120
For this application, the delay and torque-control settings are left at their default
values.
The following Zone 2 settings are applied to the relay.
➤ 40P2SEG = L
➤ 40PUP5 = 781.3
➤ 40PUQ5 = –52.1
➤ 40PUP6 = 521
➤ 40PUQ6 = –156.3
➤ 40PUQ7 = –208.3
➤ 40PUVP = 53.1
➤ 40P2M = 1.2

➤ 40P2D = 60
➤ 40PAD = 0.25
Zone 3 Settings
The Zone 3 characteristic is defined by the XDGEN, XESYS, and XTXFR set-
tings, all of which are located in Power System Data on page 6.5. In this example,
the following power system parameter settings are applied.
➤ MVAGEN = 90
➤ KVGEN = 13.8
➤ XDGEN = 2.08 pu
➤ XESYS = 0.31 pu
➤ XTXFR = 0.05 pu
For this example, the ratio of (XESYS + XTXFR) / XDGEN is 0.36 / 2.08 = 0.17.
Because this value is greater than 0.1, it is likely that the SSSL can intrude into
the GCC.
An actual SSSL should be accompanied by a significant undervoltage. A value in
the range of 80 percent of nominal can be expected, which is the same as that of
Zone 2.
Pole slipping occurs quickly, so a short delay in the range of 0.25 seconds is war-
ranted.
In this application, an indication that the AVR is in MANUAL is available and
this signal is wired to IN108.
The following Zone 3 settings are applied for the example system.
➤ 40PUVP = 53.1
➤ 40P3D = 0.25
➤ 40P3TC = NOT LOPZ AND IN108
Zone 4 Settings
From Figure 5.100, we obtain the coordinates for the GCC, which are then trans-
lated to relay settings using SF.
0 MW, 54 MVAR 40PQ1 = 54 • 10.42 = 562.68

40PP2 = 30 • 10.42 = 312.6
30 MW, 50 MVAR
40PQ2 = 50 • 10.42 = 521
40PP3 = 64 • 10.42 = 666.9
64 MW, 32 MVAR
40PQ3 = 32 • 10.42 = 333.4
40PP4 = 70 • 10.42 = 729.4
70 MW, 15 MVAR
40PQ4 = 15 • 10.42 = 156.3
40PP5 = 72 • 10.42 = 750.2
72 MW, 0 MVAR
40PQ5 = 0 • 10.42 = 0
40PP6 = 50 • 10.42 = 521.0
50 MW, –20 MVAR
40PQ6 = –20 • 10.42 = –208.3
0 MW, –27 MVAR 40PQ7 = –27 • 10.42 = –281.3
The delay and torque-control settings are left at the default values.

The following settings are applied for the example system.

➤ 40P4SEG = C
➤ 40PQ1 = 562.68
➤ 40PP2 = 312.6
➤ 40PQ2 = 521
➤ 40PP3 = 666.9
➤ 40PQ3 = 333.4
➤ 40PP4 = 729.4
➤ 40PQ4 = 156.3
➤ 40PP5 = 750.2
➤ 40PQ5 = 0
➤ 40PP6 = 521.0
➤ 40PQ6 = –208.4
➤ 40PQ7 = –281.3
➤ 40P4M = 0.95
➤ 40P4D = 60
Dynamic Functionality
In this application, the UEL has a K of 0. Because a measurement of inlet tem-
perature is wired to the relay, configure Zone 4 for dynamic cooling. According
to Figure 5.100, the GCC is at its maximum for a temperature of 60 degrees and
its minimum at 120 degrees. The following settings are applied to the relay:
➤ 40PDAMX = 60
➤ 40PDAMN = 120
➤ 40PK = 0
Because the UEL does not shift with cooling, this feature is disabled for Zone 2.
➤ E40P2D = N
Enable the dynamic capability curve for Zone 4. From Figure 5.100, we obtain
the coordinates for the GCC, which are then translated to relay settings using SF.
0 MW, 70 MVAR 40PQ1D = 70 • 10.42 = 729.4

40PP2D = 36 • 10.42 = 375.1
36 MW, 65 MVAR
40PQ2D = 65 • 10.42 = 677.3
40PP3D = 81 • 10.42 = 844
81 MW, 39 MVAR
40PQ3D = 39 • 10.42 = 406.4
40PP4D = 88 • 10.42 = 917
88 MW, 20 MVAR
40PQ4D = 20 • 10.42 = 208.4
40PP5D = 90 • 10.42 = 937.8
90 MW, 0 MVAR
40PQ5D = 0 • 10.42 = 0
40PP6D = 50 • 10.42 = 521.0
50 MW, –25 MVAR
40PQ6D = –25 • 10.42 = –260.5
0 MW, –27 MVAR 40PQ7D = –27 • 10.42 = –281.3

Impedance-Based LOF Elements
The following settings are applied for the example system.

➤ E40P4D = Y
➤ 40PQ1D = 729.4
➤ 40PP2D = 375.1
➤ 40PQ2D = 677.3
➤ 40PP3D = 844
➤ 40PQ3D = 406.4
➤ 40PP4D = 917
➤ 40PQ4D = 208.4
➤ 40PP5D = 937.8
➤ 40PQ5D = 0
➤ 40PP6D = 521.0
➤ 40PQ6D = –260.5
➤ 40PQ7D = –281.3

A LOF event can occur because of an open or short circuit in the field circuit, an
excitation failure, an operating error, or other events. The response of the genera-
tor to a LOF event is often impacted by generator pre-fault loading and by the
characteristics of the power system at the time. The damage potential is varied.
The generator may begin to slip poles, leading to large pulsating current/torque
and damaging overspeed. Overheating of the rotor can also occur. An LOF event
can also pose a risk to the power system.
The SEL-400G provides an impedance-based element composed of two zones.
Zone 1 is intended to operate with little time delay in the event of a LOF under
full load conditions. Zone 2 reaches farther and operates with a longer time delay.
Zone 2 is intended to trip for LOF conditions that occur under light load condi-
tions.
Because LOF affects all three phases, the condition is a balanced one. Accord-
ingly, the SEL-400G uses applies a positive-sequence impedance measurement to
the zone operating characteristics.
The Zone 1 and Zone 2 characteristics are implemented as offset mho circles. As
shown in Figure 5.102, the SEL-400G supports LOF schemes where both zones
are offset in the negative reactive direction or where Zone 2 has a positive reac-
tive offset. In the latter case, the relay provides a directional element with a setta-
ble angle characteristic.

X X
R
40Z1XD
40Z2XD
Zone R
1 40Z1P 40Z2DIR
Zone Zone 40Z2P
Zone 1 2
2
(A) (B)
Figure 5.102 LOF Operating Characteristic Using (A) a Negative or (B) a

Positive Zone 2 Offset
The Zone 2 element is used together with an undervoltage element to provide

faster tripping when the system voltage is depressed during the LOF condition.
The LOF elements are supervised by the 40Z1TC and 40Z2TC torque-control
settings.
40Z1TC
40Z1
V1ZF Calculate Z1GF Zone 1 Setting
I1GF Z1 40Z1D
Settings 40Z1T
40Z1P 0
I1GFM + 40Z1XD
0.05 • INOMG -
40ZSUP
V1ZFM + 40Z2
1.0 V - Zone 2 Setting
Settings 40Z2D
40Z2P 40Z2T
40Z2XD 0
40Z2DIR
40Z2TC
Figure 5.103 Impedance LOF Logic
Table 5.35 40Z Settings
40Z1P 40Z Zone 1 Diameter OFF, 0.1 to 100  a

13.4 Group
40Z1XD 40Z Zone 1 Offset –50.0 to 0  a
–2.5 Group
40Z1D 40Z Zone 1 Delay 0.00 to 400 s 0.25 Group
40Z1TC 40Z Zone 1 Torque Control SELOGIC NOT LOPZ Group
40Z2P 40Z Zone 2 Diameter OFF, 0.1 to 100  a
13.4 Group
40Z2XD 40Z Zone 2 Offset –50.0 to 50  a
–2.5 Group
40Z2D 40Z Zone 2 Delay 0.00 to 400 s 0.50 Group
40Z2DIR 40Z Zone 2 Directional Angle –20.0 to –5 deg –10 Group
40Z2TC 40Z Zone 2 Torque Control SELOGIC NOT LOPZ Group
a The ranges and default settings shown are for a 5 A CT. Multiply by 5 for 1 A rated CTs.
Set E40 to Z or Z, P to enable 40Z protection elements.

The Zone 1 element typically is applied as a tripping function. Zone 1 diameter

and offset setting guidelines are described in Settings Guidelines on page 5.99.
Set the Zone 1 offset equal to half the generator transient reactance, X'd, in sec-
ondary ohms. Zone 1 LOF tripping is typically performed with short or no time
delay. Use the 40Z1D setting to add any necessary delay.
The 40Z1 Relay Word bit asserts without time delay when the measured positive-
sequence impedance falls within the Zone 1 mho circle defined by the offset and
diameter settings.
The 40Z1T Relay Word bit asserts 40Z1D seconds after 40Z1 asserts.
The Zone 2 element typically is applied as a time-delayed tripping function.
Zone 2 diameter and offset setting guidelines are described in Settings Guidelines
on page 5.99.
Zone 2 LOF tripping typically is performed with a time delay of 0.5 to 0.6 sec-
onds. Set 40Z2D equal to the necessary delay.
The 40Z2DIR setting is hidden when 40ZXD2 < 0.
The 40Z2 Relay Word bit asserts without a time delay when the measured posi-
tive-sequence impedance falls within the Zone 2 mho circle defined by the offset
and diameter settings, and less than the directional supervision line (if used). The
40Z2T Relay Word bit asserts 40Z2D seconds after 40Z2 asserts.
The LOF elements are disabled when the 40Z1TC and 40Z2TC SELOGIC control
equation equals logical 0. The relay allows these elements to operate when the
SELOGIC control equation equals logical 1. This element should be torque-con-
trolled using NOT LOPZ to prevent an operation when the relay detects a loss-of-
potential condition.
Settings Guidelines
Collect the following information to set LOF.
➤ Generator direct axis reactance, Xd, in per unit
➤ Generator transient reactance, X'd, in per unit
➤ Generator-rated line-to-line voltage, in secondary volts (VNOMZ)
➤ Generator-rated phase current, in secondary amperes (INOMG)
➤ When a positive Zone 2 offset is necessary, you also need the
following:
➢ Step-up transformer reactance XTXFR and system reactance
XESYS in secondary ohms at the generator base
➢ Generator-rated power factor
Two methods are available for LOF protection: negative offset Zone 2 and posi-
tive offset Zone 2. Recommendations for both setting methods are provided.
LOF Protection Using a Negative Offset Zone 2

NOTE: The following discussion When setting Zone 2 with a negative offset, it is typical to set the Zone 1 diameter
includes the typical settings applied
for the case that the Zone 2 has a 40Z1P equal to 1.0 per unit impedance.
negative offset. Carry out the required
setting calculations for your particular
VNOMZ
application. 40Z1P = -----------------------------------  sec
3 • INOMG

NOTE: Typically, the Xd is greater The Zone 1 offset, 40Z1XD is typically set to half the generator transient reac-
than 1 per unit impedance. However, if
Xd is less than or equal to 1 per unit tance, X'd, in secondary ohms.
impedance, set the 40Z1P shorter so
that the worst-case stable power
system swing does not enter the –X  d
Zone 1 characteristic. 40Z1XD = ------------  sec
2
Zone 1 LOF tripping is typically performed with little or no time delay.
40Z1D= 0 seconds
The Zone 2 diameter, 40Z2P, is typically set to equal to the machine direct axis
reactance, Xd, in secondary ohms.
40Z2P = X d  sec
The Zone 2 offset, 40Z2XD, is typically set to the Zone 1 offset.
– X d
40Z2XD = ------------  sec
2
Set the Zone 2 time delay, 40Z2D, long enough to avoid an incorrect operation
during a worst-case stable power system swing condition, typically 0.5 to 0.6 sec-
onds or according to the recommendations of the generator manufacturer.
40Z2D = 0.5 seconds
In this case, the 40Z2DIR setting is hidden.
The Relay Word bits 40Z1T and 40Z2T are configured to trip the field breaker
and the generator breaker.
LOF Protection Using a Positive Offset Zone 2

NOTE: The following discussion When setting Zone 2 with a positive offset, set the Zone 1 diameter:
includes the typical settings applied
for the case that the Zone 2 has a
negative offset. Carry out the required – X d
setting calculations for your particular 40Z1P = 1.1 • X d + ------------  sec
application. 2
Set the Zone 1 offset equal to half the generator transient reactance, X'd, in sec-
ondary ohms.
– X d
40Z1XD = ------------  sec
2
Traditionally, the Zone 1 delay for this type of scheme is 0.25 seconds.
40Z1D = 0.25 seconds
Use the direct axis reactance and XS, the sum of the step-up transformer reac-
tance XT and system reactance XSYS, to set the Zone 2 diameter.
40Z2P = 1.1 • X d + X T + X SYS  sec
Use the total reactance of XS to set the Zone 2 offset.
40Z2XD = X T + X SYS  sec

Current Unbalance Elements
Traditionally, the Zone 2 delay for this type of scheme is approximately 60 sec-
onds (it is advisable to conduct system studies to determine the best time delay
when using the positive offset method).
40Z2D = 60.0 seconds
The relay applies a shorter delay if the Zone 2 element picks up at the same time
that the relay detects an undervoltage condition. This logic is discussed in the fol-
lowing text. In this case, the 40Z2DIR setting is necessary. Set 40Z2DIR equal to
–20 degrees or the arc cosine of the minimum rated power factor, whichever is
smaller.
When applying LOF protection with a positive Zone 2 offset, you can use the
time-delayed Zone 1 Relay Word bit, 40Z1T, and the long-time-delayed Zone 2
Relay Word bit, 40Z2T, directly in the generator breaker and field breaker trip-
ping SELOGIC control equations.
Undervoltage Acceleration
The traditional application of this scheme provides accelerated (0.25 second)
Zone 2 tripping in the event of an undervoltage condition occurring during the
LOF. To achieve this accelerated tripping, it is necessary to use a positive-
sequence undervoltage element, (27P1 in this example). Choose the Z terminal
positive-sequence voltage for the operating signal.
27O1 := V1ZM
The undervoltage element is generally set to 80 percent of the nominal voltage
for single-machine buses and 87 percent for multi-machine buses.
0.8
27P1P1 = ------- VNOMZ sec
3
Set the Level 1 delay to 0.25 seconds:
27P1D1 := 0.25
Use the 40Z2 Relay Word bit to torque-control the undervoltage element:
27TC1 := 40Z2
The Relay Word bit, 271P1T, should be used along with the Zone 1 and Zone 2
outputs, 40Z1T and 40Z2T trip the generator.

Generator unbalance current causes induced harmonic heating of the rotor.
IEEE ANSI Standard C50.12 and C50.13 define the ability of generators to with-
stand unbalance current in terms of negative-sequence current. The standard
defines a continuous withstand capability as well as a short-time capability,
expressed in terms of I22 • t.
The SEL-400G provides a negative-sequence definite-time overcurrent element
suitable for unbalance alarm application and a negative-sequence, inverse time-
overcurrent element for unbalance current tripping.

The negative-sequence current in the SEL-400G is calculated as:
3I2GFM
I2GP = ----------------------------------- • 100
3 • INOMGS
where:
INOMGS = the rated current of the generator
Harmonic Heating
Harmonic components also cause rotor heating. Each harmonic induces a compo-
nent that circulates clockwise or counter-clockwise depending on the harmonic
order, n, as shown in Figure 5.104. The harmonic order has value equal to or
greater than 1.
Pos. Seq. Harm. (n) Neg. Seq. Harm. (n)
Frotor = Frotor =
n-1 n+1
Figure 5.104 Frequency of the Induced Rotor Component Because of a Stator

Harmonic
Rotor heating is a function of skin depth which is in turn dependent on the fre-
quency of the induced component. Skin depth on the rotor face and in the damper
bars decreases by 1/(Frotor). Therefore, rotor resistance increases by 1/(Frotor).
The SEL-400G calculates an equivalent negative-sequence current I2GPEQ,
which includes harmonics as high as the 15th and accounts for skin depth. Refer
to Harmonic Meter on page 7.13 for additional information. The following equa-
tion shows the calculations. Harmonics are calculated every 5 seconds.
100 k+1 k–1

I2GPEQ =  -----------------------------------  3I2GFM  +   ------------ 3I2GH k + ------------ 3I1GH k   k = 2 ... 15
2 2 2
 3 • INOMGS  2 2 
k
Equation 5.52
where:
3I2GHk = is the negative-sequence component of the kth harmonic
3I1GHk = the positive-sequence component of the kth harmonic
The SEL-400G provides two elements. The operating quantity for each element
can be selected either as I2GP or I2GPEQ.
Each element has two levels. Level 1 has a definite-time characteristic and is usu-
ally applied to alarm. The Level 1 logic is shown in Figure 5.105.
46QnTC 46Q1n
46QnD1
46QOn 46QnT1
46QnP1 0
In seconds
Figure 5.105 Current Unbalance Level 1 Logic for Element n (Definite Time)

Level 2 has an inverse-time characteristic and is typically applied to trip if the

damage curve is reached (see Figure 5.106). Generally, negative-sequence over-
current tripping is applied to the generator main breaker only. This permits rapid
resynchronization after the system unbalance condition clears.
10000
1000
46Q2T Operating Time (seconds)

46QnK2 = 100
75
100 50
40
30
46QnP2 20
minimum = 2% 10
5
10 2
0.1
0.01
1% 10% 100% 1000% 10000%
I2GP or I2GPEQ (percent of INOM)
Figure 5.106 Current Unbalance Level 2 I22t Operating Characteristic
The 46Qn2 Relay Word bit asserts without time delay when the measured operat-
ing current 46QOn is greater than the element pickup 46QnP2. The 46QnT2
Relay Word bit asserts in a time defined by the time-overcurrent element operat-
ing characteristic of Figure 5.107. The negative-sequence time-overcurrent ele-
ment resets after a fixed linear time of 240 seconds. If an element accumulates 50
percent of the 46QnK2 setting, it resets in 120 s (50 / 100 x 240 s). The 46QnR2
Relay Word bit asserts when the element is fully reset. The 46QnR2 Relay Word
bit can be used to prevent a resynchronization until the heating of the generator
rotor has dissipated.
Figure 5.107 shows the logic for Level 2.
46QnTC 46Qn2
Level 2 I22t
46QOn Curve Timing 46QnT2
Settings
46QnP2 46QnR2
46QnK2
Figure 5.107 Current Unbalance Logic for Element n, Level 2
Table 5.36 Current Unbalance Setting (Sheet 1 of 2)
E46 Enable 46 Element N, 1, 2 N Group

46QOn 46 Element n Operate Quantity I2GP, I2GPEQ I2GP Group
46QnP1 46 Element n Level 1 PU (%) OFF, 2–100 8 Group
46QnD1 46 Element n Level 1 Delay (s) 0.000–1000 s 30 Group

Volt/Hertz Elements
Table 5.36 Current Unbalance Setting (Sheet 2 of 2)
46QnP2 46 Element n Level 2 PU (%) OFF, 2–100 8 Group

46QnK2 46 Element n Level 2 Time Dial (s) 1–100 10 Group
46QnTC 46 Element n Torque Control (SELOGIC Eqn) SELOGIC 1 Group
The following information is typically necessary to calculate the negative-

sequence overcurrent setting:
➤ P2: Generator continuous current unbalance withstand capability,
percent of rated current
➤ K2: Generator negative-sequence current short-time withstand
capability, seconds
Set E46 = 1 or 2 to enable the current unbalance elements. If current unbalance
protection is not necessary, set E46 = N.
Level 1 is typically set to operate less than the continuous unbalance current
capability, P2, This value is specified by the generator manufacturer and is typi-
cally in the range of 8.0–12.0 percent. Set the Level 1 pickup lower than the gen-
erator continuous current unbalance, P2.
Set the 46Q1Dn time delay greater than the maximum time of normal unbalance
current periods, including system phase-fault clearing time. This delay setting
prevents unwanted unbalance current alarms.
Level 2 is typically set to operate greater than the Level 1 pickup and less than or
equal to the continuous unbalance current capability, P2. Disable the level by set-
ting 46Q2Pn = OFF. Set the Level 2 pickup equal to the generator continuous
current unbalance, P2.
The Level 2 time dial is set according to the negative-sequence capability rating,
K2, defined by the generator manufacturer. Set the Level 2 time dial equal to the
generator short-time withstand capability, K2.
You can define conditions that prevent negative-sequence overcurrent element
operation in the 46QTCn torque-control setting. Normally, the negative-sequence
overcurrent elements should be enabled all of the time.
Volt/Hertz Elements
Generators and transformers have a magnetic core. To minimize iron usage, the
core is typically designed to produce a magnetic flux that is close to the limit of
linear operation when the equipment is operated at rated voltage and frequency.
Overexcitation refers to an event that causes the core to saturate. As a result, stray
flux can link to nonlaminated components, causing overheating. Such an event
can be caused by overvoltage, underfrequency, or a combination of the two con-
ditions. The SEL-400G detects overexcitation by calculating the ratio of normal-
ized voltage to normalized frequency (V/Hz). This ratio is proportional to the
level of flux in the core.
The SEL-400G has two elements, each with a selectable operating signal and
torque control. In addition, each element has two levels. In the following descrip-
tion, n refers to the element and can have a value 1 or 2.

Volt/Hertz Elements
The operating signal is selectable for each element using the 24On setting. The
available signals are shown in Table 5.37. Note that the availability of the
VPMAXVF, VV1FM, VV2FM, and VV3FM signals depends on the PTCONV
setting. See Configuration of Current Inputs on page 5.9 for details.
Equation 5.53 shows the operating signal for each element.
24On NFREQ
24RPUn =  ---------------------- •  --------------------- • 100
 VNOMn  FREQn 
Equation 5.53
NOTE: Choosing a nominal voltage Note that VNOMn (where n = 1, 2) in Equation 5.53 corresponds to the nominal
setting equal to the rated voltage of
the protected equipment makes it voltage setting for the selected operating signal, as shown in Table 5.37. For
easier to coordinate the V/Hz element example, if 24On = VPMAXZF, then VNOMn = VNOMZ.
with the manufacturer’s
overexcitation damage curve.
The value, FREQn, is automatically chosen to be the frequency that is used to
track the selected operating signal as shown in the following table. NFREQ is the
nominal frequency (50 or 60 Hz).
Table 5.37 Volts per Hertz Operating Signal and Associated Frequency
24On VNOM FREQn
VPMAXZF VNOMZ Always FREQPG

a
VPMAXVF VNOMV Determined by the ESYSPT and FTSRCV settings
b
VV1FM VNOMV1 Determined by the ESYSPT and FTSRCV1 settings
c
b
a Available when PTCONV = Y, D, or D1.
b Available when PTCONV = 1PH.
c Available when PTCONV = 1PH or D.
See Frequency Tracking on page 5.12 for more details.

Level 1 implements a definite-time characteristic using a conditional timer. This
level may be applied to provide an alarm prior to tripping (via Level 2). The ele-
ment picks up when the operating signal exceeds the pickup setting and the
torque-control input is asserted. The timer resets instantaneously. Once picked
up, the element operates after the timer expires.
24DnD1
(Setting)
24RPUn
24Dn1
24DnP1 24DnT1
(Setting) 0
n = 1, 2
24TCn
Figure 5.108 Volts per Hertz Element n, Level 1 Logic
Level 2 can be configured either with a definite-time characteristic or a user-

defined curve characteristic using the 24CCSn setting. This level is disabled if
24CCSn is set to OFF. The Level 2 definite-time logic is enabled by setting
24CSSn = DD. Two pickup thresholds and two delays are implemented as illus-
trated in Figure 5.109. If 24CSSn = U1 or U2, then Level 2 uses the correspond-
ing user curve. Figure 5.109 shows the Level 2 characteristic.

Volt/Hertz Elements
Time (seconds)
Time (seconds)
Volts/Hertz (%) Volts/Hertz (%)
A) 24CCSn = DD B) 24CCSn = U1 or U2
Figure 5.109 Volts per Hertz Element n, Level 2 Characteristic
The Level 2 definite-time logic is implemented using a stair counter that provides
a memory of previous pickup events. The counter starts to increment once the
operating signal exceeds the pickup setting and the torque-control input is
asserted. Although the counter increments in discrete steps, it is calibrated to
reach its operating limit at the same time as would the Level 1 conditional timer
with the same setting. Figure 5.110 shows the logic.
24DnD21
24RPUn 24Dn21
(Setting)
24DnP21 Stair Counter
(Setting) 24DnT21
0 =
24DnD21 24DnT2
(Setting)
24DnR21
=
0
24Dn22 24DnD22
(Setting)
24DnP22 Stair Counter
(Setting)
0 24DnT22
=
24DnD22
24TCn
(Setting)
(Setting) n = 1, 2
24DnR22 24DnR2
=
0
Figure 5.110 Volts per Hertz Element n, Level 2 Definite-Time Logic
The Level 2 user-defined curve logic is enabled by setting 24CSSn = U1 or U2.

Each user-defined curve consists of as many as 20 points to form the characteris-
tics suitable for most applications. Each element has two output Relay Word bits.
When the element times out, Relay Word bits 24U1T (Element 1) and 24U2T
(Element 2) assert. When the elements reset, Relay Word bits 24U1R (Element 1)
and 24U2R (Element 2) assert. Figure 5.111 shows the logic.
The element begins timing when the operating signal, 24RPUn, is greater than
the first point on the user curve (24Un1011 for Curve 1 and 24Un2011 for
Curve 2). Note that when using the serial terminal, curve points are entered
(SET) and displayed (SHO) as a pair of settings separated by a comma. In this
case, 24Un1011 is the first entry of the setting 24Un101.

Volt/Hertz Elements
24RPUn
24Un1011 EN
(Setting) 24UnT1
Volts per Hertz
24RPUn
24nCCS = U1 or U2 User Curve 1
Settings
24Un1i
24UnTC1 24Un2i
(Setting) 24CR1 24UnR1
24Un2011 EN
(Setting) 24UnT2
Volts per Hertz
24RPUn
24nCCS = U2 User Curve 2
Settings
24Un2i
24UnTC2 24Un2i
(Setting) n = 1, 2 24CR1 24UnR2
i = 01–20
Figure 5.111 Volts per Hz, Element n Level 2, User-Defined Curve Logic
Setting Guidelines
24On (Operating Quantity)
Table 5.38 24On Setting
24Ona 24 Element n Operating Quantity VPMAXZF, VPMAXVFb, VV1FMc, VPMAXZF Group

VV2FMd, VV3FMc
a
n = 1, 2.
b
Available when PTCONV = Y, D, or D1.
c
Available when PTCONV = 1PH.
d
Available when PTCONV = 1PH or D.
Select the operating signal corresponding to the voltage input at the location of
the protected equipment. VPMAXZF and VPMAXVF are the maximums of the
AB, BC, and CA voltages for the respective Z and V inputs.
24TCn (Torque Control)

Table 5.39 24TCn Setting

a
24TCn 24 Element n Torque Control SELOGIC 1 Group
a n = 1, 2.
Use the torque-control setting to specify the conditions for which the definite-
time V/Hz element. must be active. This setting is used both the Level 1 logic and
the Level 2 Definite-Time logic. The default setting is 1.

Volt/Hertz Elements
Composite Curve, (24CCSn)

Table 5.40 24CCSn Setting

a
24CCSn 24 Element n Level 2 Comp. Curve OFF, DD, U1, U2 OFF Group
a n = 1, 2.
Use this setting to select either the definite-time characteristic, user-defined

Curve 1 (24CCSn = U1) or both user-defined Curves 1 and 2 (24CCSn = U2).
Level 1
Table 5.41 Level 1 Settings
24DnP1a 24 Element n Level 1 Pickup 100% to 200% 110 Group

a
24DnD1 24 Element n Level 1 Time Delay 0.04 to 6000 s 10 Group
a n = 1, 2.
Level 1 Pickup (24DnP1)

Set the Level 1 pickup using the 24D1P1 setting. If the nominal voltage setting of
the operating signal is set equal to the rated voltage of the equipment, then the
pickup setting is equivalent to the rated equipment capability (expressed as a per-
centage).
Level 1 Time Delay (24DnD1)

Set the delay (in seconds) for which the timer must run before the 24D1D1 set-
ting asserts the output.
Level 2, Definite Time

Table 5.42 Level 2 Settings
24DnP21a 24 Element n Level 2 Pickup 1 100% to 200% 105 Group

24DnD21a 24 Element n Level 2 Time Delay 1 0.04 to 6000 s 10 Group
24DnP22a 24 Element n Level 2 Pickup 2 101% to 200% 110 Group
a
24DnD22 24 Element n Level 2 Time Delay 2 0.04 to 6000 s 5 Group
a
24CCSn 24 Element n Level 2 Comp. Curve OFF, DD, U1, U2 OFF Group
a n = 1, 2.
Level 2 Pickup 1 and Pickup 2 (24DnP21 and 24DnP22)

These settings are available when Level 2 is configured as a definite-time element
24CCSn = DD. You can use the pickup settings to implement a two-step charac-
teristic, as shown in Figure 5.112.

Volt/Hertz Elements
Level 2 Time Delay 1 and Time Delay 2 (24DnD21 and 24DnD22)

These settings are available when Level 2 is configured as a definite-time element
24CCSn = DD. You can use the delay settings to implement a two-step character-
istic, as shown in Figure 5.112.
NOTE: The 24DnD22 timer setting
must be less than the 24DnD21 timer
setting.
Volts/Hertz (%)
24DnP22
24DnP21
24DnD22
24DnD21
Time (seconds)
Figure 5.112 Two-Step Characteristic
Level 2, User-Defined Curve

Table 5.43 Level 2 User-Defined Curve Settings
24UnNP1a 24 Element n No. of Point on User 1 3 to 20 10 Group

Curve (3–20)
24Un1ia, b 24 Ele. n Cur. 1, Pnt. i (100-200%, 100% to 200%, 0.04 to 6000 s 112, 6000 Group
0.040–6000 s)
24UnCR1a 24 Element n Curve 1 Reset Time 0.01 to 400 s 0.01 Group
(0.010–400 s)
24UnTC1a 24 Element n Curve 1 Torque Control SELOGIC control equation 1 Group
(SELOGIC Eqn)
24nUNP2a 24 Element n No. of Point on User 2 3 to 20 10 Group
Curve (3–20)
24Un2i2a, b 24 Ele. n Cur. 2, Pnt. (100–200%, 100% to 200%, 0.04 to 6000 s 112, 6000 Group
0.040–6000 s)
24UnCR2a 24 Element n Curve 2 Reset Time 0.01 to 400 s 0.01 Group
(0.010–400 s)
24UnTC2a 24 Element n Curve 2 Torque Control SELOGIC control equation 1 Group
(SELOGIC Eqn)
a
n = 1, 2.
b i = 01–20.

Volt/Hertz Elements
Number of Data Points on User-Defined Curves 1 and 2 (24UnNP1 and

24UnNP2)
NOTE: Manufacturers data are often Enter the number of points for the curve. Because the relay calculates the time
provided on a semi-log plot to show
time over a wide range. The relay uses after linear interpolation of the V/Hz values, enter as many points as possible for
linear interpolation to calculate values accurate element operate time.
between datapoints. Check
coordination between the V/Hz
element and the manufacturers curve,
using both a linear and a semi-log plot
to confirm adequate margin.
Data Points for User Curves 1 and 2 (24Un1i and 24Un2i)

Enter the data point here to form the user-defined curve. Data points are entered
in order of increasing V/Hz value. When entering the curve settings using the ter-
minal interface, the data point format is <volts per hertz>(comma)<time> (e.g.,
115,30). The units are volts per hertz in percent and time in seconds.
NOTE: User-defined curve data The V/Hz value of the first entry defines the minimum pickup of the element.
points must be entered in order of
increasing V/Hz values. The time value of the last entry defines the minimum operating time of the ele-
ment.
For example, assume that you obtain the V/Hz characteristic in Figure 5.113
from a transformer manufacturer and pick three points from the curve.
140
140%, 0.15 minutes
135
130
Volts/Hertz (%)
125
120
115%, 6.5 minutes

115
110 112%, 100 minutes

0.1 1 10 100
Time (minutes)
Figure 5.113 Manufacturer V/Hz Curve
Figure 5.114 shows an example of a programmed curve from entry of only the
three points shown in the previous figure. Clearly, this programmed curve is
much different from the original curve, and the transformer is under-protected.

Volt/Hertz Elements
112%, 6000 seconds

6000
5000
4000
Time (seconds)
3000
2000
1000
115%, 390 seconds
140%, 9 seconds
110 115 120 125 130 135 140
Volts/Hertz (%)
Figure 5.114 Three-Point Curve
Figure 5.115 shows a programmed curve, obtained after entry of 10 points,

superimposed onto the manufacturer’s curve. With more points, the programmed
curve more closely follows the manufacturer’s curve.
6000
5000
24U1101 = 112, 6000
24U1102 = 113, 1709
4000 24U1103 = 114, 850
24U1104 = 115, 454
24U1105 = 116, 242
Time (seconds)
24U1106 = 117, 149

3000 24U1107 = 118, 98
24U1108 = 121, 49
24U1109 = 130, 17
2000 24U1110 = 140, 9
1000
110 115 120 125 130 135 140
Volts/Hertz (%)
Figure 5.115 Ten-Point Curve
User-Defined Curves 1 and 2 Reset Time (24UnCR1 and 24UnCR2)

Specify the curve reset time with this setting. This setting is only an absolute
value if the element has timed out. If there is interruption of the curve timing,
then the reset time is proportional to the elapsed time. For example, assume
Curve 1 is used and an overexcitation condition occurs on the system and the
Curve 1 starts timing. At the 60 percent mark, the system overexcitation condi-
tion disappears and Curve 1 stops timing. Because the timing interruption was at
the 60 percent mark, the reset time is also 60 percent of the 24UnCR1 setting.

Split-Phase Protection
User-Defined Curves 1 and 2 Torque Control (24UnTC1 and 24UnTC2)

Use the torque-control setting to specify conditions under which the user-defined
curve must be active. The default setting is 1. Note that each curve has a dedi-
cated torque-control equation, as shown in Table 5.46.
Although split-phase protection can detect many types of stator faults, it is typi-
cally applied for detection of turn-to-turn faults. The current flowing in a shorted-
turn can be significant usually six to eight times of rated current and damage can
occur quickly.
The stator windings of large synchronous generators are generally constructed
either from multi-turn coils or Roebel bars (single-turn coils). The latter method
is more common for generators larger than 50 MVA.
The stator is often constructed from multiple parallel branches per phase. This
allows the winding to accommodate the rated current without the need for large
stator slots. Hydro generators, because of their lower speed of rotation, often
have many parallel branches.
If the turn voltage is relatively large and the number of parallel branches is rela-
tively low, as in the case for a large turbo generator, voltage-based protection may
detect a single shorted turn. These functions include the fundamental neutral
overvoltage element (64G1) and the negative-sequence directional element
(32Q). Turbo generators usually are not equipped with split-phase CTs.
Consider the example in Figure 5.116. The winding has four parallel branches
and is constructed from multi-turn coils. Assume that a single turn is shorted, as
shown in Figure 5.116.
Nominal power: 65 MVA

Nominal voltage: 13.8 kV
Nominal current: 2719 A
Base Impedance: 2.93 
Leakage reactance: 0.15 pu
Number of parallel branches: 4
Number of coils: 33
Turns per coil: 4
1.76
1.76
1500 : 5A
1.76
1500 : 5A
1.76 ISP = 0.115 A

secondary
IC = 25.9 A
primary
Figure 5.116 Equivalent Circuit for a Single-Turn Fault in a Machine

The voltage across a single turn is:
13800
V TURN = ----------------------------- = 60.4 V
3 • 4 • 33
Equation 5.54
Because there are four parallel branches, the branch impedance is approximated
four times the leakage reactance:
Z B = 4 • 2.93  • 0.15 = 1.76 

Equation 5.55
The circulating current is:
60.4
I C = ---------------------------------------------------- = 25.8 A
1.76
 1.76 – 0.013  + ----------
3
Equation 5.56
The split-phase current is:
5 25.8 • 1.76
I SP = 2 • ------------ • --------------------------- = 0.115 A
1500 1.76
1.76 + ----------
2
Equation 5.57
Note that the split-phase current can be quite low.

The pickup setting of the split-phase protection must be set greater than the
steady-state value. In the past, a margin of 150 percent has been applied. The
existence of circulating currents in the winding makes it more difficult to deter-
mine optimal settings. To address this issue, conduct periodic field measurements
of the currents and compare with those of the existing split-phase settings. If the
magnitude of the circulating currents found from the measurements has increased
significantly over time, revise the relay settings accordingly. Measurement of the
highest split-phase current is usually found at the maximum operating voltage
and current but can also occur for an unloaded machine under high voltage.
The split-phase current should be recorded over a reasonably long period, such as
18 months, followed by spot checks taken approximately every 6 months in the
succeeding years. SEL recommends placing the 6-month checks at the points
when the established split-phase current reaches its minimum and maximum over
its repetitive cycle.
Figure 5.117 shows an example of the variation in split-phase current for a gener-
ator over an 18 month period.

1.4
1.2
Secondary Current (A)

1.0
Split-Phase
0.8
0.6
0.4
0.2
l
n
p
p
r
v
v
y
Ju
Ju
Ma
No
No
Se
Ma
Se
Ja
Time (Months)
Figure 5.117 Split-Phase Current Variation Over Time
In some generators, the split-phase current may exhibit a significant transient

response during an external fault. Time coordination may be necessary in such
cases to avoid a misoperation.
The SEL-400G provides two split-phase functions. The 60P function can be
applied to a three-phase split-phase CT, and the 60N function can be applied to
an inter-neutral CT, as shown in Figure 5.118. Because the inter-neutral CT does
not respond to load, it can have a much lower ratio and provide greater sensitiv-
ity. On the other hand, the 60P function provides an indication of the faulted
phase. The 60P function provides a unique pickup setting for each phase.
Split Phase Interneutral

CT CT
3 1
60P 60N
Figure 5.118 Split-Phase Protection Functions
Each function is enabled by selecting an operating signal through use of the E60P
and E60N settings, as shown in Figure 5.119. Select N to disable the function.
NOTE: The EADVS setting must be
set to Y before the split-phase E60P Setting Setting
and/or E60N can be enabled. E60P E60N
0
IpSFM 0
IpTFM IY1FM
IpUFM I60PpFM I60NFM
IY2FM
IpWFM IY3FM
IpXFM p = A, B, C
IpYFM
Figure 5.119 60P and 60N Operating Signal Selection
Each function consists of two levels: a high-set level and an adaptive low-set
level.
The 60P and 60N high-set levels are shown in Figure 5.120. If the split-phase
current is greater than the pickup setting and the torque control is asserted, the
level will trip after Timer t1 expires. Both levels include a secure tripping path
that introduces an additional Timer t2. This timer is factory-set at 0.5 seconds.

Transition to the secure tripping path is controlled by the 60PpHSS and 60NHSS
SELOGIC variables. The default setting for the 60PpHSS setting is CONp1. The
default setting for the 60NHSS setting is CON1. These bits will assert during
external faults.
NOTE: It is possible that a severe
event, such as the short of a 60PpHS
significant portion of a branch, will Setting
also assert the CON1 Relay Word bits. Setting 60SSD
For this reason, SEL recommends that 60PHD
the split-phase functions be applied in t2
conjunction with the 64G1 and 67Q I60PpFM
functions. t1 0 1
Settings
60PpHT
60PpHP 0 0
60PHTC
p = A, B, C Setting
60PpHSS
60NHS
Setting
Setting 60SSD
60NHD
t2
I60NFM
t1 0 1
Settings
60NHT
60NHP 0 0
60NHTC
Setting
60NHSS
Figure 5.120 60P and 60N High Set Levels
The adaptive low-set levels are intended for use when there is a split-phase cur-
rent under normal operation that compromises the effectiveness of the high-set
function. This can occur in machines that produce a low split-phase current for a
single-turn fault. Consider using the adaptive low-set levels when the normal
variation in the split-phase current is significant and the expected current for a
shorted turn is low. The adaptive low-set level should be used in conjunction with
the high-set level.
NOTE: SEL recommends the use of The adaptive offset logic provides better sensitivity by tracking the value of the
the low-set function initially in a
monitoring mode (not tripping). The offset and subtracting this value from the operating signal. A low-pass filter is
output of the low-pass filter should be used to track the offset.
monitored to confirm that it is closely
tracking the split-phase current and
that there are no spurious assertions
If a level is picked up, the output of its filter is frozen to prevent the level from
of the function. adapting to the fault.
The logic also incorporates reset inputs, 60PLR and 60NLR, to force the output
of a filter equal to the input. This may be required to account for a fast change in
the split-phase current that could occur, for instance, when the machine is con-
nected or disconnected from the power system. Assertion of the reset input takes
precedence over the freeze input.
The logic is shown in Figure 5.121. Operation is the same as that of the high-set
levels except for the addition of the low-pass filter logic.

60PpLS
Setting
Freeze the Setting 60SSD
Output
60PLD
I60PpFM Low-Pass 60PpOF I60PpOP t2
Filter t1
Settings 0 1
Set the Output 60PpLT
60PLR Equal to 0 0
the Input
60PpLP p = A, B, C Setting
60PLTC 60PpLSS
60NLS
Setting
Freeze the Setting 60SSD
Output
60NLD
I60NFM Low-Pass 60NOF I60NOP t2
Filter t1
Settings 0 1
Set the Output 60NLT
60NLR Equal to 0 0
the Input
60NLP Setting
60NLTC 60NLSS
Figure 5.121 60P and 60N Low Set Levels
60PAHS 60PHS 60PAHT 60PHT

60PBHS 60PBHT
60PCHS 60PCHT
60PS 60PT
60PALS 60PALT
60PLS 60PLT
60PBLS 60PBLT
60PCLS 60PCLT
60NHS 60NHT
60NS 60NT
60NLS 60NLT
Figure 5.122 Output Logic
Setting Guidelines
Table 5.44 Split-Phase Settings (Sheet 1 of 2)

a, b
E60P Enable 60P Split-Phase Element N, S, T, U, W, X, Y N Group
60PpHP 60P High Set Lvl Ph [p] Pickup (A,sec) OFF, 0.10–100 OFF Group
60PHD 60P High Set Lvl Delay (s) 0.000–400 0.005 Group
60PpHSS 60P High Set Lvl Ph [p] Switch to Sec SV CONp1 Group
60PHTC 60P High Set Lvl Torque Control SV 1 Group
60PpLP 60P Low Set Lvl Ph [p] Pickup (A,sec) OFF, 0.10–100 OFF Group
60PLD 60P Low Set Lvl Delay (s) 0.000–400 0.005 Group
60PLR 60P Low Set Lvl Reset (SELogic Eqn) SV NA Group
60PLT 60P Low Set Lvl Time Constant (s) 1–2400 100 Group
60PpLSS 60P Low Set Lvl Ph [p] Switch to Sec SV CONp1 Group
60PLTC 60P Low Set Lvl Torque Control SV 1 Group
E60N Enable 60N Split-Phase Element N, Y1, Y2, Y3 N Group
60NHP 60N High Set Lvl Pickup (A,sec) OFF, 0.10–100 OFF Group
60NHD 60N High Set Lvl Delay (s) 0.000–400 0.005 Group

Table 5.44 Split-Phase Settings (Sheet 2 of 2)
60NHSS 60N High Set Lvl Switch to Secure SV CON1 Group

60NHTC 60N High Set Lvl Torque Control SV 1 Group
60NLP 60N Low Set Lvl Pickup (A,sec) OFF, 0.10–100 OFF Group
60NLD 60N Low Set Lvl Delay (s) 0.000–400 0.005 Group
60NLR 60N Low Set Lvl Reset SV NA Group
60NLT 60N Low Set Lvl Time Constant (s) 1–2400 100 Group
60NLSS 60N Low Set Lvl Switch to Secure SV CON1 Group
60NLTC 60N Low Set Lvl Torque Control SV 1 Group
a
W is unavailable if EGNCT contains W.
X is unavailable if EGNCT contains X.
b m is unavailable if ESYSCT contains m, where m = S, T, U, or Y.
E60P, E60N (Enable Split-Phase Element)

This setting enables the function and specifies the current terminal connected to
the split-phase or inter-neutral CT.
60PpHP, 60NHP (High-Set Level Pickup)

The pickup setting should be lower than the current expected for a single shorted
turn and higher than the maximum current during normal operation. If both crite-
ria cannot be met, consider enabling the adaptive low-set level as well. In this
case, the high-set level acts as a backup to the low-set level.
Generators that have undergone temporary repairs can have normal split-phase
currents that differ significantly among the three phases. For this reason, a pickup
setting is provided for each phase.
60PHD, 60NHD, 60PLD, 60NLD (Delay)

The delay setting should be set long enough to last through transient variations in
split-phase current. The duration of a transient may be significant depending on
the generator. Consider a delay in the range of 100 ms. Note that the level
includes a secure path, which adds an additional tripping delay. This value is fac-
tory-set at 500 ms.
60PpHSS, 60NHSS, 60PpLSS, 60NLSS (Switch to Secure Trip Path)

These settings control switching to the secure tripping path. The 60P level has a
default values of CONp1 and the 60N has a default of CON1. These Relay Word
bits are associated with the Zone 1 differential element. This element must be
enabled for these Relay Word bits to be active. The CONp1 bits will assert when
an external fault associated with Phase p is detected. The CON1 Relay Word bit
will assert if an external fault is detected for any of the three phases.
60PHTC, 60NHTC, 60PLTC, 60NLTC (Torque Control)

The torque-control setting can be typically left at the default setting of 1. Some
generators may experience an increase in split-phase current when the generator
terminal voltage is high. The torque-control setting can be used to inhibit opera-
tion in such circumstances.

System Backup Protection
60PpLP, 60NLP (Low Set Pickup)

Use this setting to enable the low set element when the normal variation in the
split-phase current exceeds the current expected for a single shorted turn. The
low set element should be used in conjunction with the high set element.
Generators that have undergone temporary repairs can have normal split-phase
currents that differ significantly among the three phases. For this reason, a pickup
setting is provided for each phase.
60PLR, 60NLR (Low Set Level Reset)

Use this setting to force the output of the low-pass filter to equal the input. This
may be required to account for a fast change in the split-phase current that could
occur, for instance, when the machine is connected or disconnected from the
power system. It may be necessary to extend the reset signal by using a dropout
timer in SELOGIC.
60PLT, 60NLT (Low Set Level Time Constant)

This setting determines how quickly the low-pass filter follows the variation in
split-phase current. This setting may be tuned during the initial monitoring
period. For example, spurious pickups may require a shorter setting. If a turn
fault occurs, the current is expected to change quickly. Once picked up, the out-
put of the filter is frozen. Therefore, there is no significant risk associated with a
short time constant.

The SEL-400G provides three functions for system backup protection: a phase
distance element, a voltage-restrained, time-overcurrent element, and a voltage-
controlled, time-overcurrent element. One of these elements is typically selected
for backup protection in the event of an uncleared fault on the system side of the
step-up transformer. The EBUP setting controls which of these elements is
enabled. Each element may be selected individually.
Table 5.45 System Backup GSU Compensation Angle Settings
EBUP Enable System Backup Protection N, 51C, 21P Group

51V, 21P
GSUCA GSU Compensation Angle 0, –30, 30 30 Group
The relay applies the following compensation to the voltages and currents to
maintain the correct reach through the GSU. The compensated voltages and cur-
rents are used by the 21P and 51V functions.
VABZFC VABZF
VBCZFC =  tv  • VBCZF
VCAZFC VCAZF
Equation 5.58

IABGFC IAGF
IBCGFC =  tc  • IBGF
ICAGFC ICGF
Equation 5.59
Where VppZFC is the voltage at the generator terminals, IpGF is the current at
the generator neutral, and tv and tc are defined in Table 5.46.
Table 5.46 System Backup Compensation Matrices
GSUCA tv tc
0
1 0 0 1 –1 0
0 1 0 0 1 –1
0 0 1 –1 0 1
+30
1 0 –1 1 0 0
1
------- • – 1 1 0 3• 0 1 0
3
0 –1 1 0 0 1
–30
1 –1 0 0 –1 0
1
------- • 0 1 –1 3• 0 0 –1
3
–1 0 1 –1 0 0
When the backup element is set to respond to phase faults on the high side of a
delta-wye transformer and the system phase-to-neutral voltage phase angle leads
the generator phase-to-neutral voltage phase angle by 30 degrees, set
GSUCA = –30°. When the system phase-to-neutral voltage phase angle lags the
generator phase-to-neutral voltage phase angle by 30 degrees, set
GSUCA = +30°.
Phase Distance Element

The SEL-400G provides a two-zone distance element designed for backup dis-
tance protection for system phase-to-phase and three-phase faults. Each zone is
equipped with independently settable forward reach, resistive blinder reach, and
definite-time delay settings. The element is enabled by selecting EBUP = 21P.

X (ohm sec)
21PZ2MP
21PZ2RP
Zone 2
Trip
Region
21PZ1MP
Zone 1
Trip Region
21PZ1RP
R (ohm sec)
21PZOFF 21PANG
Figure 5.123 Backup Distance Element
The reach in the forward direction along the angle 21PANG is calculated as:
2 j21PANG
VppZFCM + 21POFF • Re  VppZFC* • IppGFC • e 
MppF = -------------------------------------------------------------------------------------------------------------------------------------------------------------------
MppDF
Equation 5.60
The reach in the direction of the resistive axis is calculated as:
j21PANG
Im  VppZFC •  IppGFC • e * 
RppF = ------------------------------------------------------------------------------------------------------
j21PANG
Im  IppGFC •  IppGFC • e * 
Equation 5.61
j21ANG 2
MppDF = R e  e • IppGFC • VppZFC*  + 21POFF • IppGFCM
Equation 5.62
where:
VppZFC = the compensated voltages. See Equation 5.58.
IppGFC = the compensated currents. See Equation 5.59.
pp = AB, BC, and CA
Figure 5.124 uses the reach calculations. The logic for the AB loop is shown. The
other two loops are similar.

21PABnP
IABGFCM (setting)
21PZnD 21PABnT
0.1 • INOMG 0
MABDF
Setting 21PBCnT
21PZnMP 21PZnT
MABF 21PCAnT
Setting
21POFF –1
Setting
21PZnRP
RABF
21PRABn
–1
21PZnRP = OFF
SELOGIC
21PZnTC
Figure 5.124 Backup Distance, Zone n Logic (AB Loop Shown)
Table 5.47 Backup Distance Settings
21PZnMP 21P Zone n Reactive Reach OFF, 0.05–100 sec. ohma 8 Group
a
21PZnRP 21P Zone n Resistive Reach OFF, 0.05–100 sec. ohm 8 Group
21PZnD 21P Zone n Delay 0.00–400 seconds 10 Group
21PZnTC 21P Zone n Torque Control SELOGIC NOT LOPZ AND Group
NOT ZLOAD
21PANG 21P Zone Characteristic Angle 45–90 degrees 88 Group
a
21POFF 21P Zone Offset Impedance 0.0–10 sec. ohm 0 Group
a
The ranges shown are for a 5 A CT. Multiply by 5 for 1 A rated CTs.
The characteristic angle setting, 21PANG, is common to both zones and should
be set according to the angle of the transformer and the angle of the power system
covered by the longest reaching zone.
The 21POFF setting is common to both zones and corresponds to the element
reach in the reverse direction. It is typically set equal to the generator impedance
(in secondary ohms) to ensure element operation for a three-phase fault at the
generator terminals.
NOTE: Select an offset impedance, Reach settings are in secondary ohms and delay settings are in seconds. In a typi-
21POFF, equal to 10 percent of the
shortest reach setting to ensure for cal application, you might set the Zone 1 pickup, 21PZ1MP, to reach into the
dependable operation for zero-ohm GSU transformer and, with shorter time delay for 21PZ1D, protect the phase-to-
faults at the isolated phase bus.
phase and three-phase faults external to the generator differential zone to as far as
the transformer delta winding. You can then set the Zone 2 element pickup,
21PZ2MP, to reach through the step-up transformer into the system and use a
longer time delay for 2P1Z2D.
NOTE: This element is not intended Alternatively, you can set the Zone 1 element to provide backup protection for
to be used for applications that
require instantaneous operation and faults on the high-side bus with a coordinating time delay and set the Zone 2 ele-
control of transient overreach. When ment with a long reach and a long time delay for breaker failure backup protec-
applied with no time delay, allow for a
transient overreach of as much as 30
tion.
percent.

Each zone includes the torque-control equation 21PZnTC. This equation should
include NOT LOPZ to disable the distance elements for a loss of potential. In
addition, you can supervise the zone from the load-encroachment function to pro-
vide three-phase element security under maximum generator loading conditions
by including NOT LOPZ AND NOT ZLOAD in the torque-control equation (see
Load-Encroachment Logic on page 5.126).
Controlled Inverse Time-Overcurrent Element

The controlled, inverse time-overcurrent element, 51C, can be configured to use
voltage to account for the decrement of the generator fault current that occurs as
the generator impedance transitions from the sub-transient, to the transient and
finally to the synchronous value. At its final value, the generator fault current
may be less than the generator rated current. The 51C will not operate until there
is an undervoltage at the terminals of the generator. This condition enables an
inverse time-overcurrent element, which can have a low pickup setting. Enable
this element by selecting EBUP = 51C.
The 51C overcurrent element includes a settable pickup, curve shape, and time-
dial. Ten curve shapes are available. Curves U1–U5 emulate the popular North
American induction disk relays. Curves C1–C5 emulate popular European ana-
log time-overcurrent relays. Operating characteristics of the available curves are
shown in Figure 5.214–Figure 5.216.
When you set 51CRS = Y to enable electromechanical reset emulation, the relay
provides a slow reset that is dependent on the amount of current measured, simi-
lar to an induction disk relay reset. When you select N, the relay fully resets the
time-overcurrent element one cycle after current drops below the pickup setting,
similar to analog and many microprocessor-based time-overcurrent relays. Select
Y or N to match the operating characteristic of other time-overcurrent protection
protecting the system near this generator.
The element is also equipped with a torque-control setting. When the equation
result is logical 1, the element can operate. When the result is logical 0, the ele-
ment cannot operate. Use other protection elements, logic conditions, or control
inputs to supervise these elements if necessary.
Relay
Word Bits Relay
Word Bits
51CA
51CB 51C
51CC
Setting Inverse-Time Curve Timing
51CAT
Settings
51CCP 51CBT 51CT
1 51CP Pickup
IAGFM 51CC Curve Type 51CCT
0
SELOGIC 0 51CTD Time Dial 51CAR
51CRS Electromechanical 51CR
51CTC reset? (Y,N) 51CBR
51CCR
Figure 5.125 51C Controlled, Overcurrent Element (A Loop Shown)
Table 5.48 Voltage-Controlled Time-Overcurrent Settings
51CCP 51C Inv. Time O/C Pickup OFF, 0.25–16 A 2a Group

51CC 51C Inv. Time O/C Curve U1–U5, C1–C5 U1 Group
b
51CTD 51C Inv. Time O/C Time Dial 0.50–15 0.5 Group

Table 5.48 Voltage-Controlled Time-Overcurrent Settings
51CRS 51C Inv. Time O/C E/M Reset Y, N N Group

51CTC 51C Inv. Time O/C Torque Control SELOGIC NOT LOPZ Group
a
Ranges and default settings shown are for 5 A CT. Divide by 5 for 1 A rated CTs.
b Setting range shown is for U.S. curves. Range is 0.05–1.00 for the IEC curves.
Undervoltage Supervision
Use an undervoltage element to achieve voltage-controlled tripping. In this exam-
ple, we configure the 27P1 element to respond to the Z terminal, minimum
phase-to-phase voltage. Choose the 27P1 operating signal as:
27O1 = VPMINkF
The undervoltage element is generally set to 80 percent of the nominal voltage
for single-machine buses and 87 percent for multi-machine buses.
VGEN
27P1P1 = 0.8 • ----------------- V sec
3
where VGEN is the rated generator voltage in secondary volts.
Use the pickup Relay Word bit to torque-control the 51C. In this case, the curve
setting 27P1C1 and the delay setting 27P1D1 are not important and can be left at
their default values.
To prevent misoperation if a potential transformer fuse blows, the element is
torque-controlled by the NOT LOPZ Relay Word bit.
27TC = NOT LOPZ
Assign the undervoltage pickup to torque-control the 51C:
51CTC = 271P1
With the previous settings, the 51C element is enabled whenever the generator
voltage is less than 80 percent of generator nominal voltage, as long as there is no
simultaneous loss-of-potential condition. You can choose to use a different
undervoltage element pickup setting.
Set the 51CP pickup setting less than the generator fault duty, IP, which you can
calculate by using the generator steady-state reactance, Xd (you can use transient
reactance X'd if the generator excitation system supports higher fault voltage and
current). This value may safely be below maximum load, because the element is
only enabled during low-voltage fault conditions. Divide the generator fault duty
by the phase current transformer ratio, CTRG, to find the element pickup current
in secondary amperes.
IP
51CP  -----------------
CTRG
where CTRG is the CT ratio of the input assigned to EGNCT (W or X).
Select a curve shape and time-dial that allow this element to coordinate with the
system primary protection. For example:
51CC = U2
51CTD = 3.00

Operating characteristics of the available curves are shown in Figure 5.214–

Figure 5.216.
Apply electromechanical reset emulation if the system phase overcurrent relays
are induction disk relays; otherwise, electromechanical reset emulation is not
necessary.
51CRS = N
Voltage-Restrained Phase Time-Overcurrent Element

The operation of the voltage-restrained phase time-overcurrent element, 51V, is
different from 51C in that the element pickup setting is reduced automatically as
the generator phase-to-phase voltage decreases during a fault. When the genera-
tor voltage is 100 percent of the VNOMZ setting, the 51V overcurrent element
operates based on 100 percent of its pickup setting, 51VP. As the generator
phase-to-phase voltage drops, the relay decreases the element pickup by a like
amount, down to 12.5 percent of nominal phase-to-phase voltage. For voltages
below 12.5 percent, the relay uses a pickup that is 12.5 percent of the 51VP set-
ting. The element is enabled by selecting EBUP = 51V.
100
50
51VP Setting
25
12.5
12.5 25 50 100
Selected Phase-to-Phase Voltage
(percent of VNOMZ)
Figure 5.126 51VP Setting Reduction
The overcurrent elements include a settable pickup, curve shape, and time-dial.
Ten curve shapes are available. Curves U1–U5 emulate the popular North Amer-
ican induction disk relays. Curves C1–C5 emulate popular European analog
time-overcurrent relays. Operating characteristics of the available curves are
shown in Figure 5.214 through Figure 5.216.
When you set 51VRS := Y to enable electromechanical reset emulation, the relay
provides a slow reset that is dependent on the amount of current measured, simi-
lar to an induction disk relay reset. When you select N, the relay fully resets the
time-overcurrent element one cycle after current drops below the pickup setting,
similar to analog and many microprocessor-based time-overcurrent relays. Select
Y or N to match the operating characteristic of other time-overcurrent protection
protecting the system near this generator.
Each of the elements is also equipped with a torque-control setting. When the
equation result is logical 1, the element can operate. When the result is logical 0,
the element cannot operate. Use other protection elements, logic conditions, or
control inputs to supervise these elements if necessary.

Relay
Adjusted Word Bits Relay
Pickup Word Bits
Setting 51VA
Setting 51V
51VCP Pickup 51VB
(AB Loop)
Adjustment Inverse-Time Curve Timing 51VC
VABZFC (See q) 51VAT
Settings
51VBT 51VT
1 51VC Curve Type
IABGFC 51VTD Time Dial 51VCT
0
SELOGIC 0 51VRS Electromechanical 51VAR
51VTC reset? (Y,N) 51VR
51VBR
51VCR
q Figure 5.126.
Figure 5.127 Voltage-Restrained, Phase Overcurrent Element (AB Loop Shown)
Table 5.49 Voltage-Restrained Time-Overcurrent Settings
51VP Voltage Restrained Overcurrent Pickup OFF, 2.00–16 A 2a Group

51VC Voltage Restrained Overcurrent Curve U1–U5, C–C5 U1 Group
b
51VTD Voltage Restrained Overcurrent Time Dial 0.50–15 0.5 Group
51VRS Voltage Restrained Overcurrent Reset Y, N N Group
51VTC Voltage Restrained Overcurrent Torque Control SELOGIC NOT LOPZ Group
a Ranges and default settings shown are for 5 A CT. Divide by 5 for 1 A rated CTs.
b
Setting Range shown is for U.S. curves. Range is 0.05–1.00 for the IEC curves.
Set the 51VP pickup setting greater than the maximum generator phase current
expected at rated generator voltage. Divide this current by the phase current
transformer ratio, CTRG, to find the element pickup current in secondary
amperes.
Max Load Current

51VP  --------------------------------------------
CTRG
where CTRG is the CT ratio of the input assigned to EGNCT (W or X).
Select a curve shape and time-dial that allow this element to coordinate with the
system primary protection.
51VC = U2
51VTD = 3.00
Operating characteristics of the available curves are shown in Figure 5.214
through Figure 5.216.
Apply electromechanical reset emulation if the system phase overcurrent relays
are induction disk relays; otherwise, electromechanical reset emulation is not
necessary.
51VRS = N
Because this element reduces its pickup setting automatically as generator volt-
age decreases, the element should not be permitted to operate if there is a blown
potential transformer fuse condition. To prevent misoperation if a potential trans-
former fuse blows, the element is torque-controlled by the NOT LOPZ Relay
Word bit.
51VCT = NOT LOPZ

Load-Encroachment Logic
With the previous settings, the 51V element is enabled as long as there is no loss-
of-potential condition.
The load-encroachment function can be used to supervise the backup phase dis-
tance protection (21P) elements or the phase overcurrent (50P) elements. This
allows the 21P and 50P to be set independent of the load. Two independent posi-
tive-sequence impedance characteristics monitor the positive-sequence load
impedance (Z1GFM) for both export and import load. Figure 5.128 illustrates the
load-encroachment settings and corresponding characteristics in the positive-
sequence impedance plane.
Relay Word bit ZLOUT indicates that load is flowing out with respect to the
relay (an export or generating condition) and the apparent impedance lies within
the shaded region.
Relay Word bit ZLIN indicates that load is flowing in with respect to the relay
(an import or motoring condition) and the apparent impedance lies within the
shaded region.
(90°)
X1
ZLIN ZLOUT
(Load In (Load Out
Region) PLA
R F Region)
PLA
(180°) (0°)
NLA R1
NLAR F
ZLF
ZLR
(270°) (—90°)
Figure 5.128 Load Encroachment Characteristics
Figure 5.129 illustrates the load-encroachment logic. The logic operates only if
the positive-sequence generator current (I1GFM) is greater than the positive-
sequence threshold (10 percent of the nominal relay current).

Setting
NLAF
Z1GFA
Setting
Relay
PLAF Setting Word
Bits
ZLF Load Out
Z1GFM ZLOUT
ZLOAD
I1GFM
INOMG • 0.1
Setting Load In
Settings ZLIN
ZLR
PLAR
If EGNCT has W, INOMG = INOMW
If EGNCT = X, INOMG = INOMX
NLAR
Figure 5.129 Load Encroachment Logic
Setting Guidelines
The load-in region of the load encroachment characteristic is not required for
generators that are not operated as pump storage units, because no pump storage
unit will import sufficient current to meet the minimum current requirements that
will enable the load encroachment logic
Table 5.50 Load Encroachment Settings
ELOAD Load Encroachment Y, N N Group

a
ZLF Forward Load Impedance 0.05–64.00 sec. ohm 9.22 Group
ZLR Reverse Load Impedance 0.05–64.00 sec. ohma 9.22 Group
PLAF Forward Load Positive Angle –90.0 to 90 degrees 30 Group
NLAF Forward Load Negative Angle –90.0 to 90 degrees –30 Group
PLAR Reverse Load Positive Angle 90.0 to 270 degrees 150 Group
NLAR Reverse Load Negative Angle 90.0 to 270 degrees 210 Group
a The ranges shown are for a 5 A CT. Multiply by 5 for a 1 A rated CT.
Forward/Reverse Load Impedance (ZLF, ZLR)

Set ZLF and ZLR in secondary ohms based on the apparent impedance when the
generator is operating at its maximum expected load and minimum expected
voltage.
Forward/Reverse, Positive/Negative Angle (PLAF, NLAF, PLAR, NLAR)

Set PLAF, NLAF, PLAR, and NLAR based on expected worst-case lagging and
leading power factor.

Thermal Model
Thermal Model
The thermal model is a general-purpose model of a single-body, thermal mass. It
can be used in a variety of applications. The SEL-400G implements three inde-
pendent thermal elements that conform to the IEC 60255-149 standard.
The element computes the accumulated thermal level, THRL, of the protected
equipment (generator, transformer, etc.). The thermal level is the ratio of the
computed temperature divided by the temperature at the equipment maximum
permissible current. THRL is expressed as a percentage.
The current used by the thermal model is called the equipment current (IEQ) and
is defined as:
THRO
IEQ = -----------------
INOM
where THRO is a user-selectable operating current in secondary amperes. For
instance, THRO could be the current through the generator, GSU, or excitation
transformer. INOM is the nominal current rating of the input associated with
THRO operating current (1 A or 5 A).
Electrical insulation is usually rated according to the maximum allowable tem-
perature of the winding when the ambient temperature is 40°C. This maximum
allowable temperature is expressed as TMAX in the thermal element.
A correction factor, KCONS is implemented to account for the possibility that
the current magnitude at TMAX differs from the rated current. It is calculated as:
Current at T = TMAX
KCONS = -------------------------------------------------------
Rated Current
where TMAX is a user-selectable maximum operating temperature of the equip-
ment.
For example, if the equipment reaches maximum allowable temperature at
100 percent of rated current then KCONS would be set to 1.0. If maximum tem-
perature is reached at 110 percent of rated current, then KCONS would be set to
1.1.
As mentioned, TMAX is defined for an ambient temperature of 40°C. At lower
ambient temperatures the equipment is expected to shed heat more readily. The
relay accounts for the actual value of the ambient temperature using the ambient
temperature factor, FAMB. FAMB has a value of 1 when the ambient temperature
is 40°C. It is computed by the relay as follows:
TMAX – 40C
FAMB = ------------------------------------------------
TMAX – MAMBT
Equation 5.63
where MAMBT is the ambient temperature measurement from a user-selectable

temperature probe.
For example, if TMAX = 130°C and TAMB = 25°C, then FAMB = (130 – 40) /
(130 – 25) = 0.857. This means that, for the same level of heating, the resulting
equipment temperature at 25°C will be 85.7 percent of the value expected at
40°C.
Ht is defined as the level of heating at time = t. Note that heating is assumed to be
a function of I2R, where R is constant. In the relay, it is computed as:

Thermal Model
IEQ t 2
H t =  ------------------------------------------- • FAMB
 KCONS • IBAS
where IBAS the rated current of the equipment expressed in per unit of nominal
secondary amperes. It is calculated as:
Rated Current in Primary Amperes

IBAS = ------------------------------------------------------------------------------------
CTR • INOM
The model implements separate user-selectable heating and cooling time con-
stants, TCONH and TCONC. The model switches from cooling to heating when
the equipment current exceeds a minimum value IEQPU. The accumulated ther-
mal level during the heating and cooling is computed using Equation 5.64 and
Equation 5.65:
If IEQ  IEQPU:
TCONH t
THRL t = THRLt – 1 • ---------------------------------- + H t • ----------------------------------
TCONH + t TCONH + t
Equation 5.64
If IEQ < IEQPU:
TCONC
THRL t = THRLt – 1 • ---------------------------------
TCONC + t
Equation 5.65
wheret is the processing interval for the element (20 ms).

Rotating machinery can exhibit a significantly longer cooling time constant when
at standstill. In this case, it is appropriate to select an IEQPU equal to the no-load
current, for example, 0.05. As a result, when IEQ is less than 0.05, the machine is
assumed to be at standstill and the TCONC time constant is applied.
Selecting an IEQPU of zero means that the cooling time constant is never
applied, which would be appropriate for a transformer.
The thermal element in the SEL-400G also incorporates a state switch,
THLSWn, which is driven by a SELOGIC variable. When asserted this dynami-
cally switches KCONSn, TCONHn, and TCONLn between two preconfigured
values. For example, this logic can be used to adapt the thermal model according
to the functional state of the cooling system (OK or faulty).
In the following example, the heating and cooling time constants are TCONH =
1 minute and TCONC = 5 minutes. The example uses the previously calculated
FAMB of 0.857. The current makes the following four transitions (in per unit):
➤ Step from zero to 1.08, (equal to 1/0.857), TCONH is applied
➤ Step from 1.08 to 0.05 (equal to IEQPU), TCONH is applied
➤ Step from 0.05 to 1.08, TCONH is applied
➤ Step from 1.08 to zero, TCONC is applied
At each step, the relay calculates instantaneous heating, Ht. This value is applied
to Equation 5.64 and Equation 5.65 to produce the plot of Figure 5.130.

Thermal Model
1.0
I (PU)
THRL (PU)
0.5
IEQPU
2 4 6 8 10
Time (minutes)
Figure 5.130 Current and Accumulated Thermal Level (THRL) Versus Time For
TCONH = 1, TCONC = 5, IEQPU = 0.1, KCONS = 1, and FAMB = 0.857
Thermal Element Logic

Figure 5.131 shows the thermal alarming and tripping logic for each of the three
thermal elements (n = 1, 2, and 3). The element asserts the trip output, THRLTn,
when THRLn exceeds the trip setting THLTn. Note that THLT is expressed in
percent. A reset ratio setting, THLTRn governs the reset of THRLTn. Similar
logic is implemented for the alarm output, THRLAn.
THROn THRLn
Thermal Model
Settings S
IMINn Q THRLTn
FAMBn Settings (THLTn/100) THLTRn R
Settings IBASn
TCONHn1 0 IEQPUn
TCONHn2 1 KCONSn
(THLAn/100) S
Q THRLAn
TCONCn1 0
THLARn R
TCONCn2 1 THTCUn
0 THTTRIPn
KCONSn1
KCONSn2 1
THRSn
THSLWn = 1
Figure 5.131 Thermal Element Logic
The relay calculates how much of the thermal capacity (in percent) of the equip-
ment is currently being used, as shown in Equation 5.66.
THRLn
THTCUn = 100 •  --------------------------------
 THLTn  100
Equation 5.66
If the thermal level, Hn, is greater than the thermal level trip limit, THRLn, and
THRLTn has not yet asserted, the relay calculates the remaining time before the
thermal element trips, as shown in Equation 5.67.
 
 Hn – THRLn 
THTRIPn = TCONHn • ln  ---------------------------------------
 Hn –  THLTn ------------------- 
  100  
Equation 5.67
Following an assertion of THRLTn, and IEQn < IEQPUn, the relay computes
remaining time required for the thermal level, THRLn, to return to zero, as shown
in Equation 5.68.

Thermal Model
 
 THRLn 
THRSn = TCONCn • ln  --------------------------------------------------------
 THLRTn •  THRLn -------------------- 
  100  
Equation 5.68
The thermal level (THRLn) thermal element remaining time before trip
(THTRIPn) and thermal element capacity used (THTCUn) are all available as
analog quantities. Additionally, the thermal level alarming Relay Word bit, THR-
LAn, as well as the thermal level tripping Relay Word bit, THRLTn, are avail-
able. These values are also available in the thermal event report, which is
accessed using the THE command.
Ambient Temperature Measurement

If the SEL-400G is equipped and configured to measure ambient temperature, the
thermal element uses this value. Otherwise, the algorithm defaults to a user-con-
figurable value, DAMBn, for ambient temperature. The TAMBn setting is used to
select the measurement probe. The signal from this probe is routed to MAMBn.
If the relay is configured to measure ambient temperature and the measurement is
faulty, the measurement defaults either to the default value or to the last good
measurement according to the AMBRTFn setting. The logic is shown in
Figure 5.132.
Setting
DAMBn
MAMBn
1 1 1
0 AMBTn
buffer 0 TMAXn – 40
Setting FAMBn
update
Setting TMAXn TMAXn – AMBTn

AMBRTFn = SET
MAMBOKn
Setting
TAMBn = OFF
Figure 5.132 Ambient Compensation Logic
Table 5.51 Thermal Element Settings (Sheet 1 of 2)
ETHRIEC Enable IEC Thermal Element N, 1–3 N Monitor

THROna Thermal Model n Operating Quantity I1GMB, THRO1 = I1GMB Monitor
IpmRMS, THRO2 = IMAXSR
IMAXmR THRO3 = IMAXSR
IBASna Basic Current Value n 0.1–3 1.1 Monitor
a
IEQPUn Equivalent Heating Current Threshold n 0.05–1 0.05 Monitor
a
KCONSn Basic Current Correction Factor n 0.5–1.5 1 Monitor
a
THSLWn Thermal element n state switch SV OFF Monitor
a, b
TCONHnq Heating Thermal Time Constant n 1–500 min 60 Monitor
a, b
TCONCnq Cooling Thermal Time Constant n 1–500 min 60 Monitor
a
THLAn Thermal Level Alarm Limit n 1.0%–100% 50% Monitor
THLTna Thermal Level Trip Limit n 1.0%–100% 80% Monitor
THLARna Thermal element n Alarm Reset Ratio 0.5–1.5 0.98 Monitor
a
THLTRn Thermal element n Trip Reset Ratio 0.5–1.5 0.98 Monitor

Thermal Model
Table 5.51 Thermal Element Settings (Sheet 2 of 2)

a
DAMBn Default Ambient Temperature n –50 to 100°C 25°C Monitor
a
TAMBn Ambient Temp. Meas. Probe n NA, NA Monitor
RTS01–24,
RTC01–24
AMBRTFna Default Temp if Amb Temp RTD Fails n BUFF, SET SET Monitor
TMAXna Maximum Temperature of the Equipment n 80–300°C 155°C Monitor
a
n = 1, 2, 3.
b q = 1, 2.
Enable IEC Thermal Element (ETHRIEC)

Use this setting to enable 1, 2, or 3 independent thermal elements as needed.
Thermal Model n Operating Quantity (THROn)

Use this setting to select the operating signal for the element.
You can choose I1GMB in generator applications when it is desired to account
for both negative and positive-sequence current. I1GMB is calculated as follows:
3I2GFM 2
IIGFM +  ----------------------
2
I1GMB =
 3 
Use an individual phase rms current or the IMAXmR current for THROn to
account for harmonic heating in equipment such as a transformer. IMAXmR is
the maximum rms current seen among the three-phase currents for Terminal m.
Basic Current Value n (IBASn)

Enter the rated current for the monitored equipment in per unit.
Equivalent Heating Current Pickup (IEQPUn)

This setting is used by the relay to switch between the hot and cold time constant
thermal equations. Rotating machinery may exhibit a larger cooling time constant
when at standstill. In this case, selecting an IEQPUn equal to the no-load current,
for example 0.05, is appropriate. Selecting an IEQPUn of zero means that the
cooling time constant is never applied, which may be appropriate for a trans-
former.
Basic Current Correction Factor (KCONSn)

This should be set to the ratio of the current at maximum allowable temperature
to the rated current. For example, if the equipment reaches maximum allowable
temperature at 100 percent of rated current, then KCONSn would be set to 1.0. If
maximum temperature is reached at 110 percent of rated current, then KCONSn
would be set to 1.1.

Thermal Model
Heating Thermal Time Constant (TCONHnq)

This setting defines the thermal time constant (in minutes) of the equipment
when the equipment is energized, that is when the current is above the IEQPUn
value.
Cooling Thermal Time Constant (TCONCnq)

This setting defines the thermal time constant (in minutes) of the equipment
when the equipment is de-energized, that is when the current is below the
IEQPUn value. If this value is the same as the heating thermal time constant,
TCONHn, then enter the same value.
Thermal Level Alarm Limit (THLAn)

This setting specifies the per-unit thermal level when the relay asserts the thermal
alarm Relay Word bit.
Thermal Level Trip Limit (THLTn)

This setting specifies the per-unit thermal level when the relay asserts the thermal
trip Relay Word bit.
Default Ambient Temperature n (DAMBn)

Use this setting to specify an ambient temperature in the case that a temperature
probe is not available. This value is also used as a default value if a probe is used
but the measurement is faulty.
Ambient Temperature Measurement Probe n (TAMBn)

Use this setting to specify the probe to be used for ambient temperature measure-
ment.
Default Temperature if Ambient Temperature RTD Fails n (AMBRTFn)

In applications using a temperature probe, this setting determines which value is
used for ambient temperature if the measurement is faulty. If set to BUFF, then
the last good measurement is used. If set to SET, then DAMBn is used.
Maximum Temperature of the Equipment (TMAXn)

This setting specifies the maximum operating temperature of the protected equip-
ment. This setting is used to calculate FAMBn (see Equation 5.63).
THE Command
Use the THE command to display the IEC thermal model element reports of the
equipment monitored by the relay. The report includes ambient temperature,
operating quantity selected, level of equivalent heating, the percentage of thermal
capacity used, thermal element status (NORMAL, ALARM, or TRIP), time to
trip if picked up, and time to reset if in trip status. When used with P parameter,
THE enables you to preload the thermal values for enabled elements. The inputs
are to be given in percentages and the format is xx.xx with a resolution of

Thermal Model
0.01 percent. The maximum input that you can give is 99.99 percent. THE R or
C can be used to clear the thermal data for enabled elements, when used with
parameter n (n = 1–3). THE n R or C clears the thermal data for that particular
element n. Figure 5.133 shows the THE command report with all three elements
enabled.
=>THE <Enter>
Relay 1 Date: 12/19/2019 Time: 11:57:29.675

IEC Thermal Elements Data

Element 1 Element 2 Element 3
Ambient Temperature (deg. C) 50.00 32.00 34.00
Thermal Operating Quantity IASRMS IMAXGR I1GMB
Max. Equivalent Thermal Level (pu) 0.97 0.00 0.00
Thermal State 1 2 1
Thermal Level Value 75.22 0.00 0.00
Thermal Capacity Used (%) 100.29 0.00 0.00
Thermal Element Status TRIP NORMAL NORMAL
Time to Trip (s) 0.00 $$$.$$ $$$.$$
Time to Reset (s) 124.77 0.00 0.00
Figure 5.133 THE Report
Setting Example
In this example, we provide an overload alarm for the stator based on the stator
winding short-time thermal requirements provided in ANSI C50.13-2005. We
use the first thermal element in this application.
ETHRIEC = 1
We choose the operating signal to respond to generator positive- and negative-
sequence current of the generator. We assume that the current unbalance element
provides dedicated protection for the rotor.
THRO1 = I1GMB
For the example, we assume that the generator rated current is 4 amperes second-
ary and the CT nominal secondary current is 5 amperes.
IBAS1 = 4/5 = 0.8
Because ANSI C50.13 makes no reference to a cooling time constant, we set:
IEQPU1 = 0
Because the standard defines temperature rise for an ambient temperature of
40°C, we set:
KCONS1 = 1
We will not use the thermal state switch in this application.
THSLW1 = 0
ANSI C50.13 specifies that a generator shall be capable of operation at 150 per-
cent of rated current for at least 30 seconds when started from a steady-state cur-
rent at rated conditions. The standard goes on to define additional timing
requirements based on the following I2t equation:
37.5
I = 100 ---------- + 1
t
Equation 5.69

Thermal Model
where t is the time in seconds and I is the stator current in percent of rated cur-
rent.
The following calculations show the process of setting the thermal element based
on the requirements of ANSI C50.13. A simplified timing characteristic of the
IEC thermal element can be written as:
 I 2 – I0 2 
t OP = TCONH11 • ln  -----------------------------
 I 2 – THLT 2
Equation 5.70
where I is rated current in per unit. In Equation 5.70, I0 is the current prior to the
overload event which we choose to be equal to rated (1.0). To provide an operat-
ing margin, choose a thermal trip level of 105 percent or 1.05 per unit. Applying
the ANSI C50.13 requirement of 1.5 per unit current for 30 seconds, we get:
 1.5 2 – 1.0 2 
30 = TCONH11 • ln  -----------------------------
 1.5 2 – 1.052
Equation 5.71
which results in a TCONH11 of 351 seconds, which we will round down to 5

minutes. We can plot Equation 5.69 and Equation 5.70 as follows:
1 x 103
ANSI C50.13
Short-Time Stator
Thermal Requirements
Thermal Model
100
Time (seconds)
10
1
0 1 2 3
Current (per unit)
Figure 5.134 Simplified Timing Characteristic for TCONH = 5, THLT = 105%,

KCONS = 1, and TAMB = 25
NOTE: If the current prior to the A cooling time constant is not specified in the ANSI C50.13 standard, so
overload is lower than 0.95, the
thermal model curve will shift up, TCONC11 can be left at its default.
reflecting the fact that the machine
has a greater unused thermal We set the element to alarm at 100 percent.
capacity. Similarly, if the machine
experiences cyclical overloads, the THLA1 = 100
curve shifts down because of the heat
produced during previous overload
events. Thus, the thermal model The element will not be used for tripping, so THLT1 is left at its default.
provides a better approximation to the
heat of the stator compared with that
provided by an inverse-time
characteristic.

RTD Element
The alarm reset ratio can be left at its default value to minimize possible chatter.
THLAR1 = 0.98
Assuming Class F insulation is used, set:
TMAX1 = 155
In this application, we will not bias the element from a temperature measurement
and will instead specify an ambient temperature of 25°C. Therefore:
DAMB1 = 25
TAMB1 = NA
RTD Element
Use the RTD element to alarm and trip from RTD monitored values. A total of 12
RTD elements are provided. Any of the SEL-2600 or remote analog monitored
values can be mapped to the element using the 46ROn setting. The RTD status
Relay Word bit is also mapped to the logic by using the same setting. Two pickup
settings are provided to set levels for alarming and tripping. The logic is shown in
Figure 5.135.
(Setting)
49ROn
RTS1OK n = 1, 12
RTS24OK
RTC1OK
RTC24OK
RTS1TV
RTS24TV
RTC1TV
RTC24TV
(Settings) 49RnS1
49RnP1
49RnS2
49RnP2
Figure 5.135 RTD Element Logic
RTD Voting
The SEL-400G provides RTD voting by all RTDs at a particular location. As
many as four locations can be configured. Voting is enabled using the 49RLVm
setting. Any of the 12 RTD elements can be assigned to a location by using the
49RLm setting. The output 49RLVmP asserts when two or more RTD elements
assert. The logic is shown in Figure 5.136.

Out-of-Step Element
(Setting)
49RLVm = Y
49R1S2
m = 1, 4
49RLm has 1
49RLVmP
1
49R12S2
49RLm has 12
Figure 5.136 RTD Voting Logic
Out-of-Step Element
The SEL-400G includes an out-of-step element to detect out-of-step conditions
between two electrical sources. Two interconnected systems can experience an
out-of-step condition for several reasons. For example, loss of excitation can
cause a generator to lose synchronism with the rest of the system. Similarly,
delayed tripping of a generator breaker to isolate a fault can cause the generator
to go out of step with the rest of the system.
Detecting and isolating an out-of-step condition as early as possible is imperative
because the resulting high peak currents, winding stresses, and high shaft torques
can be very damaging to the generator and the associated GSU transformer.
The SEL-400G implements two out-of-step tripping schemes: single blinder and
double blinder, as shown in Figure 5.137 and Figure 5.139. Users can select
whichever scheme suits their application, or they can disable out-of-step protec-
tion.
The element uses the positive-sequence impedance as an operating signal which
is calculated as:
V1ZF
Z1GF = ---------------
I1GF
Equation 5.72
The operating equation of the 78 mho characteristic (78Z1 in Figure 5.138 and
Figure 5.140) is:
78Z1 = Re   Z1GF + j • 78FWD  •  j • 78REV – Z1GF    0

Equation 5.73
If the magnitude of I1GF is less than 0.05 CT • CTNOM, 78Z1 is forced to zero.
Single-Blinder Scheme
The single-blinder scheme consists of a mho element, 78Z1; right and left resis-
tance blinders, 78R1 and 78R2; and associated logic. Figure 5.137 shows the
characteristic for the single-blinder scheme.

Out-of-Step Element
78R2 78R1
X
78REV 78Z1
R
C B A
78RB2P 78RB1P
78FWD
Figure 5.137 Out-of-Step Characteristics
Figure 5.138 shows the logic for the single-blinder scheme.
Relay
Word
Bits
78R1
Setting 78R2
78RB1P + 5 ms
Re(Z1GF) — 0
78SWNG
+ 5 ms
Setting
–78RB2P — 0
5 ms
78Z1
0
I1GFM +
Setting
50ABCP —
78OOS
0
5 ms
latch
78R2 D Q 78OSTR 78TD
78OST
latch
78R1 78TDURD
D Q
78SWNG
Input
Setting
78TC 78TD Output
78TDURD
Figure 5.138 Single-Blinder Logic

Out-of-Step Element
The scheme declares a swing, 78SWNG, when the positive-sequence impedance

moves from the load region into Area A (only 78Z1 and 78R2 are asserted) for
5 ms.
The scheme declares an out-of-step, 78OOS, when the impedance trajectory sub-
sequently advances to Area B between the two blinders (the mho element 78Z1
and both blinders asserted) for 5 ms.
At the time the impedance trajectory exits the mho circle via Area C, the rising-
edge triggered timer with 78TD pickup delay and 78TDURD dropout delay starts
timing. Relay Word bit 78OST remains picked up for 78TDURD seconds after
the pickup delay time 78TD expires.
The previous description applies to trajectories traveling from right to left. The
Relay Word bits assert in the same way for trajectories traveling from left to
right.
During short-circuit faults, the impedance locus moves from the load region (out-
side of 78Z1) into Area B almost instantaneously. For these events, the scheme
timers are not able to expire and the scheme outputs do not assert.
The states of 78R1 and 78R2 are latched on the rising edge of 78SWNG to deter-
mine if the swing has entered the mho circle from the right or the left. For an out-
of-step trip, 78OST, to occur, the swing must exit the mho circle on the opposite
side of the impedance plane from where it entered. The latched states of 78R1
and 78R2 are retained until the next time 78SWNG asserts, which is the next
time a power system swing occurs. This feature reduces the possibility of an
OOS trip for a stable power swing.
Double-Blinder Scheme
The double-blinder scheme consists of mho element 78Z1, two blinder pairs:
outer resistance blinder 78R1 and inner resistance blinder 78R2, and associated
logic. Figure 5.139 shows the characteristic for the double-blinder scheme.
–78R1 –78R2 78R2 78R1

X
78Z1
78REV
R
78RB2P 78RB2P
E F E
78RB1P 78RB1P
78FWD
Figure 5.139 Double-Blinder Scheme Characteristic
Figure 5.140 shows the double-blinder logic.

Out-of-Step Element
Relay
Word
Bits
78R1
Setting
78RB1P 78R2
+ 5 ms
78D
|Re(Z1GF)| – 0 78SWNG
Setting 0
78RB2P + 5 ms
– 0
I1GFM
Setting
+
50ABCP –
78OOS
5 ms 0
78Z1 78OSTR 78TD
0 5 ms 78OST
78TDURD
Setting
78TC
Input
78TD Output
78TDURD
Figure 5.140 Double-Blinder Logic
Relay Word bit 78SWNG picks up when the impedance locus enters Area E and
remains for more than 78D seconds.
NOTE: The double-blinder scheme Relay Word bit 78OOS picks up when positive-sequence impedance locus subse-
does not include logic to check the
direction in which the impedance quently enters Area F (both blinders picked up) after 5 ms.
locus exits the mho circle. The
impedance locus must not cross the The logic issues an out-of-step trip, 78OST, when the impedance enters and then
inner blinder during a stable power
swing. Correct selection of the inner
exits the mho circle while 78OOS is picked up.
blinder reach setting is therefore
critical. The double-blinder scheme distinguishes between short-circuit faults and out-of-
step conditions by checking the length of time that the impedance trajectory stays
in Area E. During short-circuit faults, the impedance moves through Area E
almost instantaneously so that the 78D timer does not expire.
Pole Slip Counter

The SEL-400G includes two pole slip counters. The logic uses either of the OOS
schemes in conjunction with a reactive blinder element. This blinder is defined
by the 78XP setting and divides the impedance plane into a system zone and a
generator zone.

Out-of-Step Element
78Z1
78REV System
78XP
R
Generator
78FWD
Figure 5.141 Slip Counter Zone
In Figure 5.142, the upper counter accumulates the total number of pole slips.
The middle counter accumulates the number of slips passing through the system
zone, 78SCN. The lower counter accumulates the number of slips that pass
through the generator zone, 78GCN. Individual thresholds can be applied to each
count. The counters are reset if the impedance locus remains outside the mho
characteristic for longer than the 78SCD delay setting.
Setting
78OSTR
78SCD COUNTER 10
INC 78CN
78Z1 RESET (count ≥ 78CNT
0 value)
Setting 0
In seconds
78TSCP
COUNTER 10
INC 78SCN
RESET (count ≥ 78SCNT
value)
Setting 0
78SSCP
Setting
78OSTR
Setting COUNTER 5
78XP INC 78GCN
Im(Z1GF) RESET (count ≥ 78GCNT
value)
0 0
78SWNG
5 ms
Setting
78GSCP
Figure 5.142 Pole Slip Counter Logic
Settings Guidelines
Table 5.52 Out-of-Step Settings (Sheet 1 of 2)
E78 Enable Out-of-Step Element N, 1B, 2B 1B Group

78FWD 78 Forward Mho Reach 0.05–100.00  sec
a
8 Group
78REV 78 Reverse Mho Reach 0.05–100.00  sec
a
8 Group

Out-of-Step Element
Table 5.52 Out-of-Step Settings (Sheet 2 of 2)
78RB1P 78 Right (Outer) BL Reach 0.05–100  sec

a
8 Group
78RB2P 78 Left (Inner) BL Reach 0.05–100  sec
a
7 Group
b
50ABCP 78 Pos.-Seq Current Supervision 1.00–100 A sec 1 Group
78D 78 Out-of-Step Delay 0.00–1 s 0.05 Group
78TD 78 Out-of-Step Trip Delay 0.00–1 s 0 Group
78TDUR 78 Out-of-Step Trip Duration 0.00–5 s 0 Group
78TC 78 Out-of-Step Torque Cont SELOGIC NOT LOPZ Group
78XP 78 Slip Counter Zone Reach OFF, 0.05–100  OFF Group
78GSCP 78 Generator Slip Counter Pickup 1–5 2 Group
78SSCP 78 System Slip Counter Pickup OFF, 1–10 OFF Group
78TSCP 78 Total Slip Counter Pickup OFF, 1–10 OFF Group
78SCD 78 Slip Counter Reset Delay 0.000–1 s 0.05 Group
a Ranges are for a 5 A CT. Multiply by 5 for a 1 A CT.
b Range is for a 5A CT. Divide by 5 for a 1A CT.
Note that the 78 element must not trip the generator for a recoverable power
swing. The best way to confirm that the element is properly configured is to carry
out a transient stability study.
78 Forward and Reverse Mho Reach (78FWD and 78REV)

Select these settings to ensure that the impedance locus for an unstable swing
always passes through the mho characteristic. Also, the impedance locus should
not be inside the mho characteristic at the maximum possible generator load.
Typically, set the forward reach, 78FWD, at 2–3 times the generator transient
reactance, X'd, in secondary ohms, and set the reverse reach, 78REV, at 1.5–2.0
times the transformer reactance, XT, in secondary ohms.
78 Right (Outer) BL Reach (78RB1P) and 78 Left (Inner) BL Reach

(78RB2P)
Single-Blinder Scheme
For the single-blinder scheme, 78RB1P is right blinder and 78RB2P is the left
blinder. These are typically set so that the separation angles are approximately
120 degrees, as shown in Figure 5.143. Separation angles of 120 degrees or
greater between the two sources usually results in loss of synchronism. The right
blinder should not be asserted at the maximum expected generator load.
Double-Blinder Scheme
For the double-blinder scheme, 78R1 is outer blinder and 78R2 is the inner
blinder. The inner reach must be set such that the impedance locus does not cross
the inner blinder for a stable (recoverable) swing. The outer blinder reach should
be set such that all of the following are true:
➤ Outer blinder is not asserted at the maximum expected load
➤ Outer blinder sits outside the mho circle to satisfy the relay logic
➤ Outer blinder separates from the inner blinder far enough to allow
proper setting of the 78D timer

Out-of-Step Element
78 Out-of-Step Delay (78D)

This setting is used only by the double-blinder scheme. It is set to ensure that it
expires while the impedance locus is passing between the outer and inner blind-
ers at the fastest expected slip frequency for an unstable swing. To ensure that the
relay times the out-of-step slip frequency accurately, the outer and inner blinders
must be separated appropriately. For example, assume that the highest out-of-step
frequency encountered is 5 slip cycles per second, which translates to 30 degrees
per cycle (60 Hz). Set the blinders with a 70-degree separation. This separation
translates to a positive-sequence impedance travel time of 2.3 cycles between the
two blinders, which should provide adequate timing accuracy. Set the 78D timer
at 0.035 seconds, which ensures that 78D picks up for swings traveling at 30
degrees per cycle or less.
78 Torque Control (78TC)

The torque-control SELOGIC control equation, 78TC, has a default setting of one.
If this value is left at 1, the out-of-step element is not controlled by any other con-
ditions external to the element. However, users can block the operation of the ele-
ment for certain conditions, such as the presence of excessive negative-sequence
currents, by setting 78TC to NOT 46Q1.
78 Positive-Sequence Current Supervision (50ABCP)

This setting defines a minimum current for operation of the element. Normally, a
setting of 1 A for a 5 A relay is adequate for most applications. However, a higher
setting can be applied based on minimum expected swing currents.
78 Trip Delay (78TD)

Use this setting to delay tripping of the element after exiting the mho characteris-
tic to ensure that the breaker duty cycle is not exceeded.
78 Trip Duration (78TDUR)

This setting defines the minimum time that the 78OST asserts. This can be set
longer than the opening time of the breaker, but shorter than the breaker failure
time with some margin, for example 50 ms. The default setting for the 78TDUR
is 0 because 78OST is configured to trip the generator breaker with default trip
logic (which includes an identical timer). Change the settings (trip logic and/or
78DURD) if your application requires a different action.
78 Pole Slip Counter (78XP, 78TSCP, 78SSCP, and 78GSCP)

These setting are used to implement tripping after a number of pole slips have
occurred. This may be beneficial especially in the case of pole slips that pass
through the system. SEL recommends that you contact the generator manufac-
turer before configuring the relay to allow multiple pole slips prior to tripping.

Inadvertent Energization
X
78REV
78R2 78R1
M
Zs
Xt
R
β
S'
X’d S
C B A
78Z1
78FWD
78FWD: Forward Reach

78REV Reverse Reach
X'd: Generator Transient Reactance
Xt: Transformer Reactance
Zs: System Impedance
M-N: Total Impedance between Generator and System
S-S': Perpendicular Bisector of M-N
, : Angle of separation between generator and system
Figure 5.143 Typical Single-Blinder Settings
Inadvertent energization occurs when the generator main circuit breaker or auxil-
iary transformer circuit breaker is incorrectly closed to energize the generator
when it is out of service. When this occurs, the generator behaves like an induc-
tion motor, drawing as much as four to six times the rated stator current from the
system. These high stator currents induce high currents in the rotor, which can
quickly damage the rotor. The objective of inadvertent energization protection is
to quickly detect that the generator has been re-energized after being removed
from service.
A voltage-supervised overcurrent scheme can be implemented in the SEL-400G
using the undervoltage check that is integrated into the inadvertent energization
scheme logic. Other supervisions, for example field breaker open (52Fb), can be
implemented using the torque-control input (INADTC).
The overcurrent detector has a dual role; it provides an arming input when it is
dropped out and, once armed, it picks up to indicate that an inadvertent energiza-
tion event has occurred.

The scheme will be armed (INADAm asserted) after de-energization of the gen-
erator. Arming the assertion requires that the voltage is below the pickup setting
(INADVPm), the current is below the pickup setting (INADIPm), and the torque
control (INADTCm) is asserted. Arming is delayed by the INADADm setting.
Once armed, if the current exceeds the INADIPm setting, the output INADTm
asserts after the INADDm timer expires. If any of the arming conditions (under-
voltage, undercurrent, or torque control) deasserts, the scheme disarms. Disarm-
ing is delayed by the INADDDm setting.
Relay
Word
Setting Bits
INADVPm INADAm
V1ZFM
INADm
Setting INADADm
INADDm
INADTCm INADTm
Setting INADDDm
0
INADIPm
IMAXmF
Figure 5.144 INAD Scheme Logic
Note that because this protection scheme is disabled when the generator voltage
returns to near normal, this scheme does not provide protection for a breaker
flashover that occurs just prior to synchronizing. The SEL-400G includes dedi-
cated logic for breaker flashover.
Setting Guidelines
Table 5.53 Inadvertent Energization Settings
INADIPma Inad. Ener. O/C PU –BKR m A, sec 0.25–10b 1 Group

INADVPma Inad. Ener. U/V PU –BKR m V, sec 1.00–300 10 Group
INADTCma Inad. Ener. TC –BKR m SELOGIC variable NOT LOPZ Group
a
INADADm Inad. Ener. Arm. Dly. –BKR m s 0.0000–100 s 2 Group
a
INADDDm Inad. Ener. Disarm. Dly. –BKR m s 0.0000–100 s 1 Group
a
INADDm Inad. Ener. PU Delay –BKR m s 0.0000–10 s 0.25 Group
a
m = S, T, U, and Y.
b This range is for a 5 A CT. Divide by 5 for a 1 A CT.
Inadvertent Energization Overcurrent Pickup –BKR m, (INADIPm)

The overcurrent pickup must be set to operate for the lowest current expected for
an inadvertent energization event. If the generator is connected to a weak system
or re-energized through the auxiliary bus, the current can be as low as 1–2 times
nominal current. A sensitive setting in the range of 0.25 A secondary is recom-
mended. Note that, in the SEL-400G, the inadvertent energization element moni-
tors the breaker current and an inadvertent energization element is provided for
each breaker. This allows a low pickup setting to be used in static starting and
pumped storage applications.

Field Ground Protection
Inadvertent Energization Undervoltage Pickup –BKR m, (INADVPm)

Set the undervoltage pickup to a low value to ensure that the generator voltage is
zero prior to arming.
Inadvertent Energization Torque Control –BKR m, (INADTCm)

The torque-control setting (INADTC) has a default setting of NOT LOPZ. Use
this input to provide additional security for your application. Some examples of
INADTC settings include:
➤ NOT LOP
➤ Breaker open indication
➤ Field breaker open indication
Note that if the three-pole open (3PO) Relay Word bit is used to supervise inad-
vertent energization, the 52A setting of the breaker monitor logic must be
assigned to a normally open breaker status contact and EPO must be enabled for
the breaker.
Inadvertent Energization Arming Delay –BKR m, (INADADm)

The arming delay setting (INADADm) ensures that the element will not pickup
spuriously when the generator is taken offline. The default setting is 2 seconds.
Inadvertent Energization Disarming Delay –BKR m, (INADDDm)

The disarming delay (INADDDm) provides a window to allow the scheme to
operate for the occurrence of an actual inadvertent energization event. It must be
shorter than the time required to parallel the generator to the system following
application of the field. A setting of 1 second is usually adequate
Inadvertent Energization Pickup Delay –BKR m, (INADDm)

The INADPUm defines the pickup time of the element. It must be set shorter than
then INADDDm setting; otherwise, the scheme disarms before it can operate for
an inadvertent energization event.

The SEL-400G can receive a rotor field winding insulation resistance measure-
ment from an SEL-2664 Field Ground Model via the SEL-2664S using the
IEC 61850 protocol. See Section 2: Installation for details on connecting and
configuring these devices. See the SEL-2664 Field Ground Module Instruction
Manual for application details related to the module.
The Field Ground Scheme logic is shown in Figure 5.145. Two levels are pro-
vided. One level can be set with a relatively high pickup for alarming. The second
level can be set with a lower pickup for tripping.
The technology used in SEL-2664 does not discriminate between one point of
insulation breakdown and multiple points of insulation breakdown. A single
point of insulation breakdown will not cause any harm to the generator. Multiple
points of insulation breakdown could lead to very serious generator damages

because the distribution of magnetic flux in the rotor will be substantially altered.
When an additional device, such as a generator vibration detector for example, is
used for the detection of multiple points of insulation breakdown, a field ground
indication without vibration detection can be used for the alarm level and the
assertion of the vibration detector can supervise the tripping level. When an addi-
tional device is not used, SEL recommends that you alarm and trip from a field
ground indication.
NOTE: Averaging is applied to the The resistance measurement appears in the SEL-400G as a remote analog, which
resistance measurement in the
SEL-2664S. This adds an additional is then assigned to 64FIR using the 64FIRM setting. Likewise, the associated
delay to the response time of the field communications quality bit is assigned to the 64FIQ setting.
ground scheme logic. If the SEL-2664
is injecting at 1 Hz, the additional
delay is less than 1 second. If the Relay
SEL-2664 is injecting at 0.25 Hz, the Word
additional delay is less than SELOGIC Bits
5 seconds. You should account for this 64FIQ
in the setting delay (64FnD) 64Fn
Setting
64FnD
64FnP
64FnT
64FIR
0
SELOGIC
64FnTC
Figure 5.145 Field Ground Scheme Logic, Level n
Setting Guidelines
Table 5.54 Field Ground Settings
64FIRM 64F Field Insu Resistance Mapping RA001–RA256 RA001 Group

64FIQ 64F Field Insu Quality (SELOGIC Eqn) SV NA Group
a
64FnP 64F Level n Pickup (OFF, 0.5–200 kOhms) OFF, 0.5–200.0 OFF Group
a
64FnD 64F Level n Delay (0.000–400 s) 0.000–400.000 60 Group
a
64FnTC 64F Level n Torque Cont (SELOGIC Eqn) SV 1 Group
a
n = 1, 2.
64F Field Insulation Resistance Mapping (64FIRM)

Enter the remote analog to be mapped to the field ground element.
64F Field Insulation Quality (SELOGIC Control Equation) (64FIQ)

Enter the quality bit for the remote analog that is mapped to the field ground ele-
ment. The element is blocked if the quality bit is not asserted.
64F Level n Pickup (OFF, 0.5–200 kilohms) (64FnP)

NOTE: If there is no insulation Enter the desired pickup of the element in kilohms. You can use the analog signal
deterioration, there is no leakage path
between the field winding to ground; profiling function to track the variation of the insulation resistance over time to
the insulation resistance value can be determine an optimal setting.
upwards of 20 MOhms. Because of
sensitivity limitations, the accuracy of
the SEL-2664 is specified for the
range of 0.5 to 200 kilohms.
Consequently, the pickup setting is
limited to the same range.

Synchronism-Check Element
64F Level n Delay (0.000–400 s) (64FnD)

Enter the desired delay in seconds. The SEL-2664 uses the square-wave injection
principle. Depending on the injection frequency, the resistance measurement is
updated twice a second or once every two seconds. See the SEL-2664 Field
Ground Module Instruction Manual for more details.
64F Level n Torque Control (SELOGIC Control Equation) (64FnTC)

This setting has a default value of 1. If tripping is supervised by a high-vibration
indication, then this indication can be assigned in this setting.
The synchronism-check element prevents a circuit breaker from closing if the
voltage across the open circuit breaker is not matched in phase, magnitude, or
frequency.
You can use synchronism-check elements to supervise circuit breaker closing.
The element outputs are Relay Word bits 25An, 25Cn, and 25WCn (n = S, T, U,
or Y).
Voltage Selection
Figure 5.146 shows the generator voltage selection logic. VPFM and VPFA are
the magnitude and angle of a selected generator phase-to-phase or phase-to-neu-
tral voltage.
Setting
SYNCP
VAZF
VBZF
VCZF
MAG VPFM
VABZF
VBCZF
VCAZF ANG VPFA
Figure 5.146 Generator Voltage Selection
Figure 5.147 shows the system voltage selection logic. NVSnFM and NVSnFA
are the magnitude and angle, respectively, of a selected system phase-to-phase,
phase-to-neutral, or single-phase voltage. The scaling factor, KSn is a complex
value equal to KSnM KSnA. The settings KSnM and KSnA are typically used
to account for VT ratio mismatch and magnitude and angle errors.
Setting
SYNCSn
VAVF
VBVF
VCVF
VABVF
VBCVF KSn MAG NVSnFM
VCAVF
VV1F ANG NVSnFA
VV2F
VV3F
Figure 5.147 System Voltage Selection

Voltage Magnitude Checks

The synchronism-check element includes checks on the magnitudes of the gener-
ator and system voltages.
In Figure 5.148, the logic asserts the 59VPn Relay Word bit if the generator volt-
age is available and within set limits required for synchronization. A similar
check asserts the 59VSn Relay Word bit if the system voltage is available and
within limits.
Relay
Setting Word
25VHn Bits
59VPn
VPFM
Setting
25VLn
Relay
Setting Word
25VHn Bits
59VSn
NVSnFM
Setting
25VLn
Figure 5.148 Generator and System Voltage Magnitude Checks
Voltage Difference Check

In generator applications, it is common practice to check that the percentage dif-
ference between the generator and system voltages is within limits. This is imple-
mented using the 25VDIFn setting, which defines a voltage acceptance window
for the element. If the 25VDIFn setting is selected to OFF, then the voltage differ-
ence check is bypassed and the associated Relay Word bits are permanently deas-
serted.
Logic is also included to shrink the voltage acceptance window when it is
required to synchronize only when the generator voltage is higher than the sys-
tem voltage. This is controlled by the 25GVHIn setting.
The voltage difference check is carried out when the system voltage is available,
as indicated by the assertion of the 59VSn Relay Word bit.
The percentage difference in the voltage magnitudes, DIFVn, is calculated as:
VPnFM
DIFVn =  ------------------------- – 1 • 100%
 NVSnFM 
In Figure 5.149, the logic asserts 25VDIFn if the voltage difference is less than
the 25VDIFn setting. If not, the logic declares whether the generator voltage is
high or low.

VPnFM
NVSnFM GENVHIn
GENVLOn
Setting
25VDIFn
DIFVn
25VDIFn
Setting
25GVHIn = Y
Figure 5.149 Voltage Difference Check
Figure 5.150 shows how the Relay Word bits in Figure 5.149 assert according to
the 25VDIFn and 25GVHIn settings. Note that when 25GVHI = Y, the 25VDIFn
Relay Word bit only asserts when the generator voltage is greater than the system
voltage.
GENVHIn Asserts GENVHIn Asserts

VPnFM > NVSnFM
VPnFM > NVSnFM

25VDIF
25VDIF
25VDIFn Asserts 25VDIFn Asserts
25VDIF
VPnFM < NVSnFM
VPnFM < NVSnFM

25VDIFn Asserts
GENVLOn Asserts
GENVLOn Asserts
A) 25GVHIn = N B) 25GVHIn = Y
Figure 5.150 Voltage Acceptance Window
Figure 5.151 shows the combined voltage check logic. Note that checks on the
generator and system voltage magnitudes are always carried out but these can be
set to assert over a very wide voltage range (20 to 200 volts).
Note also that if the 25VDIF setting is selected to OFF, then the voltage differ-
ence check is bypassed.
25VDIFn = OFF
25VDIFn
100
59VPn ms Relay
0 Word
59VSn Bit
Setting
25ENBKn
BSYNBKn
Figure 5.151 Combined Voltage Check Logic
25ENBKn is also supervised by the SELOGIC variable, BSYNBKn. BSYNBKn

is used to define conditions to block the assertion of the synchronism-check ele-
ment. See the settings guidelines for more information.

Angle and Slip Frequency Calculation

When 59VPn and 59VSn are both asserted, slip and angle difference calculations
are carried out as shown in Figure 5.152.
59VPn
AND Enable
59VSn
Angle SLIPn
VPnFA Difference
And Slip ANGLEn
NVSnFA
Calculator ANGLECn
Figure 5.152 Angle Difference and Slip Calculation
ANGLEn is calculated as the difference between the generator voltage angle and
the system voltage angle as follows:
ANGLEn = VPnFA – NVSnFA
Note that the system voltage is the reference for the angle calculation. Angle dif-
ference is corrected to be between ±180°.
In Figure 5.152, slip is calculated as the rate-of-change of ANGLEn. Additional
filtering is applied to produce the slip signal. Note that when the generator fre-
quency is higher than the system frequency, the slip is positive.
Slip Check
It is a common practice to check that the slip is within set limits. This is imple-
mented using the slip frequency setting, 25SFBKn, which defines a slip accep-
tance window for the element. If the 25SFBKn setting is selected to OFF, then
the slip check is bypassed as described in Uncompensated and Compensated
Angle Checks on page 5.152.
Logic is also included to shrink the slip acceptance window when it is required to
synchronize only when the generator frequency is higher than the system fre-
quency (positive slip). This is controlled by the 25GFHIn setting.
Figure 5.153 shows the slip-check logic. This logic runs when 59VPn and 59VSn
both assert. Otherwise, the associated Relay Word bits are deasserted.
The logic indicates whether the generator is fast or slow with respect to the sys-
tem or when the generator and system are virtually stationary with respect to one
another as indicated by the Zero Slip Relay Word bit, SFZBKn.
If SFZBKn is not asserted and the absolute value of slip is less than 25SFBKn,
then SFBKn, the slip within limits Relay Word bit, asserts.

Relay
Word
Bits
0.005 Hz
FASTn
SLIPn
SLOWn
-0.005 Hz
0.005 Hz
SFZBKn
SLIPn ABS
Setting
SFBKn
25SFBKn
Setting
25GFHIn = N
FASTn
Figure 5.153 Zero-Slip and Slip-Within-Limits Checks
Figure 5.154 shows how the Relay Word bits in Figure 5.153 assert according to
the 25SFBKn and 25GFHIn settings.
FASTn asserts FASTn asserts

SLIPn > 0
SLIPn > 0
25SFBKn
25SFBKn
25SFBKn and 25SFBKn and
FASTn assert FASTn assert
SFZBKn asserts SFZBKn asserts

25SFBKn
25SFBKn and
SLOWn assert
SLOWn asserts
SLIPn < 0
SLIPn < 0
SLOWn asserts
A) 25GFHIn = N B) 25GFHIn = Y
Figure 5.154 Slip Acceptance Window
Uncompensated and Compensated Angle Checks

The synchronism-check element includes compensated and uncompensated
angle checks. Both checks are enabled by 25ENBKn.
The behavior of both angle checks is governed by the 25SFBKn setting. If
25SFBKn is set to OFF, then the compensated check is permanently disabled and
uncompensated logic provides a basic synchronism check with no checking of
slip. In this case, the uncompensated logic could be used to provide basic super-
vision for an external autosynchronizer, for example.
If 25SFBKn is not set to OFF, then the compensated angle check is active when
there is slip and uncompensated angle check is active when there is no slip. In
some applications, the generator connects to the system via more than two break-
ers (for example, a generator connected to a ring bus). In these applications, the
generator is synchronized via the first breaker using the compensated logic.
When closing the second breaker, there will be no slip but there may be a signifi-

cant standing angle across the breaker. The uncompensated synchronism-check

logic can be used to supervise closing of the second breaker. This is often
referred to as a parallel close.
Table 5.55 summarizes the prior discussion.
Table 5.55 Uncompensated and Compensated Angle Checks
Angle Checks 25SFBKn := OFF 25SFBKn := 0.005–0.5
Uncompensated Enabled Enabled when there is no slip

Compensated Disabled Enabled when there is slip
Figure 5.155 shows the uncompensated synchronism-check logic for Breaker n.

Note that the generator and system must not be slipping, (SFZBK asserted). Note
also that the zero-slip requirement can be bypassed if 25SFBKn is set to OFF.
The uncompensated angle must remain in the uncompensated angle acceptance
window long enough to satisfy the 25ADn timer.
This logic runs only if 25ENBKn is asserted. Otherwise, the associated Relay
Word bits are deasserted.
Setting
SFZBKn
25ADn
25SFBKn = OFF Relay
Word
Bits
t
|ANGLEn| _ 25An
0
+
Setting
25ANGn
Figure 5.155 Uncompensated Synchronism-Check Logic
NVSn
SLOW FAST
ANGLEn
NGn
25A
25A
NGn
VP
|ANGLEn| < 25ANGn
Figure 5.156 Uncompensated Angle Acceptance Window
The compensated angle difference, ANGLECn, accounts for the breaker closing
time, TCLSBKn, in seconds and is calculated as follows:
ANGLECn = ANGLE + SLIP • TCLSBKn • 360
We can define a compensated phasor, V'P as:
V'P = |VP|ANGLECn

Figure 5.157 shows the phase relationships. The compensated phasor therefore
enters the angle acceptance window in advance of the uncompensated phasor.
This allows the logic to send an early close command to the breaker. This ensures
that the circuit breaker primary contacts make at zero degrees; thereby minimiz-
ing the stress on the generator.
NVSn NVSn
V’P ANGLEn ANGLEn V’P

VP ANGLECn ANGLECn VP
Positive Slip Negative Slip

Figure 5.157 Compensated and Uncompensated Phasor Relationships
Figure 5.158 shows the compensated synchronism-check logic for Breaker n.

The slip must be within the slip acceptance window. The logic creates angle
acceptance windows on either side of zero degrees depending on whether the
FASTn or SLOWn Relay Word bits are asserted, as shown in Figure 5.159.
This logic runs only if 25ENBKn asserts. Otherwise, the associated Relay Word
bits are deasserted.
SFBKn
SLOWn
ANGLECn
25Cn
0
Setting 25WCn
25ANGCn
FASTn
ANGLECn
0
Setting
-25ANGCn
Figure 5.158 Compensated Synchronism-Check Logic

NVSn
FAST
SLOW
ANGLECn
25A
n
NGC
NGC
25A
n
V’P
25WCn asserted when

SLIPn > 0.005 (FAST)
25WCn asserted when
SLIPn < 0.005 (SLOW)
Figure 5.159 Compensated Angle Acceptance Window
Synchronism-Check-Based Breaker Closed Indication

The logic shown in Figure 5.160 can be used in the breaker failure scheme as an
indication that the breaker has not opened. See Breaker Failure Elements on
page 5.175. The premise for this logic is that when the breaker opens either the
voltage difference, slip, or angle difference will move out of its associated win-
dow, causing the 25BFSP Relay Word bit to deassert.
25VDIFn = OFF
Setting
25VDIFn
|DIFVn|
|ANGLEn|
25BFSPn
Setting
25ANGn
SFZBKn
Figure 5.160 Breaker Closed Indication for Breaker Failure
Close Fail Alarm

The logic shown in Figure 5.161 detects an event where the breaker took an
excessive amount of time to close. Such an operation can be damaging both for
the breaker and the generator.
This logic runs only if 25ENBKn is asserted and CFANGn is not set to OFF. Oth-
erwise, the associated Relay Word bit is deasserted.
ANGLEn abs
Setting
CFANGn
CLSn CFAn
Figure 5.161 Close Fail Angle Alarm

Setting Guidelines
Table 5.56 Synchronism-Check Element Settings
SYNCP Synch (25) Reference VAZ, VBZ, VCZ, VABZ, VABZ Group
VBCZ, VCAZ
SYNCSna Synch Source n VAV, VBV, VCV, VABV, VBCV, VV1 Group
VCAV, VV1, VV2, VV3
KSnMa Synch Source n Ratio Factor 0.10–3.00 1 Group
KSnAa Synch Source n Angle Shift –179.99 to 180 0 Group
a
25VLn Voltage Window Low Thresh –BKn 20.0–200 55 Group
a
25VHn Voltage Window High Thresh –BKn 20.0–200 70 Group
a
25VDIFn Max. Voltage Difference –BKn OFF, 1.0–15 5 Group
25GVHIna Generator Voltage High Required –BKn Y, N Y Group
25SFBKna Maximum Slip Frequency –BKn OFF, 0.005–0.5 0.067 Group
a
25ANGn Max. Angle Diff. Uncompensated –BKn 3.0–80 5 Group
a
25ADn Uncompensated Angle Delay –BKn 0.000–0.6000 0.16 Group
a
25ANGCn Max. Angle Diff. Compensated –BKn 3.0–80 5 Group
a
TCLSBKn Breaker n Close Time 0.010–0.6 0.085 Group
a
25GFHIn Generator Frequency High Required –BKn Y, N Y Group
a
BSYNBKn Block Synchronism Check –BKn SV NA Group
CFANGna Close Failure Angle –BKn OFF, 3.0–120 7 Group
a n = S, T, U, or Y.
Synchronism Check (25) Reference (SYNCP)

Select the phase-to-ground or phase-to-phase reference (generator) voltage. If the
generator VT is not wye connected, then phase-to-ground voltages will not be
available.
Synchronism Source n (SYNCSn)

Select the system voltage to be compared with the generator voltage. This may be
a phase-to-ground, phase-to-phase, or single-phase voltage depending on the
configuration of the V voltage input. This voltage will normally be in phase with
the generator voltage when the breaker is closed.
Synchronism Source n Ratio Factor and Angle Shift (KSnM and KSnA)
Use these settings to account for VT mismatch or VT accuracy errors. These val-
ues may be determined during commissioning.
Voltage Window Low and High Threshold (25VLn and 25VHn)

Select the lowest and highest magnitudes in secondary volts for which a synchro-
nized close is permitted.

Maximum Voltage Difference –BKn (25VDIFn)

Select the maximum voltage magnitude difference in percent for which a close is
permitted. For instance, the ANSI C50.13 Standard for cylindrical rotor genera-
tors over 10 MVA states that generators shall be designed to withstand a 5 per-
cent difference without inspection or repair. Consult with the generator
manufacturer for the specific value.
Generator Voltage High Required –BKn (25GVHIn)

Select Y if the generator voltage is required to be higher than the system voltage
at the instant of closing. This causes the generator to export reactive power and
can avoid a dip in voltage after breaker closing.
Generator Frequency High Required –BKn (25GFHIn)

Select Y if the generator frequency is required to be higher than the system fre-
quency at the instant of closing. This causes the generator to export real power
and can avoid a reverse-power event after breaker closing.
Maximum Slip Frequency –BKn (25SFBKn)

Select the maximum frequency difference in Hz for which a close is permitted.
For instance, the ANSI C50.13 standard specifies a maximum difference of
±0.067 Hz. Consult with the generator manufacturer for the specific value.
Max. Angle Difference Uncompensated –BKn (25ANGn)

Enter the maximum angle in degrees for which a close operation is permitted
using the uncompensated synchronism-check logic. For instance, the ANSI
C50.13 standard specifies a maximum angle of ±10. The lower the setting, the
lower the potential for stress placed on the generator. Consult with the generator
manufacturer for the specific value.
Uncompensated Angle Delay –BKn (25ADn)

This setting defines a minimum time wherein the uncompensated angle must
remain in the uncompensated angle acceptance window.
Max. Angle Difference Compensated –BKn (25ANGCn)

As illustrated in Figure 5.158, the compensated synchronism-check logic
accounts for slip and breaker closing time to issue a close command such that the
breaker primary contacts make at zero degrees. The close window is extended to
account for breaker timing errors. Enter the maximum angle in degrees for which
a close operation is permitted. For instance, the ANSI C50.13 standard specifies a
maximum angle of ±10. The lower the setting, the lower the potential for stress
placed on the generator. Consult with the generator manufacturer for the specific
value.

Breaker n Close Time (TCLSBKn)

Enter the closing time of the breaker in seconds. This is the time from energiza-
tion of the close coil to making of the primary contacts. This value can be deter-
mined from a breaker timing test. The relay uses this value along with the
measured slip frequency to determine the compensated angle difference,
ANGLECn, as shown in Figure 5.159.
Block Synchronism Check –BKn (BSYNBKn)

Define any conditions for which a breaker synchronism check is not permitted.
For example, the LOP logic asserts for certain VT wiring errors even though the
individual phase-to-phase or phase-to-neutral voltages are normal. Other consid-
erations include a circuit breaker trouble indication. A breaker closed indication
has been used previously to deassert the synchronism-check Relay Word bits
after the breaker is closed. Do not assign a breaker-closed indication to the
BSYNSKn input if the 25BFSPn logic is also used.
Close Failure Angle –BKn (CFANGn)

A slow close operation results in a significant transient current through the
breaker and exposes the generator to a significant transient torque. Check with
the manufacturer when selecting an appropriate value for this setting.
Refer to Synchronism-Check Meter on page 7.16 for command information.
Voltage Selection Examples

Example 1
Breaker T
a A
b B
c C
(2) 24000-120 V (3) 24000-120 V
VAZ VCZ VAV VBV VCV
25T
Figure 5.162 Synchronizing Voltage Selection Example 1
The V and Z voltage are configured as follows:

PTCONV = Y
PTCONZ = D
Use the T synchronism-check element.
Because the generator VT is delta connected, phase-to-ground voltages are not
available. Therefore, a phase-to-phase voltage is chosen for the SYNCP setting.
(VBCZ or VCAZ would also be appropriate).
SYNCP = VABZ

While in theory, any system phasor could be selected and matched to the genera-
tor phasor, SEL recommends that you select the same phasor on both sides of the
breaker.
SYNCST = VABV
The sync source ratio factor will be:
KSTM = PTRZ / PTRV = 120 / 120 = 1.00
The sync source angle shift will be:
KSTA = 0.00
These settings may be adjusted to account for any small errors in PT accuracy.
Example 2
(1) 132800:66.4 V
Breaker
24.0–230 kV S
a A
b B
c C
(3) 24000-120 V Breaker

T
(1) 132800:66.4 V
VAZ VBZ VCZ VV1 VV3
25S 25T
Figure 5.163 Synchronizing Voltage Selection Example 2
The V and Z voltage are configured as follows:

PTCONV = 1PH
PTCONZ = Y
Use the S and T synchronism-check elements:
SYNCSS = VV1
SYNCST = VV3
The generator PT is wye-connected so all phase-to-phase and phase-to-ground
phasors are available. However, because of the GSU connection, the matching
phasor is VBCZ.
SYNCP = VBCZ
Because a phase-to-neutral voltage is compared to a phase-to-phase voltage, the
Synch Source Ratio Factor will be:
KSSM = KSTM = 120 / 66.4 = 1.807

Autosynchronizer
Because VBCZ is in phase with VBV, the sync source angle shift will be:
KSTA = 0.00
Autosynchronizer
The autosynchronizer (25A) sends raise and lower commands to the governor to
reduce the frequency difference (slip) between the generator and system to within
an acceptable level. It also sends raise and lower commands to the AVR to reduce
the voltage difference between the generator and system to within an acceptable
level. Once voltage and frequency are matched, it sends additional raise (dead
scope) pulses to the governor to bring the phase angle difference between the
generator and system to zero.
A complete scheme is implemented in the SEL-400G using a combination of
hard-coded logic and default SELOGIC for the auxiliary logic.
As is the case with the synchronism-check function, there are four instances of
the logic (S, T, U, and Y) plus additional common logic. However, only a maxi-
mum of three breakers are configurable for autosynchronizing. Also note that the
autosynchronizer is meant to synchronize a single generator using one or more
breakers, therefore synchronizing can only be active for one breaker at a time.
Enabling the Autosynchronizer

Several signals and settings from the synchronism-check element are used in the
autosynchronizer. The percentage voltage difference signal, DIFVn, is used for
voltage control. Similarly, the slip signal SLIPn is used for frequency control.
Therefore, before enabling the autosynchronizer, the corresponding synchro-
nism-check element must also be enabled.
Pulse Control Types

The 25A implements several types of pulse control.
Table 5.57 Types of Pulse Control
OFF Pulse control is disabled

Proportional The pulse width (W in Figure 5.164) is proportional to the error signal (slip
Width (PW) or voltage difference) and the pulse period is fixed.
Fixed (FD) Both the pulse width and pulse frequency are fixed. This control mode may
be more suitable for control using certain distributed control systems.
Proportional The pulse width is fixed and the pulse frequency (F in Figure 5.164) is pro-
Frequency (PF) portional to the error signal. Proportional pulse frequency (PPF) may be more
suitable in control systems that require a definite minimum pulse width.
Pulse control is enabled using the 25AVMOD and 25AFMOD settings. Because
voltage control uses the DIFVn signal (where n = S, T, U, Y), voltage pulse con-
trol cannot be enabled if 25VDIFn is set to OFF. Similarly, frequency control
uses the SLIPn signal, frequency pulse control cannot be enabled if 25SFBKn is
set to OFF.
The pulse control type for voltage and frequency control can be different.
Figure 5.164 illustrates the three control types.

Autosynchronizer
PW W W W W
1/F 1/F 1/F
PF W W W W
1/F 1/F 1/F
FD W W W W
1/F 1/F 1/F
Time
Figure 5.164 Pulse Control Types
Biased Operation
The 25A supports biased operation. Biased frequency control means that the
autosynchronizer controls the generator frequency to be greater than the system
frequency and the synchronism-check element only allows the breaker to close
when the generator frequency is greater than the system frequency. Biased volt-
age control means that the autosynchronizer controls the generator voltage to be
greater than the system voltage and the synchronism-check element only allows
the breaker to close when the generator voltage is greater than the system voltage.
The autosynchronizer uses the 25GVHIn setting to enable biased voltage control
and the 25GFHIn setting to enable biased frequency control. This maintains
coordination between the autosynchronizer and the synchronism-check elements,
ensuring that the autosynchronizer continues to issue control pulses as long as the
controlled value (frequency or voltage) remains outside the corresponding syn-
chronism-check acceptance window.
Biased operation can be applied independently to voltage and frequency control.
Refer to Figure 5.150 and Figure 5.154 to see the synchronism-check voltage and
frequency acceptance windows. Refer to Figure 5.170 and Figure 5.171 to see
the autosynchronizer operating characteristic.
Start/Cancel Logic
Referring Figure 5.165, synchronizing is started for Breaker n by asserting the
25ASTn Relay Word bit. The scheme seals-in until synchronizing is canceled via
the 25AnCN SELOGIC variable or when the 25ACD timer expires. Note that,
when a synchronization operation is active for a particular breaker (as indicated
by the 25AnACT Relay Word bit), synchronizing cannot be started for another
breaker.
25ASTn
S Q 25AnACT
25AACT
latch
25ACD
R 25AnTO
1
25ACNn reset sec
dominant
25ASACT
25ATACT 25AACT
25AUACT
25AYACT
Figure 5.165 Start/Cancel Logic

Autosynchronizer
Voltage Control Logic

Referring to Figure 5.166, voltage control is enabled when the 25AnACT Relay
Word bit asserts.
The pulse calculations enable the control pulse timer logic, determine the pickup
and dropout delays of the timers, and determine if a raise or lower pulse should
be issued.
The pulse calculations are active between pulses and frozen during a pulse asser-
tion.
Relay
Word
other Bits
breakers 25AVR
Relay
Word
Bit 1
25AnACT 0 0 0
25AnVEN Ton Toff other
voltage pulse 25AVL
calculations breakers
ON (time)
OFF (time)
CALC RAISE
Figure 5.166 Breaker n Voltage Control Logic
Frequency Control Logic

Referring to Figure 5.167, frequency control is enabled when the 25AnACT
Relay Word bit asserts.
The pulse calculations enable the control pulse timer logic, determine the pickup
and dropout delays of the timers, and determine if a raise or lower pulse should
be issued.
The pulse calculations are active between pulses and frozen during a pulse asser-
tion.
Dead scope and frequency pulses are mutually exclusive. Dead scope pulses
bring the generator and system into synchronism in the case that the frequency
becomes matched at an angle greater than the angle setting of the synchronism-
check element. This feature is only active for unbiased operation (25GFHIn = N)
and when the slip is very close to zero. The dead scope pulse control mode is FD.

Autosynchronizer
Relay
Word
Bit
25AnACT 0 0
25AnDEN Ton Toff Relay
dead scope Word
pulse Bits Relay
calculations Word
other Bits
OFF (time)
ON (time) breakers 25AFR
CALC
1
0 0 0
other 25AFL
Ton Toff
25AnFEN breakers
frequency
pulse
calculations
OFF (time)
ON (time)
CALC RAISE
Figure 5.167 Breaker n Frequency Control Logic
Counters that accumulate the number of control pulses for a close operation are
implemented as shown in Figure 5.168.
Relay
Word
Bits
25AFR
count 25AFCT
25AFL
25AACT reset
25AVR
count 25AVCT
25AVL
25AACT reset
Figure 5.168 Pulse Counter Logic
The autosynchronizer also provides a phase-reversal check. This logic can be

used if there are three-phase voltages available on both sides of the circuit
breaker wired to the Z and V voltage inputs and PTCONV = Y, D, or D1. It can
be used to supervise the synchronism-check element using the BSYNBKn
SELOGIC variable.
Referring to Figure 5.169, the logic checks that both the generator and system
voltages have correct phase rotation. The Z and V voltages must have at last 5
volts of positive-sequence voltage and the ratio of negative- to positive-sequence
voltage must be less than 5 percent.

Autosynchronizer
PTCONV = 1PH OR OFF
V1ZFM
V1VFM
5
25PHOK
0.05
3V2VFM
3 • V1VFM
3V2ZFM
3 • V1ZFM
Figure 5.169 Phase Check Logic
Control Pulse Calculations

The general equations for Proportional Width, Proportional Frequency, and Fixed
control are:
Proportional Width and Proportional Frequency:
Y  X  =  X  MINP  • Slope •  min  X MAX  – OFS  +  X  MINN  • Slope •  max  X – MAX  – OFS 
Equation 5.74
Fixed:
Y  X  = Duration •   X  MINP  –  X  MINN  

Equation 5.75
where:
X = either slip (frequency control) or voltage difference (voltage
control)
Slope = the value of 25AFSLP (frequency control) or 25AVSLP (volt-
age control)
MINP, MINN, are derived from the Slope and Win parameters
OFS, and
MAX
min and max = the minimum and maximum functions
Y = the pulse width for PPW and the pulse frequency for PPF.
The sign of Y determines if the pulse is a raise (negative) or a lower (positive).

Note that for biased operation, raise pulses can still be generated while X is posi-
tive. Win takes the value of SLIPn (frequency control) or 25VDIFn (voltage con-
trol).
For unbiased operation:
➤ MINP = 0.8 • Win
➤ MINN = –0.8 • Win
➤ OFS = Win/2
➤ MAX = 4 • Win

Autosynchronizer
For biased operation:

➤ MINP = 0.8 • Win
➤ MINN = 0.2 • Win
➤ OFS = 0
➤ MAX = 4 • Win
The correction deadband includes a 20 percent margin inside the slip allowed
band to reduce the possibility of the generator frequency remaining right at the
edge of the slip allowed band. Figure 5.170 shows a plot of (1) for a slope setting
of 0.5 and a Win of 0.067.
Frequency control is unbiased when 25FGHIk = N. This is the case when the
associated synchronism-check element is configured to allow a close when the
generator frequency is higher OR lower than the system frequency. Frequency
control is biased when 25FGHIk = Y. This is the case when the associated syn-
chronism-check element is configured to allow a close only when the generator
frequency is higher than the system frequency.
Unbiased 3
Biased
2.4
Slope Slope • Win / 2
Duration (seconds) for PPW or Frequency (Hz) for PPF
1.8
1.2
0.8 • Win
0.2 • Win 0.6
-0.8 • Win
–0.335 –0.268 –0.201 –0.134 –0.067 0 0.067 0.134 0.201 0.268 0.335
–0.6 4 • Win • Slope
–1.2
–1.8
–2.4
Win
–3
Slip (Hz)
Figure 5.170 Frequency Control Characteristic for Slope = 5 and Win= 0.067
Voltage control is unbiased when 25GVHIk = N. This is the case when the asso-
ciated synchronism-check element is configured to allow a close when the gener-
ator voltage is higher OR lower than the system voltage. Voltage control is biased
when 25GVHIk = Y. This is the case when the associated synchronism-check ele-
ment is configured to allow a close only when the generator voltage is higher than
the system frequency.

Autosynchronizer
Unbiased 2.5
Biased
2
Slope
Duration (seconds) for PPW or Frequency (Hz) for PPF

1.5
1
0.8 • Win
0.2 • Win 0.5
-0.8 • Win
–0.335 –0.268 –0.201 –0.134 –0.067 0 0.067 0.134 0.201 0.268 0.335
–0.5 4 • Win • Slope

Slope • Win / 2
–1
–1.5
–2
Win
–2.5
Voltage Difference (%)
Figure 5.171 Voltage Control Characteristic for Slope = 1 and Win = 5
Synchronizing Event Capture

Use the SEL-400G event report to capture synchronizing events. The event report
can capture waveforms as long as 12 seconds in length and can capture the
instantaneous voltage waveforms, as well as voltage magnitudes, angles, fre-
quency and Relay Word bits. The disturbance report can capture waveforms as
long as 300 seconds and can capture voltage magnitudes, angles, frequency, and
Relay Word bits.

Autosynchronizer
Figure 5.172 Close Test
Setting Guidelines
Table 5.58 Autosynchronizer Settings
25ASTna Start Auto-Sync. Check –BKn SELOGIC NA Group

25ACNna Cancel Auto-Sync. Check –BKn SELOGIC BSYNBKn Group
OR 52CLn
25ACD 25A Control Expiration Delay 0.000–400 s 30 Group
25AVMOD 25A Voltage Control Pulse Mode OFF, PW, FD, PF OFF Group
25AVSLP 25A Voltage Control Slope (V/s) 0.01–100 1 Group
25AVPER 25A Voltage Control Pulse Period (0.000–60 s) 0.000–60 10 Group
25AVDUR 25A Voltage Control Pulse Duration (0.000–60 s) 0.000–60 2 Group
25AFMOD 25A Frequency Control Pulse Mode (OFF, PW, FD, PF) OFF, PW, FD, PF OFF Group
25AFSLP 25A Frequency Control Slope (Hz/s) 0.01–100 1 Group
25AFPER 25A Frequency Control Pulse Period (0.000–60 s) 0.000–60 10 Group
25AFDUR 25A Frequency Control Pulse Duration (0.000–60 s) 0.000–60 2 Group
a n = S, T, U, Y.
Start Auto-Sync. Check -BKn (25ASTn)

Select an input to initiate a synchronization. This may be a pushbutton or a digital
control system (DCS) signal. This signal will typically be ANDed with additional
inputs that are required to supervise breaker closing.

Autosynchronizer
Cancel Auto-Sync. Check -BKn (25ACNn)

Select an input to cancel a synchronization. This can be a pushbutton or a DCS
signal. A cancel should also be issued when the associated synchronism-check
function is blocked. This can be implemented by ORing the cancel input with
BSYNBKn.
Autosynchronizer Time-out Delay (25ACD)

The 25ACD setting determines the duration for which the autosynchronizer
remains active. Set this timer longer than the expected time for a successful auto-
synchronization operation. This value varies depending on the characteristics of
the specific generator and control system.
Voltage and Frequency Control Pulse Modes (25AVMOD, 25AVMOD)

The settings 25AVMOD and 25AFMOD enable pulse control and determine
whether proportional width, proportional frequency, or fixed pulse control is
used. These settings also control which settings are used to define the control
pulse characteristics, as illustrated in Table 5.59.
Table 5.59 Autosynchronizer Active Settings for Each Pulse Control Mode
Mode/Setting PW Fixed PF
25AFDUR, 25AVDUR Not used Used Used

25AFPER, 25AVPER Used Used Not used
25AFSLP, 25AVSLP Used Not used Used
Control Pulse Characteristics (25AFDUR, 25AVDUR, 25AFPER,

25AVPER, 25AFSLP, 25AVSLP)
The following commissioning guidelines describe a method for the settings using
a step response test. In Figure 5.173, a raise-frequency control pulse is sent to the
governor of a machine. The response is captured. The gain of the system is:
Y 0.5 Hz
K = -------- = ---------------- = 1
X 0.5 s
The system time constant, T is the time required to reach 63.2 percent of the
steady-state which, in this example, is 4 seconds.

Autosynchronizer
60
0.5 sec
Control pulse
59.8
System K = 0.5 Hz
0.5 sec
response
59.6
Frequency (Hz)
T = 4 sec
59.4
59.2
0.5 Hz
0.632 •0.5 Hz
59
58.8
5 10 15 20 25 30 35
Time (s)
Figure 5.173 Step Response Test
The following guidelines provide settings that allow matching in a relatively

short time without hunting. Note that these guidelines do not consider the details
of the control system, so it is important to complete a synchronization test to
check overall system operation and to fine-tune the response.
In Table 5.60, K and T are determined from Figure 5.173 and Win is the voltage
difference window for voltage control or slip window for speed control.
Table 5.60 Autosynchonizer Pulse Control Setting Guidelines
Mode/Setting PPW PPF
25AFDUR, 25AVDUR NA Win/(2 • K) (sec)

25AFPER, 25AVPER T/2 (sec) NA
25AFSLP, 25AVSLP 1/(6 • K) (sec/Hz) 2/(3 • T • Win) (Hz/Hz)
External Wiring
Figure 5.174 shows the associated wiring for Breaker S.
A17 A18 52B

IN
201
52Bx
sync A01 A02
permission CC
OUT201
Figure 5.174 Breaker S External Circuit Wiring Example

Loss-of-Potential Element
The LOP element detects a loss of voltage potential to the relay. The logic is
designed to distinguish between a valid LOP and other events such as a fault or a
normal shutdown of the generator. In this section, the index k refers to the voltage
input terminal (V or Z). The index h refers to the current terminal identified in the
setting LOPISk (S, T, U, Y, G).
The LOP element can be used in the large majority of applications with its
default settings. However, the element includes features that allow it to be modi-
fied for challenging applications. These include a torque-control SELOGIC con-
trol equation and configurable output logic.
Voltage-Current Scheme
The voltage-current scheme uses the voltage and current to detect an LOP condi-
tion
Figure 5.175 implements a current-based disturbance detector. The logic mea-
sures the change in positive-sequence and negative-sequence current. Current
disturbance (LOPDIk) is declared when over a period of 20 ms, the positive-
sequence current was and remains higher than the minimum threshold (5 percent
of nominal current), there has been a change in positive-sequence current magni-
tude that is greater than 2 percent of nominal current, and a positive-sequence
current angle change greater than 5 degrees has occurred. Further, the logic also
declares current disturbance detection if, over a period of 20 ms, the negative-
sequence current magnitude has changed more than 2 percent of nominal current.
I1hFM(i – 4)
0.05 • INOMh
I1hFMi
I1hFAi |I1hFAi – I1hFAi – 4|

I1hFA(i – 4)
5°
LOPDIk
|I1hFMi – I1hFMi – 4|
0.02 • INOMh
3I2hFMi |3I2hFMi – 3I2hFMi – 4|
3I2hFMi – 4
0.06 • INOMh
Figure 5.175 Current Disturbance Detector
The logic of Figure 5.176 checks for an incremental drop in the positive-
sequence voltage magnitude. The LOPVRk setting determines this increment. It
has a default value of 0.90. Using this value, the upper comparator checks that the
voltage has dropped by 10 percent over a period of 20 ms. A voltage change
because of a valid LOP will be practically instantaneous. On the other hand, the
voltage drop during a normal generator shut down will be much more gradual.
The lower comparator checks that the initial voltage was greater than 1 volt.

V1kM
(Setting)
20 ms
LOPVRk
buffer
LOPDVk
1V
Figure 5.176 Positive-Sequence Voltage Change Detector
Figure 5.177 shows the incremental voltage-current logic. If the positive-

sequence voltage change detector asserts without a coincident current distur-
bance, the LOPIk Relay Word bit asserts and seals in. Any subsequent current
disturbance would break the seal-in. Therefore, once LOP is declared, the current
disturbance path is blocked. A check is made that the positive-sequence voltage
is healthy and there is relatively little negative-sequence voltage. This check
asserts LOPRSk which acts to break the seal-in.
LOPDVk
LOPIk
LOPDIk 0
40 400
LOPk
0 (in ms)
(in ms)
40 LOPRSk
0
V1kM (in ms)
0.85 • VNOMk
0.3 • V1kM
3V2kM
SELOGIC
Equation
LOPTCk
Figure 5.177 Incremental Voltage-Current Detection Logic
The incremental voltage-current logic cannot detect the case where the generator
is energized with no voltages connected to the relay. This can happen if fuses are
removed during a shutdown and are not replaced. The three-phase undervoltage
logic, shown in Figure 5.178, can be used to detect this condition.
SELOGIC
Control
Equation
LOPTCk
5V
V1kFM
LOP3PHk
I1GFM
0.05 • INOMG
SELOGIC
Control
Equation
FLDENRG
Figure 5.178 Three-Phase Undervoltage Logic
The three-phase undervoltage logic is intended to operate when the generator

field is known to be energized (via the FLDENRG setting) but virtually no volt-
age is measured at the terminals. One option for setting FLDENERG is to use an

indication that the field breaker is closed (52Fa). This signal must be wired to the
relay. A second option is to use the magnitude of the third-harmonic voltage mea-
sured at the generator neutral as shown in Figure 5.179. EGNPT must be config-
ured to monitor the generator neutral voltage. Check the third-harmonic voltage
level while the generator is energized and offline to determine the value for com-
parison.
Figure 5.179 Using Third-Harmonic Neutral Voltage to Indicate That the Field
Is Energized
The negative-sequence logic, shown in Figure 5.180, checks for a significant

negative-sequence voltage (greater than 15 percent of V1) without a coincident
negative-sequence current. The logic also checks that there is virtually no genera-
tor neutral voltage. The check (in the dashed box) is bypassed if there is no neu-
tral voltage measurement (EGNPT = OFF) or for the V element when
ESYSPT = V.
SELOGIC
Equation
LOPTCk
3V2kM
V1kM 0.45
VNOMk 0.15
40
I1hM 0.45 LOPQk
3I2hM 0
(in ms)
I1hM
INOMh 0.05
V1kM 0.1
VNFM
EGNPT OFF
Figure 5.180 Negative-Sequence Logic
The SEL-400G also provides a voltage balance LOP scheme, as shown in

Figure 5.181. This scheme checks for a small difference between the V and Z
positive-sequence voltages to detect an LOP. This scheme can operate over a
wide voltage range, making it more suitable for a generator that is started with its
field applied (for example a combustion gas turbine). On the other hand, this
scheme requires that the V and Z inputs be wired to two different VTs at the gen-
erator terminals or to two different windings on the same VT. If this scheme is
used, the V input cannot be configured as 1PH.
A loss of potential is expected to result in a reduction in positive-sequence volt-
age on the faulty VT. The logic uses this principle to declare which VT has a
problem.
The 60LVR setting accounts for small ratio errors between the two VTs. The
60LVP setting determines the sensitivity of the element. The function is disabled
when the pickup is set to off.

SELOGIC
Equations
LOPTCV
LOPTCZ
(Setting) 60LOPV
60LVP
20
V1ZM (Setting) 60LDVM
V1VM V1ZM – 60LVR • V1VM 0
(in ms) 60LOPZ
–60LVP
Figure 5.181 Voltage-Balance Logic
Configurable Output Logic

Assertion of the SET input (LOPSk) immediately asserts the output. If the SET
time delay (LOPSDk) expires, the output is latched. Assertion of the RESET
input (LOPSk) until the reset timer (LOPRk) resets the latch and deasserts the
output. Figure 5.182 shows the output logic.
SELOGIC (Setting)
Equations LOPSDk
LOPSk
0 LOPk
S Q
(Setting)
LOPSDk
LOPRk R
0
Figure 5.182 Voltage-Current LOP Settings
Setting Guidelines
Table 5.61 Loss-of-Potential Settings
ELOP Enable Loss of Potential OFF or combo of V, Z Z Group

LOPISka LOP k Current Source S, T, U, Y, G G Group
a
LOPTCk LOP k Torque Control (SELOGIC Eqn) SV 1 Group
a
LOPVRk LOP k Incremental Voltage Ratio OFF, 0.50–0.98 0.9 Group
a
LOPSk LOP k Set SV (LOPIk OR LOPQk OR Group
60LOPk OR LOP3PHk)
AND (NOT LOPRk)
LOPSDka LOP k Set Delay 0.000–1 0.3 Group
a
LOPRk LOP k Reset SV LOPRSk Group
a
LOPRDk LOP k Reset Delay (0.000–1 s) 0.000–1 0.5 Group
a k = V, Z.
Enable Loss of Potential

LOP should be enabled for a voltage terminal if the input is used for protection
and the protection function is at risk of misoperation for a loss of potential.
Examples of an at-risk protection function is voltage restrained overcurrent.

LOP Current Source

The LOPISk setting determines which current will be used by the scheme. This
current must be physically associated with the monitored voltage. In other words,
a disturbance that produces a change in the monitored voltage should also pro-
duce a change in the selected current. In most instances, the default setting (gen-
erator current) can be used.
LOP Torque Control

The default setting of 1 is adequate in the large majority of applications. This
input can be used to block LOP in special circumstances such as during dynamic
braking. Another example is the case of a VT on the system-side of a generator
breaker as shown in Figure 5.183. In this example, both LOP elements are con-
figured to use the voltage-current scheme. LOPV asserts for a fault when
Breaker U is open. To prevent this, the element can be torque-controlled using
breaker-closed status.
G U
SEL-400G
Settings
ELOP := V, Z LOPZ LOPV
LOPISZ := G
LOPISV := G
LOPTCZ := 1
LOPTCV := 52CLU
Figure 5.183 VT on the System-Side of Generator Breaker
LOP Incremental Voltage Ratio

This setting defines the sensitivity of the incremental voltage-current detection
logic. A higher setting results in a more sensitive setting. However, an overly sen-
sitive setting could result in spurious LOP assertions. A setting of OFF disables
the incremental logic.
LOP Set
This setting defines the conditions which assert the LOP output. The default
assignment ORs the output Relay Word bits for the incremental voltage-current
logic, the negative-sequence logic and the voltage-balance logic. The SELOGIC
control equation allows conditions to be added or removed. For example, the aux-
iliary contact from a mini-circuit breaker.
LOP Set Delay

This setting defines how long an LOP must be asserted before it is latched.

LOP Reset
This setting defines the conditions which reset the LOP output after latching. The
default assignment uses the LOPRSk setting, which checks that there is a signifi-
cant positive-sequence voltage and relatively little negative-sequence voltage. A
reset signal could also be derived from a pushbutton.
LOP Reset Delay

This setting defines how long the reset signal must be asserted before the output
latch is reset. For example, if the latch is reset from a pushbutton, this value
should be set to zero.

Subsidence current results from energy trapped in a CT magnetizing branch after
a circuit breaker opens to clear a fault or interrupt load. This current exponen-
tially decays and delays the resetting of instantaneous overcurrent elements used
for breaker failure protection. Breaker failure protection requires fast open-phase
detection to ensure fast resetting of instantaneous overcurrent elements.
Figure 5.184 shows open-phase logic that asserts SEL-400G open-phase detec-
tion elements OPHpm (p = A, B, C; m = S, T, U, Y) in less than one cycle, even
during subsidence current conditions.
ZCD = Zero Crossing Detector

ZCD OPHCm
5/8 OPHBm
OPHAm OPHm
dI ZCD
IRAW 0
dt
|IRAW| > 0.9 • 35 • INOM • 2

0
2/8
Figure 5.184 A-Phase Open-Phase Detection Logic
The logic measures the zero crossings and maximum and minimum current val-
ues of each phase. The relay declares an open phase when the logic does not
detect a zero crossing or current value within 5/8 of a power system cycle since
the previous measurement. OPHm, the output of the logic, asserts when all three
phases of a particular winding assert.
Breaker Failure Elements

The SEL-400G contains four standard breaker failure elements, one for each of
the S, T, U, and Y current terminals. Use the EBFL Group setting to enable the
appropriate terminals necessary for your particular application. Figure 5.185 and
Figure 5.187 show the breaker failure logic. In Figure 5.185, three comparators
test the three-phase currents against the 50FPUn settings and one comparator
tests the neutral current against the INFPUn setting. SELOGIC setting ENINBFn
allows the neutral breaker failure function to be conditional if system unbalance
conditions could cause inadvertent initiation of the neutral element, such as what
might occur in single-pole tripping systems. When any phase current exceeds the
50FPUn setting or the neutral current exceeds the INFPUn setting, the appropri-

ate Relay Word bit asserts (IAnBF, IBnBF, ICnBF, and/or INnBF). Each phase
current comparator is supervised by the associated open-phase detectors OPHpn
(p = A, B, C; n = S, T, U, Y). The neutral current comparator is supervised by the
all three poles open detector (OPHn).
*ENINBFn
3I0nFM INnBF
INFPUn
(Setting)
OPHn
IAnFM
IAnBF
OPHAn
*SELOGIC Equation
IBnFM 50Fn
IBnBF
OPHBn (see Alternate BF)
ICnFM
ICnBF
50FPUn
(Setting)
OPHCn Breaker Failure Timer FBFn
BFPUn
BFITn
*BFIn
0 Retrip Timer
RTPUn
RTn
0
External Breaker
Failure Timer
EBFPUn
*EXBFn EBFITn
*EXBFSPn
0
Figure 5.185 Breaker Failure Logic for Breaker n When BF_SCHM = Y
Input BFIn is a SELOGIC control equation that provides the breaker failure initi-
ate signal. When BFIn asserts, both the breaker failure timer and the re-trip timer
start timing. When the re-trip timer expires, RTn asserts, and when the breaker
failure timer expires, BFITn asserts. If 50Fn is asserted when BFITn asserts, the
breaker failure output, FBFn, asserts. Note that BFIn must be present for the
entire duration of the breaker failure timer setting. If BFIn is not present con-
stantly, the timers reset when BFIn falls away (see alternate initiate logic in
Figure 5.187).

(see Alternate BF)

Breaker Failure Timer
BFPUn
50Fn q BFITn FBFn
*BFIn
0
Retrip Timer
RTPUn
RTn
*SELOGIC Equation
0
External Breaker
Failure Timer
EBFPUn
*EXBFn EBFITn
*EXBFSPn
0
q From Figure 5.185.

Figure 5.186 Breaker Failure Logic for Breaker n when BF_SCHM = Y1
The logic shown in Figure 5.186 is enabled when the breaker failure scheme set-
ting is set to Y1 (BF_SCHM = Y1). The logic enabled with option Y1 is similar
to that shown in Figure 5.185, but the current check (50Fn) is now part of the
breaker failure initiate timer (BFPUn) and retrip time delay (RTPUn).
The logic includes a path for the case when breaker failure initiates from a pro-
tection function that can operate for events with little or no associated current
(when there is no current supervision), such as for a generator sequential trip or
for a Buchholz relay operation on an unloaded transformer. Because a Buchholz
assertion can be present even after the breakers are open, to increase security a
non/low-current supervision, EXBFSPn is provided.
This path is controlled via the ANDed output of the EXBFn and EXBFSPn con-
trol equations. The logic is the same for both BF_SCHM = Y and BF_SCHM =
Y1. Configuration of this path is described in Generator Breaker Failure and
Breaker Current Considerations on page 5.177.
Generator Breaker Failure and Breaker Current Considerations

An incorrect breaker-failure operation can have serious consequences. In a gener-
ator protection application, such an event can lead to the loss of adjacent genera-
tors and/or transmission lines. Therefore, it is useful to analyze the breaker
failure logic in terms of security and dependability.
Current Detector Supervision

An incorrect breaker failure operation can occur if the breaker opens but still
appears closed. In the past, current detectors were known to remain picked up in
the presence of subsidence currents and protection engineers needed to account
for this possibility. In the SEL-400G, the open-phase detectors provide sub-cycle
resetting of the current detectors, even when subsidence current is present. This
makes current detection the most secure indication that the breaker is still closed.
The SEL-400G is equipped with overcurrent detectors on each phase and an
additional current detector that responds to the zero-sequence (3I0) component of
the breaker current.

Dependable operation for an actual breaker failure requires that the pickup of the
current detectors be set less than the minimum expected current through the
breaker for a fault seen by any of the protection elements assigned to BFIn (or
ATBFIn if this logic is used).
A secondary consideration is to set the current detectors so that they are not per-
manently picked up under normal operation. For the phase current detectors, this
would entail setting the pickup greater than the maximum expected load current
and for the unbalanced current detector to set the pickup greater than the maxi-
mum expected zero-sequence current.
There are a variety of generator abnormal conditions for which the relay provides
protection but that do not result in significant breaker current during the event.
For instance, a ground fault on a high-impedance-grounded machine produces
virtually no increase in the breaker current. Another example is sequential trip-
ping, which is often employed as part of a normal generator shutdown. During a
sequential trip, the prime mover is tripped first and the opening of the generator
breaker is delayed until a reverse power condition is confirmed. The current
drawn by the machine prior to breaker opening can be very low. If the breaker
fails to open, the unit can suffer damage while motoring. In transformer applica-
tions, the Buchholz can operate when the transformer is unloaded.
Sometimes there is insufficient current for current detectors in a generator
breaker failure application. Furthermore some initiating signals such as the Buch-
holz relay can be present even after the breakers are open. Therefore, these
schemes require an additional indication that the breaker is still closed.
The SEL-400G provides a non-current-supervised initiate path via the EXBFn
input. Protection functions that do not produce significant fault current should be
assigned to this input. This path is supervised by the EXBFSPn control equation.
The logic is the same for both BF_SCHM = Y and BF_SCHM = Y1. The
SEL-400G provides two methods to provide this supervision. Configuration of
this path is described in Breaker-Closed Supervision on page 5.178.
Breaker-Closed Supervision
A breaker-closed auxiliary contact is often used to supervise the EXBFn path. If
each pole of the breaker has its own operating mechanism, a breaker-closed indi-
cation from each pole should be paralleled to provide reliable indication in the
case of a single stuck pole.
A breaker auxiliary contact is not completely reliable. One of the more common
failures is an open connection in the control wiring between the contact and the
relay. In this case, the relay receives a permanent indication that the breaker is
open. A subsequent protection operation will not lead to an incorrect breaker fail-
ure operation, but the scheme will also not operate for an actual stuck breaker.
The following equations show individual protection functions supervised by the
breaker-closed indication to form the non-current-supervised initiate for Breaker
S. In this example, the protection functions that do not produce significant fault
current are V/Hz, reverse power, frequency, and stator ground. This list may dif-
fer depending on the application.
EXBFIS := 24D1T1 OR 32T01 OR 81D1T OR 64GT
EXBFSPS := 52CLS
Because it is possible that there can be a failure of the breaker indication, the
relay includes breaker status logic (see Circuit Breaker Monitor on page 7.18).
This logic is the source of the 52CLn Relay Word bit shown here. The logic also
provides an alarm for an incorrect breaker status using breaker-closed (52a) and

breaker-opened (52b) contacts as well as a current-based open-phase indication.

The alarm output 52ALn asserts if the 52a and 52b disagree. It also operates if
they do agree but disagree with the open-phase indication. Monitoring the 52ALn
alarm and promptly addressing the cause of problem can reduce the possibility of
a loss of availability of the breaker failure function.
Synchronism-Check Supervision
A breaker failure may involve a failure of the mechanism to move the contacts
apart sufficiently to interrupt the current, while the mechanism that drives the
auxiliary contacts moves normally. In this case, the breaker failure to open would
go undetected by the breaker failure scheme, leaving the generator vulnerable to
motoring. Conversely, if the mechanism fails to open the breaker auxiliary con-
tact correctly, a false breaker-closed can be indicated, resulting in an unnecessary
backup trip even though the main contacts have successfully interrupted the cur-
rent.
In applications where a synchronism-check element has been applied to the gen-
erator breaker, the 25BFSPn Relay Word bit is provided as an alternative to the
breaker-closed auxiliary contact (see Synchronism-Check-Based Breaker Closed
Indication on page 5.155). The premise for this logic is that when the breaker
opens, the generator and system will not remain in exact synchronism. The volt-
age magnitude difference, or slip or the angle difference, moves out of its respec-
tive acceptance window and the 25BFSPn Relay Word bit deasserts. On the other
hand, if the breaker remains closed, the 25BFSPn Relay Word bit remains
asserted. The following equations show this signal supervising the V/Hz, reverse
power, frequency, and stator ground functions to form the non-current-supervised
initiate for Breaker S.
EXBFIS := 24D1T1 OR 32T01 OR 81D1T OR 64GT
EXBFSPS := 25BFSPS
The logic shown in Figure 5.186 is enabled when the breaker failure scheme set-
ting is set to Y1 (BF_SCHM = Y1). The logic enabled with option Y1 is similar
to that shown in Figure 5.172, but the current check (50Fn) is now part of the
breaker failure initiate timer (BFPUn) and retrip time delay (RTPUn).
For a detailed discussion of this topic, see the technical paper New Voltage-Based
Breaker Failure Scheme for Generators, by Michael Thompson and Dale Finney,
at selinc.com
Alternate Breaker Failure Initiate Logic

Figure 5.187 shows an alternate breaker failure initiate logic. This logic is
applied when the protection philosophy dictates that both current and breaker-
failure initiate signals may not be coincident. Referring to Figure 5.187, the alter-
nate breaker failure logic creates a time window following the reset of a breaker
failure initiate (ATBFIn). If the current detector asserts during this time window,
the breaker failure operation will still occur.
To use the alternate initiate logic, connect the breaker failure initiate signal to
ATBFIn (instead of to BFIn in Figure 5.185). Then connect the output of the
alternate initiate logic (ABFITn) to BFIn (Figure 5.185).

Breaker Failure Seal-in Timer

BFISPn
BFISPTk
EBFISn 1
(Set = 1 if EBFISn = Y) 0 1
Alternate Breaker Failure Timer

2 ABFITn
0 ATBFTn
*ATBFIn
BFIDOn 2 n = S, T, U, Y
50Fn * SELOGIC Equation
Figure 5.187 Alternate Breaker Failure Logic for Terminal k
The timers in this logic accommodate possible intermittent behavior of either the
breaker failure initiate signal or the current detector signal, as described in the
following sections.
1. Substitution of the current detector signal using the BFIDOn timer
Use this option in dual-breaker applications when current is not
immediately present. This can happen in a dual-breaker application,
as shown in Figure 5.188. In this scenario, Breaker T has failed but
most of the fault current is initially flowing through Breaker S. Once
Breaker S opens, the fault current is redistributed through Breaker T.
The dropout timer (BFIDOn) is used to prevent a delayed breaker
failure operation under this scenario (because of insufficient current
through Breaker T). Set the dropout time longer than the expected
operate time of Breaker S. On the rising edge of ATBFIn, the lower
input of AND Gate 2 is asserted for the duration of BFIDOk. After
time-out, the current detector takes over this roll.
Stuck Stuck
Breaker Breaker
S T S T
SEL-400G SEL-400G
Figure 5.188 Current Redistribution in a Dual-Breaker Configuration
2. Seal-in of the breaker-failure initiation signal

Use this option when it is possible for the breaker-failure-initiate
signal to reset prior to time-out of the breaker failure timer (BFPUn).
The logic requires that both the breaker-failure initiate and current
detector signals are initially present for period longer than the
breaker failure seal-in (BFISPn) time delay. Once this timer expires,
the scheme seals-in until the current detector resets. To use this
option, set EBFISn to Y. It is important to set BFISPn long enough to
avoid seal-in from any possible spurious protection assertion.

Breaker Failure Setting Guidelines

Table 5.62 Breaker Failure Settings
EBFL Enable Breaker Fail Prot. OFF or combo of S, T, U, Y OFF Group

BF_SCHM Breaker Failure Scheme, Y, Y1 Y Group
a
BFIn Breaker Fail Initiate—BKR n SELOGIC control equation NA Group
a
EXBFn Enable External Breaker Fail – BKR n SELOGIC control equation NA Group
a
EXBFSPn External Bkr Fail Superv – BKR n SELOGIC control equation NA Group
a
EBFPUn Ext. Brkr Fail Init PU Delay n 0.0000 to 100 s 0.1 Group
a
50FPUn Fault Current Pickup—BKR n 0.50 to 50 s 10 Group
BFPUna Brkr Fail Init Pickup Delay BKR n 0.0000 to 100 s 0.1 Group
a
RTPUn Retrip Delay—BKR n 0.0000 to 100 s 0.05 Group
a
ENINBFn Enable Neutral Breaker Failure—BKR n SELOGIC control equation NA Group
a
INFPUn Neutral Current Pickup—BKR n 0.50 to 50 s 0.5 Group
a
n = S, T, U, Y.
EBFL (Enable Breaker Fail)

Set EBFL to enable breaker failure protection for the specific terminals in your
application. Breaker failure can only be enabled for breakers included in the
ESYSCT setting.
BF_SCHM
This setting determines whether the current check occurs before or after the
Breaker Failure Timer expires. Refer to Figure 5.185 and Figure 5.186 and the
associated text.
BFIn (Breaker Fail Initiate)

Use the BFIn setting (SELOGIC control equation) to specify conditions under
which the breaker failure initiate input must be active. These will be protection
functions associated with faults that produce a significant current through the
breaker. These Relay Word bits must be ORed.
50FPUn (Fault Current Pickup)

The setting 50FPUn is the current pickup setting in amperes secondary for the
breaker failure overcurrent element of each enabled terminal. The setting must be
set less than the minimum current expected through the breaker for a fault seen
by any of the protection elements assigned to BFIn.
BFPUn (Breaker Failure Initiation Pickup Delay)

For each enabled terminal, select a time in seconds that you want the breaker fail-
ure timer to wait before asserting a breaker failure trip. This needs to be long
enough to allow the breaker to open and the current detectors to reset but short

enough to isolate a failed breaker before the power system becomes unstable. Not
that the current detectors can reset in less than a cycle even in the presence of a
subsidence component.
RTPUn (Retrip Delay)

Select a time in seconds that you want the retrip timer to wait before asserting.
This delay can normally be set to zero.
EXBFn (Enable External Breaker Fail)

Use the EXBFnk setting (SELOGIC control equation) to specify conditions under
functions associated with faults that do not produce a significant current through
the breaker, such as V/Hz for a generator or a Buchholz relay indication on an
unloaded transformer. These Relay Word bits must be ORed.
EXBFSPn (External Breaker Failure Supervision –BKR n)

Select a signal that indicates that the breaker is still closed. This is typically either
the 52CLn or 25BFSPn Relay Word bit.
EBFPUn (External Breaker Failure Initiation Pickup)

Select a time in seconds that you want the external breaker failure element to wait
before asserting. This must be long enough to allow the breaker to open and the
supervising signal (breaker position or sync-check) to indicate that the breaker is
open. Note that because there is no significant fault current associated with this
path, power system stability is less of a concern. Consequently, this delay can
safely be set longer than the BFPUn delay.
ENINBFn (Enable Neutral Breaker Fail)

Use the ENINBFn setting (SELOGIC control equation) to specify conditions
under which the neutral breaker input must be active. There is a setting for each
of the enabled terminals. If you set ENINBFn = 1, the input is asserted perma-
nently.
INFPUn (Neutral Current Pickup)

INFPUn is the current pickup setting in secondary amperes for the neutral
breaker failure overcurrent element of each enabled terminal. The setting must be
set below the minimum current expected through the breaker for a fault seen by
any of the protection elements assigned to BFIn or (ATBFIn when using the alter-
nate breaker failure initiate logic.
Alternate Breaker Failure Initiate Setting Guidelines

Table 5.63 Alternate Breaker Failure Settings (Sheet 1 of 2)
ATBFIn Alt Breaker Fail Initiate—BKR n SELOGIC control equation NA Group

EBFISn Breaker Fail Initiate Seal-In—BKR n Y, N N Group

Table 5.63 Alternate Breaker Failure Settings (Sheet 2 of 2)
BFISPn Brkr Fail Init Seal-In Delay—BKRn 0.0000 to 20 s 0.05 Group

BFIDOn Brkr Fail Init Dropout Delay—BKRn 0.0000 to 20 s 0.025 Group
Use the alternate breaker failure initiate logic in situations where breaker failure
protection philosophy requires a simultaneous assertion of the breaker failure ini-
tiate and current detector signals. When using this logic, be sure to set BFIn
(Figure 5.185) to ABFITn.
ATBFIn (Alternate Breaker Fail Initiate)

Use the ATBFIn setting (SELOGIC control equation) to specify conditions under
functions associated with faults that produce a significant current through the
breaker. These Relay Word bits must be ORed.
EBFISn (Breaker Fail Initiate Seal-In)

Use the seal-in logic when it is possible for the breaker failure initiate signal
(ATBFIn) to reset before a breaker failure operation can occur. Enable the
breaker failure seal-in timer circuit by setting EBFISn = Y (see Breaker Failure
Setting Guidelines on page 5.181).
BFISPn (Breaker Fail Initiate Seal-In Delay)

Select a time in seconds that you want the breaker failure seal-in timer to wait
before asserting (see Breaker Failure Setting Guidelines on page 5.181). This set-
ting should be long enough to avoid seal-in for a spurious assertion of ATFBFIn.
BFIDOn (Alternate Breaker Failure Timer)

Select a time in seconds that you want the alternate breaker failure timer to wait
before asserting (see Alternate Breaker Failure Initiate Setting Guidelines on
page 5.182). Use this timer to avoid a delayed breaker failure operation in cases
where the current detector may not assert immediately.

A breaker flashover can occur just prior to closing of a breaker or just after open-
ing of a breaker. During this period, the voltage across the open contacts can be in
the range of two per-unit. The SEL-400G provides a breaker flashover element
for each breaker.
Two schemes are provided, as shown in Figure 5.189. Either scheme can be
selected using the EFOBFn setting. If the breaker is located on the high-voltage
side of the GSU, both schemes can detect a flashover of one or two phases or a
flashover involving ground.
If EFOBFn = G, the scheme consists of a zero-sequence current detector super-
vised by breaker-open indication 52B_n (see Figure 5.80). This scheme is highly
tolerant of incorrect breaker status, but cannot detect a three-phase flashover.

If EFOBFn = P, the scheme employs current detectors for each phase. This
scheme can detect a three-phase flashover, but could be at greater risk of mis-
operation because of an incorrect breaker status, because the phase current detec-
tors are likely to be continuously picked up when the breaker is closed. There-
fore, the logic opens a 5-cycle (at 60 Hz) window on the appearance of current. If
the breaker status indicates open during this period, the logic declares breaker
flashover. During a normal breaker closing, these conditions may be briefly satis-
fied, therefore the logic must be supervised by a breaker close command indica-
tion via BLKFOn. This signal is extended for a period longer than the time
expected for breaker closing.
If the breaker is located on the low-voltage side of the GSU, a single-phase flash-
over or a flashover involving ground will be detected by ground fault protection
schemes. These events will be cleared via breaker failure if the ground fault pro-
tection initiates breaker failure by using the low current (EXBF) initiate path, as
shown in Figure 5.185, or by ground fault protection (3V0) associated with the
IPB.
A breaker flashover is a breaker failure and should therefore trip the same power
system elements as required by the breaker failure scheme.
Zero-Sequence Overcurrent Scheme
80
52B_n ms
0
3I0nFM
Setting
Setting
50FOPUn FOPUn FOBFn
OPHn 0
Setting
EFOBFn = G
Phase Overcurrent Scheme

EFOBFn = P
52B_n
IAnFM
OPHAn
IBnFM
OPHBn
Reset Dominant
ICnFM 80
Setting ms S
50FOPUn 0
OPHCn
SELOGIC 0 R
BLKFOn 100
ms
Figure 5.189 Breaker Flashover Logic

Over- and Underfrequency Elements
Setting Guidelines
Table 5.64 Breaker Flashover Elements Settings
EFOBFn Enable Flash Over –BKR n P, G P Group

50FOPUn Flash Over Current PU –BKR n 0.50–50 A, sec 10 Group
FOPUn Flash Over Init PU Delay –BKR n 0.0000–100 s 0.1 Group
BLKFOn Block Flash Over –BKR n SV NA Group
EFOBFn (Enable Flash Over –BKR n)

Use this setting to enable either scheme. The per-phase scheme provides more
comprehensive protection but also requires an additional blocking input.
50FOPUn (Flash Over Current PU –BKR n)

Set the pickup low enough to detect a flashover condition. The expected current
is expected to have a high maximum value but varies as the machine moves in
and out of synchronism with the system. For the zero-sequence scheme, this
value should also be greater than the maximum expected zero-sequence current
during normal operation.
FOPUn (Flash Over Init PU Delay –BKR n)

Set the delay longer than the normal breaker closing time plus margin.
BLKFOn (Block Flash Over –BKR n)

Choose a signal that indicates that a command has been issued to close the
breaker.

Use the relay frequency elements for such abnormal frequency protection as
underfrequency load shedding.
Figure 5.190 shows the logic for the six levels of over- and underfrequency ele-
ments in the relay.
The frequency input to each element is given by the selection setting, 81On
(n = 1–6), which can be set to either generator (FREQPG) or system (FREQPS)
frequency.
Each frequency element can operate as an overfrequency or as an underfrequency
element, depending on its pickup setting. If the element pickup setting (81DnP,
n = 1–6) is less than the nominal system frequency setting, NFREQ, the element
operates as an underfrequency element, picking up if measured frequency is less
than the set point. If the pickup setting is greater than NFREQ, the element oper-
ates as an overfrequency element, picking up if measured frequency is greater
than the set point. Each element can be enabled or disabled individually using the
torque-control setting (81DnTC), which can be set to a SELOGIC control equa-
tion.

FREQOKa
FREQFZa
27B81a
81On 81DnTC
81DnOVR
81DnP Frequency Timer n
81DnD
81DnP NFREQ 81DnT
0
81DnP
NFREQ
a = G, S
81DnUDR n = 1–6 81Dn
Figure 5.190 Frequency Element Logic
Note that Relay Word bit 27B81a controls all frequency elements associated with
the same frequency tracking source, i.e., 27B81G controls the frequency ele-
ments that are associated with FREQPG and 27B81S controls the frequency ele-
ments that are associated with FREQPS. This undervoltage supervision control
prevents erroneous frequency element operations during system faults.
Over- and Underfrequency Element Settings

Table 5.65 Over- and Underfrequency Element Settings
E81 Enable Frequency Elements N, 1–6 2 Group

81UVSP 81 Element U/V Supervision OFF, 20.00–200 85 Group
a
81On 81 O/U Element n Operating FREQPG, FREQPS FREQPG Group
Quantity
81DnPa 81 O/U Element n Pickup 5.01–119.99 61 Group
a
81DnD 81 O/U Element n Time Delay 0.050–400.000 2 Group
a
81DnTC 81 O/U Element n Torque Control SELOGIC control 1 Group
equation
a n = 1–6.
E81 (Enable 81 Elements)

Set E81 to enable as many as six over- and underfrequency elements. When E81 = N,
the relay disables the frequency elements and hides corresponding settings; you
do not need to enter these hidden settings.
81UVSP (81 Element Undervoltage Supervision)

This setting applies to all six frequency elements. If the instantaneous value of
the tracking voltage associated with Element n falls lower than the 81UVSP set-
ting, all frequency elements associated with the tracking source are disabled.
81On (Level n Operating Quantity)

Select the frequency source that is used as the operating quantity for Element n.
This can be set to FREQPG (for generator frequency) or FREQPS (for system
frequency).

Accumulated Frequency Element
81DnTC (Level n Torque Control)

Set 81DnTC to a SELOGIC conditional statement that will disable Element n
when false.
81DnP (Level n Pickup)

Set the value at which you want the frequency element for each of six levels to
assert. For a value of 81DnP less than the nominal system frequency NFREQ
(50 or 60 Hz), the element operates as an underfrequency element. For a value
greater than NFREQ, the element operates as an overfrequency element. Note
that n can be one of six levels, 1–6.
81DnD (Level n Time Delay)

Select a time in seconds that you want frequency elements to wait before asserting.

In steam and combustion turbine applications, system operation at other than the
design speed can excite mechanical vibrations in the turbine. This vibration can
cause cumulative metal fatigue in turbine blades that can lead to premature and
catastrophic turbine failure. To detect and protect against such an occurrence, the
SEL-400G relay records the total time of operation of the generator at off-nomi-
nal frequencies in as many as eight frequency bands. This function satisfies the
requirements of IEEE C37.106-2003, Guide for Abnormal Frequency Protection
for Power Generating Plants.
If the frequency is within a time accumulator band, the relay asserts an alarm bit
and starts the 81AD timer. If the frequency remains within the band for greater
than 81AD seconds, the relay begins to accumulate time for that band (81ABnS,
n = 1–8). If the total time of operation within a band exceeds the limit setting for
that particular band (81AnD), the relay asserts a Relay Word bit (81ABnT),
which you can use for alarm and/or trip as necessary.
The SEL-400G gives the user an option to set the band pickup limits individually,
or as a conventional continuous set of bands (i.e., lower setting of one band
becomes the upper setting of the next band). This selection is made using the
E81ABD setting.
Each band can be used in either of two ways depending on the 81AnD setting:
81AnD = OFF: The band does not assert an output but the accumulator is
active and can be monitored. It can accumulate to a maximum of 10000 days
(8.64 • 108 seconds), at which point it is clamped until reset.
81AnD NOT = OFF: The band asserts an output when the accumulator
reaches the delay setting. The element can be set in the range of 0.5–6000
seconds.
Figure 5.191 shows the logic for eight levels of 81A accumulated frequency
bands. The accumulator values are nonvolatile and are retained through relay
power-off cycles. You can use the relay serial port 81A command to view, reset or
preload the accumulator values.

All frequency accumulated band elements are disabled if any one of the follow-
ing conditions are true:
➤ No accumulated frequency element is selected (E81A = N)
➤ The frequency is out of permissible limits (5–120 Hz)
➤ Rate-of-change of frequency more than 30 Hz/s
E81A n
81AUnP 81ABn
81AD 81AnD
FREQPG 81ABnT
0
81ALnP
Clear/Preload Accumulator 81ABnS
81ATC (Command)
FREQOKG
81AB1 81AB1T
81AB2 81AB2T
81AC 81AT
81ABN 81ABNT
Figure 5.191 Accumulated Frequency Element Logic
Setting Guidelines
Table 5.66 Accumulated Frequency Element Settings
E81A Enable Accumulated Freq Elements N, 1 to 8 N Group

E81ABD 81A Enable Conventional Frequency Band Y, N N Group
81AD 81AC Element PU Time delay 0.000–400 0.2 Group
81ATC 81AC Element Torque Control SELOGIC control equation 1 Group
a
81AUnP 81AC Ele. Band n Upper Limit PU 5.01–119.99b 59.5 Group
81ALnPa 81AC Ele. Band n Lower Limit PU 5.01–119.99c 58.8 Group
a
81AnD 81AC Ele. Band n Time Limit PU OFF, 0.5–6000d 3000 Group
a
n = 1–8.
b Default value is for Band 1; 58.8, 58.0, 57.5, 57, 56.5, 56, 55 are the default values for Bands 2–8 when enabled.
c
Default value is for Band 1; 58.0, 57.5, 57, 56.5, 56, 55, 40 are the default values for Bands 2–8 when enabled.
d Default value is for Band 1; 540.0, 100.0, 14.0, 2.5, 1.0, 0.5, 0.5 are the default values for Bands 2–8 when enabled.
E81A (Enable 81A Elements)

Set E81A to enable as many as eight accumulated frequency band elements.
When E81A = N, the relay disables the accumulated frequency elements and
hides corresponding settings; you do not need to enter these hidden settings.

E81ABD (Enable Conventional Frequency Band)

Set E81ABD to set the enabled bands in a seamless manner. When E81ABD = N,
the relay enables the user to set the upper limit and lower limit for all the accumu-
lated frequency band. When E81ABD = Y, the lower limit of Band 1 becomes the
upper limit of Band 2 and so on until the last enabled band; the upper limit set-
tings are hidden for all bands except for the first band.
81AD (Pickup Time Delay)

Set a time (in seconds) that you want the accumulated frequency elements to wait
for starting the accumulation. This setting is common for all enabled bands.
81ATC (Accumulated Frequency Torque Control)

Use the torque-control setting to specify conditions under which the accumulated
frequency elements must be active. There is only one setting for all the enabled
accumulated frequency bands. With the default setting 1, all bands are active
unless changed.
81AUnP (Accumulated Frequency Band n Upper Limit)

Select the value (in Hz) that you want to be the upper limit of pickup for the accu-
mulated frequency Band n for each of the enabled bands as high as 8 bands.
These values are hidden and forced to 81AL(n – 1)P except for first band when
E81ABD = Y.
81AUnP (Accumulated Frequency Band n Lower Limit)

Select the value (in Hz) that you want to be the lower limit of pickup for the accu-
mulated frequency Band n for each of the enabled bands as high as 8 bands.
81AnD (Accumulated Frequency Band n Time Delay)

When the frequency is within the upper limit and lower limit for an accumulated
frequency element Band n, the accumulator starts accumulating time. Set the
delay (in seconds) for which the timer must run before the 81AnD setting asserts
the output.
Accumulated Frequency Elements Settings Calculation

Consult the turbine manufacturer abnormal operation frequency protection infor-
mation before calculating the setting. Turbine manufacturers can provide docu-
mentation showing the turbine operating time limitations during abnormal
frequency. This documentation should show continuous operation at nominal fre-
quency, an area of restricted operation, and an area of prohibited operation.
Define the accumulator frequency bands and assign times to those bands that pre-
vent the generator from operating in the restricted area. Figure 5.192 shows an
example with settings shown. You can also monitor how much time the turbine
operated in the continuous operating range by setting 81AnD to OFF (Band 1 in
Figure 5.192).

Over- and Under-Rate-of-Change-of-Frequency Element
60.5 Hz
Continuous Operation Band 1
81A1D = OFF
59.5 Hz
Band 2
57.5 Hz
Restricted Operation Band 3
56 Hz
Band 4
55.5 Hz
Band 5
54 Hz
Band 6
53 Hz
Band 7
52 Hz
Prohibited Operation
Band 8
45 Hz
0 200 250 350 400 475 500
81A8D = 81A7D = 81A6D = 84A5D = 81A4D = 81A3D = 81A2D =
0.5 200 250 350 400 475 500
(Seconds)
Figure 5.192 Example Turbine Operating Limitations During Abnormal

Frequency With 81A Settings
81A Command
Use the 81A command to display the accumulated frequency element reports of
the equipment monitored by the relay. When used with the P parameter, 81A
enables you to preload the values for accumulated bands. The format a particular
band input should be dddd:hh:mm:ss.s with a resolution of 0.5 seconds. The
maximum input that you can give is 0000:01:39:59.5 when 81AnD != OFF (n =
1–8), 9999:23:59:59.5 otherwise. 81A R or C can be used to clear the accumu-
lated time data for all accumulated frequency bands, and when used with param-
eter n (81A n R or C) clears the accumulated data for that particular Band n.
Figure 5.193 shows the 81A command report with all eight bands enabled.
=>>81A <Enter>
Relay 1 Date: 02/28/2020 Time: 12:45:35.986

Frequency Band Accumulated Time Data

# Acc. Time Percentage
(dddd:hh:mm:ss.s) (%)
Frequency Band 1 from 60.50 to 59.50 0014:16:12:18.5 81A1D = OFF
Frequency Band 2 from 59.50 to 57.50 0000:00:00:13.5 2.70 of 500.0
Figure 5.193 81A Command Report

Use the relay rate-of-change-of-frequency (ROCOF) elements to speed up con-
trol actions such as load shedding, islanding, and other cases that cause abnormal
frequency conditions.
Figure 5.194 shows the logic for the ROCOF elements.

abs(81RnP) 81RFL
FREQOKa
Moving
Average FREQFZa
27B81Ra
Filter 0
Analog quantity based 81RnTC
on the 81ROn setting
1 81RnOVR
Timer n
81ROn
(setting) 81RnPU
81RnP 0.1 81RnT
81RnP
–0.1 81RnDO
81RnUDR 81Rn
81RnP
(setting)
Figure 5.194 ROCOF Element Logic
The relay supports six elements, each of which can be used independently. The
operating quantity for each of these elements is selectable using the operating
quantity setting (81ROn, n = 1–6). This can be set to either generator or system
by choosing DFREQPG or DFREQPS.
Each frequency element can operate as an over-ROCOF or as an under-ROCOF
element, depending on its pickup setting. If the element pickup setting (81RnP,
n = 1–6) is less than –0.1 Hz/s, the element operates as an under-ROCOF ele-
ment, picking up if measured rate-of-change of frequency is less than the set
point. If the pickup setting is greater than 0.1 Hz/s, the element operates as an
over-ROCOF element, picking up if measured rate-of-change of frequency is
greater than the set point.
The selected operating quantity, given by the 81ROn setting, will be used as the
input to Element n if the pickup setting (81RnP) is greater than the 81RFL setting
value, which is 0.5 Hz/s by default. If Element n pickup setting is lower than the
81RFL setting, the rate-of-change-of-frequency quantity will be passed through a
four-point moving average filter, and the output is used as the operating quantity.
This filter is used to remove noise at low values of the operating quantity. 81RFL
is a Calibration Level setting.
Each element can be individually controlled using the associated torque-control
setting (81RnTC), which can be set to a SELOGIC conditional statement.
Element n is disabled if the 81RnTC setting is evaluated to be false.
The quantity 27B81Ra controls all frequency elements associated with the same
frequency tracking source, i.e., 27B81RG controls the frequency elements that
are associated with DFREQPG and 27B81RS controls the frequency elements
that are associated with DFREQPS.
Each element has an associated output timer whose pickup time and dropout time
can be selected using the settings 81RnPU and 81RnDO, respectively.
Over- and Under-ROCOF Element Settings

E81R (Enable 81R Elements)
Set E81R to enable as many as six over- and under-ROCOF elements. When
E81R = N, the relay disables the ROCOF elements and hides corresponding set-
tings; you do not need to enter these hidden settings.

Injection-Based Stator Ground Protection
81RUVSP (81R Element Undervoltage Supervision)

This setting applies to all six ROCOF elements. If the instantaneous value of the
tracking voltage quantity falls lower than the 81UVSP setting, all ROCOF ele-
ments associated with the tracking source are disabled.
81ROn (Level n Operating Quantity)

Select the ROCOF source that is used as the operating quantity for Element n.
This can be set to DFREQPG (for generator) or DFREQPS (for system).
81RnTC (Level n Torque Control)

Set 81RnTC to a SELOGIC conditional statement that will disable Element n
when false.
81RnP (Level n Pickup)

Set the value at which you want the ROCOF element for each of six levels to
assert. For a value of 81RnP less than –0.1 Hz/s, the element operates as an
under-ROCOF element. For a value greater than 0.1 Hz/s, the element operates as
an over-ROCOF element. Note that n can be one of six levels, 1–6.
81RnPU (Level n Pickup Time Delay)

Select a time in seconds that you want ROCOF elements to wait before asserting.
81RnDO (Level n Dropout Time Delay)

Select a time in seconds that you want ROCOF elements to wait before deassert-
ing.

The SEL-400G can receive a stator winding insulation resistance measurement
from an SEL-2664S Stator Ground Protection Relay using the IEC 61850 proto-
col. See SEL-2664 and SEL-2664S Application on page 2.18 for details on con-
necting and configuring remote devices. See the SEL-2664S Stator Ground
Protection Relay Instruction Manual for application details related to the relay.
The SEL-2664S uses an injection-based principle to monitor the stator winding
for ground faults, while the generator is both online and offline. During online
operation, the 64S elements must be combined with the 64G1 element to provide
100 percent coverage of the stator winding. The 64S element provides complete
stator coverage when the unit is offline.
Injecting a subharmonic signal onto the stator requires the SEL-2664S to be con-
nected to the stator winding either through the neutral grounding transformer
(NGT) when the neutral grounding resistor (NGR) is located on the NGT second-
ary (Figure 5.195) or through a voltage transformer of sufficient thermal rating if
the NGR is connected between ground and the generator neutral point
(Figure 5.196). For complete guidance on SEL-2664S application design and set-
tings considerations, see the SEL-2664S Stator Ground Protection Relay Instruc-
tion Manual.

NGT
SEL-2664S
I_SRC
D02/VN
NGR
D01/NN
CTN
X1 X2 2-C Twisted Pair.

Do not ground the
CTN leads.
C02
IN
C01
Figure 5.195 AC Connections With NGR on the Secondary Side of the Neutral
Grounding Transformer
Neutral Voltage
Transformer
SEL-2664S
I_SRC
D02/VN
NGR
D01/NN
X2
C02
CTN IN
X1
C01
2-C Twisted Pair. Do not
ground the CTN leads.
Figure 5.196 AC Connections With NGR Between the Generator Neutral Point
and Ground
A multisine signal, consisting of two or four subharmonic frequencies, generated

by the SEL-2664S processor is injected onto the stator winding. The relay per-
forms a Discrete Fourier Transform (DFT) to extract the injected frequencies
from measured current and voltage signals. Combining the results of these mea-
surements with circuit parameters learned during relay calibration, the relay pro-
vides continuous measurement of NGR resistance, stator insulation resistance,
and stator insulation capacitance. An NGR monitor is also provided. As men-
tioned previously, the SEL-2664S can share these analog quantities with the
SEL-400G by using the IEC 61850 protocol.
The Stator Ground Scheme logic is shown in Figure 5.197. Two levels are pro-
vided.
The resistance measurement appears in the SEL-400G as a remote analog, which
is then assigned to 64SIR using the 64SIRM setting. Likewise, the associated
communications quality bit is assigned to the 64SIQ setting. The capacitance
measurement can also be mapped to 64SIC by using the 64SICM setting. This
value is not used in the scheme logic but may be assigned to the analog profiling
function.

Relay
Word
SELOGIC Bits
64SIQ 64Sn
Setting
64SnP 64SnD
64SnT
64SIR 0
SELOGIC
64SnTC
Figure 5.197 Stator Ground Scheme Logic, Level n
Setting Guidelines
Table 5.67 Injection-Based Stator Ground Protection Settings
64SIRM 64S Stator Insu Resi Mapping RA001–RA256 RA002 Group

64SICM 64S Stator Insu Capa Mapping RA001–RA256 RA003 Group
64SIQ 64S Stator Insu Quality (SELOGIC Eqn) SV NA Group
a
64SnP 64S Level n Pickup (kOhms) OFF, 0.1–10 OFF Group
a
64SnD 64S Level n Delay (0.000–400 s) 0.000–400 60 Group
a
64SnTC 64S Level n Torque Cont (SELOGIC Eqn) SV 1 Group
a n = 1, 2.
64S Stator Insulation Resistance Mapping (64SIRM)

Enter the remote analog address, which is configured as the insulation resistance
measurement.
64S Stator Insulation Capacitance Mapping (64SICM)

Enter the remote analog address, which is configured as the insulation capaci-
tance measurement.
64S Stator Insulation Quality (SELOGIC Control Equation) (64SIQ)

Enter the quality bit for the remote analog that is mapped as the insulation resis-
tance measurement. The element is blocked if the quality bit is not asserted.
64S Level n Pickup (OFF, 0.5–10 kilohms) (64SnP)

Enter the desired pickup of the element in kilohms. You can use the analog signal
profiling function to track the variation of the insulation resistance over time to
determine an optimal setting.
64S Level n Delay (0.000–400 s) (64SnD)

Enter the desired delay in seconds. See the SEL-2664S Stator Ground Relay
Instruction Manual for more details.
64S Level n Torque Control (SELOGIC Control Equation) (64SnTC)

This setting has a default value of 1.

Over- and Undervoltage Elements

The SEL-400G offers as many as six undervoltage and six overvoltage elements.
Each of these 12 elements has two levels, for a total of 24 under- and overvoltage
elements. Each level can be configured either with a definite-time or an inverse-
time characteristic.
Table 5.68 Operating Quantities
Parameter Quantities
Phase, Phase-to-Phase, and VpkFMa, b, VppkFMb, c, VNMINkFb, d, VNMAXkFb, e,

Single-Phase VPMINkFb, d, VPMAXkFb, e, VVaFMf, VZ2FM
Sequence V1kMb, 3V2kMb, e, 3V0kMb, d
a
p = A, B, C.
b k = V, Z.
c
pp = AB, BC, CA.
d Not available for overvoltage elements.
e
Not available for undervoltage elements.
f a = 1, 2, 3.
Inverse-Time Characteristics
The over- and undervoltage inverse-time characteristic equations are:
59PnDx
t pkp = -----------------------------
59nOP
-------------------- – 1
59PnPx
Overvoltage Equation 5.76
27PnDx
t pkp = ----------------------------
27nOP
1 – --------------------
27PnPx
Undervoltage Equation 5.77
103
27PnDx Setting 59PnDx Setting

(seconds) (seconds)
102
10 10
Time (seconds)
5 5
101
1 1
100
Undervoltage Overvoltage
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

Multiples of Pickup
Figure 5.198 Over-/Undervoltage Inverse-Time Characteristic
The dropout is instantaneous.

Figure 5.199–Figure 5.202 show the logic diagrams for the over- and undervolt-
age elements.

59nPx
59PnDx
(setting)
59PnPx
(setting) 1 59nPxT
0 0
0
Analog Quantity 59nOP
according to the 59TCn
59On setting (SELOGIC) x = 1, 2
59On
(setting)
Figure 5.199 Element n, Level x, Definite-Time Overvoltage (59PnCx = D)
59PnPx
1 59nPx
(setting) S EN
0 59nOP
0 Overvoltage 59nPxT
Analog Quantity
according to the Inverse-Time Curve
59On setting 59nOP 59TCn Settings
(SELOGIC) R 59PnPx
x 0.98 59PnDx
59On Reset dominant
(setting) x = 1, 2
Figure 5.200 Element n, Level x, Inverse-Time Overvoltage (59PnCx = I)
27nPx
27PnDx
(setting)
27PnPx
(setting) 1 27nPxT
0 0

Analog Quantity 27nOP
according to the 27TCn
27On setting (SELOGIC) x = 1, 2
27On
(setting)
Figure 5.201 Element n, Level x, Definite-Time Undervoltage (27PnCx = D)
27PnPx
1 27nPx
(setting) S EN
0 27nOP
Undervoltage 27nPxT
Analog Quantity
according to the Inverse-Time Curve
27On setting 27nOP 27TCn Settings
(SELOGIC) R 27PnPx
x 1.02 27PnDx
27On Reset dominant
(setting) x = 1, 2
Figure 5.202 Element n, Level x, Inverse-Time Undervoltage (27PnCx = I)
Setting Guidelines
Table 5.69 Over- and Undervoltage Settings (Sheet 1 of 2)

a
59On O/V Element n Operating Quantity VpkFMb, c, VNMAXkFc, VppkFMc, d, VPMAXZF Group
VVaFMe, VZ2FM, VPMAXkFc, V1kMc,
3V2kMc, 3V0kMc
59PnPxa, f O/V Element n Level x PU (V, sec) OFF, 2.00–300g 112.2 Group

Table 5.69 Over- and Undervoltage Settings (Sheet 2 of 2)

a, f
59PnCx O/V Element n Level x Curve D, I D Group
a, f
59PnDx O/V Element n Level x Delay (s) 0.000–400 200
a
59TCn O/V Element n Torque Control SV 1
27Ona U/V Element n Operating Quantity VpkFMb, c, VNMINkFc, VppkFMc, d, VNMINZF Group
c c e
VPMINkF , V1kM , VVaFM , VZ2FM
27PnPxa, f U/V Element n Level x PU (V,sec) OFF, 2.00–300g OFF Group
27PnCxa, f U/V Element n Level x Curve D, I D Group
a, f
27PnDx U/V Element n Level x Delay (s) 0.000–400 10
a
27TCn U/V Element n Torque Control SV (SELOGIC variables) 1
a n = 1–6.
b
p = A, B, C.
c k = V, Z.
d
pp = AB, BC, CA.
e a = 1, 2, 3.
f
x = 1, 2.
g The range for VppkFM, VPMAXkF is 4.00–520.
59On (Overvoltage Element Operating Quantity)

Select the operating quantity you want from Table 5.68. Both levels use the same
operating quantity.
59PnP1 (Overvoltage Level 1 Pickup)

Set pickup values for the voltage values above which you want the Level 1 over-
voltage elements to assert.
59PnD1 (Overvoltage Level 1 Time Delay)

When the system voltage rises above the overvoltage setting value, the overvolt-
age timer starts timing. Set the delay (in seconds) that the timer must run before
the 59PnD1 setting asserts the output.
59PnP2 (Overvoltage Level 2 Pickup)

Set pickup values for the voltage values above which you want the Level 2 over-
59PnD1 (Overvoltage Level 2 Time Delay)

When the system voltage rises above the overrvoltage setting value, the overvolt-
age timer starts timing. Set the delay (in seconds) that the timer must run before
the 59PnD2 setting asserts the output.
59TCn (Overvoltage Torque Control)

Use the torque-control setting to specify conditions under which the overvoltage
elements must be active. There is only one setting for both Level 1 and Level 2
elements. With the default setting equal to 1, both levels are active permanently.

27On (Undervoltage Element Operating Quantity)

Select the operating quantity you want for the element from Table 5.68. Both lev-
els use the same quantity.
27PnP1 (Undervoltage Level 1 Pickup)

Set pickup values for the voltage values below which you want the Level 1 under-
27PnD1 (Undervoltage Level 1 Time Delay)

When the system voltage falls below the undervoltage setting value, the under-
voltage timer starts timing. Set the delay (in seconds) that the timer must run
before the 27PnD1 setting asserts the output.


27TCn (Undervoltage Torque Control)

Use the torque-control setting to specify conditions under which the undervoltage
27On (Undervoltage Element Operating Quantity)

Select the operating quantity you want for each voltage terminal from Table 5.68.




Overcurrent Elements

27TCn (Undervoltage Torque Control)

Use the torque-control setting to specify conditions under which the undervoltage
The SEL-400G provides three levels of instantaneous overcurrent elements (50)
for phase, negative-sequence, and zero-sequence currents for each of the four ter-
minals (S, T, U, Y) and 10 configurable time-overcurrent (51) elements. These
overcurrent elements are nondirectional, but you can make any of the 50 or 51
elements directional with a choice of phase and sequence directional elements
(see Directional Elements on page 5.214).
Phase Instantaneous Overcurrent Elements

Figure 5.203 shows the logic for the phase instantaneous overcurrent element. At
the top of the logic are four settings that enable the overcurrent element. All four
settings must evaluate to a logical 1 to enable the overcurrent element. To enable
the Level 1 instantaneous overcurrent element for Terminal S, apply the follow-
ing settings: ESYSCT = S, … , E50 = S, … , E50S = P, and 50SP1P = 4 (any set-
ting within the range other than OFF).
ESYSCT includes the terminal

(Setting)
E50 includes the terminal

(Setting)
E50m includes "P"
(Setting)
50mPaP = OFF
(Setting)
50mPa
IAmFM
67mPa
IBmFM Phase 50 Timer

67mPaD
67mPaT
ICmFM 0
Where:
50mPaP m = S, T, U, Y*
(Setting) a = 1–3
67mPaTC * available when CTCONY = Y
(Setting)
Figure 5.203 Phase Instantaneous Overcurrent Element

Setting 50SP1P also provides the reference value against which three compara-
tors test the three phase currents (IAmFM, IBmFM, ICmFM). If the element is
enabled, and any phase current exceeds the 50SP1P setting value, then Relay
Word bit 50SP1 asserts.
Use the torque-control setting 67mPaTC to combine the 50 element with other
functions such as the directional element, or to add a time delay. For a time delay
(Terminal S, Level 1), set 67SP1TC = 1 (or any other appropriate condition such
as the directional element or a breaker auxiliary contact status) and set 67SP1D to
the desired time delay. If the element is enabled and any phase current exceeds
the 50SP1P setting value, then Relay Word bits 50SP1 and 67SP1 assert instanta-
neously and Relay Word bit 67SP1T asserts when the Phase 50 timer times out.
Negative-Sequence Instantaneous Overcurrent Elements

Figure 5.204 shows the logic for the negative-sequence instantaneous overcurrent
element. This element operates similarly to the phase instantaneous overcurrent
element, except that the element uses negative-sequence values instead of phase
values.

(Setting)

(Setting)
E50m includes "Q"
(Setting) 50mQa
50mQaP = OFF
(Setting) 67mQa
312mFM Negative-Sequence
50mQaP 50 Timer
(Setting) 67mQaD
67mQaT
67mQaTC 0
(Setting)
Where: m = S, T, U, Y*
a = 1–3
*available when CTCONY = Y
Figure 5.204 Negative-Sequence Instantaneous Overcurrent Element
Zero-Sequence Instantaneous Overcurrent Elements

Figure 5.205 shows the logic for the zero-sequence instantaneous overcurrent
element. This element operates similarly to the phase instantaneous overcurrent
element, except that the element uses zero-sequence values instead of phase val-
ues.


(Setting)

(Setting)
E50m includes "G"
(Setting) 50mGa
50mGaP = OFF
(Setting) 67mGa
310mFM Zero-Sequence
50mGaP 50 Timer
(Setting) 67mGaD
67mGaT
67mGaTC 0
(Setting)
Where: m = S, T, U, Y*
a = 1–3
*available when CTCONY = Y
Figure 5.205 Zero-Sequence Instantaneous Overcurrent Element
Setting Descriptions
E50 (Definite-Time Overcurrent and Directional Element Enable)
Setting E50 is a composite setting that identifies the following three protection
options for each terminal:
➤ Terminals that require only definite-time overcurrent elements
➤ Terminals that require only directional elements
➤ Terminals that require both definite-time overcurrent elements and
directional elements
For example, at a particular substation you want the following protection:
➤ Terminal S: negative-sequence definite-time overcurrent only
➤ Terminal T: only directional control (directional elements for time-
overcurrent [51] protection)
➤ Terminal U: both definite-time overcurrent protection (Level 1) and
directional control
➤ Terminal Y: not used
Figure 5.206 shows the flow diagram for setting the three protection options
(gray blocks are not used).

(a) (b) (c)
Definite-Time O/C
Definite-Time Directional AND Directional
O/C Elements Elements Elements
E50 = S, T, U, Y E50 = S, T, U, Y E50 = S, T, U, Y
E50m = P, Q, G E50m = P, Q, G E50m = P, Q, G
N Directional N Directional N Directional

Elements? Elements? Elements?
Y Y Y
E67m = N E67m = N E67m = Y
50mPaP = <Value> 50mPaP = <Value> 50mPaP = <Value>
Figure 5.206 Three Settings Possibilities
In general, regardless of the function you want (overcurrent or directional),

always enter the E50 and E50m settings. In this example, include Terminals S, T,
and U in the Group setting ESYSCY to enable these terminals for processing, as
shown in Figure 5.207. Directional elements are polarized using the same voltage
used for frequency tracking. By default, this will be the Z voltage terminal. See
Directional Elements on page 5.214 for more details.

Figure 5.207 ESYSCT Setting, Overcurrent, and Directional Enables
After enabling the CTs for processing, enter Terminals S, T, and U in the Group
setting E50 (see Figure 5.207). Figure 5.207 also shows the selection of the 51
element that must have directional control. The 51 elements are not terminal spe-
cific, so setting the terminal CT/51 elements correlation occurs later.
In this example, Terminal S and Terminal T will be frequency-tracked using the
generator frequency and Terminal U will be frequency-tracked using the system
frequency. Because Terminal T and Terminal U have directional control enabled,
the T directional elements are polarized using the Z voltage and the U directional
elements are polarized using the V voltage.
Figure 5.208 Frequency Tracking Configuration
Use the E50m setting to specify the type of overcurrent elements you want to use,
both for overcurrent elements and for directional elements. Because Terminal S
requires negative-sequence definite-time overcurrent only, set E50S = Q.

Figure 5.209 Overcurrent Settings
Figure 5.209 shows the negative-sequence definite-time overcurrent settings. The

setting 50SQ1P is the Level 1 negative-sequence overcurrent element pickup
value (arbitrarily set at 12). The setting 67SQ1TC is the torque-control setting for
the negative-sequence overcurrent element (refer to Figure 5.204 for the logic
diagram). In this example, set 67SQ1TC = 1 (permanently enabled) to assert the
bottom input of the timer AND gate in Figure 5.204. The last setting is 67SQ1D,
the negative-sequence overcurrent element time delay, set in Figure 5.209 to an
arbitrary value of 15 cycles or 0.25 seconds.
This concludes the negative-sequence definite-time overcurrent settings for Ter-
minal S.
Terminal T protection calls for a directional element 51.
Figure 5.210 Overcurrent Configuration for Terminal T
Figure 5.211 Disable Definite-Time Overcurrent Elements
Figure 5.207 shows the directional elements enabled by setting E67 = T, U. This
makes the CTPT, Z1ANGT, Z0ANGT (E50T includes both P and G) and EAD-
VST settings available. With 50TP1P = OFF and 50TG1P = OFF, the phase and
ground overcurrent elements are disabled so that only the directional elements
are active for Terminal T.
Figure 5.211 shows the settings for the Terminal T directional 51 element. For
this example, do not use adaptive settings for the pickup and time-dial settings.
Set the operating quantity (51O01 = IMAXTF), the pickup setting (51P01),
Curve type (51C01), time dial (51TD01), and the type of reset (51RS01).
Use setting 51TC01 to add directional control to the 51 element. Setting
51TC01 = TF32G (negative- and zero-sequence direction) OR TF32P (phase
direction) causes the 51 element to be active only for forward faults.

Figure 5.212 Terminal T Directional 51 Element Settings
This concludes the directional 51 settings for Terminal T.

Terminal U protection calls for one level of directional definite-time overcurrent
protection. In this example, this element is frequency-tracked using the system
frequency and polarized using the V voltage, as indicated in Figure 5.208.
Figure 5.207 shows the setting to enable the directional element (E67 = T, U).
With the directional elements enabled, set the 50 elements settings, as shown in
Figure 5.213. To make the 50 elements directional, enter the forward directional
Relay Word bits (UF32P and UF32G) in the 67UP1TC torque equation.
Figure 5.213 Overcurrent Configuration for Terminal U
Only one level of overcurrent protection is necessary, so leave 50UP2P = OFF.

This concludes the directional 50 settings for Terminal U.
E50m (50 Function Enable)

After identifying the terminal(s) that requires definite-time overcurrent/direc-
tional protection with the E50 setting, select the specific instantaneous overcur-
rent element(s)/directional type for each terminal(s). Choose from among phase
(P), negative-sequence (Q), zero-sequence (G), or any combination of P, Q, and
G.
50mPaP (Phase Element Pickup)

Setting 50mPaP is the current pickup setting in secondary amperes for the phase
instantaneous overcurrent element. For a 5 A relay, the range is 0.25–100.00 A, sec.
The range for a 1 A relay is 0.05–20.00 A, sec.

67mPaTC (Phase Element Torque Control)

Use the torque-control setting to specify conditions under which the element
NOTE: This setting does not affect
the 50mPa outputs (see must be active. The default setting is mF32P, so that the 67mPa and 67mPaT
functions can only assert if the phase directional element declares a fault in the
forward direction. With the torque equation set to 1 (67SP1TC = 1, Terminal S,
Level 1), the overcurrent element is nondirectional and active constantly.
67mPaD (Phase Element Time Delay)

Set the duration of the phase element time delay with this setting.
NOTE: This setting is active only if
67mPaTC asserts.
50mQaP (Negative-Sequence Element Pickup)

Setting 50mQaP is the current pickup setting in secondary amperes for the nega-
tive-sequence instantaneous overcurrent element. For a 5 A relay, the range is
0.25–100.00 A, sec. The range for a 1 A relay is 0.05–20.00 A, sec.
67mQaTC (Negative-Sequence Element Torque Control)

the 50mQa outputs (see must be active. The default setting is mF32Q, so that the 67mPa and 67mPaT
functions can only assert if the negative-sequence directional element declares a
fault in the forward direction. With the torque equation set to 1 (67SQ1TC = 1,
Terminal S, Level 1), the overcurrent element is nondirectional and active con-
stantly.
67mQaD (Negative-Sequence Element Time Delay)

Set the duration of the negative-sequence element time delay with this setting.
67mQaTC asserts.
50mGaP (Zero-Sequence Element Pickup)

50mGaP is the current pickup setting in secondary amperes for the zero-sequence
instantaneous overcurrent element (shown is the range for a 5 A relay; the range
is 0.05 to 20 for a 1 A relay).
67mGaTC (Zero-Sequence Element Torque Control)

the 50mGa outputs (see must be active. The default setting is mF32G, so that the 67mPa and 67mPaT
functions can only assert if the zero-sequence directional element declares a fault
in the forward direction. With the torque equation set to 1 (67SG1TC = 1, Termi-
nal S, Level 1), the overcurrent element is nondirectional and active constantly.
67mGaD (Zero-Sequence Element Time Delay)

Set the duration of the zero-sequence element time delay with this setting.
67mGaTC asserts.

Selectable Time-Overcurrent Element

Instead of having dedicated inverse time-overcurrent elements (also known as
inverse definite minimum time or IDMT) for each winding, the SEL-400G offers
the flexibility of 10 unassigned time-overcurrent elements, each with the choice
of five U.S. and five IEC operating curves. Unassigned means that the 51 ele-
ments are not assigned to a specific current terminal, but they are available for
assignment, as the application requires (see Table 5.72).
Be sure to include the terminals selected as 51 element input quantities in the
ESYSCT setting. For example, if IMAXSF (see Table 5.72) is the input for ele-
ment 51O01 and if IMAXTF is the input for element 51O02, then set
ESYSCT = S, T.
Inverse time-overcurrent elements are not enabled in the default settings. Enable
the inverse time-overcurrent elements by setting E51 = xx (xx = 01–10). After
you enable these elements, the inverse time-overcurrent elements up to and
including the number xx you entered at the E51 = prompt are active. For example,
if you want to use six inverse time-overcurrent elements for your application, set
E51 = 6. Inverse time-overcurrent elements 1–6 become active.
Table 5.70 shows the five U.S. characteristics, and Table 5.71 shows the five IEC
characteristics. Each table shows the five operating time equations, together with
the five electromechanical reset characteristic equations.
Table 5.70 U.S. Operate and Reset Curve Equations
Curve Type Operating Time Reset Time
U1 (Moderately Inverse) 0.0104  1.08

T P = TD •  0.0226 + ---------------------
- T R = TD •  ----------------2
0.02  
M –1 1–M
U2 (Inverse) 5.95  5.95

T P = TD •  0.180 + ---------------- T R = TD •  ----------------2
 2   
M –1 1–M
U3 (Very Inverse) 3.88  3.88

T P = TD •  0.0963 + ---------------- T R = TD •  ----------------2
 2   
M –1 1–M
U4 (Extremely Inverse) 5.64  5.64

T P = TD •  0.02434 + ----------------  T R = TD •  ----------------2
2  
M –1 1–M
U5 (Short-Time Inverse) 0.00342  0.323

T P = TD •  0.00262 + ---------------------
- T R = TD •  ----------------2
 0.02   
M –1 1–M
Table 5.71 IEC Operate and Reset Curve Equations (Sheet 1 of 2)
C1 (Standard Inverse) 0.14  13.5

T P = TD •  ---------------------
- T R = TD •  ----------------2
 0.02   
M –1 1–M
C2 (Very Inverse) 47.3

13.5
T P = TD •  -------------- T R = TD •  ----------------2
 M – 1  
1–M
C3 (Extremely Inverse) 80  80
T P = TD •  ---------------- T R = TD •  ----------------2
 2   
M –1 1–M

Table 5.71 IEC Operate and Reset Curve Equations (Sheet 2 of 2)
C4 (Long-Time Inverse)
120 120
T P = TD •  -------------- T R = TD •  --------------
 M – 1  1 – M
C5 (Short-Time Inverse) 0.05  4.85

T P = TD •  ---------------------
- T R = TD •  ----------------2
 0.04   
M –1 1–M
where:
TP = Operate time
TR = Reset time
TD = Time dial (multiplier)
M= Multiple of pickup current (Imeasured/Ipickup)
Figure 5.214–Figure 5.216 show the five U.S. curves and the five IEC curves.

U.S. Moderately Inverse Curve: U1 U.S. Inverse Curve: U2

100 6000 (5000) 100 6000 (5000)
90 90
80 80
70 70
60 60
50 3000 (2500) 50 3000 (2500)
40 40
30 30
1500 (1250) 1500 (1250)
20 20
10 600 (500) 10 600 (500)

9 9
8 8
7 7
6 6
5 300 (250) 5 300 (250)
4 4
3 3
15.00
15.00 150 (125) 150 (125)
12.00
12.00
Time in Cycles 60 Hz (50 Hz)

2

2 10.00
10.00
Time in Seconds
Time in Seconds
8.00
8.00
6.00
1 6.00 60 (50) 1
5.00 60 (50)
.9 .9
5.00 .8
.8
.7 4.00
.7 4.00
.6
.6 3.00
.5 3.00 30 (25) .5 30 (25)
.4
.4 2.00
2.00 .3
.3
15 (12.5) 15 (12.5)
.2
.2 1.00
1.00
.1 6 (5) .1
0.50 6 (5)
.09 .09
.08
0.50 .08
.07 .07
.06 .06
.05 3 (2.5) .05 3 (2.5)
.04
.04
.03
.03
.02
.02
.01
.01
80
40
60
90
50
30
20
70
.5 .6 .7 .8 .9 1
10
2 3 4 5 6 7 8 9
100
20
30
40
50
60
70
80
90
100
10
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
Multiples of Pickup Multiples of Pickup
U.S. Very Inverse Curve: U3 U.S. Extremely Inverse Curve: U4

100 6000 (5000) 100 6000 (5000)
90 90
80 80
70 70
60 60
50 3000 (2500) 50 3000 (2500)
40 40
30 30
1500 (1250) 1500 (1250)
20 20
10 600 (500) 10 600 (500)

9 9
8 8
7 7
6 6
5 300 (250) 5 300 (250)
4 4
3 3
150 (125) 150 (125)
2 2

Time in Seconds
15.00
Time in Seconds
12.00
1 10.00 60 (50) 1 60 (50)
.9
.8 8.00 .9
.8
.7
.7
.6 6.00 .6 15.00
.5 5.00 30 (25) 12.00 30 (25)
.5
.4 4.00 10.00
.4
.3 3.00 8.00
.3
15 (12.5) 6.00 15 (12.5)
.2 2.00 5.00
.2
4.00
3.00
.1 1.00 6 (5)
.09 .1 6 (5)
.08 .09
.07 .08 2.00
.06 .07
.06
.05 0.50 3 (2.5)
.05 3 (2.5)
.04 1.00
.04
.03
.03
.02
.02 0.50
.01
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
10
20
30
40
50
60
70
80
90
100
.01
100
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
10
20
30
40
50
60
70
80
90
Multiples of Pickup
Multiples of Pickup
Figure 5.214 U.S. Curves: U1, U2, U3, and U4

U.S. Short-Time Inverse Curve: U5 IEC Class A Curve (Standard Inverse): C1

100 6000 (5000) 100 6000 (5000)
90 90
80 80
70 70
60 60
50 3000 (2500) 50 3000 (2500)
40 40
30 30
1500 (1250) 1500 (1250)
20 20
10 600 (500) 10 600 (500)

9 9
8 8
7 7
6 6
5 300 (250) 5 300 (250)
4 4
3 3
150 (125) 150 (125)
2 1.00

2

0.90
Time in Seconds
0.80
Time in Seconds
0.70
0.60
1 60 (50) 1 0.50 60 (50)
.9
.9 15.00 .8 0.40
.8
.7 12.00 .7
.6 0.30
.6 10.00
.5 30 (25) .5 30 (25)
8.00
.4
.4 0.20
6.00
.3
.3 5.00
15 (12.5) 15 (12.5)
4.00
.2
.2 0.10
3.00
2.00 .1 0.05 6 (5)

.1 6 (5) .09
.09 .08
.08 .07
.07
.06
.06 1.00 .05 3 (2.5)
.05 3 (2.5)
.04
.04
.03
.03 0.50
.02
.02
.01
10
20
30
40
50
60
70
80
90
100
.01 .5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
10
20
30
40
50
60
70
80
90
100
Multiples of Pickup
Multiples of Pickup
IEC Class B Curve (Very Inverse): C2 IEC Class C Curve (Extremely Inverse): C3
100 6000 (5000) 100 6000 (5000)
90 90
80 80
70 70
60 60
50 3000 (2500) 50 3000 (2500)
40 40
30 30
1500 (1250) 1500 (1250)
20 20
10 600 (500) 10 600 (500)

9 9
8 8
7 7
6 6
5 300 (250) 5 300 (250)
4 4
3 3
150 (125) 150 (125)
2

2
Time in Seconds
Time in Seconds
1 60 (50) 1 60 (50)
.9
.9 .8
.8 .7
.7
.6
.6
.5 30 (25)
.5
1.00
30 (25)
.4
.4 0.90
0.80
0.70 .3
.3
0.60 15 (12.5)
15 (12.5)
0.50 .2
.2
0.40
0.30
.1 6 (5)
.1
0.20
6 (5) .09 1.00
.09 .08 0.90
.08 .07 0.80
.07 .06 0.70
.06 .05 0.60 3 (2.5)
.05
0.10
3 (2.5) 0.50
.04
.04 0.40
.03
.03 0.30
0.05 .02
.02 0.10 0.20
0.05
.01
10
20
30
40
50
60
70
80
90
100
.01 .5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
10
20
30
40
50
60
70
80
90
100
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
Multiples of Pickup
Multiples of Pickup
Figure 5.215 U.S. Curve U5 and IEC Curves C1, C2, and C3

IEC Long-Time Inverse Curve: C4 IEC Short-Time Inverse Curve: C5

1000 60000 (50000) 100 6000 (5000)
900 90
800 80
700 70
600 60
500 30000 (25000) 50 3000 (2500)
400 40
300 30
15000 (12500) 1500 (1250)
200 20
100 6000 (5000) 10 600 (500)

90 9
80 8
70 7
60 6
50 3000 (2500) 5 300 (250)
40 4
30 3
1500 (1250) 150 (125)
2

20
Time in Seconds
Time in Seconds
10 600 (500) 1 60 (50)

9 .9
8 .8
.7
7
.6
6
5 300 (250) .5 30 (25)
1.00 .4
4
0.90 1.00
0.80 .3 0.90
3 0.70 0.80
0.60 150 (125) 0.70 15 (12.5)
0.50 .2 0.60
2
0.50
0.40
0.40
0.30
.1 0.30 6 (5)
1 60 (50) .09
.9 .08
.8 0.20 .07 0.20
.7 .06
.6
.05 3 (2.5)
.5 30 (25)
.04
.4 0.10
0.10
.03
.3
.02
.2 0.05 0.05
.01
.1
10
70
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
20
30
40
50
60
90
80
100
10
20
30
40
50
60
70
80
90
100
.5 .6 .7 .8 .9 1 2 3 4 5 6 7 8 9
Multiples of Pickup Multiples of Pickup
Figure 5.216 IEC Curves C4 and C5
Figure 5.217 uses Element 01 as an example to show the logic for the 51 element.
All five inputs are Group settings. Essentially, the logic compares the magnitude
of an operating quantity (51O01) to pickup setting 51P01.
Settings Outputs
51RS01
(EM Reset)
51TM01
Setting Range Assignment
51TD01 (Time Dial Out-of-Bounds)
and Limit Check
(Time Dial)
Setting Range Assignment 51MM01
51P01 and Limit Check (Pickup Out-of-Bounds)
(Pickup) 51S01
(51 Picked up)
51O01 Operating Quantity S1 51T01
Time-Overcurrent (51 Timed Out)
0 Element (51) Curve Timing
Calculations 51R01
51TC01 (51 Reset)
(Torque Control)
Figure 5.217 Time-Overcurrent Element

Operating Quantity
The 51 elements are unassigned, so you can select the operating quantity from
many phase and sequence quantities in fundamental, as Table 5.72 shows.
Table 5.72 Fundamental Operating Quantitiesa
Fundamental Quantities
Phase IpmFM, IMAXmF

Sequence I1mM, 3I2mM, 3I0mM
a
Where:
p = A, B, C
m = S, T, U, Y
Pickup and Time-Dial Settings

Pickup setting 51P01, operating on the ratio of the measured current to the
pickup setting (multiple of pickup setting), moves the characteristic horizontally
to vary the pickup current; time-dial (multiplier) setting 51TD01 moves the curve
vertically to vary the operating time for a given multiple of pickup.
Both pickup (51P01) and time-dial (51TD01) settings are math variables instead
of fixed settings. SEL math variables, unlike fixed settings that cannot be dynam-
ically changed, allow for the adaptive changing of pickup and time-dial settings
without the need for changing relay setting groups.
However, if your installation does not require adaptive pickup and/or time-dial
settings changes, use the time-overcurrent element as a conventional 51 element.
For a conventional element, simply enter the pickup and time-dial settings as
numbers, such as:
51P01 := 1.5
51TD01 := 1
Setting Range Assignment and Limit Checks

Because the relay accepts both 1 A and 5 A secondary CTs, the relay assigns the
element pickup setting range only after you select the operating quantity. For
example, if the relay determines (from the part number) that Terminal S is a 5 A
CT, then the relay assigns the range 0.25 to 16.00 as the pickup range of all 51
elements that use any of the Terminal S quantities.
Example 5.1
Single Terminal S—5 A CT secondary

Terminal S has a 5 A nominal CT input, so the range is 0.25 (lower limit) to
16.0 (upper limit).
Example 5.2
Single Terminal T—1 A CT secondary

Terminal T has a 1 A nominal CT input, so the range is 0.05 (lower limit) to
3.2 (upper limit).

Upper and Lower Range Limits

When you use SEL math variables, the selected analog value can exceed the
upper value of the pickup range, or it can fall below the lower value of the pickup
range. When this happens, the relay assigns the appropriate threshold value to the
element and continues to calculate the trip time. For the 51Pnn pickup settings,
the upper threshold is 3.2 for 1 A relays and 16 for 5 A relays. The lower thresh-
old is 0.05 for 1 A relays and 0.25 for 5 A relays. For the 51TDnn time-dial set-
tings, the U.S. curve thresholds are 0.5 and 15, and the IEC thresholds are 0.05
and 1.0. In addition, the relay also asserts the appropriate Relay Word bits:
51MM01 (pickup value out of bounds) and/or 51TM01 (time-dial value out of
bounds).
Example 5.3
For example, you want a 1 A relay to pick up at 1.5 A when IN101 asserts
and to pick up at 2 A when IN102 asserts (IN101 deasserted). Program the
following:
51P01 := IN101 • 1.5 + IN102 • 2
With IN101 asserted (logical 1), and IN102 deasserted (logical 0), the 51P01
setting is:
(1 • 1.5) + (0 • 2) = 1.5 + 0 = 1.5
When IN102 asserts (IN101 deasserted), the 51P01 setting is:
(0 • 1.5) + (1 • 2) = 0 + 2 = 2
If, however, IN102 asserts while IN101 is still asserted, the 51P01 setting is:
(1 • 1.5) + (1 • 2) = 1.5 + 2 = 3.5
Because 3.5 exceeds the upper range value of 3.2, the relay clamps the set-
ting at 3.2 and asserts Relay Word bit 51MM01.
Torque Control
SELOGIC control equation 51TC01 allows you to state the conditions when the
element must run. When 51TC01 asserts (logical 1), Switch S1 in Figure 5.217
closes and the relay evaluates input 51O01. For example, if the element should
only measure when the HV circuit breaker (Terminal S, for example) is closed,
enter the following:
51TC01 := 52CLS
With this setting, Switch S1 closes only when 52CLS is a logical 1. If the element
must measure all the time, enter the following:
51TC01 := 1
EM Reset
Setting 51RS01 defines whether the curve resets slowly like an electromechani-
cal disk or after one power system cycle when current drops below pickup. If you
set 51RS01 = Y, then the relay resets according to the Reset Timer equations for
that particular curve (see Table 5.70 or Table 5.71). If you set 51RS01 = N, then
the relay resets after one power system cycle when current drops below pickup.

Directional Elements
The SEL-400G provides directional elements that are polarized using phase, neg-
ative-sequence, and zero-sequence voltage. Directional elements are provided for
the S, T, U, and Y terminals.
The directional elements for each current terminal are polarized using the voltage
terminal that is used to track frequency for that terminal. The FTSRCm setting
(where m is the particular current terminal, S, T, U, Y) has a default setting of G
(generator), which means the Z voltage input is assigned by default for frequency
tracking and therefore polarizing. If ESYSPT is set to V and FTSRCm is set to S
(system) then Current Terminal m will be frequency-tracked and polarized using
the Terminal V voltage. Note that because directional elements require either a
three-phase, negative-sequence, or zero-sequence voltage, E67m is forced to OFF
if FTSRCm = S but PTCONV = 1PH.
The polarizing voltage is derived from the V voltage for the S, T, U, and Y cur-
rents for the system voltage referenced currents and the polarizing voltage is
derived from the Z voltage for the generator voltage referenced currents. There-
fore, the following definitions apply:
VREFm = PTCONk LOPk
V k=V k=V
Z k=Z k=Z
The directional elements can be used to supervise the definite-time and inverse-
time overcurrent elements. The negative-sequence directional element can also
be used in conjunction with the split-phase elements. Note that zero-sequence
directional elements are not available for PTs connected in delta (PTCONk = D).
Zero-Sequence Directional Element

The zero-sequence-directional element is enabled when the E50m setting
includes G. The enable logic is shown in Figure 5.218. This logic compares the
zero-sequence current, 3I0mFM, to the pickup setting, 50GPm. It also checks the
zero-sequence current to the product of the positive-sequence current and the
positive-sequence restraint factor, a0m. The enable logic is blocked by the direc-
tional block SELOGIC control equation, DIRBLKm, and by a loss of potential
associated with the polarizing voltage source.
3I0mFM
Setting
3 • a0m • I1mFM
Setting
DIRBLKm
LOP(VREFm) m32GE
3I0mFM
Setting m = S, T, U, Y
50GPm
Figure 5.218 Zero-Sequence Directional Enable Logic
The complex zero-sequence impedance is calculated using the following equa-

tion. The variable, q, accounts for the polarity setting of the terminal.

q *
Re  3V0  VREFm CF •   –1  • 3I0mF • 1 Z0ANGm  
Z0m = ------------------------------------------------------------------------------------------------------------------------------------------------------
2
3I0mFM
Equation 5.78
where:
q = 1 if CTPm = N
q = 2 if CTPm = P
Depending on the sign of the forward direction threshold setting, Z0Fm, the for-
ward threshold is determined as follows:
If Z0Fm  0:
3V0  VREFm FM

Z0FTHm = 0.75 • Z0Fm – 0.25 • -----------------------------------------------
3I0mFM
If Z0Fm > 0:
3V0  VREFm FM

Z0FTHm = 1.25 • Z0Fm – 0.25 • -----------------------------------------------
3I0mFM
Similarly, depending on the sign of the reverse direction threshold setting, Z0Rm,
the reverse threshold is determined as follows:
If Z0Rm  0:
3V0  VREFm FM

Z0RTHm = 0.75 • Z0Rm + 0.25 • -----------------------------------------------
3I0mFM
If Z0Rm < 0:
3V0  VREFm FM

Z0RTHm = 1.25 • Z0Rm + 0.25 • -----------------------------------------------
3I0mFM
This results in the following characteristic for the zero-sequence directional ele-
ment.
X0
Reverse
Threshold
Z0 Plane
R0
Forward
Threshold
Figure 5.219 Zero-Sequence Directional Element Characteristic
The logic for the element is shown in Figure 5.220. The logic is executed every
5 ms.

Z0FTHm
mF32G
Z0m m32GE
mR32G
Z0RTHm
m = S, T, U, Y
Figure 5.220 Zero-Sequence Directional Logic
Negative-Sequence Directional Element

The negative-sequence directional element is enabled when the E50m setting
includes Q. The enable logic is shown in Figure 5.221. This logic compares the
negative-sequence current, 3I2mFM to the pickup setting, 50QPm. It also checks
the negative-sequence current to the product of the positive-sequence current and
the positive-sequence restraint factor, a0m and to the product of the zero-
sequence current and the zero-sequence restraint factor, k2m. The enable logic is
blocked by the directional block SELOGIC control equation, DIRBLKm, and by a
loss of potential associated with the polarizing voltage source.
3I2mFM
Setting
3 • a2m • I1mFM
3I2mFM
Setting
k2m • 3I0mFM m32QE
Setting
DIRBLKm
3I2mFM
m = S, T, U, Y
Setting
50QPm
LOP(VREFm)
Figure 5.221 Negative-Sequence Directional Enable Logic
The complex negative-sequence impedance is calculated using the following

equation. The variable, q, accounts for the polarity setting of the terminal.
q *
Re  3V2  VREFm F •   – 1  • 3I2mF • 1 Z1ANGm  
Z2m = --------------------------------------------------------------------------------------------------------------------------------------------------
2
3I2mFM
Equation 5.79
where:
q = 1 if CTPm = N
q = 2 if CTPm = P

Depending on the sign of the forward direction threshold setting, Z2Fm, the for-
ward threshold is determined as follows:
If Z2Fm  0:
3V2  VREFm FM

Z2FTHm = 0.75 • Z2Fm – 0.25 • -----------------------------------------------
3I2mFM
If Z2Fm > 0:
3V2  VREFm FM

Z2FTHm = 1.25 • Z2Fm – 0.25 • -----------------------------------------------
3I2mFM
Similarly, depending on the sign of the reverse direction threshold setting, Z0Rm,
the reverse threshold is determined as follows:
If Z2Rm  0:
3V2  VREFm FM

Z2RTHm = 0.75 • Z2Rm + 0.25 • -----------------------------------------------
3I2mFM
If Z2Rm < 0:
3V2  VREFm FM

Z2RTHm = 1.25 • Z2Rm + 0.25 • -----------------------------------------------
3I2mFM
The logic for the element is shown in Figure 5.222. The logic is executed every
5 ms.
Z2FTHm
mF32Q
Z2m m32QE
mR32Q
Z2RTHm
m = S, T, U, Y
Figure 5.222 Negative-Sequence Directional Logic
Phase Directional Element

The phase directional element is enabled when the E50m setting includes P. The
enable logic is shown in Figure 5.223. This logic checks that positive-sequence
voltage and current are present and compares the angle between them. If the
compared angle is between –60 degrees and 120 degrees then the element
declares forward fault otherwise it declares reverse. The enable logic is blocked
by the directional block SELOGIC control equation, DIRBLKm.

V1[VREFm]FA
Forward
V1[VREFm]FA – I1mFA + –60°
Z1mA
120° Enabled
I1mFA
120° Z1mA –60° Reverse
V1[VREFm]FM Enable Enabled
1.0 V 120° 90°
Setting
DIRBLKm
Forward
I1mFM
0.05 • INOMm 180° 0°
m = S, T, U, Y Reverse
Z1mA has range of –179.99˚ to 180˚
= 180 if CTPm = N, = 0 otherwise –90° –60°
Figure 5.223 Phase Directional Enable Logic
Directional checks are calculated for each phase-to-phase loop as follows:
q j • Z1ANGm
MABDm := Re   – 1  • IABmCF • e •  VAB  VREFm F  
q j • Z1ANGm
MBCDm := Re   – 1  • IBCmCF • e •  VBC  VREFm F  
q j • Z1ANGm
MCADm := Re   – 1  • ICAmCF • e •  VCA  VREFm F  
Equation 5.80
where:
q = 1 if CTPn = N
q = 2 if CTPn = P
As shown in Figure 5.224, a forward indication is declared if the directional

checks are positive for all three loops and a reverse indication is declared in the
directional checks are negative for all three loops. The logic is executed every
5 ms.
MABDm
Forward
MBCDm Enabled
m32F3P
MCADm
0.1 • INOMm
LOP(VREFm)
MABDm
MBCDm
m32R3P
Reverse
Enabled
MCADm
–0.1 • INOMm
m = S, T, U, Y
Figure 5.224 Phase Directional Declaration Logic

Setting Guidelines
Z1ANGm (Positive-Sequence Line Impedance Angle)
For each terminal, set the positive-sequence line angle in degrees. This setting is
only available if setting E50m includes P or Q.
Z0ANGm (Zero-Sequence Line Impedance Angle)

For each terminal, set the zero-sequence line angle in degrees. This setting is only
available if setting E67m = Y and if setting E50m includes G and VREFm is con-
figured to measure zero-sequence voltage (PTCONk = Y or D1).
Z2Fm (Forward Direction Z2 Threshold)

Use Z2F to calculate the Forward Threshold for the negative-sequence voltage-
polarized directional elements. This setting is only available if setting E50m
includes Q. If setting EADVS = N, the relay internally sets Z2Fm to –0.5 /
INOMm.
Z2Rm (Reverse Direction Z2 Threshold)

Use Z2R to calculate the reverse threshold for the negative-sequence voltage-
polarized directional elements. This setting is only available if setting E50m
includes Q. If setting EADVS = N, the relay internally sets Z2Rm to 0.5 / INOMm.
When setting the element, be sure to set Z2R greater in value than setting Z2F by
at least Z2Fm + 0.5 / INOMm secondary.
a2m (Positive-Sequence Restraint Factor—m32QE)

The a2 factor is the ratio of the negative-sequence current and the positive-
sequence current (I2/I1). This factor increases the security of negative-sequence
voltage-polarized directional elements by preventing these elements from operat-
ing for negative-sequence current (system unbalance). Negative-sequence current
circulates because of line asymmetries, CT saturation during three-phase faults,
etc. This setting is only available if setting E50m includes Q. If setting
EADVS = N, the relay internally sets a2m to 0.1.
k2m (Zero-Sequence Current Restraint Factor, I2/I0)

The k2 factor increases the security of the zero-sequence voltage-polarized direc-
tional elements. It keeps the elements from operating for zero-sequence current
(system unbalance), which circulates because of line asymmetries, CT saturation
during three-phase faults, etc. This setting is only available if setting E50m
includes Q. If setting EADVS = N, the relay internally sets k2m to 0.2.
Z0Fm (Forward Directional Z0 Threshold)

This setting is only available if setting E50m includes G and VREFm is config-
ured to measure zero-sequence voltage (PTCONk = Y or D1). If setting
EADVSm = N, the relay internally sets Z0Fm to –0.5 / INOMm (INOM = 1 for a
1 A relay and 5 for a 5 A relay). When setting Z0Fm and Z0Rm, be sure that Z0R
is greater in value than setting Z0F by at least 0.1  secondary.

Trip Logic
Z0Rm (Reverse Directional Z0 Threshold)

This setting is only available if setting E67m = Y and if setting E50m includes G
and VREFm is configured to measure zero-sequence voltage (PTCONk = Y or
D1). If setting EADVSm = N, the relay internally sets Z0Rm to 0.5 / INOMm
(INOM = 1 for a 1 A relay and 5 for a 5 A relay). When setting Z0Fm and Z0Rm,
be sure that Z0R is greater in value than setting Z0F by at least 0.1  secondary.
a0m (Positive-Sequence Current Restraint Factor, I0/I1)

This setting is only available if setting E50m = Y and if setting E50m includes G
and VREFm is configured to measure zero-sequence voltage (PTCONk = Y or
D1). The a0 factor increases the security of the zero-sequence voltage-polarized
directional element. This factor keeps the elements from operating for zero-
sequence current (system unbalance), which circulates because of line asymme-
tries, CT saturation during three-phase faults, etc. This setting is only available if
setting E50m includes Q. If setting EADVS = N, then the relay internally sets
a0m to 0.1.
DIRBLKm (Directional Element Blocking)

Customize a SELOGIC control equation to determine when to block the zero-
sequence, Negative-sequence, and positive-sequence directional elements for
Terminal m.
Trip Logic
To provide settings for selective tripping between generator unit faults and sys-
tem faults, the SEL-400G includes eight trip elements and five trip logics. Use
the logic in Figure 5.225 for generator or transformer faults. There exists a sepa-
rate Minimum Trip Duration timer (TDURDnn, where nn = 01 to 08) and a sepa-
rate unlatch input (ULTRnn) for each of the eight elements.
In Figure 5.225, the Trip timer starts when SELOGIC control equation TRnn
asserts for one processing interval. Assertion of this equation immediately asserts
output TRIPnn. Output TRPnn remains asserted for the Minimum Trip Duration
timer (TDURDnn) setting regardless of the status of Input TRnn. When output
TRIPnn asserts, the logic seals TRIPnn in through the AND gate when the
unlatch input ULTRnn is deasserted.
Once latched, TRPnn remains asserted until the unlatch input (ULTRnn) asserts.
Generally, ULTRnn can have the target reset (TRGTR) input.
Minimum Trip
Duration Timer
SELOGIC
Settings
TRnn TDURDnn
TRIPnn
ULTRnn
Figure 5.225 SEL-400G Trip Logic

Trip Logic
Because not all the protection elements need to trip the breakers or exciter or
prime mover or auxiliary breakers, the SEL-400G provides an additional five trip
logics (OR gates) to selectively trip the breakers or exciters, etc. Those are
TRIPm, TRIPEX, TRIPPM, TRIPAUX, or TRIP. TRIPm is a breaker trip element
and is an OR output of the trip elements selected by TRIPnn setting. Where m
indicates the terminals included in ESYSCT setting. Assertion of any of the
TRIPEX, TRIPPM, TRIPAUX, or TRIP Relay Word bits will trigger an event
report. If the trip logic is not used, the ER (event report trigger) equation should
be configured to ensure that the relay triggers an event report for any protection
operation. See Table 7.17 for details.
Trip-Logic Settings
TRnn (Trip Elements)
Specify the conditions under which individual trip elements must assert with the
TRnn setting. Default settings for the TR01–TR06 are as follows:
TR01 = 87Z1 OR 87Z2 OR REF OR 64GT OR 21PZ1T OR 21PZ2T

TR02 = 24D1T1 OR 24D2T1
TR03 = 32T01
TR04 = 40Z1T OR 40Z2T OR 40P1T OR 40P2T
TR05 = 81D1T OR 81D2T OR 81D3T OR 81D4T OR 81D5T OR
81D6T
TR06 = 78OST OR 46Q1T1 OR 46Q1T2
In your application, you can use several trip elements to implement a simultane-
ous, unit separation, or sequential trip with a different equation for each.
ULTRnn (Unlatch Trip Elements)

Specify the conditions to unlatch the trip element TRnn. The default setting is
Relay Word bit TRGTR.
TDURDnn (Minimum Trip Duration Timer)

Set this delay (in seconds) slightly longer than the trip time of the slowest circuit
breaker for all the trip elements.
TRm (Trip Breaker)

Specify the trip elements under which each of the enabled circuit breakers must
trip with the TRm setting. For example, if TRS = 1, 3, 5, TRS = TRIP01 OR
TRIP03 OR TRIP05.
TREX (Trip Exciter)

Specify the trip elements under which exciter must trip with the TREX setting.
For example, if TREX = 1, 3, 5, TREX = TRIP01 OR TRIP03 OR TRIP05.
TRPM (Trip Prime Mover)

Specify the trip elements under which prime mover must trip with the TRPM set-
ting. For example, if TRPM = 1, 3, 5 then TRPM = TRIP01 OR TRIP03 OR
TRIP05.

Close Logic
TRAUX (Trip Auxiliary)

Specify the trip elements under which auxiliary must trip or initiate transfer with
the TRAUX setting. For example, if TRAUX = 1, 3, 5, TRAUX = TRIP01 OR
TRIP03 OR TRIP05.
TRIP (General Trip)

Specify the trip elements under which general trip must assert with TREX set-
ting. For example, if TRIP = 1, 3, 5, TRIP = TRIP01 OR TRIP03 OR TRIP05.
Close Logic
Figure 5.226 shows the close logic that removes the close command from the cir-
cuit breaker after a set time. If the ESYSCT setting includes the terminal name,
and if the unlatch input SELOGIC control equation (ULCLm) is deasserted, the
two bottom inputs of the AND gate are logical 1. When SELOGIC control equa-
tion CLm asserts, the AND gate turns on. When the gate turns on, the Close Fail-
ure timer asserts and seals itself in through the OR gate for a time equal to the
CFD setting, or until ULCLm asserts. With the Close Failure timer sealed in, out-
put CLSm is also sealed in for the CFD time setting. Once the Close Failure timer
asserts, CFm Close Failure, Terminal m Relay Word bit asserts indicating a close
failure.
The close failure timer is unaffected by a setting group change. The timer starts
timing in the present setting group, continues to run for the intermediate time
between setting groups, and completes timing in the new setting group.
Close Failure
Timer m
0
CFDm
CLm
ULCLm ULCLm CFm
<Terminal name> selected CLSm
(ESYCT Setting)
Figure 5.226 Close Logic for Breaker m
Close Logic Settings

CLm (Close SELOGIC Control Equation)
Specify the conditions under which the circuit breaker must close with the CLm
setting. This settings category is hidden when ESYSCT = OFF.
ULCLm (Unlatch Close SELOGIC Control Equation)

Specify the conditions to unlatch the close output command (CLSm) and reset
the close failure timer. The close output command and close failure timer will
reset on the rising edge of the unlatch. Default settings are the 52CLm that assert
when the breakers close.

Close Logic
CFDm (Close Failure Delay Breaker)

Set this delay (in seconds) slightly longer than the close time of the slowest cir-
cuit breaker. The default value is 0.08 s. If CFDm is set to OFF, there is no close
fail status indication and CTm stays deasserted. Also, when CFDm = OFF, it runs
as a normal dropout timer and resets when it receives a ULCLm assertion.

SEL-400G Relay
Instruction Manual
S E C T I O N 6
Protection Application Examples

This section provides instructions for setting the SEL-400G Advanced Generator
Protection System protection functions. Use these application examples to help
familiarize yourself with the relay and for assistance with your own protection
settings configuration. This section is not intended to provide a complete settings
guide for the relay. Instead, it focuses on configuring the current and voltage
inputs and enabling commonly used protection elements. Settings guidelines for
individual protection elements are provided in Section 5: Protection Functions.
This section covers the steps for configuration of the following:
➤ Potential transformer data
➤ Current transformer data
➤ Relay configuration (enabling selected protection functions)
➤ Power system data
➤ Configuration of the zone currents for the differential elements
➤ Configuration of operating signals for selected protection elements
NOTE: In this section, the Hide Figure 6.1 shows the three-line diagram for the example system. Protection is
Hidden Settings filter is enabled in the
setting software to show only those provided both for the generator and the generator step-up (GSU). CTs W and X
settings required by the application. will be used for the generator differential. CTs S and T will be used by the GSU
differential.

6.2 Protection Application Examples
SEL-400G (partial)
Y01 IAS Y02
Y03 IBS Y04
Y05 ICS Y06
2000/5 A
400:1
ABC Phase Rotation

52-HV
B (H2) IAY
H1 H2 H3 Z13 IY1 Z14
A (H1) IBY
Z15 IY2 Z16
C (H3) ICY
GSU IY3
555 MVA Z17 Z18
24.0–230 kV 500/5 A
Y13 IAU Y14
Z = 5.0% a (X1) b (X2) 100:1
Y15 IBU Y16
Y17 ICU Y18
c (X3) X1 X2 X3
VAV
Y19 VV1 Y20
24,000/120 V/120 V VBV

Y21 VV2 Y22
200:1
VCV
Y23 VV3 Y24
R
GSU Zone
Generator Zone
Z01 IAW Z02
Z03 IBW Z04
Z05 ICW Z06
20000/5 A
4000:1
52-LV
20000/5 A
4000:1 Y07 IAT Y08
Y09 IBT Y10
Y11 ICT Y12
Z19 VAZ Z20
VBZ
Z21 VZ2 Z22
24,000/120 V
200:1 Z23 VCZ Z24
Generator
555 MVA, 22.0 kV
60 Hz, Xd = 1.81 pu
20,000/5 A
4000:1 Z07 IAX Z08
IBX Z10
Z09
Z11 ICX Z12
24,000/240 V R
100:1
SEL-2664S (partial)
D01 D02
C01 C02
Figure 6.1 Example System Three-Line Diagram

Protection Application Examples 6.3

The iso-phase bus (IPB) VTs have a dual secondary with one winding wye- (star)
connected and the other broken-delta connected. The V voltage inputs are used in
several applications: V1 is used for GSU V/Hz and synchronism check. V2 is
used for stator ground fault protection. V3 is used for IPB ground fault protec-
tion. PTCONV is therefore set to 1PH. The ratio of this VT is 24000/120, so
PTRV1 and PTRV3 are set to 200.
The generator VTs are wye-connected and connected to the Z voltage terminal.
Accordingly, PTCONZ is set to Y and PTRZ is set to 200.
The neutral grounding transformer has a ratio of 24000/240, so PTRV2 is set to
100.
VNOMZ is set to the value of the secondary voltage when the generator is oper-
ated at its rated voltage.
120 V
VNOMZ = 22 kV • -------------- = 110 V
24 kV
Equation 6.1
VNOMV1 and VNOMV3 are set to the value of the secondary voltage when the
GSU is operated at its rated voltage.
120 V
VNOMV1 = VNOMV3 = 24 kV • -------------- = 120 V
24 kV
Equation 6.2
VNOMV2 is set to the value of the secondary voltage when the generator is oper-
ated at its rated voltage.
240 V
VNOMV2 = 22 kV • -------------- = 220 V
24 kV
Equation 6.3
The selections for VNOMZ and VNOMV1 shown in Equation 6.1 and
Equation 6.2 are necessary to ensure that the pickup settings of the V/Hz ele-
ments are expressed as a percentage of the rated voltage of the protected equip-
ment.
Figure 6.2 Potential Transformer


Four sets of three-phase CTs are wired to the S, T, W, and X current terminals in
this application. The CT ratios are entered directly. A single-phase CT at the
GSU neutral is used to provide restricted earth fault (REF) protection. It is con-
nected to the Y1 current terminal. Therefore, CTCONY is left at its default set-
ting of 1PH and the CT ratio is entered for CTRY1.
Figure 6.3 Current Transformer
Relay Configuration
The V2 voltage input will be used to measure the generator neutral voltage.
Accordingly, EGNPT is set to V2.
ESYSPT is set to V1 because a system frequency measurement is required for the
synchronism-check and V/Hz functions.
EGNCT is set to X. This configures the generator neutral current to be the Termi-
nal X current that will be used by the loss-of-field, out-of-step, and phase dis-
tance elements.
ESYSCT is set to S, T. These CTs are used for the transformer differential and
for auxiliary protection functions.
Additionally, the following protection function are configured:
E24 := 2 Enable two V/Hz elements for protection of the generator and
GSU
E25 := T Enable synchronism check for Breaker T
E32 := 1 Enable one directional power element for anti-motoring pro-
tection
E40 := Z Set loss-of-field protection to impedance
E46 := 1 Enable one current unbalance element
E59 := 1 Enable one overvoltage function for IPB ground fault protec-
tion
E64G := G1, Enable the fundamental neutral overvoltage element to provide
G3 90%–95% coverage for stator ground faults and the third-har-
monic ratio check (G3) to provide protection for the first 15%
of the winding. The subharmonic injection unit (SEL-2664S
Stator Ground Protection Relay) will provide primary protec-
tion for stator ground faults.
E64S := Y Enable the subharmonic injection element to be used in con-
junction with the SEL-2264S
E78 := 1B Set the out-of-step protection element to single-blinder

Power System Data
E81 := 2 Enable two frequency elements to provide over- and underfre-

quency protection
E87 := 2 Enable two differential elements for protection of the genera-
tor and GSU
EREF := Y1 Enable REF protection for the GSU
ELOP := Z Enable loss-of-potential detection for the Z voltage terminal
EBUP := 21P Set the backup protection to phase distance
EINAD := S Enable inadvertent energization for Breaker S
EBFL := S, T Enable breaker failure for Breakers S and T
EBFO := S Enable breaker flashover for Breaker S
Figure 6.4 Relay Configuration
Power System Data

The generator rated apparent power and terminal voltage are entered for
MVAGEN and KVGEN in primary MVA and kV. The generator direct axis syn-
chronous impedance (XDGEN), the transformer leakage reactance (XTXFR),

Volts-per-Hertz Element 1 (Generator)
and system impedance (XESYS) are entered in per unit. XDGEN can be entered
directly. XTXFR and XESYS must be converted to the generator base MVA
(MVAGEN) and generator base voltage (XESYS).
These settings are used for generating characteristic plots for the loss-of-field,
out-of-step, and backup distance elements. In addition, MVAGEN is used by the
current unbalance element and XDGEN and XESYS are used by the capability-
based loss-of-field element.
Figure 6.5 Power System Data
Volts-per-Hertz Element 1 (Generator)

This element will use the Z voltage input. Therefore, set 24O1 to VPMAXZF,
which is the maximum of the three phase-to-phase voltage measurements.
Figure 6.6 V/Hz Element 1
Volts-per-Hertz Element 2 (Generator Step-Up)

This element will use the V voltage input. Therefore, 24O1 is set to VV1FM,
which is the magnitude of the AB voltage measurement from the IPB VT.
Figure 6.7 Volts per Hertz Element 2

Synchronism Check
Synchronism Check
Because the AB voltage is connected to the VV1 input, VT is delta connected,
and the three phase-to-phase voltages are available as polarizing voltages. Set
SYNCP to VABZ.
Figure 6.8 Synchronism Check SYNCP
The corresponding phase-to-phase voltage is selected for the Breaker T synchro-

nism-check element by setting SYNCSS to VV1.
Figure 6.9 Synchronism Check Phase-to-Phase Voltage
Directional Power
The directional power element is configured to respond to the real power mea-
sured at the generator neutral, 3PGF.
For anti-motoring protection, the element is enabled as an over-power element
with a negative pickup setting equal to the expected motoring power in secondary
watts.
Figure 6.10 Directional Power

Zone 1 Differential (Generator Zone)
Zone 1 Differential (Generator Zone)

This zone uses the W and X CTs, so these are selected for the E87Z1 setting.
E87XFR1 is set to N because the zone does not have an in-zone transformer.
The unrestrained differential is not used, so E87U1 is set to OFF.
Figure 6.11 Zone 1 Differential
Zone 2 Differential (Generator Step-Up)

This zone uses the S and T CTs, so these are selected for the E87Z2 setting.
This zone has an in-zone transformer, so set E87XFR2 to Y.
Harmonic blocking is enabled, as well as the unrestrained and negative-sequence
differentials.
MVA2 is set to the rated MVA of the transformer. VTERMS2 and VTERMT2 are
set to the GSU-rated HV and LV voltages. The tap values 87STAP2 and
87TTAP2 are calculated automatically and displayed.
From Figure 6.12, note the following:
➤ The CTs are oriented in the primary circuit with opposite polarities.
➤ The polarity marks of both CTs are connected to the polarity marks
on the relay.
➤ The CTs are wye- (star) connected.
➤ The primary and secondary phase relationships are maintained. In
other words, the CT mounted on the A-Phase of the primary circuit is
wired to the A input of the relay, and so on).

Zone 2 Differential (Generator Step-Up)
Therefore, if the transformer were replaced with a bus, the CT secondary currents
would sum to zero under normal operation. This means that angle compensation
is only required to account for the transformer.
The angle compensation rules from Compensation Calculations on page 5.19 are
applied. The delta winding is selected as the reference winding. The phase
sequence is ABC, so phase shifts are measured in the counterclockwise direction.
H1 is phase-shifted by 330° with respect to X1 in the counterclockwise direction.
Accordingly, 87SCTC2 is set to 11 and 87TCTC2 is set to 0.
B (H2)
a (X1) b (X2)
A (H1)
c (X3) C (H3)
X1 H1
X2 H2
X3 H3
ABC Phase Rotation
ICS
IAS
ICT
IAT
IBS
IBT
SEL-400G (partial)
Figure 6.12 Example System Partial Three-Line Diagram
Figure 6.13 Zone 2 Differential

Restricted Earth Fault
Restricted Earth Fault

This element uses the IY1 and S current inputs. Therefore, set REFRF1 to S.
Figure 6.14 Restricted Earth Fault

Instruction Manual
S E C T I O N 7
Metering, Monitoring, and Reporting

The SEL-400G Advanced Generator Protection System provides extensive capa-
bilities for metering important power system parameters, monitoring transformer
components, and reporting on system operation. The relay provides the following
useful features:
➤ Metering on page 7.2
➤ Circuit Breaker Monitor on page 7.18
➤ Station DC Battery System Monitor on page 7.19
➤ Analog Signal Profiling on page 7.19
➤ Reporting on page 7.24
See Section 7: Metering, Section 8: Monitoring, and Section 9: Reporting in the
SEL-400 Series Relays Instruction Manual for general information. This section
contains details specific to the SEL-400G.
Add the following new section just before the metering title
Phasor Reference
The phasor reference is the signal that is used as a reference for the angle of a
phasor measurement.
Terminal G defaults to the Terminal Z, positive-sequence voltage for the phasor
reference. If this signal is unavailable, then the Terminal G positive-sequence
current is used as the phase reference.
If the SEL-400G is configured to track the system voltage (ESYSPT != OFF),
Terminals S, T, U, and Y can be configured to use the system frequency for fre-
quency tracking. In this case, the phasor reference defaults to the Terminal V pos-
itive-sequence voltage. If this signal is unavailable, the relay will check the
availability of a Terminal V single-phase voltage (in order from VV1 to VV3). If
none of these voltages are available, the relay will check the availability of the
positive-sequence terminal currents (in order of S, T, U, and Y). If none of these
are available, the relay will check for the availability of the generator reference
(either Terminal Z positive-sequence voltage or Terminal G positive-sequence
current in that order). Table 7.1 summarizes the selection process.

7.2 Metering, Monitoring, and Reporting
Metering
Table 7.1 Valid Reference Quantities
Terminal Source Terminal Valid Value
Z, W, X, G Z Positive-sequence voltage > 0.1 • VNOMZ

G Positive-sequence current > 0.05 • INOMGa
S, T, U, V Z Positive-sequence voltage > 0.1 • VNOMZ
G Positive-sequence current > 0.05 • INOMGa
Vb Positive-sequence voltage > 0.1 • VNOMV
b
V VV1 voltage > 0.06 • VNOMV1
b
b
b
S Positive-sequence current > 0.05 • INOMS
Tb Positive-sequence current > 0.05 • INOMT
b
U Positive-sequence current > 0.05 • INOMU
Yb Positive-sequence current > 0.05 • INOMY
a INOMG is INOMW if EGNCT= W or W, X. Otherwise INOMG = INOMX.
b
Used when (ESYSPT != OFF) and FTSRCm = S.
Metering
The SEL-400G provides one-cycle average metering for measuring power sys-
tem conditions and differential protection values. Each SEL-400G processes
18 currents, 6 voltages, and 1 battery monitor.
Table 7.2 shows all the MET commands available in the relay.
Table 7.2 MET Command (Sheet 1 of 2)
Command Description
a
MET RMS n Display root-mean-square (rms) metering quantities (current and
voltage only) for Terminal G
MET F t na, b Display fundamental metering quantities
MET F Y na Display Y-terminal fundamental metering quantities
a, b
MET SEC t n Display secondary metering quantities
a
MET D n Display demand and peak demand metering quantities
MET RD Reset demand meter data
MET RP Reset peak demand data
a, c
MET DIF Zk A n Display differential data
a
MET E n Display energy import and export metering quantities
MET RE Reset energy data
MET H G na Display harmonic metering data
a
MET PM n Display synchrophasor data
MET PM Triggers a synchrophasor measurement
a
MET RTD n SEL-2600 temperature quantities
MET SYN Display synchronism check metering data
a
MET PMV n Display protection math variables

Metering, Monitoring, and Reporting 7.3
Metering
Table 7.2 MET Command (Sheet 2 of 2)
Command Description
a
MET AMV n Display automation math variables
a
MET BAT n Display battery data
MET RBM Reset station battery max/min measurements
MET ANA na Display analog values from MIRRORED BITS analog, and remote ana-
logs
a n = the number of times the relay repeats the response.
b
t = S, T, U, Y, G.
c k = 1, 2.
Because of the large number of analog channels, not all analog channels are
required for every application. Furthermore, when the torque-control settings (of
those analog quantities that have torque-control settings) deassert, those analog
quantities are not shown in the meter report.
There are thus two different instances for not displaying analog quantities in the
meter report: you either did not select the analog quantity, or the analog quantity
is temporarily not calculated when the torque-control equation deasserts. To dis-
tinguish between these two conditions, the relay displays dashes (-----) when the
analog quantity is not selected, and zeros (000.00) when the torque-control equa-
tion deasserts.
Phase and rms currents for the terminals are zeroed out if the measured secondary
phase current is less than 2 percent of nominal current.
Sequence currents for the terminals are zeroed out if the measured secondary
maximum phase current is less than 2 percent of nominal current.
Phase and rms voltages for the terminals are zeroed out if the measured second-
ary voltage is less than 5 percent of nominal voltage.
Sequence voltages for the terminals are zeroed out if the measured secondary
maximum phase voltage is less than 5 percent of nominal voltage.
Instantaneous Metering
Fundamental Meter
Use the MET (F) w command (w = S, T, U, Y, G, V, Z) to view the fundamental
(60 or 50 Hz) metering values. When you type MET without an argument, the
report defaults to Terminal S. For each terminal, the fundamental meter report
provides the quantities shown in Table 7.4.
Table 7.3 shows the order of valid reference quantities that the relay uses to dis-
play the angular relationship among the metering values.
Table 7.3 Valid Reference Quantities (Sheet 1 of 2)
Reference Quantity Source Valid Value
Positive-sequence voltage PT V Positive-sequence voltage  0.1 • VNOMV

Positive-sequence voltage PT Z Positive-sequence voltage  0.1 • VNOMZ
Positive-sequence current Terminal G Positive-sequence current  0.05 • INOMG
Positive-sequence current Terminal Y Positive-sequence current  0.05 • INOMY
Positive-sequence current Terminal S Positive-sequence current  0.05 • INOMS

Metering
Table 7.3 Valid Reference Quantities (Sheet 2 of 2)
Reference Quantity Source Valid Value
Positive-sequence current Terminal T Positive-sequence current  0.05 • INOMT

Positive-sequence current Terminal U Positive-sequence current  0.05 • INOMU
For example, the positive-sequence voltage calculated from the PT V voltage

inputs is reference for all metering quantities, provided that this positive-
sequence voltage exceeds 10 percent of the VNOMV setting. If PT V is not avail-
able, then the positive-sequence voltage calculated from the PT Z voltage inputs
is reference for all metering quantities, provided that this positive-sequence volt-
age exceeds 10 percent of the VNOMV settings. This sequence continues for all
other reference quantities.
See Phasor Reference on page 7.1 for the phasor reference definition.
Table 7.4 Quantities in the Fundamental Meter Report
Quantity Description
IA, IB, IC Terminal w A-Phase, B-Phase, and C-Phase primary current.

I1, 3I2, 3I0 Positive-, negative-, and zero-sequence components for Terminal t.
VA, VB, VC Available when the PT is wye-connected and PTCONk = Y.
V1, 3V2, 3V0 Positive-, negative-, and zero-sequence components of the voltage termi-
nal specified in Table 7.3. 3V0 is not available when the PTs are connected
in delta (PTCONk = D).
PA, PB, PC, 3P A-Phase, B-Phase, C-Phase, and three-phase active (real) power for Termi-
nal t. Only three-phase real power is available when PTs are delta-con-
nected.
QA, QB, QC, 3Q A-Phase, B-Phase, C-Phase, and three-phase reactive power for
Terminal t. Only three-phase reactive power is available when PTs are
delta-connected.
SA, SB, SC, 3S A-Phase, B-Phase, C-Phase, and three-phase apparent power for Terminal t
Only three-phase power apparent is available when PTs are delta-connected.
Power factor A-Phase, B-Phase, C-Phase, and three-phase power factor for Terminal t.
VAB, VBC, AB, BC, and CA line-to-line voltages
VCA
Frequency Measured frequency
Frequency When the relay tracks the frequency, the report display “Y,” and “N” when
Tracking the relay does not track the frequency.
Battery Voltage Measured battery voltage
Frequency Generator (G) or system (S)
Source
Enable current, voltage, and power meter quantities with the following settings:
➤ Current: include the terminal in ESYSCT
➤ Power (fundamental power only): include Terminal t. Power is
always calculated for Terminal G and those terminals included in the
EPCAL setting.
Use the MET (F) t command (t = S, T, U, Y, G) to view the fundamental (60 or
50 Hz) metering values. When you type MET without an argument, the report
defaults to Terminal G. For each terminal, the fundamental meter report provides
the quantities shown in Table 7.4.

Metering
=>>MET F G <Enter>
Relay 1 Date: 02/17/2020 Time: 18:19:58.278

Fundamental Meter: Terminal G
Phase Currents Sequence Currents

IA IB IC I1 3I2 3I0
MAG(A,pri) 0.00 0.00 0.00 0.00 0.00 0.00
ANG(deg) 0.00 0.00 0.00 0.00 0.00 0.00
Phase Voltages - PT Z Sequence Voltages

VA VB VC V1 3V2 3V0
MAG (kV) ------- ------- ------- 0.000 0.000 0.000
ANG(deg) ------- ------- ------- 0.00 0.00 0.00
Power Quantities
Active Power P (MW,pri)
PA PB PC 3P
0.00 0.00 0.00 0.00
Reactive Power Q (MVAr,pri)

QA QB QC 3Q
0.00 0.00 0.00 0.00
Apparent Power S (MVA,pri)

SA SB SC 3S
0.00 0.00 0.00 0.00
Power Factor
Phase A Phase B Phase C 3-Phase
0.00 Lead 0.00 Lead 0.00 Lead 0.00 Lead
Line-to-Line Voltage
PT - Z
VAB VBC VCA
MAG (kV) 0.000 0.000 0.000
ANG(deg) 0.00 0.00 0.00
Neutral Neutral 3rd Terminal 3rd Total 3rd

Fundamental Harmonic Harmonic Harmonic
VN VN3 3V03 VG3
MAG (kV) ------- ------- 0.003 -------
ANG(deg) ------- ------- -21.36 -------
Generator Neutral Voltage Terminal = OFF
FREQ (Hz) 60.000 Frequency Tracking = N
VDC (V) -0.02 Frequency Source = G
=>>
Figure 7.1 Fundamental Quantities Report for Terminal G
Power
Table 7.4 shows the power quantities that the relay measures. The instantaneous
power measurements are derived from 1-cycle averages that the SEL-400G
reports by using the generator condition of the positive power flow convention;
for example, real and reactive power flowing out (export) is positive, and real and
reactive power flowing in (import) is negative (see Figure 7.2). For power factor,
LAG and LEAD refer to whether the current lags or leads the applied voltage.
The reactive power Q is positive when the voltage angle is greater than the cur-
rent angle (V > I), which is the case for inductive loads where the current lags
the applied voltage. Conversely, Q is negative when the voltage angle is less than
the current angle (V < I); this is when the current leads the voltage, as in the
case of capacitive loads.

Metering
—P +P
+Q +Q
Export power and
export reactive power
(inductive load)
r S1
Powe
x
p le
Com
pf = Lag
P
Com
p le pf = Lead
xP
ow
er S
2
Export power and

import reactive power
(capacitive load)
—P +P
—Q —Q
Figure 7.2 Complex Power (P/Q) Plane
The SEL-400G includes Relay Word bits to indicate the leading or lagging power
factor (see Section 11: Relay Word Bits). In the case of a unity power factor or
loss of phase or potential condition, the resulting power factor angle would be on
this axis of the complex power (P/Q) plane shown in Figure 7.2. This would
cause the power factor Relay Word bits to rapidly change state (chatter). Be
aware of expected system conditions when monitoring the power factor Relay
Word bits. SEL does not recommend the use of chattering Relay Word bits in the
SER or anything that will trigger an event.
RMS Meter
Use the MET RMS command to view the rms current for Terminal G and volt-
age values for Terminal Z; the relay does not calculate rms power values.
Table 7.5 shows the quantities in the rms report.
Table 7.5 Quantities in the RMS Meter Report
IA, IB, IC Terminal G A-Phase, B-Phase, and C-Phase primary current.

VAB, VBC, VCA Primary voltage AB, BC, and CA line-to-line voltages for the Z termi-
nal
Frequency Measured generator frequency
Frequency Tracking The report displays Y when the relay tracks the frequency, and N
when the relay does not track the frequency

Metering
Figure 7.3 shows an rms report for Terminal G. MET RMS is only available for
the G terminal on the SEL-400G on the initial release.
=>>MET RMS <Enter>
Relay 1 Date: 03/01/2020 Time: 15:37:43.924

RMS Meter: Terminal G
Phase Currents, I (A,pri)

IA IB IC
4249.62 4239.78 4270.39
Phase Voltages (kV,pri) - PT Z

VA VB VC
63.497 63.495 63.499
Line-to-Line Voltages (kV,pri)

VAB VBC VCA
109.977 109.980 109.982
FREQ (Hz) 60.001 Frequency Tracking = Y

VDC (V) 0.06 Frequency Source = G
=>>
Figure 7.3 RMS Report for Terminal G
Secondary Meter
Use the MET SEC command to see the secondary fundamental current and volt-
age values for all terminals. Included with each value are the associated CT or PT
ratio and the associated frequency tracking source—generator (G) or system (S).
Figure 7.4 shows the report for all terminals. Table 7.6 shows the quantities in the
secondary quantities report.
See Phasor Reference on page 7.1 for the phasor reference definition.
Table 7.6 Quantities in the MET SEC Report
IA, IB, IC A-Phase, B-Phase, and C-Phase in secondary current.

IY1, IY2, IY3 Single-phase currents are available when CTCONY = 1PH
VA, VB, VC Secondary voltage
VAB, VBC, VCA Secondary voltage AB, BC, and CA line-to-line voltages
VV1, VV2, VV3, VZ2 Single-phase voltages are available when PTCONk = D, D1 or
PTCONV = 1PH
Frequency Measured generator and system frequency
Frequency Tracking The report displays Y when the relay tracks the frequency, and N
when the relay does not track the frequency.
Pumped Storage The report displays Y when pumped storage mode is active.

Metering
=>>MET SEC <Enter>
Relay 1 Date: 03/10/2020 Time: 11:47:41.670

Secondary Meter
Secondary Currents
Terminal MAG(A) ANG(DEG) CTR Source
IAS 4.0008 0.15 4000.0 S
IBS 4.0006 -120.12 4000.0 S
ICS 4.0013 119.94 4000.0 S
IAT 4.0007 0.16 400.0 S
IBT 4.0005 -120.15 400.0 S
ICT 4.0016 119.96 400.0 S
IAU 4.0014 0.12 12000.0 G
IBU 4.0012 -120.13 12000.0 G
ICU 4.0010 119.98 12000.0 G
IAW 2.0016 10.68 4000.0 G
IBW 2.0017 -110.68 4000.0 G
ICW 2.0013 130.70 4000.0 G
IAX 2.0015 10.69 4000.0 G
IBX 2.0014 -110.70 4000.0 G
ICX 2.0006 130.71 4000.0 G
IY1 2.0015 10.69 100.0 S
IY2 2.0016 130.69 100.0 G
IY3 4.0015 -120.10 100.0 G
Secondary Voltages
Terminal MAG(V) ANG(DEG) PTR Source
VV1 60.0001 0.06 200.0 S
VV2 59.9998 -119.93 200.0 G
VV3 59.9999 120.16 200.0 G
VAZ 60.0011 19.55 200.0 G
VBZ 60.0014 -100.97 200.0 G
VCZ 60.0013 141.39 200.0 G
Generator FREQ (Hz) 59.999 Frequency Tracking = Y

System FREQ (Hz) 59.997 Frequency Tracking = Y
VDC (V) 0.00 Pump Storage Mode = N
=>>
Figure 7.4 MET SEC Report
Demand Meter
Figure 7.5 shows the demand report with four of the available ten elements
enabled (see Thermal Demand and Rolling Demand on page 7.6 in the SEL-400
Series Relays Instruction Manual for more information). Table 7.7 shows the
quantities in the demand metering report. See Table 7.8 for a list of quantities that
may be included in the demand metering report. See Section 7: Metering in the
SEL-400 Series Relays Instruction Manual for a complete description of how
demand metering works.
Table 7.7 Quantities in the Demand Metering Report
DM01–DM04 Four of the available ten elements (DM01–DM10 available)

Op_Qty Displays the analog quantities selected for each enabled element (see
Table 7.8 for a list of available analog quantities)
Type Displays the selected type (rolling demand or thermal) of demand meter
for each element (see Thermal Demand and Rolling Demand on page 7.6
in the SEL-400 Series Relays Instruction Manual for more information)
Demand Displays the accumulated demand and the time and date of the recording
Peak Displays the peak demand and the time and date of the recording

Metering
Table 7.8 Demand Metering Operating Quantities
Analog Quantity Description
IGRSa 1-second average rms current  phase, Terminal G

b
3I2mMS 1-second average negative-sequence current angle, Terminal m
b
3I0mMS 1-second average zero-sequence current angle, Terminal m
a  = A, B, C.
b m = S, T, U, Y, G (S, T, U, G if CTCONY = 1PH).
=>>MET D <Enter>
Relay 1 Date: 03/10/2020 Time: 11:46:51.940

Op_Qty Type Demand(A) Peak(A) Date Time
DM01 IAGRS THERM 1.864 2.580 02/18/2020 23:17:10.635

DM02 3I2TMS ROLL 2.184 2.184 03/01/2020 20:20:14.898
DM03 3I0GMS THERM 0.277 1.664 01/13/2020 03:32:27.834
DM04 ICGRS ROLL 3.243 3.243 01/20/2020 20:30:08.536
LAST DEMAND RESET: 01/10/2020 11:46:24.881

LAST MAX DEMAND RESET: 01/10/2020 11:46:24.881
=>>
Figure 7.5 Demand Report With Four Elements Enabled
Differential Meter
Use the MET DIF command to see the differential operate, restraint, and per-
centage harmonic values. Type MET DIF Z1 to view the Zone 1 report and
MET DIF Z2 to view the Zone 2 report. Table 7.9 summarizes the quantities in
the differential report. Figure 7.6 and Figure 7.7 show the differential element
report. Figure 7.8 and Figure 7.9 show the differential element reports, including
individual terminal compensated currents in the differential zones.
Table 7.9 Quantities in the MET DIF Report
IOPA, IOPB, IOPC Per-unit operating current for Differential Element A, Differ-
ential Element B, and Differential Element C
In-Zone Transformer Displays Y when the zone is configured with an In-Zone
Transformer
IRTA, IRTB, IRTC Per-unit restraint current for Differential Element A, Differ-
ential Element B, and Differential Element C
IOPAF2, IOPBF2, IOPCF2 Second-harmonic currents, expressed as a percentage of the
operating current
IOPAF4, IOPBF4, IOPCF4 Fourth-harmonic currents, expressed as a percentage of the
operating current
IOPAF5, IOPBF5, IOPCF5 Fifth-harmonic currents, expressed as a percentage of the
operating current
IOPRA, IOPRB, IOPRC Per-unit rms operating currents
Enabled Terminals Displays the terminals included in the differential calcula-
tions (based on the E87Zn setting)
Frequency Frequency, Frequency Source, and Frequency Tracking
Status

Metering
=>>MET DIF Z1 <Enter>
Relay 1 Date: 02/18/2020 Time: 14:41:56.043

Differential Zone 1 In-Zone Transformer = N

Operate Currents (per unit) Restraint Currents (per unit)
IOPFA IOPFB IOPFC IRTFA IRTFB IRTFC
0.00 0.00 0.00 0.00 0.00 0.00
RMS Operate Currents (per unit)

IOPRA IOPRB IOPRC
0.01 0.01 0.01
Enabled Terminals: W, X

Frequency Source = G
=>>
Figure 7.6 Differential-Element Zone 1 Report
=>>MET DIF Z2 <Enter>
Relay 1 Date: 02/18/2020 Time: 14:42:02.803

Differential Zone 2 In-Zone Transformer = Y

0.00 0.00 0.00 0.00 0.00 0.00
2nd Harmonic Currents (percentage of IOPFA, IOPFB, IOPFC)

IOPAF2 IOPBF2 IOPCF2
85.68 $$.$$ 35.53
4th Harmonic Currents (percentage of IOPFA, IOPFB, IOPFC)

53.00 33.92 52.36

$$.$$ 50.46 47.68
Enabled Terminals: S, W

=>>
Figure 7.7 Differential-Element Zone 2 Report
=>MET DIF Z1 A <Enter>
Relay 1 Date: 03/03/2020 Time: 12:19:12.260


6.00 5.00 4.00 14.00 11.00 8.00
RMS Operate Currents (per unit)

IOPRA IOPRB IOPRC
6.02 4.97 4.00

0.05 0.02 0.10

0.02 0.02 0.01

0.02 0.05 0.06
Figure 7.8 Differential Element Reports Including Individual Terminal

Compensated Currents in Differential Zone 1

Metering
The MET DIF A command shows the content from the MET DIF command,
additional information for matrix compensation, differential settings, and differ-
ential Relay Word bits. You can use this extra information during commissioning
and troubleshooting. For each phase (A, B, C), the currents for each enabled ter-
minal (e.g., S, T) appear in a table format (see Figure 7.9). On the left side of the
table, the primary and secondary current magnitudes appear along with the corre-
sponding phase angles. The phase angles are referred to whichever terminal is
listed first in the Enabled Terminals list. As described in Universal Differential
Elements on page 5.18, the secondary currents are divided by taps to make per-
unit values before undergoing matrix compensation. The right portion of the
MET DIF A response shows the per-unit current magnitudes (after tap compen-
sation), as well as the per-unit magnitudes and angles after matrix compensation.
Use the MET DIF Z1 A and MET DIF Z2 A commands to view the Zone 1 and
Zone 2 reports
Beneath the current table, the MET DIF A command displays the CT connec-
tions (Y or D) for each enabled terminal, as well as the associated tap values and
matrix compensation numbers (0–13). If Matrix 13 is chosen, the user-settable
angle shift appears, along with the value for the zero-sequence removal setting
option.
The final portion of the MET DIF A command response displays the differential
Relay Word bits from the restrained differential logic, as well as the Relay Word
bits from the unrestrained differential logic. To aid in troubleshooting, the com-
mand response also displays Relay Word bits associated with harmonic blocking.
=>>MET DIF Z2 A <ENTER>
Relay 1 Date: 2020/10/23 Time: 11:21:03.547


2.83 2.79 2.15 2.93 2.87 2.33

0.00 0.00 0.00

0.00 0.00 0.00

0.01 0.01 0.01
Enabled Terminals: W, X, Y

Tap and Matrix Compensation: Reference Terminal = W

Terminal Currents Tap Comp. Matrix Comp.
Phase A (A,pri) (A,sec) (DEG) (per unit) (per unit) (DEG)
IAW 2249.01 2.50 0.00 0.71 1.14 -85.95
IAX 77778.41 3.50 -120.03 0.29 0.25 -144.53
IAY 1010.70 4.49 119.90 1.80 1.53 -97.14
Phase B
IBW 3150.17 3.50 -120.03 1.00 1.01 140.63
IBX 99774.46 4.49 119.89 0.37 0.33 94.02
IBY 562.58 2.50 -0.05 1.00 1.52 127.89
Phase C
ICW 4041.42 4.49 119.96 1.28 0.86 35.49
ICX 55570.03 2.50 -0.01 0.21 0.30 -39.41
ICY 788.01 3.50 -120.10 1.40 1.17 15.80
Compensation Settings:
87WTAP: 3.50 87WCTC: 9
87XTAP: 12.00 87XCTC: 11
87YTAP: 2.50 87YCTC: 13 87YANG: 135.6
Figure 7.9 Expanded Differential-Element Report

Metering
Relay Word Bits:

87AB21 87BB21 87CB21 87B21 87B51 87Z2 87R2 87U2
0 0 0 0 0 1 1 0
87CRHR2 87AHB2 87BHB2 87CHB2 87AHR2 87BHR2 87CHR2 87XB22

0 0 0 0 1 1 1 0
87B22 87B52 87TM1 87TMA1 87TMB1 87TMC1 87TS1 87TSA1

0 0 0 0 0 0 0 0
=>
Figure 7.9 Expanded Differential-Element Report (Continued)
Energy Meter
Use the MET E command to view the imported, exported, and total energy for
Terminal G and those terminals specified in the EPCAL group setting. You can
view the energy metering quantities by using a communications port or the relay
front-panel LCD screen.
NOTE: When PTCONV = 1PH, energy To reset the energy values, use the MET RE command from a communications
calculations are zeroed for terminals
associated with Terminal V. terminal or answer YES and press ENT at the Energy Meter submenu reset prompt
on the front-panel LCD screen. You can also reset energy metering with Global
SELOGIC setting RST_ENE.
Table 7.10 shows the quantities in the energy meter report. Figure 7.10 shows the
report for Terminal G and Terminal S.
Table 7.10 Quantities in the Energy Meter Report
Quantities Description
Terminal Terminal G and Terminal S (Terminal G plus those in EPCAL)

Import MWh and MVarh imported in primary
Export MWh and MVarh exported in primary
Total Sum of imported and exported in primary
VREF Voltage reference terminal
The relay updates energy values once per second. The relay also stores energy
values to nonvolatile storage once every four hours, referenced from 23:50 hours
(it overwrites the previously stored value if it is exceeded). Should the relay lose
control power, it restores the energy values saved at the end of the last four-hour
period.
=>>MET E <Enter>
Relay 1 Date: 03/10/2020 Time: 12:46:16.861

IMPORT(MWh/MVArh) EXPORT(MWh/MVArh) TOTAL(MWh/MVArh)

Ter Active Reactive Active Reactive Active Reactive VREF
G 0.00 0.00 87.49 79.04 87.49 79.04 Z
S 0.00 -0.64 3.83 2.67 3.83 2.03 V
Pump Storage Mode = N
Last Energy Reset: 02/09/2020 14:57:11.708
=>>
Figure 7.10 Energy Meter Reports for Terminals G and S

Metering
Harmonic Meter
Use the MET H command to view the harmonic components of the secondary
voltages and currents. Table 7.11 shows the quantities in the harmonic meter
report, Figure 7.11 shows the harmonic data. MET H G can be used to view the
generator harmonic data, as shown in Figure 7.11.
Table 7.11 Quantities in the Harmonic Meter Report
IAn, IBn, ICna Current Terminal n, A-Phase, B-Phase, C-Phase secondary current
(Harmonics 1–15)
IAG, IBG, ICG Generator terminal current, A-Phase, B-Phase, C-Phase secondary
current (Harmonics 1–15) (only for MET H G)
VAk, VBk, VCkb Voltage Terminal k, A-Phase, B-Phase, C-Phase secondary voltage
(Harmonics 1–15)
VGN Generator neutral secondary voltage (Harmonics 1–15) (only for
MET H G)
Generator FREQ Measured generator island frequency
System FREQ Measured system island frequency
Frequency Tracking The report displays Y when the relay tracks the frequency and N
when the relay does not track the frequency (separately for both gen-
erator and system frequency)
a n = S, T, U, W, X, Y.
b k = V, Z.
=>MET H <Enter>
Relay 1 Date: 03/06/2020 Time: 16:58:45.449

Magnitudes of Harmonic Inputs (Amps Sec)

H IAS IBS ICS IAT IBT ICT IAU IBU ICU
1 0.000 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.000
2 0.001 0.001 0.000 0.001 0.000 0.000 0.001 0.000 0.001
3 0.000 0.000 0.000 0.001 0.001 0.000 0.001 0.001 0.001
4 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.000 0.001
5 0.000 0.000 0.000 0.000 0.001 0.000 0.001 0.001 0.000
6 0.001 0.001 0.001 0.000 0.000 0.000 0.000 0.001 0.001
7 0.000 0.001 0.000 0.000 0.001 0.001 0.001 0.000 0.000
8 0.001 0.000 0.000 0.000 0.000 0.000 0.000 0.001 0.001
9 0.001 0.000 0.000 0.000 0.000 0.000 0.000 0.001 0.000
10 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001
11 0.000 0.001 0.000 0.000 0.001 0.000 0.000 0.001 0.001
12 0.000 0.001 0.000 0.000 0.000 0.001 0.001 0.001 0.000
13 0.001 0.000 0.001 0.000 0.001 0.000 0.001 0.000 0.000
14 0.000 0.001 0.000 0.000 0.000 0.000 0.001 0.000 0.001
15 0.001 0.000 0.001 0.000 0.000 0.001 0.001 0.000 0.001
Magnitudes of Harmonic Inputs (Amps Sec)

H IAW IBW ICW IAX IBX ICX IAY IBY ICY
1 0.000 0.001 0.001 0.001 0.000 0.001 0.001 0.001 0.000
2 0.001 0.001 0.001 0.001 0.001 0.000 0.001 0.001 0.000
3 0.001 0.000 0.001 0.000 0.000 0.000 0.001 0.001 0.001
4 0.001 0.000 0.001 0.001 0.001 0.001 0.001 0.000 0.001
5 0.000 0.000 0.000 0.000 0.000 0.001 0.001 0.001 0.001
6 0.001 0.001 0.001 0.000 0.001 0.001 0.000 0.001 0.001
7 0.000 0.000 0.000 0.001 0.000 0.001 0.001 0.001 0.000
8 0.001 0.000 0.001 0.000 0.000 0.001 0.000 0.001 0.001
9 0.001 0.000 0.000 0.000 0.001 0.000 0.001 0.000 0.001
10 0.000 0.000 0.000 0.001 0.001 0.001 0.001 0.000 0.001
11 0.000 0.000 0.000 0.001 0.000 0.001 0.001 0.001 0.001
12 0.000 0.000 0.001 0.000 0.000 0.001 0.001 0.001 0.001
13 0.000 0.000 0.000 0.000 0.000 0.001 0.000 0.000 0.000
14 0.001 0.000 0.000 0.000 0.000 0.000 0.001 0.000 0.001
15 0.001 0.000 0.001 0.001 0.000 0.001 0.001 0.001 0.001
Figure 7.11 Harmonic Meter Report

Metering
Magnitudes of Harmonic Inputs (Volt Sec)

H VAV VBV VCV VAZ VBZ VCZ
1 0.001 0.002 0.003 0.001 0.003 0.003
2 0.000 0.000 0.001 0.001 0.001 0.001
3 0.002 0.001 0.001 0.002 0.001 0.002
4 0.002 0.003 0.003 0.003 0.003 0.003
5 0.002 0.000 0.001 0.002 0.001 0.000
6 0.002 0.002 0.001 0.002 0.001 0.001
7 0.001 0.002 0.001 0.001 0.001 0.001
8 0.002 0.003 0.003 0.003 0.003 0.003
9 0.001 0.002 0.001 0.001 0.002 0.002
10 0.001 0.002 0.003 0.000 0.002 0.002
11 0.002 0.002 0.001 0.001 0.002 0.002
12 0.002 0.001 0.001 0.002 0.001 0.001
13 0.002 0.001 0.002 0.001 0.000 0.001
14 0.001 0.001 0.001 0.000 0.003 0.001
15 0.001 0.001 0.001 0.002 0.001 0.000
Generator FREQ (Hz) 60.000 Frequency Tracking = N

System FREQ (Hz) 60.000 Frequency Tracking = N
Figure 7.11 Harmonic Meter Report
=>MET H G <Enter>
Relay 1 Date: 03/06/2020 Time: 18:44:02.389

Magnitudes of Harmonic Inputs (Amps Sec, Volt Sec)

H IAG IBG ICG VAZ VBZ VCZ VGN
1 0.00 0.00 0.00 0.00 0.00 0.00 0.00
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.00 0.00 0.00 0.00 0.00 0.00 0.00
11 0.00 0.00 0.00 0.00 0.00 0.00 0.00
12 0.00 0.00 0.00 0.00 0.00 0.00 0.00
13 0.00 0.00 0.00 0.00 0.00 0.00 0.00
14 0.00 0.00 0.00 0.00 0.00 0.00 0.00
15 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Generator FREQ (Hz) 60.000 Frequency Tracking = N
Figure 7.12 Generator Harmonic Report
Synchrophasor Meter
Use the MET PM command to display the synchrophasor values, as shown in
Figure 7.13 (see Synchrophasors on page 10.57 for more information).
=>>MET PM <Enter>
Relay 1 Date: 02/27/2020 Time: 12:35:02.000

Time Quality Maximum time synchronization error: 0.000 (ms) TSOK = 1

Serial Port Configuration Error: N PMU in TEST MODE = Y
Synchrophasors
VV Phase Voltages VV Pos. Sequence Voltage

VA VB VC V1V
MAG (kV) 0.000 0.000 0.000 0.000
ANG (DEG) 0.000 0.000 0.000 0.000
VZ Phase Voltages VZ Pos. Sequence Voltage

VA VB VC V1Z
MAG (kV) 79.982 99.992 119.973 99.982
ANG (DEG) 24.773 -95.233 144.763 24.767
Figure 7.13 Synchrophasor Report

Metering
IS Phase Currents IS Pos. Sequence Current

IA IB IC I1S
MAG (A) 100.053 199.828 299.877 194.184
ANG (DEG) 34.880 -75.192 134.777 28.115
IT Phase Currents IT Pos. Sequence Current

IA IB IC I1T
MAG (A) 100.111 199.940 299.962 194.236
ANG (DEG) 34.777 -75.144 134.724 28.089
IU Phase Currents IU Pos. Sequence Current

IA IB IC I1U
MAG (A) 100.032 199.995 300.038 194.269
ANG (DEG) 34.893 -75.173 134.761 28.117
IW Phase Currents IW Pos. Sequence Current

IA IB IC I1W
MAG (A) 449.767 229.938 359.856 227.854
ANG (DEG) 44.797 -25.252 84.741 29.666
IX Phase Currents IX Pos. Sequence Current

IA IB IC I1X
MAG (A) 449.759 229.992 359.888 227.920
ANG (DEG) 44.774 -25.301 84.731 29.643
IY Phase Currents IY Pos. Sequence Current

IA IB IC I1Y
MAG (A) 449.714 230.022 359.891 227.914
ANG (DEG) 44.796 -25.271 84.761 29.669
FREQ (Hz) 60.000 Frequency Tracking = Y

Rate-of-change of FREQ (Hz/s) 0.01
Digitals
PSV08 PSV07 PSV06 PSV05 PSV04 PSV03 PSV02 PSV01

0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Analogs
PMV49 1.000 PMV50 2.000 PMV51 3.000 PMV52 4.498

PMV53 2.300 PMV54 3.600 PMV55 39.997 PMV56 50.004
PMV57 0.000 PMV58 49.998 PMV59 -100.000 PMV60 109.955
PMV61 10.125 PMV62 -50.020 PMV63 59.964 PMV64 20.024
=>>
Figure 7.13 Synchrophasor Report (Continued)
RTD Meter
Use the MET RTD command to display the RTD values, as shown in
Figure 7.14, which shows the RTD values from both SEL-2600 RTD modules
and the configured Remote Analog temperature measurements (see Thermal
Monitoring on page 7.20 for more information).

Metering
=>MET RTD <Enter>
Relay 1 Date: 03/03/2020 Time: 12:18:12.260

Serial Port RTD Input Temperature Data (deg. C)

RTS01TV = -50
RTS02TV = -37
RTS03TV = -24
RTS04TV = -11
RTS05TV = -1
RTS06TV = 15
RTS07TV = 28
RTS08TV = 41
RTS09TV = 54
RTS10TV = 67
RTS11TV = 80
RTS12TV = 93
RTS13TV = 106
RTS14TV = 119
RTS15TV = 132
RTS16TV = 145
RTS17TV = 158
RTS18TV = 171
RTS19TV = 184
RTS20TV = 197
RTS21TV = 210
RTS22TV = 223
RTS23TV = 236
RTS24TV = 250
Configured Remote Temperature Data (deg. C)

RTC01TV = -50
RTC02TV = -37
RTC03TV = -24
RTC04TV = -11
RTC05TV = -1
RTC06TV = 15
RTC07TV = 28
RTC08TV = 41
RTC09TV = 54
RTC10TV = 67
RTC11TV = 80
RTC12TV = 93
RTC13TV = 106
RTC14TV = 119
RTC15TV = 132
RTC16TV = 145
RTC17TV = 158
RTC18TV = 171
RTC19TV = 184
RTC20TV = 197
RTC21TV = 210
RTC22TV = 223
RTC23TV = 236
RTC24TV = 250
Figure 7.14 MET RTD Report
Synchronism-Check Meter
Use the MET SYN command to view the synchronism-check metering data
enabled breaker, as shown in Figure 7.15. Table 7.12 summarizes the quantities
in the sync-check meter report.
Table 7.12 Synchronism-Check Meter Quantities (Sheet 1 of 2)
VPFM Polarizing voltage magnitude (secondary)

a
NVSnFM Breaker n, synchronizing voltage magnitude
DifVna Breaker n, voltage difference in percentage
a
Anglen Breaker n, angle difference in degrees
a
Slipn Breaker n, slip
Generator FREQ Measured generator island frequency

Metering
Table 7.12 Synchronism-Check Meter Quantities (Sheet 2 of 2)
System FREQ Measured system island frequency

Frequency Tracking The report displays Y when the relay tracks the frequency and N
when the relay does not track the frequency (separately for both gen-
erator and system frequency)
a n = S, T, U, Y (enabled).
=>MET SYN <Enter>
Relay 1 Date: 03/06/2020 Time: 17:58:45.449

Breaker T Breaker Status: OPEN
VPFM NVSTFM DifVT AngleT SlipT

(V) (V) (%) (deg) (Hz)
67.12 67.11 0.01 0.50 0.000
Generator FREQ (Hz) 60.000 Frequency Tracking = Y

System FREQ (Hz) 60.000 Frequency Tracking = Y
Figure 7.15 MET SYN Report
Min/Max Meter
Use the MET M command to see the recorded minimum and maximum values
for the selected analog quantities (or its alias if set) in the Group settings
MMOQ(01–30). See Section 12: Analog Quantities for available quantities,
descriptions, and units. Table 7.8 shows the default quantities in the min/max
metering report. Included within the report are the date and time when each value
was recorded. The last reset time concludes the report as shown in Figure 7.6.
Table 7.13 Min/Max Metering Report Default Quantities
3PGF Generator instantaneous fundamental three-phase active power

3QGF Generator instantaneous fundamental three-phase reactive power
3SGF Generator instantaneous fundamental three-phase apparent power
IAGFM Generator instantaneous fundamental A-Phase current magnitude
IBGFM Generator instantaneous fundamental B-Phase current magnitude
ICGFM Generator instantaneous fundamental C-Phase current magnitude
VABZFM Generator instantaneous fundamental AB line-to-line voltage magnitude
VBCZFM Generator instantaneous fundamental BC line-to-line voltage magnitude
VCAZFM Generator instantaneous fundamental CA line-to-line voltage magnitude
VNFM Generator neutral instantaneous fundamental voltage magnitude
FREQPG Generator source frequency
FREQPS System source frequency

Circuit Breaker Monitor
=>>MET M <Enter>
Relay 1 Date: 02/07/2020 Time: 09:46:31.100

Op_Qty Min Date Time Max Date Time
3PGF 810.303 02/07/2020 09:45:47.014 810.728 02/07/2020 09:45:29.672

3QGF -202.335 02/07/2020 09:45:49.047 -201.936 02/07/2020 09:46:12.004
3SGF 835.151 02/07/2020 09:45:09.782 835.574 02/07/2020 09:45:45.384
IAGFM 4.023 02/07/2020 09:45:18.712 4.027 02/07/2020 09:45:45.389
IBGFM 4.048 02/07/2020 09:45:06.327 4.053 02/07/2020 09:45:59.022
ICGFM 4.028 02/07/2020 09:44:57.542 4.033 02/07/2020 09:46:31.084
VABZFM 119.512 02/07/2020 09:45:40.109 119.523 02/07/2020 09:46:12.422
VBCZFM 119.512 02/07/2020 09:45:39.909 119.524 02/07/2020 09:45:04.909
VCAZFM 119.517 02/07/2020 09:46:23.992 119.529 02/07/2020 09:45:56.789
VNFM 3.246 02/07/2020 09:46:27.649 3.253 02/07/2020 09:46:21.352
FREQPG 60.000 02/07/2020 09:45:42.354 60.001 02/07/2020 09:44:55.524
FREQPS 59.999 02/07/2020 09:45:47.247 60.001 02/07/2020 09:45:38.904
LAST MAX/MIN RESET: 02/07/2020 09:44:53.710
=>>
Figure 7.16 Min/Max Meter Report
Circuit Breaker Monitor

The SEL-400G features advanced circuit breaker monitoring. The general fea-
tures of the circuit breaker monitor are described in Section 8: Monitoring in the
SEL-400 Series Relays Instruction Manual. The SEL-400G supports monitoring
four three-pole breakers, designated S, T, U, and Y.
The SEL-400G provides status indication and alarm for each breaker. The logic
is shown in Figure 7.17.
Normally-open and normally-closed breaker indications that are wired to relay
inputs are assigned to 52A_n and 52b_n settings, respectively.
Note that an alarm, 52ALn is declared whenever the 52A_n and 52B_n indica-
tions are both asserted or both deasserted or when both indications show the
breaker to be open but current is measured in at least one phase (OPHk is
dropped out).
If the circuit breaker is the ganged-single-pole type, there will be 52a and 52b
indications for each pole. In this case, the 52a indications for each pole should be
wired in parallel and the 52b indications should be wired in series. In this way,
the logic will indicate that the breaker is closed unless all three poles are open,
and the 52AL Relay Word bit will assert if there is a pole discrepancy.
The 52CLn Relay Word bit asserts when the 52A_n indication shows the breaker
to be closed.
If only a normally-open contact is wired to the relay, it can be assigned to the
52A_n and also inverted (using a NOT) and assigned to the 52B_n. This will pre-
vent incorrect assertion of 52ALn but the alarming is not effective otherwise.
Three-pole-open (3POn) status is enabled by using the EPO setting. When
enabled, 3PO asserts when both the breaker status (52A_n) and the current-based
open-phase detector (OPHn) show the breaker to be open.
Note that if the three-pole open (3PO) Relay Word bit is used to supervise inad-
vertent energization, the 52A setting of the breaker monitor logic must be
assigned to a normally open breaker status contact and EPO must be enabled for
the breaker.

Station DC Battery System Monitor
EPO has n 0
3POn
3PODn
52A_n
52D-n
52B_n 52ALn
0
OPHn
52CLn
n = S, T, U, Y
Figure 7.17 Breaker Status and Alarm Logic
Station DC Battery System Monitor

The SEL-400G automatically monitors one station battery system health by mea-
suring the dc voltage, ac ripple, and voltage between each battery terminal and
ground. See Section 8: Monitoring in the SEL-400 Series Relays Instruction
Manual for a complete description of the battery monitor.
Analog Signal Profiling

Use the analog signal profiling function to record and track values of as many as
20 analog quantities. This function provides data in CASCII that is compatible to
import directly into applications like spreadsheets. Specify the specific analog
quantities for profiling with the SPAQ Report settings.
At the data acquisition rate of 5 minutes, the SEL-400G stores at least 10 days of
all analog signals selected for profiling in nonvolatile memory. The report
includes the time of acquisitions and the magnitude of each selected analog quan-
tity. By defining conditions in the signal profiling enable SELOGIC variable set-
ting (SPEN), you can record analog values at particular periods or conditions of
interest.
SPAQgg (Analog Quantities for Signal Profiling)

Enter any analog quantity available in the relay from the Analog Quantity list
(see Section 12: Analog Quantities) in this freeform setting.
SPAR (Signal Profile Acquisition Rate)

NOTE: The signal profile update rate Although you can select as many as 20 analog quantities, the signal acquisition
does not have an immediate effect.
For example, if SPAR is set to update rate is the same for all analog quantities. Select an acquisition rate of 1, 5, 15, 30,
every 60 minutes, then changed to 1 or 60 minutes.
minute, the original timer will expire
before the new rate takes effect.
SPEN (Signal Profile Enable)

Use this SELOGIC control equation to specify conditions under which the profil-
ing must take place. If there are no conditions, be sure to set SPEN = 1, else no
data are recorded (default value of NA disables the function).

Thermal Monitoring
Use the Compressed ASCII CPR command to view the profile data, as shown in
Figure 7.18.
=>>CPR <Enter>
"#","DATE","TIME","VA_MAG","VB_MAG","VC_MAG","AI301","AI302","AI303","AI304","AI
305","AI306","13D7"
1,"03/17/2005","04:20:51.603",20.000,25.769,15.811,0.020,0.027,0.032,0.034,0.054
,0.045,"1066"
=>>
Figure 7.18 Compressed ASCII Data Display
Because the data are optimally formatted for machine-to-machine compatibility,

use software such as Excel to display the profile data. Figure 7.19 shows the data
from Figure 7.18 after importing the data (comma-delimited) into an Excel
spreadsheet.
Figure 7.19 Profile Data in Excel Spreadsheet
Use the PRO C(lear) command to clear all profile data, as shown in Figure 7.20.
=>>PRO C <Enter>
Clear signal profile for this port
Are you sure (Y/N)? Y <Enter>
Signal profile cleared for this port
=>>
Figure 7.20 Profile Data Reset
Thermal Monitoring
RTD Monitoring
The SEL-400G provides RTD monitoring using temperature measurements
derived from remote RTD devices such as the SEL-2600 RTD module or the
SEL-2411 Programmable Automation Controller.
Configuration of SEL-2600 Temperature Measurements

The relay can connect to a maximum of two SEL-2600 RTD Modules for a total
of 24 RTD measurements. Each SEL-2600 connects to a dedicated EIA-232 port
on the SEL-400G and communicates using the RTD protocol.

Thermal Monitoring
SEL-2600 SEL-2600
SEL-400G Relay
Port 1 Port 2
Fiber-Optic
Cable
SEL-2800M
Fiber-Optic
Transceivers
Figure 7.21 Connection of SEL-2600 RTD Modules to the SEL-400G
If a single RTD module is connected to the relay, set the protocol (PROTO) for
this port to RTDA. The relay designates the RTDs for this module as 1–12. If a
second RTD module is connected to the relay, set the protocol (PROTO) for the
second port to RTDB. The relay designates the RTDs for this module as 13–24.
RTSnTV
(Setting)
RTDnTY RTSnOK
RTSnSC
Data
SEL-2600 Module m Aquisition RTSnOC
RTSFLm
m = 1, 2
n = 1–12 for m = 1 RTSCFm
n = 13–24 for m = 2
Figure 7.22 SEL-2600 RTD Monitoring Logic
The relay receives an indication if an RTD is open- or short-circuited and asserts

the RTSnOC and RTSnSC Relay Word bits. Otherwise, RTSnOK is asserted. If
the relay receives an indication of a problem with the module, the RTSFLs Relay
Word bit asserts. If communication with the module is lost, the RTSCFs Relay
Word bit asserts.
Using the RTSnTY setting to configure the RTD type in the SEL-400G. For each
RTD, select from the following:
➤ NA
➤ 100-ohm platinum (Pt100)
➤ 100-ohm nickel (Ni100)
➤ 120-ohm nickel (Ni120)
➤ 10-ohm copper (Cu10)
The relay uses the RTD type setting to derive the temperature based on
Table 7.14.

Thermal Monitoring
Table 7.14 RTD Resistance Versus Temperature
100
Temp (°F) Temp (°C) 120 Nickel 100 Nickel 10 Copper
Platinum
–58 –50.00 80.31 86.17 74.30 7.10

–40 –40.00 84.27 92.76 79.10 7.49
–22 –30.00 88.22 99.41 84.20 7.88
–4 –20.00 92.16 106.15 89.30 8.26
14 –10.00 96.09 113.00 94.60 8.65
32 0.00 100.00 120.00 100.00 9.04
50 10.00 103.90 127.17 105.60 9.42
68 20.00 107.79 134.52 111.20 9.81
86 30.00 111.67 142.06 117.10 10.19
104 40.00 115.54 149.79 123.00 10.58
122 50.00 119.39 157.74 129.10 10.97
140 60.00 123.24 165.90 135.30 11.35
158 70.00 127.07 174.25 141.70 11.74
176 80.00 130.89 182.84 148.30 12.12
194 90.00 134.70 191.64 154.90 12.51
212 100.00 138.50 200.64 161.80 12.90
230 110.00 142.29 209.85 168.80 13.28
248 120.00 146.06 219.29 176.00 13.67
266 130.00 149.83 228.96 183.30 14.06
284 140.00 153.58 238.85 190.90 14.44
302 150.00 157.32 248.95 198.70 14.83
320 160.00 161.05 259.30 206.60 15.22
338 170.00 164.77 269.91 214.80 15.61
356 180.00 168.47 280.77 223.20 16.00
374 190.00 172.17 291.96 231.80 16.39
392 200.00 175.85 303.46 240.70 16.78
410 210.00 179.15 315.31 249.80 17.17
428 220.00 183.17 327.54 259.20 17.56
446 230.00 186.82 340.14 268.90 17.95
464 240.00 190.45 353.14 278.90 18.34
482 250.00 194.08 366.53 289.10 18.73
Configuration of Remote Analog Temperature Measurements

The relay can connect to multiple remote devices, such as the SEL-2411. The
relay can receive a total of 24 RTD measurements via the Ethernet communica-
tions port. The measurements are mapped to remote analogs using the IEC-61850
protocol. Each temperature measurement must be manually assigned to a remote
analog RA001–RA256. Refer to IEC 61850 Communication on page 10.28 for
details on the IEC-61850 protocol.

Thermal Monitoring
SEL-2411 SEL-2411
SEL-400G Relay
Port 5
Ethernet
Figure 7.23 Connection of RTDs to the SEL-400G
For the case of remote analogs, the RTD type is not set in the SEL-400G. Instead,
this setting is located in the remote device.
(Settings) RTCnTV
Remote Analog n
Data RTCnOK
Aquisition RTCnSC
Remote Analog n
RTCnOC
n = 1–24
Figure 7.24 Remote Analog RTD Monitoring Logic
The relay receives the actual RTD temperature from the remote module. If the
temperature is greater than 250°C, the RTCnOC bit will assert and the RTCnOK
Relay Word bit deasserts. If the temperature is less than –50°C, The RTCnSC bit
will assert and the RTCnOK Relay Word bit deasserts. Otherwise, RTCnOK is
asserted.
When the received temperature is above +250°C or below –50°C, RTCnTV takes
the clamped temperature value of +250°C or –50°C, respectively.
A quality bit from the connected device can be mapped to the SELOGIC Relay
Word bit RTCnQ. If RTCnQ deasserts, then RTCnOK also deasserts.
RTD Ambient Probe

The SEL-400G supports biasing of each of the three IEC thermal model elements
through use of an ambient temperature measurement. The source of the ambient
temperature measurement is specified using the TAMBn setting. You can assign
any of the SEL-2600 or remote analog measurements.

Reporting
(Settings)
TAMBn
RTS1OK
RTS24OK
MAMBOKn
RTC1OK
RTC24OK
RTS1TV
RTS24TV
MAMBn
RTC1TV
RTC24TV
Figure 7.25 Ambient Probe
Reporting
The SEL-400G features comprehensive power system data analysis capabilities.
These are described in Section 9: Reporting in the SEL-400 Series Relays
Instruction Manual. This section describes reporting characteristics that are
unique to the SEL-400G.
Data Capture Types

The relay features the following data capture types:
➤ Raw (HR) data—effective sampling rate as fast as 8000 samples/
second
➤ Filtered (LR) data—2.5 ms resolution (400 samples/second)—
including 20 settable analog quantities
➤ Filtered Disturbance (DR) data—20 ms resolution (50 samples/
second)—includes the same 20 settable analog quantities as the LR
data
Use high-resolution raw data to view transient conditions in the power system.
You can set the relay to report these high-resolution data at 8000 samples/second,
4000 samples/second, 2000 samples/second, and 1000 samples/second effective
sampling rates.
The filtered data give you accurate information on the relay protection and auto-
mation processing quantities.
The high-resolution raw, filtered, and disturbance data are available as files
through the use of Ymodem file transfer and File Transfer Protocol (FTP) in the
binary COMTRADE file format output (IEEE C37.111-2013, Common Format
for Transient Data Exchange [COMTRADE] for Power Systems).
Duration of Data Captures and Event Reports

The SEL-400G stores high-resolution raw data and filtered data. The number of
stored high-resolution raw data captures and event reports is a function of the
amount of data contained in each capture.

Reporting
Table 7.15 lists the maximum number of data captures/event reports the relay
stores in nonvolatile memory when ERDIG = S for various report lengths and
sample rates. The relay automatically overwrites the oldest events with the new-
est events when the nonvolatile storage capacity is exceeded.
The relay stores high-resolution raw and filtered event data in nonvolatile mem-
NOTE: Consider the total capture
time when choosing a value for ory. Table 7.15 lists the storage capability of the SEL-400G for common event
setting LER at the SRATE := 8 kHz. At reports.
LER := 3.0, the relay records at least
12 data captures when ERDIG = S.
These and smaller LER settings are The lower rows of Table 7.15 show the number of event reports the relay stores at
sufficient for most power system the maximum data capture times for each SRATE sampling rate setting. Table
disturbances.
entries are the maximum number of stored events; these can vary by 10 percent
NOTE: High-resolution, filtered, and according to relay memory usage.
disturbance event reports are stored
using the IEEE C37.111-2013 COMTRADE
Table 7.15 Event Report Nonvolatile Storage Capability When ERDIG = S
standard.
Maximum Number of Stored Reports

Event Report Length
8 kHz 4 kHz 2 kHz 1 kHz
0.25 seconds 95 116 131 149

0.5 seconds 56 73 85 99
1.0 seconds 31 42 49 60
3.0 seconds 11 15 19 23
6.0 seconds N/A 7 10 12
12.0 seconds N/A N/A 4 6
24.0 seconds N/A N/A N/A 3
When the event report digital setting is set to include all Relay Word bits in the
event report (ERDIG = A), the maximum number of stored reports is reduced, as
shown in Table 7.16.
Table 7.16 Event Report Nonvolatile Storage Capability When ERDIG = A
Maximum Number of Stored Reports

Event Report Length
8 kHz 4 kHz 2 kHz 1 kHz
0.25 seconds 78 92 101 112

0.75 seconds 30 39 44 50
1.0 seconds N/A 20 23 27
3.0 seconds N/A N/A 12 14
6.0 seconds N/A N/A N/A 7
12.0 seconds N/A N/A N/A N/A
24.0 seconds N/A N/A N/A N/A
Raw Data Oscillography

The relay stores raw (high-resolution [HR]), filtered (low-resolution [LR]), and
filtered disturbance (disturbance resolution [DR]) data in binary format and uses
COMTRADE file types to output these data:
➤ .HDR—header file
➤ .CFG—configuration file
➤ .DAT—high-resolution raw data file

Reporting
The .HDR file contains summary information about the event in ASCII format.
The .DAT file is in binary format and contains the values for each input channel
for each sample in the record. These data conform to the IEEE C37.111-2013
COMTRADE standard. The .CFG file is an ASCII configuration file that
describes the layout of the .DAT file. The .CFG file contains data such as sample
rates, number of channels, generator and system frequency, channel information,
and report digitals. Figure 7.26 shows a typical IEEE C37.111-2013 COMTRADE
file format for the high-resolution event report. For more information relating the
.CFG, .DAT, and .HDR files refer to Section 9: Reporting in the SEL-400 Series
Relays Instruction Manual.
StationA,FID=SEL-400G-1-X413-V0-Z001001-D20200208,2013 Relay Information (2013 = COMTRADE Standard)

267,27A,240D 267 = sum of analogs and digitals
27A = total number of analog channels
240D = total number of digital pointsa
1,IAS,A,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
2,IBS,B,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
3,ICS,C,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
4,IAT,A,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
5,IBT,B,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
6,ICT,C,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
7,IAU,A,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
8,IBU,B,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
9,ICU,C,,A,8.10147858,0,0,-32767,32767,1000.0,1,P
10,IAW,A,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
11,IBW,B,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
12,ICW,C,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
13,IAX,A,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
14,IBX,B,,A,16.20295715,0,0,-32767,32767,2000.0,1,P 27 Analog Channels
15,ICX,C,,A,16.20295715,0,0,-32767,32767,2000.0,1,P
16,IAY,A,,A,0.81014782,0,0,-32767,32767,100.0,1,P
17,IBY,B,,A,0.81014782,0,0,-32767,32767,100.0,1,P
18,ICY,C,,A,0.81014782,0,0,-32767,32767,100.0,1,P
19,VAV,A,,kV,0.00297000,0,0,-32767,32767,183.3,1,P
20,VBV,B,,kV,0.00093167,0,0,-32767,32767,57.5,1,P
21,VCV,C,,kV,0.00297000,0,0,-32767,32767,183.3,1,P
22,VAZ,A,,kV,0.00297000,0,0,-32767,32767,183.3,1,P
23,VBZ,B,,kV,0.00297000,0,0,-32767,32767,183.3,1,P
24,VCZ,C,,kV,0.00297000,0,0,-32767,32767,183.3,1,P
25,VDC,,,V,0.011178,-0.000000,0,-32767,32767,1,1,P
26,FREQPG,,,Hz,0.01,0,0,0,32767,1,1,P
27,FREQPS,,,Hz,0.01,0,0,0,32767,1,1,P
1,TLED_8,,,0
2,TLED_7,,,0
3,TLED_6,,,0
4,TLED_5,,,0
5,TLED_4,,,0
6,TLED_3,,,0
7,TLED_2,,,0
8,TLED_1,,,0
9,TLED_16,,,0
240 Digital Points
.
.
.
237,21PZ2TC,,,0
238,21PZ1TC,,,0
239,21PRCA2,,,0
240,21PRBC2,,,0
60 Nominal Frequency (NFREQ Setting)

1
2000,1000 2000 = Sample Rate (SRATE setting)

1000 = Samples in the Report (LER x SRATE)
13/02/2020,18:26:09.368083 Time Stamp of the Report First Data Point
13/02/2020,18:26:09.469817 Time Stamp of the Trigger Point
BINARY
1
0,-8
0,0
Figure 7.26 COMTRADE .CFG File Data for High-Resolution Data

a If ERDIG is set to S, the digital points are all the Relay Word bits set in ERDG as well as the Relay Word bits that are always included in the
event report. If ERDIG is set to A, the digital points are all the Relay Word bits in the device.

Reporting
Filtered Data Oscillography

All filtered (LR) data are stored at 400 Hz resolution and contains generator and
power system events at the system fundamental frequency (NFREQ setting).

1,IASF,Am,,A,2000.0,0,0,0,3.4028235E38,2000.0,1,P
2,IASF,Aa,,deg,1,0,0,-180,180,1,1,P
3,IBSF,Bm,,A,2000.0,0,0,0,3.4028235E38,2000.0,1,P
4,IBSF,Ba,,deg,1,0,0,-180,180,1,1,P
5,ICSF,Cm,,A,2000.0,0,0,0,3.4028235E38,2000.0,1,P
6,ICSF,Ca,,deg,1,0,0,-180,180,1,1,P
7,IATF,Am,,A,1000.0,0,0,0,3.4028235E38,1000.0,1,P
8,IATF,Aa,,deg,1,0,0,-180,180,1,1,P
9,IBTF,Bm,,A,1000.0,0,0,0,3.4028235E38,1000.0,1,P
114 Analog Channels
.
.
.
111,ANA17,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
112,ANA18,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
113,ANA19,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
114,ANA20,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
1,TLED_8,,,0
2,TLED_7,,,0
3,TLED_6,,,0
4,TLED_5,,,0
5,TLED_4,,,0
6,TLED_3,,,0
7,TLED_2,,,0
8,TLED_1,,,0
9,TLED_16,,,0
240 Digital Points
.
.
.
237,21PZ2TC,,,0
238,21PZ1TC,,,0
239,21PRCA2,,,0
240,21PRBC2,,,0

1
400,201 400 = Sample Rate (400 Hz)

201 = Samples in the Report (LER x Sample Rate)
FLOAT32
1
0,-8
0,0
Figure 7.27 COMTRADE .CFG File Data for Filtered 2.5 ms Resolution Data
a
If ERDIG is set to S, the digital points are all the Relay Word bits set in ERDG as well as the Relay Word bits that are always included in the
Disturbance Recording Data Oscillography

Disturbance recording data (DR) are available when the relay report setting EDR
is set to Y. The relay stores disturbance event information in nonvolatile memory.
Disturbance, high-resolution, and filtered event data are recorded in parallel. Dis-
turbance data includes the same analogs as LR data as specified in the Event
Reporting Analog Quantities in Report settings. Refer to the .CFG file in
Figure 7.28. All disturbance event reports are stored at 50 Hz resolution. Report
setting DRLER determines the length of the stored event report. The relay can
store approximately 20 minutes of disturbance event report data, corresponding
to 4 stored events at the maximum DRLER setting of 300 seconds, or approxi-
mately 20 stored events at the minimum DRLER setting of 60 seconds. The

Reporting
length of time reserved within the stored disturbance event report for the capture
of pre-trigger (pre-fault) data are adjusted by the report setting DRPRE with a
range of 30 to 24 seconds less than the DRLER setting. Disturbance event report
memory can be cleared along with event report memory on a port-by-port basis.

1,I2GP,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
2,VG3FM,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
3,VG3FA,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
4,VNFM,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
5,VNFA,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
6,25ANGS,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
7,25SLIPS,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
8,78GCN,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
9,3PGF,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
10,3QGF,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
11,REFGEN,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
20 Analog Channels
12,REFSYS,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
13,ANA13,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
14,ANA14,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
15,ANA15,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
16,ANA16,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
17,ANA17,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
18,ANA18,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
19,ANA19,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
20,ANA20,,,,1,0,0,-3.4028235E38,3.4028235E38,1,1,P
1,TLED_8,,,0
2,TLED_7,,,0
3,TLED_6,,,0
4,TLED_5,,,0
5,TLED_4,,,0
6,TLED_3,,,0
7,TLED_2,,,0
8,TLED_1,,,0
9,TLED_16,,,0
240 Digital Points
.
.
.
237,21PZ2TC,,,0
238,21PZ1TC,,,0
239,21PRCA2,,,0
240,21PRBC2,,,0

1
50,3000 50 = Sample Rate (50 Hz)

3000 = Samples in the Report (DRLER setting x Sample Rate)
FLOAT32
1
0,-8
0,0
Figure 7.28 COMTRADE .CFG File Data for Filtered 20 ms Resolution Data
a
If ERDIG is set to S, the digital points are all the Relay Word bits set in ERDG as well as the Relay Word bits that are always included in the
Event Reports, Event Summaries, and Event Histories

See Section 9: Reporting in the SEL-400 Series Relays Instruction Manual for an
overview of event reports, event summaries, and event histories. This section
describes the characteristics of these that are unique to the SEL-400G.

Reporting
Base Set of Relay Word Bits

The following Relay Word bits are always included in 8-kHz oscillography and
disturbance event reports: TLED_1, TLED_9, TLED_17, TRIP01, TRIP02,
TRIP03, TRIP04, TRIP05, TRIP06, TRIP07, TRIP08, TRIPS, BFITS, CLSS,
52CLS, REF, 21PAB1P, 21PZ1T, 25CS, 24D11, 32P01, 46Q11, 40Z1T, 40Z2T,
40P1T, 40P2T, 59VPS, 64G1T, 64G2T, 64G3T, 64GT, 78OST, BSYNBKS,
CON1, CON2, FREQOKG, INADTS, LPSEC, LOPZ, ONLINE.
Event Summary
You can retrieve a summary version of stored event reports as event summaries.
These short-form reports present vital information about a triggered event. The
relay generates an event in response to power system faults and other trigger
events. See Figure 7.29 for a sample event summary.
Relay 1 Date: 02/03/2020 Time: 12:10:45.327

Report Header
Event: 87 ZONE 2 Time Source: OTHER
Event Number: 10001 Group: 1
Targets: TLED_2 TLED_13 TLED_14 TLED_15 TLED_16
Event Information
Generator Frequency (Hz): 60.000 System Frequency (Hz): 60.000
Breaker S: OPEN Trip Time: 12:10:45.327 Breaker Status

Fault Analog Data
IAS IBS ICS IAT IBT ICT IAU IBU ICU

MAG(A) 15308 13549 15091 1530 1356 1508 45966 40637 45338
ANG(DEG) -0.6 -117.8 126.6 -0.5 -117.9 126.7 -3.9 -121.2 123.3
IAW IBW ICW IAX IBX ICX IY1 IY2 IY3

MAG(A) 5 2 5 3 8 3 383 338 378
ANG(DEG) -117.0 -37.7 135.1 8.0 -94.9 -105.7 -0.6 -121.4 123.3
VAV VBV VCV VV1 VV2 VV3

MAG(kV) 0 0 0 11 9 11
ANG(DEG) 0.0 0.0 0.0 -3.3 -120.4 123.7
Fault Data
VAZ VBZ VCZ VZ2
MAG(kV) 11 9 11 0.0000
ANG(DEG) -3.3 -120.4 123.7 0.0
87 Differential Current Magnitudes (pu)

IOPA IRTA IOPB IRTB IOPC IRTC
ZONE 1 0.00 0.00 0.00 0.00 0.00 0.00
ZONE 2 7.65 7.65 6.78 6.78 7.54 7.54
87 RMS Differential Currents (pu)

IOPRA IOPRB IOPRC
ZONE 1 0.01 0.00 0.01
ZONE 2 3.25 3.01 2.95
Figure 7.29 Sample Event Summary Report
The event summary contains the following information:

➤ Standard report header
➢ Relay and terminal identification
➢ Event date and time
➤ Event type
➤ Time source (HIRIG or OTHER)
➤ Event number
➤ System frequency
➤ Active group at trigger time
➤ Targets
➤ Circuit breaker trip and close times; and auxiliary contact(s) status

Reporting
➤ Fault voltages, currents, sequence current, and operate and restraint

currents (from the event report row with the largest current)
➤ MIRRORED BITS communications channel status (if enabled)
The relay derives the summary target information and circuit breaker trip and
close times from the rising edge of relevant Relay Word bits during the event. If
no trip or circuit breaker element asserted during the event, the relay uses the last
row of the event.
The information in the summary portion of the event report is the same informa-
tion in the event summary.
The SEL-400G reports the event type and Table 7.17 lists event types in fault
reporting priority. Differential and restricted earth fault indications have reporting
priority over other fault events. For example, you can trigger an event when there
is no fault condition on the power system by using the TRI command. In this
case, when there is no fault, the relay reports the event type as TRIG. Consider
assigning normally open and normally closed indications of the generator breaker
to the ER equation. This will trigger an event report whenever the breaker
changes state. Implementation of cross-triggering between relays through use of
the ER equation is another good practice.
Table 7.17 Event Types
Event Description
87 ZONE 1, 87 ZONE 2, Differential elements involvement for event reports generated by

REF 87Z1 or 87Z2. REF is the OR combination of REFF1, REFF2,
and REFF3
EX TRIP Rising edge of TRIPEX
PM TRIP Rising edge of TRIPPM
AUX TRIP Rising edge of TRIPAUX
TRIP Rising edge of Relay Word bit TRIP
ER (event report trigger) Rising edge of ER (SELOGIC control equation)
TRIG Execution of the TRIGGER (TRI) command (manually triggered)
Event History
The event history gives you a quick look at recent relay activity. The relay labels
each new event with a unique number from 10000 to 42767. (At 42767, the top of
the numbering range, the relay returns to 10000 for the next event number and
then continues to increment.)
The event history contains the following:
➤ Standard report header
➢ Relay and terminal identification
➢ Date and time of report
➤ Event number
➤ Event date and time
➤ Event type
➤ Active group at the trigger instant
➤ Targets

Reporting
The event types in the event history are the same as the event types in the event
summary (see Table 7.17 for event types). The event history report indicates
events stored in relay nonvolatile memory. The relay places a blank row in the
history report output; items that are above the blank row are available for viewing
(use the HIS command). Items that are below the blank row are no longer in relay
memory; these events appear in the history report to indicate past power system
performance.
The relay does not ordinarily modify the numerical or time order in the history
report. However, if an event report is corrupted (power was lost during storage,
for example), the relay lists the history report line for this event after the blank row.

Instruction Manual
S E C T I O N 8
Settings
Section 12: Settings in the SEL-400 Series Relays Instruction Manual describes
common platform settings. This section contains tables of relay settings for the
SEL-400G Advanced Generator Protection System.
WARNING The relay hides some settings based upon the state of other settings. For example,
Isolate the relay trip circuits while if you set an enable setting to OFF (disabling the function), the relay hides all set-
changing settings. When changing settings associated with that function.
tings for multiple classes, it is possible
to be in an intermediate state that will
cause an unexpected trip. The settings prompts in this section are similar to the ASCII terminal and SEL
Grid Configurator Software prompts. Prompts in this section are unabbreviated
and show all possible setting options.
For information on using settings in protection and automation, see the examples
in Section 6: Protection Application Examples. The section contains information
on the following settings classes.
➤ Alias Settings on page 8.1
➤ Global Settings on page 8.2
➤ Monitor Settings on page 8.7
➤ Group Settings on page 8.10
➤ Automation Freeform SELOGIC Control Equations on page 8.29
➤ Output Settings on page 8.29
➤ Front-Panel Settings on page 8.29
➤ Report Settings on page 8.32
➤ Port Settings on page 8.32
➤ Modbus Settings—Custom Map on page 8.33
➤ DNP3 Settings—Custom Maps on page 8.33
➤ Notes Settings on page 8.33
➤ Bay Settings on page 8.33
Alias Settings
See Section 12: Settings in the SEL-400 Series Relays Instruction Manual for a
complete description of alias settings. Table 8.1 lists the default alias settings for
the SEL-400G.
Table 8.1 Default Alias Settings
Label Default Value
EN RLY_EN

8.2 Settings
Global Settings
Global Settings
Table 8.2 Global Setting Categories
Settings Reference
General Global Settings Table 8.3

Global Enables Table 8.4
Control Inputs (Global) Table 8.5
Interface Board #1 Control Inputs Table 8.6
Settings Group Selection Table 8.9
Synchronized Phasor Configuration Settings Table 8.10
Time and Date Management Table 8.16
Data Reset Controls Table 8.17
DNP Table 8.19
Table 8.3 General Global Settings
Setting Prompt Default Value
SID Station Identifier (40 characters) Station A

RID Relay Identifier (40 characters) Relay 1
CONAM Company Name (5 characters) abcde
NFREQ Nominal System Frequency (50, 60 Hz) 60
PHROT System Phase Rotation (ABC, ACB) ABC
Table 8.4 Global Enables
Default
Setting Prompt
Value
EICIS Independent Control Input Settings (Y, N) N

EPMU Synchronized Phasor Measurement (Y, N) N
a, b
EINVPOL Enable Invert Polarity (OFF or combo of terminals) OFF
a Any combination of Terminals V, Z, S, T, U, W, X, or Y and A-, B-, or C-Phases, or Terminals V and Y
and Inputs 1, 2, or 3. For example, EINVPOL := SA, SB, X, Y3 and CTCONY = 1PH inverts the
polarity of the A- and B-Phases for Terminal S, all phases for Terminal X, and Input 3 for
Terminal Y.
b Cannot set from front-panel HMI.
Make Table 8.5 settings when Global enable setting EICIS := N.

Settings 8.3
Global Settings
Table 8.5 Control Inputs
Default
Setting Prompt Increment
Value
IN2XXDa Int Board #1 Debounce Time (0.0–30 ms) 2 0.5

b
IN3XXD Int Board #2 Debounce Time (0.0–30 ms) 2 0.5
c
IN4XXD Int Board #3 Debounce Time (0.0–30 ms) 2 0.5
a
Setting applies to all the Interface Board #1 input contacts.
b Setting applies to all the Interface Board #2 input contacts.
c
Setting applies to all the Interface Board #3 input contacts.
Make Table 8.6 settings for Interface Board #1 when Global enable setting
EICIS := Y.
Table 8.6 Interface Board #1 Control Inputs
Default
Value
IN201PU Input IN201 Pickup Delay (0.0–30 ms) 2a 0.5

a
IN201DO Input IN201 Dropout Delay (0.0–30 ms) 2 0.5
• • • •
• • • •
• • • •
IN2mmPUb Input IN2mm Pickup Delay (0.0–30 ms) 2a 0.5
b a
IN2mmDO Input IN2mm Dropout Delay (0.0–30 ms) 2 0.5
a Set to Global setting IN2XXD when EICIS := N.
b
mm is the number of available input contacts on the interface board.
EICIS := Y.
Table 8.7 Interface Board #2 Control Inputs
Default
Value

a
• • • •
• • • •
• • • •
b
IN3mmDO Input IN3mm Dropout Delay (0.0–30 ms) 2a 0.5
b mm is the number of available input contacts on the interface board.
EICIS := Y.
Table 8.8 Interface Board #3 Control Inputs (Sheet 1 of 2)
Default
Value

a

8.4 Settings
Global Settings
Table 8.8 Interface Board #3 Control Inputs (Sheet 2 of 2)
Default
Value
• • • •
• • • •
• • • •
IN4mmDOb Input IN4mm Dropout Delay (0.0–30 ms) 2a 0.5
b mm is the number of available input contacts on the interface board.
Table 8.9 Settings Group Selection
Default
Setting Prompt
Value
SS1 Select Setting Group 1 (SELOGIC Equation) NA

TGR Group Change Delay (0–1500 s) 4.5
Table 8.10 Synchronized Phasor Configuration Settings
Default
Settinga, b Prompt
Value
NUMPHDC Number of Data Configurations (1–5) 1

c
MRATEq Messages per Second (1, 2, 4, 5, 10, 12, 15, 20, 30, 60) 2
PMAPPq PMU Application (P, M) P
PMSTNq Station Name (16 characters) STATION A
PMIDq PMU Hardware ID (1–65534) 1
PHVI1qm
PHSWqm
PHVI2qm
a
q = 1–5 (determined by NUMPHDC).
b m = 1–8
c
If NFREQ = 50, then the range is 1, 2, 5, 10, 25, 50.
Phasors Included in the Data q

Terminal Name, Relay Word Bit, Alternate Terminal Name
Specify the terminal for synchrophasor measurement and transmission in the syn-
chrophasor data stream q.
This is a freeform setting category for enabling the terminals for synchrophasor
measurement and transmission. This freeform setting has three arguments. Spec-
ify the terminal name (any one of S, T, U, V, W, X, Y, or Z) for the first argument.
Specify any Relay Word bit for the second argument. Specify the alternate termi-
nal name (any one of S, T, U, V, W, X, Y, or Z) for the third argument.

Settings 8.5
Global Settings
The second and third arguments are optional unless switching between terminals
is required. Whenever the Relay Word bit in the second argument is asserted the
terminal synchrophasor data are replaced by the alternate terminal data.
Table 8.11 Phasors Included in the Data q
Default
Settinga Prompt
Value
PHDVq Phasor Data Set, Voltages (V1, PH, ALL)b V1

b
PHDIq Phasor Data Set, Currents (I1, PH, ALL) ALL
PHNRq Phasor Num. Representation (I = Integer, F = Float) I
PHFMTq Phasor Format (R = Rectangular, P = Polar) R
FNRq Freq. Num. Representation (I = Integer, F = Float) I
a q = 1–5 (determined by NUMPHDC setting).
b
When MFRMT = FM, then range is (V1, ALL).
Phasor Aliases in Data Configuration q

Phasor Name, Alias
This is a freeform setting category with two arguments. Specify the phasor name
and an optional 16-character alias to be included in the synchrophasor data
stream q. See Table 10.27 and Table 10.28 for a list of phasor names that the
PMU supports. The PMU can be configured for as many as 32 unique phasors for
each PMU configuration.
Table 8.12 Phasor Aliases in Data Configuration q
Default
Setting Prompt
Value
PMSPqeea, b Name of the Synchrophasor (Default Name of Any Synchro- (blank)

phasor)
PMSAqeea, b Alias of the Synchrophasor (16 characters) (blank)
a
q = 1–5 (determined by NUMPHDC setting).
b
ee = 1–32.
From a terminal emulation program, the setting name is now shown and a
freeform settings line appears after a prompt. In Grid Configurator, the setting
name is shown and a field is available to enter the setting.
Synchrophasor Analog Quantities in Data Configuration q
Analog Quantity Name, Alias Name
This is a freeform setting category with two arguments. Specify the analog quan-
tity name or its alias to be included in the synchrophasor data stream q (see
Section 12: Analog Quantities for a list of analog quantities that the PMU sup-
ports). Optionally provide an alias name to use in the synchrophasor configura-
tion message. The PMU can be configured for as many as 16 unique analog
quantities for each data configuration q. The analog quantities are floating-point
values, so each analog quantity the PMU includes will take four bytes.
From a terminal emulation program, the setting name is not shown and a
freeform settings line appears after a prompt. In Grid Configurator, the setting
name is shown and a field is available to enter the setting.
Synchrophasor Digitals in Data Configuration q
Digital Name, Alias Name
This is a freeform setting category with two arguments. Specify the Relay Word
bit name or its alias that you need to include in the synchrophasor data stream q
(see Section 11: Relay Word Bits for a list of Relay Word bits that the PMU sup-

8.6 Settings
Global Settings
ports). Optionally, include an alias name as the second parameter to use the syn-
chrophasor configuration message. You can configure the PMU for as many as 64
unique digitals for each data configuration q.
Table 8.13 Synchronized Phasor Configuration Settings Part 2
Default
Value
TREA[4] Trigger Reason Bit [4] (SELogic Equation) NA

PMTRIG Trigger (SELogic Equation) NA
PMTEST PMU in Test Mode (SELogic Equation) NA
VkCOMPa Comp. Angle Terminal k (–179.99° to 180°) 0.00 0.01
b
InCOMP Comp. Angle Terminal n (–179.99° to 180°) 0.00 0.01
PMFRQST PMU Primary Frequency Source Terminal (V, Z) V
a k = V and Z.
b n = S, T, U, W, X, Y.
Table 8.14 Synchronized Phasor Recorder Settings
Default
Setting Prompt
Value
EPMDR Enable PMU Data Recording (Y, N) N

SPMDR Select Data Configuration for PMU Recording (1–NUMPHDC) 1
PMLER Length of PMU Triggered Data (2–120 s) 30
PMPRE Length of PMU Pre-Triggered Data (1–20 s) 5
Table 8.15 Synchronized Phasor Real-Time Control
Default
Value
RTCRATE Remote Messages Per Second 2

(1, 2, 5, 10, 25, or 50 When NFREQ := 50)
(1, 2, 4, 5, 10, 12, 15, 20, 30, or 60 When NFREQ := 60)
MRTCDLY Maximum RTC Synchrophasor Packet Delay (20–1000 ms) 500 1
Table 8.16 Time and Date Management
Default
Setting Prompt
Value
DATE_F Date Format (MDY, YMD, DMY) MDY

a
IRIGC IRIG-B Control Bits Definition (None, C37.118) None
b
UTCOFF Offset From UTC to Local Time (–15.5 to 15.5) –8.0
c
BEG_DST Begin DST (hh, n, d, mm, or OFF) “2, 2, 1, 3”
END_DST End DST (hh, n, d, mm) “2, 1, 1, 11”
a When EPMU = Y and MFRMT = C37.118, IRIGC is forced to C37.118.
b
All data, reports, and commands from the relay are stored and displayed in local time, referenced
to an internal UTC master clock. Use the UTCOFF setting to specify the time offset from UTC
time reference with respect to the relay location. (The only data still displayed in UTC time is
streaming synchrophasor and IEC 61850 data.)
c
The BEG_DST (and END_DST) daylight-saving time setting consists of four fields or OFF:
hh = local time hour (0–23); defines when daylight-saving time begins.
n = the week of the month when daylight-saving time begins (1–3, L); occurs in either the first,
second, third, or last week of the month.
d = day of week (1–7); Sunday is the first day of the week.
mm = month (1–12).
OFF = hides the daylight-saving time settings.

Settings 8.7
Monitor Settings
Table 8.17 Data Reset Control
Default
Setting Prompt
Value
RST_DEM Reset Demand Metering (SELogic Equation) NA

RST_PDM Reset Peak Demand Metering (SELogic Equation) NA
RST_ENE Reset Energy Metering (SELogic Equation) NA
RSTTRGT Target Reset (SELogic Equation) NA
RSTDNPE Reset DNP Fault Summary Data (SELogic Equation) TRGTR
RST_HAL Reset Warning Alarm Pulsing (SELogic Equation) NA
Table 8.18 Access Control
Default
Setting Prompt
Value
EACC Enable ACC access level (SELogic Equation) 1

E2AC Enable ACC–2AC access levels (SELogic Equation) 1
Table 8.19 DNP
Default
Setting Prompt
Value
EVELOCK Event Summary Lock Period (0–1000 s) 0

DNPSRC DNP Session Time Base (LOCAL, UTC) UTC
Monitor Settings
Table 8.20 Monitor Setting Categories
Settings Reference
Enables Table 8.21

Station DC Monitor Table 8.22
Breaker Monitor Settings Table 8.23
IEC Thermal (49) Elements Table 8.24
Thermal Ambient Compensation Table 8.25
Table 8.21 Enables
Default
Value
EDCMON Station DC Battery Monitor (Y, N) N

a
BK_SEL Breaker Selection (OFF or combo of S, T, U, Y) S
ERTD Enable Temperature Source (OFF or combo of A, OFF
B, C)
EBMON Enable BK Monitoring (OFF or combo of S, T, U, Y)a OFF
b
E49RTD Enable Remote Temperature Elements (N, 1–12) N 1
ETHRIEC Enable IEC Thermal Element (N, 1–3) N 1
a “Combo” means “combination of”; enter these “combo” settings delimited with either commas
or spaces.
b
Hide and force to default if ERTD = OFF.

8.8 Settings
Monitor Settings
Make the settings in Table 8.22 if EDCMON = Y.
Table 8.22 Station DC Monitor
Default
Value
DCLFP Low Level Fail Pickup (OFF, 15–300 Vdc) 100 1

DCLWP Low Level Warn Pickup (OFF, 15–300 Vdc) 127 1
DCHWP High Level Warn Pickup (OFF, 15–300 Vdc) 137 1
DCHFP High Level Fail Pickup (OFF, 15–300 Vdc) 142 1
DCRP Peak-to-Peak AC Ripple Pickup (1–300 Vac) 9 1
DCGF Ground Detection Factor (1.00–5.00) 1.05 0.01
RST_BAT Reset Battery Monitoring (SELogic Equation) NA
Table 8.23 Breaker Monitor Settings
Default
Settinga Prompt Increment
Value
Bm_ID Breaker m Identifier (40 characters) Breaker m

52A_m NO Contact Input—BKm (SELogic Equation) NA
52B_m NC Contact Input—BKm (SELogic Equation) NA
52D_m BKm Transition Delay (0.0500–0.2 s) 0.1 0.0025
BMmTRP Breaker Monitor Trip—BKm (SELogic Equation) TRIPm
BMmCLS Breaker Monitor Close—BKm (SELogic Equation) CLSm
BmCOSP1 Close/Open Set Point 1—BKm (1–65000 Operations) 1000 1
BmKASP1b kA Interrupted Set Point 1—BKm (1.0–999 kA) 20.0 0.1
BmKASP2 kA Interrupted Set Point 2—BKm (1.0–999 kA) 60.0 0.1
b
BmKASP3 kA Interrupted Set Point 3—BKm (1.0–999 kA) 100.0 0.1
BmBCWAT Contact Wear Alarm Threshold—BKm (0–100%) 90 0.1
BmESTRT Electrical Slow Trip Alarm Threshold—BKm (1–999 ms) 50 1
BmESCLT Electrical Slow Close Alarm Threshold—BKm 120 1
(1–999 ms)
BmMSTRT Mechanical Slow Trip Alarm Threshold—BKm 50 1
(1–999 ms)
BmMSCLT Mechanical Slow Close Alarm Threshold—BKm 120 1
(1–999 ms)
BmITAT Inactivity Time Alarm Threshold—BKm 365 1
(N, 1–9999 days)
BmMRTIN Motor Run Time Contact Input—BKm (SELogic Equa- NA
tion)
BmMRTAT Motor Run Time Alarm Threshold—BKm (1–999 s) 25 1
BmKAIAT kA Interrupt Capacity Alarm Threshold—BKm 90 0.1
(N, 1–100%)
BmMKAI Maximum kA Interrupt Rating—BKm (1–999 kA) 50 1
RST_BKm Reset Monitoring Breaker m (SELogic Equation) PLT04
a
m = S, T, U, Y.
b The ratio of settings BmKASP3/BmKASP1 must be in the range: 5 BmKASP3/BmKASP1  100.

Settings 8.9
Monitor Settings
Make the settings in Table 8.24 if ETHRIEC := 1, 2, or 3.
Table 8.24 IEC Thermal (49) Elements
THRO1 Thermal Model 1 Operating Quantity I1GMB

THRO2 Thermal Model 2 Operating Quantity IMAXSR
THRO3 Thermal Model 3 Operating Quantity IMAXSR
IBAS1 Basic Current Value in PU 1 (0.1–3) 1.1
IEQPU1 Eq. Heating Current Pick Up Value in PU 1 (0.05–1) 0.05
KCONS11 Basic Cur. Correction Factor 1 State 1 (0.50–1.5) 1
TCONH11 Heating Thermal Time Cons 1 State 1 (1–500 min) 60
TCONC11 Cooling Thermal Time Cons 1 State 1 (1–500 min) 60
THLA1 Thermal Level Alarm Limit 1 (1.00–100%) 50
THLAR1 Thermal Level Alarm Reset Ratio 1 (0.50–1) 0.98
THLT1 Thermal Level Trip Limit 1 (1.00–100%) 80
THLTR1 Thermal Level Alarm Reset Ratio 1 (0.50–1) 0.98

8.10 Settings
Group Settings
Table 8.25 Thermal Ambient Compensation
TAMB1 Amb Temp. Meas. Probe 1 (NA, RTS01–24, RTC01–24) NA

DAMB1 Default Ambient Temperature 1 (–50 to 100 C) 25
AMBRTF1 Default Temp if Amb Temp RTD Fails 1 (BUFF, SET) SET
TMAX1 Maximum Temperature of the Equipment 1 (80–300 C) 155
Group Settings
Table 8.26 Group Setting Categories (Sheet 1 of 2)
Settings Reference
Relay Configuration Table 8.27

Current Transformer Data Table 8.28
Potential Transformer Data Table 8.29
Power System Data Table 8.30
Frequency Tracking Sources Table 8.31
Pumped Storage Table 8.32
Current Transformer Polarity Terminal Selection Table 8.33
Zone 1 and Zone 2 Differential Element Configuration Table 8.34
Restricted Earth Fault Element Table 8.35
Restricted Earth Fault 50 Element Table 8.36
Restricted Earth Fault 51 Element Table 8.37
Breaker n Inadvertent Energization Protection Logic Table 8.38
a
Volts Per Hertz Element a Table 8.39
Volts Per Hertz Element a Level 2 Definite Time Table 8.40
b
Volts Per Hertz Element a Level 2, User-Defined Curve h Table 8.41
Synchronism-Check (25) Elements Table 8.42
Breaker n Synchronism-Check (25) Table 8.43
Autosynchronism Check Configuration (25A) Table 8.44
Breaker n Autosynchronism Check (25A) Table 8.45
Undervoltage (27) Elements Table 8.46
Overpower (32) Elements Table 8.47
Underpower (32) Elements Table 8.47

Settings 8.11
Group Settings
Table 8.26 Group Setting Categories (Sheet 2 of 2)
Settings Reference
Impedance Based Loss of Field (40Z) Element Table 8.48

PQ-Based Loss-of-Field (40P) Element Table 8.49
Current Unbalance (46) Elements 1 and 2 Table 8.50
Terminal n Overcurrent Elements Table 8.51
Terminal n Phase Overcurrent Element Level c Table 8.52
Terminal n Negative-Sequence Overcurrent Element Level c Table 8.53
Terminal n Zero-Sequence Overcurrent Element Level c Table 8.54
Terminal n Directional (67) Elements Table 8.55
Inverse Time Overcurrent Elements 1–12 Table 8.56
Overvoltage (59) Elements Table 8.57
Split Phase (60P) Element Table 8.58
Stator Ground (64G) Element Table 8.59
Field Ground (64F) Element Table 8.60
Stator Ground (64S) Element Table 8.61
Out-of-Step (78) Element Table 8.62
Frequency (81) Elements Table 8.63
Rate-of-Change-of-Frequency (81R) Elements Table 8.64
Accumulated Frequency (81A) Elements Table 8.65
Pole Open Detection Table 8.66
System Backup Protection Table 8.67
Phase Distance (21P) Element Table 8.68
Voltage-Controlled Time-Overcurrent (51C) Element Table 8.69
Voltage-Restrained Time Overcurrent (51V) Element Table 8.70
Load Encroachment Table 8.71
Loss of Potential Table 8.72
Breaker Failure Logic Table 8.73
Breaker n Failure Logic Table 8.74
Breaker n Flashover Logic Table 8.75
Demand Metering Elements Table 8.76
Max/Min Metering Elements Table 8.77
Online Logic Table 8.78
Trip Logic Table 8.79
Close Logic Table 8.80
a a = 1–2.
b h = 1 or 2.
Table 8.27 Relay Configuration (Sheet 1 of 2)
Default
Value
EADVS Advanced Settings (Y, N) N

EPS En. Pump Storage (OFF or combo of S, T, U, W, X, Y, V, OFF
Z)

8.12 Settings
Group Settings
Table 8.27 Relay Configuration (Sheet 2 of 2)
Default
Value
EGNPT Enable Gen Neut Volt Term (OFF, V2, Z2) V2

ESYSPT Enable Sys Volt Term (OFF, V, or combo of V1,V2,V3) V1
EGNCT Enable Gen Neut Cur Terms (Combo of X, Y) X
ESYSCT Enable System Cur Terms (OFF or combo of S, T, U, Y) S,T
EPCAL En. Power Calc Term (OFF or combo of S, T, U, Y) S
E24 Enable Volts per Hertz Elements (N, 1–2) 2
E25 Enable Synch. Check (OFF or combo of S, T, U, Y) S
E27 Enable Under Voltage Elements (N, 1–6) N 1
E32 Enable Directional Power (N, 1–4) 1 1
E40 Enable Loss of Field (OFF or combo of Z, P) Z
E46 Enable Current Unbalance Elements (N, 1–2) 1 1
E50 Enable 50 Elements (OFF or combo of S, T, U, Y) OFF
E51 Enable Inverse Time Overcurrent Elements (N, 1–12) N 1
E59 Enable Over Voltage Elements (N, 1–6) 1 1
a, b
E60P Enable 60P Split Phase Element (N, S, T, U, W, X, Y ) N
E60N Enable 60N Split Phase Element (N, Y1, Y2, Y3) N
E64G Enable 64G Element (OFF or combo of G1, G2, G3) G1, G3
E64F Enable 64F Field Ground Element (Y, N) N
E64S Enable 64S Stator Ground Element (Y, N) N
E67 Enable 67 Dir. Elements (OFF or combo of S, T, U, Y) OFF
E78 Enable Out-of-Step Element (N, 1B, 2B) 1B
E81 Enable Frequency Elements (N, 1–6) 2 1
E81A Enable Accumulated Freq Elements (N, 1–8) N 1
E81R Enable Rate of Change of Freq Elements (N, 1–6) N 1
E87 Enable Differential Elements (N, 1–2) 2 1
EREF Enable REF Element (OFF or combo of Y1, Y2, Y3) Y1 1
EINAD Enable Inad. Ener. Prot. (OFF or combo of S, T, U, Y) S
EPO Enable Pole Open (OFF or combo of S, T, U, Y) S,T
ELOAD Load Encroachment (Y, N) N
ELOP Enable Loss of Potential (OFF or combo of V, Z) Z
EBFL Enable Brkr Fail. Prot. (OFF or combo of S, T, U, Y) S,T
EBFO Enable Brkr Flash Ovr. (OFF or combo of S, T, U, Y) S
EBUP Enable System Backup Protection (N, 51C, 51V, 21P) 21P
EDEM Enable Demand Metering (N, 1–10) N 1
EMXMN Enable Max/Min Metering (N, 1–30) 12 1
a W is unavailable if EGNCT contains W.
X is unavailable if EGNCT contains X.
b
m is unavailable if ESYSCT contains m, where m = S, T, U, or Y.

Settings 8.13
Group Settings
Table 8.28 Current Transformer Data
Default
Value
CTCONY CT connection for Term Y (1PH, Y) 1PH

a
CTRn CT Ratio Term n (OFF, 1.0–50000) 12000 0.1
b
CTRYx CT Ratio Term Yx (OFF, 1.0–50000) 100 0.1
a
n = S, T, U, W, X, Y.
b x = 1, 2, 3.
Table 8.29 Potential Transformer Data
Default
Value
PTCONV PT connection for Term V (OFF, Y, D, D1, 1PH) 1PH

PTCONZ PT connection for Term Z (Y, D, D1) Y
a
PTRk PT Ratio Term k (1.0–10000) 200.0 0.1
a
VNOMk PT Nom. Voltage (L-L) Term k (30.00–300 V, sec) 110.00 0.01
b
PTRb PT Ratio Term b (OFF, 1.0–10000) 200.0 0.1
b
VNOMb PT Nom. Voltage (L-L) Term b (30.00–300 V, sec) 110.00 0.01
a
k = V, Z.
b
b = V1, V2, V3, Z2.
Table 8.30 Power System Data
Default
Value
MVAGEN Generator Max. MVA (1–5000 MVA) 555 1

KVGEN Generator L-L Voltage (1.00–100 kV) 24 0.01
XDGEN Generator D-Axis Synch Reactance (0.100–4) 1.81 0.001
XTXFR Transformer Leakage Reactance (0.010–10) 0.042 0.001
XESYS Equivalent System Reactance (0.010–10) 0.2 0.001
Table 8.31 Frequency Tracking Sources
Default
Value
FTSRCna Frequency Source for Current Term n (G, S) G

b
FTSRCYx Frequency Source for Current Term Yx (G, S) G
c
FTSRCk Frequency Source for Voltage Term k (G, S) G
FTSRCVx Frequency Source for Voltage Term Vx (G, S) G
a n = S, T, U, W, X, Y.
b
x = 1–3.
c k = V, Z.
Table 8.32 Pumped Storage
Default
Value
PSPHREV Transposed Phases (AB, BC, CA) BC

PSMODE Pumped Storage Mode Indication (SELOGIC Eqn) NA

8.14 Settings
Group Settings
Table 8.33 Current Transformer Polarity Terminal Selection
Default
Value
CTPna CT Polarity For Terminal n (P, N) P

a n = S, T, U, W, X, Y.
Table 8.34 Zone 1 and Zone 2 Differential Element Configuration (Sheet 1 of 2)
Default
Value
E87Zaa 87 Zone a Terminals (Combo of S, T, U, W, X, Y) W,X

a
E87XFRa 87 Zone a In-Zone Transformer (Y, N) N
E87Haa 87 Zone a Harm. Blk. & Restr. (Combo of B, BW, B
R, RW)
E87Uaa 87 Zone a En. Unres. Diff. (OFF or combo of F, OFF
R,W)
E87Qaa 87 Zone a Enable Neg. Seq. Differential (Y, E, N) N
a
87COREa 87 Zone a XFMR Core Type, Three or Single (T, S) T
a
E87UNBa 87 Zone a Enable Wave Shape Unblocking (Y, N) N
a, b
87nCTCa 87 Zone a Term. n CT Conn. Compensation (0–13) 0 1
a, b
87nANGa 87 Zone a Term. n Ang. Comp. (–179.99 to 180 deg) 30 0.01
a
MVAa 87 Zone a Transformer Max. MVA OFF 1
(OFF, 1–5000 MVA)
VTERMnaa, b 87 Zone a Term. n L-L Voltage (1.00–1000 kV) 275 0.01
a, b
87nTAPa 87 Zone a Term. n Current Tap (0.50–175 A, sec) 1 0.01
a
87EFDOa 87 Zone a External Fault Detect DO (0.0200–1.2 s) 1 0.0025
a
87P1a 87 Zone a Oper. Current Sensitive PU (0.10–4) 0.25 0.01
a
87P2a 87 Zone a Oper. Current Secure PU (0.10–4) 0.5 0.01
a
87SLP1a 87 Zone a Slope 1 Percentage (5.00–90%) 10 0.01
87SLP2aa 87 Zone a Slope 2 Percentage (5.00–90%) 75 0.01
87pSECaa, c 87 Zone a Switch to Secure (SELogic Eqn) CONpa
a
87RTCa 87 Zone a Restrained Element TC (SELogic Eqn) 1
a
87UPa 87 Zone a Unrestrained Element PU (1.00–20) 8 0.01
a
87UTCa 87 Zone a Unrestrained Element TC (SELogic Eqn) 1
a
87RMPa 87 Zone a RMS Element PU (OFF, 1.00–20) OFF 0.01
a
87RMTCa 87 Zone a RMS Element TC (SELogic Eqn) 1
a
87PCT2a 87 Zone a 2nd-Harmonic Percentage (OFF, 5–100%) OFF 1
87PCT4aa 87 Zone a 4th-Harmonic Percentage (OFF, 5–100%) OFF 1
87PCT5aa 87 Zone a 5th-Harmonic Percentage (OFF, 5–100%) OFF 1
a
87TH5Pa 87 Zone a 5th-Harmonic Alarm PU (OFF, 0.02–3.2) OFF 0.01
a
87TH5Da 87 Zone a 5th-Harmonic Alarm Delay (0.0000– 0.5 0.0025
200 s)
87QPaa 87 Zone a Neg. Seq. Operate Current PU (0.05–1) 0.3 0.01
a
87QSLPa 87 Zone a Neg. Seq. Slope (5–100%) 25 1

Settings 8.15
Group Settings
Table 8.34 Zone 1 and Zone 2 Differential Element Configuration (Sheet 2 of 2)
Default
Value
87QDaa 87 Zone a Neg. Seq. Delay (0.0000–200 s) 0.2 0.0025

a
87QTCa 87 Zone a Neg. Seq. TC (SELogic Eqn) NOT
87QBa
AND NOT
CONa
a
a = 1, 2.
b n = S, T, U, W, X, Y.
c
p = A, B, C.
Table 8.35 Restricted Earth Fault Element
Default
Value
REFRFaa Rest Qty REF a (OFF or combo of S, T, U, W, X, OFF

Y1, Y2, Y3)
REF50Gaa Residual Current Sensitivity Pickup (0.05–3) 0.25 0.01
a
TCREFa Torque Control REF Element a (SELogic Eqn) 1
a
a = 1–3.
Table 8.36 Restricted Earth Fault 50 Element
Default
Value
REF50Paa REF Op. Current Inst O/C a Pickup (OFF, OFF 0.01
0.25–100)
REF50Daa REF Inst O/C a Delay (0.0000–400 s) 0.2 0.0025
a
RF50TCa REF Inst O/C a Torque Cont (SELogic Eqn) 1
a
a = 1–3.
Table 8.37 Restricted Earth Fault 51 Element
Default
Value
REF51Paa REF Inv. Time O/C a PU (OFF, 0.25–16) OFF 0.01

a
REF51Ca REF Inv. Time O/C a Curve (U1–U5, C1–C5) U1
RF51TDaa REF Inv. Time O/C a Time Dial (0.50–15) 0.5 0.01
a
RF51RSa REF Inv. Time O/C a EM Reset (Y, N) N
a
RF51TCa REF Inv. Time O/C a Torque Cont (SELogic 1
Eqn)
a a = 1–3.
Table 8.38 Breaker n Inadvertent Energization Protection Logic
Setting Prompt Default Value Increment

a
INADIPn Inad. Ener. O/C PU –BKR n (0.25–10 A,sec) 1 0.01
a
INADVPn Inad. Ener. U/V PU –BKR n (1.00–300 V,sec) 10 0.01
a
INADTCn Inad. Ener. TC –BKR n (SELogic Equation) 3POn AND
NOT LOPZ
INADADna Inad. Ener. Arm. Dly. –BKR n (0.0000–100 s) 2 0.0025

8.16 Settings
Group Settings
Table 8.38 Breaker n Inadvertent Energization Protection Logic

a
INADDDn Inad. Ener. Disarm. Dly. –BKR n (0.0000–100 s) 1 0.0025
a
INADDn Inad. Ener. PU Delay –BKR n (0.0000–10 s) 0.25 0.0025
a
n = S, T, U, Y.
Table 8.39 Volts per Hertz Element a
24Oaa 24 Element a Operating Quantity VPMAXZF

a
24DaP1 24 Element a Level 1 Pick Up (100–200%) 110 1
24DaD1a 24 Element a Level 1 Time Delay (0.040– 10 0.005
6000 s)
24TCaa 24 Element a Torque Control (SELogic Eqn) 1
a
24CCSa 24 Element a Level 2 Comp. Curve (OFF, DD, OFF
U1, U2)
a
a = 1–2.
Table 8.40 Volts per Hertz Element a Level 2 Definite Time
Default
Value
24DaP21a 24 Element a Level 2 Pick Up 1 (100–200%) 105 1

a
24DaD21 24 Element a Level 2 Time Delay 1 (0.040–6000 s) 10 0.005
a
24DaP22 24 Element a Level 2 Pick Up 2 (101–200%) 110 1
a
24DaD22 24 Element a Level 2 Time Delay 2 (0.040–6000 s) 5 0.005
a
a = 1–2.
Table 8.41 Volts per Hertz Element a Level 2, User Defined Curve a
Default
Value
24UaTCa 24 Element a Curve a Torque Control (SELogic 1

Eqn)
24UaNPa 24 Element a No. of Point on User a Curve (3–20) 10 1
b
24Uaaii 24 Ele. a Cur. a, Pnt. [ii] (100–200%, 0.040–6000 s) 200, 400 1, 0.005
24Uaa1ii 200 1
24Uaa2ii 400 0.005
24UaCRa 24 Element a Curve a Reset Time (0.010–400 s) 0.01 0.005
a
a = 1, 2.
b
ii = 1–20.
Table 8.42 Synchronism Check (25) Reference
Default
Value
SYNCP Synch Reference (VAZ, VBZ, VCZ, VABZ, VBCZ, VABZ

VCAZ)

Settings 8.17
Group Settings
Table 8.43 Breaker n Synchronism Check (25)
Default
Value
SYNCSn Synch Source n (VAV, VBV, VCV, VABV, VBCV, VV1

VCAV, VV1, VV2, VV3)
KSnM Synch Source n Ratio Factor (0.10–3) 1 0.01
KSnA Synch Source n Angle Shift (–179.99 to 180 deg) 0 0.01
25VLn Voltage Window Low Thresh –BKn (20.0–200 V, 55 0.1
sec)
25VHn Voltage Window High Thresh –BKn (20.0–200 V, 70 0.1
sec)
25VDIFn Max. Voltage Difference –BKn (OFF, 1.0–15%) 5 0.1
25GVHIn Generator Voltage High Required –BKn (Y, N) Y
25SFBKn Maximum Slip Frequency –BKn (OFF, 0.005–0.5 Hz) 0.067 0.001
25ANGn Max. Ang. Diff. Uncompensated –BKn (3.0–80 deg) 5 0.1
25ADn Uncompensated Angle Delay –BKn (0.000–0.6 s) 0.16 0.005
25ANGCn Max. Ang. Diff. Compensated –BKn (3.0–80 deg) 5 0.1
TCLSBKn Breaker n Close Time (0.010–0.6 s) 0.085 0.005
25GFHIn Generator Frequency High Required –BKn (Y, N) Y
BSYNBKn Block Synchronism Check –BKn (SELogic Eqn) NA
CFANGn Close Failure Angle –BKn (OFF, 3.0–120 deg) 7 0.1
a
n = S, T, U, Y.
Table 8.44 Autosynchronism Check Configuration (25A)
Default
Value
25AVMOD 25A Voltage Control Pulse Mode (OFF, PW, FD, PF) OFF
25AVSLP 25A Voltage Control Slope (0.01–100 V/s) 1 0.01
25AVPER 25A Voltage Control Pulse Period (0.000–60 s) 10 0.005
25AVDUR 25A Voltage Control Pulse Duration (0.000–60 s) 2 0.005
25AFMOD 25A Frequency Control Pulse Mode (OFF, PW, FD, PF) OFF
25AFSLP 25A Frequency Control Slope (0.01–100 Hz/s) 1 0.01
25AFPER 25A Frequency Control Pulse Period (0.000–60 s) 10 0.005
25AFDUR 25A Frequency Control Pulse Duration (0.000–60 s) 2 0.005
25ACD 25A Control Expiration Delay (0.000–400 s) 30 0.005
Table 8.45 Breaker n Autosynchronism Check (25A)
Default
Value
25ASTn Start Auto-Sync. Check –BKn (SELogic Eqn) NA

25ACNn Cancel Auto-Sync. Check –BKn (SELogic Eqn) BSYNBKn
OR 52CLn
a
n = S, T, U, Y.

8.18 Settings
Group Settings
Table 8.46 Undervoltage (27) Elements 1–6
Default
Value
27Oxa U/V Element x Operating Quantity VNMINZF

a, b
27PxPa U/V Element x Level a PU (OFF, 2.00–300 V, sec) OFF 0.01
a, b
27PxCa U/V Element x Level a Curve (D, I) D
a, b
27PxDa U/V Element x Level a Delay (0.000–400 s) 10 0.005
27TCxa U/V Element x Torque Control (SELogic Eqn) 1
a x = 1–6.
b a = 1, 2.
Table 8.47 Directional Power (32) Element 01–04
Default
Value
32On Dir Power Element n Operating Quantity 3PGF

32MODn Dir Power Element n Operating Mode (U, O) O
32BIAn Dir Power Element n Bias (SELogic Eqn) NA
32ANGn Dir Power Element n Bias Angle (–5.00 to 1 0.01
5 deg)
32PPn Dir Power Element n PU (–2000.00 to –10.0 0.02
2000 VA, sec)
32RSn Dir Power Element n Inst Reset (Y, N) Y
32PDn Dir Power Element n Time Delay (0.000–400 s) 2 0.005
32TCn Dir Power Element n Torque Cont (SELogic 1
Eqn)
a n = 01–04.
Table 8.48 Impedance Based Loss of Field (40Z) Element
Default
Value
40ZaPa 40Z Zone a Mho Diameter (OFF,0.1–100 ohms, 13.4 0.1

sec)
40ZaXDa 40Z Zone a Off. Reactance (–50.0 to 50 ohms, –2.5 0.1
sec)
40ZaDa 40Z Zone a Time Delay (0.000–400 s) 0.25 0.005
a
40ZaTC 40Z Zone a Torque Ctrl (SELogic Eqn) NOT LOPZ
40Z2DIR 40Z Zone 2 Directional Sup. Ang. (–20.0 to –10 0.1
–5 deg)
a a = 1, 2.
Table 8.49 PQ-Based Loss-of-Field (40P) Element (Sheet 1 of 3)
Default
Value
E40PZ Enable 40P Zones (Combo of Z1, Z2, Z3, Z4) Z1, Z2
E40P2D Enable Zone 2 Dynamic Capability (Y, N) N
E40P4D Enable Zone 4 Dynamic Capability (Y, N) N
40PDAM 40P Dynamic Zone Analog Meas (SEL Math Eqn) RTS01TV

Settings 8.19
Group Settings
Default
Value
40PDAQ 40P Dynamic Zone Analog Quality (SELogic RTS01OK

Eqn)
40PDAMX 40P Analog Meas Max Curve (–99999.000 to 30.0 0.001
99999)
40PDAMN 40P Analog Meas Min Curve (–99999.000 to 50.0 0.001
99999)
40P1P 40P Zone 1 Pickup (–2000.00 to –1 VA, sec) –100 0.01
40P1D 40P Zone 1 Time Delay (0.000–400 s) 0.25 0.005
40P1TC 40P Zone 1 Torque Cont (SELogic Eqn) NOT LOPZ
40P1DIR 40P Zone 1 Directional Sup Ang (–30.0 to 30 deg) 10 0.1
40P2SEG 40P Zone 2 Segment shape (C,L) C
40PUP5 40P Zone 2 P Power Pt 5 (1.00–2000 VA, sec) 80 0.01
40PUQ5 40P Zone 2 Q Power Pt 5 (–2000.00 to 2000 VA, –60 0.01
sec)
40PUP6 40P Zone 2 P Power Pt 6 (1.00–2000 VA, sec) 40 0.01
40PUQ6 40P Zone 2 Q Power Pt 6 (–2000.00 to 0 VA, sec) –80 0.01
40PUQ7 40P Zone 2 Q Power Pt 7 (–2000.00 to –1 VA, sec) –100 0.01
40P2M 40P Zone 2 Margin from UEL (1.05–1.25) 1.2 0.01
40PK 40P Zone Voltage Coefficient (0–2) 2 1
40PUP5D 40P Z2 P Power Dyn Pt 5 (1.00–2000 VA, sec) 130 0.01
40PUQ5D 40P Z2 Q Power Dyn Pt 5 (–2000.00 to 2000 VA, –110 0.01
sec)
40PUP6D 40P Z2 P Power Dyn Pt 6 (1.00–2000 VA, sec) 90 0.01
40PUQ6D 40P Z2 Q Power Dyn Pt 6 (–2000.00 to 0 VA, sec) –130 0.01
40PUQ7D 40P Z2 Q Power Dyn Pt 7 (–2000.00 to –1 VA, sec) –100 0.01
40P2D 40P Zone 2 Time Delay (0.000–400 s) 0.5 0.005
40P3D 40P Zone 3 Time Delay (0.000–400 s) 10 0.005
40PUVP 40P U/V Element PU (OFF, 2.00–300 V, sec) OFF 0.01
40PAD 40P Accelerated Time Delay (0.000–400 s) 10 0.005
40P4SEG 40P Zone 4 Underexcited Segment Shape (C, L) C
40PQ1 40P Q Power Pt 1 (1.00–2000 VA, sec) 100 0.01
40PP2 40P P Power Pt 2 (1.00–2000 VA, sec) 40 0.01
40PQ4 40P Q Power Pt 4 (–2000.00 to 2000 VA, sec) 0 0.01
40PQ5 40P Q Power Pt 5 (–2000.00 to 2000 VA, sec) –60 0.01

8.20 Settings
Group Settings
Default
Value
40PQ6 40P Q Power Pt 6 (–2000.00 to 0 VA, sec) –80 0.01

40PQ7 40P Q Power Pt 7 (–2000.00 to –1 VA, sec) –100 0.01
40P4M 40P Zone 4 Margin from Capability Curve (0.60–1) 0.8 0.01
40PRU 40P P Rated (1.00–2000 VA, sec) 100 0.01
40PQ1D 40P Q Power Dynamic Pt 1 (1.00–2000 VA, sec) 150 0.01
40PP2D 40P P Power Dynamic Pt 2 (1.00–2000 VA, sec) 90 0.01
40PQ4D 40P Q Power Dynamic Pt 4 (–2000.00 to 0 0.01
2000 VA, sec)
40PQ5D 40P Q Power Dynamic Pt 5 (–2000.00 to –110 0.01
2000 VA, sec)
40PQ6D 40P Q Power Dynamic Pt 6 (–2000.00 to 0 VA, sec) –130 0.01
40PQ7D 40P Q Power Dynamic Pt 7 (–2000.00 to –1 VA, sec) –100 0.01
40PRUD 40P P Rated Dynamic (1.00–2000 VA, sec) 150 0.01
40P4D 40P Zone 4 Time Delay (0.000–400 s) 10 0.005
Table 8.50 Current Unbalance (46) Elements 1 and 2
Default
Value
46QOaa 46 Element a Operate Quantity I2GP

a
46QaPa 46 Element a Level a PU (OFF, 2–100 %) 8 1
a
46QaD1 46 Element a Level 1 Delay (0.000–1000 s) 30 0.005
a
46QaK2 46 Element a Level 2 Time Dial (1–100 s) 10 1
a
46QaTC 46 Element a Torque Control (SELogic Eqn) 1
a
a = 1, 2.
Table 8.51 Terminal n Overcurrent Elements
Default
Value
E50na Type of O/C Elems Enabled Term. n (Combo of P, P

Q, G)
a n = S, T, U, Y.

Settings 8.21
Group Settings
Table 8.52 Terminal n Phase Overcurrent Element Level c
Default
Settinga, b Prompt Increment
Value
50nPcP Phase Inst O/C Pickup Lvl c (OFF, 0.25– OFF 0.01
100.00 A, sec)
67nPcTC Phase Inst O/C Lvl c Torque Ctrl (SELogic Eqn) 1
67nPcD Phase Inst O/C Lvl c Delay (0.000–400 s) 0 0.005
a n = S, T, U, Y.
b c = 1–3.
Table 8.53 Terminal n Negative-Sequence Overcurrent Element Level c
Default
Value
50nQcP NegSeq Inst O/C Pickup Lvl c (OFF, 0.25–100.00) OFF 0.01
67nQcTC NegSeq Inst O/C Lvl c Torque Ctrl (SELogic Eqn) 1
67nQcD NegSeq Inst O/C Lvl c Delay (0.000–400 s) 0 0.005
a n = S, T, U, Y.
b
c = 1–3.
Table 8.54 Terminal n Zero-Sequence Overcurrent Element Level c
Default
Value
50nGcP ZeroSeq Inst O/C Pickup Lvl c (OFF, 0.25–100.00) OFF 0.01
67nGcTC ZeroSeq Inst O/C Lvl c Torque Ctrl (SELogic Eqn) 1
67nGcD ZeroSeq Inst O/C Lvl c Delay (0.000–400 s) 0 0.005
a
n = S, T, U, Y.
b c = 1–3.
Table 8.55 Terminal n Directional (67) Elements
Default
Value
Z1ANGn Pos.-Seq. Line Impedance Angle (5.00–90 deg) 89 0.01

Z0ANGn Zero-Seq. Line Impedance Angle (5.00–90 deg) 85 0.01
50QPn Neg.-Seq. Dir. O/C Pickup (0.25–5 A, sec) 0.6 0.01
Z2Fn Fwd Dir Z2 Threshold (–64.00 to 64.00 ohms, sec) –0.1 0.01
Z2Rn Rev Dir Z2 Threshold (–64.00 to 64.00 ohms, sec) 0.1 0.01
A2n Pos.-Seq. Restraint Factor, I2/I1 (0.02–0.50) 0.1 0.01
K2n Zero-Seq. Restraint Factor, I2/I0 (0.10–1.20) 0.2 0.01
50GPn Zero-Seq. Dir. O/C Pickup (0.25–5 A, sec) 0.6 0.01
Z0Fn Fwd Dir Z0 Threshold (–64.00 to 64.00 ohms, sec) –0.1 0.01
Z0Rn Rev Dir Z0 Threshold (–64.00 to 64.00 ohms, sec) 0.1 0.01
A0n Pos.-Seq. Restraint Factor, I0/I1 (0.02–0.50) 0.1 0.01
DIRBLKn Block n Directional Elem. (SELogic Eqn) NA
a n = S, T, U, Y.

8.22 Settings
Group Settings
Table 8.56 Inverse Time Overcurrent Elements 1–12
Default
Value
51O1–51O12 Inv. Time O/C 1–12 Operate Quantity IMAXSF

51P1–51P12 Inv. Time O/C 1–12 Pickup Value (SEL Math Eqn) 1
51C1–51C12 Inv. Time O/C 1–12 Curve Selection (U1–U5, C1–C5) U1
51TD1– Inv. Time O/C 1–12 Time Dial (SEL Math Eqn) 1
51TD12
51RS1– Inv. Time O/C 1–12 EM Reset (Y, N) N
51RS12
51TC1– Inv. Time O/C 1–12 Torque Control (SELogic Eqn) 1
51TC12
Table 8.57 Overvoltage (59) Elements 1–6
Default
Value
59Osa O/V Element s Operating Quantity VPMAXZF

a, b
59PsPa O/V Element s Level a PU (OFF, 2.00–300 V, sec) OFF 0.01
a, b
59PsCa O/V Element s Level a Curve (D, I) D
a, b
59PsDa O/V Element s Level a Delay (0.000–400 s) 10 0.005
a, b
59TCs O/V Element s Torque Control (SELogic Eqn) 1
a
s = 1–6.
b a = 1, 2.
Table 8.58 Split Phase (60P) Element (Sheet 1 of 2)
Default
Value
60PpHPa 60P High Set Lvl Ph p Pickup (OFF, 0.10–100 A, OFF 0.01
sec)
60PHD 60P High Set Lvl Delay (0.000–400 s) 0.005 0.005
a
60PpHSS 60P High Set Lvl Ph p Switch to Sec (SELogic CONp1
Eqn)
60PHTC 60P High Set Lvl Torque Control (SELogic Eqn) 1
a
60PpLP 60P Low Set Lvl Ph p Pickup (OFF, 0.10–100 A, OFF 0.01
sec)
60PLD 60P Low Set Lvl Delay (0.000–400 s) 0.005 0.005
60PLR 60P Low Set Lvl Reset (SELogic Eqn) NA
60PLT 60P Low Set Lvl Time Constant (1–2400 s) 100 1
a
60PpLSS 60P Low Set Lvl Ph p Switch to Sec (SELogic CONp1
Eqn)
60PLTC 60P Low Set Lvl Torque Control (SELogic Eqn) 1
60NHP 60N High Set Lvl Pickup (OFF, 0.10–100 A, sec) OFF 0.01
60NHD 60N High Set Lvl Delay (0.000–400 s) 0.005 0.005
60NHSS 60N High Set Lvl Switch to Sec (SELogic Eqn) CON1
60NHTC 60N High Set Lvl Torque Control (SELogic Eqn) 1
60NLP 60N Low Set Lvl Pickup (OFF, 0.10–100 A, sec) OFF 0.01
60NLD 60N Low Set Lvl Delay (0.000–400 s) 0.005 0.005

Settings 8.23
Group Settings
Table 8.58 Split Phase (60P) Element (Sheet 2 of 2)
Default
Value
60NLR 60N Low Set Lvl Reset (SELogic Eqn) NA

60NLT 60N Low Set Lvl Time Constant (1–2400 s) 100 1
60NLSS 60N Low Set Lvl Switch to Sec (SELogic Eqn) CON1
60NLTC 60N Low Set Lvl Torque Control (SELogic Eqn) 1
a p = A, B, C.
Table 8.59 Stator Ground (64G) Element
64G1Paa 64G1 Neutral O/V Level a PU (OFF, 0.1– OFF 0.1

150 V,sec)
64G1Daa 64G1 Level a Delay (0.000–400 s) 1 0.005
64G1TCaa 64G1 Level a Torque Cont (SELogic Eqn) 1
64GALT 64G Alternate Setting (SELogic Eqn) NA
64GANCL 64G Angle Check Low (–179.99 to 180 deg) 45 0.01
64GANCH 64G Angle Check High (–179.99 to 180 deg) –135 0.01
a
64G2Ra 64G2 Ratio Correction a (0.10–10) 1 0.01
64G2PMN 64G2 Minimum Power (OFF, 1.00–2000 VA, OFF 0.01
sec)
64G2PMX 64G2 Maximum Power (OFF, 1.00–2000 VA, OFF 0.01
sec)
64G2Paa 64G2 Voltage Pickup a (0.10–150 V, sec) 2 0.01
64G2D 64G2 Element Delay (0.000–400 s) 1 0.005
64G2TC 64G2 Element Torque Cont (SELogic Eqn) 1
a
64G3Ra 64G3 Ratio Correction a (0.01–1) 0.15 0.01
64G3P1 64G3 Voltage Pickup 1 (0.10–150 V, sec) 2 0.01
64G3D 64G3 Element Delay (0.000–400 s) 1 0.005
64G3TC 64G3 Element Torque Cont (SELogic Eqn) 1
64GTIN 64G Normal Trip Input (SELogic Eqn) 64G1T OR 64G2T
OR 64G3T
64GAIN 64G Accelerated Input (SELogic Eqn) 64G1 OR 64G2
OR 64G3
64GATC 64G Accelerated Torque Cont (SELogic Eqn) NA
64GAPU 64G Accelerated PU Delay (0.000–400 s) 0.2 0.005
64GADO 64G Accelerated DO Delay (0.000–400 s) 15 0.005
a a = 1, 2.
Table 8.60 Field Ground (64F) Element (Sheet 1 of 2)
Default
Value
64FIRM 64F Field Insu Resi Mapping RA001

64FIQ 64F Field Insu Quality (SELogic Eqn) NA
a
64FaP 64F Level a Pickup (OFF, 0.5–200 kOhms) OFF 0.1

8.24 Settings
Group Settings
Table 8.60 Field Ground (64F) Element (Sheet 2 of 2)
Default
Value
64FaDa 64F Level a Delay (0.000–400 s) 60 0.005

a
64FaTC 64F Level a Torque Cont (SELogic Eqn) 1
a
a = 1, 2.
Table 8.61 Stator Ground (64S) Element
Default
Value
64SIRM 64S Stator Insu Resi Mapping RA002

64SICM 64S Stator Insu Capa Mapping RA003
64SIQ 64S Stator Insu Quality (SELogic Eqn) NA
64SaPa 64S Level a Pickup (OFF, 0.1–10 kOhms) OFF 0.1
64SaDa 64S Level a Delay (0.000–400 s) 60 0.005
a
64SaTC 64S Level a Torque Cont (SELogic Eqn) 1
a
a = 1, 2.
Table 8.62 Out-of-Step (78) Element
Default
Value
78FWD 78 Forward Mho Reach (0.05–100 ohms, sec) 8 0.01

78REV 78 Reverse Mho Reach (0.05–100 ohms, sec) 8 0.01
a
78RBaP 78 Resi Blinder a Reach (0.05–100) 8 0.01
50ABCP 78 Pos.-Seq Current Supervision (1.00–100 A, sec) 1 0.01
78D 78 Out-of-Step Delay (0.000–1 s) 0.05 0.005
78TD 78 Out-of-Step Trip Delay (0.000–1 s) 0 0.005
78TDUR 78 Out-of-Step Trip Duration (0.000–5 s) 0 0.005
78TC 78 Out-of-Step Torque Cont (SELogic Eqn) NOT LOPZ
78XP 78 Slip Counter Zone Reach (OFF, 0.05–100 OFF 0.01
ohms, sec)
78GSCP 78 Generator Slip Counter Pickup (1–5) 2 1
78SSCP 78 System Slip Counter Pickup (OFF, 1–10) OFF 1
78TSCP 78 Total Slip Counter Pickup (OFF, 1–10) OFF 1
78SCD 78 Slip Counter Reset Delay (0.000–1 s) 0.05 0.005
a a = 1, 2.
Table 8.63 Frequency (81) Elements (Sheet 1 of 2)
Default
Value
81UVSP 81 Element U/V Supervision (OFF, 20.00–200 V, 85 0.01

sec)
81Osa 81 O/U Element s Operating Quantity FREQPG
a
81DsP 81 O/U Element s Pickup (5.01–119.99 Hz) 61 0.01

Settings 8.25
Group Settings
Table 8.63 Frequency (81) Elements (Sheet 2 of 2)
Default
Value
81DsDa 81 O/U Element s Time Delay (0.050–400 s) 2 0.005

a
81DsTC 81 O/U Element s Torque Control (SELogic Eqn) 1
a
s = 1–6.
Table 8.64 Rate-of-Change-of-Frequency (81R) Elements
Default
Value
81RUVSP 81R Element U/V Supervision (OFF, 20.00–200 V, 85 0.01

sec)
81ROsa 81R O/U Element s Operating Quantity DFREQPG
a
81RsP 81R O/U Element s Pickup (–29.95 to 29.95 Hz/s) 0.1 0.05
a
81RsPU 81R O/U Element s Time PU Delay (0.050–80 s) 2 0.005
a
81RsDO 81R O/U Element s Time DO Delay (0.000–80 s) 0 0.005
a
81RsTC 81R O/U Element s Torque Control (SELogic Eqn) 1
a s = 1–6.
Table 8.65 Accumulated Frequency (81A) Elements
Default
Value
E81ABD 81A Enable Conventional Frequency Band (Y, N) N

81AD 81AC Element PU Time Delay (0.000–400 s) 0.2 0.005
81ATC 81AC Element Torque Control (SELogic Eqn) 1
a
81AUrP 81AC Ele. Band r Upper Limit PU (5.01–119.99 Hz) 59.5 0.01
81ALrP 81AC Ele. Band r Lower Limit PU (5.01–119.99 Hz) 58.8 0.01
81ArD 81AC Ele. Band r Time Limit (OFF, 0.5–6000 s) 3000 0.5
a r = 1–8.
Table 8.66 Pole Open Detection
Default
Value
3PODra Three-Pole Open DO Delay BKR n (0.0000–2 s) 0.01 0.0025

a
r = 1–8.
Table 8.67 System Backup Protection
GSUCA GSU Compensation Angle (0, –30, 30 deg) 30
Table 8.68 Phase Distance (21P) Element (Sheet 1 of 2)
21PZaMPa 21P Zone a Reac Reach (OFF, 0.05–100 ohms, 8 0.01

sec)
21PZaRPa 21P Zone a Resi Reach (OFF, 0.05–100 ohms, 8 0.01
sec)

8.26 Settings
Group Settings
Table 8.68 Phase Distance (21P) Element (Sheet 2 of 2)

a
21PZaD 21P Zone a Delay (0.000–400 s) 10 0.005
a
21PZaTC 21P Zone a Torque Cont (SELogic Eqn) (NOT LOPZ)
AND (NOT
ZLOAD)
21PANG 21P Zone Characteristic Angle (45.0–90 deg) 88 0.1
21POFF 21P Zone Offset Impedance (0.00–10 ohms, 0 0.01
sec)
a a = 1, 2.
Table 8.69 Voltage-Controlled Time-Overcurrent (51C) Element
Default
Value
51CP 51C Inv. Time O/C PU (0.25–16) 2 0.01

51CC 51C Inv. Time O/C Curve (U1–U5, C1–C5) U1
51CTD 51C Inv. Time O/C Time Dial (0.50–15) 0.5 0.01
51CRS 51C Inv. Time O/C EM Reset (Y, N) N
51CTC 51C Inv. Time O/C Torque Cont (SELogic Eqn) NOT LOPZ
Table 8.70 Voltage-Restrained Time Overcurrent (51V) Element
Default
Value
51VP 51V Inv. Time O/C PU (2.00–16) 2 0.01

51VC 51V Inv. Time O/C Curve (U1–U5, C1–C5) U1
51VTD 51V Inv. Time O/C Time Dial (0.50–15) 0.5 0.01
51VRS 51V Inv. Time O/C EM Reset (Y, N) N
51VTC 51V Inv. Time O/C Torque Cont (SELogic Eqn) NOT LOPZ
Table 8.71 Load Encroachment
Default
Value
ZLF Forward Load Impedance (0.05–64 ohms,sec) 9.22 0.01

ZLR Reverse Load Impedance (0.05–64 ohms,sec) 9.22 0.01
PLAF Forward Load Positive Angle (–90.0 to 90 deg) 30 0.1
NLAF Forward Load Negative Angle (–90.0 to 90 deg) –30 0.1
PLAR Reverse Load Positive Angle (90.0 to 270 deg) 150 0.1
NLAR Reverse Load Negative Angle (90.0 to 270 deg) 210 0.1
Table 8.72 Loss of Potential (Sheet 1 of 2)
Settinga Prompt Default Value Increment
60LVP 60 LOP Unbalance Pickup (OFF, 0.10–300 V, OFF 0.01

sec)
60LVR 60 LOP Unbalance Ratio Correction (0.5000–2) 1 0.0001
b
LOPVRk LOP k Incremental Voltage Ratio (OFF, 0.50–0.98) 0.9 0.01
b
LOPISk LOP k Current Source (S, T, U, Y, G) G

Settings 8.27
Group Settings
Table 8.72 Loss of Potential (Sheet 2 of 2)
Settinga Prompt Default Value Increment

b
LOPTCk LOP k Torque Control (SELogic Eqn) 1
b
LOPSk LOP k Set (SELogic Eqn) LOPIk OR
LOPQk OR
60LOPk OR
LOP3PHk
LOPSDkb LOP k Set Delay (0.000–1 s) 0.3 0.005
LOPRkb LOP k Reset (SELogic Eqn) LOPRSk
LOPRDkb LOP k Reset Delay (0.000–1 s) 0.5 0.005
a Category hidden if ELOP = OFF.
b
k = V, Z.
Table 8.73 Breaker Failure Logic
Default
Value
BF_SCHM Breaker Failure Scheme (Y, Y1) Y
Table 8.74 Breaker n Failure Logic
Default
Value
EXBFn Enable External Breaker Fail –BKR n (SELogic NA

Eqn)
EXBFSPn External Bkr Fail Superv –BKR n (SELogic Eqn) NA
EBFPUn Ext. Bkr Fail Init PU Delay –BKR n (0.0000–100 s) 0.1 0.0025
50FPUn Fault Current Pickup –BKR n (0.50–50 A, sec) 10 0.01
BFPUn Brkr Fail Init Pickup Delay –BKR n (0.0000–100 s) 0.1 0.0025
RTPUn Retrip Delay –BKR n (0.0000–100 s) 0.05 0.0025
BFIn Breaker Fail Initiate –BKR n (SELogic Eqn) NA
ATBFIn Alt Breaker Fail Initiate –BKR n (SELogic Eqn) NA
ENINBFn Enable Neutral Bkr Failure –BKR n (SELogic Eqn) NA
INFPUn Neutral Current Pickup –BKR n (0.50–50 A, sec) 0.5 0.01
EBFISn Breaker Fail Initiate Seal-In –BKR n (Y, N) N
BFISPn Bkr Fail Init Seal-In Delay –BKR n (0.0000–20 s) 0.05 0.0025
BFIDOn Bkr Fail Init Dropout Delay –BKR n (0.0000–20 s) 0.025 0.0025
a n = S, T, U, Y.
Table 8.75 Breaker n Flashover Logic
Default
Value
EFOBFn Enable Flash Over –BKR n (P, G) P

50FOPUn Flash Over Current PU –BKR n (0.50–50 A, sec) 10 0.01
FOPUn Flash Over Init PU Delay –BKR n (0.0000–100 s) 0.1 0.0025
BLKFOn Block Flash Over –BKR n (SELogic Eqn) NA
a
n = S, T, U, Y.

8.28 Settings
Group Settings
Table 8.76 Demand Metering Elements 1–10
Default
Value
DMTYg Demand Met. Type Element g (THM, ROL) THM

DMOQg Demand Met. Op. Qty. Element g IAGRS
DMPUg Demand Met. PU Element g (0.50–16.00 A, sec) 2 0.01
DMTCg Demand Met. Time Const. Elm g (5, 10, ..., 300 min) 5 5
EDMg Enable Demand Metering Element g (SELogic Eqn) 1
a g = 1–10.
Table 8.77 Max/Min Metering Elements
Default
Value
MMOQ01– Max/Min Met. An. Qty. Element 01–30 3PGF

MMOQ30
Table 8.78 Online Logic
Default
Value
ONLINE Generator Online Logic (SELogic Eqn) 52CLS

FLDENRG Generator Field Energized (SELogic Eqn) NA
Table 8.79 Trip Logic
TRra Trip Element r (SELogic Eqn) NA

a
ULTRr Unlatch Trip Element r (SELogic Eqn) TRGTR
TDURDra Min. Trip Element r Duration (0.0200–400 s) 0.1 0.0025
b
TRn Trip Breaker n (OFF or combo of 1–8) OFF
TREX Trip Exciter (OFF or combo of 1–8) 1, 3, 4
TRPM Trip Prime Mover (OFF or combo of 1–8) 1, 3
TRAUX Trip Auxiliary (OFF or combo of 1–8) 1, 3, 4
TRIP General Trip (OFF or combo of 1–8) 1, 2, 3, 4, 5, 6
ER Event Report Trigger Equation (SELogic Equa- NA
tion)
FAULT Fault Condition Equation (SELogic Equation) NA
a r = 01–08.
b
n = S, T, U, Y.
Table 8.80 Close Logic
Default
Value
CLn Close Breaker n (SELogic Equation) NA

ULCLn Unlatch Close Breaker n (SELogic Equation) 52CLn
CFDn Close Failure Delay Breaker n (OFF, 0.0200– 0.08 0.0025
2000 s)
a
n = S, T, U, Y.

Settings 8.29
Automation Freeform SELOGIC Control Equations
Automation Freeform SELOGIC Control Equations

description of automation SELOGIC control equations. The SEL-400G supports
10 blocks of 100 lines.
Output Settings
Section 12: Settings in the SEL-400 Series Relays Instruction Manual contains a
description of the output settings of the relay.
Front-Panel Settings
complete description of front-panel settings. This section lists the SEL-400G spe-
cific default settings values.
Table 8.81 Front-Panel Settings Defaults (Sheet 1 of 3)
Label Default Value
FP_TO 15
EN_LEDC G
TR_LEDC R
PB1_LED NA
PB1_COL AO
PB2_LED NA
PB2_COL AO
PB3_LED AN
PB3_COL AO
PB4_LED NA
PB4_COL AO
PB5_LED NA
PB5_COL AO
PB6_LED NA
PB6_COL AO
PB7_LED NA
PB7_COL AO
PB8_LED NA
PB8_COL AO
PB9_LED NA
PB9_COL AO
PB10LED NA
PB10COL AO
PB11LED NA

8.30 Settings
Label Default Value
PB11COL AO
PB12LED NA
PB12LED AO
T1_LED 87Z1
T1LEDL Y
T1LEDC RO
T2_LED 87Z2
T2LEDL Y
T2LEDC RO
T3_LED REF
T3LEDL Y
T3LEDC RO
T4_LED 24D1T1 OR 24D2T1
T4LEDL Y
T4LEDC RO
T5_LED 64GT
T5LEDL Y
T5LEDC RO
T6_LED 64F1T OR 64F2T
T6LEDL Y
T6LEDC RO
T7_LED 40Z1T OR 40Z2T OR 40P1T OR 40P2T
T7LEDL Y
T7LEDC RO
T8_LED 32T01
T8LEDL Y
T8LEDC RO
T9_LED 81D1T OR 81D2T OR 81D3T OR 81D4T OR 81D5T OR 81D6T
T9LEDL Y
T9LEDC RO
T10_LED 78OST
T10LEDL Y
T10LEDC RO
T11_LED 51CT OR 51VT OR 21PZ1T OR 21PZ2T
T11LEDL Y
T11LEDC RO
T12_LED FBFS
T12LEDL Y
T12LEDC RO
T13_LED TRIPS
T13LEDL Y

Settings 8.31
Label Default Value
T13LEDC RO
T14_LED TRIPEX
T14LEDL Y
T14LEDC RO
T15_LED TRIPPM
T15LEDL T
T15LEDC RO
T16_LED TRIPAUX
T16LEDL Y
T16LEDC RO
T17_LED ONLINE
T17LEDL N
T17LEDC AO
T18_LED 46Q1T1 OR 46Q1T2 OR 46Q2T1 OR 46Q2T2
T18LEDL Y
T18LEDC RO
T19_LED THRLT1 OR THRLT2 OR THRLT3
T19LEDL Y
T19LEDC RO
T20_LED 271P1T OR 591P1T
T20LEDL Y
T20LEDC RO
T21_LED LOPZ
T21LEDL Y
T21LEDC AO
T22_LED NA
T22LEDL N
T22LEDC RO
T23_LED NA
T23LEDL N
T23LEDC RO
T24_LED NA
T24LEDL N
T24LEDC RO
The SEL-400G does not use the selectable screens as shown in Section 4: Front-
Panel Operations in the SEL-400 Series Relays Instruction Manual, but instead
uses a freeform settings block for listing the selected screens. The SEL-400G
rotating display default (RDD) is the single screen: RMSZV.

8.32 Settings
Report Settings
Report Settings
The SEL-400G contains the Report settings described in Section 12: Settings in
the SEL-400 Series Relays Instruction Manual. Report settings unique to the
SEL-400G are shown in Table 8.82. See Reporting on page 7.24 for more infor-
mation on disturbance event recording.
Table 8.82 Disturbance Event Recording
Label Prompt Default Value
EDR Enable Disturbance Recording Event (Y, N) N

DRLER Length of Disturbance Event (60–300 s) 180
DRPREa Pre-Fault Length of Disturbance Event (30–276 s) 50
a Upper range is equal to DRLER – 24.
Port Settings
The SEL-400G port settings are as described in Section 12: Settings in the
The Fast Message read data access settings listed in Table 12.8 in the SEL-400
Series Relays Instruction Manual are all included in the SEL-400G.
Table 8.83 MIRRORED BITS Protocol Defaults
Label Default Value
MBANA1 PMV58
MBANA2 PMV59
MBANA3 PMV60
MBANA4 PMV61
MBANA5 PMV62
MBANA6 PMV63
MBANA7 PMV64
The Modbus TCP settings are listed in Table 8.84.
Table 8.84 Modbus TCP Protocol Defaults
EMOD Enable Modbus TCP Sessions (0–2) 0

a
MODIP1 Modbus TCP Master 1 IP Address (w.x.y.z) 192.168.1.201
a
MODNUM1 Modbus TCP Port 1 (1–65534) 502
a
MTIMEO1 Modbus TCP Timeout 1 (15–900 seconds) 15
a, b
MODIP2 Modbus TCP Master 2 IP Address (w.x.y.z) 192.168.1.202
a, b
MODNUM2 Modbus TCP Port 2 (1–65534) 502
a, b
MTIMEO2 Modbus TCP Timeout 2 (15–900 seconds) 15
a Setting hidden when EMOD = 0.
b
Setting hidden when EMOD = 1.

Settings 8.33
Modbus Settings—Custom Map
Modbus Settings—Custom Map

The SEL-400G Modbus register map defines one freeform category with as many
as 1000 user-settable analogs. Discrete input and coil maps are fixed. See Mod-
bus TCP Communication on page 10.59 to see the fixed maps and default register
map configurations.
DNP3 Settings—Custom Maps

The SEL-400G DNP3 custom map settings operate as described in Section 12:
Settings in the SEL-400 Series Relays Instruction Manual. See DNP3 Communi-
cation on page 10.7 to see the default map configuration.
Notes Settings
Use the notes settings like a text pad to leave notes about the relay in the Notes
area of the relay. See Section 12: Settings in the SEL-400 Series Relays Instruc-
tion Manual for additional information on notes settings.
Bay Settings
Table 8.85 Bay Settings (Sheet 1 of 2)
MIMIC Busbar One-line Screen Number (1–999) 1

BAYNAME Bay Name (max 20 characters) BAY 1
a
BAYLABx Bay Label x (max 40 pixels, aprox. 8 char.) BAYLABx
a
BUSNAMx Busbar x Name (max 40 pixels, aprox. 8 char.) BUSNAMx
f
EQPNAMn Equip. n Name (max 40 pixels, aprox. 8 char.) EQn
BK1 Bkr 1 Assignment (NA, S, T, U, Y) S
BK2 Bkr 2 Assignment (NA, S, T, U, Y) T
BK3 Bkr 3 Assignment (NA, S, T, U, Y) U
BK4 Bkr 4 Assignment (NA, S, T, U, Y) Y
b
ByHMINM Breaker y HMI Name (max 17 pixels, aprox. BKy
3 char.)
ByCTLNMb Breaker y Cntl. Scr. Name (max 15 characters) Breaker y
b
52yCLSM Breaker y Close Status (SELogic Equation) 52CLy
b
52y_ALM Breaker y Alarm Status (SELogic Equation) 52ALy
b b c
52yRACK Breaker y Racked Status (SELogic Equation) 1
b b c
52yTEST Breaker y Test Status (SELogic Equation) 0
d
DrHMIN Disconnect m HMI Name (max 18 pixels, aprox. SWm
4 char.)e
DrCTLNd Disconnect m Control Scr. Name (max 15 char.)e BB m
89AMrd Disconnect m N/O Contact (SELogic Equation)e 1

8.34 Settings
Bay Settings
Table 8.85 Bay Settings (Sheet 2 of 2)

d e
89BMr Disconnect m N/C Contact (SELogic Equation) 0
d e
89ALPr Disconnect m Alarm Pickup Delay (0.020–2000 s) 6
d
89CCNr Dis. m Remote Close Control (SELogic Equa- 89CCr
tion)e
89OCNrd Dis. m Remote Open Control (SELogic Equa- 89OCr
tion)e
89CTLrd Dis. r Front-Panel Ctl. Enable (SELogic Equa- 1
tion)d
89CSTrd Dis. m Close Seal-in Time (OFF, 5.6
0.020–2000 s)e
89CITrd Dis. m Close Immobility Time (OFF, 0.4
0.020–2000 s)e
89CRSrd Disconnect m Close Reset (SELogic Equation)e 89CLr OR 89CSIr
d
89CBLr Disconnect m Close Block (SELogic Equation)e NA
d
89OSTr Dis. m Open Seal-in Time (OFF, 0.020–2000 s) 5.6
d
89OITr Dis. m Open Immobility Time (OFF, 0.4
0.020–2000 s)e
89ORSrd Disconnect m Open Reset (SELogic Equation)e 89OPNr OR 89OSIr
d Disconnect m Open Block (SELogic Equation)e
89OBLr NA
d
89CIRr Dis. m Close Immob. Time Reset (SELogic NOT 89OPNr
Equation)e
89OIRrd Dis. m Open Immob. Time Reset (SELogic NOT 89CLr
Equation)e
MDELEnf Analog Quantity <Blank>
g
MDNAMz Pre-text <Blank>
g
MDSETz Text Formatting {w.d} <Blank>
g
MDCLRz Post-text <Blank>
g
MDSCAz Scale Format {s} <Blank>
LOCAL Local Control (SELogic Equation) NA
a
x = 1–9.
b y = S, T, U, Y.
c
This setting only applies to rack-type breakers (see Section 5: Control in the SEL-400 Series
Relays Instruction Manual). Non-rack-type breakers are not affected by this setting.
d r = 01–10.
e m = 1–10.
f n = 1–6.
g z = 1–24.

Instruction Manual
S E C T I O N 9
ASCII Command Reference

You can use a communications terminal or terminal emulation program to set and
operate the relay. This section explains the commands that you send to the
SEL-400G Advanced Generator Relay through use of SEL ASCII communica-
tions protocol. The relay responds to commands such as settings, metering, and
control operations.
This section lists all the commands supported by the relay, but most are described
in Section 14: ASCII Command Reference in the SEL-400 Series Relays Instruc-
tion Manual. This section provides information on commands and command
options that are unique to the SEL-400G.
This section lists ASCII commands alphabetically. Commands, command
options, and command variables that you enter are shown in bold. Lowercase
italic letters and words in a command represent command variables that you
determine based on the application (for example, Circuit Breaker number n = 1 or 2,
Remote Bit number nn = 01–32, and level).
Command options appear with brief explanations about the command function.
Refer to the references listed with the commands for more information on the
relay function corresponding to the command or examples of the relay response
to the command.
You can simplify the task of entering commands by shortening any ASCII com-
mand to the first three characters; for example, ACCESS becomes ACC. Always
send a carriage return <CR> character, or a carriage return character followed by
a line feed character <CR><LF>, to command the relay to process the ASCII
command. Usually, most terminals and terminal programs interpret the <Enter>
key as a <CR>. For example, to send the ACCESS command, type
ACC <Enter>.
Tables in this section show the access level(s) where the command or command
option is active. Access levels in the SEL-400G are Access Level 0, Access
Level 1, Access Level B (breaker), Access Level P (protection), Access Level A
(automation), Access Level O (output), Access Level 2, and Access Level C.

9.2 ASCII Command Reference
Description of Commands
Table 9.1 lists all the commands supported by the relay with the corresponding
links to the descriptions in Section 14: ASCII Command Reference in the
Command List
Table 9.1 SEL-400G List of Commands (Sheet 1 of 3)
Location of Command in Section 14: ASCII Command Reference in the SEL-400 Series Relays
Command
Instruction Manual
2ACCESS 2ACCESS on page 14.1

81A 81A on page 9.4 in this section.
89CLOSE k 89CLOSE n on page 14.2 (The SEL-400G supports 10 disconnects.)
89OPEN k 89OPEN n on page 14.2 (The SEL-400G supports 10 disconnects.)
AACCESS AACCESS on page 14.3
ACCESS ACCESS on page 14.3
BACCESS BACCESS on page 14.3
BNAME BNAME on page 14.4
BREAKER n BREAKER on page 14.4 (The SEL-400G supports four circuit breakers, designated S, T, U, and Y.)
CAL CAL on page 14.5
CASCII CASCII on page 14.5
CBREAKER CBREAKER on page 14.6 (The SEL-400G supports four circuit breakers, designated S, T, U, and Y.)
CHISTORY CHISTORY on page 14.11
CLOSE n CLOSE n on page 14.11 (The SEL-400G supports four circuit breakers, designated S, T, U, and Y.)
COMMUNICATIONS c COMMUNICATIONS on page 14.12
CONTROL nn CONTROL nn on page 14.24
COPY m n COPY on page 14.25
CPR CPR on page 14.26
CSER CSER on page 14.26
CSTATUS CSTATUS on page 14.28
CSUMMARY CSUMMARY on page 14.28
DATE DATE on page 14.29
DNAME X DNAME X on page 14.30
DNP DNP on page 14.30
ETHERNET ETHERNET on page 14.30
EXIT EXIT on page 14.35
FILE FILE on page 14.35
GOOSE GOOSE on page 14.36
GROUP GROUP on page 14.39
HELP HELP on page 14.40
HISTORY HISTORY on page 14.40
ID ID on page 14.41
LOOPBACK LOOPBACK on page 14.43

ASCII Command Reference 9.3
Command
Instruction Manual
MAC MAC on page 14.44

MAP MAP on page 14.45
METER METER on page 14.45 (For all other METER options, see METER on page 9.4 in this section.)
MET AMV MET AMV on page 14.46
MET ANA MET ANA on page 14.46
MET BAT MET BAT on page 14.46 (The SEL-400G provides battery metering for one battery monitor channel.)
MET D MET D on page 14.47
MET DIF See MET DIF on page 9.5 in this section.
MET E See MET E on page 9.5 in this section.
MET H See MET H on page 9.5 in this section.
MET M See MET M on page 9.6 in this section.
MET PM MET PM on page 14.47
MET PMV MET PMV on page 14.48
MET RMS See MET RMS on page 9.6 in this section.
MET RTC MET RTC on page 14.49
MET RTD MET T on page 14.49 (The MET RTD command in the SEL-400G is the same as the MET T command in
other SEL-400 series relays.)
MET SEC See MET SEC on page 9.7 in this section.
MET SYN See MET SYN on page 9.7 in this section.
OACCESS OACCESS on page 14.49
OPEN n OPEN n on page 14.50 (The SEL-400G supports five circuit breakers, designated S, T, U, W, X.)
PACCESS PACCESS on page 14.50
PASSWORD PASSWORD on page 14.50
PING PING on page 14.51
PORT PORT on page 14.51
PROFILE PROFILE on page 14.53
PULSE PULSE on page 14.53
QUIT QUIT on page 14.54
RTC RTC on page 14.54
SER SER on page 14.54
SET SET on page 14.56 (Table 9.12 lists the class and instance options available in the SEL-400G.)
SHOW SHOW on page 14.58 (Table 9.13 lists the class and instance options available in the SEL-400G.)
SNS SNS on page 14.58
STATUS STATUS on page 14.58
SUMMARY SUMMARY on page 14.60
TARGET TARGET on page 14.61
TEST DB TEST DB on page 14.63
TEST DB2 TEST DB2 on page 14.65
TEST FM TEST FM on page 14.66
THE THE on page 9.9 in this section.
TIME TIME on page 14.70

Command
Instruction Manual
TIME Q TIME Q on page 14.71

TRIGGER TRIGGER on page 14.72
VECTOR VECTOR on page 14.72
VERSION VERSION on page 14.72
VIEW VIEW on page 14.73
81A
Use the 81A command to view the accumulated frequency element quantities.
Table 9.2 81A Commands
Command Description Access Level
81A Retrieves frequency accumulated time data for all bands 1, B, P, A, O, 2

a
81A n R or C Clears frequency accumulated time data for Band n B, P, A, O, 2
81A R or C Clears all frequency bands accumulated time data B, P, A, O, 2
81A P Load preset value of accumulated time for frequency bands B, P, A, O, 2
a n = 1–8.
When you issue the reset command 81A R or C, the relay responds, Clear All
Frequency Bands accumulated time data, Are you sure (Y/N)? If you
answer Y <Enter>, the relay responds Frequency Bands Accumulated Time
Data Archives Cleared. Similarly, for 81A n R or C, the relay responds Fre-
quency Band n Accumulated Time Data Archives Cleared. If you preset
accumulated time values using the 81A P command (format dddd:hh:mm:ss.s),
the relay responds with Are you sure (Y/N)? If you answer Y <Enter>, the
relay responds Frequency Band Accumulated Time Values Preloaded.
METER
The METER command displays reports about quantities the relay measures in
the power system (voltages, currents, frequency, remote analogs, etc.) and inter-
nal relay operating quantities (math variables and analog quantities).
MET
Use the MET command to view fundamental metering quantities. The relay fil-
ters harmonics and subharmonics to present only measured quantities at the
power system fundamental operating frequency.
Table 9.3 MET Commanda
MET Display fundamental metering data 1, B, P, A, O, 2

MET [F] n Display Terminal n fundamental metering quantities 1, B, P, A, O, 2
MET [F] n k Display Terminal n fundamental metering quantities 1, B, P, A, O, 2
successively for k times
a
n = G, S, T, U, V, Y, Z.

The MET command without options shows the fundamental metering data of the
generator (Terminal G). Specify a specific terminal by using the terminal param-
eter command options. For example, specify MET T to view the fundamental
metering quantities of Terminal T.
Some situations require that you repeatedly monitor the power system for a brief
period; specify a number after any MET command to automatically repeat the
command.
MET DIF
Use the MET DIF command to view the differential current metering data, in
multiples of tap.
Table 9.4 MET DIF Command
MET DIF k Displays the differential operate and restraint quantities 1, B, P, A, O, 2

for Zone 1 successively for k times
MET DIF Zna Displays the differential operate and restraint quantities 1, B, P, A, O, 2
for Zone n
MET DIF Zn A Displays the differential operate, restraint, and compen- 1, B, P, A, O, 2
sated current quantities for Zone n
a
n = 1, 2.
If the differential is disabled for a particular zone and the MET DIF command is
issued for that zone, the relay displays the message Differential Elements n
Disabled.
MET E
Use the MET E command to view the energy import and export quantities.
Energy values are displayed for the generator and for any terminals enabled in the
EPCAL setting (S, T, U, and Y).
Table 9.5 MET E Command
MET E Display energy metering data 1, B, P, A, O, 2

MET E k Display energy metering data successively for k times 1, B, P, A, O, 2
MET RE Reset energy metering data P, A, O, 2
The reset command, MET RE, resets the generator energy metering quantities.
When you issue the MET RE command, the relay responds, Reset Energy
Metering (Y/N)? If you answer Y <Enter>, the relay responds, Energy Meter-
ing Reset.
MET H
Use the MET H command to view secondary harmonic metering quantities.
Table 9.6 MET H Command (Sheet 1 of 2)
MET H Display harmonic metering data for all terminals 1, B, P, A, O, 2

MET H G Display harmonic metering data for Terminal G 1, B, P, A, O, 2

Table 9.6 MET H Command (Sheet 2 of 2)
MET H k Display harmonic metering data for all terminals succes- 1, B, P, A, O, 2

sively for k times
MET H G k Display harmonic metering data for Terminal G succes- 1, B, P, A, O, 2
sively for k times
MET M
Use the MET M command to view minimum/maximum metering quantities.
Table 9.7 MET M Command
MET M Display minimum/maximum metering data for the 1, B, P, A, O, 2

configured analogs
MET M k Display minimum/maximum metering data for the 1, B, P, A, O, 2
configured analogs successively for k times
MET RM Reset minimum/maximum metering data P, A, O, 2
The reset command, MET RM, resets the minimum/maximum metering quanti-
ties. When you issue the MET RM command, the relay responds, Reset Min/
Max Metering (Y/N)? If you answer Y <Enter>, the relay responds, Min/Max
Metering Reset.
MET RMS
Use the MET RMS command to view fundamental metering quantities for the
generator (Terminal G).
Table 9.8 MET RMS Commanda
MET RMS Display root-mean-square (rms) metering quanti- 1, B, P, A, O, 2

ties for Terminal G
MET RMS n Display Terminal n rms metering quantities 1, B, P, A, O, 2
MET RMS n k Display Terminal n rms metering quantities suc- 1, B, P, A, O, 2
cessively for k times
a n = G.
MET RTD
Use the MET RTD command to view RTD temperature data.
Table 9.9 MET RTD Command
MET RTD Display RTD temperature data 1, B, P, A, O, 2

MET RTD k Display RTD temperature data successively for k 1, B, P, A, O, 2
times

MET SEC
Use the MET SEC command to view secondary fundamental metering quanti-
ties.
Table 9.10 MET SEC Command
MET SEC Display secondary metering quantities of the ter- 1, B, P, A, O, 2

minal
MET SEC k Display secondary metering quantities succes- 1, B, P, A, O, 2
sively for k times
MET SYN
Use the MET SYN command to view synchronism-check metering quantities.
Table 9.11 MET SYN Command
MET SYN Display synchronism-check metering data for the 1, B, P, A, O, 2

first enabled terminal
MET SYN na Display synchronism-check metering data for Ter- 1, B, P, A, O, 2
minal n
MET SYN n ka Display synchronism-check metering data for Ter- 1, B, P, A, O, 2
minal n successively for k times
a n = S, T, U, Y.
SET
Table 9.12 lists the options specifically available in the SEL-400G.
Table 9.12 SET Command Overview (Sheet 1 of 2)
SET Set the Group relay settings, beginning at the first setting P, 2
in the active group
SET na Set the Group n relay settings, beginning at the first setting P, 2
in the group
SET A Set the Automation SELOGIC control equation relay set- A, 2
tings in Block 1
SET A mb Set the Automation SELOGIC control equation relay set- A, 2
tings in Block m
SET B Bay control settings, beginning at the first setting in this P, B, 2
class
SET D Set the DNP3 remapping settings, beginning at the first P, A, O, 2
setting in this class for Instance 1
SET D instance Set the DNP3 remapping settings beginning at the first set- P, A, O, 2
ting of Instance instance
SET F Set the front-panel relay settings, beginning at the first set- P, A, O, 2
ting in this class
SET G Set the Global relay settings, beginning at the first setting P, A, O, 2
in this class

Table 9.12 SET Command Overview (Sheet 2 of 2)
SET L Set the Protection SELOGIC control equation relay settings P, 2

for the active group
SEL L na Set the Protection SELOGIC relay settings for Group n P, 2
SET M Monitor settings, beginning at the first setting in this class P, 2
SET N Enter text using the text-edit format P, A, O, 2
SET O Set the Output SELOGIC control equation relay settings, O, 2
beginning at OUT101
SET P Set the port presently in use, beginning at the first setting P, A, O, 2
for this port
SET P pc Set the communications Port relay settings for Port p, P, A, O, 2
beginning at the first setting for this port
SET R Set the Report relay settings, beginning at the first setting P, A, O, 2
for this class
SET T Set the alias settings P, A, O, 2
SET U Set the user Modbus settings P, A, O, 2
a
n = 1–6; representing Group 1 through Group 6.
b m = 1–10; representing Block 1 through Block 10.
c
p = 1–3, F, or 5; corresponding to Port 1–Port 3, Port F, or Port 5.
SHOW
Table 9.13 lists the class and instance options available in the SEL-400G.
Table 9.13 SHO Command Overview (Sheet 1 of 2)
SHO Show the Group relay settings, beginning at the first set- 1, B, P, A, O, 2
ting in the active group
SHO na Show the Group n relay settings, beginning at the first 1, B, P, A, O, 2
setting in each instance
SHO A Show the Automation SELOGIC control equation relay 1, B, P, A, O, 2
settings in Block 1
SHO A mb Show the Automation SELOGIC control equation relay 1, B, P, A, O, 2
settings in Block m
SHO B Show the Bay control settings, beginning at the first set- 1, B, P, A, O, 2
ting in this class
SHO D Show the DNP3 remapping settings for Instance 1 P, A, O, 2
SHO D instance Show the DNP3 remapping settings for Instance instance P, A, O, 2
SHO F Show the Front-panel relay settings, beginning at the first 1, B, P, A, O, 2
setting in this class
SHO G Show the Global relay settings, beginning at the first set- 1, B, P, A, O, 2
ting in this class
SHO L Show the Protection SELOGIC control equation relay set- 1, B, P, A, O, 2
tings for the active group
SHO L na Show the Protection SELOGIC control equation relay set- 1, B, P, A, O, 2
tings for Group n
SHO M Show the Monitor relay settings, beginning at the first 1, B, P, A, O, 2
setting in this class
SHO N Show notes in the relay 1, B, P, A, O, 2

Table 9.13 SHO Command Overview (Sheet 2 of 2)
SHO O Show the Output SELOGIC control equation relay set- 1, B, P, A, O, 2

tings, beginning at OUT101
SHO P Show the relay settings for the port presently in use, 1, B, P, A, O, 2
beginning at the first setting
SHO P pc Show the communications Port relay settings for Port p, 1, B, P, A, O, 2
beginning at the first setting for this port
SHO R Show the Report relay settings beginning at the first set- 1, B, P, A, O, 2
ting for this class
SHO T Show the alias settings 1, B, P, A, O, 2
SHO U Show the user Modbus settings P, A, O, 2
a
n = 1–6; representing Group 1 through Group 6.
b m = 1–10; representing Block 1 through Block 10.
c
p = 1–3, F, and 5; which corresponds to Port 1–Port 3, Port F, and Port 5.
THE
Use the THE command to display the IEC Thermal model element quantities.
Table 9.14 THE Command Overview
THE Display all IEC thermal elements statuses 1, B, P, A, O, 2

THE R or C Reset all thermal records and total loss-of-life B, P, A, O, 2
THE na R or C Reset thermal records for Element n B, P, A, O, 2
THE P Load preset thermal level value for all elements B, P, A, O, 2
a n = 1–3.
When you issue the reset command THE R or C the relay responds, Clear All
IEC Thermal Elements data? Are you sure (Y/N)? If you answer
Y <Enter>, the relay responds IEC Thermal Level data Reset. Similarly, for
THE n R or C, the relay responds IEC Thermal Level Element n Reset. If you
preset the thermal values using THE P command, the relay responds with Are
you sure (Y/N)? If you answer Y <Enter>, the relay responds IEC Thermal
Element Values Preloaded.

SEL-400G Relay
Instruction Manual
S E C T I O N 1 0
Communications Interfaces
Section 15: Communications Interfaces–Section 19: Digital Secondary Systems
in the SEL-400 Series Relays Instruction Manual describe the various communi-
cations interfaces and protocols used in SEL-400 series products. This section
describes aspects of the communications protocols that are unique to the
SEL-400G Advanced Generator Protection System. The following topics are dis-
cussed:
➤ Communications Database on page 10.1
➤ DNP3 Communication on page 10.7
➤ IEC 61850 Communication on page 10.28
➤ Synchrophasors on page 10.57
➤ Modbus TCP Communication on page 10.59
Communications Database
The SEL-400G maintains a database to describe itself to external devices via the
Fast Message Data Access protocol. This database includes a variety of data
within the relay that are available to devices connected in a serial or Ethernet net-
work. The database includes the regions and data described in Table 10.1. Use the
MAP and VIEW commands to display maps and contents of the database
regions. See Section 9: ASCII Command Reference for more information on the
MAP and VIEW commands.
Table 10.1 SEL-400G Database Regions
Region Name Contents Update Rate
LOCAL Relay identification data including FID, Relay ID, Station ID, Updated on settings change and whenever
and active protection settings group monitored values change
METER Metering and measurement data 0.5 s
DEMAND Demand and peak demand measurement data 15 s
TARGET Selected rows of Relay Word bit data 0.5 s
HISTORY Relay event history records for the 10 most recent events Within 15 s of any new event
BREAKER Summary circuit breaker monitor data 15 s
STATUS Self-test diagnostic status data 5s
ANALOGS Protection and automation math variables 0.5 s
Data within the Ethernet card regions are available for access by external devices
via the SEL Fast Message protocol.
The LOCAL region contains the device FID, SID, and RID. It will also provide
appropriate status points. This region is updated on settings changes and when-
ever monitored status points change (see Table 10.2).

10.2 Communications Interfaces
Table 10.2 SEL-400G Database Structure—LOCAL Region
Address
Name Type Description
(Hex)
0000 FID char[48] FID string

0030 BFID char[48] SELBOOT FID string
0060 SER_NUM char[16] Device serial number, from factory settings
0070 PART_NUM char[24] Device part number, from factory settings
0088 CONFIG char[8] Device configuration string (as reported in ID command)
0090 SPECIAL char[8] Special device configuration string (as reported in ID
command)
0098 DEVICE_ID char[40] Relay ID setting, from Global settings
00C0 NODE_ID char[40] Station ID from Global settings
00E8 GROUP int Active group
00E9 STATUS int Status indication: 0 for okay, 1 for failure
The METER region contains all the basic meter and energy information. This
region is updated every 0.5 seconds. See Table 10.3 for the map.
Table 10.3 SEL-400G Database Structure—METER Region (Sheet 1 of 3)
Address
(Hex)
1000 _YEAR int 4-digit year when data were sampled

1001 DAY_OF_YEAR int 1–366 day when data were sampled
1002 TIME(ms) long int Time of day in ms when data were sampled (0–86,400,000)
1004 FREQPG float Generator frequency
1006 FREQPS float System frequency
1008 VDC float Battery voltage
100A IS(A) float[6] Terminal S, 40 ms average filtered phase current magnitude and angle (IASFMC, IASFAC,
IBSFMC, IBSFAC, ICSFMC, ICSFAC)
1016 IT(A) float[6] Terminal T, 40 ms average filtered phase current magnitude and angle (IATFMC, IATFAC,
IBTFMC, IBTFAC, ICTFMC, ICTFAC)
1022 IU(A) float[6] Terminal U, 40 ms average filtered phase current magnitude and angle (IAUFMC, IAUFAC,
IBUFMC, IBUFAC, ICUFMC, ICUFAC)
102E IY(A) float[6] Terminal Y, 40 ms average filtered phase current magnitude and angle (IAYFMC, IAYFAC,
IBYFMC, IBYFAC, ICYFMC, ICYFAC)
103A IG(A) float[6] Terminal G, 40 ms average filtered phase current magnitude and angle (IAGFMC, IAGFAC,
IBGFMC, IBGFAC, ICGFMC, ICGFAC)
1046 VV(V) float[6] Terminal V, 40 ms average filtered phase voltage magnitude and angle (VAVFMC * 1000,
VAVFAC, VBVFMC * 1000, VBVFAC, VCVFMC * 1000, VCVFAC)
1052 VZ(V) float[6] Terminal Z, 40 ms average filtered phase voltage magnitude and angle (VAZFMC * 1000,
VAZFAC, VBZFMC * 1000, VBZFAC, VCZFMC * 1000, VCZFAC)
105E ISEQ_S(A) float[6] Terminal S, 40 ms average sequence current magnitude and angle (3I0SMC/3, 3I0SAC, I1SMC,
I1SAC, 3I2SMC/3, 3I2SAC)
106A ISEQ_T(A) float[6] Terminal T, 40 ms average sequence current magnitude and angle (3I0TMC/3, 3I0TAC, I1TMC,
I1TAC, 3I2TMC/3, 3I2TAC)
1076 ISEQ_U(A) float[6] Terminal U, 40 ms average sequence current magnitude and angle (3I0UMC/3, 3I0UAC,
I1UMC, I1UAC, 3I2UMC/3, 3I2UAC)
1082 ISEQ_Y(A) float[6] Terminal Y, 40 ms average sequence current magnitude and angle (3I0YMC/3, 3I0YAC,
I1YMC, I1YAC, 3I2YMC/3, 3I2YAC)

Communications Interfaces 10.3
Address
(Hex)
108E ISEQ_G(A) float[6] Terminal G, 40 ms average sequence current magnitude and angle (3I0GMC/3, 3I0GAC,
I1GMC, I1GAC, 3I2GMC/3, 3I2GAC)
109A VV_LL(V) float[6] Terminal V, 40 ms average filtered phase-to-phase voltage magnitude and angle (VABVFMC *
1000, VABVFAC, VBCVFMC * 1000, VBCVFAC, VCAVFMC * 1000, VCAVFAC)
10A6 VZ_LL(V) float[6] Terminal Z, 40 ms average filtered phase-to-phase voltage magnitude and angle (VABZFMC *
1000, VABZFAC, VBCZFMC * 1000, VBCZFAC, VCAZFMC * 1000, VCAZFAC)
10B2 VSEQ_V(V) float[6] Terminal V, 40 ms average sequence voltage magnitude and angle (3V0VMC/3 * 1000,
3V0VAC, V1VMC * 1000, V1VAC, 3V2VMC/3 * 1000, 3V2VAC)
10BE VSEQ_Z(V) float[6] Terminal Z, 40 ms average sequence voltage magnitude and angle (3V0ZMC/3 * 1000,
3V0ZAC, V1ZMC * 1000, V1ZAC, 3V2ZMC/3 * 1000, 3V2ZAC)
10CA PS(kW) float[4] Terminal S, 40 ms avg fundamental active power (PASFC * 1000, PBSFC * 1000, PCSFC *
1000, 3PSFC * 1000)
10D2 QS(kVAR) float[4] Terminal S, 40 ms avg fundamental reactive power (QASFC * 1000, QBSFC * 1000, QCSFC *
1000, 3QSFC * 1000)
10DA SS(kVA) float[4] Terminal S, 40 ms avg fundamental apparent power (SASFC * 1000, SBSFC * 1000, SCSFC *
1000, 3SSFC * 1000)
10E2 PT(kW) float[4] Terminal T, 40 ms avg fundamental active power (PATFC * 1000, PBTFC * 1000, PCTFC *
1000, 3PTFC * 1000)
10EA QT(kVAR) float[4] Terminal T, 40 ms avg fundamental reactive power (QATFC * 1000, QBTFC * 1000, QCTFC *
1000, 3QTFC * 1000)
10F2 ST(kVA) float[4] Terminal T, 40 ms avg fundamental apparent power (SATFC * 1000, SBTFC * 1000, SCTFC *
1000, 3STFC * 1000)
10FA PU(kW) float[4] Terminal U, 40 ms avg fundamental active power (PAUFC * 1000, PBUFC * 1000, PCUFC *
1000, 3PUFC * 1000)
1102 QU(kVAR) float[4] Terminal U, 40 ms avg fundamental reactive power (QAUFC * 1000, QBUFC * 1000, QCUFC *
1000, 3QUFC * 1000)
110A SU(kVA) float[4] Terminal U, 40 ms avg fundamental apparent power (SAUFC * 1000, SBUFC * 1000, SCUFC *
1000, 3SUFC * 1000)
1112 PY(kW) float[4] Terminal Y, 40 ms avg fundamental active power (PAYFC * 1000, PBYFC * 1000, PCYFC *
1000, 3PYFC * 1000)
111A QY(kVAR) float[4] Terminal Y, 40 ms avg fundamental reactive power (QAYFC * 1000, QBYFC * 1000, QCYFC *
1000, 3QYFC * 1000)
1122 SY(kVA) float[4] Terminal Y, 40 ms avg fundamental apparent power (SAYFC * 1000, SBYFC * 1000, SCYFC *
1000, 3SYFC * 1000)
112A PG(kW) float[4] Terminal G, 40 ms avg fundamental active power (PAGFC * 1000, PBGFC * 1000, PCGFC *
1000, 3PGFC * 1000)
1132 QG(kVAR) float[4] Terminal G, 40 ms avg fundamental reactive power (QAGFC * 1000, QBGFC * 1000, QCGFC *
1000, 3QGFC * 1000)
113A SG(kVA) float[4] Terminal G, 40 ms avg fundamental apparent power (SAGFC * 1000, SBGFC * 1000, SCGFC *
1000, 3SGFC * 1000)
1142 PFS float[4] Terminal S, phase displacement power factor (PFASC, PFBSC, PFCSC, 3PFSC)
114A PFT float[4] Terminal T, phase displacement power factor (PFATC, PFBTC, PFCTC, 3PFTC)
1152 PFU float[4] Terminal U, phase displacement power factor (PFAUC, PFBUC, PFCUC, 3PFUC)
115A PFY float[4] Terminal Y, phase displacement power factor (PFAYC, PFBYC, PFCYC, 3PFYC)
1162 PFG float[4] Terminal G, phase displacement power factor (PFAGC, PFBGC, PFCGC, 3PFGC)
116A ES(kWh) float[4] Terminal S, three-phase energy exported/imported in kWh (3PSMWHP * 1000, 3PSMWHN *
1000, 3QSMVHP * 1000, 3QSMVHN * 1000)

Address
(Hex)
1172 ET(kWh) float[4] Terminal T, three-phase energy exported/imported in kWh (3PTMWHP * 1000, 3PTMWHN *
1000, 3QTMVHP * 1000, 3QTMVHN * 1000)
117A EU(kWh) float[4] Terminal U, three-phase energy exported/imported in kWh (3PUMWHP * 1000, 3PUMWHN *
1000, 3QUMVHP * 1000, 3QUMVHN * 1000)
1182 EY(kWh) float[4] Terminal Y, three-phase energy exported/imported in kWh (3PYMWHP * 1000, 3PYMWHN *
1000, 3QYMVHP * 1000, 3QYMVHN * 1000)
118A EG(kWh) float[4] Terminal G, three-phase energy exported/imported in kWh (3PGMWHP * 1000, 3PGMWHN *
1000, 3QGMVHP * 1000, 3QGMVHN * 1000)
The DEMAND region contains demand and peak demand information. This
region is updated every 15 seconds. See Table 10.4 for the map.
Table 10.4 SEL-400G Database Structure—DEMAND Region
Address
(Hex)

2002 TIME(ms) long int Time of day in ms when data were sampled
(0–86,400,000)
2004 DM float[10] Demand quantity (DM01–DM10)
2018 DMP float[10] Peak demand quantity (DMM01–DMM10)
The TARGET region contains the entire visible Relay Word plus the rows desig-
nated specifically for the TARGET region. This region is updated every 0.5 sec-
onds. See Table 10.5 for the map. See Section 11: Relay Word Bits for detailed
information on the Relay Word bits.
Table 10.5 SEL-400G Database Structure—TARGET Region
Address
(Hex)

(0–86,400,000)
3004 TARGET char[~571] Entire Relay Word with bit labels
The HISTORY region contains all information available in a History report for
the most recent 10 events. This region is updated within 15 seconds of any new
events. See Table 10.6 for the map.
Table 10.6 SEL-400G Database Structure—HISTORY Region (Sheet 1 of 2)
Address
(Hex)

(0–86,400,000)
4004 REF_NUM int[10] Event serial number (10000–42767)

Table 10.6 SEL-400G Database Structure—HISTORY Region (Sheet 2 of 2)
Address
(Hex)
400E MONTH int[10] Month of event

4018 DAY int[10] Day of event
4022 YEAR int[10] Year of event
402C HOUR int[10] Hour of event
4036 MIN int[10] Minute of event
4040 SEC int[10] Second of event
404A MSEC int[10] Milliseconds of event
4054 EVENT char[100] Event type string
40B8 GROUP int[10] Active group during fault
40C2 TAR_SMALL char[320] System targets from event (32 characters per
event)
4202 TARGETS char[1000] System targets from event (100 characters per
event)
The BREAKER region contains some of the information available in a summary

Breaker report. This region is updated every 15 seconds. See Table 10.7 for the map.
Table 10.7 SEL-400G Database Structure—BREAKER Region
Address
(Hex)

5002 TIME(ms) long int Time of day in ms when data were sampled (0–86,400,000)
5004 BCW_S float[3] Breaker S phase breaker wear (%) (BSBCWPA, BSBCWPB, BSBCWPC)
500A BCW_T float[3] Breaker T phase breaker wear (%) (BTBCWPA, BTBCWPB, BTBCWPC)
5010 BCW_U float[3] Breaker U phase breaker wear (%) (BUBCWPA, BUBCWPB, BUBCWPC)
5016 BCW_Y float[3] Breaker Y phase breaker wear (%) (BYBCWPA, BYBCWPB, BYBCWPC)
501C CUR_S float[3] Breaker S phase accumulated current (kA) (IASrms_TRIP_ACC, IBSrms_TRIP_ACC, ICS-
rms_TRIP_ACC)
5022 CUR_T float[3] Breaker T phase accumulated current (kA) (IATrms_TRIP_ACC, IBTrms_TRIP_ACC,
ICTrms_TRIP_ACC)
5028 CUR_U float[3] Breaker U phase accumulated current (kA) (IAUrms_TRIP_ACC, IBUrms_TRIP_ACC,
ICUrms_TRIP_ACC)
502E CUR_Y float[3] Breaker Y phase accumulated current (kA) (IAYrms_TRIP_ACC, IBYrms_TRIP_ACC,
ICYrms_TRIP_ACC)
5034 NOP_S long int Breaker S number of operations (BS_TRP_CNT)
5036 NOP_T long int Breaker T number of operations (BT_TRP_CNT)
5038 NOP_U long int Breaker U number of operations (BU_TRP_CNT)
503A NOP_Y long int Breaker Y number of operations (BY_TRP_CNT)
The STATUS region contains complete relay status information. This region is
updated every 5 seconds. See Table 10.8 for the map.

Table 10.8 SEL-400G Database Structure—STATUS Region
Address
(Hex)

(0–86,400,000)
6004 CH1_24(mV) int[24] Channel offsets, use 0 if not measured
601C MOF(mV) int Master offset
601D MOF2(mV) int Master offset 2
601E OFF_WARN char[8] Offset warning string
6026 OFF_FAIL char[8] Offset failure string
602E PS3(V) float 3.3 Volt power supply voltage
6030 PS5(V) float 5 Volt power supply voltage
6032 PS_N5(V) float –5 Volt regulated voltage
6034 PS15(V) float 15 Volt power supply voltage
6036 PS_N15(V) float –15 Volt power supply voltage
6038 PS_WARN char[8] Power supply warning string
6040 PS_FAIL char[8] Power supply failure string
6048 HW_FAIL char[40] Hardware failure strings
6070 CC_STA char[40] Comm. card status strings
6098 PORT_STA char[160] Serial port status strings
6138 TIME_SRC char[10] Time source
6142 LOG_ERR char[40] SELOGIC error strings
616A TEST_MD char[160] Test mode string
620A WARN char[32] Warning strings for any active warnings
622A FAIL char[64] Failure strings for any active failures
The ANALOGS region contains protection and automation variables. This region
is updated every 0.5 seconds. See Table 10.9 for the map.
Table 10.9 SEL-400G Database Structure—ANALOGS Region
Address
(Hex)

(0–86,400,000)
7004 PMV01_64 float[64] PMV01–PMV64
7084 AMV001_256 float[256] AMV001–AMV256
The database is virtual device 1 in the relay. You can display the contents of a
region using the MAP 1:region command (where region is one of the database
region names listed in Table 10.1). An example of the MAP command is shown
in Figure 10.1.

DNP3 Communication
=>>MAP 1:meter <Enter>
Virtual Device 1, Data Region METER Map
Data Item Starting Address Type
_YEAR 1000h int

DAY_OF_YEAR 1001h int
TIME(ms) 1002h int[2]
FREQPG 1004h float
FREQPS 1006h float
VDC 1008h float
IS(A) 100ah float[6]
IT(A) 1016h float[6]
IU(A) 1022h float[6]
IY(A) 102eh float[6]
IG(A) 103ah float[6]
VV(V) 1046h float[6]
VZ(V) 1052h float[6]
ISEQ_S(A) 105eh float[6]
ISEQ_T(A) 106ah float[6]
ISEQ_U(A) 1076h float[6]
ISEQ_Y(A) 1082h float[6]
ISEQ_G(A) 108eh float[6]
VV_LL(V) 109ah float[6]
VZ_LL(V) 10a6h float[6]
VSEQ_V(V) 10b2h float[6]
VSEQ_Z(V) 10beh float[6]
PS(kW) 10cah float[4]
QS(kVAR) 10d2h float[4]
SS(kVA) 10dah float[4]
PT(kW) 10e2h float[4]
QT(kVAR) 10eah float[4]
ST(kVA) 10f2h float[4]
PU(kW) 10fah float[4]
QU(kVAR) 1102h float[4]
SU(kVA) 110ah float[4]
PY(kW) 1112h float[4]
QY(kVAR) 111ah float[4]
SY(kVA) 1122h float[4]
PG(kW) 112ah float[4]
QG(kVAR) 1132h float[4]
SG(kVA) 113ah float[4]
PFS 1142h float[4]
PFT 114ah float[4]
PFU 1152h float[4]
PFY 115ah float[4]
PFG 1162h float[4]
ES(kWh) 116ah float[4]
ET(kWh) 1172h float[4]
EU(kWh) 117ah float[4]
EY(kWh) 1182h float[4]
EG(kWh) 118ah float[4]
=>>
Figure 10.1 MAP 1:METER Command Example
DNP3 Communication
DNP3 operation is described in Section 16: DNP3 Communication in the
SEL-400 Series Relays Instruction Manual. This section describes aspects of
DNP3 communication that are unique to the SEL-400G.
Reference Data Map

Table 10.10–Table 10.14 shows the SEL-400G DNP3 reference data maps. The
reference data maps contain all of the data points available to the DNP3 protocol.
You can select the default subset or use the custom DNP3 mapping functions of
the SEL-400G to create or edit maps that contain the points required by your
application.

DNP3 Communication
Table 10.10 shows the Binary Input reference map. The entire Relay Word (see
Section 11: Relay Word Bits) is part of the DNP3 reference map. You may
include any label in the Relay Word as part of a DNP3 custom map. Note that
Binary Inputs registered as SER points (SET R settings) will maintain SER-qual-
ity time stamps for DNP3 events.
Table 10.10 SEL-400G Binary Input Reference Data Map
Object Label Description
01, 02 RLYDIS Relay disabled

01, 02 STFAIL Relay diagnostic failure
01, 02 STWARN Relay diagnostic warning
01, 02 STSET Settings change or relay restart
01, 02 UNRDEV New relay event available
01, 02 NUNREV An unread event exists, newer than the event in the Event
summary AIs
01, 02 Relay Word Relay Word bit label. See Section 11: Relay Word Bits.
Table 10.11 shows the Binary Output reference map. See Binary Outputs on
page 10.20 for additional information.
Table 10.11 SEL-400G Binary Output Reference Data Map (Sheet 1 of 2)
10, 12 RB01–RB64 Remote Bits RB01–RB64

10, 12 RB01:RB01 Remote Bit pulse operation, RB01
RB02:RB02 Remote Bit pulse operation, RB02
• •
• •
• •
RB01:RB02 Remote Bit pairs RB01–RB02
• •
• •
• •
10, 12 OCS Open Circuit Breaker S control
10, 12 CCS Close Circuit Breaker S control
10, 12 OCT Open Circuit Breaker T control
10, 12 CCT Close Circuit Breaker T control
10, 12 OCU Open Circuit Breaker U control
10, 12 CCU Close Circuit Breaker U control
10, 12 OCY Open Circuit Breaker Y control
10, 12 CCY Close Circuit Breaker Y control
10, 12 OCS:CCS Open/Close Circuit Breaker S control pair
10, 12 OCT:CCT Open/Close Circuit Breaker T control pair
10, 12 OCU:CCU Open/Close Circuit Breaker U control pair
10, 12 OCY:CCY Open/Close Circuit Breaker Y control pair

DNP3 Communication
Table 10.11 SEL-400G Binary Output Reference Data Map (Sheet 2 of 2)
10, 12 89OC01–89OC10 Open Disconnect Control 1–10

10, 12 89CC01–89CC10 Close Disconnect Control 1–10
10, 12 89OC01:89CC01 Open/Close Disconnect Control Pair 1
89OC02:89CC02 Open/Close Disconnect Control Pair 2
• •
• •
• •
89OC10:89CC10 Open/Close Disconnect Control Pair 10
10, 12 RST_DEM Reset demand meter data
10, 12 RST_PDM Reset peak demand meter data
10, 12 RST_ENE Reset accumulated energy meter data
10, 12 RST_BKS Reset Breaker S monitor data
10, 12 RST_BKT Reset Breaker T monitor data
10, 12 RST_BKU Reset Breaker U monitor data
10, 12 RST_BKY Reset Breaker Y monitor data
10, 12 RST_MM Reset min/max metering
10, 12 RST_BAT Reset battery monitoring
10, 12 RST_HAL Reset alarm pulsing
10, 12 RSTTRGT Reset targets
10, 12 RSTDNPE Reset (clear) DNP event summary registers
10, 12 NXTEVE Load next event into DNP event summary registers
Table 10.12 shows the Binary Counter reference map. See Counters on
page 16.23 in the SEL-400 Series Relays Instruction Manual for additional infor-
mation.
Table 10.12 SEL-400G Binary Counter Reference Data Map (Sheet 1 of 2)
20, 22 ACTGRP Active settings group

20, 22 BKRSOP Number of Breaker S operations
20, 22 BKRTOP Number of Breaker T operations
20, 22 BKRUOP Number of Breaker U operations
20, 22 BKRYOP Number of Breaker Y operations
20, 22 ACN01CV– Automation SELOGIC counter values
ACN32CV
20, 22 PCN01CV– Protection SELOGIC counter values
PCN32CV
20, 22 3PSKWHPa Three-phase active energy exported (kWh), Terminal S
a
20, 22 3QSKVHP Three-phase reactive energy exported (kVARh), Terminal S
a
20, 22 3PSKWHN Three-phase active energy imported (kWh), Terminal S
a
20, 22 3QSKVHN Three-phase reactive energy imported (kVARh), Terminal S
a
20, 22 3PTKWHP Three-phase active energy exported (kWh), Terminal T
a
20, 22 3QTKVHP Three-phase reactive energy exported (kVARh), Terminal T
a
20, 22 3PTKWHN Three-phase active energy imported (kWh), Terminal T

DNP3 Communication
Table 10.12 SEL-400G Binary Counter Reference Data Map (Sheet 2 of 2)

a
20, 22 3QTKVHN Three-phase reactive energy imported (kVARh), Terminal T
a
20, 22 3PUKWHP Three-phase active energy exported (kWh), Terminal U
a
20, 22 3QUKVHP Three-phase reactive energy exported (kVARh), Terminal U
20, 22 3PUKWHNa Three-phase active energy imported (kWh), Terminal U
a
20, 22 3QUKVHN Three-phase reactive energy imported (kVARh), Terminal U
a
20, 22 3PYKWHP Three-phase active energy exported (kWh), Terminal Y
a
20, 22 3QYKVHP Three-phase reactive energy exported (kVARh), Terminal Y
20, 22 3PYKWHNa Three-phase active energy imported (kWh), Terminal Y
a
20, 22 3QYKVHN Three-phase reactive energy imported (kVARh), Terminal Y
a
20, 22 3PGKWHP Three-phase active energy exported (kWh), Terminal G
a
20, 22 3QGKVHP Three-phase reactive energy exported (kVARh), Terminal G
a
20, 22 3PGKWHN Three-phase active energy imported (kWh), Terminal G
a
20, 22 3QGKVHN Three-phase reactive energy imported (kVARh), Terminal G
a
Converts to the absolute value and forces the counter to a positive value.
Table 10.13 shows the Analog Input reference map. The SEL-400G scales analog
values by the indicated settings or fixed scaling. Analog inputs for event (fault)
summary reporting use a default scale factor of 1 and deadband of ANADBM.
Per-point scaling and deadband settings specified in a custom DNP3 map will
override defaults.
Table 10.13 SEL-400G Analog Input Reference Data Map (Sheet 1 of 10)

a
30, 32 FREQPP Frequency for P class synchrophasor data (Hz)
a
30, 32 DFDTPP Rate-of-change of frequency for P class synchrophasor data (Hz/s)
b
30, 32 VAVFMC, VAVFAC 40 ms average filtered, A-Phase voltage magnitude (kV) and angle, V-PT
b
30, 32 VBVFMC, VBVFAC 40 ms average filtered, B-Phase voltage magnitude (kV) and angle, V-PT
b
30, 32 VCVFMC, VCVFAC 40 ms average filtered, C-Phase voltage magnitude (kV) and angle, V-PT
30, 32 VAZFMC, VAZFACb 40 ms average filtered, A-Phase voltage magnitude (kV) and angle, Z-PT
b
30, 32 VBZFMC, VBZFAC 40 ms average filtered, B-Phase voltage magnitude (kV) and angle, Z-PT
b
30, 32 VCZFMC, VCZFAC 40 ms average filtered, C-Phase voltage magnitude (kV) and angle, Z-PT
b
30, 32 VABVFMC, VABVFAC 40 ms average filtered, AB-Phase voltage magnitude (kV) and angle, V-PT
b
30, 32 VBCVFMC, VBCVFAC 40 ms average filtered, BC-Phase voltage magnitude (kV) and angle, V-PT
b
30, 32 VCAVFMC, VCAVFAC 40 ms average filtered, CA-Phase voltage magnitude (kV) and angle, V-PT
b
30, 32 VABZFMC, VABZFAC 40 ms average filtered, AB-Phase voltage magnitude (kV) and angle, Z-PT
b
30, 32 VBCZFMC, VBCZFAC 40 ms average filtered, BC-Phase voltage magnitude (kV) and angle, Z-PT
30, 32 VCAZFMC, VCAZFACb 40 ms average filtered, CA-Phase voltage magnitude (kV) and angle, Z-PT
30, 32 VAZRCc 40 ms average rms, A-Phase voltage magnitude (kV), Z-PT
c
30, 32 VBZRC 40 ms average rms, B-Phase voltage magnitude (kV), Z-PT
c
30, 32 VCZRC 40 ms average rms, C-Phase voltage magnitude (kV), Z-PT
c
30, 32 VABZRC 40 ms average rms, AB-Phase voltage magnitude (kV), Z-PT
c
30, 32 VBCZRC 40 ms average rms, BC-Phase voltage magnitude (kV), Z-PT
c
30, 32 VCAZRC 40 ms average rms, CA-Phase voltage magnitude (kV), Z-PT

DNP3 Communication

b
30, 32 V1VMC, V1VAC 40 ms average, positive-sequence voltage magnitude (kV) and angle, V-PT
b
30, 32 V1ZMC, V1ZAC 40 ms average, positive-sequence voltage magnitude (kV) and angle, Z-PT
b
30, 32 3V2VMC, 3V2VAC 40 ms average, negative-sequence voltage magnitude (kV) and angle, V-PT
30, 32 3V2ZMC, 3V2ZACb 40 ms average, negative-sequence voltage magnitude (kV) and angle, Z-PT
b
30, 32 3V0VMC, 3V0VAC 40 ms average, zero-sequence voltage magnitude (kV) and angle, V-PT
b
30, 32 3V0ZMC, 3V0ZAC 40 ms average, zero-sequence voltage magnitude (kV) and angle, Z-PT
b
30, 32 VN3FMC, VN3FAC 40 ms average filtered, generator neutral third-harmonic voltage magnitude (kV) and angle
30, 32 3V0Z3MC, 3V0Z3ACb 40 ms average filtered, generator terminal third-harmonic voltage magnitude (kV) and angle
b
30, 32 VG3FMC, VG3FAC 40 ms average filtered, total neutral third-harmonic voltage magnitude (kV) and angle
b
30, 32 VNFMC, VNFAC 40 ms average filtered, generator neutral voltage magnitude (kV) and angle
d
30, 32 IASFMC, IASFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, A-Phase, Terminal S
d
30, 32 IBSFMC, IBSFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, B-Phase, Terminal S
d
30, 32 ICSFMC, ICSFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, C-Phase, Terminal S
d
30, 32 IATFMC, IATFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, A-Phase, Terminal T
d
30, 32 IBTFMC, IBTFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, B-Phase, Terminal T
30, 32 ICTFMC, ICTFACd 40 ms average filtered phase current magnitude (amperes primary) and angle, C-Phase, Terminal T
d
30, 32 IAUFMC, IAUFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, A-Phase, Terminal U
d
30, 32 IBUFMC, IBUFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, B-Phase, Terminal U
d
30, 32 ICUFMC, ICUFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, C-Phase, Terminal U
d
30, 32 IAYFMC, IAYFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, A-Phase, Terminal Y
d
30, 32 IBYFMC, IBYFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, B-Phase, Terminal Y
d
30, 32 ICYFMC, ICYFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, C-Phase, Terminal Y
d
30, 32 IAGFMC, IAGFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, A-Phase, Terminal G
30, 32 IBGFMC, IBGFACd 40 ms average filtered phase current magnitude (amperes primary) and angle, B-Phase, Terminal G
d
30, 32 ICGFMC, ICGFAC 40 ms average filtered phase current magnitude (amperes primary) and angle, C-Phase, Terminal G
d
30, 32 IY1FMC, IY1FAC 40 ms average filtered phase current magnitude (amperes primary) and angle, Channel 1,
Terminal Y
30, 32 IY2FMC, IY2FACd 40 ms average filtered phase current magnitude (amperes primary) and angle, Channel 2,
Terminal Y
30, 32 IY3FMC, IY3FACd 40 ms average filtered phase current magnitude (amperes primary) and angle, Channel 3,
Terminal Y
30, 32 IAGRCe 40 ms average rms phase current magnitude (amperes primary), A-Phase, Terminal G
e
30, 32 IBGRC 40 ms average rms phase current magnitude (amperes primary), B-Phase, Terminal G
e
30, 32 ICGRC 40 ms average rms phase current magnitude (amperes primary), C-Phase, Terminal G
d
30, 32 I1SMC, I1SAC 40 ms average positive-sequence current magnitude (amperes primary) and angle, Terminal S
d
30, 32 I1TMC, I1TAC 40 ms average positive-sequence current magnitude (amperes primary) and angle, Terminal T
d
30, 32 I1UMC, I1UAC 40 ms average positive-sequence current magnitude (amperes primary) and angle, Terminal U
d
30, 32 I1YMC, I1YAC 40 ms average positive-sequence current magnitude (amperes primary) and angle, Terminal Y
30, 32 I1GMC, I1GACd 40 ms average positive-sequence current magnitude (amperes primary) and angle, Terminal G
d
30, 32 3I2SMC, 3I2SAC 40 ms average negative-sequence current magnitude (amperes primary) and angle, Terminal S
d
30, 32 3I2TMC, 3I2TAC 40 ms average negative-sequence current magnitude (amperes primary) and angle, Terminal T
d
30, 32 3I2UMC, 3I2UAC 40 ms average negative-sequence current magnitude (amperes primary) and angle, Terminal U

DNP3 Communication

d
30, 32 3I2YMC, 3I2YAC 40 ms average negative-sequence current magnitude (amperes primary) and angle, Terminal Y
d
30, 32 3I2GMC, 3I2GAC 40 ms average negative-sequence current magnitude (amperes primary) and angle, Terminal G
d
30, 32 3I0SMC, 3I0SAC 40 ms average zero-sequence current magnitude (amperes primary) and angle, Terminal S
30, 32 3I0TMC, 3I0TACd 40 ms average zero-sequence current magnitude (amperes primary) and angle, Terminal T
d
30, 32 3I0UMC, 3I0UAC 40 ms average zero-sequence current magnitude (amperes primary) and angle, Terminal U
d
30, 32 3I0YMC, 3I0YAC 40 ms average zero-sequence current magnitude (amperes primary) and angle, Terminal Y
d
30, 32 3I0GMC, 3I0GAC 40 ms average zero-sequence current magnitude (amperes primary) and angle, Terminal G
30, 32 IAGRSe 1 s average rms phase current magnitude (amperes secondary), A-Phase, Terminal G
e
30, 32 IBGRS 1 s average rms phase current magnitude (amperes secondary), B-Phase, Terminal G
e
30, 32 ICGRS 1 s average rms phase current magnitude (amperes secondary), C-Phase, Terminal G
e
30, 32 3I2SMS 1 s average negative-sequence current magnitude, (amperes secondary), Terminal S
e
30, 32 3I2TMS 1 s average negative-sequence current magnitude, (amperes secondary), Terminal T
e
30, 32 3I2UMS 1 s average negative-sequence current magnitude, (amperes secondary), Terminal U
e
30, 32 3I2YMS 1 s average negative-sequence current magnitude, (amperes secondary), Terminal Y
e
30, 32 3I2GMS 1 s average negative-sequence current magnitude, (amperes secondary), Terminal G
30, 32 3I0SMSe 1 s average zero-sequence current magnitude, (amperes secondary), Terminal S
e
30, 32 3I0TMS 1 s average zero-sequence current magnitude, (amperes secondary), Terminal T
e
30, 32 3I0UMS 1 s average zero-sequence current magnitude, (amperes secondary), Terminal U
e
30, 32 3I0YMS 1 s average zero-sequence current magnitude, (amperes secondary), Terminal Y
e
30, 32 3I0GMS 1 s average zero-sequence current magnitude, (amperes secondary), Terminal G
f
30, 32 PASFC 40 ms average phase fundamental active power magnitude (megawatts primary), A-Phase,
Terminal S
30, 32 PBSFCf 40 ms average phase fundamental active power magnitude (megawatts primary), B-Phase,
Terminal S
30, 32 PCSFCf 40 ms average phase fundamental active power magnitude (megawatts primary), C-Phase,
Terminal S
30, 32 PATFCf 40 ms average phase fundamental active power magnitude (megawatts primary), A-Phase,
Terminal T
30, 32 PBTFCf 40 ms average phase fundamental active power magnitude (megawatts primary), B-Phase,
Terminal T
30, 32 PCTFCf 40 ms average phase fundamental active power magnitude (megawatts primary), C-Phase,
Terminal T
30, 32 PAUFCf 40 ms average phase fundamental active power magnitude (megawatts primary), A-Phase,
Terminal U
30, 32 PBUFCf 40 ms average phase fundamental active power magnitude (megawatts primary), B-Phase,
Terminal U
30, 32 PCUFCf 40 ms average phase fundamental active power magnitude (megawatts primary), C-Phase,
Terminal U
30, 32 PAYFCf 40 ms average phase fundamental active power magnitude (megawatts primary), A-Phase, Terminal Y
f
30, 32 PBYFC 40 ms average phase fundamental active power magnitude (megawatts primary), B-Phase, Terminal Y
f
30, 32 PCYFC 40 ms average phase fundamental active power magnitude (megawatts primary), C-Phase, Terminal Y
f
30, 32 PAGFC 40 ms average phase fundamental active power magnitude (megawatts primary), A-Phase, Terminal G
f
30, 32 PBGFC 40 ms average phase fundamental active power magnitude (megawatts primary), B-Phase, Terminal G
f
30, 32 PCGFC 40 ms average phase fundamental active power magnitude (megawatts primary), C-Phase, Terminal G

DNP3 Communication

f
30, 32 QASFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), A-Phase, Terminal S
f
30, 32 QBSFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), B-Phase, Terminal S
f
30, 32 QCSFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), C-Phase, Terminal S
30, 32 QATFCf 40 ms average phase fundamental reactive power magnitude (MVAR primary), A-Phase, Terminal T
f
30, 32 QBTFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), B-Phase, Terminal T
f
30, 32 QCTFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), C-Phase, Terminal T
f
30, 32 QAUFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), A-Phase, Terminal U
30, 32 QBUFCf 40 ms average phase fundamental reactive power magnitude (MVAR primary), B-Phase, Terminal U
f
30, 32 QCUFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), C-Phase, Terminal U
f
30, 32 QAYFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), A-Phase, Terminal Y
f
30, 32 QBYFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), B-Phase, Terminal Y
f
30, 32 QCYFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), C-Phase, Terminal Y
f
30, 32 QAGFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), A-Phase, Terminal G
f
30, 32 QBGFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), B-Phase, Terminal G
f
30, 32 QCGFC 40 ms average phase fundamental reactive power magnitude (MVAR primary), C-Phase, Terminal G
30, 32 SASFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), A-Phase,
Terminal S
30, 32 SBSFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), B-Phase,
Terminal S
30, 32 SCSFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), C-Phase,
Terminal S
30, 32 SATFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), A-Phase,
Terminal T
30, 32 SBTFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), B-Phase,
Terminal T
30, 32 SCTFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), C-Phase,
Terminal T
30, 32 SAUFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), A-Phase,
Terminal U
30, 32 SBUFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), B-Phase,
Terminal U
30, 32 SCUFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), C-Phase,
Terminal U
30, 32 SAYFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), A-Phase,
Terminal Y
30, 32 SBYFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), B-Phase,
Terminal Y
30, 32 SCYFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), C-Phase,
Terminal Y
30, 32 SAGFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), A-Phase,
Terminal G
30, 32 SBGFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), B-Phase,
Terminal G
30, 32 SCGFCf 40 ms average phase fundamental apparent power magnitude (megavolt-ampere primary), C-Phase,
Terminal G
30, 32 3PSFCf 40 ms average three-phase fundamental active power magnitude, (megawatts primary), Terminal S

DNP3 Communication

f
30, 32 3PTFC 40 ms average three-phase fundamental active power magnitude, (megawatts primary), Terminal T
f
30, 32 3PUFC 40 ms average three-phase fundamental active power magnitude, (megawatts primary), Terminal U
f
30, 32 3PYFC 40 ms average three-phase fundamental active power magnitude, (megawatts primary), Terminal Y
30, 32 3PGFCf 40 ms average three-phase fundamental active power magnitude, (megawatts primary), Terminal G
f
30, 32 3QSFC 40 ms average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal S
f
30, 32 3QTFC 40 ms average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal T
f
30, 32 3QUFC 40 ms average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal U
30, 32 3QYFCf 40 ms average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal Y
f
30, 32 3QGFC 40 ms average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal G
f
30, 32 3SSFC 40 ms average three-phase fundamental apparent power magnitude, (megavolt-ampere primary),
Terminal S
30, 32 3STFCf 40 ms average three-phase fundamental apparent power magnitude, (megavolt-ampere primary),
Terminal T
30, 32 3SUFCf 40 ms average three-phase fundamental apparent power magnitude, (megavolt-ampere primary),
Terminal U
30, 32 3SYFCf 40 ms average three-phase fundamental apparent power magnitude, (megavolt-ampere primary),
Terminal Y
30, 32 3SGFCf 40 ms average three-phase fundamental apparent power magnitude, (megavolt-ampere primary),
Terminal G
30, 32 3PSFSf 1 s average three-phase fundamental active power magnitude, (megawatts primary), Terminal S
f
30, 32 3PTFS 1 s average three-phase fundamental active power magnitude, (megawatts primary), Terminal T
f
30, 32 3PUFS 1 s average three-phase fundamental active power magnitude, (megawatts primary), Terminal U
f
30, 32 3PYFS 1 s average three-phase fundamental active power magnitude, (megawatts primary), Terminal Y
f
30, 32 3PGFS 1 s average three-phase fundamental active power magnitude, (megawatts primary), Terminal G
30, 32 3QSFSf 1 s average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal S
f
30, 32 3QTFS 1 s average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal T
f
30, 32 3QUFS 1 s average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal U
f
30, 32 3QYFS 1 s average three-phase fundamental reactive power magnitude, (MVAR primary), Terminal Y
f
30, 32 3QGFS 1 s average three-phase fundamental apparent power magnitude, (MVAR primary), Terminal G
f
30, 32 3SSFS 1 s average three-phase fundamental apparent power magnitude, (megavolt-ampere primary), Terminal S
f
30, 32 3STFS 1 s average three-phase fundamental apparent power magnitude, (megavolt-ampere primary), Terminal T
f
30, 32 3SUFS 1 s average three-phase fundamental apparent power magnitude, (megavolt-ampere primary), Terminal U
30, 32 3SYFSf 1 s average three-phase fundamental apparent power magnitude, (megavolt-ampere primary), Terminal Y
f
30, 32 3SGFS 1 s average three-phase fundamental apparent power magnitude, (megavolt-ampere primary), Terminal G
f
30, 32 PFASC Phase displacement power factor, A-Phase, Terminal S
f
30, 32 PFBSC Phase displacement power factor, B-Phase, Terminal S
f
30, 32 PFCSC Phase displacement power factor, C-Phase, Terminal S
f
30, 32 PFATC Phase displacement power factor, A-Phase, Terminal T
f
30, 32 PFBTC Phase displacement power factor, B-Phase, Terminal T
f
30, 32 PFCTC Phase displacement power factor, C-Phase, Terminal T
30, 32 PFAUCf Phase displacement power factor, A-Phase, Terminal U
f
30, 32 PFBUC Phase displacement power factor, B-Phase, Terminal U
f
30, 32 PFCUC Phase displacement power factor, C-Phase, Terminal U

DNP3 Communication

f
30, 32 PFAYC Phase displacement power factor, A-Phase, Terminal Y
f
30, 32 PFBYC Phase displacement power factor, B-Phase, Terminal Y
f
30, 32 PFCYC Phase displacement power factor, C-Phase, Terminal Y
30, 32 PFAGCf Phase displacement power factor, A-Phase, Terminal G
f
30, 32 PFBGC Phase displacement power factor, B-Phase, Terminal G
f
30, 32 PFCGC Phase displacement power factor, C-Phase, Terminal G
f
30, 32 3PFSC Three-phase displacement power factor, Terminal S
30, 32 3PFTCf Three-phase displacement power factor, Terminal T
f
30, 32 3PFUC Three-phase displacement power factor, Terminal U
f
30, 32 3PFYC Three-phase displacement power factor, Terminal Y
f
30, 32 3PFGC Three-phase displacement power factor, Terminal G
e
30, 32 DM01 Demand metering Element 1 value, amperes secondary
e
e
e
30, 32 DM05e Demand metering Element 5 value, amperes secondary
e
e
e
e
e
e
30, 32 DMM01 Demand metering Element 1 maximum value, amperes secondary
e
30, 32 DMM03e Demand metering Element 3 maximum value, amperes secondary
e
e
e
e
e
e
e
30, 32 RTS01TV–RTS24TVh RTD temperature value in degrees C, RTS01–RTS24
h
30, 32 RTC01TV–RTC24TV Remote temperature value in degrees C, RTC01–RTC24
h
30, 32 MAMB1 Ambient temperature value in degrees C, Element 1
h
h
f
30, 32 3PSMWHP Three-phase active energy exported, Terminal S (megawatt hours, primary)
f
30, 32 3PTMWHP Three-phase active energy exported, Terminal T (megawatt hours, primary)
f
30, 32 3PUMWHP Three-phase active energy exported, Terminal U (megawatt hours, primary)
30, 32 3PYMWHPf Three-phase active energy exported, Terminal Y (megawatt hours, primary)
f
30, 32 3PGMWHP Three-phase active energy exported, Terminal G (megawatt hours, primary)

DNP3 Communication

f
30, 32 3QSMVHP Three-phase reactive energy exported, Terminal S (MVAR hours, primary)
f
30, 32 3QTMVHP Three-phase reactive energy exported, Terminal T (MVAR hours, primary)
f
30, 32 3QUMVHP Three-phase reactive energy exported, Terminal U (MVAR hours, primary)
30, 32 3QYMVHPf Three-phase reactive energy exported, Terminal Y (MVAR hours, primary)
f
30, 32 3QGMVHP Three-phase reactive energy exported, Terminal G (MVAR hours, primary)
f
30, 32 3PSMWHN Three-phase active energy imported, Terminal S (megawatt hours, primary)
f
30, 32 3PTMWHN Three-phase active energy imported, Terminal T (megawatt hours, primary)
30, 32 3PUMWHNf Three-phase active energy imported, Terminal U (megawatt hours, primary)
f
30, 32 3PYMWHN Three-phase active energy imported, Terminal Y (megawatt hours, primary)
f
30, 32 3PGMWHN Three-phase active energy imported, Terminal G (megawatt hours, primary)
f
30, 32 3QSMVHN Three-phase reactive energy imported, Terminal S (MVAR hours, primary)
f
30, 32 3QTMVHN Three-phase reactive energy imported, Terminal T (MVAR hours, primary)
f
30, 32 3QUMVHN Three-phase reactive energy imported, Terminal U (MVAR hours, primary)
f
30, 32 3QYMVHN Three-phase reactive energy imported, Terminal Y (MVAR hours, primary)
f
30, 32 3QGMVHN Three-phase reactive energy imported, Terminal G (MVAR hours, primary)
30, 32 3PSMWHTf Total three-phase active energy, Terminal S (megawatt hours, primary)
f
30, 32 3PTMWHT Total three-phase active energy, Terminal T (megawatt hours, primary)
f
30, 32 3PUMWHT Total three-phase active energy, Terminal U (megawatt hours, primary)
f
30, 32 3PYMWHT Total three-phase active energy, Terminal Y (megawatt hours, primary)
f
30, 32 3PGMWHT Total three-phase active energy, Terminal G (megawatt hours, primary)
f
30, 32 3QSMVHT Total three-phase reactive energy, Terminal S (MVAR hours, primary)
f
30, 32 3QTMVHT Total three-phase reactive energy, Terminal T (MVAR hours, primary)
f
30, 32 3QUMVHT Total three-phase reactive energy, Terminal U (MVAR hours, primary)
30, 32 3QYMVHTf Total three-phase reactive energy, Terminal Y (MVAR hours, primary)
f
30, 32 3QGMVHT Total three-phase reactive energy, Terminal G (MVAR hours, primary)
f
30, 32 40PQMX Loss-of-field Zone 4 maximum reactive power limit (VARs sec)
f
30, 32 40PPMX Loss-of-field Zone 4 maximum active power limit (W sec)
f
30, 32 40PQMN Loss-of-field Zone 4 minimum reactive power limit (VARs sec)
f
30, 32 40PPLG Loss-of-field Zone 4 active power lag PF limit (W sec)
f
30, 32 40PPLD Loss-of-field Zone 4 active power lead PF limit (W sec)
f
30, 32 40PPU Loss-of-field Zone 4 active power UPF limit (W sec)
30, 32 40PQZ2f Loss-of-field Zone 2 reactive power limit (VARs sec)
h
30, 32 78GCN Out-of-step generator pole slip count
h
30, 32 78SCN Out-of-step system pole slip count
h
30, 32 78CN Out-of-step common pole slip count
c
30, 32 60LDVM 60 LOP voltage unbalance magnitude (V sec)
h
30, 32 81AB1S 81A element Band 1 accumulated time (s)
h
h
30, 32 81AB4Sh 81A element Band 4 accumulated time (s)
h

DNP3 Communication

h
h
h
30, 32 THTCU1h IEC thermal capacity used, Element 1
h
30, 32 THTCU2 IEC thermal capacity used, Element 2
h
30, 32 THTCU3 IEC thermal capacity used, Element 3
g
30, 32 I2GPEQ Generator negative-sequence equivalent harmonic current (%)
30, 32 I2GPg Generator fundamental negative-sequence current (%)
h
30, 32 64SIR 64S stator insulation resistance (k)
h
30, 32 64SIC 64S stator insulation capacitance (F)
h
30, 32 64FIR 64F field insulation resistance (k)
e
30, 32 I60PAOF 60P A-Phase offset current magnitude (A sec)
e
30, 32 I60PBOF 60P B-Phase offset current magnitude (A sec)
e
30, 32 I60PCOF 60P C-Phase offset current magnitude (A sec)
e
30, 32 I60PAOP 60P A-Phase operating current magnitude (A sec)
30, 32 I60PBOPe 60P B-Phase operating current magnitude (A sec)
e
30, 32 I60PCOP 60P C-Phase operating current magnitude (A sec)
e
30, 32 I60NOF 60N offset current magnitude (A sec)
e
30, 32 I60NOP 60N operating current magnitude (A sec)
a
30, 32 FREQPG Generator tracking frequency (Hz)
a
30, 32 FREQPS System tracking frequency (Hz)
a
30, 32 DFREQPG Generator rate-of-change of frequency (Hz/s)
a
30, 32 DFREQPS System rate-of-change of frequency (Hz/s)
30, 32 VDCh Station battery dc voltage (V)
h
30, 32 DCPO Average positive-to-ground dc voltage (V)
h
30, 32 DCNE Average negative-to-ground dc voltage (V)
h
30, 32 DCRI AC ripple of dc voltage (V)
h
30, 32 DCMIN Minimum dc voltage (V)
h
30, 32 DCMAX Maximum dc voltage (V)
h
30, 32 PMV01–PMV64 Protection SELOGIC math variable
h
30, 32 AMV001–AMV256 Automation SELOGIC math variable
30, 32 PCN01CV–PCN32CVh Protection SELOGIC counter current value
h
30, 32 ACN01CV–ACN32CV Automation SELOGIC counter current value
h
30, 32 ACTGRP Active group setting
h
30, 32 TODMS UTC time of day in milliseconds (0–86400000)
h
30, 32 THR UTC time, hour (0–23)
h
30, 32 TMIN UTC time, minute (0–59)
h
30, 32 TSEC UTC time, seconds (0–59)
h
30, 32 TMSEC UTC time, milliseconds (0–999)
30, 32 DDOWh UTC date, day of the week (1–SU, ..., 7–SA)
h
30, 32 DDOM UTC date, day of the month (1–31)

DNP3 Communication

h
30, 32 DDOY UTC date, day of the year (1–366)
h
30, 32 DMON UTC date, month (1–12)
h
30, 32 DYEAR UTC date, year (2000–2200)
30, 32 TLODMSh Local time of day in milliseconds (0–86400000)
h
30, 32 TLHR Local time, hour (0–23)
h
30, 32 TLMIN Local time, minute (0–59)
h
30, 32 TLSEC Local time, seconds (0–59)
30, 32 TLMSECh Local time, milliseconds (0–999)
h
30, 32 DLDOW Local date, day of the week (1-SU,.., 7-SA)
h
30, 32 DLDOM Local date, day of the month (1–31)
h
30, 32 DLDOY Local date, day of the year (1–366)
h
30, 32 DLMON Local date, month (1–12)
h
30, 32 DLYEAR Local date, year (2000–2200)
h
30, 32 TUTC Offset from IRIG-B time to UTC time
h
30, 32 TQUAL Worst case IRIG-B clock time error
30, 32 RA001–RA256h Remote analogs
g
30, 32 BSBCWPA Breaker contact wear for Pole A for Breaker S (%)
g
30, 32 BSBCWPB Breaker contact wear for Pole B for Breaker S (%)
g
30, 32 BSBCWPC Breaker contact wear for Pole C for Breaker S (%)
g
30, 32 BTBCWPA Breaker contact wear for Pole A for Breaker T (%)
g
30, 32 BTBCWPB Breaker contact wear for Pole B for Breaker T (%)
g
30, 32 BTBCWPC Breaker contact wear for Pole C for Breaker T (%)
g
30, 32 BUBCWPA Breaker contact wear for Pole A for Breaker U (%)
30, 32 BUBCWPBg Breaker contact wear for Pole B for Breaker U (%)
g
30, 32 BUBCWPC Breaker contact wear for Pole C for Breaker U (%)
g
30, 32 BYBCWPA Breaker contact wear for Pole A for Breaker Y (%)
g
30, 32 BYBCWPB Breaker contact wear for Pole B for Breaker Y (%)
g
30, 32 BYBCWPC Breaker contact wear for Pole C for Breaker Y (%)
h
30, 32 RLYTEMP Relay temperature (temperature of the box, degrees C)
h
30, 32 RAO01–RAO64 Remote analog output
b
30, 32 25VPFM, 25VPFA 25 synchronism-check polarizing voltage magnitude, (volts secondary) and angle
30, 32 25VSSFM, 25VSSFAb 25 synchronism-check synchronizing voltage magnitude for Breaker S (volts secondary) and angle
b
30, 32 25VSTFM, 25VSTFA 25 synchronism-check synchronizing voltage magnitude for Breaker T (volts secondary) and angle
b
30, 32 25VSUFM, 25VSUFA 25 synchronism-check synchronizing voltage magnitude for Breaker U (volts secondary) and angle
b
30, 32 25VSYFM, 25VSYFA 25 synchronism-check synchronizing voltage magnitude for Breaker Y (volts secondary) and angle
a
30, 32 25ANGS 25 synchronism-check angle difference for Breaker S
a
30, 32 25ANGT 25 synchronism-check angle difference for Breaker T
a
30, 32 25ANGU 25 synchronism-check angle difference for Breaker U
a
30, 32 25ANGY 25 synchronism-check angle difference for Breaker Y
30, 32 25ANGCSa 25 synchronism-check compensated angle difference for Breaker S
a
30, 32 25ANGCT 25 synchronism-check compensated angle difference for Breaker T

DNP3 Communication

a
30, 32 25ANGCU 25 synchronism-check compensated angle difference for Breaker U
a
30, 32 25ANGCY 25 synchronism-check compensated angle difference for Breaker Y
a
30, 32 25SLIPS 25 synchronism-check slip frequency for Breaker S (Hz)
30, 32 25SLIPTa 25 synchronism-check slip frequency for Breaker T (Hz)
a
30, 32 25SLIPU 25 synchronism-check slip frequency for Breaker U (Hz)
a
30, 32 25SLIPY 25 synchronism-check slip frequency for Breaker Y (Hz)
h
30, 32 25DIFVS 25 synchronism-check voltage difference for Breaker S (%)
30, 32 25DIFVTh 25 synchronism-check voltage difference for Breaker T (%)
h
30, 32 25DIFVU 25 synchronism-check voltage difference for Breaker U (%)
h
30, 32 25DIFVY 25 synchronism-check voltage difference for Breaker Y (%)
h
30, 32 25AFCT 25A autosynchronizer frequency pulse count
h
30, 32 25AVCT 25A autosynchronizer voltage pulse count
h
30, 32 MAXGRP Maximum number of protected groups
Event Summary Analog Inputsi, j
30, 32 FTYPE Fault type
30, 32 FTAR1 Fault targets (upper byte is 1st target row, lower byte is 2nd target row)
30, 32 FTAR2 Fault targets (upper byte is 3rd target row, lower byte is 0)
k
30, 32 FFREQG Generator fault frequency
k
30, 32 FFREQS System fault frequency
30, 32 FGRP Fault active settings group (1–6)
30, 32 FTIMEH Fault time (local) in DNP format, high 16 bits
30, 32 FTIMEM Fault time (local) in DNP format, middle 16 bits
30, 32 FTIMEL Fault time (local) in DNP format, low 16 bits
30, 32 FTIMEUH Fault time (UTC) in DNP format, high 16 bits
30, 32 FTIMEUM Fault time (UTC) in DNP format, middle 16 bits
30, 32 FTIMEUL Fault time (UTC) in DNP format, low 16 bits
30, 32 FUNR Number of unread fault summary reports
a
Default scale factor is 100 and deadband ANADBM.
b Default voltage scaling DECPLV on magnitudes and scale factor of 100 on angles. Deadband ANADBV on magnitudes and ANADBM on angles.
c
Default scale factor is DECPLV and deadband is ANADBV.
d
Default current scaling DECPLA on magnitudes and scale factor of 100 on angles. Deadband ANADBA on magnitudes and ANADBM on angles.
e
Default scale factor is DECPLA and deadband is ANADBA.
f
Default scale factor is DECPLM and deadband is ANADBM.
g
h
i
Unless otherwise indicated, the default scale factor for these points is 1. The default deadband is ANADBM. Per-point scaling and deadband
settings specified in a custom DNP map override these defaults.
j Event data shall be generated for all event summary analog inputs if any of them change beyond their deadband after scaling.
k
Default scale factor is 100.
Table 10.14 shows the Analog Output reference map. See Analog Outputs on
page 16.23 in the SEL-400 Series Relays Instruction Manual for additional information.

DNP3 Communication
Table 10.14 SEL-400G Analog Output Reference Data Map
40, 41 ACTGRP Active settings group (1–6)

40, 41 RA001–RA256 Remote analogs
Binary Outputs
Use the Trip and Close, Latch On/Off and Pulse On operations with Object 12
control relay output block command messages to operate the points shown in
Table 10.15. Pulse operations provide a pulse with a duration of one protection
processing interval. Cancel an operation in progress by issuing a NUL Trip/Close
Code with a NUL Operation Type.
Table 10.15 SEL-400G Object 12 Control Point Operations (Sheet 1 of 2)
Label Close/Any Trip/Any NUL/Latch On NUL/Latch Off NUL/Pulse On NUL/Pulse Off
RB01–RB64 Pulse on Remote Pulse on Remote Set Remote Bits Clear Remote Pulse on Remote Clear Remote Bits
Bits RB01–RB64 Bits RB01–RB64 RB01–RB64 Bits RB01–RB64 Bits RB01–RB64 RB01–RB64
RBxx: RByy Pulse RByy Pulse RBxx Pulse RByy Pulse RBxx Pulse RByy Pulse RBxx
OCS Open Circuit Open Circuit Set OCS Clear OCS Open Circuit Clear OCS
Breaker S (pulse Breaker S (pulse Breaker S (pulse
OCS) OCS) OCS)
CCS Close Circuit Close Circuit Set CCS Clear CCS Close Circuit Clear CCS
Breaker S (pulse Breaker S (pulse Breaker S (pulse
CCS) CCS) CCS)
OCT Open Circuit Open Circuit Set OCT Clear OCT Open Circuit Clear OCT
Breaker T (pulse Breaker T (pulse Breaker T (pulse
OCT) OCT) OCT)
CCT Close Circuit Close Circuit Set CCT Clear CCT Close Circuit Clear CCT
Breaker T (pulse Breaker T (pulse Breaker T (pulse
CCT) CCT) CCT)
OCU Open Circuit Open Circuit Set OCU Clear OCU Open Circuit Clear OCU
Breaker U (pulse Breaker U (pulse Breaker U (pulse
OCU) OCU) OCU)
CCU Close Circuit Close Circuit Set CCU Clear CCU Close Circuit Clear CCU
Breaker U (pulse Breaker U (pulse Breaker U (pulse
CCU) CCU) CCU)
OCY Open Circuit Open Circuit Set OCY Clear OCY Open Circuit Clear OCY
Breaker Y (pulse Breaker Y (pulse Breaker Y (pulse
OCY) OCY) OCY)
CCY Close Circuit Close Circuit Set CCY Clear CCY Close Circuit Clear CCY
Breaker Y (pulse Breaker Y (pulse Breaker Y (pulse
CCY) CCY) CCY)
OCS: CCS Pulse CCS, Circuit Pulse OCS, Cir- Pulse CCS, Circuit Pulse OCS, Cir- Pulse CCS, Cir- Pulse OCS, Cir-
Breaker S close bit cuit Breaker S Breaker S close bit cuit Breaker S cuit Breaker S cuit Breaker S
open bit open bit close bit open bit
OCT: CCT Pulse CCT, Circuit Pulse OCT, Cir- Pulse CCT, Circuit Pulse OCT, Cir- Pulse CCT, Cir- Pulse OCT, Cir-
Breaker T close bit cuit Breaker T Breaker T close bit cuit Breaker T cuit Breaker T cuit Breaker T
open bit open bit close bit open bit
OCU: CCU Pulse CCU, Circuit Pulse OCU, Cir- Pulse CCU, Cir- Pulse OCU, Cir- Pulse CCU, Cir- Pulse OCU, Cir-
Breaker U close bit cuit Breaker U cuit Breaker U cuit Breaker U cuit Breaker U cuit Breaker U
open bit close bit open bit close bit open bit

DNP3 Communication
Table 10.15 SEL-400G Object 12 Control Point Operations (Sheet 2 of 2)
Label Close/Any Trip/Any NUL/Latch On NUL/Latch Off NUL/Pulse On NUL/Pulse Off
OCY: CCY Pulse CCY, Circuit Pulse OCY, Cir- Pulse CCY, Circuit Pulse OCY, Cir- Pulse CCY, Cir- Pulse OCY, Cir-
Breaker Y close bit cuit Breaker Y Breaker Y close cuit Breaker Y cuit Breaker Y cuit Breaker Y
open bit bit open bit close bit open bit
89OC01– Pulse 89OC01– Pulse 89OC01– Set 89OC01– Clear 89OC01– Pulse 89OC01– Clear 89OC01–
89OC10 89OC10, discon- 89OC10, discon- 89OC10, discon- 89OC10, discon- 89OC10, discon- 89OC10, discon-
nect open bit nect open bit nect open bit nect open bit nect open bit nect open bit
89CC01– Pulse 89CC01– Pulse 89CC01– Set 89CC01– Clear 89CC01– Pulse 89CC01– Clear 89CC01–
89CC10 89CC10, discon- 89CC10, discon- 89CC10, discon- 89CC10, discon- 89CC10, discon- 89CC10, discon-
nect close bit nect close bit nect close bit nect close bit nect close bit nect close bit
89OCx: Pulse 89CCx, Pulse 89OCx, dis- Pulse 89CCx, dis- Pulse 89OCx, dis- Pulse 89CCx, dis- Pulse 89OCx, dis-
89CCx disconnect close bit connect open bit connect close bit connect open bit connect close bit connect open bit
RST_DEM Reset demand Reset demand Reset demand No action Reset demand No action
meter data meter data meter data meter data
RST_PDM Reset peak demand Reset peak Reset peak No action Reset peak No action
meter data demand meter demand meter data demand meter
data data
RST_ENE Reset energy Reset energy Reset energy No action Reset energy No action
accumulators accumulators accumulators accumulators
RST_BKS Reset Breaker Reset Breaker Reset Breaker No action Reset Breaker No action
Monitor S (pulse Monitor S (pulse Monitor S (pulse Monitor S (pulse
RSS_BKS) RSS_BKS) RSS_BKS) RSS_BKS)
RST_BKT Reset Breaker Reset Breaker Reset Breaker No action Reset Breaker No action
Monitor T (pulse Monitor T (pulse Monitor T (pulse Monitor T (pulse
RSS_BKT) RSS_BKT) RSS_BKT) RSS_BKT)
RST_BKU Reset Breaker Reset Breaker Reset Breaker No action Reset Breaker No action
Monitor U (pulse Monitor U (pulse Monitor U (pulse Monitor U (pulse
RSS_BKU) RSS_BKU) RSS_BKU) RSS_BKU)
RST_BKY Reset Breaker Reset Breaker Reset Breaker No action Reset Breaker No action
Monitor Y (pulse Monitor Y (pulse Monitor Y (pulse Monitor Y (pulse
RSS_BKY) RSS_BKY) RSS_BKY) RSS_BKY)
RST_MM Reset min/max Reset min/max Reset min/max No action Reset min/max No action
metering metering metering metering
RST_BAT Reset battery moni- Reset battery Reset battery mon- No action Reset battery No action
toring (pulse monitoring (pulse itoring (pulse monitoring (pulse
RSS_BAT) RSS_BAT) RSS_BAT) RSS_BAT)
RST_HAL Reset alarm puls- Reset alarm puls- Reset alarm puls- No action Reset alarm puls- No action
ing (pulse ing (pulse ing (pulse ing (pulse
RSS_HAL) RSS_HAL) RSS_HAL) RSS_HAL)
RSTTRGT Reset front-panel Reset front-panel Reset front-panel No action Reset front-panel No action
targets (pulse targets (pulse targets targets
RSTTRGT) RSTTRGT)
RSTDNPE Reset DNP event Reset DNP event Reset DNP event No action Reset DNP event No action
summary summary summary summary
NXTEVE Load oldest event Load oldest event Load oldest event Load newest Load oldest event Load newest event
summary (FIFO) summary (FIFO) summary (FIFO) event summary summary (FIFO) summary (LIFO)
(LIFO)

DNP3 Communication
Relay Fault Summary Data

When a relay event occurs (TRIP asserts, ER asserts, or TRI asserts), the data
will be made available to DNP.
In either mode, DNP3 events for all event summary analog inputs (see
Table 10.13) will be generated if any of them change beyond their deadband
value after scaling (usually whenever a new relay event occurs and is loaded into
the event summary analog inputs). Events are detected approximately twice a
second by the scanning process.
See Table 10.16 for the components of the FTYPE analog input point. If no bits
are asserted, no fault summary is loaded.
Table 10.16 Object 30, 32, FTYPE Event Cause
Bit Position (Upper Byte) Value Event Cause
7 6 5 4 3 2 1 0
X 1 Trigger command
X 2 Event report element
X 4 Trip element
X 8 Auxiliary trip
X 16 Prime mover trip
X 32 Excitation trip
X 64 Restricted earth fault trip
X 128 Zone 2 differential trip
Bit Position (Lower Byte)
7 6 5 4 3 2 1 0
X 1 Zone 1 differential trip
Default Data Map

Table 10.17–Table 10.21 shows the SEL-400G default data maps by DNP3 object
or point type. The default data maps are automatically generated subsets of the
reference map. All data maps are initialized to these default values. If the default
maps do not fit your particular application, you can use the custom DNP mapping
commands SET D n and SHOW D n, where n is the map number, to edit or cre-
ate the map you require.
Table 10.17 SEL-400G DNP3 Default Binary Input Data Map (Sheet 1 of 4)
Object Default Index Label Description
01, 02 0 RLYDIS Relay disabled

01, 02 1 TRIPLED Trip LED
01, 02 2 STFAIL Relay diagnostic failure
01, 02 3 STWARN Relay diagnostic warning
01, 02 4 STSET Settings have changed or relay restarted
01, 02 5 UNRDEV New relay event available
01, 02 6 52CLS Breaker closed, Terminal S
01, 02 7 52ALS Breaker alarm, Terminal S
01, 02 8 52CLT Breaker closed, Terminal T

DNP3 Communication
01, 02 9 52ALT Breaker alarm, Terminal T

01, 02 10 52CLU Breaker closed, Terminal U
01, 02 11 52ALU Breaker alarm, Terminal U
01, 02 12 52CLY Breaker closed, Terminal Y
01, 02 13 52ALY Breaker alarm, Terminal Y
01, 02 14 89CL01 Disconnect 1 closed
01, 02 15 89AL01 Disconnect 1 alarm
01, 02 34 TLED_1 Target LED 1 on relay front panel

DNP3 Communication

01, 02 58 LOPV Loss-of-potential Terminal V
01, 02 59 LOPZ Loss-of-potential Terminal Z
01, 02 60 IN201 I/O Board 1, Input 1 asserted
01, 02 68 PSV01 Protection SELOGIC Variable 1
01, 02 76 ASV001 Automation SELOGIC Variable 1
01, 02 84 OUT201 I/O Board 1, Output 1 asserted

DNP3 Communication

Table 10.18 SEL-400G DNP3 Default Binary Output Data Map
10, 12 0–31 RB01–RB32 Remote Bits 1–32

10, 12 32 OCS Breaker Open command, Terminal S
10, 12 33 CCS Breaker Close command, Terminal S
10, 12 34 OCT Breaker Open command, Terminal T
10, 12 35 CCT Breaker Close command, Terminal T
10, 12 36 OCU Breaker Open command, Terminal U
10, 12 37 CCU Breaker Close command, Terminal U
10, 12 38 OCY Breaker Open command, Terminal Y
10, 12 39 CCY Breaker Close command, Terminal Y
10, 12 40 89OC01 Open Disconnect Control 1
10, 12 41 89CC01 Close Disconnect Control 1
10, 12 60 RSTTRGT Reset front-panel targets
10, 12 61 RSTDNPE Reset DNP fault summary data
Table 10.19 SEL-400G DNP3 Default Binary Counter Data Map (Sheet 1 of 2)
20, 22 0 BKRSOP Number of Breaker S operations

20, 22 1 BKRTOP Number of Breaker T operations

DNP3 Communication
Table 10.19 SEL-400G DNP3 Default Binary Counter Data Map (Sheet 2 of 2)
20, 22 2 BKRUOP Number of Breaker U operations

20, 22 3 BKRYOP Number of Breaker Y operations
Table 10.20 SEL-400G DNP3 Default Analog Input Map (Sheet 1 of 3)
30, 32 0 IASFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal S

30, 32 1 IASFAC 40 ms average filtered phase current angle, A-Phase, Terminal S
30, 32 2 IBSFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal S
30, 32 3 IBSFAC 40 ms average filtered phase current angle, B-Phase, Terminal S
30, 32 4 ICSFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal S
30, 32 5 ICSFAC 40 ms average filtered phase current angle, C-Phase, Terminal S
30, 32 6 IATFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal T
30, 32 7 IATFAC 40 ms average filtered phase current angle, A-Phase, Terminal T
30, 32 8 IBTFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal T
30, 32 9 IBTFAC 40 ms average filtered phase current angle, B-Phase, Terminal T
30, 32 10 ICTFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal T
30, 32 11 ICTFAC 40 ms average filtered phase current angle, C-Phase, Terminal T
30, 32 12 IAUFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal U
30, 32 13 IAUFAC 40 ms average filtered phase current angle, A-Phase, Terminal U
30, 32 14 IBUFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal U
30, 32 15 IBUFAC 40 ms average filtered phase current angle, B-Phase, Terminal U
30, 32 16 ICUFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal U
30, 32 17 ICUFAC 40 ms average filtered phase current angle, C-Phase, Terminal U
30, 32 18 IAYFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal Y
30, 32 19 IAYFAC 40 ms average filtered phase current angle, A-Phase, Terminal Y
30, 32 20 IBYFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal Y
30, 32 21 IBYFAC 40 ms average filtered phase current angle, B-Phase, Terminal Y
30, 32 22 ICYFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal Y
30, 32 23 ICYFAC 40 ms average filtered phase current angle, C-Phase, Terminal Y
30, 32 24 IAGFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal G
30, 32 25 IAGFAC 40 ms average filtered phase current angle, A-Phase, Terminal G
30, 32 26 IBGFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal G
30, 32 27 IBGFAC 40 ms average filtered phase current angle, B-Phase, Terminal G
30, 32 28 ICGFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal G
30, 32 29 ICGFAC 40 ms average filtered phase current angle, C-Phase, Terminal G
30, 32 30 VAVFMC 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal V
30, 32 31 VAVFAC 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal V
30, 32 32 VBVFMC 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal V
30, 32 33 VBVFAC 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal V
30, 32 34 VCVFMC 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal V
30, 32 35 VCVFAC 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal V

DNP3 Communication
30, 32 36 VAZFMC 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal Z

30, 32 37 VAZFAC 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal Z
30, 32 38 VBZFMC 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal Z
30, 32 39 VBZFAC 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal Z
30, 32 40 VCZFMC 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal Z
30, 32 41 VCZFAC 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal Z
30, 32 42 PASFC 40 ms average phase fundamental active power, A-Phase, Terminal S
30, 32 43 PBSFC 40 ms average phase fundamental active power, B-Phase, Terminal S
30, 32 44 PCSFC 40 ms average phase fundamental active power, C-Phase, Terminal S
30, 32 45 PATFC 40 ms average phase fundamental active power, A-Phase, Terminal T
30, 32 46 PBTFC 40 ms average phase fundamental active power, B-Phase, Terminal T
30, 32 47 PCTFC 40 ms average phase fundamental active power, C-Phase, Terminal T
30, 32 48 PAUFC 40 ms average phase fundamental active power, A-Phase, Terminal U
30, 32 49 PBUFC 40 ms average phase fundamental active power, B-Phase, Terminal U
30, 32 50 PCUFC 40 ms average phase fundamental active power, C-Phase, Terminal U
30, 32 51 PAYFC 40 ms average phase fundamental active power, A-Phase, Terminal Y
30, 32 52 PBYFC 40 ms average phase fundamental active power, B-Phase, Terminal Y
30, 32 53 PCYFC 40 ms average phase fundamental active power, C-Phase, Terminal Y
30, 32 54 PAGFC 40 ms average phase fundamental active power, A-Phase, Terminal G
30, 32 55 PBGFC 40 ms average phase fundamental active power, B-Phase, Terminal G
30, 32 56 PCGFC 40 ms average phase fundamental active power, C-Phase, Terminal G
30, 32 57 QASFC 40 ms average phase fundamental reactive power, A-Phase, Terminal S
30, 32 58 QBSFC 40 ms average phase fundamental reactive power, B-Phase, Terminal S
30, 32 59 QCSFC 40 ms average phase fundamental reactive power, C-Phase, Terminal S
30, 32 60 QATFC 40 ms average phase fundamental reactive power, A-Phase, Terminal T
30, 32 61 QBTFC 40 ms average phase fundamental reactive power, B-Phase, Terminal T
30, 32 62 QCTFC 40 ms average phase fundamental reactive power, C-Phase, Terminal T
30, 32 63 QAUFC 40 ms average phase fundamental reactive power, A-Phase, Terminal U
30, 32 64 QBUFC 40 ms average phase fundamental reactive power, B-Phase, Terminal U
30, 32 65 QCUFC 40 ms average phase fundamental reactive power, C-Phase, Terminal U
30, 32 66 QAYFC 40 ms average phase fundamental reactive power, A-Phase, Terminal Y
30, 32 67 QBYFC 40 ms average phase fundamental reactive power, B-Phase, Terminal Y
30, 32 68 QCYFC 40 ms average phase fundamental reactive power, C-Phase, Terminal Y
30, 32 69 QAGFC 40 ms average phase fundamental reactive power, A-Phase, Terminal G
30, 32 70 QBGFC 40 ms average phase fundamental reactive power, B-Phase, Terminal G
30, 32 71 QCGFC 40 ms average phase fundamental reactive power, C-Phase, Terminal G
30, 32 72 ACTGRP Active settings group
30, 32 73 RLYTEMP Relay temperature (°C temperature of the box)
30, 32 74 FREQPG Generator tracking frequency
30, 32 75 FREQPS System tracking frequency
30, 32 76 VDC Station battery dc voltage

IEC 61850 Communication
30, 32 77 FTYPE Fault type

30, 32 78 FTAR1 Fault targets (upper byte is 1st target row, lower byte is 2nd target row)
30, 32 79 FTAR2 Fault targets (upper byte is 3rd target row, lower byte is 0)
30, 32 80 FFREQG Generator fault frequency
30, 32 81 FFREQS System fault frequency
30, 32 82 FGRP Fault active settings group (1–6)
30, 32 83 FTIMEUH Fault time (UTC) in DNP format, high 16 bits
30, 32 84 FTIMEUM Fault time (UTC) in DNP format, middle 16 bits
30, 32 85 FTIMEUL Fault time (UTC) in DNP format, low 16 bits
30, 32 86 FUNR Number of unread faults
Table 10.21 SEL-400G DNP3 Default Analog Output Data Map
40, 41 0 ACTGRP Active settings group

General IEC 61850 operation is described in Section 17: IEC 61850 Communi-
cation in the SEL-400 Series Relays Instruction Manual. This section describes
characteristics of IEC 61850 that are specific to the SEL-400G.
Logical Nodes
Table 10.22 through Table 10.24 show the logical nodes (LNs) supported in the
SEL-400G and the Relay Word bits or Measured Values mapped to those LNs.
Additionally, the relay supports the CON and ANN Logical Device logical nodes
as described in Section 17: IEC 61850 Communication in the SEL-400 Series
Relays Instruction Manual.
Table 10.22 shows the LNs associated with protection elements, defined as Logi-
cal Device PRO.
Table 10.22 Logical Device: PRO (Protection) (Sheet 1 of 22)
Functional Constraint = CO
DC1CSWI1 Pos.Oper.ctlVal 89CC01:89OC01a ASCII close/open Disconnect 1 command
a
DC2CSWI2 Pos.Oper.ctlVal 89CC02:89OC02 ASCII close/open Disconnect 2 command
a
a
DC5CSWI5 Pos.Oper.ctlVal 89CC05:89OC05a ASCII close/open Disconnect 5 command
a
a
a


a
a
a
SBKRCSWI1 Pos.Oper.ctlVal CCS:OCS Circuit breaker close/open command, Terminal S
TBKRCSWI2 Pos.Oper.ctlVal CCT:OCTa Circuit breaker close/open command, Terminal T
a
UBKRCSWI3 Pos.Oper.ctlVal CCU:OCU Circuit breaker close/open command, Terminal U
a
YBKRCSWI4 Pos.Oper.ctlVal CCY:OCY Circuit breaker close/open command, Terminal Y
B81A1PTOF7 Str.general 81AB1 81A element Band 1 pickup
B81A1PTOF7 Op.general 81AB1T 81A element Band 1 delayed pickup
B81APTOF15 Str.general 81AC 81A element pickup
B81APTOF15 Op.general 81AT 81A element delayed pickup
BFRSRBRF1 Str.general BFIS Circuit Breaker S breaker failure initiate SELOGIC control
equation
BFRSRBRF1 OpEx.general FBFS Circuit Breaker S failure
BFRSRBRF1 OpIn.general RTS Circuit Breaker S retrip
BFRTRBRF2 Str.general BFIT Circuit Breaker T breaker failure initiate SELOGIC control
equation
BFRTRBRF2 OpEx.general FBFT Circuit Breaker T failure
BFRTRBRF2 OpIn.general RTT Circuit Breaker T retrip
BFRURBRF3 Str.general BFIU Circuit Breaker U breaker failure initiate SELOGIC control
equation
BFRURBRF3 OpEx.general FBFU Circuit Breaker U failure
BFRURBRF3 OpIn.general RTU Circuit Breaker U retrip
BFRYRBRF4 Str.general BFIY Circuit Breaker Y breaker failure initiate SELOGIC control
equation
BFRYRBRF4 OpEx.general FBFY Circuit Breaker Y failure
BFRYRBRF4 OpIn.general RTY Circuit Breaker Y retrip
BKSACSYN1 Rel.stVal 25AS Breaker S voltage within sync angle window uncompensated

BKSACSYN1 RV.stVal 25AVR Voltage raise command

BKSACSYN1 LV.stVal 25AVL Voltage lower command
BKSACSYN1 RHz.stVal 25AFR Frequency raise command
BKSACSYN1 LHz.stVal 25AFL Frequency lower command
BKSACSYN1 VInd.stVal 25VDIFS Breaker S voltage difference is within acceptable window
BKSACSYN1 HzInd.stVal SFBKS Breaker S slip frequency is within acceptable slip frequency
window
BKSCCSYN2 Rel.stVal 25CS Breaker S voltages within sync angle window compensated
BKSCCSYN2 RV.stVal 25AVR Voltage raise command
BKSCCSYN2 LV.stVal 25AVL Voltage lower command
BKSCCSYN2 RHz.stVal 25AFR Frequency raise command
BKSCCSYN2 LHz.stVal 25AFL Frequency lower command
BKSCCSYN2 VInd.stVal 25VDIFS Breaker S voltage difference is within acceptable window
BKSCCSYN2 HzInd.stVal SFBKS Breaker S slip frequency is within acceptable slip frequency
window
BKSRSYN1 Rel.stVal 25AS Breaker S voltage within sync angle window uncompensated
BKTACSYN3 Rel.stVal 25AT Breaker T voltage within sync angle window uncompensated
BKTACSYN3 RV.stVal 25AVR Voltage raise command
BKTACSYN3 LV.stVal 25AVL Voltage lower command
BKTACSYN3 RHz.stVal 25AFR Frequency raise command
BKTACSYN3 LHz.stVal 25AFL Frequency lower command
BKTACSYN3 VInd.stVal 25VDIFT Breaker T voltage difference is within acceptable window
BKTACSYN3 HzInd.stVal SFBKT Breaker T slip frequency is within acceptable slip frequency
window
BKTCCSYN4 Rel.stVal 25CT Breaker T voltages within sync angle window compensated
BKTCCSYN4 RV.stVal 25AVR Voltage raise command
BKTCCSYN4 LV.stVal 25AVL Voltage lower command
BKTCCSYN4 RHz.stVal 25AFR Frequency raise command
BKTCCSYN4 LHz.stVal 25AFL Frequency lower command
BKTCCSYN4 VInd.stVal 25VDIFT Breaker T voltage difference is within acceptable window
BKTCCSYN4 HzInd.stVal SFBKT Breaker T slip frequency is within acceptable slip frequency
window
BKTRSYN2 Rel.stVal 25AT Breaker T voltage within sync angle window uncompensated
BKUACSYN5 Rel.stVal 25AU Breaker U voltage within sync angle window uncompensated
BKUACSYN5 RV.stVal 25AVR Voltage raise command
BKUACSYN5 LV.stVal 25AVL Voltage lower command
BKUACSYN5 RHz.stVal 25AFR Frequency raise command
BKUACSYN5 LHz.stVal 25AFL Frequency lower command
BKUACSYN5 VInd.stVal 25VDIFU Breaker U voltage difference is within acceptable window
BKUACSYN5 HzInd.stVal SFBKU Breaker U slip frequency is within acceptable slip frequency
window
BKUCCSYN6 Rel.stVal 25CU Breaker U voltages within sync angle window compensated
BKUCCSYN6 RV.stVal 25AVR Voltage raise command

BKUCCSYN6 LV.stVal 25AVL Voltage lower command

BKUCCSYN6 RHz.stVal 25AFR Frequency raise command
BKUCCSYN6 LHz.stVal 25AFL Frequency lower command
BKUCCSYN6 VInd.stVal 25VDIFU Breaker U voltage difference is within acceptable window
BKUCCSYN6 HzInd.stVal SFBKU Breaker U slip frequency is within acceptable slip frequency
window
BKURSYN3 Rel.stVal 25AU Breaker U voltage within sync angle window uncompensated
BKYACSYN7 Rel.stVal 25AY Breaker Y voltage within sync angle window uncompensated
BKYACSYN7 RV.stVal 25AVR Voltage raise command
BKYACSYN7 LV.stVal 25AVL Voltage lower command
BKYACSYN7 RHz.stVal 25AFR Frequency raise command
BKYACSYN7 LHz.stVal 25AFL Frequency lower command
BKYACSYN7 VInd.stVal 25VDIFY Breaker Y voltage difference is within acceptable window
BKYACSYN7 HzInd.stVal SFBKY Breaker Y slip frequency is within acceptable slip frequency
window
BKYCCSYN8 Rel.stVal 25CY Breaker Y voltages within sync angle window compensated
BKYCCSYN8 RV.stVal 25AVR Voltage raise command
BKYCCSYN8 LV.stVal 25AVL Voltage lower command
BKYCCSYN8 RHz.stVal 25AFR Frequency raise command
BKYCCSYN8 LHz.stVal 25AFL Frequency lower command
BKYCCSYN8 VInd.stVal 25VDIFY Breaker Y voltage difference is within acceptable window
BKYCCSYN8 HzInd.stVal SFBKY Breaker Y slip frequency is within acceptable slip frequency
window
BKYRSYN4 Rel.stVal 25AY Breaker Y voltage within sync angle window uncompensated
BSSASCBR1 AbrAlm.stVal BSBCWAL Breaker contact wear alarm, Breaker S
BSSASCBR1 ColOpn.stVal OCS Breaker Open command, Terminal S
BSSASCBR1 MechTmAlm.stVal BSMSOAL Mechanical slow operation alarm, Breaker S
BSSASCBR1 OpTmAlm.stVal BSESOAL Slow electrical operate alarm, Breaker S
BSSBSCBR2 AbrAlm.stVal BSBCWAL Breaker contact wear alarm, Breaker S
BSSBSCBR2 ColOpn.stVal OCS Breaker Open command, Terminal S
BSSBSCBR2 MechTmAlm.stVal BSMSOAL Mechanical slow operation alarm, Breaker S
BSSBSCBR2 OpTmAlm.stVal BSESOAL Slow electrical operate alarm, Breaker S
BSSCSCBR3 AbrAlm.stVal BSBCWAL Breaker contact wear alarm, Breaker S
BSSCSCBR3 ColOpn.stVal OCS Breaker Open command, Terminal S
BSSCSCBR3 MechTmAlm.stVal BSMSOAL Mechanical slow operation alarm, Breaker S
BSSCSCBR3 OpTmAlm.stVal BSESOAL Slow electrical operate alarm, Breaker S
BSTASCBR4 AbrAlm.stVal BTBCWAL Breaker contact wear alarm, Breaker T
BSTASCBR4 ColOpn.stVal OCT Breaker Open command, Terminal T
BSTASCBR4 MechTmAlm.stVal BTMSOAL Mechanical slow operation alarm, Breaker T
BSTASCBR4 OpTmAlm.stVal BTESOAL Slow electrical operate alarm, Breaker T
BSTBSCBR5 AbrAlm.stVal BTBCWAL Breaker contact wear alarm, Breaker T
BSTBSCBR5 ColOpn.stVal OCT Breaker Open command, Terminal T

BSTBSCBR5 MechTmAlm.stVal BTMSOAL Mechanical slow operation alarm, Breaker T

BSTBSCBR5 OpTmAlm.stVal BTESOAL Slow electrical operate alarm, Breaker T
BSTCSCBR6 AbrAlm.stVal BTBCWAL Breaker contact wear alarm, Breaker T
BSTCSCBR6 ColOpn.stVal OCT Breaker Open command, Terminal T
BSTCSCBR6 MechTmAlm.stVal BTMSOAL Mechanical slow operation alarm, Breaker T
BSTCSCBR6 OpTmAlm.stVal BTESOAL Slow electrical operate alarm, Breaker T
BSUASCBR7 AbrAlm.stVal BUBCWAL Breaker contact wear alarm, Breaker U
BSUASCBR7 ColOpn.stVal OCU Breaker Open command, Terminal U
BSUASCBR7 MechTmAlm.stVal BUMSOAL Mechanical slow operation alarm, Breaker U
BSUASCBR7 OpTmAlm.stVal BUESOAL Slow electrical operate alarm, Breaker U
BSUBSCBR8 AbrAlm.stVal BUBCWAL Breaker contact wear alarm, Breaker U
BSUBSCBR8 ColOpn.stVal OCU Breaker Open command, Terminal U
BSUBSCBR8 MechTmAlm.stVal BUMSOAL Mechanical slow operation alarm, Breaker U
BSUBSCBR8 OpTmAlm.stVal BUESOAL Slow electrical operate alarm, Breaker U
BSUCSCBR9 AbrAlm.stVal BUBCWAL Breaker contact wear alarm, Breaker U
BSUCSCBR9 ColOpn.stVal OCU Breaker Open command, Terminal U
BSUCSCBR9 MechTmAlm.stVal BUMSOAL Mechanical slow operation alarm, Breaker U
BSUCSCBR9 OpTmAlm.stVal BUESOAL Slow electrical operate alarm, Breaker U
BSYASCBR10 AbrAlm.stVal BYBCWAL Breaker contact wear alarm, Breaker Y
BSYASCBR10 ColOpn.stVal OCY Breaker Open command, Terminal Y
BSYASCBR10 MechTmAlm.stVal BYMSOAL Mechanical slow operation alarm, Breaker Y
BSYASCBR10 OpTmAlm.stVal BYESOAL Slow electrical operate alarm, Breaker Y
BSYBSCBR11 AbrAlm.stVal BYBCWAL Breaker contact wear alarm, Breaker Y
BSYBSCBR11 ColOpn.stVal OCY Breaker Open command, Terminal Y
BSYBSCBR11 MechTmAlm.stVal BYMSOAL Mechanical slow operation alarm, Breaker Y
BSYBSCBR11 OpTmAlm.stVal BYESOAL Slow electrical operate alarm, Breaker Y
BSYCSCBR12 AbrAlm.stVal BYBCWAL Breaker contact wear alarm, Breaker Y
BSYCSCBR12 ColOpn.stVal OCY Breaker Open command, Terminal Y
BSYCSCBR12 MechTmAlm.stVal BYMSOAL Mechanical slow operation alarm, Breaker Y
BSYCSCBR12 OpTmAlm.stVal BYESOAL Slow electrical operate alarm, Breaker Y
D241T1PVPH1 Str.general 24D11 V/Hz Element 1 Level 1 asserted
D241T1PVPH1 Op.general 24D1T1 V/Hz Element 1 Level 1 timed out
D32P1PDOP1 Str.general 32P01 Directional power Element 1 asserted
D32P1PDOP1 Op.general 32T01 Directional power Element 1 timed out


D81L1PTOF1 Str.general CSV05 Level 1 overfrequency element pickup (81D1OVR AND
81D1)
D81L1PTOF1 Op.general CSV17 Level 1 overfrequency element time-out (81D1OVR AND
81D1T)
D81L1PTOF1 BlkV.stVal CSV29 Frequency elements undervoltage supervision (27B81G OR
27B81S)
D81L1PTUF1 Str.general CSV11 Level 1 underfrequency element pickup (81D1UDR AND
81D1)
D81L1PTUF1 Op.general CSV23 Level 1 underfrequency element time-out (81D1UDR AND
81D1T)
D81L1PTUF1 BlkV.stVal CSV29 Frequency elements undervoltage supervision (27B81G OR
27B81S)
81D2)
81D2T)
27B81S)
81D2)
81D2T)
27B81S)
81D3)
81D3T)
27B81S)
81D3)
81D3T)
27B81S)
81D4)
81D4T)
27B81S)
81D4)


81D4T)
27B81S)
81D5)
81D5T)
27B81S)
81D5)
81D5T)
27B81S)
81D6)
81D6T)
27B81S)
81D6)
81D6T)
27B81S)
D87Q1PDIF14 Op.general 87Q1 Negative-sequence differential Element 1 asserted (interturn
fault detected)
D87Q2PDIF15 Op.general 87Q2 Negative-sequence differential Element 2 asserted (interturn
fault detected)
D87RMS1PDIF12 Op.general 87RMS1 RMS differential Element 1 picked up
D87RMS1PDIF12 Op.phsA 87ARMS1 A-Phase rms differential Element 1 picked up
D87RMS1PDIF12 Op.phsB 87BRMS1 B-Phase rms differential Element 1 picked up
D87RMS1PDIF12 Op.phsC 87CRMS1 C-Phase rms differential Element 1 picked up
D87RMS2PDIF13 Op.general 87RMS2 RMS differential Element 2 picked up
D87RMS2PDIF13 Op.phsA 87ARMS2 A-Phase rms differential Element 2 picked up
D87RMS2PDIF13 Op.phsB 87BRMS2 B-Phase rms differential Element 2 picked up
D87RMS2PDIF13 Op.phsC 87CRMS2 C-Phase rms differential Element 2 picked up
D87RPDIF10 Op.general 87R1 Restrained differential Element 1 picked up
D87RPDIF10 Op.phsA 87AR1 A-Phase restrained differential Element 1 picked up
D87RPDIF10 Op.phsB 87BR1 B-Phase restrained differential Element 1 picked up
D87RPDIF10 Op.phsC 87CR1 C-Phase restrained differential Element 1 picked up
D87RPDIF11 Op.general 87R2 Restrained differential Element 2 picked up
D87RPDIF11 Op.phsA 87AR2 A-Phase restrained differential Element 2 picked up
D87RPDIF11 Op.phsB 87BR2 B-Phase restrained differential Element 2 picked up

D87RPDIF11 Op.phsC 87CR2 C-Phase restrained differential Element 2 picked up

D87U1PDIF8 Op.general 87UF1 Filtered unrestrained differential Element 1 picked up
D87U1PDIF8 Op.phsA 87AUF1 A-Phase filtered unrestrained differential Element 1 picked up
D87U1PDIF8 Op.phsB 87BUF1 B-Phase filtered unrestrained differential Element 1 picked up
D87U1PDIF8 Op.phsC 87CUF1 C-Phase filtered unrestrained differential Element 1 picked up
D87U2PDIF9 Op.general 87UF2 Filtered unrestrained differential Element 2 picked up
D87U2PDIF9 Op.phsA 87AUF2 A-Phase filtered unrestrained differential Element 2 picked up
D87U2PDIF9 Op.phsB 87BUF2 B-Phase filtered unrestrained differential Element 2 picked up
D87U2PDIF9 Op.phsC 87CUF2 C-Phase filtered unrestrained differential Element 2 picked up
DC1CSWI1 Loc.stVal LOC Control authority at local (bay) level
DC1CSWI1 LocSta.stVal LOCSTA Control authority at station level
b
DC1CSWI1 Pos.stVal 89CL01|89OPN01?0:1:2:3 Disconnect/Isolator 1 status
DC1CSWI1 OpOpn.general 89OPE01 Disconnect Open 1 output
DC1CSWI1 OpCls.general 89CLS01 Disconnect Close 1 output
b
DC2CSWI2 OpCls.general 89CLS02 Disconnect 2 Close 2 output
b
b
DC5CSWI5 Pos.stVal 89CL05|89OPN05?0:1:2:3b Disconnect/Isolator 5 status
b


b
b
b
DC10CSWI10 Pos.stVal 89CL10|89OPN10?0:1:2:3b Disconnect/Isolator 10 status
F641PTOC54 Str.general 64F1 64F instantaneous Level 1 pickup
F641PTOC54 Op.general 64F1T 64F time-delayed Level 1 pickup
F642PTOC55 Str.general 64F2 64F instantaneous Level 2 pickup
F642PTOC55 Op.general 64F2T 64F time-delayed Level 2 pickup
FLTRDRE1 RcdMade.stVal FLREP Event report present
FLTRDRE1 FltNum.stVal FLRNUM Event number
c
FLTRDRE1 FltTyp.stVal FLTYPE Affected phases for the latest event
d
FLTRDRE1 FltCaus.stVal FLTCAUS Event cause for the latest event
FOBFSPIOC37 Op.general FOBFS Breaker S breaker flashover asserted
FOBFTPIOC38 Op.general FOBFT Breaker T breaker flashover asserted
FOBFUPIOC39 Op.general FOBFU Breaker U breaker flashover asserted
FOBFYPIOC40 Op.general FOBFY Breaker Y breaker flashover asserted
G641PTOC56 Str.general 64G1 64G Element 1 pickup
G641PTOC56 Op.general 64G1T 64G Element 1 delayed pickup
G642PTOC57 Ha3VolAngAlm.stVal 64GAAL 64G third-harmonic angle check alarm
G643PTOC58 Ha3VolAngAlm.stVal 64GAAL 64G third-harmonic angle check alarm
IT1PTOC37 Str.general 51S01 Inverse-time Element 01 picked up
IT1PTOC37 Op.general 51T01 Inverse-time Element 01 timed out


e
LLN0 Mod.stVal I60MOD IEC 61850 mode/behavior status
LLN0 Loc.stVal LOC Control authority at local (bay) level
LLN0 LocSta.stVal LOCSTA Control authority at station level
LOPVPTUV13 Str.general LOPV Loss-of-potential Terminal V
LOPVPTUV13 Op.general LOPV Loss-of-potential Terminal V
LOPZPTUV14 Str.general LOPZ Loss-of-potential Terminal Z
LOPZPTUV14 Op.general LOPZ Loss-of-potential Terminal Z
N60LPTOC63 Str.general 60NLS 60N low-set level picked up
N60LPTOC63 Op.general 60NLT 60N low-set level timed out
N60HPTOC64 Str.general 60NHS 60N high-set level picked up
N60HPTOC64 Op.general 60NHT 60N high-set level timed out
O1P1PTOV1 Str.general 591P1 Overvoltage Element 1, Level 1 asserted
O1P1PTOV1 Op.general 591P1T Overvoltage Element 1, Level 1 timed out


OSTPPAM2 Str.general 78OOS Out-of-step protection picked up
OSTPPAM2 Op.general 78OST Out-of-step protection timed out
P21AB1PDIS1 Str.general 21PAB1P Zone 1 backup phase distance for AB loop picked up
P21AB1PDIS1 Op.general 21PAB1T Zone 1 backup phase distance for AB loop timed out
P21AB2PDIS4 Str.general 21PAB2P Zone 2 backup phase distance for AB loop picked up
P21AB2PDIS4 Op.general 21PAB2T Zone 2 backup phase distance for AB loop timed out
P21BC1PDIS2 Str.general 21PBC1P Zone 1 backup phase distance for BC loop picked up
P21BC1PDIS2 Op.general 21PBC1T Zone 1 backup phase distance for BC loop timed out
P21BC2PDIS5 Str.general 21PBC2P Zone 2 backup phase distance for BC loop picked up
P21BC2PDIS5 Op.general 21PBC2T Zone 2 backup phase distance for BC loop timed out
P21CA1PDIS3 Str.general 21PCA1P Zone 1 backup phase distance for CA loop picked up
P21CA1PDIS3 Op.general 21PCA1T Zone 1 backup phase distance for CA loop timed out
P21CA2PDIS6 Str.general 21PCA2P Zone 2 backup phase distance for CA loop picked up
P21CA2PDIS6 Op.general 21PCA2T Zone 2 backup phase distance for CA loop timed out
P21Z1PDIS7 Str.general CSV01 21PAB1P OR 21PBC1P OR 21PCA1P
P21Z1PDIS7 Op.general 21PZ1T Zone 1 backup phase distance timed out
P21Z2PDIS8 Str.general CSV02 21PAB2P OR 21PBC2P OR 21PCA2P
P21Z2PDIS8 Op.general 21PZ2T Zone 2 backup phase distance timed out
P40P1PDUP3 Str.general 40P1 Loss-of-field PQ Zone 1 picked up
P40P1PDUP3 Op.general 40P1T Loss-of-field PQ Zone 1 timed out
P40P2PDUP4 Str.general 40P2 Loss-of-field PQ Zone 2 picked up
P40P2PDUP4 Op.general 40P2T Loss-of-field PQ Zone 2 timed out
P40P3PDUP5 Str.general 40P3 Steady-state stability limit Zone 3 picked up
P40P3PDUP5 Op.general 40P3T Steady-state stability limit Zone 3 timed out
P40P4PDUP6 Str.general 40P4 Capability curve limit Zone 4 picked up
P40P4PDUP6 Op.general 40P4T Capability curve limit Zone 4 timed out

P51CPVOC1 Str.general 51C Voltage-controlled instantaneous OC picked up

P51CPVOC1 Str.phsA 51CA A-Phase, voltage-controlled instantaneous OC picked up
P51CPVOC1 Str.phsB 51CB B-Phase, voltage-controlled instantaneous OC picked up
P51CPVOC1 Str.phsC 51CC C-Phase, voltage-controlled instantaneous OC picked up
P51CPVOC1 Op.general 51CT Voltage-controlled OC timed out
P51CPVOC1 Op.phsA 51CAT A-Phase, voltage-controlled OC timed out
P51CPVOC1 Op.phsB 51CBT B-Phase, voltage-controlled OC timed out
P51CPVOC1 Op.phsC 51CCT C-Phase, voltage-controlled OC timed out
P51VPVOC2 Str.general 51V Voltage-restrained instantaneous OC picked up
P51VPVOC2 Str.phsA 51VA A-Phase, voltage-restrained instantaneous OC picked up
P51VPVOC2 Str.phsB 51VB B-Phase, voltage-restrained instantaneous OC picked up
P51VPVOC2 Str.phsC 51VC C-Phase, voltage-restrained instantaneous OC picked up
P51VPVOC2 Op.general 51VT Voltage-restrained OC timed out
P51VPVOC2 Op.phsA 51VAT A-Phase, voltage-restrained OC timed out
P51VPVOC2 Op.phsB 51VBT B-Phase, voltage-restrained OC timed out
P51VPVOC2 Op.phsC 51VCT C-Phase, voltage-restrained OC timed out
P60LAPTOC65 Str.general 60PALS 60P A-Phase low-set level picked up
P60LAPTOC65 Op.general 60PALT 60P A-Phase low-set level timed out
P60LBPTOC66 Str.general 60PBLS 60P B-Phase low-set level picked up
P60LBPTOC66 Op.general 60PBLT 60P B-Phase low-set level timed out
P60LCPTOC67 Str.general 60PCLS 60P C-Phase low-set level picked up
P60LCPTOC67 Op.general 60PCLT 60P C-Phase low-set level timed out
P60HAPTOC68 Str.general 60PAHS 60P A-Phase high-set level picked up
P60HAPTOC68 Op.general 60PAHT 60P A-Phase high-set level timed out
P60HBPTOC69 Str.general 60PBHS 60P B-Phase high-set level picked up
P60HBPTOC69 Op.general 60PBHT 60P B-Phase high-set level timed out
P60HCPTOC70 Str.general 60PCHS 60P C-Phase high-set level picked up
P60HCPTOC70 Op.general 60PCHT 60P C-Phase high-set level timed out
f
PROLPHD1 PhyHealth.stVal EN?3:1 Relay enabled
Q4611PTOC59 Str.general 46Q11 Generator current unbalance Element 1 Level 1 picked up
Q4611PTOC59 Op.general 46Q1T1 Generator current unbalance Element 1 Level 1 timed out
R1PFRC1 Str.general 81R1 Definite-time rate-of-change-of-frequency element picked up,
Level 1
R1PFRC1 Op.general 81R1T Definite-time over/under rate-of-change-of-frequency element
delay for Level 1


Level 2
delay for Level 2
Level 3
delay for Level 3
Level 4
delay for Level 4
Level 5
delay for Level 5
Level 6
delay for Level 6
R49LVPTTR1 Op.general 49RLV1P RTD element Location 1 voted trip asserted
R49S1PTTR1 Op.general 49R01S1 RTD Element 01 Level 1 asserted


REF501PIOC41 Str.general REF501 Neutral instantaneous overcurrent Element 1 picked up
REF501PIOC41 Op.general REF50T1 Neutral instantaneous overcurrent Element 1 timed out
REF511PTOC49 Str.general REF511 REF Element 1 TOC element picked up
REF511PTOC49 Op.general REF51T1 REF Element 1 TOC element timed out
REFF1PDIF1 Op.general REFF1 Earth fault inside restricted Zone 1
REFPDIF7 Op.general REF Earth fault inside REF Element 1, 2, or 3 zones
REFR1PDIF4 Op.general REFR1 Earth fault outside restricted Zone 1
S52AXCBR1 Loc.stVal CSV30 LOC OR LOCAL
g
S52AXCBR1 Pos.stVal 52CLS?1:2 Breaker closed, Terminal S
S641PTOC52 Str.general 64S1 64S Instantaneous Level 1 pickup
S641PTOC52 Op.general 64S1T 64S time-delayed Level 1 pickup
S642PTOC53 Str.general 64S2 64S instantaneous Level 2 pickup
S642PTOC53 Op.general 64S2T 64S time-delayed Level 2 pickup
SBKRCSWI1 Loc.stVal LOC Control authority at local (bay) level
SBKRCSWI1 LocSta.stVal LOCSTA Control authority at station level
SBKRCSWI1 Pos.stVal 52CLS?1:2g Breaker closed, Terminal S
SBKRCSWI1 OpOpn.general OCS Breaker open command, Terminal S
SBKRCSWI1 OpCls.general CCS Breaker close command, Terminal S
SG1PIOC7 Op.general 50SG1 Residual definite-time Element 1, Terminal S asserted
SG1PTOC7 Str.general 67SG1 Residual directional/torque-controlled Element 1, Terminal S
picked up
SG1PTOC7 Op.general 67SG1T Residual directional/torque-controlled Element 1, Terminal S
timed out
picked up


timed out
picked up
timed out
SP1PIOC1 Op.general 50SP1 Phase definite-time Element 1, Terminal S asserted
SP1PTOC1 Str.general 67SP1 Phase directional/torque-controlled Element 1, Terminal S
picked up
SP1PTOC1 Op.general 67SP1T Phase directional/torque-controlled Element 1, Terminal S
timed out
picked up
timed out
picked up
timed out
SQ1PIOC4 Op.general 50SQ1 Negative-sequence definite-time Element 1, Terminal S
asserted
SQ1PTOC4 Str.general 67SQ1 Negative-sequence directional/torque-controlled Element 1,
Terminal S picked up
SQ1PTOC4 Op.general 67SQ1T Negative-sequence directional/torque-controlled Element 1,
Terminal S timed out
asserted
asserted
T52AXCBR2 Loc.stVal CSV30 LOC OR LOCAL
T52AXCBR2 Pos.stVal 52CLT?1:2g Breaker closed, Terminal T
TBKRCSWI2 Loc.stVal LOC Control authority at local (bay) level
TBKRCSWI2 LocSta.stVal LOCSTA Control authority at station level
g
TBKRCSWI2 Pos.stVal 52CLT?1:2 Breaker closed, Terminal T
TBKRCSWI2 OpOpn.general OCT Breaker open command, Terminal T
TBKRCSWI2 OpCls.general CCT Breaker close command, Terminal T

TG1PIOC16 Op.general 50TG1 Residual definite-time Element 1, Terminal T asserted

TG1PTOC16 Str.general 67TG1 Residual directional/torque-controlled Element 1, Terminal T
picked up
TG1PTOC16 Op.general 67TG1T Residual directional/torque-controlled Element 1, Terminal T
timed out
picked up
timed out
picked up
timed out
TP1PIOC10 Op.general 50TP1 Phase definite-time Element 1, Terminal T asserted
TP1PTOC10 Str.general 67TP1 Phase directional/torque-controlled Element 1, Terminal T
picked up
TP1PTOC10 Op.general 67TP1T Phase directional/torque-controlled Element 1, Terminal T
timed out
picked up
timed out
picked up
timed out
TQ1PIOC13 Op.general 50TQ1 Negative-sequence definite-time Element 1, Terminal T
asserted
TQ1PTOC13 Str.general 67TQ1 Negative-sequence directional/torque-controlled Element 1,
Terminal T picked up
TQ1PTOC13 Op.general 67TQ1T Negative-sequence directional/torque-controlled Element 1,
Terminal T timed out
asserted
asserted

TRIPPTRC1 Tr.general TRIP General trip asserted

TRIPSPTRC2 Tr.general TRIPS Trip Breaker S asserted
TRIPTPTRC3 Tr.general TRIPT Trip Breaker T asserted
TRIPUPTRC4 Tr.general TRIPU Trip Breaker U asserted
TRIPYPTRC5 Tr.general TRIPY Trip Breaker Y asserted
TRIPAUXPTRC6 Tr.general TRIPAUX Trip generator auxiliary asserted
TRIPEXPTRC7 Tr.general TRIPEX Trip generator exciter asserted
TRIPPMPTRC8 Tr.general TRIPPM Trip generator prime mover asserted
U1P1PTUV1 Str.general 271P1 Undervoltage Element 1, Level 1 asserted
U1P1PTUV1 Op.general 271P1T Undervoltage Element 1, Level 1 timed out
U52AXCBR3 Loc.stVal CSV30 LOC OR LOCAL
g
U52AXCBR3 Pos.stVal 52CLU?1:2 Breaker closed, Terminal U
UBKRCSWI3 Loc.stVal LOC Control authority at local (bay) level
UBKRCSWI3 LocSta.stVal LOCSTA Control authority at station level
g
UBKRCSWI3 Pos.stVal 52CLU?1:2 Breaker closed, Terminal U
UBKRCSWI3 OpOpn.general OCU Breaker open command, Terminal U
UBKRCSWI3 OpCls.general CCU Breaker close command, Terminal U
UG1PIOC25 Op.general 50UG1 Residual definite-time Element 1, Terminal U asserted

UG1PTOC25 Str.general 67UG1 Residual directional/torque-controlled Element 1, Terminal U

picked up
UG1PTOC25 Op.general 67UG1T Residual directional/torque-controlled Element 1, Terminal U
timed out
picked up
timed out
picked up
timed out
UP1PIOC19 Op.general 50UP1 Phase definite-time Element 1, Terminal U asserted
UP1PTOC19 Str.general 67UP1 Phase directional/torque-controlled Element 1, Terminal U
picked up
UP1PTOC19 Op.general 67UP1T Phase directional/torque-controlled Element 1, Terminal U
timed out
picked up
timed out
picked up
timed out
UQ1PIOC22 Op.general 50UQ1 Negative-sequence definite-time Element 1, Terminal U
asserted
UQ1PTOC22 Str.general 67UQ1 Negative-sequence directional/torque-controlled Element 1,
Terminal U picked up
UQ1PTOC22 Op.general 67UQ1T Negative-sequence directional/torque-controlled Element 1,
Terminal U timed out
asserted
asserted
WB871PDIF16 Op.general 87WB1 87 waveshape inrush blocking logic asserted, Element 1

WB871PDIF16 Op.phsA 87WBA1 87 waveshape inrush blocking logic asserted, A-Phase,

Element 1
WB871PDIF16 Op.phsB 87WBB1 87 waveshape inrush blocking logic asserted, B-Phase,
Element 1
WB871PDIF16 Op.phsC 87WBC1 87 waveshape inrush blocking logic asserted, C-Phase,
Element 1
WB872PDIF17 Op.general 87WB2 87 waveshape inrush blocking logic asserted, Element 2
WB872PDIF17 Op.phsA 87WBA2 87 waveshape inrush blocking logic asserted, A-Phase,
Element 2
WB872PDIF17 Op.phsB 87WBB2 87 waveshape inrush blocking logic asserted, B-Phase,
Element 2
WB872PDIF17 Op.phsC 87WBC2 87 waveshape inrush blocking logic asserted, C-Phase,
Element 2
X89CLXSWI1 Loc.stVal CSV30 LOC OR LOCAL
g
X89CLXSWI1 Pos.stVal 89CL01?1:2 Disconnect 1 closed
g
g
g
g
g
g
g
g
g
Y52AXCBR4 Loc.stVal CSV30 LOC OR LOCAL
g
Y52AXCBR4 Pos.stVal 52CLY?1:2 Breaker closed, Terminal Y
YBKRCSWI4 Loc.stVal LOC Control authority at local (bay) level
YBKRCSWI4 LocSta.stVal LOCSTA Control authority at station level
YBKRCSWI4 Pos.stVal 52CLY?1:2g Breaker closed, Terminal Y
YBKRCSWI4 OpOpn.general OCY Breaker open command, Terminal Y
YBKRCSWI4 OpCls.general CCY Breaker close command, Terminal Y
YG1PIOC34 Op.general 50YG1 Residual definite-time Element 1, Terminal Y asserted
YG1PTOC34 Str.general 67YG1 Residual directional/torque-controlled Element 1, Terminal Y
picked up

YG1PTOC34 Op.general 67YG1T Residual directional/torque-controlled Element 1, Terminal Y

timed out
picked up
timed out
picked up
timed out
YP1PIOC28 Op.general 50YP1 Phase definite-time Element 1, Terminal Y asserted
YP1PTOC28 Str.general 67YP1 Phase directional/torque-controlled Element 1, Terminal Y
picked up
YP1PTOC28 Op.general 67YP1T Phase directional/torque-controlled Element 1, Terminal Y
timed out
picked up
timed out
picked up
timed out
YQ1PIOC31 Op.general 50YQ1 Negative-sequence definite-time Element 1, Terminal Y
asserted
YQ1PTOC31 Str.general 67YQ1 Negative-sequence directional/torque-controlled Element 1,
Terminal Y picked up
YQ1PTOC31 Op.general 67YQ1T Negative-sequence directional/torque-controlled Element 1,
Terminal Y timed out
asserted
asserted
Z40P1PDUP1 Str.general 40Z1 Loss-of-field Zone 1 picked up
Z40P1PDUP1 Op.general 40Z1T Loss-of-field Zone 1 timed out

Z40P2PDUP2 Str.general 40Z2 Loss-of-field Zone 2 picked up

Z40P2PDUP2 Op.general 40Z2T Loss-of-field Zone 2 timed out
BKSACSYN1 DifHzClc.instMag.f 25SLIPS 25 sync-check slip frequency Breaker S
BKSACSYN1 DifAngClc.instMag.f 25ANGS 25 sync-check angle difference for Breaker S
BKSACSYN1 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKSACSYN1 V2Clc.instMag.f 25VSSFM 25 sync-check synchronizing voltage magnitude for Breaker S
BKSCCSYN2 DifHzClc.instMag.f 25SLIPS 25 sync-check slip frequency Breaker S
BKSCCSYN2 DifAngClc.instMag.f 25ANGCS 25 sync-check compensated angle difference for Breaker S
BKSCCSYN2 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKSCCSYN2 V2Clc.instMag.f 25VSSFM 25 sync-check synchronizing voltage magnitude for Breaker S
BKTACSYN3 DifHzClc.instMag.f 25SLIPT 25 sync-check slip frequency Breaker T
BKTACSYN3 DifAngClc.instMag.f 25ANGT 25 sync-check angle difference for Breaker T
BKTACSYN3 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKTACSYN3 V2Clc.instMag.f 25VSTFM 25 sync-check synchronizing voltage magnitude for Breaker T
BKTCCSYN4 DifHzClc.instMag.f 25SLIPT 25 sync-check slip frequency Breaker T
BKTCCSYN4 DifAngClc.instMag.f 25ANGCT 25 sync-check compensated angle difference for Breaker T
BKTCCSYN4 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKTCCSYN4 V2Clc.instMag.f 25VSTFM 25 sync-check synchronizing voltage magnitude for Breaker T
BKUACSYN5 DifHzClc.instMag.f 25SLIPU 25 sync-check slip frequency Breaker U
BKUACSYN5 DifAngClc.instMag.f 25ANGU 25 sync-check angle difference for Breaker U
BKUACSYN5 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKUACSYN5 V2Clc.instMag.f 25VSUFM 25 sync-check synchronizing voltage magnitude for Breaker U
BKUCCSYN6 DifHzClc.instMag.f 25SLIPU 25 sync-check slip frequency Breaker U
BKUCCSYN6 DifAngClc.instMag.f 25ANGCU 25 sync-check compensated angle difference for Breaker U
BKUCCSYN6 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKUCCSYN6 V2Clc.instMag.f 25VSUFM 25 sync-check synchronizing voltage magnitude for Breaker U
BKYACSYN7 DifHzClc.instMag.f 25SLIPY 25 sync-check slip frequency Breaker Y
BKYACSYN7 DifAngClc.instMag.f 25ANGY 25 sync-check angle difference for Breaker Y
BKYACSYN7 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKYACSYN7 V2Clc.instMag.f 25VSYFM 25 sync-check synchronizing voltage magnitude for Breaker Y
BKYCCSYN8 DifHzClc.instMag.f 25SLIPY 25 sync-check slip frequency Breaker Y
BKYCCSYN8 DifAngClc.instMag.f 25ANGCY 25 sync-check compensated angle difference for Breaker Y
BKYCCSYN8 V1Clc.instMag.f 25VPFM 25 sync-check polarizing voltage magnitude
BKYCCSYN8 V2Clc.instMag.f 25VSYFM 25 sync-check synchronizing voltage magnitude for Breaker Y
BSSASCBR1 AccAbr.instMag.f BSBCWPA Breaker S contact wear for Pole A
BSSBSCBR2 AccAbr.instMag.f BSBCWPB Breaker S contact wear for Pole B
BSSCSCBR3 AccAbr.instMag.f BSBCWPC Breaker S contact wear for Pole C
BSTASCBR4 AccAbr.instMag.f BTBCWPA Breaker T contact wear for Pole A
BSTBSCBR5 AccAbr.instMag.f BTBCWPB Breaker T contact wear for Pole B
BSTCSCBR6 AccAbr.instMag.f BTBCWPC Breaker T contact wear for Pole C

BSUASCBR7 AccAbr.instMag.f BUBCWPA Breaker U contact wear for Pole A

BSUBSCBR8 AccAbr.instMag.f BUBCWPB Breaker U contact wear for Pole B
BSUCSCBR9 AccAbr.instMag.f BUBCWPC Breaker U contact wear for Pole C
BSYASCBR10 AccAbr.instMag.f BYBCWPA Breaker Y contact wear for Pole A
BSYBSCBR11 AccAbr.instMag.f BYBCWPB Breaker Y contact wear for Pole B
BSYCSCBR12 AccAbr.instMag.f BYBCWPC Breaker Y contact wear for Pole C
Functional Constraint = DC
LLN0 NamPlt.swRev VERFID Relay FID string
PROLPHD1 PhyNam.serNum SERNUM Relay serial number
PROLPHD1 PhyNam.model PARNUM Relay part number
h
PROLPHD1 PhyNam.hwRev HWREV Hardware version of the relay mainboard
Functional Constraint = SP
LLN0 GrRef.setSrcRef IdName Functional name
LLN0 MltLev.setVal MLTLEV Multi-level control authority
a Writing a value of 1 pulses the first bit. Writing a value of 0 pulses the second bit.
b If disconnect is closed, value = 2. If disconnect is open, value = 1. If disconnect is intermediate, value = 0. A value of 3 is invalid.
c FLTYPE is an internal data source derived from the event summary and is not available to the user. Refer to Table 10.25 for more details.
d FLTCAUS is an internal data source derived from the event summary and is not available to the user. Refer to Table 10.26 for more details.
e I60MOD is an internal data source derived from the I850MOD analog quantity and it is not available to the user.
f If enabled, value = 1. If disabled, value = 3.
g If closed, value = 2. If open, value = 1.
h HWREV is an internal data source and is not available to the user.
Table 10.23 shows the LNs associated with measuring elements, defined as Logi-
cal Device MET.
Table 10.23 Logical Device: MET (Metering) (Sheet 1 of 8)
DCZBAT1 BatWrn.stVal DC1W DC monitor warning alarm
DCZBAT1 BatFail.stVal DC1F DC monitor fail alarm
DCZBAT1 BatGndFlt.stVal DC1G DC monitor ground fault alarm
DCZBAT1 BatDvAlm.stVal DC1R DC monitor alarm for ac ripple
LLN0 Loc.stVal LOC Control authority at local (bay) level
LLN0 LocSta.stVal LOCSTA Control authority at station level
LLN0 Mod.stVal I60MODa IEC 61850 mode/behavior status
METGMMTR5 SupWh.actVal 3PGMWHP Three-phase active energy exported, Terminal G
METGMMTR5 DmdWh.actVal 3PGMWHN Three-phase active energy imported, Terminal G
b
METLPHD1 PhyHealth.stVal EN?3:1 Relay enabled
METSMMTR1 SupWh.actVal 3PSMWHP Three-phase active energy exported, Terminal S
METSMMTR1 DmdWh.actVal 3PSMWHN Three-phase active energy imported, Terminal S
METTMMTR2 SupWh.actVal 3PTMWHP Three-phase active energy exported, Terminal T
METTMMTR2 DmdWh.actVal 3PTMWHN Three-phase active energy imported, Terminal T
METUMMTR3 SupWh.actVal 3PUMWHP Three-phase active energy exported, Terminal U

METUMMTR3 DmdWh.actVal 3PUMWHN Three-phase active energy imported, Terminal U

METYMMTR4 SupWh.actVal 3PYMWHP Three-phase active energy exported, Terminal Y
METYMMTR4 DmdWh.actVal 3PYMWHN Three-phase active energy imported, Terminal Y
DCZBAT1 Vol.instMag.f VDC Station battery dc voltage
METGMMXU5 TotW.instMag.f 3PGFC 40 ms average three-phase fundamental active power, Terminal G
METGMMXU5 TotVAr.instMag.f 3QGFC 40 ms average three-phase fundamental reactive power, Terminal G
METGMMXU5 TotVA.instMag.f 3SGFC 40 ms average three-phase fundamental apparent power, Terminal G
METGMMXU5 TotPF.instMag.f 3PFGC Three-phase displacement power factor, Terminal G
METGMMXU5 Hz.instMag.f FREQPG Generator frequency
METGMMXU5 Fs.instMag.f FREQPS System frequency
METGMMXU5 A.phsA.instCVal.mag.f IAGFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal G
METGMMXU5 A.phsA.instCVal.ang.f IAGFAC 40 ms average filtered phase current angle, A-Phase, Terminal G
METGMMXU5 A.phsB.instCVal.mag.f IBGFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal G
METGMMXU5 A.phsB.instCVal.ang.f IBGFAC 40 ms average filtered phase current angle, B-Phase, Terminal G
METGMMXU5 A.phsC.instCVal.mag.f ICGFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal G
METGMMXU5 A.phsC.instCVal.ang.f ICGFAC 40 ms average filtered phase current angle, C-Phase, Terminal G
METGMMXU5 W.phsA.instCVal.mag.f PAGFC 40 ms average phase fundamental active power, A-Phase, Terminal G
METGMMXU5 W.phsB.instCVal.mag.f PBGFC 40 ms average phase fundamental active power, B-Phase, Terminal G
METGMMXU5 W.phsC.instCVal.mag.f PCGFC 40 ms average phase fundamental active power, C-Phase, Terminal G
METGMMXU5 VAr.phsA.instCVal.mag.f QAGFC 40 ms average phase fundamental reactive power, A-Phase, Terminal G
METGMMXU5 VAr.phsB.instCVal.mag.f QBGFC 40 ms average phase fundamental reactive power, B-Phase, Terminal G
METGMMXU5 VAr.phsC.instCVal.mag.f QCGFC 40 ms average phase fundamental reactive power, C-Phase, Terminal G
METGMMXU5 VA.phsA.instCVal.mag.f SAGFC 40 ms average phase fundamental apparent power, A-Phase, Terminal G
METGMMXU5 VA.phsB.instCVal.mag.f SBGFC 40 ms average phase fundamental apparent power, B-Phase, Terminal G
METGMMXU5 VA.phsC.instCVal.mag.f SCGFC 40 ms average phase fundamental apparent power, C-Phase, Terminal G
METGMMXU5 PF.phsA.instCVal.mag.f PFAGC Phase displacement power factor, A-Phase, Terminal G
METGMMXU5 PF.phsB.instCVal.mag.f PFBGC Phase displacement power factor, B-Phase, Terminal G
METGMMXU5 PF.phsC.instCVal.mag.f PFCGC Phase displacement power factor, C-Phase, Terminal G
METGMMXU5 NeutFund.instCVal.mag.f VNFMC 40 ms average filtered generator neutral voltage magnitude
METGMMXU5 NeutFund.instCVal.ang.f VNFAC 40 ms average filtered generator neutral voltage angle
METGMMXU5 Neut3Ha.instCVal.mag.f VN3FMC 40 ms average filtered generator neutral third-harmonic voltage
magnitude
METGMMXU5 Neut3Ha.instCVal.ang.f VN3FAC 40 ms average filtered generator neutral third-harmonic voltage angle
METGMMXU5 Term3Ha.instCVal.mag.f 3V0Z3MC 40 ms average filtered generator terminal third-harmonic voltage
magnitude
METGMMXU5 Term3Ha.instCVal.ang.f 3V0Z3AC 40 ms average filtered generator terminal third-harmonic voltage angle
METGMMXU5 Tot3Ha.instCVal.mag.f VG3FMC 40 ms average filtered total neutral third-harmonic voltage magnitude
METGMMXU5 Tot3Ha.instCVal.ang.f VG3FAC 40 ms average filtered total neutral third-harmonic voltage angle
METGMMXU5 StatInsRis.instMag.f 64SIR 64S stator insulation resistance
METGMMXU5 StatInsCapac.instMag.f 64SIC 64S stator insulation capacitance
METGMMXU5 FldInsRis.instMag.f 64FIR 64F field insulation resistance

METSMMXU1 TotW.instMag.f 3PSFC 40 ms average three-phase fundamental active power, Terminal S

METSMMXU1 TotVAr.instMag.f 3QSFC 40 ms average three-phase fundamental reactive power, Terminal S
METSMMXU1 TotVA.instMag.f 3SSFC 40 ms average three-phase fundamental apparent power, Terminal S
METSMMXU1 TotPF.instMag.f 3PFSC Three-phase displacement power factor, Terminal S
METSMMXU1 Hz.instMag.f FREQPG Generator frequency
METSMMXU1 Fs.instMag.f FREQPS System frequency
METSMMXU1 A.phsA.instCVal.mag.f IASFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal S
METSMMXU1 A.phsA.instCVal.ang.f IASFAC 40 ms average filtered phase current angle, A-Phase, Terminal S
METSMMXU1 A.phsB.instCVal.mag.f IBSFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal S
METSMMXU1 A.phsB.instCVal.ang.f IBSFAC 40 ms average filtered phase current angle, B-Phase, Terminal S
METSMMXU1 A.phsC.instCVal.mag.f ICSFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal S
METSMMXU1 A.phsC.instCVal.ang.f ICSFAC 40 ms average filtered phase current angle, C-Phase, Terminal S
METSMMXU1 W.phsA.instCVal.mag.f PASFC 40 ms average phase fundamental active power, A-Phase, Terminal S
METSMMXU1 W.phsB.instCVal.mag.f PBSFC 40 ms average phase fundamental active power, B-Phase, Terminal S
METSMMXU1 W.phsC.instCVal.mag.f PCSFC 40 ms average phase fundamental active power, C-Phase, Terminal S
METSMMXU1 VAr.phsA.instCVal.mag.f QASFC 40 ms average phase fundamental reactive power, A-Phase, Terminal S
METSMMXU1 VAr.phsB.instCVal.mag.f QBSFC 40 ms average phase fundamental reactive power, B-Phase, Terminal S
METSMMXU1 VAr.phsC.instCVal.mag.f QCSFC 40 ms average phase fundamental reactive power, C-Phase, Terminal S
METSMMXU1 VA.phsA.instCVal.mag.f SASFC 40 ms average phase fundamental apparent power, A-Phase, Terminal S
METSMMXU1 VA.phsB.instCVal.mag.f SBSFC 40 ms average phase fundamental apparent power, B-Phase, Terminal S
METSMMXU1 VA.phsC.instCVal.mag.f SCSFC 40 ms average phase fundamental apparent power, C-Phase, Terminal S
METSMMXU1 PF.phsA.instCVal.mag.f PFASC Phase displacement power factor, A-Phase, Terminal S
METSMMXU1 PF.phsB.instCVal.mag.f PFBSC Phase displacement power factor, B-Phase, Terminal S
METSMMXU1 PF.phsC.instCVal.mag.f PFCSC Phase displacement power factor, C-Phase, Terminal S
METTMMXU2 TotW.instMag.f 3PTFC 40 ms average three-phase fundamental active power, Terminal T
METTMMXU2 TotVAr.instMag.f 3QTFC 40 ms average three-phase fundamental reactive power, Terminal T
METTMMXU2 TotVA.instMag.f 3STFC 40 ms average three-phase fundamental apparent power, Terminal T
METTMMXU2 TotPF.instMag.f 3PFTC Three-phase displacement power factor, Terminal T
METTMMXU2 Hz.instMag.f FREQPG Generator frequency
METTMMXU2 Fs.instMag.f FREQPS System frequency
METTMMXU2 A.phsA.instCVal.mag.f IATFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal T
METTMMXU2 A.phsA.instCVal.ang.f IATFAC 40 ms average filtered phase current angle, A-Phase, Terminal T
METTMMXU2 A.phsB.instCVal.mag.f IBTFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal T
METTMMXU2 A.phsB.instCVal.ang.f IBTFAC 40 ms average filtered phase current angle, B-Phase, Terminal T
METTMMXU2 A.phsC.instCVal.mag.f ICTFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal T
METTMMXU2 A.phsC.instCVal.ang.f ICTFAC 40 ms average filtered phase current angle, C-Phase, Terminal T
METTMMXU2 W.phsA.instCVal.mag.f PATFC 40 ms average phase fundamental active power, A-Phase, Terminal T
METTMMXU2 W.phsB.instCVal.mag.f PBTFC 40 ms average phase fundamental active power, B-Phase, Terminal T
METTMMXU2 W.phsC.instCVal.mag.f PCTFC 40 ms average phase fundamental active power, C-Phase, Terminal T
METTMMXU2 VAr.phsA.instCVal.mag.f QATFC 40 ms average phase fundamental reactive power, A-Phase, Terminal T
METTMMXU2 VAr.phsB.instCVal.mag.f QBTFC 40 ms average phase fundamental reactive power, B-Phase, Terminal T

METTMMXU2 VAr.phsC.instCVal.mag.f QCTFC 40 ms average phase fundamental reactive power, C-Phase, Terminal T
METTMMXU2 VA.phsA.instCVal.mag.f SATFC 40 ms average phase fundamental apparent power, A-Phase, Terminal T
METTMMXU2 VA.phsB.instCVal.mag.f SBTFC 40 ms average phase fundamental apparent power, B-Phase, Terminal T
METTMMXU2 VA.phsC.instCVal.mag.f SCTFC 40 ms average phase fundamental apparent power, C-Phase, Terminal T
METTMMXU2 PF.phsA.instCVal.mag.f PFATC Phase displacement power factor, A-Phase, Terminal T
METTMMXU2 PF.phsB.instCVal.mag.f PFBTC Phase displacement power factor, B-Phase, Terminal T
METTMMXU2 PF.phsC.instCVal.mag.f PFCTC Phase displacement power factor, C-Phase, Terminal T
METUMMXU3 TotW.instMag.f 3PUFC 40 ms average three-phase fundamental active power, Terminal U
METUMMXU3 TotVAr.instMag.f 3QUFC 40 ms average three-phase fundamental reactive power, Terminal U
METUMMXU3 TotVA.instMag.f 3SUFC 40 ms average three-phase fundamental apparent power, Terminal U
METUMMXU3 TotPF.instMag.f 3PFUC Three-phase displacement power factor, Terminal U
METUMMXU3 Hz.instMag.f FREQPG Generator frequency
METUMMXU3 Fs.instMag.f FREQPS System frequency
METUMMXU3 A.phsA.instCVal.mag.f IAUFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal U
METUMMXU3 A.phsA.instCVal.ang.f IAUFAC 40 ms average filtered phase current angle, A-Phase, Terminal U
METUMMXU3 A.phsB.instCVal.mag.f IBUFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal U
METUMMXU3 A.phsB.instCVal.ang.f IBUFAC 40 ms average filtered phase current angle, B-Phase, Terminal U
METUMMXU3 A.phsC.instCVal.mag.f ICUFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal U
METUMMXU3 A.phsC.instCVal.ang.f ICUFAC 40 ms average filtered phase current angle, C-Phase, Terminal U
METUMMXU3 W.phsA.instCVal.mag.f PAUFC 40 ms average phase fundamental active power, A-Phase, Terminal U
METUMMXU3 W.phsB.instCVal.mag.f PBUFC 40 ms average phase fundamental active power, B-Phase, Terminal U
METUMMXU3 W.phsC.instCVal.mag.f PCUFC 40 ms average phase fundamental active power, C-Phase, Terminal U
METUMMXU3 VAr.phsA.instCVal.mag.f QAUFC 40 ms average phase fundamental reactive power, A-Phase, Terminal U
METUMMXU3 VAr.phsB.instCVal.mag.f QBUFC 40 ms average phase fundamental reactive power, B-Phase, Terminal U
METUMMXU3 VAr.phsC.instCVal.mag.f QCUFC 40 ms average phase fundamental reactive power, C-Phase, Terminal U
METUMMXU3 VA.phsA.instCVal.mag.f SAUFC 40 ms average phase fundamental apparent power, A-Phase, Terminal U
METUMMXU3 VA.phsB.instCVal.mag.f SBUFC 40 ms average phase fundamental apparent power, B-Phase, Terminal U
METUMMXU3 VA.phsC.instCVal.mag.f SCUFC 40 ms average phase fundamental apparent power, C-Phase, Terminal U
METUMMXU3 PF.phsA.instCVal.mag.f PFAUC Phase displacement power factor, A-Phase, Terminal U
METUMMXU3 PF.phsB.instCVal.mag.f PFBUC Phase displacement power factor, B-Phase, Terminal U
METUMMXU3 PF.phsC.instCVal.mag.f PFCUC Phase displacement power factor, C-Phase, Terminal U
METVMMXU6 PPV.phsAB.instCVal.mag.f VABVFMC 40 ms average filtered phase-to-phase voltage magnitude, AB-Phase,
Terminal V
METVMMXU6 PPV.phsAB.instCVal.ang.f VABVFAC 40 ms average filtered phase-to-phase voltage angle, AB-Phase,
Terminal V
METVMMXU6 PPV.phsBC.instCVal.mag.f VBCVFMC 40 ms average filtered phase-to-phase voltage magnitude, BC-Phase,
Terminal V
METVMMXU6 PPV.phsBC.instCVal.ang.f VBCVFAC 40 ms average filtered phase-to-phase voltage angle, BC-Phase,
Terminal V
METVMMXU6 PPV.phsCA.instCVal.mag.f VCAVFMC 40 ms average filtered phase-to-phase voltage magnitude, CA-Phase,
Terminal V
METVMMXU6 PPV.phsCA.instCVal.ang.f VCAVFAC 40 ms average filtered phase-to-phase voltage angle, CA-Phase,
Terminal V

METVMMXU6 PhV.phsA.instCVal.mag.f VAVFMC 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase,

Terminal V
METVMMXU6 PhV.phsA.instCVal.ang.f VAVFAC 40 ms average filtered phase-to-neutral voltage angle, A-Phase,
Terminal V
METVMMXU6 PhV.phsB.instCVal.mag.f VBVFMC 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase,
Terminal V
METVMMXU6 PhV.phsB.instCVal.ang.f VBVFAC 40 ms average filtered phase-to-neutral voltage angle, B-Phase,
Terminal V
METVMMXU6 PhV.phsC.instCVal.mag.f VCVFMC 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase,
Terminal V
METVMMXU6 PhV.phsC.instCVal.ang.f VCVFAC 40 ms average filtered phase-to-neutral voltage angle, C-Phase,
Terminal V
METY1MMXN1 Amp.instMag.f IY1FMC 40 ms average filtered current magnitude, Channel 1, Terminal Y
METYMMXU4 TotW.instMag.f 3PYFC 40 ms average three-phase fundamental active power, Terminal Y
METYMMXU4 TotVAr.instMag.f 3QYFC 40 ms average three-phase fundamental reactive power, Terminal Y
METYMMXU4 TotVA.instMag.f 3SYFC 40 ms average three-phase fundamental apparent power, Terminal Y
METYMMXU4 TotPF.instMag.f 3PFYC Three-phase displacement power factor, Terminal Y
METYMMXU4 Hz.instMag.f FREQPG Generator frequency
METYMMXU4 Fs.instMag.f FREQPS System frequency
METYMMXU4 A.phsA.instCVal.mag.f IAYFMC 40 ms average filtered phase current magnitude, A-Phase, Terminal Y
METYMMXU4 A.phsA.instCVal.ang.f IAYFAC 40 ms average filtered phase current angle, A-Phase, Terminal Y
METYMMXU4 A.phsB.instCVal.mag.f IBYFMC 40 ms average filtered phase current magnitude, B-Phase, Terminal Y
METYMMXU4 A.phsB.instCVal.ang.f IBYFAC 40 ms average filtered phase current angle, B-Phase, Terminal Y
METYMMXU4 A.phsC.instCVal.mag.f ICYFMC 40 ms average filtered phase current magnitude, C-Phase, Terminal Y
METYMMXU4 A.phsC.instCVal.ang.f ICYFAC 40 ms average filtered phase current angle, C-Phase, Terminal Y
METYMMXU4 W.phsA.instCVal.mag.f PAYFC 40 ms average phase fundamental active power, A-Phase, Terminal Y
METYMMXU4 W.phsB.instCVal.mag.f PBYFC 40 ms average phase fundamental active power, B-Phase, Terminal Y
METYMMXU4 W.phsC.instCVal.mag.f PCYFC 40 ms average phase fundamental active power, C-Phase, Terminal Y
METYMMXU4 VAr.phsA.instCVal.mag.f QAYFC 40 ms average phase fundamental reactive power, A-Phase, Terminal Y
METYMMXU4 VAr.phsB.instCVal.mag.f QBYFC 40 ms average phase fundamental reactive power, B-Phase, Terminal Y
METYMMXU4 VAr.phsC.instCVal.mag.f QCYFC 40 ms average phase fundamental reactive power, C-Phase, Terminal Y
METYMMXU4 VA.phsA.instCVal.mag.f SAYFC 40 ms average phase fundamental apparent power, A-Phase, Terminal Y
METYMMXU4 VA.phsB.instCVal.mag.f SBYFC 40 ms average phase fundamental apparent power, B-Phase, Terminal Y
METYMMXU4 VA.phsC.instCVal.mag.f SCYFC 40 ms average phase fundamental apparent power, C-Phase, Terminal Y
METYMMXU4 PF.phsA.instCVal.mag.f PFAYC Phase displacement power factor, A-Phase, Terminal Y
METYMMXU4 PF.phsB.instCVal.mag.f PFBYC Phase displacement power factor, B-Phase, Terminal Y
METYMMXU4 PF.phsC.instCVal.mag.f PFCYC Phase displacement power factor, C-Phase, Terminal Y
METZMMXU7 PPV.phsAB.instCVal.mag.f VABZFMC 40 ms average filtered phase-to-phase voltage magnitude, Phases AB,
Terminal Z
METZMMXU7 PPV.phsAB.instCVal.ang.f VABZFAC 40 ms average filtered phase-to-phase voltage angle, Phases AB,
Terminal Z

METZMMXU7 PPV.phsBC.instCVal.mag.f VBCZFMC 40 ms average filtered phase-to-phase voltage magnitude, Phases BC,
Terminal Z
METZMMXU7 PPV.phsBC.instCVal.ang.f VBCZFAC 40 ms average filtered phase-to-phase voltage angle, Phases BC,
Terminal Z
METZMMXU7 PPV.phsCA.instCVal.mag.f VCAZFMC 40 ms average filtered phase-to-phase voltage magnitude, Phases CA,
Terminal Z
METZMMXU7 PPV.phsCA.instCVal.ang.f VCAZFAC 40 ms average filtered phase-to-phase voltage angle, Phases CA,
Terminal Z
METZMMXU7 PhV.phsA.instCVal.mag.f VAZFMC 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase,
Terminal Z
METZMMXU7 PhV.phsA.instCVal.ang.f VAZFAC 40 ms average filtered phase-to-neutral voltage angle, A-Phase,
Terminal Z
METZMMXU7 PhV.phsB.instCVal.mag.f VBZFMC 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase,
Terminal Z
METZMMXU7 PhV.phsB.instCVal.ang.f VBZFAC 40 ms average filtered phase-to-neutral voltage angle, B-Phase,
Terminal Z
METZMMXU7 PhV.phsC.instCVal.mag.f VCZFMC 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase,
Terminal Z
METZMMXU7 PhV.phsC.instCVal.ang.f VCZFAC 40 ms average filtered phase-to-neutral voltage angle, C-Phase,
Terminal Z
SEQGMSQI5 SeqA.c1.instCVal.mag.f I1GMC 40 ms average positive-sequence current magnitude, Terminal G
SEQGMSQI5 SeqA.c1.instCVal.ang.f I1GAC 40 ms average positive-sequence current angle, Terminal G
SEQGMSQI5 SeqA.c2.instCVal.mag.f 3I2GMC 40 ms average negative-sequence current magnitude, Terminal G
SEQGMSQI5 SeqA.c2.instCVal.ang.f 3I2GAC 40 ms average negative-sequence current angle, Terminal G
SEQGMSQI5 SeqA.c3.instCVal.mag.f 3I0GMC 40 ms average zero-sequence current magnitude, Terminal G
SEQGMSQI5 SeqA.c3.instCVal.ang.f 3I0GAC 40 ms average zero-sequence current angle, Terminal G
SEQSMSQI1 SeqA.c1.instCVal.mag.f I1SMC 40 ms average positive-sequence current magnitude, Terminal S
SEQSMSQI1 SeqA.c1.instCVal.ang.f I1SAC 40 ms average positive-sequence current angle, Terminal S
SEQSMSQI1 SeqA.c2.instCVal.mag.f 3I2SMC 40 ms average negative-sequence current magnitude, Terminal S
SEQSMSQI1 SeqA.c2.instCVal.ang.f 3I2SAC 40 ms average negative-sequence current angle, Terminal S
SEQSMSQI1 SeqA.c3.instCVal.mag.f 3I0SMC 40 ms average zero-sequence current magnitude, Terminal S
SEQSMSQI1 SeqA.c3.instCVal.ang.f 3I0SAC 40 ms average zero-sequence current angle, Terminal S
SEQTMSQI2 SeqA.c1.instCVal.mag.f I1TMC 40 ms average positive-sequence current magnitude, Terminal T
SEQTMSQI2 SeqA.c1.instCVal.ang.f I1TAC 40 ms average positive-sequence current angle, Terminal T
SEQTMSQI2 SeqA.c2.instCVal.mag.f 3I2TMC 40 ms average negative-sequence current magnitude, Terminal T
SEQTMSQI2 SeqA.c2.instCVal.ang.f 3I2TAC 40 ms average negative-sequence current angle, Terminal T
SEQTMSQI2 SeqA.c3.instCVal.mag.f 3I0TMC 40 ms average zero-sequence current magnitude, Terminal T
SEQTMSQI2 SeqA.c3.instCVal.ang.f 3I0TAC 40 ms average zero-sequence current angle, Terminal T
SEQUMSQI3 SeqA.c1.instCVal.mag.f I1UMC 40 ms average positive-sequence current magnitude, Terminal U
SEQUMSQI3 SeqA.c1.instCVal.ang.f I1UAC 40 ms average positive-sequence current angle, Terminal U
SEQUMSQI3 SeqA.c2.instCVal.mag.f 3I2UMC 40 ms average negative-sequence current magnitude, Terminal U
SEQUMSQI3 SeqA.c2.instCVal.ang.f 3I2UAC 40 ms average negative-sequence current angle, Terminal U
SEQUMSQI3 SeqA.c3.instCVal.mag.f 3I0UMC 40 ms average zero-sequence current magnitude, Terminal U
SEQUMSQI3 SeqA.c3.instCVal.ang.f 3I0UAC 40 ms average zero-sequence current angle, Terminal U

SEQVVMSQI6 SeqV.c1.instCVal.mag.f V1VMC 40 ms average positive-sequence voltage magnitude, Terminal V

SEQVVMSQI6 SeqV.c1.instCVal.ang.f V1VAC 40 ms average positive-sequence voltage angle, Terminal V
SEQVVMSQI6 SeqV.c2.instCVal.mag.f 3V2VMC 40 ms average negative-sequence voltage magnitude, Terminal V
SEQVVMSQI6 SeqV.c2.instCVal.ang.f 3V2VAC 40 ms average negative-sequence voltage angle, Terminal V
SEQVVMSQI6 SeqV.c3.instCVal.mag.f 3V0VMC 40 ms average zero-sequence voltage magnitude, Terminal V
SEQVVMSQI6 SeqV.c3.instCVal.ang.f 3V0VAC 40 ms average zero-sequence voltage angle, Terminal V
SEQVZMSQI7 SeqV.c1.instCVal.mag.f V1ZMC 40 ms average positive-sequence voltage magnitude, Terminal Z
SEQVZMSQI7 SeqV.c1.instCVal.ang.f V1ZAC 40 ms average positive-sequence voltage angle, Terminal Z
SEQVZMSQI7 SeqV.c2.instCVal.mag.f 3V2ZMC 40 ms average negative-sequence voltage magnitude, Terminal Z
SEQVZMSQI7 SeqV.c2.instCVal.ang.f 3V2ZAC 40 ms average negative-sequence voltage angle, Terminal Z
SEQVZMSQI7 SeqV.c3.instCVal.mag.f 3V0ZMC 40 ms average zero-sequence voltage magnitude, Terminal Z
SEQVZMSQI7 SeqV.c3.instCVal.ang.f 3V0ZAC 40 ms average zero-sequence voltage angle, Terminal Z
SEQYMSQI4 SeqA.c1.instCVal.mag.f I1YMC 40 ms average positive-sequence current magnitude, Terminal Y
SEQYMSQI4 SeqA.c1.instCVal.ang.f I1YAC 40 ms average positive-sequence current angle, Terminal Y
SEQYMSQI4 SeqA.c2.instCVal.mag.f 3I2YMC 40 ms average negative-sequence current magnitude, Terminal Y
SEQYMSQI4 SeqA.c2.instCVal.ang.f 3I2YAC 40 ms average negative-sequence current angle, Terminal Y
SEQYMSQI4 SeqA.c3.instCVal.mag.f 3I0YMC 40 ms average zero-sequence current magnitude, Terminal Y
SEQYMSQI4 SeqA.c3.instCVal.ang.f 3I0YAC 40 ms average zero-sequence current angle, Terminal Y
THERMCMTHR1 Tmp01.instMag.f RTC01TV Remote temperature value in °C, RTC01


THERMSMTHR1 Tmp01.instMag.f RTS01TV RTD temperature value in °C, RTS01
Functional Constraint = DC
LLN0 NamPlt.swRev VERFID Relay FID string
c
METLPHD1 PhyNam.hwRev HWREV Hardware version of the relay mainboard
METLPHD1 PhyNam.serNum SERNUM Relay serial number
METLPHD1 PhyNam.model PARNUM Relay part number
Functional Constraint = SP
LLN0 GrRef.setSrcRef IdName Functional name
LLN0 MltLev.setVal MLTLEV Multi-level control authority
a
I60MOD is an internal data source derived from the I850MOD analog quantity and it is not available to the user.
b If enabled, value = 1. If disabled, value = 3.
c
HWREV is an internal data source and is not available to the user.
Table 10.24 shows LNs specific to the SEL-400G that are associated with the
annunciation element, defined as Logical Device ANN. See Section 17:
IEC 61850 Communication in the SEL-400 Series Relays Instruction Manual for
ANN logical nodes supported by both the SEL-400G and other SEL-400 series
relays.

Synchrophasors
Table 10.24 SEL-400G Specific Logical Device: ANN (Annunciation)
Logical Device Attribute Data Source Comment
INADGGIO39 Ind01.stVal INADAS Inadvertent energization element armed, Terminal S
INADGGIO39 Ind02.stVal INADAT Inadvertent energization element armed, Terminal T
INADGGIO39 Ind03.stVal INADAU Inadvertent energization element armed, Terminal U
INADGGIO39 Ind04.stVal INADAY Inadvertent energization element armed, Terminal Y
RTCGGIO34 Ind01.stVal RTC01OK RTC01 healthy
. . . .
. . . .
. . . .
RTSGGIO34 Ind22.stVal RTS22OK RTD22 healthy
Table 10.25 FLTYPE—Fault Type
Value Fault Type
0 No fault type identified/present
Table 10.26 FLTCAUS—Fault Cause
Value Fault Cause
0 No fault summary loaded

1 Trigger command
2 Trip element
3 Event report element
6 87 Zone 1 differential trip
7 87 Zone 2 differential trip
8 Restricted earth fault
9 Excitation trip
10 Prime mover trip
11 Auxiliary trip
Synchrophasors
General synchrophasor operation is described in Section 18: Synchrophasors in
the SEL-400 Series Relays Instruction Manual. This section describes character-
istics of synchrophasors that are unique to the SEL-400G.
The SEL-400G complies with IEEE C37.118-2011. The SEL-400G supports the
P class. For information on the accuracy classes, refer to the IEEE C37.118.1-2011
standard.
NOTE: To meet P class latency The SEL-400G has 18 current channels and 6 voltage channels. Current Termi-
requirements, set PMOTSn = UDP_S,
UDP_T, or UDP_U. nals S, T, U, W, X, Y, and voltage Terminals V, Z are three-phase channels.

Synchrophasors
From these 24 channels, the SEL-400G can measure as many as 32 synchropha-

sors (24 phase synchrophasors and 8 positive-sequence synchrophasors). Syn-
chrophasors are always in primary, so set the CT and PT ratios in the group
settings appropriately.
Table 10.27 shows the default voltage synchrophasor name, enable conditions
and the PT ratio used to scale to the primary values.
Table 10.27 Voltage Synchrophasor Names
Phasor Name Phasor Enable Conditions PT Ratio
V1VPM PHDVq = V1 or ALL AND Terminal V included PTRV

VAVPM PHDVq = PH or ALL AND Terminal V included PTRV
VBVPM PHDVq = PH or ALL AND Terminal V included PTRV
VCVPM PHDVq = PH or ALL AND Terminal V included PTRV
V1ZPM PHDVq = V1 or ALL AND Terminal Z included PTRZ
VAZPM PHDVq = PH or ALL AND Terminal Z included PTRZ
VBZPM PHDVq = PH or ALL AND Terminal Z included PTRZ
VCZPM PHDVq = PH or ALL AND Terminal Z included PTRZ
Table 10.28 shows the default current synchrophasor names, enable conditions,
and the CT ratio used to scale to the primary values.
Table 10.28 Current Synchrophasor Names (Sheet 1 of 2)
Phasor
Phasor Enable Conditions CT Ratio
Name
I1SPM PHDIq = I1 or ALL AND Terminal S included CTRS

IASPM PHDIq = PH or ALL AND Terminal S included CTRS
IBSPM PHDIq = PH or ALL AND Terminal S included CTRS
ICSPM PHDIq = PH or ALL AND Terminal S included CTRS
I1TPM PHDIq = I1 or ALL AND Terminal T included CTRT
IATPM PHDIq = PH or ALL AND Terminal T included CTRT
IBTPM PHDIq = PH or ALL AND Terminal T included CTRT
ICTPM PHDIq = PH or ALL AND Terminal T included CTRT
I1UPM PHDIq = I1 or ALL AND Terminal U included CTRU
IAUPM PHDIq = PH or ALL AND Terminal U included CTRU
IBUPM PHDIq = PH or ALL AND Terminal U included CTRU
ICUPM PHDIq = PH or ALL AND Terminal U included CTRU
I1WPM PHDIq = I1 or ALL AND Terminal W included CTRW
IAWPM PHDIq = PH or ALL AND Terminal W included CTRW
IBWPM PHDIq = PH or ALL AND Terminal W included CTRW
ICWPM PHDIq = PH or ALL AND Terminal W included CTRW
I1XPM PHDIq = I1 or ALL AND Terminal X included CTRX
IAXPM PHDIq = PH or ALL AND Terminal X included CTRX
IBXPM PHDIq = PH or ALL AND Terminal X included CTRX
ICXPM PHDIq = PH or ALL AND Terminal X included CTRX
I1YPM PHDIq = I1 or ALL AND Terminal Y included CTRYa
IAYPM PHDIq = PH or ALL AND Terminal Y included CTRY1b

Modbus TCP Communication
Table 10.28 Current Synchrophasor Names (Sheet 2 of 2)
Phasor
Phasor Enable Conditions CT Ratio
Name
IBYPM PHDIq = PH or ALL AND Terminal Y included CTRY2b

ICYPM PHDIq = PH or ALL AND Terminal Y included CTRY3b
a
If CTCONY = 1PH, the CT ratio is zero.
b If CTCONY = Y, the CT ratio is CTRY.
Accuracy
The SEL-400G has the following phasor measurement accuracy:
TVE (total vector error) 1 percent for one or more of the following influence
quantities:
➤ Voltage magnitude range: 30 V–150 V
➤ Current magnitude range: (0.1–2) • INOM (INOM = 1 A or 5 A)
➤ Phase angle range: –179.99° to 180°
➤ Signal frequency range: ±2 Hz of nominal (50 or 60 Hz)
➤ Harmonic distortion: 1 percent (any harmonic)
It is important to note that the synchrophasors can only be correlated when the
PMU is in HIRIG or HPTP timekeeping mode, which can be verified by monitor-
ing the TSOK Relay Word bit. When TSOK = logical 1, the PMU timekeeping is
synchronized to the high-accuracy IRIG-B signal or Precision Time Protocol
(PTP) time source, and the synchrophasor data are precisely time-stamped. See
Section 11: Time and Date Management in the SEL-400 Series Relays Instruction
Manual for details.

Overview
This section describes Modbus TCP communications features supported by the
SEL-400G. Complete specifications for the Modbus protocol are available from
the Modbus user’s group website at modbus.org.
The SEL-400G allows as many as two simultaneous Modbus sessions and allows
a Modbus master device to do the following:
➤ Acquire metering, monitoring, and event data from the relay
➤ Control the SEL-400G breaker, disconnect, and remote bits
➤ Read and switch the active setting group
➤ Read and set the time and date
➤ Reset targets, demand and peak data, energy data, breaker monitor,
min/max, and battery monitor data
Enable Modbus TCP sessions with Ethernet port (Port 5) setting EMOD. The
master IP address for each session is selected with Port 5 settings MODIP1 and
MODIP2. Modbus TCP uses the device IP address as the Modbus identifier to
access data in the relay using a data map and function codes. If multiple sessions
are enabled, all sessions reference the same data map.

Communications Protocol
Modbus TCP Queries
The Modbus request or response is encapsulated when carried on a Modbus TCP/
IP network. A dedicated header used on TCP/IP identifies the Modbus Applica-
tion Data Unit (ADU). The header is called the MBAP (Modbus Application Pro-
tocol header), and it contains the following fields shown in Table 10.29.
Table 10.29 SEL-400G MBAP Header Fields
Field Number of Bytes
Transaction Identifier 2 Bytes

Protocol Identifier 2 Bytes (0 = MODBUS protocol)
Length 2 Bytes
Unit Identifier 1 Byte
The Modbus TCP message consists of the MBAP Header, followed by the Mod-
bus function code and the data supporting the function code. The Modbus TCP
message does not contain a CRC because error checking is accomplished through
TCP.
Modbus Responses
The subordinate device sends a response message after it performs the action the
query specifies. If the subordinate cannot execute the query command for any
reason, it sends an error response. Otherwise, the subordinate device response is
formatted similarly to the query and includes the MBAP header, function code
and data (if applicable). Note that because subordinate devices are differentiated
using the Unit Identifier field in the MBAP header, there is no need for a subordi-
nate address field like in Modbus RTU.
Supported Modbus Function Codes

The SEL-400G supports the Modbus function codes shown in Table 10.30.
Table 10.30 SEL-400G Modbus Function Codes
Codes Description
01h Read Discrete Output Coil Status

02h Read Discrete Input Status
03h Read Holding Registers
04h Read Input Registers
05h Write Single Coil
06h Preset Single Register
08h Diagnostic Command
0Fh Write Multiple Coils
10h Preset Multiple Registers
Modbus Exception Responses

The SEL-400G sends an exception code under the conditions described in
Table 10.31.

Table 10.31 SEL-400G Modbus Exception Codes
Exception Code Error Type Description
1 Illegal Function The received function code is either undefined or

Code unsupported.
2 Illegal Data The received command contains an unsupported
Address address in the data field.
3 Illegal Data Value The received command contains a value that is out of
range.
4 Device Error The SEL-400G is in the wrong state for the function a
query specifies.
The relay is unable to perform the action specified by
a query (i.e., cannot write to a read-only register,
device is disabled, etc.).
6 Busy The device is unable to process the command at this
time because of a busy resource.
In the event that any of the errors listed in Table 10.31 occur, the relay assembles
a response message that includes the exception code in the data field. The relay
sets the most significant bit in the function code field to indicate to the master
that the data field contains an error code, instead of the required data.
Function Codes
01h Read Discrete Output Coil Status Command
Use function code 01h to read the On/Off status of the selected bits (coils) (see
the Output Coils table shown in Table 10.42). The SEL-400G coil addresses start
at 0000. The coil status is packed one coil per bit of the data field. The Least Sig-
nificant Bit (LSB) of the first data byte contains the starting coil address in the
query. The other coils follow towards the high order end of this byte and from
low order to high order in subsequent bytes. The command request and response
are shown in Table 10.32.
Table 10.32 01h Read Discrete Output Coil Status Command
Bytes Field
Requests from the master must have the following format:

1 byte Function Code (01h)
2 bytes Address of the first bit
2 bytes Number of bits to read
A successful response from the subordinate will have the following format:
1 byte Bytes of data (n)
n bytes Data
To build the response, the SEL-400G calculates the number of bytes required to
contain the number of bits requested. If the number of bits requested is not evenly
divisible by eight, the device adds one more byte to maintain the balance of bits,
padded by zeros to make an even byte. Table 10.42 includes the coil number and
lists all possible coils available in the device.

The relay responses to errors in the query are shown in Table 10.33.
Table 10.33 Responses to 01h Read Discrete Output Coil Query Errors
Error Error Code Returned
Invalid bit to read Illegal Data Address (02h)

Invalid number of bits to read Illegal Data Value (03h)
Format error Illegal Data Value (03h)
02h Read Discrete Input Status Command

Use function code 02h to read the On/Off status of the selected bits (inputs), as
shown in Table 10.35. Input addresses start at 0000. The input status is packed
one input per bit of the data field. The LSB of the first data byte contains the
starting input address in the query. The other inputs follow towards the high order
end of this byte, and from low order to high order in subsequent bytes. The com-
mand request and response are shown in Table 10.34.
Table 10.34 02h Read Discrete Input Status Command
Bytes Field

2 bytes Address of the first bit
2 bytes Number of bits to read
n bytes Data
To build the response, the device calculates the number of bytes required to con-
tain the number of bits requested. If the number of bits requested is not evenly
divisible by eight, the device adds one more byte to maintain the balance of bits,
padded by zeros to make an even byte.
In each row, the input numbers are assigned from the right-most input to the left-
most input (i.e., input address 0 is reserved for future use and input address 7 is
EN). Input addresses start at 0000. Table 10.35 includes a sample of input
addresses in decimal and hexadecimal for some inputs (Relay Word bits) avail-
able in the device.
The Address numbers are assigned from the right-most address to the left-most
address in the Relay row, as shown in the following SEL-400G example.
Address 7 = EN
Address 6 = TRIPLED
Address 5 = reserved for future use
Address 15 = TLED_1
Address 14 = TLED_2
Address 13 = TLED_3

Address 12 = TLED_4
Address 11 = TLED_5
Address 10 = TLED_6
Address 9 = TLED_7
Address 8 = TLED_8
Table 10.35 02h SEL-400G Inputsa
Discrete Input Discrete Input Function Code Discrete Address

Address in Decimal Address in Hex Supported Description
0–7 0–7 02 Relay Element Status Row 0

8–15 8–F 02 Relay Element Status Row 1
… … … ….
4336–4343 10F0–10F7 02 Relay Element Status Row 529
4344–4351 10F8–10FF 02 Relay Element Status Row 530
a
See Section 11: Relay Word Bits for relay element row numbers and definitions.
Table 10.36 shows the relay responses to errors in the query.
Table 10.36 Responses to 02h Read Input Query Errors
Invalid bit to read Illegal Data Address (02h)

Invalid number of bits to read Illegal Data Value (03h)
03h Read Holding Register Command

Use function code 03h to read directly from the Modbus Register Map. The
default relay map is shown in Table 10.53. Use the SET U command (see Config-
urable Register Mapping on page 10.73) to configure the map using the register
label names shown in Table 10.52. You can read a maximum of 125 registers at
once with this function code. Most masters use 4X references with this function
code. Table 10.37 shows the command request and response.
Table 10.37 03h Read Holding Register Command
Bytes Field

2 bytes Starting Register Address
2 bytes Number of Registers to Read
n bytes Data (2–250)

Table 10.38 Responses to 03h Read Holding Register Query Errors
Illegal register to read Illegal Data Address (02h)

Illegal number of registers to read Illegal Data Value (03h)
04h Read Input Register Command

Use function code 04h to read directly from the Modbus Register Map. The
default relay map is shown in Table 10.53. Use the SET U command (see Config-
urable Register Mapping on page 10.73) to configure the map using the register
label names shown in Table 10.52. You can read a maximum of 125 registers at
once with this function code. Most masters use 3X references with this function
code. The command request and response are shown in Table 10.39.
Table 10.39 04h Read Input Register Command
Bytes Field

2 bytes Starting Register Address
2 bytes Number of Registers to Read
n bytes Data (2–250)
Table 10.40 Responses to 04h Read Input Register Query Errors
Illegal register to read Illegal Data Address (02h)

Illegal number of registers to read Illegal Data Value (03h)
05h Write Single Coil Command

Use function code 05h to set or clear a coil. The command request is shown in
Table 10.41.
Table 10.41 05h Write Single Coil Command (Sheet 1 of 2)
Bytes Field

2 bytes Coil Reference

Table 10.41 05h Write Single Coil Command (Sheet 2 of 2)
Bytes Field
1 byte Operation Code (FF for bit set, 00 for bit

clear)
1 byte Placeholder (00)
Table 10.42 lists the coil numbers supported by the SEL-400G. A set operation
(FF) to decimal address 32–63 has the effect of pulsing the corresponding
Remote Bit in the relay. RBnnP itself is not a Relay Word bit but an internal label
used to differentiate Remote Bit pulsing from the Set/Clear operation of RBnn.
Table 10.42 01h, 05h, 0Fh SEL-400G Output Coils (Sheet 1 of 6)
Coil Address Coil Address Function Code

Coil Label Coil Description Coil Function Duration
in Decimal in Hex Supported
0 0 01, 05, 0F RB01 Remote Bit 1 Set/Clear Set/Clear NA

10 A 01, 05, 0F RB11 Remote Bit 11 Set/Clear Set/Clear NA
11 B 01, 05, 0F RB12 Remote Bit 12 Set/Clear Set/Clear NA
12 C 01, 05, 0F RB13 Remote Bit 13 Set/Clear Set/Clear NA
13 D 01, 05, 0F RB14 Remote Bit 14 Set/Clear Set/Clear NA
14 E 01, 05, 0F RB15 Remote Bit 15 Set/Clear Set/Clear NA
15 F 01, 05, 0F RB16 Remote Bit 16 Set/Clear Set/Clear NA
26 1A 01, 05, 0F RB27 Remote Bit 27 Set/Clear Set/Clear NA
27 1B 01, 05, 0F RB28 Remote Bit 28 Set/Clear Set/Clear NA
28 1C 01, 05, 0F RB29 Remote Bit 29 Set/Clear Set/Clear NA
29 1D 01, 05, 0F RB30 Remote Bit 30 Set/Clear Set/Clear NA
30 1E 01, 05, 0F RB31 Remote Bit 31 Set/Clear Set/Clear NA


31 1F 01, 05, 0F RB32 Remote Bit 32 Set/Clear Set/Clear NA

a
32 20 01, 05, 0F RB01P Remote Bit 1 Pulse Pulse 1 SELOGIC process-
ing interval
33 21 01, 05, 0F RB02P Remote Bit 2 Pulse Pulsea 1 SELOGIC process-
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
42 2A 01, 05, 0F RB11P Remote Bit 11 Pulse Pulsea 1 SELOGIC process-
ing interval
43 2B 01, 05, 0F RB12P Remote Bit 12 Pulse Pulsea 1 SELOGIC process-
ing interval
44 2C 01, 05, 0F RB13P Remote Bit 13 Pulse Pulsea 1 SELOGIC process-
ing interval
45 2D 01, 05, 0F RB14P Remote Bit 14 Pulse Pulsea 1 SELOGIC process-
ing interval
46 2E 01, 05, 0F RB15P Remote Bit 15 Pulse Pulsea 1 SELOGIC process-
ing interval
47 2F 01, 05, 0F RB16P Remote Bit 16 Pulse Pulsea 1 SELOGIC process-
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval



ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
64 40 01, 05, 0F OCS Breaker Open Command, Set/Clearb NA
Terminal S
65 41 01, 05, 0F CCS Breaker Close Command, Set/Clearb NA
Terminal S
66 42 01, 05, 0F OCT Breaker Open Command, Set/Clearb NA
Terminal T
67 43 01, 05, 0F CCT Breaker Close Command, Set/Clearb NA
Terminal T
68 44 01, 05, 0F OCU Breaker Open Command, Set/Clearb NA
Terminal U
69 45 01, 05, 0F CCU Breaker Close Command, Set/Clearb NA
Terminal U
70 46 01, 05, 0F OCY Breaker Open Command, Set/Clearb NA
Terminal Y
71 47 01, 05, 0F CCY Breaker Close Command, Set/Clearb NA
Terminal Y
72 48 01, 05, 0F 89OC01 Open Disconnect Control 1 Set/Clearb NA
b
73 49 01, 05, 0F 89CC01 Close Disconnect Control 1 Set/Clear NA
74 4A 01, 05, 0F 89OC02 Open Disconnect Control 2 Set/Clearb NA
b
75 4B 01, 05, 0F 89CC02 Close Disconnect Control 2 Set/Clear NA
b
76 4C 01, 05, 0F 89OC03 Open Disconnect Control 3 Set/Clear NA
b
77 4D 01, 05, 0F 89CC03 Close Disconnect Control 3 Set/Clear NA
b
78 4E 01, 05, 0F 89OC04 Open Disconnect Control 4 Set/Clear NA
b
79 4F 01, 05, 0F 89CC04 Close Disconnect Control 4 Set/Clear NA
b
80 50 01, 05, 0F 89OC05 Open Disconnect Control 5 Set/Clear NA
b
b
b
84 54 01, 05, 0F 89OC07 Open Disconnect Control 7 Set/Clear NA
b



b
b
b
90 5A 01, 05, 0F 89OC10 Open Disconnect Control 10 Set/Clear NA
b
91 5B 01, 05, 0F 89CC10 Close Disconnect Control 10 Set/Clear NA
c
92 5C 01, 05, 0F RST_DEM Reset Demand Metering Pulse Approximately 1 s
93 5D 01, 05, 0F RST_PDMc Reset Peak Demand Metering Pulse Approximately 0.5 s
c
94 5E 01, 05, 0F RST_ENE Reset Energy Metering Pulse Approximately 0.5 s
95 5F 01, 05, 0F RST_BKS Reset Breaker S Monitoring Pulse Approximately 3 s
96 60 01, 05, 0F RST_BKT Reset Breaker T Monitoring Pulse Approximately 3 s
97 61 01, 05, 0F RST_BKU Reset Breaker U Monitoring Pulse Approximately 3 s
98 62 01, 05, 0F RST_BKY Reset Breaker Y Monitoring Pulse Approximately 3 s
99 63 01, 05, 0F RST_MM Reset Min/Max Metering Pulse Approximately 10 ms
c
100 64 01, 05, 0F RST_BAT Reset Battery Monitoring Pulse Approximately 0.5 s
101 65 01, 05, 0F RSTTRGT Reset Front Panel Targets Pulse 1 SELOGIC process-
ing interval
102 66 01, 05, 0F RST_HAL Rest HALARMA Pulse Approximately 0.3 s



a
135 87 01, 05, 0F RB33P Remote Bit 33 Pulse Pulse 1 SELOGIC process-
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval


ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
ing interval
a Pulsing a remote bit that is already set will cause the remote bit to be cleared at the end of the pulse.
b
If the breaker control jumper is removed, the relay returns an error code 06 (Subordinate Device Busy).
c Executing multiple reset bits simultaneously may extend the pulse duration of this bit by several seconds.
Coil addresses start at 0000. If the device is disabled, a function code 05h to any
coil will result in an Error Code 04 response. The device responses to other errors
in the query are shown in Table 10.43.
Table 10.43 Responses to 05h Write Single Coil Query Errors
Invalid bit (coil) Illegal Data Address (02h)

Invalid bit state requested Illegal Data Value (03h)
Format Error Illegal Data Value (03h)
06h Preset Single Register Command

The SEL-400G uses this function to allow a Modbus master to write directly to a
database register. Refer to the Modbus Quantities Table (Table 10.52) for a list of
registers that can be written by using this function code. The command request is
shown in Table 10.44.

Table 10.44 06h Preset Single Register Command
Bytes Field

2 bytes Register Address
2 bytes Data
Table 10.45 Responses to 06h Preset Single Register Query Errors
Illegal register address Illegal Data Address (02h)

Illegal register value Illegal Data Value (03h)
08h Loopback Diagnostic Command

The SEL-400G uses this function to allow a Modbus master to perform a diag-
nostic test on the Modbus communications channel and relay. When the subfunc-
tion field is 0000h, the relay returns a replica of the received message. The
command request and response are shown in Table 10.46.
Table 10.46 08h Loopback Diagnostic Command
Bytes Field

2 bytes Subfunction (0000h)
2 bytes Data Field
2 bytes Subfunction (0000h)
2 bytes Data Field (identical to data in Master
request)
Table 10.47 Responses to 08h Loopback Diagnostic Query Errors
Illegal subfunction code Illegal Data Value (03h)

0Fh Write Multiple Coils Command

This function code works much like code 05h, except that it allows you to write
multiple coils at once, to as many as 1968 per operation. The command request
and response are shown in Table 10.48.

Table 10.48 0Fh Write Multiple Coils Command
Bytes Field

1 byte Function Code (0Fh)
2 bytes Starting Address
2 bytes Number of Coils to Write
1 byte Number of Bytes of Data (n)
n bytes Data
1 byte Function Code (0Fh)
2 bytes Number of Coils
Table 10.42 lists the coils supported by the SEL-400G.

Coil addresses start at 0000. If the breaker jumper is removed, the device is dis-
abled or any of the individual bit operations fail for any other reason, the device
will respond with Error Code 04. The device responses to other errors in the
query are shown in Table 10.49.
Table 10.49 Responses to 0Fh Write Multiple Coils Query Errors
Invalid starting address and/or quantity of Illegal Data Address (02h)

coils
Quantity of coils and byte count (n) do not Illegal Data Value (03h)
agree with each other
10h Preset Multiple Registers Command

This function code works much like code 06h, except that it allows you to write
multiple registers at once, to as many as 100 per operation. The command request
and response are shown in Table 10.50.
Table 10.50 10h Preset Multiple Registers Command
Bytes Field

2 bytes Number of Registers to Write
1 byte Number of Bytes of Data (n)
n bytes Data
2 bytes Number of Registers

Table 10.51 10h Preset Multiple Registers Query Errors
Illegal register to set Illegal Data Address (02h)

Illegal number of registers to set Illegal Data Value (03h)
Incorrect number of bytes in query data Illegal Data Value (03h)
region
Invalid register data value Illegal Data Value (03h)
Bit Operations Using Function Codes 06h and 10h

The SEL-400G includes a register for controlling some of the outputs (RSTDAT
in Table 10.52). Use Modbus function codes 06h or 10h to write appropriate reset
data bits.
Remote Bit labels RB0108S, RB0108C, RB0108P, RB0916S, etc., are also bit
operations. Only those bit positions containing a 1 will operate when writing to
registers containing the Remote Bit labels.
For Set and Clear operations, each single register write operation will be atomic.
This means the affected bits will set or clear simultaneously during the same pro-
cessing interval. For Pulse operations, bits pulsed in a single register write are not
guaranteed to be atomic.
In the case of function code 10h Multiple Register write, the order of operation is
determined by the order the Remote Bits are received. When multiple registers
are written to, the registers with the highest address take priority.
A function code 03h or 04h read of any of the bit operation registers (RSTDAT or
Remote Bit Operations) will return a value of 0.
Modbus Documentation
Configurable Register Mapping
The SEL-400G Modbus Register Map defines an area of 1000 contiguous
addresses whose contents are defined by user-settable labels. Use the SEL ASCII
command SET U (or the Modbus User Map settings in SEL Grid Configurator
Software) to define the user map addresses. A default map is provided with the
relay. If the default Modbus map is not appropriate or more data are desired, edit
the map as necessary for your application.
To use the user-defined data region, follow these steps.
Step 1. Define the list of desired quantities (as many as 1000). Arrange the
quantities in any order that is convenient for you to use.
Step 2. Refer to Table 10.52 for a list of the Modbus labels for each quantity.
Step 3. Use the SET U command from the command line or Grid
Configurator Modbus User Map to map user registers 1 to 1000
(UM1 to UM1000) using the labels in Table 10.52 and to map scaling
values (UMS1 to UMS1000).
Step 4. Use Modbus function code 03h or 04h to read as many as 125
quantities at a time from map indexes 1 through 1000 (decimal). The
Modbus addresses begin with zero, which corresponds to Set U
setting UM1.

NOTE: If your master uses 5- or The relay multiplies the corresponding analog quantity value by this scaling
6-digit address references, add the
appropriate number to the Modbus number. Note that the Modbus master should divide by this number to obtain the
Address when configuring your original analog quantity value. Blank entries are not allowed in the Modbus User
master. For example, if your master
uses 5-digit addressing, add 40001 for
Map. If the User Map text file is sent to the relay containing blank entries, the
holding register operations. For input relay will condense the map so that no blank entries exist. To create spacing in
register functions, add 30001. If your
master uses 6-digit addressing, add
the map, enter a value of 0 for each unused line. If 0 is used, the scaling value for
400001 for holding register that quantity is forced to 1. Some analog quantities having scaling values that are
operations or 300001 for input always forced to 1 (see Table 10.52).
register functions. The actual address
that appears in the address field for
UM1 will be 0000. A master using As each label is entered in a register via the SET U command, the relay will
6-digit addresses to read a holding increment to the next valid register.
register may be configured for
address 400001. However, the data
address field of the message from the
master will contain address 0000.
Modbus Quantities Table

The available labels for the user-defined Modbus data region are defined in
Table 10.52.
Table 10.52 Modbus Analog Quantities Table (Sheet 1 of 17)
Function Code
Labels Scaling Description
Supported
ACTGRPa 1 03, 04, 06, 10 Active Settings Group (1–6)

RA001–RA256 1 03, 04, 06, 10 Remote Analogs 001–256
EVESEL 1 03, 04, 06, 10 Select an event to load into the Historical Fault Summary Registers. Also, use this
register to report the serial number selected
RSTDAT 1 03, 04, 06, 10 Reset Data Analog
Bit 0 = RST_DEM
Bit 1 = RST_PDM
Bit 2 = RST_ENE
Bit 3 = RST_BKS
Bit 4 = RST_BKT
Bit 5 = RST_BKU
Bit 6 = RST_BKY
Bit 7 = RST_MM
Bit 8 = RST_BAT
Bit 9 = RSTTRGT
Bit 10 = RST_HAL
Bits 11–15 Reserved
RB0108S 1 03, 04, 06, 10 Set bit position as follows:
Bit 0 = RB08
Bit 1 = RB07
Bit 2 = RB06
Bit 3 = RB05
Bit 4 = RB04
Bit 5 = RB03
Bit 6 = RB02
Bit 7 = RB01

Function Code
Supported

Bit 0 = RB16
Bit 1 = RB15
Bit 2 = RB14
Bit 3 = RB13
Bit 4 = RB12
Bit 5 = RB11
Bit 6 = RB10
Bit 7 = RB09
Bit 0 = RB24
Bit 1 = RB23
Bit 2 = RB22
Bit 3 = RB21
Bit 4 = RB20
Bit 5 = RB19
Bit 6 = RB18
Bit 7 = RB17
Bit 0 = RB32
Bit 1 = RB31
Bit 2 = RB30
Bit 3 = RB29
Bit 4 = RB28
Bit 5 = RB27
Bit 6 = RB26
Bit 7 = RB25
Bit 0 = RB40
Bit 1 = RB39
Bit 2 = RB38
Bit 3 = RB37
Bit 4 = RB36
Bit 5 = RB35
Bit 6 = RB34
Bit 7 = RB33
Bit 0 = RB48
Bit 1 = RB47
Bit 2 = RB46
Bit 3 = RB45
Bit 4 = RB44
Bit 5 = RB43
Bit 6 = RB42
Bit 7 = RB41

Function Code
Supported

Bit 0 = RB56
Bit 1 = RB55
Bit 2 = RB54
Bit 3 = RB53
Bit 4 = RB52
Bit 5 = RB51
Bit 6 = RB50
Bit 7 = RB49
Bit 0 = RB64
Bit 1 = RB63
Bit 2 = RB62
Bit 3 = RB61
Bit 4 = RB60
Bit 5 = RB59
Bit 6 = RB58
Bit 7 = RB57
RB0108C 1 03, 04, 06, 10 Clear bit position as follows:
Bit 0 = RB08
Bit 1 = RB07
Bit 2 = RB06
Bit 3 = RB05
Bit 4 = RB04
Bit 5 = RB03
Bit 6 = RB02
Bit 7 = RB01
Bit 0 = RB16
Bit 1 = RB15
Bit 2 = RB14
Bit 3 = RB13
Bit 4 = RB12
Bit 5 = RB11
Bit 6 = RB10
Bit 7 = RB09
Bit 0 = RB24
Bit 1 = RB23
Bit 2 = RB22
Bit 3 = RB21
Bit 4 = RB20
Bit 5 = RB19
Bit 6 = RB18
Bit 7 = RB17

Function Code
Supported

Bit 0 = RB32
Bit 1 = RB31
Bit 2 = RB30
Bit 3 = RB29
Bit 4 = RB28
Bit 5 = RB27
Bit 6 = RB26
Bit 7 = RB25
Bit 0 = RB40
Bit 1 = RB39
Bit 2 = RB38
Bit 3 = RB37
Bit 4 = RB36
Bit 5 = RB35
Bit 6 = RB34
Bit 7 = RB33
Bit 0 = RB48
Bit 1 = RB47
Bit 2 = RB46
Bit 3 = RB45
Bit 4 = RB44
Bit 5 = RB43
Bit 6 = RB42
Bit 7 = RB41
Bit 0 = RB56
Bit 1 = RB55
Bit 2 = RB54
Bit 3 = RB53
Bit 4 = RB52
Bit 5 = RB51
Bit 6 = RB50
Bit 7 = RB49
Bit 0 = RB64
Bit 1 = RB63
Bit 2 = RB62
Bit 3 = RB61
Bit 4 = RB60
Bit 5 = RB59
Bit 6 = RB58
Bit 7 = RB57

Function Code
Supported
RB0108P 1 03, 04, 06, 10 Pulse bit position as follows:

Bit 0 = RB08
Bit 1 = RB07
Bit 2 = RB06
Bit 3 = RB05
Bit 4 = RB04
Bit 5 = RB03
Bit 6 = RB02
Bit 7 = RB01
Bit 0 = RB16
Bit 1 = RB15
Bit 2 = RB14
Bit 3 = RB13
Bit 4 = RB12
Bit 5 = RB11
Bit 6 = RB10
Bit 7 = RB09
Bit 0 = RB24
Bit 1 = RB23
Bit 2 = RB22
Bit 3 = RB21
Bit 4 = RB20
Bit 5 = RB19
Bit 6 = RB18
Bit 7 = RB17
Bit 0 = RB32
Bit 1 = RB31
Bit 2 = RB30
Bit 3 = RB29
Bit 4 = RB28
Bit 5 = RB27
Bit 6 = RB26
Bit 7 = RB25
Bit 0 = RB40
Bit 1 = RB39
Bit 2 = RB38
Bit 3 = RB37
Bit 4 = RB36
Bit 5 = RB35
Bit 6 = RB34
Bit 7 = RB33

Function Code
Supported

Bit 0 = RB48
Bit 1 = RB47
Bit 2 = RB46
Bit 3 = RB45
Bit 4 = RB44
Bit 5 = RB43
Bit 6 = RB42
Bit 7 = RB41
Bit 0 = RB56
Bit 1 = RB55
Bit 2 = RB54
Bit 3 = RB53
Bit 4 = RB52
Bit 5 = RB51
Bit 6 = RB50
Bit 7 = RB49
Bit 0 = RB64
Bit 1 = RB63
Bit 2 = RB62
Bit 3 = RB61
Bit 4 = RB60
Bit 5 = RB59
Bit 6 = RB58
Bit 7 = RB57
OPBKRSb 1 03, 04, 06, 10 Operate Breaker S
b
OPBKRT 1 03, 04, 06, 10 Operate Breaker T
b
OPBKRU 1 03, 04, 06, 10 Operate Breaker U
b
OPBKRY 1 03, 04, 06, 10 Operate Breaker Y
b
OP8901 1 03, 04, 06, 10 Operate Disconnect 1
b
b
OP8904b 1 03, 04, 06, 10 Operate Disconnect 4
b
b
b
b
b
b
TIME_S 1 03, 04, 06, 10 Set Seconds (0–59)
TIME_M 1 03, 04, 06, 10 Set Minutes (0–59)

Function Code
Supported
TIME_H 1 03, 04, 06, 10 Set Hour (0–23)

DATE_D 1 03, 04, 06, 10 Set Day (1–31)
DATE_M 1 03, 04, 06, 10 Set Month (1–12)
DATE_Y 1 03, 04, 06, 10 Set Year (2000–2090)
MAXGRP 1 03, 04 Maximum number of protection groups
LSTEVSN 1 03, 04 Last event serial number
ETYPEc 1 03, 04 Event fault type
ETAR1c 1 03, 04 Event fault targets (Upper byte is first target row, lower byte is second target row)
c
ETAR2 1 03, 04 Event fault targets (Upper byte is third target row, lower byte is 0)
c
EFREQG 03, 04 Event fault generator fault frequency
EFREQSc 03, 04 Event fault system fault frequency
EGRPc 1 03, 04 Event fault active Settings Group (1–6)
c
ETIMES 1 03, 04 Event fault time seconds (scaled to milliseconds)
c
ETIMEM 1 03, 04 Event fault time minutes
c
ETIMEH 1 03, 04 Event fault time hours
c
EDATED 1 03, 04 Event fault date day
c
EDATEM 1 03, 04 Event fault date month
c
EDATEY 1 03, 04 Event fault date year
ETIMEUSc 1 03, 04 Event fault time UTC Seconds (scaled to milliseconds)
ETIMEUMc 1 03, 04 Event fault time UTC minutes
c
ETIMEUH 1 03, 04 Event fault time UTC hours
c
EDATEUD 1 03, 04 Event fault date UTC day
c
EDATEUM 1 03, 04 Event fault date UTC month
c
EDATEUY 1 03, 04 Event fault date UTC year
FWREV 1 03, 04 Relay firmware revision
d
SNUMBL 1 03, 04 Lowest 4 digits of the relay serial number
SNUMBMd 1 03, 04 Middle 4 digits of the relay serial number
SNUMBHd 1 03, 04 Highest 4 digits of the relay serial number
ROW_000–ROW_531 1 03, 04 Bitwise representation of Relay Word Row 000–531
BKRSOP 03, 04 Number of Breaker S operations
BKRTOP 03, 04 Number of Breaker T operations
BKRUOP 03, 04 Number of Breaker U operations
BKRYOP 03, 04 Number of Breaker Y operations
RTS01TV–RTS24TV 03, 04 RTD temperature value in °C, RTS 01–24
RTC01TV–RTC24TV 03, 04 Remote temperature value in °C, RTC 01–24
MAMB1 03, 04 Ambient temperature value in °C, Element 1
BSBCWPA 03, 04 Breaker S breaker-contact wear for Pole A
BSBCWPB 03, 04 Breaker S breaker-contact wear for Pole B

Function Code
Supported
BSBCWPC 03, 04 Breaker S breaker-contact wear for Pole C

BTBCWPA 03, 04 Breaker T breaker-contact wear for Pole A
BTBCWPB 03, 04 Breaker T breaker-contact wear for Pole B
BTBCWPC 03, 04 Breaker T breaker-contact wear for Pole C
BUBCWPA 03, 04 Breaker U breaker-contact wear for Pole A
BUBCWPB 03, 04 Breaker U breaker-contact wear for Pole B
BUBCWPC 03, 04 Breaker U breaker-contact wear for Pole C
BYBCWPA 03, 04 Breaker Y breaker-contact wear for Pole A
BYBCWPB 03, 04 Breaker Y breaker-contact wear for Pole B
BYBCWPC 03, 04 Breaker Y breaker-contact wear for Pole C
FREQPG 03, 04 Generator frequency
FREQPS 03, 04 System frequency
DFREQPG 03, 04 Generator rate-of-change of frequency
DFREQPS 03, 04 System rate-of-change of frequency
VDC 03, 04 Station battery dc voltage
DCPO 03, 04 Average positive-to-ground DC 1 voltage
DCNE 03, 04 Average Negative-to-Ground DC 1 Voltage
DCRI 03, 04 AC ripple of DC 1 voltage
DCMIN 03, 04 Minimum DC 1 voltage
DCMAX 03, 04 Maximum DC 1 voltage
PMV01–PMV64 03, 04 Protection SELOGIC Math Variable 01–64
PCN01CV– 03, 04 Protection SELOGIC Counter 01–32 current value
PCN32CV
AMV001–AMV256 03, 04 Automation SELOGIC Math Variable 001–256
ACN01CV– 03, 04 Automation SELOGIC Counter 01–32 current value
ACN32CV
TODMS 03, 04 UTC Time of Day in Milliseconds (0–86400000)
THR 03, 04 UTC Time, Hour (0–23)
TMIN 03, 04 UTC Time, Minute (0–59)
TSEC 03, 04 UTC Time, Seconds (0–59)
TMSEC 03, 04 UTC Time, Milliseconds (0–999)
DDOW 03, 04 UTC Date, Day of the week (1-SUN … 7-SAT)
DDOM 03, 04 UTC Date, Day of the month (1–31)
DDOY 03, 04 UTC Date, Day of the year (1–366)
DMON 03, 04 UTC Date, Month (1–12)
DYEAR 03, 04 UTC Date, Year (2000–2200)
TLODMS 03, 04 Local Time of Day in Milliseconds (0–86400000)
TLHR 03, 04 Local Time, Hour (0–23)
TLMIN 03, 04 Local Time, Minute (0–59)
TLSEC 03, 04 Local Time, Seconds (0–59)
TLMSEC 03, 04 Local Time, Milliseconds (0–999)

Function Code
Supported
DLDOW 03, 04 Local Date, Day of the week (1-SUN … 7-SAT)

DLDOM 03, 04 Local Date, Day of the month (1–31)
DLDOY 03, 04 Local Date, Day of the year (1–366)
DLMON 03, 04 Local Date, Month (1–12)
DLYEAR 03, 04 Local Date, Year (2000–2200)
TUTC 03, 04 Offset from local time to UTC time
TQUAL 03, 04 Worst case time source clock time error
RLYTEMP 03, 04 Relay temperature (°C temperature of the box)
RAO01– RAO64 03, 04 Remote Analog Output 01–64
25VPFM 03, 04 25 sync-check polarizing voltage magnitude
25VPFA 03, 04 25 sync-check polarizing voltage angle
25VSSFM 03, 04 25 sync-check synchronizing voltage magnitude for Breaker S
25VSTFM 03, 04 25 sync-check synchronizing voltage magnitude for Breaker T
25VSUFM 03, 04 25 sync-check synchronizing voltage magnitude for Breaker U
25VSYFM 03, 04 25 sync-check synchronizing voltage magnitude for Breaker Y
25VSSFA 03, 04 25 sync-check synchronizing voltage angle for Breaker S
25VSTFA 03, 04 25 sync-check synchronizing voltage angle for Breaker T
25VSUFA 03, 04 25 sync-check synchronizing voltage angle for Breaker U
25VSYFA 03, 04 25 sync-check synchronizing voltage angle for Breaker Y
25ANGS 03, 04 25 sync-check angle difference for Breaker S
25ANGT 03, 04 25 sync-check angle difference for Breaker T
25ANGU 03, 04 25 sync-check angle difference for Breaker U
25ANGY 03, 04 25 sync-check angle difference for Breaker Y
25ANGCS 03, 04 25 sync-check compensated angle difference for Breaker S
25ANGCT 03, 04 25 sync-check compensated angle difference for Breaker T
25ANGCU 03, 04 25 sync-check compensated angle difference for Breaker U
25ANGCY 03, 04 25 sync-check compensated angle difference for Breaker Y
25SLIPS 03, 04 25 sync-check slip frequency Breaker S
25SLIPT 03, 04 25 sync-check slip frequency Breaker T
25SLIPU 03, 04 25 sync-check slip frequency Breaker U
25SLIPY 03, 04 25 sync-check slip frequency Breaker Y
25DIFVS 03, 04 25 sync-check voltage difference for Breaker S
25DIFVT 03, 04 25 sync-check voltage difference for Breaker T
25DIFVU 03, 04 25 sync-check voltage difference for Breaker U
25DIFVY 03, 04 25 sync-check voltage difference for Breaker Y
25AFCT 03, 04 25A Autosynchronizer frequency pulse count
25AVCT 03, 04 25A Autosynchronizer voltage pulse count
40PQMX 03, 04 Loss-of-field Zone 3 Maximum Reactive Power
40PPMX 03, 04 Loss-of-field Zone 3 Maximum Active Power
40PQMN 03, 04 Loss-of-field Zone 2 Minimum Reactive Power

Function Code
Supported
40PPLG 03, 04 Loss-of-field Zone 3 Active Power Lag PF Limit

40PPLD 03, 04 Loss-of-field Zone 3 Active Power Lead PF Limit
40PPU 03, 04 Loss-of-field Zone 3 Active Power UPF limit
40PQZ2 03, 04 Loss-of-field Zone 2 Reactive Power limit
VAVFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal V
VBVFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal V
VCVFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal V
VAZFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal Z
VBZFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal Z
VCZFMC 03, 04 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal Z
VAVFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal V
VBVFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal V
VCVFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal V
VAZFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal Z
VBZFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal Z
VCZFAC 03, 04 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal Z
VABVFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases AB, Terminal V
VBCVFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases BC, Terminal V
VCAVFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases CA, Terminal V
VABZFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases AB, Terminal Z
VBCZFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases BC, Terminal Z
VCAZFMC 03, 04 40 ms average filtered phase-to-phase voltage magnitude, Phases CA, Terminal Z
VABVFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases AB, Terminal V
VBCVFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases BC, Terminal V
VCAVFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases CA, Terminal V
VABZFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases AB, Terminal Z
VBCZFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases BC, Terminal Z
VCAZFAC 03, 04 40 ms average filtered phase-to-phase voltage angle, Phases CA, Terminal Z
V1VMC 03, 04 40 ms average positive-sequence voltage magnitude, Terminal V
V1ZMC 03, 04 40 ms average positive-sequence voltage magnitude, Terminal Z
V1VAC 03, 04 40 ms average positive-sequence voltage angle, Terminal V
V1ZAC 03, 04 40 ms average positive-sequence voltage angle, Terminal Z
3V2VMC 03, 04 40 ms average negative-sequence voltage magnitude, Terminal V
3V2ZMC 03, 04 40 ms average negative-sequence voltage magnitude, Terminal Z
3V2VAC 03, 04 40 ms average negative-sequence voltage angle, Terminal V
3V2ZAC 03, 04 40 ms average negative-sequence voltage angle, Terminal Z
3V0VMC 03, 04 40 ms average zero-sequence voltage magnitude, Terminal V
3V0ZMC 03, 04 40 ms average zero-sequence voltage magnitude, Terminal Z
3V0VAC 03, 04 40 ms average zero-sequence voltage angle, Terminal V
3V0ZAC 03, 04 40 ms average zero-sequence voltage angle, Terminal Z

Function Code
Supported
VN3FMC 03, 04 40 ms average filtered Generator Neutral Third-Harmonic Voltage magnitude

VN3FAC 03, 04 40 ms average filtered Generator Neutral Third-Harmonic Voltage angle
3V0Z3MC 03, 04 40 ms average filtered Generator Terminal Third-Harmonic Voltage magnitude
3V0Z3AC 03, 04 40 ms average filtered Generator Terminal Third-Harmonic Voltage angle
VG3FMC 03, 04 40 ms average filtered Total Neutral Third-Harmonic Voltage magnitude
VG3FAC 03, 04 40 ms average filtered Total Neutral Third-Harmonic Voltage angle
IASFMC 03, 04 40 ms average filtered phase current magnitude, A-Phase, Terminal S
IBSFMC 03, 04 40 ms average filtered phase current magnitude, B-Phase, Terminal S
ICSFMC 03, 04 40 ms average filtered phase current magnitude, C-Phase, Terminal S
IATFMC 03, 04 40 ms average filtered phase current magnitude, A-Phase, Terminal T
IBTFMC 03, 04 40 ms average filtered phase current magnitude, B-Phase, Terminal T
ICTFMC 03, 04 40 ms average filtered phase current magnitude, C-Phase, Terminal T
IAUFMC 03, 04 40 ms average filtered phase current magnitude, A-Phase, Terminal U
IBUFMC 03, 04 40 ms average filtered phase current magnitude, B-Phase, Terminal U
ICUFMC 03, 04 40 ms average filtered phase current magnitude, C-Phase, Terminal U
IAYFMC 03, 04 40 ms average filtered phase current magnitude, A-Phase, Terminal Y
IBYFMC 03, 04 40 ms average filtered phase current magnitude, B-Phase, Terminal Y
ICYFMC 03, 04 40 ms average filtered phase current magnitude, C-Phase, Terminal Y
IAGFMC 03, 04 40 ms average filtered phase current magnitude, A-Phase, Terminal G
IBGFMC 03, 04 40 ms average filtered phase current magnitude, B-Phase, Terminal G
ICGFMC 03, 04 40 ms average filtered phase current magnitude, C-Phase, Terminal G
IASFAC 03, 04 40 ms average filtered phase current angle, A-Phase, Terminal S
IBSFAC 03, 04 40 ms average filtered phase current angle, B-Phase, Terminal S
ICSFAC 03, 04 40 ms average filtered phase current angle, C-Phase, Terminal S
IATFAC 03, 04 40 ms average filtered phase current angle, A-Phase, Terminal T
IBTFAC 03, 04 40 ms average filtered phase current angle, B-Phase, Terminal T
ICTFAC 03, 04 40 ms average filtered phase current angle, C-Phase, Terminal T
IAUFAC 03, 04 40 ms average filtered phase current angle, A-Phase, Terminal U
IBUFAC 03, 04 40 ms average filtered phase current angle, B-Phase, Terminal U
ICUFAC 03, 04 40 ms average filtered phase current angle, C-Phase, Terminal U
IAYFAC 03, 04 40 ms average filtered phase current angle, A-Phase, Terminal Y
IBYFAC 03, 04 40 ms average filtered phase current angle, B-Phase, Terminal Y
ICYFAC 03, 04 40 ms average filtered phase current angle, C-Phase, Terminal Y
IAGFAC 03, 04 40 ms average filtered phase current angle, A-Phase, Terminal G
IBGFAC 03, 04 40 ms average filtered phase current angle, B-Phase, Terminal G
ICGFAC 03, 04 40 ms average filtered phase current angle, C-Phase, Terminal G
IY1FMC 03, 04 40 ms average filtered current magnitude, Channel 1, Terminal Y
IY1FAC 03, 04 40 ms average filtered current angle, Channel 1, Terminal Y

Function Code
Supported

I1SMC 03, 04 40 ms average positive-sequence current magnitude, Terminal S
I1TMC 03, 04 40 ms average positive-sequence current magnitude, Terminal T
I1UMC 03, 04 40 ms average positive-sequence current magnitude, Terminal U
I1YMC 03, 04 40 ms average positive-sequence current magnitude, Terminal Y
I1GMC 03, 04 40 ms average positive-sequence current magnitude, Terminal G
I1SAC 03, 04 40 ms average positive-sequence current angle, Terminal S
I1TAC 03, 04 40 ms average positive-sequence current angle, Terminal T
I1UAC 03, 04 40 ms average positive-sequence current angle, Terminal U
I1YAC 03, 04 40 ms average positive-sequence current angle, Terminal Y
I1GAC 03, 04 40 ms average positive-sequence current angle, Terminal G
3I2SMC 03, 04 40 ms average negative-sequence current magnitude, Terminal S
3I2TMC 03, 04 40 ms average negative-sequence current magnitude, Terminal T
3I2UMC 03, 04 40 ms average negative-sequence current magnitude, Terminal U
3I2YMC 03, 04 40 ms average negative-sequence current magnitude, Terminal Y
3I2GMC 03, 04 40 ms average negative-sequence current magnitude, Terminal G
3I2SAC 03, 04 40 ms average negative-sequence current angle, Terminal S
3I2TAC 03, 04 40 ms average negative-sequence current angle, Terminal T
3I2UAC 03, 04 40 ms average negative-sequence current angle, Terminal U
3I2YAC 03, 04 40 ms average negative-sequence current angle, Terminal Y
3I2GAC 03, 04 40 ms average negative-sequence current angle, Terminal G
3I0SMC 03, 04 40 ms average zero-sequence current magnitude, Terminal S
3I0TMC 03, 04 40 ms average zero-sequence current magnitude, Terminal T
3I0UMC 03, 04 40 ms average zero-sequence current magnitude, Terminal U
3I0YMC 03, 04 40 ms average zero-sequence current magnitude, Terminal Y
3I0GMC 03, 04 40 ms average zero-sequence current magnitude, Terminal G
3I0SAC 03, 04 40 ms average zero-sequence current angle, Terminal S
3I0TAC 03, 04 40 ms average zero-sequence current angle, Terminal T
3I0UAC 03, 04 40 ms average zero-sequence current angle, Terminal U
3I0YAC 03, 04 40 ms average zero-sequence current angle, Terminal Y
3I0GAC 03, 04 40 ms average zero-sequence current angle, Terminal G
3I2SMS 03, 04 1 s average negative-sequence current magnitude, Terminal S
3I2TMS 03, 04 1 s average negative-sequence current magnitude, Terminal T
3I2UMS 03, 04 1 s average negative-sequence current magnitude, Terminal U
3I2YMS 03, 04 1 s average negative-sequence current magnitude, Terminal Y
3I2GMS 03, 04 1 s average negative-sequence current magnitude, Terminal G
3I0SMS 03, 04 1 s average zero-sequence current magnitude, Terminal S
3I0TMS 03, 04 1 s average zero-sequence current magnitude, Terminal T
3I0UMS 03, 04 1 s average zero-sequence current magnitude, Terminal U

Function Code
Supported
3I0YMS 03, 04 1 s average zero-sequence current magnitude, Terminal Y

3I0GMS 03, 04 1 s average zero-sequence current magnitude, Terminal G
PASFC 03, 04 40 ms average phase fundamental active power, A-Phase, Terminal S
PBSFC 03, 04 40 ms average phase fundamental active power, B-Phase, Terminal S
PCSFC 03, 04 40 ms average phase fundamental active power, C-Phase, Terminal S
PATFC 03, 04 40 ms average phase fundamental active power, A-Phase, Terminal T
PBTFC 03, 04 40 ms average phase fundamental active power, B-Phase, Terminal T
PCTFC 03, 04 40 ms average phase fundamental active power, C-Phase, Terminal T
PAUFC 03, 04 40 ms average phase fundamental active power, A-Phase, Terminal U
PBUFC 03, 04 40 ms average phase fundamental active power, B-Phase, Terminal U
PCUFC 03, 04 40 ms average phase fundamental active power, C-Phase, Terminal U
PAYFC 03, 04 40 ms average phase fundamental active power, A-Phase, Terminal Y
PBYFC 03, 04 40 ms average phase fundamental active power, B-Phase, Terminal Y
PCYFC 03, 04 40 ms average phase fundamental active power, C-Phase, Terminal Y
PAGFC 03, 04 40 ms average phase fundamental active power, A-Phase, Terminal G
PBGFC 03, 04 40 ms average phase fundamental active power, B-Phase, Terminal G
PCGFC 03, 04 40 ms average phase fundamental active power, C-Phase, Terminal G
QASFC 03, 04 40 ms average phase fundamental reactive power, A-Phase, Terminal S
QBSFC 03, 04 40 ms average phase fundamental reactive power, B-Phase, Terminal S
QCSFC 03, 04 40 ms average phase fundamental reactive power, C-Phase, Terminal S
QATFC 03, 04 40 ms average phase fundamental reactive power, A-Phase, Terminal T
QBTFC 03, 04 40 ms average phase fundamental reactive power, B-Phase, Terminal T
QCTFC 03, 04 40 ms average phase fundamental reactive power, C-Phase, Terminal T
QAUFC 03, 04 40 ms average phase fundamental reactive power, A-Phase, Terminal U
QBUFC 03, 04 40 ms average phase fundamental reactive power, B-Phase, Terminal U
QCUFC 03, 04 40 ms average phase fundamental reactive power, C-Phase, Terminal U
QAYFC 03, 04 40 ms average phase fundamental reactive power, A-Phase, Terminal Y
QBYFC 03, 04 40 ms average phase fundamental reactive power, B-Phase, Terminal Y
QCYFC 03, 04 40 ms average phase fundamental reactive power, C-Phase, Terminal Y
QAGFC 03, 04 40 ms average phase fundamental reactive power, A-Phase, Terminal G
QBGFC 03, 04 40 ms average phase fundamental reactive power, B-Phase, Terminal G
QCGFC 03, 04 40 ms average phase fundamental reactive power, C-Phase, Terminal G
SASFC 03, 04 40 ms average phase fundamental apparent power, A-Phase, Terminal S
SBSFC 03, 04 40 ms average phase fundamental apparent power, B-Phase, Terminal S
SCSFC 03, 04 40 ms average phase fundamental apparent power, C-Phase, Terminal S
SATFC 03, 04 40 ms average phase fundamental apparent power, A-Phase, Terminal T
SBTFC 03, 04 40 ms average phase fundamental apparent power, B-Phase, Terminal T
SCTFC 03, 04 40 ms average phase fundamental apparent power, C-Phase, Terminal T
SAUFC 03, 04 40 ms average phase fundamental apparent power, A-Phase, Terminal U
SBUFC 03, 04 40 ms average phase fundamental apparent power, B-Phase, Terminal U

Function Code
Supported
SCUFC 03, 04 40 ms average phase fundamental apparent power, C-Phase, Terminal U

SAYFC 03, 04 40 ms average phase fundamental apparent power, A-Phase, Terminal Y
SBYFC 03, 04 40 ms average phase fundamental apparent power, B-Phase, Terminal Y
SCYFC 03, 04 40 ms average phase fundamental apparent power, C-Phase, Terminal Y
SAGFC 03, 04 40 ms average phase fundamental apparent power, A-Phase, Terminal G
SBGFC 03, 04 40 ms average phase fundamental apparent power, B-Phase, Terminal G
SCGFC 03, 04 40 ms average phase fundamental apparent power, C-Phase, Terminal G
3PSFC 03, 04 40 ms average three-phase fundamental active power, Terminal S
3PTFC 03, 04 40 ms average three-phase fundamental active power, Terminal T
3PUFC 03, 04 40 ms average three-phase fundamental active power, Terminal U
3PYFC 03, 04 40 ms average three-phase fundamental active power, Terminal Y
3PGFC 03, 04 40 ms average three-phase fundamental active power, Terminal G
3QSFC 03, 04 40 ms average three-phase fundamental reactive power, Terminal S
3QTFC 03, 04 40 ms average three-phase fundamental reactive power, Terminal T
3QUFC 03, 04 40 ms average three-phase fundamental reactive power, Terminal U
3QYFC 03, 04 40 ms average three-phase fundamental reactive power, Terminal Y
3QGFC 03, 04 40 ms average three-phase fundamental reactive power, Terminal G
3SSFC 03, 04 40 ms average three-phase fundamental apparent power, Terminal S
3STFC 03, 04 40 ms average three-phase fundamental apparent power, Terminal T
3SUFC 03, 04 40 ms average three-phase fundamental apparent power, Terminal U
3SYFC 03, 04 40 ms average three-phase fundamental apparent power, Terminal Y
3SGFC 03, 04 40 ms average three-phase fundamental apparent power, Terminal G
3PSFS 03, 04 1 s average three-phase fundamental active power, Terminal S
3PTFS 03, 04 1 s average three-phase fundamental active power, Terminal T
3PUFS 03, 04 1 s average three-phase fundamental active power, Terminal U
3PYFS 03, 04 1 s average three-phase fundamental active power, Terminal Y
3PGFS 03, 04 1 s average three-phase fundamental active power, Terminal G
3QSFS 03, 04 1 s average three-phase fundamental reactive power, Terminal S
3QTFS 03, 04 1 s average three-phase fundamental reactive power, Terminal T
3QUFS 03, 04 1 s average three-phase fundamental reactive power, Terminal U
3QYFS 03, 04 1 s average three-phase fundamental reactive power, Terminal Y
3QGFS 03, 04 1 s average three-phase fundamental reactive power, Terminal G
3SSFS 03, 04 1 s average three-phase fundamental apparent power, Terminal S
3STFS 03, 04 1 s average three-phase fundamental apparent power, Terminal T
3SUFS 03, 04 1 s average three-phase fundamental apparent power, Terminal U
3SYFS 03, 04 1 s average three-phase fundamental apparent power, Terminal Y
3SGFS 03, 04 1 s average three-phase fundamental apparent power, Terminal G
PFASC 03, 04 Phase displacement power factor, A-Phase, Terminal S
PFBSC 03, 04 Phase displacement power factor, B-Phase, Terminal S
PFCSC 03, 04 Phase displacement power factor, C-Phase, Terminal S

Function Code
Supported
PFATC 03, 04 Phase displacement power factor, A-Phase, Terminal T

PFBTC 03, 04 Phase displacement power factor, B-Phase, Terminal T
PFCTC 03, 04 Phase displacement power factor, C-Phase, Terminal T
PFAUC 03, 04 Phase displacement power factor, A-Phase, Terminal U
PFBUC 03, 04 Phase displacement power factor, B-Phase, Terminal U
PFCUC 03, 04 Phase displacement power factor, C-Phase, Terminal U
PFAYC 03, 04 Phase displacement power factor, A-Phase, Terminal Y
PFBYC 03, 04 Phase displacement power factor, B-Phase, Terminal Y
PFCYC 03, 04 Phase displacement power factor, C-Phase, Terminal Y
PFAGC 03, 04 Phase displacement power factor, A-Phase, Terminal G
PFBGC 03, 04 Phase displacement power factor, B-Phase, Terminal G
PFCGC 03, 04 Phase displacement power factor, C-Phase, Terminal G
3PFSC 03, 04 Three-phase displacement power factor, Terminal S
3PFTC 03, 04 Three-phase displacement power factor, Terminal T
3PFUC 03, 04 Three-phase displacement power factor, Terminal U
3PFYC 03, 04 Three-phase displacement power factor, Terminal Y
3PFGC 03, 04 Three-phase displacement power factor, Terminal G
VAZRC 03, 04 40 ms average rms phase-to-neutral voltage magnitude, A-Phase, Terminal Z
VBZRC 03, 04 40 ms average rms phase-to-neutral voltage magnitude, B-Phase, Terminal Z
VCZRC 03, 04 40 ms average rms phase-to-neutral voltage magnitude, C-Phase, Terminal Z
VABZRC 03, 04 40 ms average rms phase-to-phase voltage magnitude, Phases AB, Terminal Z
VBCZRC 03, 04 40 ms average rms phase-to-phase voltage magnitude, Phases BC, Terminal Z
VCAZRC 03, 04 40 ms average rms phase-to-phase voltage magnitude, Phases CA, Terminal Z
IAGRC 03, 04 40 ms average rms phase current magnitude, A-Phase, Terminal G
IBGRC 03, 04 40 ms average rms phase current magnitude, B-Phase, Terminal G
ICGRC 03, 04 40 ms average rms phase current magnitude, C-Phase, Terminal G
IAGRS 03, 04 1 s average rms phase current magnitude, A-Phase, Terminal G
IBGRS 03, 04 1 s average rms phase current magnitude, B-Phase, Terminal G
ICGRS 03, 04 1 s average rms phase current magnitude, C-Phase, Terminal G
VNFMC 03, 04 40 ms average filtered generator neutral voltage magnitude
VNFAC 03, 04 40 ms average filtered generator neutral voltage angle
DM01 03, 04 Demand metering value 01

Function Code
Supported

DMM01 03, 04 Demand metering maximum value 01
3PSMWHP 03, 04 Three-phase active energy exported, Terminal S
3PTMWHP 03, 04 Three-phase active energy exported, Terminal T
3PUMWHP 03, 04 Three-phase active energy exported, Terminal U
3PYMWHP 03, 04 Three-phase active energy exported, Terminal Y
3PGMWHP 03, 04 Three-phase active energy exported, Terminal G
3QSMVHP 03, 04 Three-phase reactive energy exported, Terminal S
3QTMVHP 03, 04 Three-phase reactive energy exported, Terminal T
3QUMVHP 03, 04 Three-phase reactive energy exported, Terminal U
3QYMVHP 03, 04 Three-phase reactive energy exported, Terminal Y
3QGMVHP 03, 04 Three-phase reactive energy exported, Terminal G
3PSMWHN 03, 04 Three-phase active energy imported, Terminal S
3PTMWHN 03, 04 Three-phase active energy imported, Terminal T
3PUMWHN 03, 04 Three-phase active energy imported, Terminal U
3PYMWHN 03, 04 Three-phase active energy imported, Terminal Y
3PGMWHN 03, 04 Three-phase active energy imported, Terminal G
3QSMVHN 03, 04 Three-phase reactive energy imported, Terminal S
3QTMVHN 03, 04 Three-phase reactive energy imported, Terminal T
3QUMVHN 03, 04 Three-phase reactive energy imported, Terminal U
3QYMVHN 03, 04 Three-phase reactive energy imported, Terminal Y
3QGMVHN 03, 04 Three-phase reactive energy imported, Terminal G
3PSMWHT 03, 04 Total three-phase active energy, Terminal S
3PTMWHT 03, 04 Total three-phase active energy, Terminal T
3PUMWHT 03, 04 Total three-phase active energy, Terminal U
3PYMWHT 03, 04 Total three-phase active energy, Terminal Y
3PGMWHT 03, 04 Total three-phase active energy, Terminal G
3QSMVHT 03, 04 Total three-phase reactive energy, Terminal S
3QTMVHT 03, 04 Total three-phase reactive energy, Terminal T
3QUMVHT 03, 04 Total three-phase reactive energy, Terminal U
3QYMVHT 03, 04 Total three-phase reactive energy, Terminal Y

Function Code
Supported
3QGMVHT 03, 04 Total three-phase reactive energy, Terminal G

78GCN 03, 04 Out-of-step generator pole slip count
78SCN 03, 04 Out-of-step system pole slip count
78CN 03, 04 Out-of-step common pole slip count
60LDVM 03, 04 60 LOP Voltage Unbalance Magnitude
81AB1S 03, 04 81A Element Band 1 accumulated time
FREQPP 03, 04 Frequency for Synchrophasor Data, P Class
DFDTPP 03, 04 Rate-of-change of Frequency for Synchrophasor Data, P Class
THTCU1 03, 04 IEC Thermal Capacity used, Element 1
I2GPEQ 03, 04 Generator Negative-sequence Equivalent Harmonic Current
I2GP 03, 04 Generator Fundamental Negative-sequence Current
64SIR 03, 04 64S Stator Insulation Resistance
64SIC 03, 04 64S Stator Insulation capacitance
64FIR 03, 04 64F Field Insulation Resistance
PLLSTA 03, 04 Status register of the PLL
PLLCPP 03, 04 PLL clocks per pulse
I850MOD 03, 04 IEC 61850 Mode/Behavior Status
a The active settings group can be modified by writing the desired settings group number to ACTGRP. If any of the SELOGIC Group Switch
equations SS1–SS6 are asserted, the write is accepted but the active group will not change.
b Breaker and Disconnect Close and Open are mutually exclusive, and the relay asserts neither bit but returns the Exception Response 03 if an
attempt is made to write both bits.
c
An analog associated with Event Fault Summary registers.
d The serial number is a string that is converted to a number stored in three registers. The three serial number registers contain the lowest 12
digits (right-most). Because SEL-400 series relay serial numbers are 10 digits long, only the 2 right-most digits of SNUMBH are relevant. If any
of the three registers of the serial number cannot be decoded to a number between 0 and 9999, 0 is reported for that register. (This is for the
case where an alphanumeric character is entered into the serial number.)
Default Modbus Map and Modbus Addresses

The default user map entries are defined in Table 10.53. Use the SET U and
SHO U commands to modify or view these map settings, or use Grid Configura-
tor to manage the Modbus mapping.

Table 10.53 Default Modbus Map (Sheet 1 of 3)
Register
Map Index Address in Label Scale Description
Decimal
1 0 IASFMC 1 40 ms average filtered phase current magnitude, A-Phase, Terminal S

2 1 IASFAC 100 40 ms average filtered phase current angle, A-Phase, Terminal S
3 2 IBSFMC 1 40 ms average filtered phase current magnitude, B-Phase, Terminal S
4 3 IBSFAC 100 40 ms average filtered phase current angle, B-Phase, Terminal S
5 4 ICSFMC 1 40 ms average filtered phase current magnitude, C-Phase, Terminal S
6 5 ICSFAC 100 40 ms average filtered phase current angle, C-Phase, Terminal S
7 6 IATFMC 1 40 ms average filtered phase current magnitude, A-Phase, Terminal T
8 7 IATFAC 100 40 ms average filtered phase current angle, A-Phase, Terminal T
9 8 IBTFMC 1 40 ms average filtered phase current magnitude, B-Phase, Terminal T
10 9 IBTFAC 100 40 ms average filtered phase current angle, B-Phase, Terminal T
11 10 ICTFMC 1 40 ms average filtered phase current magnitude, C-Phase, Terminal T
12 11 ICTFAC 100 40 ms average filtered phase current angle, C-Phase, Terminal T
13 12 IAUFMC 1 40 ms average filtered phase current magnitude, A-Phase, Terminal U
14 13 IAUFAC 100 40 ms average filtered phase current angle, A-Phase, Terminal U
15 14 IBUFMC 1 40 ms average filtered phase current magnitude, B-Phase, Terminal U
16 15 IBUFAC 100 40 ms average filtered phase current angle, B-Phase, Terminal U
17 16 ICUFMC 1 40 ms average filtered phase current magnitude, C-Phase, Terminal U
18 17 ICUFAC 100 40 ms average filtered phase current angle, C-Phase, Terminal U
19 18 IAYFMC 1 40 ms average filtered phase current magnitude, A-Phase, Terminal Y
20 19 IAYFAC 100 40 ms average filtered phase current angle, A-Phase, Terminal Y
21 20 IBYFMC 1 40 ms average filtered phase current magnitude, B-Phase, Terminal Y
22 21 IBYFAC 100 40 ms average filtered phase current angle, B-Phase, Terminal Y
23 22 ICYFMC 1 40 ms average filtered phase current magnitude, C-Phase, Terminal Y
24 23 ICYFAC 100 40 ms average filtered phase current angle, C-Phase, Terminal Y
25 24 IAGFMC 1 40 ms average filtered phase current magnitude, A-Phase, Terminal G
26 25 IAGFAC 100 40 ms average filtered phase current angle, A-Phase, Terminal G
27 26 IBGFMC 1 40 ms average filtered phase current magnitude, B-Phase, Terminal G
28 27 IBGFAC 100 40 ms average filtered phase current angle, B-Phase, Terminal G
29 28 ICGFMC 1 40 ms average filtered phase current magnitude, C-Phase, Terminal G
30 29 ICGFAC 100 40 ms average filtered phase current angle, C-Phase, Terminal G
31 30 VAVFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal V
32 31 VAVFAC 100 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal V
33 32 VBVFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal V
34 33 VBVFAC 100 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal V
35 34 VCVFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal V
36 35 VCVFAC 100 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal V
37 36 VAZFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, A-Phase, Terminal Z
38 37 VAZFAC 100 40 ms average filtered phase-to-neutral voltage angle, A-Phase, Terminal Z
39 38 VBZFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, B-Phase, Terminal Z

Register
Decimal
40 39 VBZFAC 100 40 ms average filtered phase-to-neutral voltage angle, B-Phase, Terminal Z

41 40 VCZFMC 1 40 ms average filtered phase-to-neutral voltage magnitude, C-Phase, Terminal Z
42 41 VCZFAC 100 40 ms average filtered phase-to-neutral voltage angle, C-Phase, Terminal Z
43 42 PASFC 1 40 ms average phase fundamental active power, A-Phase, Terminal S
44 43 PBSFC 1 40 ms average phase fundamental active power, B-Phase, Terminal S
45 44 PCSFC 1 40 ms average phase fundamental active power, C-Phase, Terminal S
46 45 PATFC 1 40 ms average phase fundamental active power, A-Phase, Terminal T
47 46 PBTFC 1 40 ms average phase fundamental active power, B-Phase, Terminal T
48 47 PCTFC 1 40 ms average phase fundamental active power, C-Phase, Terminal T
49 48 PAUFC 1 40 ms average phase fundamental active power, A-Phase, Terminal U
50 49 PBUFC 1 40 ms average phase fundamental active power, B-Phase, Terminal U
51 50 PCUFC 1 40 ms average phase fundamental active power, C-Phase, Terminal U
52 51 PAYFC 1 40 ms average phase fundamental active power, A-Phase, Terminal Y
53 52 PBYFC 1 40 ms average phase fundamental active power, B-Phase, Terminal Y
54 53 PCYFC 1 40 ms average phase fundamental active power, C-Phase, Terminal Y
55 54 PAGFC 1 40 ms average phase fundamental active power, A-Phase, Terminal G
56 55 PBGFC 1 40 ms average phase fundamental active power, B-Phase, Terminal G
57 56 PCGFC 1 40 ms average phase fundamental active power, C-Phase, Terminal G
58 57 QASFC 1 40 ms average phase fundamental reactive power, A-Phase, Terminal S
59 58 QBSFC 1 40 ms average phase fundamental reactive power, B-Phase, Terminal S
60 59 QCSFC 1 40 ms average phase fundamental reactive power, C-Phase, Terminal S
61 60 QATFC 1 40 ms average phase fundamental reactive power, A-Phase, Terminal T
62 61 QBTFC 1 40 ms average phase fundamental reactive power, B-Phase, Terminal T
63 62 QCTFC 1 40 ms average phase fundamental reactive power, C-Phase, Terminal T
64 63 QAUFC 1 40 ms average phase fundamental reactive power, A-Phase, Terminal U
65 64 QBUFC 1 40 ms average phase fundamental reactive power, B-Phase, Terminal U
66 65 QCUFC 1 40 ms average phase fundamental reactive power, C-Phase, Terminal U
67 66 QAYFC 1 40 ms average phase fundamental reactive power, A-Phase, Terminal Y
68 67 QBYFC 1 40 ms average phase fundamental reactive power, B-Phase, Terminal Y
69 68 QCYFC 1 40 ms average phase fundamental reactive power, C-Phase, Terminal Y
70 69 QAGFC 1 40 ms average phase fundamental reactive power, A-Phase, Terminal G
71 70 QBGFC 1 40 ms average phase fundamental reactive power, B-Phase, Terminal G
72 71 QCGFC 1 40 ms average phase fundamental reactive power, C-Phase, Terminal G
73 72 ACTGRP 1 Active Settings Group (1–6)
74 73 RLYTEMP 100 Relay temperature (°C temperature of the box)
75 74 FREQPG 100 Generator frequency
76 75 FREQPS 100 System frequency
77 76 VDC 10 Station battery dc voltage
78 77 LSTEVSN 1 Last event serial number
79 78 EVESEL 1 Event number to select

Register
Decimal
80 79 ETYPE 1 Event fault type

81 80 ETAR1 1 Event fault targets (Upper byte is first target row, lower byte is second target row)
82 81 ETAR2 1 Event fault targets (Upper byte is third target row, lower byte is 0)
83 82 EFREQG 100 Event fault Generator fault frequency
84 83 EFREQS 100 Event fault System fault frequency
85 84 EGRP 1 Event fault active settings group (1–6)
86 85 ETIMEUS 1 Event fault Time UTC Seconds (scaled to milliseconds)
87 86 ETIMEUM 1 Event fault Time UTC Minutes
88 87 ETIMEUH 1 Event fault Time UTC Hours
89 88 EDATEUD 1 Event fault Date UTC Day
90 89 EDATEUM 1 Event fault Date UTC Month
91 90 EDATEUY 1 Event fault Date UTC Year
92–1000 91–999 Not Not Not Assigned
Assigned Assigned
1001–1020 1000–1019 RID NA Relay Identifier character data, two ASCII characters per register, left to righta
1021–1040 1020–1039 SID NA Station Identifier character data, two ASCII characters per register, left to righta
1041–1064 1040–1063 FID NA Firmware Identifier character data, two ASCII characters per register, left to righta
a
Modbus addresses 1000–1063 contain fixed relay information map data as strings. The strings are packed two characters per register, with the
most significant bit containing the character closest to the beginning of the string.
Reading Event Data Using Modbus

The SEL-400G provides a feature that allows relay event summary data to be
retrieved via Modbus. The Event Fault Summary registers are listed and foot-
noted in Table 10.52. To read the event summary data, set the Modbus Map to
contain the EVESEL label, along with the other Event Fault Summary related
labels. Figure 10.2 shows some of the available event summary labels in the
Modbus map.
=>>SHO U <Enter>
UM1 = LSTEVSN
UM2 = EVESEL
UM3 = ETIMES
UM4 = ETIMEM
UM5 = ETIMEH
UM6 = EDATED
UM7 = EDATEM
UM8 = EDATEY
UM9 = EFREQG
UM10 = EFREQS
UM11 = EGRP
UM12 = ETYPE
Figure 10.2 Modbus Event Summary Labels Example
Use Modbus function code 03 or 04 to read the Modbus registers. The LSTEVSN
label will contain the most recent event serial number. To read relay event sum-
mary data for a particular event using Modbus, use function code 06 to write the
event number to the Modbus register containing the EVESEL label. The
SEL-400G will populate the other event related registers with the data related to
the event number specified in the EVESEL label address. Issue a Modbus func-
tion code 03 or 04 command to read the registers containing the history data.

For example, issue the HIS command to view stored events in the relay, as shown
in Figure 10.3.
=>>HIS <Enter>
Relay 1 Date: 10/06/2019 Time: 19:43:37.109

# DATE TIME EVENT GRP TARGETS

10003 10/06/2019 19:43:23.374 ER 1
10002 10/06/2019 19:43:12.424 ER 1
10001 10/06/2019 19:42:42.599 TRIP 1
10000 10/06/2019 19:42:20.732 ER 1
=>>
Figure 10.3 History Command Example
NOTE: The Modbus Map is indexed In this example, retrieve the event summary data for the trip event by setting reg-
beginning with 1, which corresponds to
register address 0 in Modbus. ister address 0001 to the value of 3 (the third oldest event) using a function code
06 command. If a value is written to the EVESEL register for an event that does
not currently exist in the history data, the SEL-400G will respond with an excep-
tion code 03.
Following the function code 06 command, issue a function code 03 or 04 com-
mand to read Registers 0–11. The data returned in Registers 2–11 contain the
event time, event date, generator frequency, system frequency, active settings
group, and event type associated with the third oldest event.
The relay also returns the event summary data if the unique event serial number is
written to the EVESEL register as long as that event is currently in the history
data. So, repeating the previous example, the same trip event can be retrieved by
loading the Event Serial Number of 10001 into EVESEL.
When the history data are cleared in the relay, either from the HIS C command or
from a remote control point, the LSTEVSN register will contain the value of 0,
indicating there are no events that can be read using Modbus. The Modbus event
summary data registers may contain data from a past event, until a new valid
event number is written to the EVESEL register.

.InstructionManual
Instruction Manual
S E C T I O N 1 1
Relay Word Bits

This section contains tables of the Relay Word bits available within the
SEL-400G Advanced Generator Protection System. Table 11.1 lists the Relay
Word bits in alphabetic order; Table 11.2 lists every Relay Word bit row and the
bits contained within each row.
Alphabetical List
Table 11.1 Alphabetical List of Relay Word Bits (Sheet 1 of 89)
Name Bit Description Row
21PAB1P Zone 1 backup phase distance for AB loop picked up 456

21PAB1T Zone 1 backup phase distance for AB loop timed out 456
21PBC1P Zone 1 backup phase distance for BC loop picked up 456
21PBC1T Zone 1 backup phase distance for BC loop timed out 456
21PCA1P Zone 1 backup phase distance for CA loop picked up 456
21PCA1T Zone 1 backup phase distance for CA loop timed out 457
21PRAB1 Zone 1 backup phase distance for AB loop is within resistive blinder 457
21PRBC1 Zone 1 backup phase distance for BC loop is within resistive blinder 457
21PRCA1 Zone 1 backup phase distance for CA loop is within resistive blinder 457
21PZ1T Zone 1 backup phase distance timed out 458
21PZ1TC Zone 1 backup phase distance torque control 458
24D11 Volts per hertz Element 1 Level 1 asserted 95
24D121 Volts per hertz Element 1 Level 2 pickup 1 asserted 98
24D1R2 Volts per hertz Element 1 Level 2 reset 95
24D1R21 Definite-time Element 1 Level 1 reset 95
Date Code 20210708 .Instruction Manual SEL-400G Relay

11.2 Relay Word Bits
Alphabetical List

24D1T1 Volts per hertz Element 1 Level 1 timed out 95
24D1T21 Definite-time Element 1 Level 1 timed out 95
24D21 Volts per hertz Element 2 Level 1 asserted 96
24D2R2 Volts per hertz Element 2 Level 2 reset 97
24TC1 Volts per hertz predefined Element 1, torque control 95
24TC2 Volts per hertz predefined Element 2, torque control 97
24U1R1 User-defined volts per hertz Curve 1 Element 1 reset 96
24U1T1 User-defined volts per hertz Curve 1 Element 1 timed out 96
24U1TC1 User-defined volts per hertz Curve 1 Element 1, torque control 96
25AACT Autosynchronizer active 509
25ACNS Breaker S autosynchronizer cancel 508
25ACNT Breaker T autosynchronizer cancel 508
25ACNU Breaker U autosynchronizer cancel 508
25ACNY Breaker Y autosynchronizer cancel 508
25AFL Frequency lower command 509
25AFR Frequency raise command 509
25AS Breaker S voltage within sync angle window uncompensated 430
25ASACT Breaker S autosynchronizer active 510
25ASTO Breaker S autosynchronizer timed out 510
25ASTS Breaker S autosynchronizer start 508
25ASTT Breaker T autosynchronizer start 508

Relay Word Bits 11.3
Alphabetical List
25ASTU Breaker U autosynchronizer start 508

25ASTY Breaker Y autosynchronizer start 508
25AT Breaker T voltage within sync angle window uncompensated 430
25ATACT Breaker T autosynchronizer active 510
25ATTO Breaker T autosynchronizer timed out 510
25AU Breaker U voltage within sync angle window uncompensated 430
25AUACT Breaker U autosynchronizer active 510
25AUTO Breaker U autosynchronizer timed out 510
25AVL Voltage lower command 509
25AVR Voltage raise command 509
25AY Breaker Y voltage within sync angle window uncompensated 430
25AYACT Breaker Y autosynchronizer active 510
25AYTO Breaker Y autosynchronizer timed out 510
25BFSPS Breaker S closed indication for breaker failure 436
25BFSPT Breaker T closed indication for breaker failure 436
25BFSPU Breaker U closed indication for breaker failure 436
25BFSPY Breaker Y closed indication for breaker failure 436
25CS Breaker S voltages within sync angle window compensated 431
25CT Breaker T voltages within sync angle window compensated 431
25CU Breaker U voltages within sync angle window compensated 431
25CY Breaker Y voltages within sync angle window compensated 431
25ENBKS Breaker S synchronism check enabled 433
25ENBKT Breaker T synchronism check enabled 433
25ENBKU Breaker U synchronism check enabled 433
25ENBKY Breaker W synchronism check enabled 433
25PHOK Autosynchronizer phasing check is OK 509
25VDIFS Breaker S voltage difference is within acceptable window 435
25VDIFT Breaker T voltage difference is within acceptable window 435
25VDIFU Breaker U voltage difference is within acceptable window 435
25VDIFY Breaker Y voltage difference is within acceptable window 435
25WCS Breaker S voltages within sync angle window compensated and unsupervised 430
25WCT Breaker T voltages within sync angle window compensated and unsupervised 430
25WCU Breaker U voltages within sync angle window compensated and unsupervised 430
25WCY Breaker Y voltages within sync angle window compensated and unsupervised 430
271P1 Undervoltage Element 1, Level 1 asserted 33
271P1T Undervoltage Element 1, Level 1 timed out 33

Alphabetical List

27B81G Undervoltage supervision for generator frequency elements 44
27B81RG Undervoltage supervision for generator rate-of-change-of-frequency elements 51
27B81RS Undervoltage supervision for system rate-of-change-of-frequency elements 51
27B81S Undervoltage supervision for system frequency elements 44
27TC1 Undervoltage Element 1, torque control 33
32BIA01 Directional power Element 1 bias 105
32P01 Directional power Element 1 asserted 104
32T01 Directional power Element 1 timed out 104
32TC01 Directional power Element 1 torque control 104

Alphabetical List

3PORS Terminal S three-pole open asserted raw 60
3PORT Terminal T three-pole open asserted raw 60
3PORU Terminal U three-pole open asserted raw 60
3PORY Terminal Y three-pole open asserted raw 60
3POS Terminal S three-pole open asserted 60
3POT Terminal T three-pole open asserted 60
3POU Terminal U three-pole open asserted 60
3POY Terminal Y three-pole open asserted 60
40P1 Loss-of-field PQ Zone 1 picked up 460
40P1T Loss-of-field PQ Zone 1 timed out 460
40P1TC Loss-of-field PQ Zone 1 torque control 460
40P3 Steady-state stability limit Zone 3 picked up 461
40P3T Steady-state stability limit Zone 3 timed out 461
40P3TC Steady-state stability limit Zone 3 torque control 462
40P4 Capability curve limit Zone 4 picked up 460
40P4OE Capability curve limit Zone 4 overexcitation segment picked up 461
40P4PLD Capability curve limit Zone 4 over power lead PF segment picked up 461
40P4PLG Capability curve limit Zone 4 over power lag PF segment picked up 461
40P4T Capability curve limit Zone 4 timed out 461
40P4TC Capability curve limit Zone 4 torque control 461
40P4UE Capability curve limit Zone 4 underexcitation segment picked up 461
40PAT Loss-of-field undervoltage acceleration timed out 462
40PDAQ 40P dynamic zone analog quality 462
40PUV Loss-of-field PQ zone undervoltage element picked up 460
40Z1 Loss-of-field Zone 1 picked up 62
40Z1T Loss-of-field Zone 1 timed out 62
40Z1TC Loss-of-field Zone 1 torque control 62
40ZSUP Loss-of-field supervision picked up 62
46Q11 Generator current unbalance Element 1 Level 1 picked up 512
46Q1R2 Generator current unbalance Element 1 Level 2 reset 513
46Q1T1 Generator current unbalance Element 1 Level 1 timed out 512

Alphabetical List
46Q1TC Generator current unbalance Element 1 torque control 512

49R01S1 RTD Element 01 Level 1 asserted 490
49RLV1P RTD Element Location 1 voted trip asserted 492
50FS Phase or neutral current above pickup, Terminal S 122
50FT Phase or neutral current above pickup, Terminal T 124
50FU Phase or neutral current above pickup, Terminal U 126
50FY Phase or neutral current above pickup, Terminal Y 128
50SG1 Residual definite-time Element 1, Terminal S asserted 9

Alphabetical List

50SP1 Phase definite-time Element 1, Terminal S asserted 6
50SQ1 Negative-sequence definite-time Element 1, Terminal S asserted 7
50TG1 Residual definite-time Element 1, Terminal T asserted 13
50TP1 Phase definite-time Element 1, Terminal T asserted 10
50TQ1 Negative-sequence definite-time Element 1, Terminal T asserted 12
50UG1 Residual definite-time Element 1, Terminal U asserted 18
50UP1 Phase definite-time Element 1, Terminal U asserted 15
50UQ1 Negative-sequence definite-time Element 1, Terminal U asserted 16
50YG1 Residual definite-time Element 1, Terminal Y asserted 22
50YP1 Phase definite-time Element 1, Terminal Y asserted 19
50YQ1 Negative-sequence definite-time Element 1, Terminal Y asserted 21
51C Voltage-controlled instantaneous OC picked up 114
51CA A-Phase, voltage-controlled instantaneous OC picked up 114
51CAR A-Phase, voltage-controlled OC reset 115
51CAT A-Phase, voltage-controlled OC timed out 114
51CB B-Phase, voltage-controlled instantaneous OC picked up 114
51CBR B-Phase, voltage-controlled OC reset 115
51CBT B-Phase, voltage-controlled OC timed out 114

Alphabetical List
51CC C-Phase, voltage-controlled instantaneous OC picked up 114

51CCR C-Phase, voltage-controlled OC reset 115
51CCT C-Phase, voltage-controlled OC timed out 114
51CR Voltage-controlled OC reset 115
51CT Voltage-controlled OC timed out 114
51CTC Voltage-controlled OC torque control asserted 115
51MM01 Inverse-time Element 01 pickup setting outside of specified limits 24
51R01 Inverse-time Element 01 reset 24
51S01 Inverse-time Element 01 picked up 24

Alphabetical List

51T01 Inverse-time Element 01 timed out 24
51TC01 Inverse-time Element 01 enabled 24
51TM01 Inverse-time Element 01 time-dial setting outside of specified limits 24
51V Voltage-restrained instantaneous OC picked up 112
51VA A-Phase, voltage-restrained instantaneous OC picked up 112
51VAR A-Phase, voltage-restrained OC reset 113
51VAT A-Phase, voltage-restrained OC timed out 112

Alphabetical List
51VB B-Phase, voltage-restrained instantaneous OC picked up 112

51VBR B-Phase, voltage-restrained OC reset 113
51VBT B-Phase, voltage-restrained OC timed out 112
51VC C-Phase, voltage-restrained instantaneous OC picked up 112
51VCR C-Phase, voltage-restrained OC reset 113
51VCT C-Phase, voltage-restrained OC timed out 112
51VR Voltage-restrained OC reset 113
51VT Voltage-restrained OC timed out 112
51VTC Voltage-restrained OC torque-control asserted 113
52A_S Breaker S normally open status 133
52A_T Breaker T normally open status 133
52A_U Breaker U normally open status 133
52A_Y Breaker Y normally open status 133
52ALS Breaker alarm, Terminal S 132
52ALT Breaker alarm, Terminal T 132
52ALU Breaker alarm, Terminal U 132
52ALY Breaker alarm, Terminal Y 132
52B_S Breaker S normally closed status 133
52B_T Breaker T normally closed status 133
52B_U Breaker U normally closed status 133
52B_Y Breaker Y normally closed status 133
52CLS Breaker closed, Terminal S 132
52CLT Breaker closed, Terminal T 132
52CLU Breaker closed, Terminal U 132
52CLY Breaker closed, Terminal Y 132
52SRACK Breaker S rack position 500
52STEST Breaker S test position 500
52TRACK Breaker T rack position 500
52TTEST Breaker T test position 500
52URACK Breaker U rack position 500
52UTEST Breaker U test position 500
52YRACK Breaker Y rack position 500
52YTEST Breaker Y test position 500
591P1 Overvoltage Element 1, Level 1 asserted 37
591P1T Overvoltage Element 1, Level 1 timed out 37

Alphabetical List

59TC1 Overvoltage Element 1, torque control 37
59VPS Breaker S polarizing voltage within healthy voltage window 432
59VPT Breaker T polarizing voltage within healthy voltage window 432
59VPU Breaker U polarizing voltage within healthy voltage window 432
59VPY Breaker Y polarizing voltage within healthy voltage window 432
59VSS Breaker S synchronizing voltage within healthy voltage window 432
59VST Breaker T synchronizing voltage within healthy voltage window 432
59VSU Breaker U synchronizing voltage within healthy voltage window 432
59VSY Breaker Y synchronizing voltage within healthy voltage window 432
60LOPV 60 loss-of-potential element voltage unbalance logic picked up, Terminal V 464
60LOPZ 60 loss-of-potential element voltage unbalance logic picked up, Terminal Z 465
60NHS Highset level picked up 544
60NHSS Highset level switched to secure 544
60NHT Highset level picked up with timer 544
60NHTC 60N highset level torque control picked up 545
60NLR Lowset reset picked up 545
60NLS Lowset level picked up 544
60NLSS Lowset level switched to secure 544
60NLT Lowset level picked up with timer 544
60NLTC 60N lowset level torque control picked up 545

Alphabetical List
60NS 60N picked up 544

60NT 60N picked up with timer 544
60PAHS A-Phase highset level picked up 540
60PAHSS A-Phase highset level switched to secure 542
60PAHT A-Phase highset level picked up with timer 540
60PALS A-Phase lowset level picked up 541
60PALSS A-Phase lowset level switched to secure 542
60PALT A-Phase lowset level picked up with timer 541
60PBHS B-Phase highset level picked up 540
60PBHSS B-Phase highset level switched to secure 542
60PBHT B-Phase highset level picked up with timer 540
60PBLS B-Phase lowset level picked up 541
60PBLSS B-Phase lowset level switched to secure 542
60PBLT B-Phase lowset level picked up with timer 541
60PCHS C-Phase highset level picked up 540
60PCHSS C-Phase highset level switched to secure 542
60PCHT C-Phase highset level picked up with timer 540
60PCLS C-Phase lowset level picked up 541
60PCLSS C-Phase lowset level switched to secure 542
60PCLT C-Phase lowset level picked up with timer 541
60PHS Highset level picked up 540
60PHT Highset level picked up with timer 540
60PHTC 60P highset level torque control picked up 543
60PLR Lowset reset picked up 543
60PLS Lowset level picked up 541
60PLT Lowset level picked up with timer 541
60PLTC 60P lowset level torque control picked up 543
60PS 60P picked up 542
60PT 60P picked up with timer 542
64F1 64F instantaneous Level 1 pickup 518
64F1T 64F time-delayed Level 1 pickup 518
64F1TC 64F torque-controlled Element 1 picked up 518
64FIQ 64F remote insulation measurement quality bit 518
64G1 64G Element 1 pickup 520
64G11 64G Element 1 Level 1 pickup 520
64G1T 64G Element 1 delayed pickup 520
64G1T1 64G Element 1 Level 1 delayed pickup 520

Alphabetical List

64G1TC1 64G Element 1 Level 1 fundamental neutral overvoltage torque control 520
64G2DEN 64G Element 2 third-harmonic differential internal enable 521
64G2DIF 64G Element 2 third-harmonic differential asserted 521
64G2TC 64G Element 2 third-harmonic differential undervoltage torque control 521
64G2UEN 64G Element 2 undervoltage internal enable 521
64G2UV 64G Element 2 undervoltage asserted 521
64G3EN 64G Element 3 enable 522
64G3TC 64G Element 3 third-harmonic ratio torque control 522
64GAIN 64G accelerated input asserted 522
64GALT 64G alternate setting selected 521
64GAOK 64G third-harmonic angle check OK 523
64GATC 64G accelerated torque control 522
64GT 64G stator ground trip pickup 522
64GTIN 64G normal trip input asserted 522
64S1 64S instantaneous Level 1 pickup 516
64S1T 64S time-delayed Level 1 pickup 516
64S1TC 64S torque-controlled Element 1 picked up 516
64SIQ 64S remote insulation measurement quality bit 516
67SG1 Residual-directional/torque-controlled Element 1, Terminal S picked up 9
67SG1T Residual-directional/torque-controlled Element 1, Terminal S timed out 9
67SG1TC Residual-directional/torque-control enable definite-time Element 1, Terminal S 9
67SP1 Phase-directional/torque-controlled Element 1, Terminal S picked up 6
67SP1T Phase-directional/torque-controlled Element 1, Terminal S timed out 6
67SP1TC Phase-directional/torque-control enable definite-time Element 1, Terminal S 6
67SP2T Phase-directional/torque-controlled Element 2, Terminal S timed out. 6

Alphabetical List

67SP3T Phase-directional/torque-controlled Element 3, Terminal S timed out 7
67SQ1 Negative-sequence directional/torque-controlled Element 1, Terminal S picked up 7
67SQ1T Negative-sequence directional/torque-controlled Element 1, Terminal S timed out 7
67SQ1TC Negative-sequence directional/torque-control enable definite-time Element 1, Terminal S 7
67TG1 Residual-directional/torque-controlled Element 1, Terminal T picked up 13
67TG1T Residual-directional/torque-controlled Element 1, Terminal T timed out 13
67TG1TC Residual-directional/torque-control enable definite-time Element 1, Terminal T 13
67TP1 Phase-directional/torque-controlled Element 1, Terminal T picked up 10
67TP1T Phase-directional/torque-controlled Element 1, Terminal T timed out 10
67TP1TC Phase-directional/torque-control enable definite-time Element 1, Terminal T 10
67TQ1 Negative-sequence directional/torque-controlled Element 1, Terminal T picked up 12
67TQ1T Negative-sequence directional/torque-controlled Element 1, Terminal T timed out 12
67TQ1TC Negative-sequence directional/torque-control enable definite-time Element 1, Terminal T 12
67UG1 Residual-directional/torque-controlled Element 1, Terminal U picked up 18

Alphabetical List
67UG1T Residual-directional/torque-controlled Element 1, Terminal U timed out 18

67UG1TC Residual-directional/torque-control enable definite-time Element 1, Terminal U 18
67UP1 Phase-directional/torque-controlled Element 1, Terminal U picked up 15
67UP1T Phase-directional/torque-controlled Element 1, Terminal U timed out 15
67UP1TC Phase-directional/torque-control enable definite-time Element 1, Terminal U 15
67UQ1 Negative-sequence directional/torque-controlled Element 1, Terminal U picked up 16
67UQ1T Negative-sequence directional/torque-controlled Element 1, Terminal U timed out 16
67UQ1TC Negative-sequence directional/torque-control enable definite-time Element 1, Terminal U 16
67UQ2TC Negative-sequence directional/torque control enable definite-time Element 2, Terminal U 17
67UQ3TC Negative-sequence directional/torque control enable definite-time Element 3, Terminal U 17
67YG1 Residual-directional/torque-controlled Element 1, Terminal Y picked up 22
67YG1T Residual-directional/torque-controlled Element 1, Terminal Y timed out 22
67YG1TC Residual-directional/torque-control enable definite-time Element 1, Terminal Y 22
67YP1 Phase-directional/torque-controlled Element 1, Terminal Y picked up 19
67YP1T Phase-directional/torque-controlled Element 1, Terminal Y timed out 19
67YP1TC Phase-directional/torque-control enable definite-time Element 1, Terminal Y 19

Alphabetical List

67YQ1 Negative-sequence directional/torque-controlled Element 1, Terminal Y picked up 21
67YQ1T Negative-sequence directional/torque-controlled Element 1, Terminal Y timed out 21
67YQ1TC Negative-sequence directional/torque-control enable definite-time Element 1, Terminal Y 21
78CNT Out-of-step slips equal to count 467
78GCNT Out-of-step generator slips equal to count 466
78OOS Out-of-step protection picked up 466
78OST Out-of-step protection timed out 466
78OSTR Out-of-step protection trip raw 466
78R1 Out-of-step Blinder 1 picked up 466
78SCNT Out-of-step system slips equal to count 467
78SWNG Out-of-step swing detected 466
78TC Out-of-step torque control 467
78Z1 Out-of-step positive-sequence impedance inside the characteristic 466
81AB1 81A Element Band 1 pickup 484
81AB1T 81A Element Band 1 delayed pickup 485
81AC 81A Element pickup 486
81AT 81A Element delayed pickup 486

Alphabetical List
81ATC 81A Element torque control 486

81D1 Definite-time frequency element picked up, Level 1 41
81D1OVR Definite-time overfrequency Level 1 41
81D1T Definite-time over-/underfrequency element delay for Level 1 41
81D1TC Definite-time frequency Element 1, torque control 41
81D1UDR Definite-time underfrequency Level 1 41
81R1 Definite-time rate-of-change-of-frequency element picked up, Level 1 48
81R1OVR Definite-time over rate-of-change-of-frequency Level 1 48
81R1T Definite-time over-/under rate-of-change-of-frequency element delay for Level 1 48
81R1TC Definite-time rate-of-change-of-frequency Element 1, torque control 48
81R1UDR Definite-time under rate-of-change-of-frequency Level 1 48

Alphabetical List

87AAP51 5th harmonic alarm picked up, A-Phase, Element 1 73
87AAP52 5th harmonic alarm picked up, A-Phase, Element 2 83
87AB21 A-Phase Element 1 2nd harmonic blocking picked up 74
87AB22 A-Phase Element 2 2nd harmonic blocking picked up 84
87AB241 A-Phase Element 1 2nd or 4th harmonic blocking picked up 68
87AB242 A-Phase Element 2 2nd or 4th harmonic blocking picked up 79
87AB51 A-Phase Element 1 5th harmonic blocking picked up 68
87AB52 A-Phase Element 2 5th harmonic blocking picked up 79
87AD51 5th Harmonic delayed alarm picked up, Element 1 73
87AD52 5th Harmonic delayed alarm picked up, Element 2 84
87AHB1 A-Phase Element 1 harmonic blocking picked up 67
87AHB2 A-Phase Element 2 harmonic blocking picked up 78
87AHR1 A-Phase Element 1 harmonic restraint picked up 67
87AHR2 A-Phase Element 2 harmonic restraint picked up 78
87AP51 5th Harmonic alarm picked up, Element 1 73
87AP52 5th Harmonic alarm picked up, Element 2 84
87AR1 A-Phase restrained differential Element 1 picked up 65
87AR2 A-Phase restrained differential Element 2 picked up 75
87ARHB1 A-Phase restrained differential Element 1 picked up through harmonic blocking 66
87ARHB2 A-Phase restrained differential Element 2 picked up through harmonic blocking 77
87ARHR1 A-Phase restrained differential Element 1 picked up through harmonic restraint 67

Alphabetical List
87ARHR2 A-Phase restrained differential Element 2 picked up through harmonic restraint 77

87ARMS1 A-Phase rms differential Element 1 picked up 66
87ARMS2 A-Phase rms differential Element 2 picked up 77
87ASEC1 Differential Element 1 A-Phase, switch to secure 69
87ASEC2 Differential Element 2 A-Phase, switch to secure 79
87AUF1 A-Phase filtered unrestrained differential Element 1 picked up 65
87AUF2 A-Phase filtered unrestrained differential Element 2 picked up 76
87AUR1 A-Phase raw unrestrained differential Element 1 picked up 66
87AUR2 A-Phase raw unrestrained differential Element 2 picked up 76
87B21 Element 1 2nd harmonic blocking picked up 74
87B51 Element 1 5th harmonic blocking picked up 74
87BAP51 5th Harmonic alarm picked up, B-Phase, Element 1 73
87BAP52 5th Harmonic alarm picked up, B-Phase, Element 2 83
87BB21 B-Phase Element 1 2nd harmonic blocking picked up 74
87BB22 B-Phase Element 2 2nd harmonic blocking picked up 84
87BB241 B-Phase Element 1 2nd or 4th harmonic blocking picked up 68
87BB242 B-Phase Element 2 2nd or 4th harmonic blocking picked up 79
87BB51 B-Phase Element 1 5th harmonic blocking picked up 68
87BB52 B-Phase Element 2 5th harmonic blocking picked up 79
87BHB1 B-Phase Element 1 harmonic blocking picked up 67
87BHB2 B-Phase Element 2 harmonic blocking picked up 78
87BHCA1 HIGH bipolar, level low supervision, A-Phase, Element 1 88
87BHCA2 HIGH bipolar, level low supervision, A-Phase, Element 2 92
87BHCB1 HIGH bipolar, level low supervision, B-Phase, Element 1 88
87BHCB2 HIGH bipolar, level low supervision, B-Phase, Element 2 93
87BHCC1 HIGH bipolar, level low supervision, C-Phase, Element 1 88
87BHCC2 HIGH bipolar, level low supervision, C-Phase, Element 2 93
87BHR1 B-Phase Element 1 harmonic restraint picked up 68
87BHR2 B-Phase Element 2 harmonic restraint picked up 78
87BLCA1 LOW bipolar, level low supervision, A-Phase, Element 1 88
87BLCA2 LOW bipolar, level low supervision, A-Phase, Element 2 92
87BLCB1 LOW bipolar, level low supervision, B-Phase, Element 1 88
87BLCB2 LOW bipolar, level low supervision, B-Phase, Element 2 92
87BLCC1 LOW bipolar, level low supervision, C-Phase, Element 1 88
87BLCC2 LOW bipolar, level low supervision, C-Phase, Element 2 92
87BPH1 HIGH bipolar signature identified, Element 1 89
87BPHA1 HIGH bipolar signature identified, A-Phase, Element 1 89
87BPHA2 HIGH bipolar signature identified, A-Phase, Element 2 93

Alphabetical List
87BPHB1 HIGH bipolar signature identified, B-Phase, Element 1 89

87BPHB2 HIGH bipolar signature identified, B-Phase, Element 2 94
87BPHC1 HIGH bipolar signature identified, C-Phase, Element 1 89
87BPHC2 HIGH bipolar signature identified, C-Phase, Element 2 94
87BPL1 LOW bipolar signature identified, Element 1 88
87BPLA1 LOW bipolar signature identified, A-Phase, Element 1 88
87BPLA2 LOW bipolar signature identified, A-Phase, Element 2 93
87BPLB1 LOW bipolar signature identified, B-Phase, Element 1 89
87BPLB2 LOW bipolar signature identified, B-Phase, Element 2 93
87BPLC1 LOW bipolar signature identified, C-Phase, Element 1 89
87BPLC2 LOW bipolar signature identified, C-Phase, Element 2 93
87BR1 B-Phase restrained differential Element 1 picked up 65
87BR2 B-Phase restrained differential Element 2 picked up 75
87BRHB1 B-Phase restrained differential Element 1 picked up through harmonic blocking 66
87BRHB2 B-Phase restrained differential Element 2 picked up through harmonic blocking 77
87BRHR1 B-Phase restrained differential Element 1 picked up through harmonic restraint 67
87BRHR2 B-Phase restrained differential Element 2 picked up through harmonic restraint 77
87BRMS1 B-Phase rms differential Element 1 picked up 66
87BRMS2 B-Phase rms differential Element 2 picked up 77
87BSEC1 Differential Element 1 B-Phase, switch to secure 69
87BSEC2 Differential Element 2 B-Phase, switch to secure 79
87BUF1 B-Phase filtered unrestrained differential Element 1 picked up 65
87BUF2 B-Phase filtered unrestrained differential Element 2 picked up 76
87BUR1 B-Phase raw unrestrained differential Element 1 picked up 66
87BUR2 B-Phase raw unrestrained differential Element 2 picked up 76
87CAP51 5th harmonic alarm picked up, C-Phase, Element 1 73
87CAP52 5th harmonic alarm picked up, C-Phase, Element 2 83
87CB21 C-Phase Element 1 2nd harmonic blocking picked up 74
87CB22 C-Phase Element 2 2nd harmonic blocking picked up 84
87CB241 C-Phase Element 1 2nd or 4th harmonic blocking picked up 68
87CB242 C-Phase Element 2 2nd or 4th harmonic blocking picked up 79
87CB51 C-Phase Element 1 5th harmonic blocking picked up 69
87CB52 C-Phase Element 2 5th harmonic blocking picked up 79
87CHB1 C-Phase Element 1 harmonic blocking picked up 67
87CHB2 C-Phase Element 2 harmonic blocking picked up 78
87CHR1 C-Phase Element 1 harmonic restraint picked up 68
87CHR2 C-Phase Element 2 harmonic restraint picked up 78
87CR1 C-Phase restrained differential Element 1 picked up 65
87CR2 C-Phase restrained differential Element 2 picked up 75
87CRHB1 C-Phase restrained differential Element 1 picked up through harmonic blocking 67

Alphabetical List
87CRHB2 C-Phase restrained differential Element 2 picked up through harmonic blocking 77

87CRHR1 C-Phase restrained differential Element 1 picked up through harmonic restraint 67
87CRHR2 C-Phase restrained differential Element 2 picked up through harmonic restraint 78
87CRMS1 C-Phase rms differential Element 1 picked up 66
87CRMS2 C-Phase rms differential Element 2 picked up 77
87CSEC1 Differential Element 1 C-Phase, switch to secure 69
87CSEC2 Differential Element 2 C-Phase, switch to secure 80
87CUF1 C-Phase filtered unrestrained differential Element 1 picked up 65
87CUF2 C-Phase filtered unrestrained differential Element 2 picked up 76
87CUR1 C-Phase raw unrestrained differential Element 1 picked up 66
87CUR2 C-Phase raw unrestrained differential Element 2 picked up 76
87Q1 Negative-sequence differential Element 1 asserted (interturn fault detected) 100
87QB1 Negative-sequence differential blocking Element 1 asserted 100
87QTC1 Negative-sequence differential Element 1, torque control 100
87R1 Restrained differential Element 1 picked up 64
87RMS1 RMS differential Element 1 picked up 64
87RMTC1 RMS differential Element 1 torque control 64
87RMTC2 RMS differential Element 2 torque control 75
87RTC1 Restrained differential Element 1 torque control 64
87RTC2 Restrained differential Element 2 torque control 75
87TBHA1 HIGH bipolar unsupervised signature identified, A-Phase, Element 1 87
87TBHA2 HIGH bipolar unsupervised signature identified, A-Phase, Element 2 91
87TBHB1 HIGH bipolar unsupervised signature identified, B-Phase, Element 1 87
87TBHB2 HIGH bipolar unsupervised signature identified, B-Phase, Element 2 91
87TBHC1 HIGH bipolar unsupervised signature identified, C-Phase, Element 1 87
87TBHC2 HIGH bipolar unsupervised signature identified, C-Phase, Element 2 91
87TBLA1 LOW bipolar unsupervised signature identified, A-Phase, Element 1 86
87TBLA2 LOW bipolar unsupervised signature identified, A-Phase, Element 2 91
87TBLB1 LOW bipolar unsupervised signature identified, B-Phase, Element 1 86
87TBLB2 LOW bipolar unsupervised signature identified, B-Phase, Element 2 91
87TBLC1 LOW bipolar unsupervised signature identified, C-Phase, Element 1 87
87TBLC2 LOW bipolar unsupervised signature identified, C-Phase, Element 2 91
87TM1 Fundamental operate current picked up for three-legged core, Element 1 85
87TMA1 Fundamental operate current picked up for single core, A-Phase, Element 1 85
87TMA2 Fundamental operate current picked up for single core, A-Phase, Element 2 89

Alphabetical List
87TMB1 Fundamental Operate Current Picked up for single core, B-Phase, Element 1 85
87TMB2 Fundamental Operate Current Picked up for single core, B-Phase, Element 2 90
87TMC1 Fundamental Operate Current Picked up for single core, C-Phase, Element 1 85
87TMC2 Fundamental Operate Current Picked up for single core, C-Phase, Element 2 90
87TS1 Small and flat periods identified in the operate current for three-legged core, Element 1 85
87TSA1 Small and flat periods identified in the operate current for single core, A-Phase, Element 1 85
87TSA2 Small and flat periods identified in the operate current for single core, A-Phase, Element 2 90
87TSB1 Small and flat periods identified in the operate current for single core, B-Phase, Element 1 86
87TSB2 Small and flat periods identified in the operate current for single core, B-Phase, Element 2 90
87TSC1 Small and flat periods identified in the operate current for single core, C-Phase, Element 1 86
87TSC2 Small and flat periods identified in the operate current for single core, C-Phase, Element 2 90
87U1 Unrestrained differential Element 1 picked up 64
87UBL1 Bipolar unblocking identified, Element 1 87
87UBLA1 Bipolar unblocking identified, A-Phase, Element 1 87
87UBLA2 Bipolar unblocking identified, A-Phase, Element 2 92
87UBLB1 Bipolar unblocking identified, B-Phase, Element 1 87
87UBLB2 Bipolar unblocking identified, B-Phase, Element 2 92
87UBLC1 Bipolar unblocking identified, C-Phase, Element 1 87
87UBLC2 Bipolar unblocking identified, C-Phase, Element 2 92
87UF1 Filtered unrestrained differential Element 1 picked up 65
87UR1 Raw unrestrained differential Element 1 picked up 65
87UTC1 Unrestrained differential Element 1 Torque Control 64
87WB1 87 waveshape inrush blocking logic asserted, Element 1 86
87WBA1 87 waveshape inrush blocking logic asserted, A-Phase, Element 1 86
87WBA2 87 waveshape inrush blocking logic asserted, A-Phase, Element 2 90
87WBB1 87 waveshape inrush blocking logic asserted, B-Phase, Element 1 86
87WBB2 87 waveshape inrush blocking logic asserted, B-Phase, Element 2 90
87WBC1 87 waveshape inrush blocking logic asserted, C-Phase, Element 1 86
87WBC2 87 waveshape inrush blocking logic asserted, C-Phase, Element 2 91
87XB21 Element 1 harmonic cross blocking picked up 68
87Z1 Differential Element 1 picked up 64
89AL Any disconnect alarm 134

Alphabetical List
89AL01 Disconnect 1 alarm 134

89AM01 Disconnect 1 N/O auxiliary contact 134
89BM01 Disconnect 1 N/C auxiliary contact 134
89CBL01 Disconnect 01 close block 160
89CC01 ASCII close Disconnect 1 command 149

Alphabetical List

89CCM01 Mimic Disconnect 1 close control 149
89CCN01 Close Disconnect 1 149
89CIM01 Disconnect 01 close immobility timer timed out 161
89CIR01 Disconnect 01 close immobility timer reset 160

Alphabetical List

89CL01 Disconnect 1 closed 134
89CLB01 Disconnect 1 bus zone protection 146
89CLS01 Disconnect Close 1 output 149
89CRS01 Disconnect 01 close reset 160

Alphabetical List

89CSI01 Disconnect 01 close seal-in timer timed out 160
89CTL01 Disconnect 1 control status 134
89OBL01 Disconnect 01 open block 160
89OC01 ASCII open Disconnect 1 command 149

Alphabetical List

89OCM01 Mimic Disconnect 1 open control 149
89OCN01 Open Disconnect 1 149
89OIM01 Disconnect 01 open immobility timer timed out 161
89OIP Any disconnect operation in progress 135
89OIP01 Disconnect 1 operation in progress 134

Alphabetical List

89OIR01 Disconnect 01 open immobility timer reset 160
89OPE01 Disconnect Open 1 output 149
89OPN01 Disconnect 1 open 134
89ORS01 Disconnect 01 open reset 160

Alphabetical List

89OSI01 Disconnect 01 open seal-in timer timed out 160
ABFITS Alternate breaker failure, Terminal S 123
ABFITT Alternate breaker failure, Terminal T 125
ABFITU Alternate breaker failure, Terminal U 127
ABFITY Alternate breaker failure, Terminal Y 129
ACCESS A user is logged in at Access Level B or higher 318
ACCESSP Pulsed alarm for logins to Access Level B or higher 318
ACN01Q Automation SELOGIC Counter 01 asserted 308
ACN01R Automation SELOGIC Counter 01 reset 312

Alphabetical List


Alphabetical List

ACT01Q Automation SELOGIC Conditioning Timer 01 asserted 552
AFRTEXA Automation SELOGIC control equation first execution after automation settings change 316
AFRTEXP Automation SELOGIC control equation first execution after protection settings change 316
ALT01 Automation SELOGIC Latch 01 asserted 296

Alphabetical List

AMB_F Ambient temperature fault condition 447
ANOKA Analog transfer on Mirrored Bit Channel A 352
ANOKB Analog transfer on Mirrored Bit Channel B 353
AO201CH AO201 is clamped to AO201H setting value 528
AO201CL AO201 is clamped to AO201L setting value 528
AO201FL AO201 loop is faulted 528
AST01Q Automation SELOGIC sequencing Timer 01 asserted 300
AST01R Automation SELOGIC sequencing Timer 01 reset 304

Alphabetical List

AST07R Automation SELOGIC Sequencing Timer 07 reset 304
AST08Q Automation SELOGIC Sequencing Timer 08 asserted 300

Alphabetical List

ASV001 Automation SELOGIC Variable 001 asserted 264

Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List

ATBFIS Alternate breaker failure initiated, Terminal S 122
ATBFIT Alternate breaker failure initiated, Terminal T 124
ATBFIU Alternate breaker failure initiated, Terminal U 126
ATBFIY Alternate breaker failure initiated, Terminal Y 128
ATBFTS Alternate breaker failure timer timed out, Terminal S 122
ATBFTT Alternate breaker failure timer timed out, Terminal T 124
ATBFTU Alternate breaker failure timer timed out, Terminal U 126
ATBFTY Alternate breaker failure timer timed out, Terminal Y 128
AUNRLBL Automation SELOGIC control equation unresolved label 316
BADPASS Invalid password attempt alarm 317
BFIS Circuit Breaker S breaker failure initiate SELOGIC control equation 122
BFISPTS Breaker failure seal-in timer timed out, Terminal S 123

Alphabetical List
BFISPTT Breaker failure seal-in timer timed out, Terminal T 125

BFISPTU Breaker failure seal-in timer timed out, Terminal U 127
BFISPTY Breaker failure seal-in timer timed out, Terminal Y 129
BFIT Circuit Breaker T breaker failure initiate SELOGIC control equation 124
BFITS Breaker failure timer timed out, Terminal S 122
BFITT Breaker failure timer timed out, Terminal T 124
BFITU Breaker failure timer timed out, Terminal U 126
BFITY Breaker failure timer timed out, Terminal Y 128
BFIU Circuit Breaker U breaker failure initiate SELOGIC control equation 126
BFIY Circuit Breaker Y breaker failure initiate SELOGIC control equation 128
BLKFOS Breaker S flashover logic blocked 121
BLKFOT Breaker T flashover logic blocked 121
BLKFOU Breaker U flashover logic blocked 121
BLKFOY Breaker Y flashover logic blocked 121
BLKLPTS Block low-priority source from updating relay time 322
BNC_BNP Bad jitter on BNC port and the IRIG-B signal is lost afterwards 440
BNC_OK IRIG-B signal from BNC port is available and has sufficient quality 440
BNC_RST Disqualify BNC IRIG-B high-accuracy time source 440
BNC_SET Qualify BNC IRIG-B high-accuracy time source 440
BNC_TIM A valid IRIG-B time source is detected on BNC port 441
BNCSYNC Synchronized to a high-quality BNC IRIG source 442
BRKENAB Breaker control enable jumper is installed 318
BSBCWAL Breaker contact wear alarm, Breaker S 176
BSBITAL Inactivity time alarm, Breaker S 176
BSESOAL Slow electrical operate alarm, Breaker S 176
BSKAIAL Interrupted rms current alarm, Breaker S 176
BSMRTAL Motor run time alarm, Breaker S 176
BSMSOAL Mechanical slow operation alarm, Breaker S 176
BSYNBKS Breaker S synchronism check blocked 433
BSYNBKT Breaker T synchronism check blocked 433
BSYNBKU Breaker U synchronism check blocked 433
BSYNBKY Breaker Y synchronism check blocked 433
BTBCWAL Breaker contact wear alarm, Breaker T 177
BTBITAL Inactivity time alarm, Breaker T 177
BTESOAL Slow electrical operation alarm, Breaker T 177
BTKAIAL Interrupted rms current alarm, Breaker T 177
BTMRTAL Motor run time alarm, Breaker T 177
BTMSOAL Mechanical slow operation alarm, Breaker T 177
BUBCWAL Breaker contact wear alarm, Breaker U 178
BUBITAL Inactivity time alarm, Breaker U 178
BUESOAL Slow electrical operation alarm, Breaker U 178

Alphabetical List
BUKAIAL Interrupted rms current alarm, Breaker U 178

BUMRTAL Motor run time alarm, Breaker U 178
BUMSOAL Mechanical slow operation alarm, Breaker U 178
BYBCWAL Breaker contact wear alarm, Breaker Y 179
BYBITAL Inactivity time alarm, Breaker Y 179
BYESOAL Slow electrical operation alarm, Breaker Y 179
BYKAIAL Interrupted rms current alarm, Breaker Y 179
BYMRTAL Motor run time alarm, Breaker Y 179
BYMSOAL Mechanical slow operation alarm, Breaker Y 179
CBADA Unavailability threshold exceeded for normal Mirrored Bit communication, Channel A 352
CBADB Unavailability threshold exceeded for normal Mirrored Bit communication, Channel B 353
CCS Breaker close command, Terminal S 188
CCT Breaker close command, Terminal T 188
CCU Breaker close command, Terminal U 188
CCY Breaker close command, Terminal Y 188
CFAS Breaker S close fail angle alarm 436
CFAT Breaker T close fail angle alarm 436
CFAU Breaker U close fail angle alarm 436
CFAY Breaker Y close fail angle alarm 436
CFS Close logic timer timed out, Terminal S 210
CFT Close logic timer timed out, Terminal T 210
CFU Close logic timer timed out, Terminal U 210
CFY Close logic timer timed out, Terminal Y 210
CHSG Settings Group changed 208
CLS Close SELOGIC, Terminal S 209
CLSS Close Breaker S asserted 210
CLST Close Breaker T asserted 210
CLSU Close Breaker U asserted 210
CLSY Close Breaker Y asserted 210
CLT Close SELOGIC, Terminal T 209
CLU Close SELOGIC, Terminal U 209
CLY Close SELOGIC, Terminal Y 209
CON1 External fault detected, Element 1 64
CONA1 External fault detected A-Phase, Element 1 70
CONA2 External fault detected A-Phase, Element 2 81
CONAAC1 AC external fault detected A-Phase, Element 1 70
CONAAC2 AC external fault detected A-Phase, Element 2 81
CONAC1 AC external fault detected, Element 1 71
CONADC1 DC external fault detected A-Phase, Element 1 71

Alphabetical List
CONADC2 DC external fault detected A-Phase, Element 2 81

CONB1 External fault detected B-Phase, Element 1 70
CONB2 External fault detected B-Phase, Element 2 81
CONBAC1 AC external fault detected B-Phase, Element 1 70
CONBAC2 AC external fault detected B-Phase, Element 2 81
CONBDC1 DC external fault detected B-Phase, Element 1 71
CONBDC2 DC external fault detected B-Phase, Element 2 82
CONC1 External fault detected C-Phase, Element 1 70
CONC2 External fault detected C-Phase, Element 2 81
CONCAC1 AC external fault detected C-Phase, Element 1 71
CONCAC2 AC external fault detected C-Phase, Element 2 81
CONCDC1 DC external fault detected C-Phase, Element 1 71
CONCDC2 DC external fault detected C-Phase, Element 2 82
CONDC1 DC external fault detected, Element 1 71
CTUA1 CT unsaturated A-Phase, Element 1 72
CTUA2 CT unsaturated A-Phase, Element 2 83
CTUB1 CT unsaturated B-Phase, Element 1 72
CTUB2 CT unsaturated B-Phase, Element 2 83
CTUC1 CT unsaturated C-Phase, Element 1 72
CTUC2 CT unsaturated C-Phase, Element 2 83
DC1F DC Channel 1 failed 184
DC1G DC Channel 1 ground fault detected 184
DC1R DC Channel 1 excess ripples detected 184
DC1W DC Channel 1 warning 184
DCA1 DC component in Element 1 A-Phase 70
DCA2 DC component in Element 2 A-Phase 80
DCB1 DC component in Element 1 B-Phase 70
DCB2 DC component in Element 2 B-Phase 80
DCC1 DC component in Element 1 C-Phase 70
DCC2 DC component in Element 2 C-Phase 80
DIRBLKS Terminal S directional element block SELOGIC control equation 532
DIRBLKT Terminal T directional element block SELOGIC control equation 532
DIRBLKU Terminal U directional element block SELOGIC control equation 532
DIRBLKY Terminal Y directional element block SELOGIC control equation 532
DMP01 Demand metering Element 01 asserted 185

Alphabetical List

DOKA Mirrored Bit Channel A in normal mode 352
DOKB Mirrored Bit Channel B in normal mode 353
DRTRIG Disturbance Recording Event Triggered 346
DST Daylight-saving time 398
DSTP IRIG-B daylight-saving time pending 398
DUMMY 399
E2AC Enable Levels 1–2 access (SELOGIC control equation) 318
EACC Enable Level 1 access (SELOGIC control equation) 318
EBFITS Externally initiated breaker failure timer timed out, Terminal S 122
EBFITT Externally initiated breaker failure timer timed out, Terminal T 124
EBFITU Externally initiated breaker failure timer timed out, Terminal U 126
EBFITY Externally initiated breaker failure timer timed out, Terminal Y 128
EBSMON Breaker monitoring Terminal S enabled 176
EBTMON Breaker monitoring Terminal T enabled 177
EBUMON Breaker monitoring Terminal U enabled 178
EBYMON Breaker monitoring Terminal Y enabled 179
EDM01 Demand metering Element 01 enabled 185
EN Enable LED on relay front panel 0
ENINBFS Neutral/residual breaker failure function enabled, Terminal S 123
ENINBFT Neutral/residual breaker failure function enabled, Terminal T 125
ENINBFU Neutral/residual breaker failure function enabled, Terminal U 127
ENINBFY Neutral/residual breaker failure function enabled, Terminal Y 129
ER Event report triggered 346
EVELOCK Lock DNP events 403
EXBFS External breaker failure input initiated, Terminal S 122
EXBFT External breaker failure input initiated, Terminal T 124
EXBFU External breaker failure input initiated, Terminal U 126
EXBFY External breaker failure input initiated, Terminal Y 128

Alphabetical List
FASTS Polarizing voltage slipping faster than Breaker S synchronizing voltage 428
FASTT Polarizing voltage slipping faster than Breaker T synchronizing voltage 428
FASTU Polarizing voltage slipping faster than Breaker U synchronizing voltage 428
FASTY Polarizing voltage slipping faster than Breaker Y synchronizing voltage 428
FAULT Fault detected 346
FBFS Circuit Breaker S failure 123
FBFT Circuit Breaker T failure 125
FBFU Circuit Breaker U failure 127
FBFY Circuit Breaker Y failure 129
FLDENRG Generator field energized 45
FOBFS Breaker S breaker flashover asserted 121
FOBFT Breaker T breaker flashover asserted 121
FOBFU Breaker U breaker flashover asserted 121
FOBFY Breaker Y breaker flashover asserted 121
FOP1_01 Port 1 Fast Operate transmit Bit 1 408

Alphabetical List


Alphabetical List

FOPF_01 Port Front Fast Operate transmit Bit 1 404

Alphabetical List

FREQFZG Generator frequency estimation frozen 5
FREQFZS System frequency estimation frozen 5
FREQOKG Generator frequency estimation OK 5
FREQOKS System frequency estimation OK 5
FROKPM Synchrophasor frequency measurement OK 389
FSERP1 Fast SER enabled for Port 1 388
FSERP5 Fast SER enabled for network port 388
FSERPF Fast SER enabled for front port 388
GENVHIS Generator voltage is higher than Breaker S system voltage 434
GENVHIT Generator voltage is higher than Breaker T system voltage 434
GENVHIU Generator voltage is higher than Breaker U system voltage 434
GENVHIY Generator voltage is higher than Breaker Y system voltage 434
GENVLOS Generator voltage is lower than Breaker S system voltage 434
GENVLOT Generator voltage is lower than Breaker T system voltage 434
GENVLOU Generator voltage is lower than Breaker U system voltage 434
GENVLOY Generator voltage is lower than Breaker Y system voltage 434
GFLTA1 Internal fault detected A-Phase, Element 1 73
GFLTA2 Internal fault detected A-Phase, Element 2 84
GFLTB1 Internal fault detected B-Phase, Element 1 73
GFLTB2 Internal fault detected B-Phase, Element 2 84

Alphabetical List
GFLTC1 Internal fault detected C-Phase, Element 1 73

GFLTC2 Internal fault detected C-Phase, Element 2 84
GRPSW Pulsed alarm for group switches 317
HALARM Hardware alarm 317
HALARMA Pulse stream for unacknowledged diagnostic warnings 317
HALARML Latched alarm for diagnostic failures 317
HALARMP Pulsed alarm for diagnostic warnings 317
IASBF A-Phase current above threshold, Terminal S 123
IATBF A-Phase current above threshold, Terminal T 125
IAUBF A-Phase current above threshold, Terminal U 127
IAYBF A-Phase current above threshold, Terminal Y 129
IBSBF B-Phase current above threshold, Terminal S 123
IBTBF B-Phase current above threshold, Terminal T 125
IBUBF B-Phase current above threshold, Terminal U 127
IBYBF B-Phase current above threshold, Terminal Y 129
ICSBF C-Phase current above threshold, Terminal S 123
ICTBF C-Phase current above threshold, Terminal T 125
ICUBF C-Phase current above threshold, Terminal U 127
ICYBF C-Phase current above threshold, Terminal Y 129
IFLT1 Internal fault detected, Element 1 72
IFLTA1 Internal fault detected A-Phase, Element 1 71
IFLTA2 Internal fault detected A-Phase, Element 2 82
IFLTB1 Internal fault detected B-Phase, Element 1 71
IFLTB2 Internal fault detected B-Phase, Element 2 82
IFLTC1 Internal fault detected C-Phase, Element 1 72
IFLTC2 Internal fault detected C-Phase, Element 2 82
IN101 Input 101 asserted 212

Alphabetical List


Alphabetical List


Alphabetical List

INADAS Inadvertent energization element armed, Terminal S 53
INADAT Inadvertent energization element armed, Terminal T 53
INADAU Inadvertent energization element armed, Terminal U 53
INADAY Inadvertent energization element armed, Terminal Y 53
INADS Inadvertent energization element picked up, Terminal S 53
INADT Inadvertent energization element picked up, Terminal T 53
INADTCS Inadvertent energization delayed element torque control, Terminal S 54
INADTCT Inadvertent energization delayed element torque control, Terminal T 54
INADTCU Inadvertent energization delayed element torque control, Terminal U 54
INADTCY Inadvertent energization delayed element torque control, Terminal Y 54
INADTS Inadvertent energization delayed element picked up, Terminal S 54
INADTT Inadvertent energization delayed element picked up, Terminal T 54
INADTU Inadvertent energization delayed element picked up, Terminal U 54
INADTY Inadvertent energization delayed element picked up, Terminal Y 54
INADU Inadvertent energization Element picked up, Terminal U 53
INADY Inadvertent energization Element picked up, Terminal Y 53
INR1 Inrush in Element 1 69
INRA1 Inrush in A-Phase, Element 1 69
INRA2 Inrush in A-Phase, Element 2 80
INRB1 Inrush in B-Phase, Element 1 69
INRB2 Inrush in B-Phase, Element 2 80
INRC1 Inrush in C-Phase, Element 1 69
INRC2 Inrush in C-Phase, Element 2 80
INSBF Neutral current above threshold, Terminal S 123
INTBF Neutral/residual current exceeds pickup threshold, Terminal T 125
INUBF Neutral/residual current exceeds pickup threshold, Terminal U 127
INYBF Neutral/residual current exceeds pickup threshold, Terminal Y 129
IO300OK Communication status of Interface Board 300 when installed/commissioned 439
LB_DP01 Local Bit 01 status display enabled 199

Alphabetical List


Alphabetical List

LB_SP01 Local Bit 01 supervision enabled 195

Alphabetical List


Alphabetical List

LB01 Local Bit 01 asserted 191

Alphabetical List

LBOKA Mirrored Bit channel in loopback mode, Channel A 352
LBOKB Mirrored Bit channel in loopback mode, Channel B 353
LDAGPF Leading power factor, A-Phase, generator 424
LDASPF Leading power factor, A-Phase, Terminal S 420
LDATPF Leading power factor, A-Phase, Terminal T 421
LDAUPF Leading power factor, A-Phase, Terminal U 422
LDAYPF Leading power factor, A-Phase, Terminal Y 423
LDBGPF Leading power factor, B-Phase, generator 424
LDBSPF Leading power factor, B-Phase, Terminal S 420
LDBTPF Leading power factor, B-Phase, Terminal T 421
LDBUPF Leading power factor, B-Phase, Terminal U 422
LDBYPF Leading power factor, B-Phase, Terminal Y 423
LDCGPF Leading power factor, C-Phase, generator 424
LDCSPF Leading power factor, C-Phase, Terminal S 420
LDCTPF Leading power factor, C-Phase, Terminal T 421
LDCUPF Leading power factor, C-Phase, Terminal U 422

Alphabetical List
LDCYPF Leading power factor, C-Phase, Terminal Y 423

LDG3PF Leading three-phase power factor, generator 424
LDS3PF Leading three-phase power factor, Terminal S 420
LDT3PF Leading three-phase power factor, Terminal T 421
LDU3PF Leading three-phase power factor, Terminal U 422
LDY3PF Leading three-phase power factor, Terminal Y 423
LGAGPF Lagging power factor, A-Phase, generator 424
LGASPF Lagging power factor, A-Phase, Terminal S 420
LGATPF Lagging power factor, A-Phase, Terminal T 421
LGAUPF Lagging power factor, A-Phase, Terminal U 422
LGAYPF Lagging power factor, A-Phase, Terminal Y 423
LGBGPF Lagging power factor, B-Phase, generator 424
LGBSPF Lagging power factor, B-Phase, Terminal S 420
LGBTPF Lagging power factor, B-Phase, Terminal T 421
LGBUPF Lagging power factor, B-Phase, Terminal U 422
LGBYPF Lagging power factor, B-Phase, Terminal Y 423
LGCGPF Lagging power factor, C-Phase, generator 424
LGCSPF Lagging power factor, C-Phase, Terminal S 420
LGCTPF Lagging power factor, C-Phase, Terminal T 421
LGCUPF Lagging power factor, C-Phase, Terminal U 422
LGCYPF Lagging power factor, C-Phase, Terminal Y 423
LGG3PF Lagging three-phase power factor, generator 424
LGS3PF Lagging three-phase power factor, Terminal S 420
LGT3PF Lagging three-phase power factor, Terminal T 421
LGU3PF Lagging three-phase power factor, Terminal U 422
LGY3PF Lagging three-phase power factor, Terminal Y 423
LINK5A Link status of the Port 5A connection 400
LINK5B Link status of the Port 5B connection 400
LINK5C Link status of the Port 5C connection 400
LINK5D Link status of the Port 5D connection 400
LNKFAIL Link status of the Active Port 400
LOC Control authority at local (bay) level 548
LOCAL Local front-panel control 136
LOCSTA Control authority at station level 548
LOP3PHV Loss-of-potential three-phase element picked up, Terminal V 465
LOP3PHZ Loss-of-potential three-phase element picked up, Terminal Z 465
LOPDIV Loss-of-potential element current disturbance picked up, Terminal V 463
LOPDIZ Loss-of-potential element current disturbance picked up, Terminal Z 464
LOPDVV Loss-of-potential element incremental voltage picked up, Terminal V 463
LOPDVZ Loss-of-potential element incremental voltage picked up, Terminal Z 464
LOPIV Loss-of-potential element incremental voltage logic picked up, Terminal V 463

Alphabetical List
LOPIZ Loss-of-potential element incremental voltage logic picked up, Terminal Z 465
LOPQV Loss-of-potential element negative-sequence voltage logic picked up, Terminal V 464
LOPQZ Loss-of-potential element negative-sequence voltage logic picked up, Terminal Z 465
LOPRSV Loss-of-potential element voltage reset logic picked up, Terminal V 463
LOPRSZ Loss-of-potential element voltage reset logic picked up, Terminal Z 465
LOPRV Loss-of-potential element reset logic picked up, Terminal V 463
LOPRZ Loss-of-potential element reset logic picked up, Terminal Z 464
LOPSV Loss-of-potential element set logic picked up, Terminal V 463
LOPSZ Loss-of-potential element set logic picked up, Terminal Z 464
LOPTCV Loss-of-potential element torque control, Terminal V 463
LOPTCZ Loss-of-potential element torque control, Terminal Z 464
LOPV Loss-of-potential Terminal V 463
LOPZ Loss-of-potential Terminal Z 464
LPHDSIM IEC 61850 logical node for physical device simulation 354
LPSEC Leap second is added 398
LPSECP Leap second pending 398
MAMBOK1 Element 1, ambient temperature source healthy 447
MATHERR SELOGIC control equation Math error 316
MLTLEV Multi-level control authority 548
NDREF1 Nondirectional REF Element 1 enabled 55
OCS Breaker Open command, Terminal S 188
OCT Breaker Open command, Terminal T 188
OCU Breaker Open command, Terminal U 188
OCY Breaker Open command, Terminal Y 188
ONLINE Generator online logic 45
OPHAS A-Phase, Terminal S open 118
OPHAT A-Phase, Terminal T open 118
OPHAU A-Phase, Terminal U open 119
OPHAY A-Phase, Terminal Y open 119
OPHBS B-Phase, Terminal S open 118
OPHBT B-Phase, Terminal T open 118
OPHBU B-Phase, Terminal U open 119
OPHBY B-Phase, Terminal Y open 119
OPHCS C-Phase, Terminal S open 118
OPHCT C-Phase, Terminal T open 118
OPHCU C-Phase, Terminal U open 119
OPHCY C-Phase, Terminal Y open 119

Alphabetical List
OPHS Terminal S open 118

OPHT Terminal T open 118
OPHU Terminal U open 119
OPHY Terminal Y open 119
OUT201 Output 201 asserted 328
OUT2011 Aurora timer for OUT201 Binary 1 524
OUT201T Aurora timer for OUT201 is timing 524

Alphabetical List

P5ABSW Port 5A or 5B has just become active 442
P5ASEL Port 5A active/inactive 401
P5BSEL Port 5B active/inactive 401
P5CSEL Port 5C active/inactive 401
P5DSEL Port 5D active/inactive 401
PASSDIS Password disable jumper is installed 318
PB1 Pushbutton 01 asserted 336
PB1_LED PB01_ LED illuminated 340

Alphabetical List
PB1_PUL Pushbutton 01 pulsed for 1 processing interval 338

PB10LED PB10_ LED illuminated 314
PB10PUL Pushbutton 10 pulsed for 1 processing interval 339
PCN01Q Protection SELOGIC Counter 01 asserted 256
PCN01R Protection SELOGIC Counter 01 reset 260

Alphabetical List


Alphabetical List

PCT01Q Protection SELOGIC Conditioning Timer 01 asserted 244

Alphabetical List

PFRTEX Protection SELOGIC control equation first execution 316
PLT01 Protection SELOGIC Latch 01 asserted 240
PMDOK Assert if data acquisition system is operating correctly 321

Alphabetical List
PMTEST Synchrophasor Test Mode 389

PMTRIG Synchrophasor SELogic control equation trigger 389
PSMODE Generator in Pumped Storage Mode 4
PST01Q Protection SELOGIC Sequencing Timer 01 asserted 248
PST01R Protection SELOGIC Sequencing Timer 01 reset 252

Alphabetical List

PSV01 Protection SELOGIC Variable 01 asserted 232

Alphabetical List


Alphabetical List

PTP_BNP Bad jitter on PTP signals and the PTP signal is lost afterwards 442
PTP_OK PTP is available and has sufficient quality 441
PTP_RST Disqualify PTP high-accuracy time source 441
PTP_SET Qualify PTP high-accuracy time source 441
PTP_TIM A valid PTP time source is detected 441
PTPSYNC Synchronized to a high-quality PTP source 441
PUNRLBL Protection SELOGIC control equation unresolved label 316
RB01 Remote Bit 01 asserted 207

Alphabetical List

RBADA Outage too large for normal Mirrored Bit communication, Channel A 352
RBADB Outage too large for normal Mirrored Bit communication, Channel B 353
REF Earth fault inside REF Element 1, 2, or 3 Zones 59

Alphabetical List
REF501 Neutral instantaneous overcurrent Element 1 picked up 55

REF50T1 Neutral instantaneous overcurrent Element 1 timed out 55
REF511 REF Element 1 TOC element picked up 56
REF51R1 REF Element 1 TOC element reset 56
REF51T1 REF Element 1 TOC element timed out 55
REFF1 Earth fault inside restricted Zone 1 55
REFR1 Earth fault outside restricted Zone 1 55
REFBLK1 REF Element 1 phase fault or external ground fault detected 59
REFOCT1 REF Element 1 open CT, wiring, or setting error detected 59
RF50TC1 Neutral instantaneous overcurrent Element 1 enabled 56
RF51TC1 Inverse-time neutral overcurrent Element 1 enabled 55
RMB1A Received Mirrored Bit 1, Channel A 348
RMB1B Received Mirrored Bit 1, Channel B 350

Alphabetical List

ROKA Mirrored Bit Channel A normal status in non loopback mode 352
ROKB Mirrored Bit Channel B normal status in non loopback mode 353
RST_BAT Reset battery monitoring 345
RST_BKS Reset Breaker S monitoring 344
RST_BKT Reset Breaker T monitoring 344
RST_BKU Reset Breaker U monitoring 344
RST_BKY Reset Breaker Y monitoring 344
RST_DEM Reset demand metering 344
RST_ENE Reset energy metering 344
RST_HAL Reset HALARMA 345
RST_MM Reset min/max metering 344
RST_PDM Reset peak demand metering 344
RSTDNPE Reset DNP fault summary data 345
RSTTRGT Reset front-panel targets 345
RTC01OC RTC01 open circuited 476
RTC01OK RTC01 healthy 468
RTC01Q RTC01 quality healthy 480
RTC01SC RTC01 short circuited 472

Alphabetical List


Alphabetical List

RTCAD01 RTC Channel A remote date Bit 01 392

Alphabetical List

RTCBD01 RTC Channel B remote date Bit 01 394
RTCCFGA RTC Channel A configuration complete 390
RTCCFGB RTC Channel B configuration complete 390
RTCDLYA Max RTC delay exceeded for Channel A 390
RTCDLYB Max RTC delay exceeded for Channel B 390
RTCENA Valid remote synchrophasors received on Channel A 391
RTCENB Valid remote synchrophasors received on Channel B 391
RTCROK Valid aligned RTC data available on all enabled channels 390
RTCROKA Valid aligned RTC data available on Channel A 391
RTCROKB Valid aligned RTC data available on Channel B 391
RTCSEQA RTC Channel A data in sequence 390
RTCSEQB RTC Channel B data in sequence 390
RTS Circuit Breaker S retrip 122
RTS01OC RTD01 open circuited 452
RTS01OK RTD01 healthy 444

Alphabetical List
RTS01SC RTD01 short circuited 448


Alphabetical List

RTSCFA SEL-2600 communication failure (RTDA) 447
RTSCFB SEL-2600 communication failure (RTDB) 447
RTSFLA SEL-2600 RAM failure (RTDA) 447
RTSFLB SEL-2600 RAM failure (RTDB) 447
RTT Circuit Breaker T retrip 124
RTU Circuit Breaker U retrip 126
RTY Circuit Breaker Y retrip 128
S32F3P Terminal S forward three-phase directional picked up 621
S32GE Terminal S ground-directional calculation enabled 536
S32PE Terminal S phase-directional calculation enabled 533
S32QE Terminal S neg. seq directional calculation enabled 533
SALARM Software alarm 317

Alphabetical List
SC850BM SELOGIC control for IEC 61850 blocked mode 496

SC850LS SELOGIC control for control authority at station level 548
SC850SM SELOGIC control for IEC 61850 simulation mode 496
SC850TM SELOGIC control for IEC 61850 test mode 496
SER_BNP Bad jitter on serial port and the IRIG-B signal is lost afterwards 441
SER_OK IRIG-B signal from Serial Port 1 is available and has sufficient quality 440
SER_RST Disqualify serial IRIG-B high-accuracy time source 440
SER_SET Qualify serial IRIG-B high-accuracy time source 440
SER_TIM A valid IRIG-B time source is detected on serial port 441
SERSYNC Synchronized to a high-quality serial IRIG source 442
SETCHG Pulsed alarm for settings changes 317
SF32G Terminal S forward ground directional declared 537
SF32P Terminal S forward phase directional picked up 535
SF32Q Terminal S forward negative-sequence directional picked up 534
SFBKS Breaker S slip frequency is within acceptable slip frequency window 429
SFBKT Breaker T slip frequency is within acceptable slip frequency window 429
SFBKU Breaker U slip frequency is within acceptable slip frequency window 429
SFBKY Breaker Y slip frequency is within acceptable slip frequency window 429
SFZBKS Breaker S slip frequency is less than 5 mHz 429
SFZBKT Breaker T slip frequency is less than 5 mHz 429
SFZBKU Breaker U slip frequency is less than 5 mHz 429
SFZBKY Breaker Y slip frequency is less than 5 mHz 429
SG1 Setting Group 1 is active 208
SLOWS Polarizing voltage slipping slower than Breaker S synchronizing voltage 428
SLOWT Polarizing voltage slipping slower than Breaker T synchronizing voltage 428
SLOWU Polarizing voltage slipping slower than Breaker U synchronizing voltage 428
SLOWY Polarizing voltage slipping slower than Breaker Y synchronizing voltage 428
SPCER1 Synchrophasor configuration error on Port 1 319
SPCERF Synchrophasor configuration error on Port F 319
SPEN Signal profiling enabled 402
SR32G Terminal S reverse ground directional declared 537
SR32P Terminal S reverse phase directional picked up 535
SR32PD Terminal S reverse phase directional detected 619
SR32Q Terminal S reverse negative-sequence directional picked up 534

Alphabetical List
T32GE Terminal T ground directional calculation enabled 536

T32PE Terminal T phase-directional calculation enabled 533
T32QE Terminal T negative-sequence directional calculation enabled 533
TBNC Time is based on a valid BNC IRIG source 321
TCREF1 REF Element 1 enabled 55
TESTDB Database test bit 354
TESTDB2 Enhanced label based test bit 354
TESTFM Fast Meter test bit 354
TESTPUL Pulse test bit 354
TF32G Terminal T forward ground directional declared 537
TF32P Terminal T forward phase directional picked up 535
TF32PD Terminal T forward phase directional detected 619
TF32Q Terminal T forward negative-sequence directional picked up 534
TGLOBAL Relay calendar clock and ADC sampling synchronized to IEEE C37.118 high-accuracy IRIG-B time source 322
THLSW1 Element 1 thermal level switch 505
THRLA1 Element 1 thermal level alarm 504
THRLT1 Element 1 thermal level trip 504
TIRIG Assert while time is based on IRIG for both mark and value 321
TLED_1 Target LED 1 on relay front panel 1

Alphabetical List

TLOCAL Relay calendar clock and ADC sampling synchronized to non-IEEE C37.118 compliant high-accuracy 322
IRIG-B time source
TMB1A Transmitted Mirrored Bit 1, Channel A 349
TMB1B Transmitted Mirrored Bit 1, Channel B 351
TPLLEXT Update PLL using external signal 322
TPTP Time is based on a valid PTP source 323
TQUAL1 Time quality, binary, add 1 when asserted 398
TR01 Trip Element 01 SELOGIC control equation asserted 108

Alphabetical List
TR32G Terminal T reverse ground directional declared 537

TR32P Terminal T reverse phase directional picked up 535
TR32Q Terminal T reverse negative-sequence directional picked up 534
TREA1 Synchrophasor SELOGIC control equation trigger Reason 1 389
TRGTR Target reset 346
TRIP General trip asserted 111
TRIP01 Trip Element 01 asserted 110
TRIPAUX Trip generator auxiliary asserted 111
TRIPEX Trip generator exciter asserted 111
TRIPLED Trip LED on front of relay front panel 0
TRIPPM Trip generator prime mover asserted 111
TRIPS Trip Breaker S asserted 111
TRIPT Trip Breaker T asserted 111
TRIPU Trip Breaker U asserted 111
TRIPY Trip Breaker Y asserted 111
TSER Time is based on a valid serial IRIG source 321
TSNTPB Asserts if time was synchronized with backup NTP server before SNTP time-out period expired 322
TSNTPP Asserts if time was synchronized with primary NTP server before SNTP time-out period expired 322
TSOK Assert if current time source accuracy is sufficient for synchronized phasor measurements 321
TSSW High-priority time source switching 322
TSYNC Assert when ADC sampling is synchronized to an IRIG-B time source 321
TSYNCA Assert while the time mark from time source or fixed internal source is not synchronized 321
TUPDH Assert if update source is high-accuracy time source 321
TUTC1 IRIG-B offset hours from UTC time, binary, add 1 if asserted 397
TUTCH IRIG-B offset half-hour from UTC time, binary, add 0.5 if asserted 397
TUTCS IRIG-B offset hours sign from UTC time, subtract the UTC offset if TUTCS is asserted, add otherwise 397
U32F3P Terminal U forward three-phase directional picked up 621
U32GE Terminal U ground-directional calculation enabled 536

Alphabetical List
U32PE Terminal U phase-directional calculation enabled 533

U32QE Terminal U negative-sequence directional calculation enabled 533
UF32G Terminal U forward ground directional declared 537
UF32P Terminal U forward phase directional picked up 535
UF32Q Terminal U forward negative-sequence directional picked up 534
ULCLS Unlatch close SELOGIC element asserted, Terminal S 209
ULCLT Unlatch close SELOGIC element asserted, Terminal T 209
ULCLU Unlatch close SELOGIC element asserted, Terminal U 209
ULCLY Unlatch close SELOGIC element asserted, Terminal Y 209
ULTR01 Unlatch trip Element 01 SELOGIC control equation asserted 109
UPD_BLK Block updating internal clock period and master time 440
UPD_EN Enable updating internal clock with selected external time source 322
UR32G Terminal U reverse ground directional declared 537
UR32P Terminal U reverse phase directional picked up 535
UR32Q Terminal U reverse negative-sequence directional picked up 534
VB001 Virtual Bit 001 387

Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List


Alphabetical List

VTHROKG Generator voltage magnitude OK for frequency tracking 5
VTHROKS System voltage magnitude OK for frequency tracking 5
WFLTA1 Windowed internal fault detected A-Phase, Element 1 72
WFLTA2 Windowed internal fault detected A-Phase, Element 2 82
WFLTB1 Windowed internal fault detected B-Phase, Element 1 72
WFLTB2 Windowed internal fault detected B-Phase, Element 2 83
WFLTC1 Windowed internal fault detected C-Phase, Element 1 72
WFLTC2 Windowed internal fault detected C-Phase, Element 2 83
Y32GE Terminal Y ground directional calculation enabled 536

Row List
Y32PE Terminal Y phase-directional calculation enabled 533

Y32QE Terminal Y negative-sequence directional calculation enabled 533
YEAR1 IRIG-B year information, (add 1 year if bit asserted) 396
YEAR10 IRIG-B year information, (add 10 years if bit asserted) 396
YF32G Terminal Y forward ground directional declared 537
YF32P Terminal Y forward phase directional picked up 535
YF32Q Terminal Y forward negative-sequence directional picked up 534
YR32G Terminal Y reverse ground directional declared 537
YR32P Terminal Y reverse phase directional picked up 535
YR32Q Terminal Y reverse negative-sequence directional picked up 534
ZERO_CG Generator zero crossing 5
ZERO_CS System zero crossing 5
ZLIN Load encroachment load-in element 61
ZLOAD Load-in or load-out element picked up (ZLOUT + ZLIN) 61
ZLOUT Load encroachment load-out element 61
Row List
Table 11.2 Row List of Relay Word Bits (Sheet 1 of 30)
Enable and Tripping Bits

EN Enable LED on relay front panel 0
TRIPLED Trip LED on front of relay front panel 0
* Reserved 0
TLED_xx Target LED (01–24) on relay front panel 1–3
Pumped Storage
* Reserved 4
PSMODE Generator in pumped storage mode 4
Frequency Estimation
ZERO_CS System zero crossing 5
ZERO_CG Generator zero crossing 5
VTHROKS System voltage magnitude OK for frequency tracking 5
VTHROKG Generator voltage magnitude OK for frequency tracking 5
FREQFZS System frequency estimation frozen 5

Row List
FREQFZG Generator frequency estimation frozen 5

FREQOKS System frequency estimation OK 5
FREQOKG Generator frequency estimation OK 5
Definite and Directional Overcurrent Elements
50vPxa, b Phase definite-time Element x, Terminal v asserted 6, 7, 10, 11, 15, 16,
19, 20
67vPxTCa, b Phase-directional/torque-control enable definite-time Element x, Terminal v 6, 7, 10, 11, 15, 16,
19, 20
67vPxa, b Phase-directional/torque-controlled Element x, Terminal v picked up 6, 7, 10, 11, 15, 16,
19, 20
67vPxTa, b Phase-directional/torque-controlled Element x, Terminal v timed out 6, 7, 10, 11, 15, 16,
19, 20
50vQxa, b Negative-sequence definite-time Element x, Terminal v asserted 7, 8, 12, 13, 16, 17,
21, 22
67vQxTCa, b Negative-sequence directional/torque-control enable definite-time Element x, Terminal v 7, 8, 12, 13, 16, 17,
21, 22
67vQxa, b Negative-sequence directional/torque-controlled Element x, Terminal v picked up 7, 8, 12, 13, 16, 17,
21, 22
67vQxTa, b Negative-sequence directional/torque-controlled Element x, Terminal v timed out 7, 8, 12, 13, 16, 17,
21, 22
50vGxa, b Residual definite-time Element x, Terminal v asserted 9, 10, 13, 14, 18, 19,
22, 23
67vGxTCa, b Residual-directional/torque control enable definite-time Element x, Terminal v 9, 10, 13, 14, 18, 19,
22, 23
67vGxa, b Residual-directional/torque-controlled Element x, Terminal v picked up 9, 10, 13, 14, 18, 19,
22, 23
67vGxTa, b Residual-directional/torque-controlled Element x, Terminal v timed out 9, 10, 13, 14, 18, 19,
22, 23
Inverse-Time Overcurrent Elements
51MMxx Inverse-time Element (01–12) pickup setting outside of specified limits 24–32
51Rxx Inverse-time Element (01–12) reset 24–32
51Sxx Inverse-time Element (01–12) picked up 24–32
51Txx Inverse-time Element (01–12) timed out 24–32
51TCxx Inverse-time Element (01–12) enabled 24–32
51TMxx Inverse-time Element (01–12) time-dial setting outside of specified limits 24–32
Under- and Overvoltage Elements
27nP1c Undervoltage Element n, Level 1 asserted 33–36
c
27nP1T Undervoltage Element n, Level 1 timed out 33–36
c
27nP2 Undervoltage Element n, Level 2 asserted 33–36
c
27nP2T Undervoltage Element n, Level 2 timed out 33–36
27TCnc Undervoltage Element n, torque control 33–36
* Reserved 36
c
59nP1 Overvoltage Element n, Level 1 asserted 37–40
c
59nP1T Overvoltage Element n, Level 1 timed out 37–40
c
59nP2 Overvoltage Element n, Level 2 asserted 37–40

Row List

c
59nP2T Overvoltage Element n, Level 2 timed out 37–40
c
59TCn Overvoltage Element n, torque control 37–40
* Reserved 40
Frequency Elements
81Dnc Definite-time frequency element picked up, Level n 41–44
c
81DnOVR Definite-time overfrequency Level n 41–44
81DnTc Definite-time under- and overfrequency element delay for Level n 41–44
c
81DnUDR Definite-time underfrequency Level n 41–44
c
81DnTC Definite-time frequency Element n, torque control 41–44
27B81G Undervoltage supervision for generator frequency elements 44
27B81S Undervoltage supervision for system frequency elements 44
* Reserved 45
FLDENRG Generator field energized 45
ONLINE Generator online logic 45
Reserved
* Reserved 46–47
Rate-of-Change-of-Frequency Elements
81RnOVRc Definite-time over rate-of-change-of-frequency Level n 48, 49, 50, 51
81RnT Definite-time over/under rate-of-change-of-frequency element delay for Level n 48, 49, 50, 51
81RnUDR Definite-time under rate-of-change-of-frequency Level n 48, 49, 50, 51
81Rn Definite-time rate-of-change-of-frequency element picked up, Level n 48, 49, 50, 51
81RnTC Definite-time rate-of-change-of-frequency Element n, torque control 48, 49, 50, 51
27B81RG Undervoltage supervision for generator rate-of-change-of-frequency elements 51
27B81RS Undervoltage supervision for system rate-of-change-of-frequency elements 51
Reserved
* Reserved 52
Inadvertent Energization Elements
INADAva Inadvertent energization element armed, Terminal v 53
a
INADv Inadvertent energization element picked up, Terminal v 54
a
INADTv Inadvertent energization delayed element picked up, Terminal v 55
a
INADTCv Inadvertent energization delayed element torque control, Terminal v 55
Restricted Earth Fault Elements
TCREFxb REF element x enabled 55, 56, 57
b
NDREFx Nondirectional REF Element x enabled 55, 56, 57
b
REFFx Earth fault inside restricted Zone x 55, 56, 58
b
REFRx Earth fault outside restricted Zone x 55, 56, 58
b
REF50x Neutral (operating current) instantaneous overcurrent Element x picked up 55, 56, 58
b
REF50Tx Neutral instantaneous overcurrent Element x timed out 55, 57, 58
b
RF51TCx Inverse-time neutral overcurrent Element x enabled 55, 57, 58
REF51Txb REF Element x TOC element timed out 55, 57, 58

Row List

b
REF51Rx REF Element x TOC element reset 56, 57, 58
b
REF51x REF Element x TOC element picked up 56, 57, 58
b
RF50TCx Neutral instantaneous overcurrent Element x enabled 56, 57, 59
REF Earth fault inside REF Element 1, 2, or 3 zones 59
Pole Open Logic
3POS Terminal S three-pole open asserted 60
3POT Terminal T three-pole open asserted 60
3POU Terminal U three-pole open asserted 60
3POY Terminal Y three-pole open asserted 60
3PORS Terminal S three-pole open asserted raw 60
3PORT Terminal T three-pole open asserted raw 60
3PORU Terminal U three-pole open asserted raw 60
3PORY Terminal Y three-pole open asserted raw 60
Load Encroachment Element
ZLOAD Load-in or load-out element picked up (ZLOUT + ZLIN) 61
ZLIN Load encroachment load-in element 61
ZLOUT Load encroachment load-out element 61
* Reserved 61
Impedance-Based Loss-of-Field Element
40ZSUP Loss-of-field supervision picked up 62
* Reserved 62
Reserved
* Reserved 63
Phase Differential Elements
87R1 Restrained Differential Element 1 picked up 64
87U1 Unrestrained Differential Element 1 picked up 64
87RMS1 RMS Differential Element 1 picked up 64
87RTC1 Restrained Differential Element 1 Torque Control 64

Row List
87UTC1 Unrestrained Differential Element 1 Torque Control 64

87RMTC1 RMS Differential Element 1 Torque Control 64
d
87mR1 Phase m Restrained Differential Element 1 picked up 65
87UF1 Filtered Unrestrained Differential Element 1 picked up 65
d
87mUF1 Phase m Filtered Unrestrained Differential Element 1 picked up 65
87UR1 Raw Unrestrained Differential Element 1 picked up 65
87mUR1d Phase m Raw Unrestrained Differential Element 1 picked up 66
87mRMS1d Phase m rms Differential Element 1 picked up 66
d
87mRHB1 Phase m Restrained Differential Element 1 picked up through harmonic blocking 66–67
d
87mRHR1 Phase m Restrained Differential Element 1 picked up through harmonic restraint 67
d
87mHB1 Phase m Element 1 harmonic blocking picked up 67
d
87mHR1 Phase m Element 1 harmonic restraint picked up 67–68
d
87mB241 Phase m Element 1 2nd or 4th harmonic blocking picked up 68
87mB51d Phase m Element 1 5th harmonic blocking picked up 68–69
87mSEC1d Differential Element 1 A-Phase, switch to secure 69
d
INRm1 Inrush in Phase m, Element 1 69
d
DCm1 DC component in Element 1 Phase m 70
d
CONm1 External fault detected Phase m, Element 1 70
d
CONmAC1 AC external fault detected Phase m, Element 1 70–71
CONmDC1d DC external fault detected Phase m, Element 1 71
d
IFLTm1 Internal fault detected Phase m, Element 1 71–72
d
WFLTm1 Windowed internal fault detected Phase m, Element 1 72
d
CTUm1 CT unsaturated Phase m, Element 1 72
d
87mAP51 5th harmonic alarm picked up, Phase m, Element 1 73
87AP51 5th harmonic alarm picked up, Element 1 73
87AD51 5th harmonic delayed alarm picked up, Element 1 73
GFLTm1d Internal fault detected phase m, Element 1 73
d
87mB21 Phase m Element 1 2nd harmonic blocking picked up 74
87RTC2 Restrained differential Element 2 Torque Control 75

Row List

87RMTC2 RMS differential Element 2 Torque Control 75
CON2 External fault detected, element 2 75
d
87mR2 Phase m restrained differential Element 2 picked up 75
d
87mUF2 Phase m filtered unrestrained differential Element 2 picked up 76
87mUR2d Phase m raw unrestrained differential Element 2 picked up 76
d
87mRMS2 Phase m rms differential Element 2 picked up 77
d
87mRHB2 Phase m restrained differential Element 2 picked up through harmonic blocking 77
d
87mRHR2 Phase m restrained differential Element 2 picked up through harmonic restraint 77–78
d
87mHB2 Phase m Element 2 harmonic blocking picked up 78
d
87mHR2 Phase m Element 2 harmonic restraint picked up 78
d
87mB242 Phase m Element 2 2nd or 4th harmonic blocking picked up 79
87mB52d Phase m Element 2 5th harmonic blocking picked up 79
87mSEC2d Differential Element 2 Phase m, switch to secure 79–80
d
INRm2 Inrush in Phase m, Element 2 80
d
DCm2 DC Component in Element 2 Phase m 80
d
CONm2 External fault detected Phase m, Element 2 81
d
CONmAC2 AC External fault detected Phase m, Element 2 81
CONAC2 AC External fault detected, Element 2 81
CONmDC2d DC external fault detected A-Phase, Element 2 81–82
d
IFLTm2 Internal fault detected Phase m, Element 2 82
d
WFLTm2 Windowed internal fault detected Phase m, Element 2 82
d
CTUm2 CT unsaturated Phase m, Element 2 83
87mAP52 5th harmonic alarm picked up, Phase m, Element 2 83
87AP52 5th harmonic alarm picked up, Element 2 84
87AD52 5th harmonic delayed alarm picked up, Element 2 84
GFLTm2d Internal fault detected Phase m, Element 2 84
d
87mB22 Phase m Element 2 2nd harmonic blocking picked up 84
d
87TMm1 Fundamental operate current picked up for single core, Phase m, Element 1 85
87TSm1d Small and flat periods identified in the operate current for single core, Phase m, Element 1 85–86
87WBm1d 87 Waveshape Inrush blocking logic asserted, Phase m, Element 1 86

Row List
87WB1 87 Waveshape Inrush blocking logic asserted, Element 1 86

d
87TBLm1 LOW bipolar unsupervised signature identified, Phase m, Element 1 86–87
d
87TBHm1 HIGH bipolar unsupervised signature identified, Phase m, Element 1 87
d
87UBLm1 Bipolar unblocking identified, phase m, Element 1 87
d
87BLCm1 LOW bipolar, level low supervision, Phase m, Element 1 88
d
87BHCm1 HIGH bipolar, level low supervision, Phase m, Element 1 88
87BPLm1d LOW bipolar signature identified, Phase m, Element 1 88–89
d
87BPHm1 HIGH bipolar signature identified, Phase m, Element 1 89
d
87TMm2 Fundamental operate current picked up for single core, Phase m, Element 2 89–90
d
87TSm2 Small and flat periods identified in the operate current for single core, Phase m, Element 2 90
87WBm2d 87 waveshape inrush blocking logic asserted, Phase m, Element 2 90–91
d
87TBLm2 LOW bipolar unsupervised signature identified, Phase m, Element 2 91
d
87TBHm2 HIGH bipolar unsupervised signature identified, Phase m, Element 2 91
d
87UBLm2 Bipolar unblocking identified, Phase m, Element 2 92
d
87BLCm2 LOW bipolar, level low supervision, Phase m, Element 2 92
d
87BHCm2 HIGH bipolar, level low supervision, Phase m, Element 2 92–93
87BPLm2d LOW bipolar signature identified, Phase m, Element 2 93
d
87BPHm2 HIGH bipolar signature identified, Phase m, Element 2 93–94
Volts Per Hertz
24Dk1e Volts-per-hertz Element k Level 1 asserted 95
e
24DkT1 Volts-per-hertz Element k Level 1 timed out 95
24DkT2e Volts-per-hertz Element k Level 2 timed out 95
e
24DkR2 Volts-per-hertz Element k Level 2 reset 95
e
24TCk Volts-per-hertz predefined Element k, torque control 95
e
24DkT21 Definite-time Element k Level 1 timed out 95
e
24DkR21 Definite-time Element k Level 1 reset 95
e
24DkT22 Definite-time Element k Level 2 timed out 95
e
24DkR22 Definite-time Element k Level 2 reset 95
e
24UkR User-defined volts-per-hertz Curve k reset 99
24UkTe User-defined volts-per-hertz Curve k timed out 99
24UkTCe User-defined volts-per-hertz Curve k, torque control 99

Row List
Reserved
* Reserved 99
Negative-Sequence Differential Elements
Reserved
* Reserved 100–103
32BIA01 Directional power Element 1 Bias 105
Reserved
Breaker Trip Logic Elements
TRpf Terminal Element p SELOGIC control equation asserted 108
f
ULTRp Unlatch trip Element p SELOGIC control equation asserted 109
TRIPpf Trip Element p asserted 110
TRIPva Trip Breaker v asserted 111
TRIPAUX Trip generator auxiliary asserted 111
TRIP Generator trip asserted 111
TRIPEX Trip generator excited asserted 111
TRIPPM Trip generator prime mover asserted 111

Row List
51 Voltage-Restrained Inverse-Time Overcurrent Element

51Vmd Phase m, voltage-restrained instantaneous OC picked up 112
51V Voltage-restrained instantaneous OC picked up 112
d
51VmT Phase m, voltage-restrained OC timed out 112
51VT Voltage-restrained OC timed out 112
d
51VmR Phase m, voltage-restrained OC reset 113
51VR Voltage-restrained OC reset 113
51VTC Voltage-restrained OC torque control asserted 113
Reserved
* Reserved 113
51 Voltage-Controlled Inverse Time-Overcurrent Element
51Cmd Phase m, voltage-controlled instantaneous OC picked up 114
51C Voltage-controlled instantaneous OC picked up 114
d
51CmT Phase m, voltage-controlled OC timed out 114
51CT Voltage-controlled OC timed out 114
d
51CmR Phase m, voltage-controlled OC reset 115
51CR Voltage-controlled OC reset 115
51CTC Voltage-controlled OC torque control asserted 115
Reserved
Open-Phase Detector
OPHmSd m-Phase, Terminal S open 118
OPHS Terminal S open 118
d
OPHmT m-Phase, Terminal T open 118
OPHT Terminal T open 118
d
OPHmU m-Phase, Terminal U open 119
OPHU Terminal U open 119
OPHmYd m-Phase, Terminal Y open 119
OPHY Terminal Y open 119
Reserved
* Reserved 120
Breaker Flashover
FOBFva Breaker v breaker flashover asserted 121
a
BLKFOv Breaker v flashover logic blocked 121
Breaker Failure
50Fva Phase or neutral current above pickup, Terminal v 122, 124, 126, 128
a
BFITv Breaker failure timer timed out, Terminal v 122, 124, 126, 128
a
RTv Retrip timer timed out/retrip command issued, Terminal v 122, 124, 126, 128
a
EBFITv Externally initiated breaker failure timer timed out, Terminal v 122, 124, 126, 128
BFIva Breaker failure initiated, Terminal v 122, 124, 126, 128
a
EXBFv External breaker failure input initiated, Terminal v 122, 124, 126, 128

Row List

a
ATBFIv Alternate breaker failure initiated, Terminal v 122, 124, 126, 128
a
ATBFTv Alternate breaker failure timer timed out, Terminal v 122, 124, 126, 128
a
BFISPTv Breaker failure seal-in timer timed out, Terminal v 123, 125, 127, 129
ABFITva Alternate breaker failure, Terminal v 123, 125, 127, 129
a
ENINBFv Neutral/residual breaker failure function enabled, Terminal v 123, 125, 127, 129
a
IAvBF A-Phase current above threshold, Terminal v 123, 125, 127, 129
a
IBvBF B-Phase current above threshold, Terminal v 123, 125, 127, 129
ICvBFa C-Phase current above threshold, Terminal v 123, 125, 127, 129
a
INvBF Neutral current above threshold, Terminal v 123, 125, 127, 129
a
FBFv Breaker failure asserted/initiated, Terminal v 123, 125, 127, 129
Reserved
52 Status
52CLva Breaker closed, Terminal v 132
a
52ALv Breaker alarm, Terminal v 132
a
52A_v Breaker v normally open status 133
a
52B_v Breaker v normally closed status 133
89 Disconnect Switch Status
89AMxxg Disconnect xx N/O auxiliary contact 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89BMxxg Disconnect xx N/C auxiliary contact 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89CLxxg Disconnect xx closed 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89OPNxxg Disconnect xx open 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89OIPxxg Disconnect xx operation in progress 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89ALxxg Disconnect xx alarm 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89CTLxxg Disconnect xx control status 134, 135, 136, 137,
138, 139, 140, 141,
142, 143
89AL Any disconnect alarm 134
89OIP Any disconnect operation in progress 135
LOCAL Local front panel control 136
* Reserved 137, 138, 139,
140,141, 142

Row List

g
89CLBxx Disconnect xx bus zone protection 146–147
Bay Control Disconnect Control
89OCxxg ASCII open Disconnect xx command 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89CCxxg ASCII close Disconnect xx command 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89OCMxxg Mimic Disconnect xx open control 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89CCMxxg Mimic Disconnect xx close control 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89OPExxg Disconnect open xx output 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89CLSxxg Disconnect close xx output 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89OCNxxg Open Disconnect xx 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
89CCNxxg Close Disconnect xx 149, 150, 151, 152,
153, 154, 155, 156,
157, 158
Reserved
* Reserved 159
Bay Control Disconnect Timers and Breaker Status
89CBLxxg Disconnect xx close block 160, 162, 163, 165,
166, 168, 169, 171,
172, 174
89OSIxxg Disconnect xx open seal-in timer timed out 160, 162, 163, 165,
166, 168, 169, 171,
172, 174
89CSIxxg Disconnect xx close seal-in timer timed out 160, 162, 163, 165,
166, 168, 169, 171,
172, 174
89OIRxxg Disconnect xx open immobility timer reset 160, 162, 163, 165,
166, 168, 169, 171,
172, 174
89CIRxxg Disconnect xx close immobility timer reset 160, 162, 164, 165,
167, 168, 170, 171,
173, 174
89OBLxxg Disconnect xx open block 160, 162, 164, 165,
167, 168, 170, 171,
173, 174
89ORSxxg Disconnect xx open reset 160, 162, 164, 165,
167, 168, 170, 171,
173, 174

Row List

g
89CRSxx Disconnect xx close reset 160, 162, 164, 165,
167, 168, 170, 171,
173, 174
89OIMxxg Disconnect xx open immobility timer timed out 161, 163, 164, 166,
167, 169, 170, 172,
173, 175
89CIMxxg Disconnect xx close immobility timer timed out 161, 163, 164, 166,
167, 169, 170, 172,
173, 175
* Reserved 175
Breaker Monitor
EBvMONa Breaker monitoring Terminal v enabled 176, 177, 178, 179
BvBCWALa Breaker contact wear alarm, Breaker v 176, 177, 178, 179
a
BvESOAL Slow electrical operate alarm, Breaker v 176, 177, 178, 179
a
BvBITAL Inactivity time alarm, Breaker v 176, 177, 178, 179
a
BvKAIAL Interrupted rms current alarm, Breaker v 176, 177, 178, 179
a
BvMSOAL Mechanical slow operation alarm, Breaker v 176, 177, 178, 179
a
BvMRTAL Motor run time alarm, Breaker v 176, 177, 178, 179
* Reserved 176, 177, 178, 179
Reserved
Battery Monitor
DC1F DC Channel 1 failed 184
DC1W DC Channel 1 warning 184
DC1G DC Channel 1 ground fault detected 184
DC1R DC Channel 1 excess ripples detected 184
Demand Metering
EDMxxg Demand metering Element xx enabled 185–187
g
DMPxx Demand metering Element xx enabled 185–187
* Reserved 187
52 Open and Close & 89 Open and Close
CCva Breaker close command, Terminal v 188
OCva Breaker open command, Terminal v 188
Reserved
Local Bits
LByyh Local Bit yy asserted 191–194
Local Control
LB_SPyyh Local Bit yy supervision enabled 195–198
h
LB_DPyy Local Bit yy status display enabled 199–202
Reserved
* Reserved 203

Row List
Remote Bits
RByyh Remote Bit yy asserted 204–207
Setting Group Bits
SGnc Setting Group n is active 208
CHSG Settings group changed 208
Breaker Close Logic Elements
CLva Close SELOGIC, Terminal v 209
a
ULCLv Unlatch close SELOGIC element asserted, Terminal v 209
a
CLSv Close Breaker v asserted 210
a
CFv Close logic timer timed out, Terminal v 210
Reserved
* Reserved 211
Inputs
IN201–IN208 Input 201–208 asserted 216
* Reserved 219
* Reserved 223
* Reserved 227
* Reserved 231
Protection SELOGIC (Variables)
PSV01–PSV64 Protection SELOGIC Variable 01–64 asserted 232–239
Protection SELOGIC (Latches)
PLT01–PLT32 Protection SELOGIC Latch 01–32 asserted 240–243
Protection SELOGIC (Conditioning Timers)
PCT01Q– Protection SELOGIC Conditioning Timer 01–32 asserted 244–247
PCT32Q
Protection SELOGIC (Sequencing Timers)
PST01Q– Protection SELOGIC Sequencing Timer 01–32 asserted 248–251
PST32Q
PST01R– Protection SELOGIC Sequencing Timer 01–32 reset 252–255
PST32R

Row List
Protection SELOGIC (Counters)

PCN01Q– Protection SELOGIC Counter 01–32 asserted 256–259
PCN32Q
PCN01R– Protection SELOGIC Counter 01–32 reset 260–263
PCN32R
Automation SELOGIC (Variables)
ASV001– Automation SELOGIC Variable 001–256 asserted 264–295
ASV256
Automation SELOGIC (Latches)
ALT01–ALT32 Automation SELOGIC Latch 01–32 asserted 296–299
Automation SELOGIC (Sequencing Timers)
AST01Q– Automation SELOGIC Sequencing Timer 01–32 asserted 300–303
AST32Q
AST01R– Automation SELOGIC Sequencing Timer 01–32 reset 304–307
AST32R
Automation SELOGIC (Counters)
ACN01Q– Automation SELOGIC Counter 01–32 asserted 308–311
ACN32Q
ACN01R– Automation SELOGIC Counter 01–32 reset 312–315
ACN32R
SELOGIC Error and Status Reporting
PUNRLBL Protection SELOGIC control equation unresolved label 316
PFRTEX Protection SELOGIC control equation first execution 316
MATHERR SELOGIC control equation math error 316
AUNRLBL Automation SELOGIC control equation unresolved label 316
AFRTEXP Automation SELOGIC control equation first execution after protection settings change 316
AFRTEXA Automation SELOGIC control equation first execution after automation settings change 316
* Reserved 316
Alarms
SALARM Software alarm 317
HALARM Hardware alarm 317
BADPASS Invalid password attempt alarm 317
HALARML Latched alarm for diagnostic failures 317
HALARMP Pulsed alarm for diagnostic warnings 317
HALARMA Pulse stream for unacknowledged diagnostic warnings 317
SETCHG Pulsed alarm for settings changes 317
GRPSW Pulsed alarm for group switches 317
ACCESS A user is logged in at Access Level B or above 318
ACCESSP Pulsed alarm for logins to Access Level B or above 318
EACC Enable Level 1 access (SELOGIC control equation) 318
2AC Enable Levels 1–2 access (SELOGIC control equation) 318
PASSDIS Password disable jumper is installed 318
BRKENAB Breaker control enable jumper is installed 318

Row List
Synchrophasor Configuration Error

SPCERF Synchrophasor configuration error on Port F 319
Time and Date Management
TIRIG Assert while time is based on IRIG for both mark and value 321
TUPDH Assert if update source is high-accuracy time source 321
TSYNCA Assert while the time mark from time source or fixed internal source is not synchronized 321
TSOK Assert if current time source accuracy is sufficient for synchronized phasor measurements 321
PMDOK Assert if data acquisition system is operating correctly 321
TSYNC Assert when ADC sampling is synchronized to an IRIG-B time source 321
TBNC Time is based on a valid BNC IRIG source 321
TSER Time is based on a valid serial IRIG source 321
BLKLPTS Block low-priority source from updating relay time 322
UPD_EN Enable updating internal clock with selected external time source 322
TLOCAL Relay calendar clock and ADC sampling synchronized to none C37.118 compliant high-accu- 322
racy IRIG-B time source
TPLLEXT Update PLL using external signal 322
TSSW High-priority time source switching 322
TGLOBAL Relay calendar clock and ADC sampling synchronized to C37.118 high-accuracy IRIG-B time 322
source
TSNTPP Asserts if time was synchronized with primary NTP server before SNTP time-out period 322
expired
TSNTPB Asserts if time was synchronized with backup NTP server before SNTP time-out period 322
expired
TPTP Time is based on a valid PTP source 323
Outputs
OUT201– Output 201–208 asserted 328
OUT208
OUT216
OUT308
OUT316
OUT408
OUT416
OUT508
OUT516

Row List
Pushbuttons
PB1–PB8 Pushbutton 01–08 asserted 336
PB9–PB12 Pushbutton 09–12 asserted 337
* Reserved 337
PB1_PUL– Pushbutton 01–08 pulsed for 1 processing interval 338
PB8_PUL
PB9_PUL– Pushbutton 09–12 pulsed for 1 processing interval 339
PB12_PUL
* Reserved 339
Pushbutton LED Bits
PB1_LED– PB01_ LED–PB08_LED illuminated 340
PB8_LED
PB9_LED– PB09_ LED–PB12_LED illuminated 341
PB12_LED
* Reserved 341
Data Reset Bits
RST_DEM Reset demand metering 344
RST_PDM Reset peak demand metering 344
RST_ENE Reset energy metering 344
RST_BKS Reset Breaker S monitoring 344
RST_BKT Reset Breaker T monitoring 344
RST_BKU Reset Breaker U monitoring 344
RST_BKY Reset Breaker Y monitoring 344
RST_MM Reset min/max metering 344
RST_BAT Reset battery monitoring 345
RSTTRGT Reset front-panel targets 345
RSTDNPE Reset DNP fault summary data 345
RST_HAL Reset HALARMA 345
* Reserved 345
Target Logic Bits
TRGTR Target reset 346
* Reserved 346
DRTRIG Disturbance recording event triggered 346
ER Event report triggered 346
FAULT Fault detected 346
* Reserved 347
MIRRORED BITS
RMB1A– Received Mirrored Bit 1–8, Channel A 348
RMB8A
TMB1A– Transmitted Mirrored Bit 1–8, Channel A 349
TMB8A

Row List
RMB1B– Received Mirrored Bit 1–8, Channel B 350

RMB8B
TMB1B– Transmitted Mirrored Bit 1–8, Channel B 351
TMB8B
ROKA MIRRORED BITS Channel A normal status in nonloopback mode 352
RBADA Outage to large for normal MIRRORED BITS communications, Channel A 352
CBADA Unavailability threshold exceeded for normal MIRRORED BITS communications, Channel A 352
LBOKA MIRRORED BITS channel in loopback mode, Channel A 352
ANOKA Analog transfer on MIRRORED BITS Channel A 352
DOKA MIRRORED BITS Channel A in normal mode 352
* Reserved 352
ROKB MIRRORED BITS Channel B normal status in non loopback mode 353
RBADB Outage to large for normal MIRRORED BITS communications, Channel B 353
CBADB Unavailability threshold exceeded for normal MIRRORED BITS communications, Channel B 353
LBOKB MIRRORED BITS channel in loopback mode, Channel B 353
ANOKB Analog transfer on MIRRORED BITS Channel B 353
DOKB MIRRORED BITS Channel B in normal mode 353
* Reserved 353
Test Bits
TESTDB2 Enhanced label based test bit 354
TESTDB Database test bit 354
TESTFM Fast Meter test bit 354
TESTPUL Pulse test bit 354
LPHDSIM IEC 61850 Logical Node for physical device simulation 354
* Reserved 354
* Reserved 355
Virtual Bits
VB249–VB256 Virtual Bit 249–256 356

Row List

Fast SER Enable Bits
FSERPF Fast SER enabled for front port 388
FSERP5 Fast SER enabled for network port 388
* Reserved 388
Synchrophasor SELOGIC Control Equations
PMTRIG Synchrophasor SELOGIC control equation trigger 389
TREA4 Synchrophasor SELOGIC control equation trigger reason 4 389
FROKPM Synchrophasor frequency measurement OK 389
PMTEST Synchrophasor test mode 389
* Reserved 389
RTC Synchrophasor Status
RTCSEQB RTC Channel B data in sequence 390
RTCSEQA RTC Channel A data in sequence 390
RTCCFGB RTC Channel B configuration complete 390
RTCCFGA RTC Channel A configuration complete 390
* Reserved 390
RTCDLYB Max RTC delay exceeded for Channel B 390
RTCDLYA Max RTC delay exceeded for Channel A 390

Row List
RTCROK Valid aligned RTC data available on all enabled channels 390
RTCROKB Valid aligned RTC data available on Channel B 391
RTCROKA Valid aligned RTC data available on Channel A 391
RTCENB Valid remote synchrophasors received on Channel B 391
RTCENA Valid remote synchrophasors received on Channel A 391
* Reserved 391
RTCAD01– RTC channel A remote date bit 01–08 392
RTCAD08
RTCAD09– RTC channel A remote date bit 09–16 393
RTCAD16
RTCBD01– RTC channel B remote date bit 01–08 394
RTCBD08
RTCBD09– RTC channel B remote date bit 09–16 395
RTCBD16
IRIG-B Control Bits
YEAR1 IRIG-B year information, (add 1 year if bit asserted) 396
* Reserved 397
TUTCH IRIG-B offset half-hour from UTC time, binary, add 0.5 if asserted 397
TUTCS IRIG-B offset hours sign from UTC time, subtract the UTC offset if TUTCS is asserted, add 397
otherwise
DST Daylight-saving time 398
DSTP IRIG-B daylight-saving time pending 398
LPSEC Leap second is added 398
LPSECP Leap second pending 398
DUMMY 399
* Reserved 399

Row List
Ethernet Switch
LINK5A Link status of the Port 5A connection 400
LINK5B Link status of the Port 5B connection 400
LINK5C Link status of the Port 5C connection 400
LINK5D Link status of the Port 5D connection 400
LNKFAIL Link status of the active port 400
* Reserved 400
P5ASEL Port 5A active/inactive 401
P5BSEL Port 5B active/inactive 401
P5CSEL Port 5C active/inactive 401
P5DSEL Port 5D active/inactive 401
* Reserved 401
Signal Profiling
SPEN Signal profiling enabled 402
* Reserved 402
DNP Event Lock
EVELOCK Lock DNP events 403
* Reserved 403
Fast Operate
FOPF_01– Port Front Fast Operate transmit Bit 1–8 404
FOPF_08
FOPF_16
FOPF_24
FOPF_32
FOP1_01– Port 1 Fast Operate transmit Bit 1–8 408
FOP1_08
FOP1_16
FOP1_24
FOP1_32
FOP2_08
FOP2_16
FOP2_24
FOP2_32
FOP3_08

Row List

FOP3_16
FOP3_24
FOP3_32
Instantaneous Metering (Power Factor Sign)
LDmvPFa, d Leading power factor, Phase m, Terminal v 420, 421, 422, 423
a
LDv3PF Leading three-phase power factor, Terminal v 420, 421, 422, 423
a, d
LGmvPF Lagging power factor, Phase m, Terminal v 420, 421, 422, 423
a
LGv3PF Lagging three-phase power factor, Terminal v 420, 421, 422, 423
d
LDmGPF Leading power factor, Phase m, Generator 424
LDG3PF Leading three-phase power factor, Generator 424
LGmGPFd Lagging power factor, Phase m, Generator 424
LGG3PF Lagging three-phase power factor, Generator 424
Reserved
Sync Check
FASTva Polarizing voltage slipping faster than Breaker v synchronizing voltage 428
SLOWva Polarizing voltage slipping slower than Breaker v synchronizing voltage 428
SFZBKva Breaker v slip frequency is less than 5 mHz 429
a
SFBKv Breaker v slip frequency is within acceptable slip frequency window 429
a
25Av Breaker v voltage within sync angle window uncompensated 430
a
25WCv Breaker v voltages within sync angle window compensated and unsupervised 430
a
25Cv Breaker v voltages within sync angle window compensated 431
* Reserved 431
a
59VPv Breaker v polarizing voltage within healthy voltage window 432
59VSva Breaker v synchronizing voltage within healthy voltage window 432
a
BSYNBKv Breaker v synchronism check blocked 433
a
25ENBKv Breaker v synchronism check enabled 433
a
GENVHIv Generator voltage is higher than Breaker v system voltage 434
a
GENVLOv Generator voltage is lower than Breaker v system voltage 434
a
25VDIFv Breaker v voltage difference is within acceptable window 435
* Reserved 435
a
CFAv Breaker v close fail angle alarm 436
25BFSPva Breaker v closed indication for breaker failure 436
Remote Axion Status
* Reserved 439

Row List
Time and Date Management

SER_SET Qualify serial IRIG-B high-accuracy time source 440
SER_RST Disqualify serial IRIG-B high-accuracy time source 440
BNC_SET Qualify BNC IRIG-B high-accuracy time source 440
BNC_RST Disqualify BNC IRIG-B high-accuracy time source 440
BNC_OK IRIG-B signal from BNC port is available and has sufficient quality 440
SER_OK IRIG-B signal from Serial Port 1 is available and has sufficient quality 440
UPD_BLK Block updating internal clock period and master time 440
BNC_BNP Bad jitter on BNC port and the IRIG-B signal is lost afterwards 440
SER_BNP Bad jitter on serial port and the IRIG-B signal is lost afterwards 441
BNC_TIM A valid IRIG-B time source is detected on BNC port 441
SER_TIM A valid IRIG-B time source is detected on serial port 441
PTP_TIM A valid PTP time source is detected 441
PTP_SET Qualify PTP high-accuracy time source 441
PTP_RST Disqualify PTP high-accuracy time source 441
PTP_OK PTP is available and has sufficient quality 441
PTPSYNC Synchronized to a high-quality PTP source 441
SERSYNC Synchronized to a high-quality serial IRIG source 442
BNCSYNC Synchronized to a high-quality BNC IRIG source 442
P5ABSW Port 5A or 5B has just become active 442
PTP_BNP Bad jitter on PTP signals and the PTP signal is lost afterwards 442
RTD Status Bits
RTS01OK– RTD01–RTD08 healthy 444
RTS08OK
RTS16OK
RTS24OK
AMB_F Ambient temperature fault condition 447
RTSCFB SEL-2600 communication failure (RTDB) 447
RTSFLB SEL-2600 RAM failure (RTDB) 447
RTSCFA SEL-2600 communication failure (RTDA) 447
RTSFLA SEL-2600 RAM failure (RTDA) 447
RTS01SC– RTD01–RTD08 short circuited 448
RTS08SC
RTS16SC
RTS24SC

Row List
* Reserved 451
RTS01OC– RTD01–RTD08 open circuited 452
RTS08OC
RTS16OC
RTS24OC
* Reserved 455
21P Phase Distance Element
PQ Based Loss-of-Field Element
40PUV Loss-of-field PQ zone undervoltage element picked up 460
40P4 Capability curve limit Zone 4 picked up 460
40P4T Capability curve limit Zone 4 timed out 461

Row List
40P4TC Capability curve limit Zone 4 torque control 461

40P4OE Capability curve limit Zone 4 overexcitation segment picked up 461
40P4PLG Capability curve limit Zone 4 over power lag PF segment picked up 461
40P4PLD Capability curve limit Zone 4 over power lead PF segment picked up 461
40P4UE Capability curve limit Zone 4 underexcitation segment picked up 461
40P3 Steady-state stability limit Zone 3 picked up 461
40P3T Steady-state stability limit Zone 3 timed out 461
40P3TC Steady-state stability limit Zone 3 torque control 462
40PDAQ 40P dynamic zone analog quality 462
40PAT Loss-of-field undervoltage acceleration timed out 462
* Reserved 462
Loss-of-Potential Elements
LOPV Loss-of-potential Terminal V 463
LOPSV Loss-of-potential element set logic picked up, Terminal V 463
LOPRV Loss-of-potential element reset logic picked up, Terminal V 463
LOPTCV Loss-of-potential element torque control, Terminal V 463
LOPDVV Loss-of-potential element incremental voltage picked up, Terminal V 463
LOPDIV Loss-of-potential element current disturbance picked up, Terminal V 463
LOPRSV Loss-of-potential element voltage reset logic picked up, Terminal V 463
LOPIV Loss-of-potential element incremental voltage logic picked up, Terminal V 463
LOPQV Loss-of-potential element negative-sequence voltage logic picked up, Terminal V 464
60LOPV 60 loss-of-potential element voltage unbalance logic picked up, Terminal V 464
LOPZ Loss-of-potential Terminal Z 464
LOPSZ Loss-of-potential element set logic picked up, Terminal Z 464
LOPRZ Loss-of-potential element reset logic picked up, Terminal Z 464
LOPTCZ Loss-of-potential element torque control, Terminal Z 464
LOPDVZ Loss-of-potential element incremental voltage picked up, Terminal Z 464
LOPDIZ Loss-of-potential element current disturbance picked up, Terminal Z 464
LOPRSZ Loss-of-potential element voltage reset logic picked up, Terminal Z 465
LOPIZ Loss-of-potential element incremental voltage logic picked up, Terminal Z 465
LOPQZ Loss-of-potential element negative-sequence voltage logic picked up, Terminal Z 465
60LOPZ 60 loss-of-potential element voltage unbalance logic picked up, Terminal Z 465
LOP3PHV Loss-of-potential three-phase element picked up, Terminal V 465
LOP3PHZ Loss-of-potential three-phase element picked up, Terminal Z 465
* Reserved 465
Out-of-Step Elements
78Z1 Out-of-step positive seq. impedance inside the characteristic 466
78SWNG Out-of-step swing detected 466
78OOS Out-of-step protection picked up 466

Row List
78OST Out-of-step protection timed out 466

78OSTR Out-of-step protection trip raw 466
78GCNT Out-of-step generator slips equal to count 466
78SCNT Out-of-step system slips equal to count 467
78CNT Out-of-step slips equal to count 467
78TC Out -of-step torque control 467
* Reserved 467
RTC Status Bits
RTC01OK– RTC01–RTC08 healthy 468
RTC08OK
RTC16OK
RTC24OK
* Reserved 471
RTC01SC– RTC01–RTC08 short circuited 472
RTC08SC
RTC16SC
RTC24SC
* Reserved 475
RTC01OC– RTC01–RTC08 open circuited 476
RTC08OC
RTC16OC
RTC24OC
* Reserved 479
RTC01Q– RTC01–RTC08 quality healthy 480
RTC08Q
RTC16Q
RTC24Q
* Reserved 483
81A Element
81AB1–81AB8 81A element Band 1–8 pickup 484
81AB1T– 81A element Band 1–8 delayed pickup 485
81AB8T
81ATC 81A element torque control 486
81AC 81A element pickup 486
81AT 81A element delayed pickup 486

Row List
49RTD Element Bits

49R01S2– RTD Element 01–08 Level 2 asserted 488
49R08S2
* Reserved 489
49R12S2
49R08S1
* Reserved 491
49R12S1
49RLV1P– RTD Element Location 1–4 voted trip asserted 492
49RLV4P
Reserved
IEC 61850 Mode Control
SC850TM SELOGIC control for IEC 61850 test mode 496
SC850BM SELOGIC control for IEC 61850 blocked mode 496
SC850SM SELOGIC control for IEC 61850 simulation mode 496
Reserved
Bay Control Disconnect Timers and Breaker Status
52YTEST Breaker Y test position 500
52UTEST Breaker U test position 500
52TTEST Breaker T test position 500
52STEST Breaker S test position 500
52YRACK Breaker Y rack position 500
52URACK Breaker U rack position 500
52TRACK Breaker T rack position 500
52SRACK Breaker S rack position 500
Reserved
IEC Thermal Elements
* Reserved 504
* Reserved 504
* Reserved 505

Row List

Reserved
25A Autosynchronizer
25ASTva Breaker v autosynchronizer start 508
a
25ACNv Breaker v autosynchronizer cancel 508
25AACT Autosynchronizer active 509
25AFR Frequency raise command 509
25AFL Frequency lower command 509
25AVR Voltage raise command 509
25AVL Voltage lower command 509
25PHOK Autosynchronizer phasing check is OK 509
* Reserved 509
25AvACTa Breaker v autosynchronizer active 510
a
25AvTO Breaker v autosynchronizer timed out 510
Reserved
* Reserved 511
46 Current Unbalance
Reserved
64 Insulation Resistance
64SIQ 64S remote insulation measurement quality bit 516
* Reserved 516
* Reserved 517

Row List
64FIQ 64F remote insulation measurement quality bit 518

* Reserved 518
* Reserved 519
64G Stator Ground
64G2TC 64G Element 2 third-harmonic differential undervoltage torque control 521
64G2DIF 64G Element 2 third-harmonic differential asserted 521
64G2UV 64G Element 2 undervoltage asserted 521
64G2DEN 64G Element 2 third-harmonic differential internal enable 521
64G2UEN 64G Element 2 undervoltage internal enable 521
64GALT 64G alternate setting selected 521
64G3TC 64G Element 3 third-harmonic ratio torque control 522
64G3EN 64G Element 3 enable 522
64GATC 64G accelerated torque control 522
64GTIN 64G normal trip input asserted 522
64GAIN 64G accelerated input asserted 522
64GT 64G stator ground trip pickup 522
64GAOK 64G third-harmonic angle check OK 523
* Reserved 523
Outputs

Row List

* Reserved 524
Reserved
Transducer Analog
* Reserved 528
Reserved
Directional Element
DIRBLKva Terminal v directional element block SELOGIC control equation 532
* Reserved 532
a
v32QE Terminal v negative-sequence directional calculation enabled 533
v32PEa Terminal v phase-directional calculation enabled 533
vF32Qa Terminal v forward negative-sequence directional picked up 534
a
vR32Q Terminal v reverse negative-sequence directional picked up 534
a
vF32P Terminal v forward phase-directional picked up 535
a
vR32P Terminal v reverse phase-directional picked up 535
a
v32GE Terminal v ground directional calculation enabled 536
* Reserved 536
a
vF32G Terminal v forward ground directional declared 537
vR32Ga Terminal v reverse ground directional declared 537
Reserved
60P Split Phase
60PmHSd Phase m highset level picked up 540
d
60PmHT Phase m highset level picked up with timer 540
60PHS Highset level picked up 540
60PHT Highset level picked up with timer 540
d
60PmLS Phase m lowset level picked up 541
d
60PmLT Phase m lowset level picked up with timer 541
60PLS Lowset level picked up 541
60PLT Lowset level picked up with timer 541
60PS 60P picked up 542
60PT 60P picked up with timer 542

Row List

d
60PmHSS Phase m highset level switched to secure 542
d
60PmLSS Phase m lowset level switched to secure 542
60PHTC 60P highset level torque control picked up 543
60PLTC 60P lowset level torque control picked up 543
60PLR Lowset reset picked up 543
* Reserved 543
60N Split Phase
60NHS Highset level picked up 544
60NHT Highset level picked up with timer 544
60NLS Lowset level picked up 544
60NLT Lowset level picked up with timer 544
60NS 60N picked up 544
60NT 60N picked up with timer 544
60NHSS Highset level switched to secure 544
60NLSS Lowset level switched to secure 544
Reserved
* Reserved 545
IED Local Remote Bits
LOC Control authority at local (bay) level 548
SC850LS SELOGIC control for control authority at station level 548
MLTLEV Multi-level control authority 548
LOCSTA Control authority at station level 548
* Reserved 548
* Reserved 548
* Reserved 548
* Reserved 548
Automation SELOGIC (Conditioning Timers)
ACT01Q– Automation SELOGIC Conditioning Timers 01–32 asserted 552–555
ACT32Q
Local Control and Supervision Bits 2
LBzzi Local Bit zz asserted 556–559
LB_SPzzi Local Bit zz supervision enabled 560–563
i
LB_DPzz Local Bit zz status display enabled 564–567
Remote Bits 2
RBzzi Remote Bit zz asserted 568–571
a v = S, T, U, Y.
b x = 1, 2, 3.
c n = 1–6.
d m= A, B, C.
e
k = 1, 2.
f p = 01–08.
g
xx = 1–10.
h yy = 1–32.
i
zz = 33–64

Instruction Manual
S E C T I O N 1 2
Analog Quantities
This section contains tables of the analog quantities available within the
SEL-400G Advanced Generator Protection System.
Use Table 12.1 and Table 12.2 as a reference for labels in this manual and as a
resource for quantities you use in SELOGIC control equation relay settings.
Table 12.1 lists the analog quantities alphabetically, and Table 12.2 groups the
analog quantities by function.
Table 12.1 Analog Quantities Sorted Alphabetically (Sheet 1 of 10)
Analog Labels Analog Quantity Description Units

a
24RPUa Volts per hertz ratio element a %
25AFCT 25A autosynchronizer frequency pulse count Unitless
b
25ANGn 25 sync-check angle difference for Breaker n ° (±180)
b
25ANGCn 25 sync-check compensated angle difference for Breaker n ° (±180)
25AVCT 25A autosynchronizer voltage pulse count Unitless
b
25DIFVn 25 sync-check voltage difference for Breaker n %
b
25SLIPn 25 sync-check slip frequency Breaker n Hz
25VPFA 25 sync-check polarizing voltage angle ° (±180)
25VPFM 25 sync-check polarizing voltage magnitude V (secondary)
b
25VSnFA 25 sync-check synchronizing voltage angle for Breaker n ° (±180)
b
25VSnFM 25 sync-check synchronizing voltage magnitude for Breaker n V (secondary)
c
3I0rA Instantaneous zero-sequence current angle, Terminal r ° (±180°)
c
3I0rI Instantaneous zero-sequence current, imaginary component, Terminal r A (secondary)
c
3I0rM Instantaneous zero-sequence current magnitude, Terminal r A (secondary)
c
3I0rR Instantaneous zero-sequence current, real component, Terminal r A (secondary)
3I0sACd 40 ms average zero-sequence current angle, Terminal s ° (±180°)
d
3I0sMC 40 ms average zero-sequence current magnitude, Terminal s A (primary)
d
3I0sMS 1 s average zero-sequence current magnitude, Terminal s A (secondary)
3I0GA Instantaneous zero-sequence current angle, generator neutral side ° (±180°)
3I0GI Instantaneous zero-sequence current, imaginary component, generator neutral side A (secondary)
3I0GM Instantaneous zero-sequence current magnitude, generator neutral side A (secondary)
3I0GR Instantaneous zero-sequence current, real component, generator neutral side A (secondary)
c
3I2rA Instantaneous negative-sequence current angle, Terminal r ° (±180°)
3I2rIc Instantaneous negative-sequence current, imaginary component, Terminal r A (secondary)
3I2rMc Instantaneous negative-sequence current magnitude, Terminal r A (secondary)
c
3I2rR Instantaneous negative-sequence current, real component, Terminal r A (secondary)
d
3I2sAC 40 ms average negative-sequence current angle, Terminal s ° (±180°)
d
3I2sMC 40 ms average negative-sequence current magnitude, Terminal s A (primary)

12.2 Analog Quantities

d
3I2sMS 1 s average negative-sequence current magnitude, Terminal s A (secondary)
3I2GA Instantaneous negative-sequence current angle, generator neutral side ° (±180°)
3I2GI Instantaneous negative-sequence current, imaginary component, generator neutral side A (secondary)
3I2GM Instantaneous negative-sequence current magnitude, generator neutral side A (secondary)
3I2GR Instantaneous negative-sequence current, real component, generator neutral side A (secondary)
d
3PsFC 40 ms average three-phase fundamental active power, Terminal s MW (primary)
d
3PsFS 1 s average three-phase fundamental active power, Terminal s MW (primary)
3PsMWHNd Three-phase active energy imported, Terminal s MWh (primary)
d
3PsMWHP Three-phase active energy exported, Terminal s MWh (primary)
d
3PsMWHT Total three-phase active energy, Terminal s MWh (primary)
e
3PtF Instantaneous three-phase fundamental active power, Terminal t W (secondary)
d
3PFsC Three-phase displacement power factor, Terminal s — (unitless, ratio)
d
3QsFC 40 ms average three-phase fundamental reactive power, Terminal s MVAR (primary)
d
3QsFS 1 s average three-phase fundamental reactive power, Terminal s MVAR (primary)
d
3QsMVHN Three-phase reactive energy imported, Terminal s MVAR (primary)
3QsMVHPd Three-phase reactive energy exported, Terminal s MVAR (primary)
d
3QsMVHT Total three-phase reactive energy, Terminal s MVAR (primary)
e
3QtF Instantaneous three-phase fundamental reactive power, Terminal t VARs (secondary)
d
3SsFC 40 ms average three-phase fundamental apparent power, Terminal s MVA (primary)
d
3SsFS 1 s average three-phase fundamental apparent power, Terminal s MVA (primary)
e
3StF Instantaneous three-phase fundamental apparent power, Terminal t VA (secondary)
f
3V0kA Instantaneous zero-sequence voltage angle, Terminal k ° (±180°)
f
3V0kAC 40 ms average zero-sequence voltage angle, Terminal k ° (±180°)
3V0kIf Instantaneous zero-sequence voltage, imaginary component, Terminal k V (secondary)
f
3V0kM Instantaneous zero-sequence voltage magnitude, Terminal k V (secondary)
f
3V0kMC 40 ms average zero-sequence voltage magnitude, Terminal k kV (primary)
f
3V0kR Instantaneous zero-sequence voltage, real component, Terminal k V (secondary)
3V0Z3A Instantaneous third-harmonic zero-sequence voltage angle, Terminal Z ° (±180°)
3V0Z3I Instantaneous third-harmonic zero-sequence voltage, imaginary component, Terminal Z V (secondary)
3V0Z3M Instantaneous third-harmonic zero-sequence voltage magnitude, Terminal Z V (secondary)
3V0Z3R Instantaneous third-harmonic zero-sequence voltage, real component, Terminal Z V (secondary)
3V0Z3AC 40 ms average filtered generator terminal third-harmonic voltage angle ° (±180°)
3V0Z3MC 40 ms average filtered generator terminal third-harmonic voltage magnitude kV (primary)
f
3V2kA Instantaneous negative-sequence voltage angle, Terminal k ° (±180°)
f
3V2kAC 40 ms average negative-sequence voltage angle, Terminal k ° (±180°)
f
3V2kI Instantaneous negative-sequence voltage, imaginary component, Terminal k V (secondary)
f
3V2kM Instantaneous negative-sequence voltage magnitude, Terminal k V (secondary)
f
3V2kMC 40 ms average negative-sequence voltage magnitude, Terminal k kV (primary)
f
3V2kR Instantaneous negative-sequence voltage, real component, Terminal k V (secondary)
40PDAM Loss-of-field dynamic zone parameter data Unitless
40PPLD Loss-of-field Zone 4 active power lead PF limit W (secondary)

Analog Quantities 12.3
40PPLG Loss-of-field Zone 4 active power lag PF limit W (secondary)

40PPMX Loss-of-field Zone 4 maximum active power W (secondary)
40PPU Loss-of-field Zone 4 active power UPF limit W (secondary)
40PQMN Loss-of-field Zone 4 minimum reactive power Vars (secondary)
40PQMX Loss-of-field Zone 4 maximum reactive power Vars (secondary)
40PQZ2 Loss-of-field Zone 2 reactive power limit Vars (secondary)
51P[012] 51 element [012] pickup value A (secondary)
51TD[012] 51 element [012] time dial setting –
60LDVM 60 LOP voltage unbalance magnitude V (secondary)
64FIR 64F field insulation resistance kohm
64SIC 64S stator insulation capacitance µF
64SIR 64S stator insulation resistance kohm
78CN Out-of-step command pole slip count Unitless
78GCN Out-of-step generator pole slip count Unitless
78SCN Out-of-step system pole slip count Unitless
81AB[8]S 81A element band [8] accumulated time s
c, g
87prDC DC component, Phase p, Terminal r pu
a, g
87pM2a 2nd harmonic current content of operating current, Phase p, Element a pu
a, g
87pM4a 4th harmonic current content of operating current, Phase p, Element a pu
a, g
87pM5a 5th harmonic current content of operating current, Phase p, Element a pu
a, g
87pOPFa Filtered differential operating current, Phase p, Element a pu
a, g
87pOPRa RMS differential operating current, Phase p, Element a pu
a, g
87pRTFa Filtered differential restraint current, Phase p, Element a pu
87pRTHaa, g Biased differential harmonic restraint current, Phase p, Element a pu
a, g
87pRTKa Biased differential restraint current, Phase p, Element a pu
a
87QOPFa Negative-sequence differential operating current, Element a pu
a
87QRTFa Negative-sequence differential restraint current, Element a pu
ACN[032]CV Automation SELOGIC Counter [032] current value –
ACN[032]PV Automation SELOGIC Counter preset value –
ACT[032]DO Automation SELOGIC conditioning timer dropout time s
ACT[032]PU Automation SELOGIC conditioning timer pickup time s
ACTGRP Active Settings Group (1–6)
AMV[0256] Automation SELOGIC math variable –
AST[032]ET Automation SELOGIC sequencing timer elapsed time s
AST[032]PT Automation SELOGIC sequencing timer preset time s
b, g
BnATRIp Breaker n accumulated trip current for Phase p A (primary)
b, g
BnBCWPp Breaker n breaker-contact wear for Pole p %
b, g
BnEOTCp Breaker n average electrical operating time (close for Phase p) ms
b, g
BnEOTTp Breaker n average electrical operating time (trip for Phase p) ms
BnLEOCpb, g Breaker n last electrical operating time (close for Phase p) ms
b, g
BnLEOTp Breaker n last electrical operating time (trip for Phase p) ms


b
BnLMOTC Breaker n last mechanical operating time (close) ms
b
BnLMOTT Breaker n last mechanical operating time (trip) ms
b, g
BnLTRIp Breaker n last interrupted trip current for Phase p %
BnMOTCb Breaker n average mechanical operating time (close) ms
b
BnMOTT Breaker n average mechanical operating time (trip) ms
b
BnOPCN Breaker n number of operations (trip) N/A
BNCDSJI BNC port 100 PPS data stream jitter µs
BNCOTJF Fast converging BNC port ON TIME marker jitter, coarse accuracy µs
BNCOTJS Slow converging BNC port ON TIME marker jitter, fine accuracy µs
BNCTBTW Time between BNC 100 PPS pulses µs
c
CTRr Current transformer ratio for Terminal r –
h
CTRYb Current transformer ratio for Terminal Yb –
CUR_SRC Current high-accuracy time source
DCMAX Maximum DC 1 voltage V
DCMIN Minimum DC 1 voltage V
DCNE Average negative-to-ground DC 1 voltage V
DCPO Average positive-to-ground DC 1 voltage V
DCRI AC ripple of DC 1 voltage V
DDOM UTC date, day of the month (1–31) day
DDOW UTC date, day of the week (1-SU,.., 7-SA) –
DDOY UTC date, day of the year (1–366) day
DFDTPP Rate-of-change-of-frequency for synchrophasor data, P Class Hz/s
DFDTPPD Rate-of-change-of-frequency for synchrophasor data, delayed for RTC alignment Hz/s
DFREQPG Generator rate-of-change-of-frequency Hz/s
DFREQPS System rate-of-change-of-frequency Hz/s
DLDOM Local date, day of the month (1–31) day
DLDOW Local date, day of the week (1-SU,.., 7-SA) –
DLDOY Local date, day of the year (1–366) day
DLMON Local date, month (1–12) month
DLYEAR Local date, year (2000–2200) year
DM[010] Demand metering value A (secondary)
DMM[010] Demand metering maximum value A (secondary)
DMON UTC date, month (1–12) month
DYEAR UTC date, year (2000–2200) year
FOSPM Fraction of second of the synchrophasor data packet s
FOSPMD Fraction of second of the synchrophasor data packet, delayed for RTC alignment s
FREQPG Generator frequency Hz
FREQPP Frequency for synchrophasor data, P Class Hz
FREQPPD Frequency for synchrophasor data, delayed for RTC alignment Hz
FREQPS System frequency Hz
h
HMAXb IEC equivalent max. thermal level, Element b pu


c, g
IprFA Instantaneous filtered phase current angle, Phase p, Terminal r ° (±180°)
c, g
IprFI Instantaneous filtered phase current, imaginary component, Phase p, Terminal r A (secondary)
c, g
IprFM Instantaneous filtered phase current magnitude, Phase p, Terminal r A (secondary)
IprFRc, g Instantaneous filtered phase current, real component, Phase p, Terminal r A (secondary)
c, g
IprPPAD Synchrophasor current angle, Phase p, Terminal r, delayed for RTC alignment ° (±180°)
c, g
IprPPI Synchrophasor current imaginary component, P Class, Phase p, P Class, Terminal r A (primary)
c, g
IprPPID Synchrophasor current imaginary component, Phase p, Terminal r, delayed for RTC A (primary)
alignment
IprPPMDc, g Synchrophasor current magnitude, Phase p, Terminal r, delayed for RTC alignment A (primary)
c, g
IprPPR Synchrophasor current real component, P Class, Phase p, P Class, Terminal r A (primary)
c, g
IprPPRD Synchrophasor current real component, Phase p, Terminal r, delayed for RTC alignment A (primary)
d, g
IpsFAC 40 ms average filtered phase current angle, Phase p, Terminal s ° (±180°)
IpsFMCd, g 40 ms average filtered phase current magnitude, Phase p, Terminal s A (primary)
IpsRMSd, g Instantaneous rms phase current magnitude, Phase p, Terminal s A (secondary)
g
IpGFA Instantaneous filtered phase current angle, Phase p, generator neutral side ° (±180°)
g
IpGFI Instantaneous filtered phase current, imaginary component, Phase p, generator neutral A (secondary)
side
IpGFMg Instantaneous filtered phase current magnitude, Phase p, generator neutral side A (secondary)
g
IpGFR Instantaneous filtered phase current, real component, Phase p, generator neutral side A (secondary)
g
IpGRC 40 ms average rms phase current magnitude, Phase p, Terminal G A (primary)
g
IpGRS 1 second average rms phase current magnitude, Phase p, Terminal G A (secondary)
i
IppGFCM Instantaneous filtered GSU compensated phase-to-phase current magnitude, Phase pp, A (secondary)
generator neutral side
I1rAc Instantaneous positive-sequence current angle, Terminal r ° (±180°)
c
I1rI Instantaneous positive-sequence current, imaginary component, Terminal r A (secondary)
c
I1rM Instantaneous positive-sequence current magnitude, Terminal r A (secondary)
c
I1rPPAD Positive-sequence synchrophasor current angle, Terminal r, delayed for RTC alignment ° (±180°)
c
I1rPPI Positive-sequence synchrophasor current imaginary component, P Class, Terminal r A (primary)
c
I1rPPID Positive-sequence synchrophasor current imaginary component, Terminal r, delayed for A (primary)
RTC alignment
I1rPPMDc Positive-sequence synchrophasor current magnitude, Terminal r, delayed for RTC align- A (primary)
ment
I1rPPRc Positive-sequence synchrophasor current real component, P class, Terminal r A (primary)
c
I1rPPRD Positive-sequence synchrophasor current real component, Terminal r, delayed for RTC A (primary)
alignment
I1rRc Instantaneous positive-sequence current, real component, Terminal r A (secondary)
d
I1sAC 40 ms average positive-sequence current angle, Terminal s ° (±180°)
I1sMCd 40 ms average positive-sequence current magnitude, Terminal s A (primary)
I1GA Instantaneous positive-sequence current angle, generator neutral side ° (±180°)
I1GI Instantaneous positive-sequence current, imaginary component, generator neutral side A (secondary)
I1GM Instantaneous positive-sequence current magnitude, generator neutral side A (secondary)
I1GMB Unbalance biased current for generator terminal A (secondary)
I1GR Instantaneous positive-sequence current, real component, generator neutral side A (secondary)

I2GP Generator fundamental negative-sequence current %

I2GPEQ Generator negative-sequence equivalent harmonic current %
c
IMAXrF Instantaneous filtered maximum phase-current magnitude, Terminal r A (secondary)
IMAXsRd Instantaneous rms maximum phase current, Terminal s A (secondary)
IMAXGF Instantaneous filtered maximum phase-current magnitude, generator neutral side A (secondary)
c
IMINrF Instantaneous filtered minimum phase-current magnitude, Terminal r A (secondary)
d
IMINsR Instantaneous rms minimum phase current, Terminal s A (secondary)
IMINGF Instantaneous filtered minimum phase-current magnitude, generator neutral side A (secondary)
IOREFMbh Operate current magnitude, Element b pu
h
IRREFMb Reference current magnitude, Element b pu
h
IYbFA Instantaneous filtered current angle, Terminal Yb ° (±180°)
h
IYbFAC 40 ms average filtered current angle, Channel b, Terminal Y ° (±180°)
h
IYbFI Instantaneous filtered current, imaginary component, Terminal Yb A (secondary)
h
IYbFM Instantaneous filtered current magnitude, Terminal Yb A (secondary)
h
IYbFMC 40 ms average filtered current magnitude, Channel b, Terminal Y A (primary)
IYbFRh Instantaneous filtered current, real component, Terminal Yb A (secondary)
MAMBbh Ambient temperature value in °C, Element b °C
MB[7]A Channel A received Mirrored Bit analog values –
MB[7]B Channel B received Mirrored Bit analog values –
NEW_SRC Selected high-accuracy time source
d, g
PpsFC 40 ms average phase fundamental active power, Phase p, Terminal s MW (primary)
e, g
PptF Instantaneous phase fundamental active power, Phase p, Terminal t W (secondary)
PCN[032]CV Protection SELOGIC Counter [032] current value –
PCN[032]PV Protection SELOGIC counter preset value –
PCT[032]DO Protection SELOGIC conditioning timer dropout time cycles
PCT[032]PU Protection SELOGIC conditioning timer pickup time cycles
d, g
PFpsC Phase displacement power factor, Phase p, Terminal s – (unitless, ratio)
PMV[064] Protection SELOGIC math variable –
PST[032]ET Protection SELOGIC sequencing timer elapsed time cycles
PST[032]PT Protection SELOGIC sequencing timer preset time cycles
PTPDSJI PTP 100 PPS data stream jitter in µs µs
PTPMCC PTP master clock class enumerated value
PTPOFST Clock offset between PTP master and relay time ns
PTPOTJF Fast converging PTP ON TIME marker jitter in µs, coarse accuracy µs
PTPOTJS Slow converging PTP ON TIME marker jitter in µs, fine accuracy µs
PTPSTEN PTP port state enumerated value
PTPTBTW Time between PTP 100 PPS pulses in µs µs
f
PTRk Potential transformer ratio for Terminal k –
h
PTRVb Potential transformer ratio for Terminal Vb –
PTRZ2 Potential transformer ratio for Terminal Z2 –
QpsFCd, g 40 ms average phase fundamental reactive power, Phase p, Terminal s Mvar (primary)


e, g
QptF Instantaneous phase fundamental reactive power, Phase p, Terminal t Var (secondary)
RA[0256] Remote analogs N/A
RAO[064] Remote analog output –
REFGEN Reference angle for generator side phasors ° (±180)
REFSYS Reference angle for system side phasors ° (±180)
RLYTEMP Relay temperature (°C temperature of the box) °C
RTC[024]TV Remote temperature value in °C, RTC[024] °C
RTCAA0[8] Channel A remote synchrophasor analogs (units depends on remote synchrophasor con-
tents)
RTCAP[032] Channel A remote synchrophasor phasors (units depends on remote synchrophasor con-
tents)
RTCBA0[8] Channel B remote synchrophasor analogs (units depends on remote synchrophasor con-
tents)
RTCBP[032] Channel B remote synchrophasor phasors (units depends on remote synchrophasor con-
tents)
RTCDFA Rate-of-change of Channel A remote frequency (from remote synchrophasors) Hz/s
RTCDFB Rate-of-change of Channel B remote frequency (from remote synchrophasors) Hz/s
RTCFA Channel A remote frequency (from remote synchrophasors) Hz
RTCFB Channel B remote frequency (from remote synchrophasors) Hz
RTS[024]TV RTD temperature value in °C, RTS[024] °C
SpsFCd, g 40 ms average phase fundamental apparent power, Phase p, Terminal s MVA (primary)
e, g
SptF Instantaneous phase fundamental apparent power, Phase p, Terminal t VA (secondary)
SERDSJI Serial port 100 PPS data stream jitter µs
SEROTJF Fast converging serial port ON TIME marker jitter, coarse accuracy µs
SEROTJS Slow converging serial port ON TIME marker jitter, fine accuracy µs
SERTBTW Time between serial 100 PPS pulses µs
SODPM Second of day of the synchrophasor data packet s
SODPMD Second of day of the synchrophasor data packet, delayed for RTC alignment s
SQUAL IRIG-B synchronization accuracy µs
THR UTC time, hour (0–23) hr
h
THRLb IEC thermal level value, Element b pu
h
THTCUb IEC thermal capacity used, Element b Unitless
h
THTRIPb IEC thermal time to trip, Element b s
TLHR Local time, hour (0–23) hr
TLMIN Local time, minute (0–59) min
TLMSEC Local time, milliseconds (0–999) ms
TLNSEC Local time, nanoseconds (0–999999) ns
TLODMS Local time of day in milliseconds (0–86400000) ms
TLSEC Local time, seconds (0–59) s
TMIN UTC time, minute (0–59) min
TMSEC UTC time, milliseconds (0–999) ms
TNSEC UTC time, nanoseconds (0–999999) ns

TODMS UTC time of day in milliseconds (0–86400000) ms

TQUAL Worst-case time source clock time error s
TSEC UTC time, seconds (0–59) s
TUTC Offset from local time to UTC time hr
f, g
VpkFA Instantaneous filtered phase-to-neutral voltage angle, Phase p, Terminal k ° (±180°)
f, g
VpkFAC 40 ms average filtered phase-to-neutral voltage angle, Phase p, Terminal k ° (±180°)
f, g
VpkFI Instantaneous filtered phase-to-neutral voltage, imaginary component, Phase p, V (secondary)
Terminal k
VpkFMf, g Instantaneous filtered phase-to-neutral voltage magnitude, Phase p, Terminal k V (secondary)
f, g
VpkFMC 40 ms average filtered phase-to-neutral voltage magnitude, Phase p, Terminal k kV (primary)
f, g
VpkFR Instantaneous filtered phase-to-neutral voltage, real component, Phase p, Terminal k V (secondary)
f, g
VpkPPAD Synchrophasor voltage angle, Phase p, Terminal k, delayed for RTC alignment ° (±180°)
VpkPPIf, g Synchrophasor voltage imaginary component, P class, Phase p, P Class, Terminal k kV (primary)
f, g
VpkPPID Synchrophasor voltage imaginary component, Phase p, Terminal k, delayed for RTC kV (primary)
alignment
VpkPPMDf, g Synchrophasor voltage magnitude, Phase p, Terminal k delayed for RTC alignment kV (primary)
f, g
VpkPPR Synchrophasor voltage real component, P Class, Phase p, P Class, Terminal k kV (primary)
VpkPPRDf, g Synchrophasor voltage real component, Phase p, Terminal k, delayed for RTC alignment kV (primary)
f, g
VpkRMS Instantaneous rms phase to neutral voltage, Phase p, Terminal k V (secondary)
g
VpZRC 40 ms average rms phase-to-neutral voltage magnitude, Phase p, Terminal Z kV (primary)
f, i
VppkFA Instantaneous filtered phase-to-phase voltage angle, Phases pp, Terminal k ° (±180°)
f, i
VppkFAC 40 ms average filtered phase-to-phase voltage angle, Phases pp, Terminal k ° (±180°)
f, i
VppkFI Instantaneous filtered phase-to-phase voltage, imaginary component, Phases pp, V (secondary)
Terminal k
VppkFMf, i Instantaneous filtered phase-to-phase voltage magnitude, Phases pp, Terminal k V (secondary)
f, i
VppkFMC 40 ms average filtered phase-to-phase voltage magnitude, Phases pp, Terminal k V (primary)
f, i
VppkFR Instantaneous filtered phase-to-phase voltage, real component, Phases pp, Terminal k V (secondary)
f, i
VppkRMS Instantaneous rms phase-to-phase voltage Phases pp, Terminal k V (secondary)
i
VppZFCM Instantaneous filtered GSU compensated generator terminal phase-to-phase voltage mag- V (secondary)
nitude, Phases pp
VppZRCi 40 ms average rms phase-to-phase voltage magnitude, Phases pp, Terminal Z V (primary)
f
V1kA Instantaneous positive-sequence voltage angle, Terminal k ° (±180°)
f
V1kAC 40 ms average positive-sequence voltage angle, Terminal k ° (±180°)
f
V1kI Instantaneous positive-sequence voltage, imaginary component, Terminal k V (secondary)
f
V1kM Instantaneous positive-sequence voltage magnitude, Terminal k V (secondary)
V1kMCf 40 ms average positive-sequence voltage magnitude, Terminal k kV (primary)
f
V1kPPAD Positive-sequence synchrophasor voltage angle, Terminal k, delayed for RTC alignment ° (±180°)
f
V1kPPI Positive-sequence synchrophasor voltage imaginary component, P Class, Terminal k kV (primary)
f
V1kPPID Positive-sequence synchrophasor voltage imaginary component, Terminal k, delayed for kV (primary)
RTC alignment
V1kPPMDf Positive-sequence synchrophasor voltage magnitude, Terminal k, delayed for RTC align- kV (primary)
ment
V1kPPRf Positive-sequence synchrophasor voltage real component, P Class, Terminal k kV (primary)


f
V1kPPRD Positive-sequence synchrophasor voltage real component, Terminal k, delayed for RTC kV (primary)
alignment
V1kRf Instantaneous positive-sequence voltage, real component, Terminal k V (secondary)
V3DIF Third harmonic voltage difference V (secondary)
V3RAT Third harmonic voltage ratio pu
VDC Station battery dc voltage V
VG3FA Total third harmonic voltage angle ° (±180°)
VG3FAC 40 ms average filtered total neutral third harmonic voltage angle ° (±180°)
VG3FI Total third harmonic voltage imaginary component V (secondary)
VG3FM Total third harmonic voltage magnitude V (secondary)
VG3FMC 40 ms average filtered total neutral third harmonic voltage magnitude kV (primary)
VG3FR Total third harmonic voltage real component V (secondary)
VN3FA Instantaneous third harmonic voltage angle at the neutral ° (±180°)
VN3FAC 40 ms average filtered generator neutral third harmonic voltage angle ° (±180°)
VN3FI Instantaneous third harmonic voltage, imaginary component at the neutral V (secondary)
VN3FM Instantaneous third harmonic voltage magnitude at the neutral V (secondary)
VN3FMC 40 ms average filtered generator neutral third harmonic voltage magnitude kV (primary)
VN3FR Instantaneous third harmonic voltage, real component at the neutral V (secondary)
VNFA Instantaneous filtered voltage angle at neutral terminal ° (±180°)
VNFAC 40 ms average filtered generator neutral voltage angle ° (±180°)
VNFI Instantaneous filtered voltage imaginary component at neutral terminal V (secondary)
VNFM Instantaneous filtered voltage magnitude at neutral terminal V (secondary)
VNFMC 40 ms average filtered generator neutral voltage magnitude kV (primary)
VNFR Instantaneous filtered voltage real component at neutral terminal V (secondary)
f
VNMAXkF Instantaneous filtered maximum phase-to-neutral voltage magnitude, Terminal k V (secondary)
f
VNMAXkR Instantaneous rms maximum phase-to-neutral voltage, Terminal k V (secondary)
f
VNMINkF Instantaneous filtered minimum phase-to-neutral voltage magnitude, Terminal k V (secondary)
f
VNMINkR Instantaneous rms minimum phase-to-neutral voltage, Terminal k V (secondary)
VPMAXkFf Instantaneous filtered maximum phase-to-phase voltage magnitude, Terminal k V (secondary)
f
VPMAXkR Instantaneous rms maximum phase-to-phase voltage, Terminal k V (secondary)
f
VPMINkF Instantaneous filtered minimum phase-to-phase voltage magnitude, Terminal k V (secondary)
f
VPMINkR Instantaneous rms minimum phase-to-phase voltage, Terminal k V (secondary)
h
VVbFA Instantaneous filtered phase-to-neutral voltage angle, Terminal Vb ° (±180°)
h
VVbFI Instantaneous filtered phase-to-neutral voltage, imaginary component, Terminal Vb V (secondary)
h
VVbFM Instantaneous filtered phase-to-neutral voltage magnitude, Terminal Vb V (secondary)
h
VVbFR Instantaneous filtered phase-to-neutral voltage, real component, Terminal Vb V (secondary)
VZ2FA Instantaneous filtered phase-to-neutral voltage angle, Terminal Z2 ° (±180°)
VZ2FI Instantaneous filtered phase-to-neutral voltage, imaginary component, Terminal Z2 V (secondary)
VZ2FM Instantaneous filtered phase-to-neutral voltage magnitude, Terminal Z2 V (secondary)
VZ2FR Instantaneous filtered phase-to-neutral voltage, real component, Terminal Z2 V (secondary)
Z1GFA Instantaneous positive-sequence impedance angle, seen from generator side ° (±180°)

Z1GFI Instantaneous positive-sequence impedance imaginary part, seen from generator side  (secondary)
Z1GFM Instantaneous positive-sequence impedance magnitude, seen from generator side  (secondary)
Z1GFR Instantaneous positive-sequence impedance real part, seen from generator side  (secondary)
a
a = 1, 2.
b n = S, T, U, Y.
c
r = S, T, U, W, X, Y.
d s = S, T, U, Y, G.
e
t = S, T, U, W, X, Y, G.
f k = V, Z.
g
p = A, B, C.
h b = 1, 2, 3.
i
pp = AB, BC, CA.
Table 12.2 Analog Quantities Sorted by Function (Sheet 1 of 11)
Number of
Analogs
25 Synchronism Check Analogs

25ANGna 25 sync-check angle difference for Breaker n ° (±180) 4
a
25ANGCn 25 sync-check compensated angle difference for Breaker n ° (±180) 4
a
25DIFVn 25 sync-check voltage difference for Breaker n % 4
a
25SLIPn 25 sync-check slip frequency Breaker n Hz 4
25VPFA 25 sync-check polarizing voltage angle ° (±180) 1
25VPFM 25 sync-check polarizing voltage magnitude V (secondary) 1
a
25VSnFA 25 sync-check synchronizing voltage angle for Breaker n ° (±180) 4
a
25VSnFM 25 sync-check synchronizing voltage magnitude for Breaker n V (secondary) 4
Autosynchronizer Analogs
25AFCT 25A autosynchronizer frequency pulse count Unitless 1
25AVCT 25A autosynchronizer voltage pulse count Unitless 1
Averaged Current
3I0sACb 40 ms average zero-sequence current angle, Terminal s ° (±180°) 5
b
3I0sMC 40 ms average zero-sequence current magnitude, Terminal s A (primary) 5
b
3I0sMS 1 s average zero-sequence current magnitude, Terminal s A (secondary) 5
b
3I2sAC 40 ms average negative-sequence current angle, Terminal s ° (±180°) 5
b
3I2sMC 40 ms average negative-sequence current magnitude, Terminal s A (primary) 5
b
3I2sMS 1 s average negative-sequence current magnitude, Terminal s A (secondary) 5
b, c
IpsFAC 40 ms average filtered phase current angle, Phase p, Terminal s ° (±180°) 15
IpsFMCb, c 40 ms average filtered phase current magnitude, Phase p, Terminal s A (primary) 15
c
IpGRC 40 ms average rms phase current magnitude, Phase p, Terminal G A (primary) 3
c
IpGRS 1 s average rms phase current magnitude, Phase p, Terminal G A (secondary) 3
b
I1sAC 40 ms average positive-sequence current angle, Terminal s ° (±180°) 5
b
I1sMC 40 ms average positive-sequence current magnitude, Terminal s A (primary) 5
d
IYbFAC 40 ms average filtered current angle, Channel b, Terminal Y ° (±180°) 3
d
IYbFMC 40 ms average filtered current magnitude, Channel b, Terminal Y A (primary) 3
b
3I0sAC 40 ms average zero-sequence current angle, Terminal s ° (±180°) 5

Number of
Analogs
Averaged Power
3PsFCb 40 ms average three-phase fundamental active power, Terminal s MW (primary) 5
b
3PsFS 1 second average three-phase fundamental active power, Terminal s MW (primary) 5
b
3QsFC 40 ms average three-phase fundamental reactive power, Terminal s Mvar (primary) 5
b
3QsFS 1 second average three-phase fundamental reactive power, Terminal s Mvar (primary) 5
b
3SsFC 40 ms average three-phase fundamental apparent power, Terminal s MVA (primary) 5
b
3SsFS 1 second average three-phase fundamental apparent power, Terminal s MVA (primary) 5
b, c
PpsFC 40 ms average phase fundamental active power, Phase p, Terminal s MW (primary) 15
QpsFCb, c 40 ms average phase fundamental reactive power, Phase p, Terminal s Mvar (primary) 15
SpsFCb, c 40 ms average phase fundamental apparent power, Phase p, Terminal s MVA (primary) 15
Averaged Power Factor
3PFsCb Three-phase displacement power factor, Terminal s – (unitless, ratio) 5
b, c
PFpsC Phase displacement power factor, Phase p, Terminal s – (unitless, ratio) 15
Averaged Voltage
3V0kACe 40 ms average zero-sequence voltage angle, Terminal k ° (±180°) 2
3V0kMCe 40 ms average zero-sequence voltage magnitude, Terminal k kV (primary) 2
3V0Z3AC 40 ms average filtered generator terminal third harmonic voltage angle ° (±180°) 1
3V0Z3MC 40 ms average filtered generator terminal third harmonic voltage magnitude kV (primary) 1
e
3V2kAC 40 ms average negative-sequence voltage angle, Terminal k ° (±180°) 2
e
3V2kMC 40 ms average negative-sequence voltage magnitude, Terminal k kV (primary) 2
c, e
VpkFAC 40 ms average filtered phase-to-neutral voltage angle, Phase p, Terminal k ° (±180°) 6
c, e
VpkFMC 40 ms average filtered phase-to-neutral voltage magnitude, Phase p, Terminal k kV (primary) 6
c
VpZRC 40 ms average rms phase-to-neutral voltage magnitude, Phase p, Terminal Z kV (primary) 3
VppkFACe, f 40 ms average filtered phase-to-phase voltage angle, Phases pp, Terminal k ° (±180°) 6
VppkFMCe, f 40 ms average filtered phase-to-phase voltage magnitude, Phases pp, Terminal k V (primary) 6
f
VppZRC 40 ms average rms phase-to-phase voltage magnitude, Phases pp, Terminal Z V (primary) 3
e
V1kAC 40 ms average positive-sequence voltage angle, Terminal k ° (±180°) 2
e
V1kMC 40 ms average positive-sequence voltage magnitude, Terminal k kV (primary) 2
VG3FAC 40 ms average filtered total neutral third harmonic voltage angle ° (±180°) 1
VG3FMC 40 ms average filtered total neutral third harmonic voltage magnitude kV (primary) 1
VN3FAC 40 ms average filtered generator neutral third harmonic voltage angle ° (±180°) 1
VN3FMC 40 ms average filtered generator neutral third harmonic voltage magnitude kV (primary) 1
VNFAC 40 ms average filtered generator neutral voltage angle ° (±180°) 1
VNFMC 40 ms average filtered generator neutral voltage magnitude kV (primary) 1
Breaker Monitoring Analogs
BnATRIpa, c Breaker n accumulated trip current for Phase p A (primary) 12
a, c
BnBCWPp Breaker n breaker-contact wear for Pole p % 12
a, c
BnEOTCp Breaker n average electrical operating time (close for Phase p) ms 12
BnEOTTpb, g Breaker n average electrical operating time (trip for Phase p) ms 12
BnLEOCpa, c Breaker n last electrical operating time (close for Phase p) ms 12

Number of
Analogs
BnLEOTpa, c Breaker n last electrical operating time (trip for Phase p) ms 12

a
BnLMOTC Breaker n last mechanical operating time (close) ms 4
BnLMOTTa Breaker n last mechanical operating time (trip) ms 4
BnLTRIpa, c Breaker n last interrupted trip current for Phase p % 12
a
BnMOTC Breaker n average mechanical operating time (close) ms 4
a
BnMOTT Breaker n average mechanical operating time (trip) ms 4
a
BnOPCN Breaker n number of operations (trip) N/A 4
Current and Potential Transformer Ratios
CTRrg Current transformer ratio for Terminal r – 6
CTRYbd Current transformer ratio for Terminal Yb – 3
PTRke Potential transformer ratio for Terminal k – 2
d
PTRVb Potential transformer ratio for Terminal Vb – 3
PTRZ2 Potential transformer ratio for Terminal Z2 – 1
Current Unbalance Analogs
I2GP Generator fundamental negative-sequence current % 1
I2GPEQ Generator negative-sequence equivalent harmonic current % 1
Demand Metering Analogs
DM[010] Demand metering value A (secondary) 10
DMM[010] Demand metering maximum value A (secondary) 10
Energy Metering Analogs
3PsMWHNb Three-phase active energy imported, Terminal s MWh (primary) 5
b
3PsMWHP Three-phase active energy exported, Terminal s MWh (primary) 5
3PsMWHTb Total three-phase active energy, Terminal s MWh (primary) 5
b
3QsMVHN Three-phase reactive energy imported, Terminal s Mvarh (primary) 5
b
3QsMVHP Three-phase reactive energy exported, Terminal s Mvarh (primary) 5
b
3QsMVHT Total three-phase reactive energy, Terminal s Mvarh (primary) 5
Field Insulation Analogs
64FIR 64F field insulation resistance kohm 1
Frequency Protection Analogs
81AB[8]S 81A element band [8] accumulated time s 8
Group Switch
ACTGRP Active settings group (1–6) 1
IEC Thermal Analogs
HMAXbd IEC equivalent max. thermal level, Element b pu 3
THRLbd IEC thermal level value, Element b pu 3
d
THTCUb IEC thermal capacity used, Element b Unitless 3
d
THTRIPb IEC thermal time to trip, Element b s 3
IEEE 1588 PTP Status
PTPDSJI PTP 100 PPS data stream jitter in µs µs 1
PTPMCC PTP master clock class enumerated value 1
PTPOFST Clock offset between PTP master and relay time ns 1

Number of
Analogs
PTPOTJF Fast converging PTP ON TIME marker jitter in µs, coarse accuracy µs 1
PTPOTJS Slow converging PTP ON TIME marker jitter in µs, fine accuracy µs 1
PTPSTEN PTP Port State enumerated value 1
PTPTBTW Time between PTP 100 PPS pulses in µs µs 1
Instantaneous Current
3I0rAg Instantaneous zero-sequence current angle, Terminal r ° (±180°) 6
g
3I0rI Instantaneous zero-sequence current, imaginary component, Terminal r A (secondary) 6
g
3I0rM Instantaneous zero-sequence current magnitude, Terminal r A (secondary) 6
3I0rRg Instantaneous zero-sequence current, real component, Terminal r A (secondary) 6
3I0GA Instantaneous zero-sequence current angle, generator neutral side ° (±180°) 1
3I0GI Instantaneous zero-sequence current, imaginary component, generator neutral side A (secondary) 1
3I0GM Instantaneous zero-sequence current magnitude, generator neutral side A (secondary) 1
3I0GR Instantaneous zero-sequence current, real component, generator neutral side A (secondary) 1
g
3I2rA Instantaneous negative-sequence current angle, Terminal r ° (±180°) 6
g
3I2rI Instantaneous negative-sequence current, imaginary component, Terminal r A (secondary) 6
g
3I2rM Instantaneous negative-sequence current magnitude, Terminal r A (secondary) 6
g
3I2rR Instantaneous negative-sequence current, real component, Terminal r A (secondary) 6
3I2GA Instantaneous negative-sequence current angle, generator neutral side ° (±180°) 1
3I2GI Instantaneous negative-sequence current, imaginary component, generator neutral A (secondary) 1
side
3I2GM Instantaneous negative-sequence current magnitude, generator neutral side A (secondary) 1
3I2GR Instantaneous negative-sequence current, real component, generator neutral side A (secondary) 1
IprFAc, g Instantaneous filtered phase current angle, Phase p, Terminal r ° (±180°) 18
IprFIc, g Instantaneous filtered phase current, imaginary component, Phase p, Terminal r A (secondary) 18
c, g
IprFM Instantaneous filtered phase current magnitude, Phase p, Terminal r A (secondary) 18
c, g
IprFR Instantaneous filtered phase current, real component, Phase p, Terminal r A (secondary) 18
c
IpGFA Instantaneous filtered phase current angle, Phase p, generator neutral side ° (±180°) 3
c
IpGFI Instantaneous filtered phase current, imaginary component, Phase p, generator neu- A (secondary) 3
tral side
IpGFMc Instantaneous filtered phase current magnitude, Phase p, generator neutral side A (secondary) 3
c
IpGFR Instantaneous filtered phase current, real component, Phase p, generator neutral A (secondary) 3
side
IppGFCMf Instantaneous filtered GSU compensated phase to phase current magnitude, A (secondary) 3
Phase pp, generator neutral side
I1rAg Instantaneous positive-sequence current angle, Terminal r ° (±180°) 6
g
I1rI Instantaneous positive-sequence current, imaginary component, Terminal r A (secondary) 6
g
I1rM Instantaneous positive-sequence current magnitude, Terminal r A (secondary) 6
I1rRg Instantaneous positive-sequence current, real component, Terminal r A (secondary) 6
I1GA Instantaneous positive-sequence current angle, generator neutral side ° (±180°) 1
I1GI Instantaneous positive-sequence current, imaginary component, generator neutral A (secondary) 1
side
I1GM Instantaneous positive-sequence current magnitude, generator neutral side A (secondary) 1

Number of
Analogs
I1GMB Unbalance biased current for generator terminal A (secondary) 1

I1GR Instantaneous positive-sequence current, real component, generator neutral side A (secondary) 1
IMAXrFg Instantaneous filtered maximum phase-current magnitude, Terminal r A (secondary) 6
IMAXGF Instantaneous filtered maximum phase-current magnitude, generator neutral side A (secondary) 1
g
IMINrF Instantaneous filtered minimum phase-current magnitude, Terminal r A (secondary) 6
IMINGF Instantaneous filtered minimum phase-current magnitude, generator neutral side A (secondary) 1
d
IYbFA Instantaneous filtered current angle, Terminal Yb ° (±180°) 3
IYbFId Instantaneous filtered current, imaginary component, Terminal Yb A (secondary) 3
d
IYbFM Instantaneous filtered current magnitude, Terminal Yb A (secondary) 3
d
IYbFR Instantaneous filtered current, real component, Terminal Yb A (secondary) 3
Instantaneous Differential Quantities
87prDCc, g DC component, Phase p Terminal r pu 18
c, h
87pM2a 2nd harmonic current content of operating current, Phase p, Element a pu 6
c, h
87pM4a 4th harmonic current content of operating current, Phase p, Element a pu 6
c, h
87pM5a 5th harmonic current content of operating current, Phase p, Element a pu 6
c, h
87pOPFa Filtered differential operating current, Phase p, Element a pu 6
c, h
87pOPRa RMS differential operating current, Phase p, Element a pu 6
87pRTFac, h Filtered differential restraint current, Phase p, Element a pu 6
c, h
87pRTHa Biased differential harmonic restraint current, Phase p, Element a pu 6
c, h
87pRTKa Biased differential restraint current, Phase p, Element a pu 6
h
87QOPFa Negative-sequence differential operating current, Element a pu 2
h
87QRTFa Negative-sequence differential restraint current, Element a pu 2
Instantaneous Positive-Sequence Impedance
Z1GFA Instantaneous positive-sequence impedance angle, seen from generator side ° (±180°) 1
Z1GFI Instantaneous positive-sequence impedance imaginary part, seen from generator Ohm (secondary) 1
side
Z1GFM Instantaneous positive-sequence impedance magnitude, seen from generator side Ohm (secondary) 1
Z1GFR Instantaneous positive-sequence impedance real part, seen from generator side Ohm (secondary) 1
Instantaneous Power
3PtFi Instantaneous three-phase fundamental active power, Terminal t W (secondary) 7
i
3QtF Instantaneous three-phase fundamental reactive power, Terminal t Var (secondary) 7
i
3StF Instantaneous three-phase fundamental apparent power, Terminal t VA (secondary) 7
c, i
PptF Instantaneous phase fundamental active power, Phase p, Terminal t W (secondary) 21
c, i
QptF Instantaneous phase fundamental reactive power, Phase p, Terminal t Var (secondary) 21
c, i
SptF Instantaneous phase fundamental apparent power, Phase p, Terminal t VA (secondary) 21
Instantaneous RMS Voltage
IpsRMSb, c Instantaneous rms phase current magnitude, Phase p, Terminal s A (secondary) 15
b
IMAXsR Instantaneous rms maximum phase current, Terminal s A (secondary) 5
b
IMINsR Instantaneous rms minimum phase current, Terminal s A (secondary) 5
c, e
VpkRMS Instantaneous rms phase to neutral voltage, Phase p, Terminal k V (secondary) 6
e, f
VppkRMS Instantaneous rms phase-to-phase voltage Phases pp, Terminal k V (secondary) 6

Number of
Analogs
VNMAXkRe Instantaneous rms maximum phase-to-neutral voltage, Terminal k V (secondary) 2

e
VNMINkR Instantaneous rms minimum phase-to-neutral voltage, Terminal k V (secondary) 2
VPMAXkRe Instantaneous rms maximum phase-to-phase voltage, Terminal k V (secondary) 2
e
VPMINkR Instantaneous rms minimum phase-to-phase voltage, Terminal k V (secondary) 2
Instantaneous Voltage
3V0kAe Instantaneous zero-sequence voltage angle, Terminal k ° (±180°) 2
e
3V0kI Instantaneous zero-sequence voltage, imaginary component, Terminal k V (secondary) 2
e
3V0kM Instantaneous zero-sequence voltage magnitude, Terminal k V (secondary) 2
3V0kRe Instantaneous zero-sequence voltage, real component, Terminal k V (secondary) 2
3V03ZA Instantaneous third harmonic zero-sequence voltage angle, Terminal Z ° (±180°) 1
3V03ZI Instantaneous third harmonic zero-sequence voltage, imaginary component, Termi- V (secondary) 1
nal Z
3V03ZM Instantaneous third harmonic zero-sequence voltage magnitude, Terminal Z V (secondary) 1
3V03ZR Instantaneous third harmonic zero-sequence voltage, real component, Terminal Z V (secondary) 1
3V2kAe Instantaneous negative-sequence voltage angle, Terminal k ° (±180°) 2
e
3V2kI Instantaneous negative-sequence voltage, Imaginary component, Terminal k V (secondary) 2
e
3V2kM Instantaneous negative-sequence voltage magnitude, Terminal k V (secondary) 2
e
3V2kR Instantaneous negative-sequence voltage, real component, Terminal k V (secondary) 2
c, e
VpkFA Instantaneous filtered phase-to-neutral voltage angle, Phase p, Terminal k ° (±180°) 6
c, e
VpkFI Instantaneous filtered phase-to-neutral voltage, imaginary component, Phase p, Ter- V (secondary) 6
minal k
VpkFMc, e Instantaneous filtered phase-to-neutral voltage magnitude, Phase p, Terminal k V (secondary) 6
c, e
VpkFR Instantaneous filtered phase-to-neutral voltage, real component, Phase p, V (secondary) 6
Terminal k
VppkFAe, f Instantaneous filtered phase-to-phase voltage angle, Phases pp, Terminal k ° (±180°) 6
e, f
VppkFI Instantaneous filtered phase-to-phase voltage, imaginary component, Phases pp, V (secondary) 6
Terminal k
VppkFMe, f Instantaneous filtered phase-to-phase voltage magnitude, Phases pp, Terminal k V (secondary) 6
e, f
VppkFR Instantaneous filtered phase-to-phase voltage, real component, Phases pp, V (secondary) 6
Terminal k
VppZFCMf Instantaneous filtered GSU compensated generator terminal phase-to-phase voltage V (secondary) 3
magnitude, Phases pp
V1kAe Instantaneous positive-sequence voltage angle, Terminal k ° (±180°) 2
e
V1kI Instantaneous positive-sequence voltage, imaginary component, Terminal k V (secondary) 2
e
V1kM Instantaneous positive-sequence voltage magnitude, Terminal k V (secondary) 2
e
V1kR Instantaneous positive-sequence voltage, real component, Terminal k V (secondary) 2
VN3FA Instantaneous third harmonic voltage angle at the neutral ° (±180°) 1
VN3FI Instantaneous third harmonic voltage, imaginary component at the neutral V (secondary) 1
VN3FM Instantaneous third harmonic voltage magnitude at the neutral V (secondary) 1
VN3FR Instantaneous third harmonic voltage, real component at the neutral V (secondary) 1
VNFA Instantaneous filtered voltage angle at neutral terminal ° (±180°) 1
VNFI Instantaneous filtered voltage imaginary component at neutral terminal V (secondary) 1

Number of
Analogs
VNFM Instantaneous filtered voltage magnitude at neutral terminal V (secondary) 1

VNFR Instantaneous filtered voltage real component at neutral terminal V (secondary) 1
VNMAXkFe Instantaneous filtered maximum phase-to-neutral voltage magnitude, Terminal k V (secondary) 2
VNMINkFe Instantaneous filtered minimum phase-to-neutral voltage magnitude, Terminal k V (secondary) 2
e
VPMAXkF Instantaneous filtered maximum phase-to-phase voltage magnitude, Terminal k V (secondary) 2
e
VPMINkF Instantaneous filtered minimum phase-to-phase voltage magnitude, Terminal k V (secondary) 2
d
VVbFA Instantaneous filtered phase-to-neutral voltage angle, Terminal Vb ° (±180°) 3
VVbFId Instantaneous filtered phase-to-neutral voltage, imaginary component, Terminal Vb V (secondary) 3
d
VV[3]FM Instantaneous filtered phase-to-neutral voltage magnitude, Terminal Vb V (secondary) 3
d
VVbFR Instantaneous filtered phase-to-neutral voltage, real component, Terminal Vb V (secondary) 3
VZ2FA Instantaneous filtered phase-to-neutral voltage angle, Terminal Z2 ° (±180°) 1
VZ2FI Instantaneous filtered phase-to-neutral voltage, imaginary component, Terminal Z2 V (secondary) 1
VZ2FM Instantaneous filtered phase-to-neutral Voltage magnitude, Terminal Z2 V (secondary) 1
VZ2FR Instantaneous filtered phase-to-neutral Voltage, real component, Terminal Z2 V (secondary) 1
IRIG-B Control Bit Analogs
BNCDSJI BNC port 100 PPS data stream jitter µs 1
BNCOTJF Fast converging BNC port ON TIME marker jitter, coarse accuracy µs 1
BNCOTJS Slow converging BNC port ON TIME marker jitter, fine accuracy µs 1
BNCTBTW Time between BNC 100 PPS pulses µs 1
CUR_SRC Current high-accuracy time source 1
NEW_SRC Selected high-accuracy time source 1
SERDSJI Serial port 100 PPS data stream jitter µs 1
SEROTJF Fast converging serial port ON TIME marker jitter, coarse accuracy µs 1
SEROTJS Slow converging serial port ON TIME marker jitter, fine accuracy µs 1
SERTBTW Time between serial 100 PPS pulses µs 1
SQUAL IRIG-B synchronization accuracy µs 1
TQUAL Worst case time source clock time error s, (second) 1
TUTC Offset from local time to UTC time hr, (hour) 1
LOP Analogs
60LDVM 60 LOP voltage unbalance magnitude V (secondary) 1
Loss of Field Analogs
40PDAM Loss of field dynamic zone parameter data Unitless 1
40PPLD Loss of field Zone 3 active power lead PF limit W (secondary) 1
40PPLG Loss of field Zone 3 active power lag PF limit W (secondary) 1
40PPMX Loss of field Zone 3 maximum active power W (secondary) 1
40PPU Loss of field Zone 3 active power UPF limit W (secondary) 1
40PQMN Loss of field Zone 2 minimum reactive power Var (secondary) 1
40PQMX Loss of field Zone 3 maximum reactive power Var (secondary) 1
40PQZ2 Loss of field Zone 2 reactive power limit Var (secondary) 1

Number of
Analogs
MIRRORED BITS Analogs

MB[7]A Channel A received Mirrored Bit analog values – 7
MB[7]B Channel B received Mirrored Bit analog values – 7
Out-of-Step Analogs
78CN Out-of-step command pole slip count Unitless 1
78GCN Out-of-step generator pole slip count Unitless 1
78SCN Out-of-step system pole slip count Unitless 1
Overcurrent Analogs
51P[012] 51 element [012] pickup value A (secondary) 12
51TD[012] 51 element [012] Time dial setting – 12
Protection Frequency
DFREQPG Generator rate of change of frequency Hz/s 1
DFREQPS System rate of change of frequency Hz/s 1
FREQPG Generator frequency Hz 1
FREQPS System frequency Hz 1
Relay Temperature
RLYTEMP Relay temperature (°C temperature of the box) °C (degrees 1
Celcius)
Remote Analogs
RA[0256] Remote analogs N/A 256
RAO[064] Remote analog output – 64
Restricted Earth Fault Analogs
IOREFMbd Operate current magnitude, Element b p.u. 3
d
IRREFMb Reference current magnitude, Element b p.u. 3
SELOGIC Analogs
ACN[032]CV Automation SELOGIC Counter [032] current value – 32
ACN[032]PV Automation SELOGIC counter preset value – 32
ACT[032]DO Automation SELOGIC conditioning timer dropout time s 32
ACT[032]PU Automation SELOGIC conditioning timer pickup time s 32
AMV[0256] Automation SELOGIC math variable – 256
AST[032]ET Automation SELOGIC sequencing timer elapsed time s 32
AST[032]PT Automation SELOGIC sequencing timer preset time s 32
PCN[032]CV Protection SELOGIC Counter [032] current value – 32
PCN[032]PV Protection SELOGIC counter preset value – 32
PCT[032]DO Protection SELOGIC conditioning timer dropout time cycles 32
PCT[032]PU Protection SELOGIC conditioning timer pickup time cycles 32
PMV[064] Protection SELOGIC math variable – 64
PST[032]ET Protection SELOGIC sequencing timer elapsed time cycles 32
PST[032]PT Protection SELOGIC sequencing timer preset time cycles 32

Number of
Analogs
Station DC Monitoring Analogs

DCMAX Maximum DC 1 voltage V 1
DCMIN Minimum DC 1 voltage V 1
DCNE Average negative to Ground DC 1 voltage V 1
DCPO Average positive to Ground DC 1 voltage V 1
DCRI AC ripple of DC 1 voltage V 1
VDC Station battery dc voltage V 1
Stator Insulation Analogs
64SIC 64S stator insulation capacitance µF 1
64SIR 64S stator insulation resistance kohm 1
Synchrophasor Currents
FOSPM Fraction of second of the synchrophasor data packet s 1
c, g
IprPPI Synchrophasor current imaginary component, P class, Phase p, P class, Terminal r A (primary) 18
c, g
IprPPR Synchrophasor current real component, P class, Phase p, P class, Terminal r A (primary) 18
g
I1rPPI Positive-sequence synchrophasor current imaginary component, P class, Terminal r A (primary) 6
I1rPPRg Positive-sequence synchrophasor current real component, P class, Terminal r A (primary) 6
SODPM Second of day of the synchrophasor data packet s 1
Synchrophasor Frequency
DFDTPP Rate-of-change of Frequency for synchrophasor data, P class Hz/s 1
FREQPP Frequency for synchrophasor data, P class Hz 1
Synchrophasor RTC Analogs
DFDTPPD Rate-of-change-of-frequency for synchrophasor data, delayed for RTC alignment Hz/s 1
FOSPMD Fraction of second of the synchrophasor data packet, delayed for RTC alignment s 1
FREQPPD Frequency for synchrophasor data, delayed for RTC alignment Hz 1
c, g
IprPPAD Synchrophasor current angle, Phase p, Terminal r, delayed for RTC alignment ° (±180°) 18
c, g
IprPPID Synchrophasor current imaginary component, Phase p, Terminal r, delayed for RTC A (primary) 18
alignment
IprPPMDc, g Synchrophasor current magnitude, Phase p, Terminal r, delayed for RTC alignment A (primary) 18
c, g
IprPPRD Synchrophasor current real component, Phase p, Terminal r, delayed for RTC align- A (primary) 18
ment
I1rPPADg Positive-sequence synchrophasor current angle, Terminal r, delayed for RTC align- ° (±180°) 6
ment
I1rPPIDg Positive-sequence synchrophasor current Imaginary component, Terminal r, A (primary) 6
delayed for RTC alignment
I1rPPMDg Positive-sequence synchrophasor current magnitude, Terminal r, delayed for RTC A (primary) 6
alignment
I1rPPRDg Positive-sequence synchrophasor current real component, Terminal r, delayed for A (primary) 6
RTC alignment
RTCAA0[8] Channel A remote synchrophasor analogs (units depends on remote synchrophasor 8
contents)
RTCAP[032] Channel A remote synchrophasor phasors (units depends on remote synchrophasor 32
contents)
RTCBA0[8] Channel B remote synchrophasor analogs (units depends on remote synchrophasor 8
contents)

Number of
Analogs
RTCBP[032] Channel B remote synchrophasor phasors (units depends on remote synchrophasor 32

contents)
RTCDFA Rate of change of Channel A remote frequency (from remote synchrophasors) Hz/s 1
RTCDFB Rate of change of Channel B remote frequency (from remote synchrophasors) Hz/s 1
RTCFA Channel A remote frequency (from remote synchrophasors) Hz 1
RTCFB Channel B remote frequency (from remote synchrophasors) Hz 1
SODPMD Second of day of the synchrophasor data packet, delayed for RTC alignment s 1
VpkPPADc, e Synchrophasor voltage angle, Phase p, Terminal k, delayed for RTC alignment ° (±180°) 6
c, e
VpkPPID Synchrophasor voltage imaginary component, Phase p, Terminal k, delayed for kV (primary) 6
RTC alignment
VpkPPMDc, e Synchrophasor voltage magnitude, Phase p, Terminal k delayed for RTC alignment kV (primary) 6
c, e
VpkPPRD Synchrophasor voltage real component, Phase p, Terminal k, delayed for RTC kV (primary) 6
alignment
V1kPPAD Positive-sequence synchrophasor voltage angle, Terminal k, delayed for RTC align- ° (±180°) 2
ment
V1kPPIDe Positive-sequence synchrophasor voltage imaginary component, Terminal k, kV (primary) 2
delayed for RTC alignment
V1kPPMDe Positive-sequence synchrophasor voltage magnitude, Terminal k, delayed for RTC kV (primary) 2
alignment
V1kPPRDe Positive-sequence synchrophasor voltage real component, Terminal k, delayed for kV (primary) 2
RTC alignment
Synchrophasor Voltages
VpkPPIc, e Synchrophasor voltage imaginary component, P class, Phase p, P class, Terminal k kV (primary) 6
c, e
VpkPPR Synchrophasor voltage real component, P class, Phase p, P class, Terminal k kV (primary) 6
e
V1kPPI Positive-sequence synchrophasor voltage imaginary component, P class, Terminal k kV (primary) 2
e
V1kPPR Positive-sequence synchrophasor voltage real component, P class, Terminal k kV (primary) 2
Thermal Monitor Analogs
MAMBbd Ambient temperature value in °C, Element b °C (degrees 3
Celcius)
RTC[024]TV Remote temperature value in °C, RTC[024] °C (degrees 24
Celcius)
RTS[024]TV RTD temperature value in °C, RTS[024] °C (degrees 24
Celcius)
Third Harmonic Analogs
V3DIF Third harmonic voltage difference V (secondary) 1
V3RAT Third harmonic voltage ratio p.u. 1
VG3FA Total third harmonic voltage angle ° (±180°) 1
VG3FI Total third harmonic voltage imaginary component V (secondary) 1
VG3FM Total third harmonic voltage magnitude V (secondary) 1
VG3FR Total third harmonic voltage real component V (secondary) 1
Time and Date Management (UTC and Local Time)
DDOM UTC date, Day of the month (1–31) day 1
DDOW UTC date, Day of the week (1-SU,.., 7-SA) – 1
DDOY UTC date, Day of the year (1–366) day 1

Number of
Analogs
DLDOM Local date, Day of the month (1–31) day 1

DLDOW Local date, Day of the week (1-SU,.., 7-SA) – 1
DLDOY Local date, Day of the year (1–366) day 1
DLMON Local date, Month (1–12) month 1
DLYEAR Local date, Year (2000–2200) year 1
DMON UTC date, Month (1–12) month 1
DYEAR UTC date, Year (2000–2200) year 1
THR UTC time, Hour (0–23) hr 1
TLHR Local time, Hour (0–23) hr 1
TLMIN Local time, Minute (0–59) min 1
TLMSEC Local time, Milliseconds (0–999) ms 1
TLNSEC Local time, Nanoseconds (0–999999) ns 1
TLODMS Local time of day in Milliseconds (0–86400000) ms 1
TLSEC Local time, Seconds (0–59) s 1
TMIN UTC time, Minute (0–59) min 1
TMSEC UTC time, Milliseconds (0–999) ms 1
TNSEC UTC time, Nanoseconds (0–999999) ns 1
TODMS UTC time of day in Milliseconds (0–86400000) ms 1
TSEC UTC time, Seconds (0–59) s 1
Volts Per Hertz Analogs
24RPU[2] Volts per hertz ratio element [2] % percent 2
Phasor Reference
REFGEN Reference angle for generator side phasors ° (±180) 1
REFSYS Reference angle for system side phasors ° (±180) 1
a n = S, T, U, Y.
b
s = S, T, U, Y, G.
c p = A, B, C.
d
b = 1, 2, 3.
e k = V, Z.
f
pp = AB, BC, CA
g
r = S, T, U, W, X, Y.
h
a = 1, 2.
i
t = S, T, U, W, X, Y, G.

Instruction Manual
A P P E N D I X A
Firmware, ICD File, and Manual Versions
Firmware
Determining the Firmware Version
To determine the firmware version, view the status report by using the serial port
STATUS command or the front-panel HMI. The status report displays the Firm-
ware Identification (FID) number.
The firmware version will be either a standard release or a point release.
A standard release adds new functionality to the firmware beyond the specifica-
tions of the existing version. A point release is reserved for modifying firmware
functionality to conform to the specifications of the existing version.
A standard release is identified by a change in the R-number of the device FID
number.
Existing firmware:
FID=SEL-400G-x-R100-V0-Z001001-Dxxxxxxxx
Standard release firmware:
A point release is identified by a change in the V-number of the device FID number.
Existing firmware:
Point release firmware:
The release date is after the D. For example, the following is firmware version
number R100, release date December 10, 2003.
FID=SEL-400G-x-R100-V0-Z001001-D20031210
Similarly, the device SELBOOT firmware revision (BFID) will be reported as:
BFID=SLBT-4XX-Rxxx-Vx-Zxxxxxx-Dxxxxxxxx

A.2 Firmware, ICD File, and Manual Versions
Firmware
Revision History
Table A.1 lists the firmware versions, revisions descriptions, and corresponding
instruction manual date codes.
Table A.1 Firmware Revision History (Sheet 1 of 2)
Manual
Firmware Identification (FID) Number Summary of Revisions
Date Code
SEL-400G-R101-V1-Z002002-D20210625 Includes all the functions of SEL-400G-R101-V0-Z002002-D20210514 20210625

SEL-400G-1-R101-V1-Z002002-D20210625 and SEL-400G-1-R101-V0-Z002002-D20210514 with the following
addition:
➤ Modified firmware to improve the security of the phase distance ele-
ment when configured with zero time delay.
SEL-400G-R101-V0-Z002002-D20210514 ➤ Added conditioning timers to Automation SELOGIC. 20210514
SEL-400G-1-R101-V0-Z002002-D20210514 ➤ Improved processing consistency of breaker and disconnect control
bits in Automation SELOGIC.
➤ Improved Automation SELOGIC timer accuracy. Automation SELOGIC
timer accuracy is now within ± 1% or ± 1 s for values up to 1 month.
➤ Added the following breaker monitor analog quantities: accumulated
trip current, last interrupted current, operating times, and number of
operations.
➤ Modified the dropout delay for the percentage-restrained differential
element adaptive security timer.
➤ Increased the allowable TAPMAX/TAPMIN ratio when using 1 A and
5 A nominal CTs.
➤ Modified firmware by adding a 2.5 ms pickup delay to the blocking
timer used in the REF element trip output logic.
➤ Enhanced the internal fault detection logic associated with the differ-
ential element.
➤ Added settings EACC, E2AC, and EPAC to support port access con-
trol using SELOGIC control equations.
➤ Enhanced the MET DIF A command response. This command
response provides additional differential current metering.
➤ Modified firmware to ensure user-defined V/Hz settings are entered in
increasing order.
➤ Resolved an issue where V/Hz metering was limited to 99.99%.
➤ Enhanced STA A and CST command responses to include high-
accuracy PTP time status.
➤ Modified firmware by adding warm start (settings change, group
switch) ride-through capability for control inputs. In the this release,
previously asserted control inputs do not change state during warm
start.
➤ Resolved a rare issue where the SELBOOT checksum could be reported
incorrectly in the VER command response.
➤ Reduced maximum relay automatic diagnostic restart response time.
➤ Resolved an issue where Automation SELOGIC latch bits would reset
when the Automation SELOGIC settings are modified.
➤ Resolved an issue where uncommon and repetitive command line
operations can cause a relay restart when the IEC 61850 GOOSE func-
tion is enabled.
➤ Enhanced the relay’s logic to use both the BMCA algorithm and the
network time-inaccuracy check in power profile to choose the best
Grandmaster clock on a PRP network.

Firmware, ICD File, and Manual Versions A.3
SELBOOT
Table A.1 Firmware Revision History (Sheet 2 of 2)
Manual
Firmware Identification (FID) Number Summary of Revisions
Date Code
➤ Increased the number of available display points to 192.

➤ Increased the number of available local and remote bits to 64.
➤ Increased the number of available DNP binary output points to 160.
➤ Improved received GOOSE message processing speed for relay virtual
bits mapped to GOOSE binary data.
➤ Added support for the IEC 61850 Local/Remote control feature
defined in the IEC 61850-7-4 standard.
➤ Enhanced IEC 61850 processing to indicate when the invalid quality
attribute is set in received GOOSE messages.
➤ Added SELOGIC variable SC850SM to change the IEC 61850 simula-
tion mode of the relay.
➤ Corrected an issue where the Mode, Beh, and Health quality.validity =
good is not maintained when Mode = OFF.
➤ Added IEC 61850 simulation mode indication to the STA and GOO
commands.
SEL-400G-R100-V3-Z001001-D20210625 Includes all the functions of SEL-400G-R100-V2-Z001001-D20201009 20210625
SEL-400G-1-R100-V3-Z001001-D20210625 and SEL-400G-1-R100-V2-Z001001-D20201009 with the following
addition:
➤ Modified firmware to improve the security of the phase distance ele-
ment when configured with zero time delay.
SEL-400G-R100-V2-Z001001-D20201009 Includes all the functions of SEL-400G-R100-V1-Z001001-D20200518 and 20201009
SEL-400G-1-R100-V2-Z001001-D20201009 SEL-400G-1-R100-V1-Z001001-D20200518 with the following additions:
➤ Enhanced output contact behavior following a power cycle while the
relay is in IEC 61850 “Blocked” or “Test/Blocked” operating mode.
➤ Resolved an extremely rare issue that could cause the relay to perform
a diagnostic restart when configured for Parallel Redundancy Protocol
(NETMODE = PRP) and the relay received abnormal Ethernet traffic.
SEL-400G-R100-V1-Z001001-D20200518 ➤ Initial version. 20200518
SEL-400G-1-R100-V1-Z001001-D20200518
SELBOOT
SELBOOT is a firmware package inside the relay that handles hardware initializa-
NOTE: All revisions of SELBOOT listed
in this table are compatible with all tion and provides the functions needed to support firmware upgrades. Table A.2
versions of firmware available for this lists the SELBOOT releases used with the SEL-400G, their revision and a descrip-
relay.
tion of modifications. The most recent SELBOOT revision is listed first.
Table A.2 SELBOOT Revision History
SELBOOT Firmware Identification (BFID) Summary of Revisions
SLBT-4XX-R300-V0-Z001002-D20200229 ➤ First revision used with SEL-400G.

A.4 Firmware, ICD File, and Manual Versions
ICD File
ICD File
To find the ICD revision number in your relay, view the configVersion by using
the serial port ID command. The configVersion is the last item displayed in the
information returned from the ID command.
configVersion = ICD-400G-R202-V0-Z306005-D20150421
The ICD revision number is after the R (e.g., 202) and the release date is after the
D (e.g., 20150421). This revision number is not related to the relay firmware
revision number. The configVersion revision displays the ICD file version used to
create the CID file that is loaded in the relay.
The configVersion contains other useful information. The Z-number consists of
NOTE: The Z-number representation
is implemented with ClassFileVersion six digits. The first three digits following the Z represent the minimum IED firm-
005. Previous ClassFileVersions do ware required to be used with the ICD (e.g., 306). The second three digits repre-
not provide an informative Z-number.
sent the ICD ClassFileVersion (e.g., 005). The ClassFileVersion increments when
there is a major addition or change to the IEC 61850 implementation of the relay.
NOTE: The instance number n for Table A.3 list the ICD file versions, a description of modifications, and the
the I/O board logical nodes (INxGGIOn
and OUTxGGIOn) may vary between instruction manual date code that corresponds to the versions. The most recent
relays and ClassFileVersions. version is listed first.
Table A.3 ICD File Revision History
Minimum
ClassFile Manual
configVersiona Summary of Revisions Relay
Version Date Code
Firmware
ICD-400G-R101-V0-Z101006-D20201204 ➤ Added PRBGGIO logical nodes to support R101 006 20210514

pulsing remote bits.
➤ Corrected the IEC 61850 Data Object number
extensions according to the Ed 2 number
usage.
➤ Added support for the IEC 61850 Functional
Naming feature.
➤ Added the IEC 61850 LTRK logical node for
service tracking.
➤ Added new LBGGIO logical nodes for local
bits 33–64.
➤ Added new RBGGIO logical nodes for
remote bits 33–64.
➤ Added FltTyp and FltCaus data attributes to
the FLTRDRE logical node.
ICD-400G-R100-V0-Z100006-D20200430 ➤ SEL-400G ICD file for firmware R100 or higher. R100 006 20200401
configVersion Details:
ICD-[PN]-R[RN]-V[VS]-Z[FC]-D[RD] where:
[PN] = Product name (e.g., 487E-5S)
[RN]b = Revision number (e.g., 001)
[VS] = Version specifications (e.g., 0)
[FC]c = Minimum relay firmware and class file version (e.g., 400)
[RD] = Release date code (e.g., 20180910)
a
The configVersion can be determined for the IED by performing an ID ASCII command from a terminal connection.
b This is the ICD file revision number, not IED firmware revision number.
c
FC consists of six digits. The first three following the Z represent the minimum IED firmware required to be used with the ICD (e.g., 516). The
second three represent the ICD ClassFileVersion (e.g., 006).

Firmware, ICD File, and Manual Versions A.5
Instruction Manual
Instruction Manual
The date code at the bottom of each page of this manual reflects the creation or
revision date.
Table A.4 lists the instruction manual versions and revision descriptions. The
most recent instruction manual version is listed first.
Table A.4 Instruction Manual Revision History
Revision Date Summary of Revisions
20210708 Section 1
➤ Updated Specifications.
20210625 Section 1
Appendix A
➤ Updated for firmware versions R100-V3 and R101-V1.
20210514 Section 1
➤ Updated Table 1.3: SEL-400G Relay Characteristics.
Section 5
➤ Updated Internal Fault Detection Logic.
➤ Updated Figure 5.40: Overall Logic For an In-Zone Transformer and Figure 5.52: REF Element Trip Output.
➤ Updated Discussion on CT Connection Compensation and Torque Control,
Section 7
➤ Updated Differential Meter.
Section 10
➤ Updated Table 10.5: SEL-400G Database Structure—TARGET Region, Table 10.11: SEL-400G Binary Output
Reference Data Map, Table 10.15: SEL-400G Object 12 Control Point Operations, Table 10.22: Logical Device:
PRO (Protection), and Table 10.23: Logical Device: MET (Metering).
➤ Added Table 10.25: FLTYPE—Fault Type and Table 10.26: FLTCAUS—Fault Cause.
➤ Updated Table 10.42: 01h, 05h, 0Fh SEL-400G Output Coils and Table 10.52: Modbus Analog Quantities Table.
Section 11
➤ Updated Table 11.1: Alphabetical List of Relay Word Bits and Table 11.2: Row List of Relay Word Bits.
Section 12
➤ Updated Table 12.1: Analog Quantities Sorted Alphabetically and Table 12.2: Analog Quantities Sorted by Func-
tion.
Appendix A
➤ Updated for firmware version R101-V0.
➤ Updated for ICD version R101-V0.
20201204 Preface
➤ Updated SEL-400 Series Relays Instruction Manual and Safety Marks.
20201009 Appendix A
➤ Updated for firmware version R100-V2.
20200518 Section 5
➤ Updated Table 5.8: Power System Data Settings.
➤ Update Setting Guidelines for the 64G2 Third-Harmonic Element (Differential Mode).
➤ Added Figure 5.72: Example of 64G2 Undervoltage Setting From Survey Data.
20200401 ➤ Initial version.

Instruction Manual
Commanda, b Description
2ACCESS Go to Access Level 2 (full control)

81A Display frequency accumulated time report; load/reset data
89CLOSE k Close Disconnect k (Isolator k) (k = 1–10)
89OPEN k Open Disconnect k (Isolator k) (k = 1–10)
AACCESS Go to Access Level A (automation configuration)
ACCESS Go to Access Level 1 (monitor relay)
BACCESS Go to Access Level B (monitor and control circuit breakers)
BNAME ASCII names of Fast Meter status bits
BREAKER n Display circuit breaker reports; preload/reset monitor data (n = S, T, U, Y)
CASCII Generate the Compressed ASCII response configuration message
CBREAKER Display Compressed ASCII breaker status report
CHISTORY Display Compressed ASCII history report
CLOSE n Close Circuit Breaker n (n = S, T, U, Y)
COM c Display Channel c MIRRORED BITS communications data (c = A, B, or M [either enabled single channel])
COM PTP Display a report on PTP data sets and statistics
COM RTC Display statistics for synchrophasor client channels
CONTROL nn Set, clear, or pulse Remote Bit nn (nn = 01–32)
COPY m n Copy settings between instances in the same class (m and n are instance numbers; e.g., m = 1 is Group 1, n = 2
is Group 2, etc.)
CPR Display Compressed ASCII signal profiling report
CSER Display Compressed ASCII sequential events report
CSTATUS Display Compressed ASCII relay status report
CSUMMARY Display Compressed ASCII summary event report
DATE Display and set the relay date
DNAME X ASCII names of all relay digital points reported via Fast Meter
ETHERNET Displays Ethernet port (Port 5) configuration and status
EXIT Reduce access level to Access Level 0 (exit relay control)
FILE Transfer files between the relay and external software
GOOSE Displays transmit and receive GOOSE messaging information
GROUP Display the active group number or change the active group
HELP List and describe available commands at each access level
HISTORY View event summaries/history; clear event summary data
ID Display the firmware ID, user ID, device code, part number, and configuration information
LOOPBACK Connect MIRRORED BITS data from transmit to receive on the same port
MAC Display MAC Addresses
MAP 1 View the relay database organization
METER Display metering data and internal relay operating variables
OACCESS Go to Access Level O (output configuration)

2 SEL-400G Relay Command Summary
OPEN n Open Circuit Breaker n (n = S, T, U, Y)

PACCESS Go to Access Level P (protection configuration)
PASSWORD n Change relay password for Access Level n
PING addr Sends an ICMP echo request message to the provided IP address addr to confirm connectivity
PORT p Connect to remote devices via MIRRORED BITS virtual terminal (for Port p; where p = 1–3, F)
PROFILE Display signal profile records
PULSE OUTnnn Pulse a relay control output (OUTnnn is a control output)
QUIT Reduce access level to Access Level 0 (exit relay control)
RTC Display configuration of received remote synchrophasors
SER View Sequential Events Recorder (SER) report
SET Set or modify relay settings
SHOW Display relay settings
SNS Display Sequential Events Recorder settings name strings (Fast SER)
STATUS Display or clear relay status and SELOGIC control equation errors
SUMMARY Display a summary event report
TARGET Display relay elements for a row in the Relay Word bit table
TEST DB Test interfaces to a virtual device database used by Fast Message protocol
TEST DB2 Test all communications protocols except Fast Message
TEST FM Display or place values in Fast Meter interface
THE Display transformer thermal information
TIME Display and set the relay time clock
TRIGGER Initiate a data capture and record an event report
VERSION Display the relay hardware and software configuration
VIEW 1 View data from the Fast Message database
a See Section 9: ASCII Command Reference for more information.
b For help on a specific command, type HELP [command] <Enter> at an ASCII terminal communicating with the relay.

Instruction Manual
2ACCESS Go to Access Level 2 (full control)

81A Display frequency accumulated time report; load/reset data
89CLOSE k Close Disconnect k (Isolator k) (k = 1–10)
89OPEN k Open Disconnect k (Isolator k) (k = 1–10)
AACCESS Go to Access Level A (automation configuration)
ACCESS Go to Access Level 1 (monitor relay)
BACCESS Go to Access Level B (monitor and control circuit breakers)
BNAME ASCII names of Fast Meter status bits
BREAKER n Display circuit breaker reports; preload/reset monitor data (n = S, T, U, Y)
CASCII Generate the Compressed ASCII response configuration message
CBREAKER Display Compressed ASCII breaker status report
CHISTORY Display Compressed ASCII history report
CLOSE n Close Circuit Breaker n (n = S, T, U, Y)
COM c Display Channel c MIRRORED BITS communications data (c = A, B, or M [either enabled single channel])
COM PTP Display a report on PTP data sets and statistics
COM RTC Display statistics for synchrophasor client channels
CONTROL nn Set, clear, or pulse Remote Bit nn (nn = 01–32)
COPY m n Copy settings between instances in the same class (m and n are instance numbers; e.g., m = 1 is Group 1, n = 2
is Group 2, etc.)
CPR Display Compressed ASCII signal profiling report
CSER Display Compressed ASCII sequential events report
CSTATUS Display Compressed ASCII relay status report
CSUMMARY Display Compressed ASCII summary event report
DATE Display and set the relay date
DNAME X ASCII names of all relay digital points reported via Fast Meter
ETHERNET Displays Ethernet port (Port 5) configuration and status
EXIT Reduce access level to Access Level 0 (exit relay control)
FILE Transfer files between the relay and external software
GOOSE Displays transmit and receive GOOSE messaging information
GROUP Display the active group number or change the active group
HELP List and describe available commands at each access level
HISTORY View event summaries/history; clear event summary data
ID Display the firmware ID, user ID, device code, part number, and configuration information
LOOPBACK Connect MIRRORED BITS data from transmit to receive on the same port
MAC Display MAC Addresses
MAP 1 View the relay database organization
METER Display metering data and internal relay operating variables
OACCESS Go to Access Level O (output configuration)

2 SEL-400G Relay Command Summary
OPEN n Open Circuit Breaker n (n = S, T, U, Y)

PACCESS Go to Access Level P (protection configuration)
PASSWORD n Change relay password for Access Level n
PING addr Sends an ICMP echo request message to the provided IP address addr to confirm connectivity
PORT p Connect to remote devices via MIRRORED BITS virtual terminal (for Port p; where p = 1–3, F)
PROFILE Display signal profile records
PULSE OUTnnn Pulse a relay control output (OUTnnn is a control output)
QUIT Reduce access level to Access Level 0 (exit relay control)
RTC Display configuration of received remote synchrophasors
SER View Sequential Events Recorder (SER) report
SET Set or modify relay settings
SHOW Display relay settings
SNS Display Sequential Events Recorder settings name strings (Fast SER)
STATUS Display or clear relay status and SELOGIC control equation errors
SUMMARY Display a summary event report
TARGET Display relay elements for a row in the Relay Word bit table
TEST DB Test interfaces to a virtual device database used by Fast Message protocol
TEST DB2 Test all communications protocols except Fast Message
TEST FM Display or place values in Fast Meter interface
THE Display transformer thermal information
TIME Display and set the relay time clock
TRIGGER Initiate a data capture and record an event report
VERSION Display the relay hardware and software configuration
VIEW 1 View data from the Fast Message database
a See Section 9: ASCII Command Reference for more information.
b For help on a specific command, type HELP [command] <Enter> at an ASCII terminal communicating with the relay.

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SEL-400G Relay

SEL-400G Relay Instruction Manual Date Code 20210708

Section 1: Introduction and Specifications

Section 4: Front-Panel Operations

Section 5: Protection Functions

Date Code 20210708 Instruction Manual SEL-400G Relay

Capability-Based Loss of Field...........................................................................................................................5.80

Section 6: Protection Application Examples

Section 7: Metering, Monitoring, and Reporting

SEL-400G Relay Instruction Manual Date Code 20210708

Section 9: ASCII Command Reference

Section 10: Communications Interfaces

Section 11: Relay Word Bits

Section 12: Analog Quantities

SEL-400G Relay Command Summary

Date Code 20210708 Instruction Manual SEL-400G Relay

Table 1.2 Interface Board Information ......................................................................................................1.12

Date Code 20210708 Instruction Manual SEL-400G Relay

Table 3.36 Output Configuration.................................................................................................................3.46

SEL-400G Relay Instruction Manual Date Code 20210708

Table 5.49 Voltage-Restrained Time-Overcurrent Settings ......................................................................5.125

Date Code 20210708 Instruction Manual SEL-400G Relay

Table 8.18 Access Control.............................................................................................................................8.7

SEL-400G Relay Instruction Manual Date Code 20210708

Table 8.76 Demand Metering Elements 1–10 .............................................................................................8.28

Date Code 20210708 Instruction Manual SEL-400G Relay

Table 10.35 02h SEL-400G Inputs ..............................................................................................................10.63

SEL-400G Relay Instruction Manual Date Code 20210708

Figure 1.2 Functional Overview ...................................................................................................................1.5

Date Code 20210708 Instruction Manual SEL-400G Relay

Figure 3.5 User-Defined V/Hz Curve 1 ........................................................................................................3.5

SEL-400G Relay Instruction Manual Date Code 20210708

Date Code 20210708 Instruction Manual SEL-400G Relay

Figure 5.59 Autotransformer REF With Two-HV CTs ................................................................................5.58

SEL-400G Relay Instruction Manual Date Code 20210708

Figure 5.114 Three-Point Curve ...................................................................................................................5.111

Date Code 20210708 Instruction Manual SEL-400G Relay

Figure 5.168 Pulse Counter Logic ................................................................................................................5.163

SEL-400G Relay Instruction Manual Date Code 20210708

Figure 5.222 Negative-Sequence Directional Logic.....................................................................................5.217

Date Code 20210708 Instruction Manual SEL-400G Relay

SEL-400G Instruction Manual

Date Code 20210708 Instruction Manual SEL-400G Relay

Section 10: Communications Interfaces. Describes the SEL-400G specific

SEL-400 Series Relays Instruction Manual

SEL-400G Relay Instruction Manual Date Code 20210708

Date Code 20210708 Instruction Manual SEL-400G Relay

Earth (ground) Terre

Protective earth (ground) Terre de protection

Direct current Courant continu

Alternating current Courant alternatif

Both direct and alternating current Courant continu et alternatif

Instruction manual Manuel d’instructions

SEL-400G Relay Instruction Manual Date Code 20210708

General Safety Marks

Other Safety Marks (Sheet 1 of 2)

Date Code 20210708 Instruction Manual SEL-400G Relay

Other Safety Marks (Sheet 2 of 2)

SEL-400G Relay Instruction Manual Date Code 20210708

STATUS Commands, command options, and command variables typed at a