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    Ane-Vaushali. V: Suject Code E 3261

    Uploaded by

    Varatha Raj
    This document contains circuit diagrams and truth tables for basic logic gates - NOT, XOR, and EX-OR gates. It summarizes the theory of operation for each gate, showing how a NOT gate inverts the input signal, and how an XOR gate outputs 1 only when the two inputs are different. It also provides the procedure for connecting the gates in a circuit to verify their truth tables experimentally.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Ane-Vaushali. V: Suject Code E 3261

    Uploaded by

    Varatha Raj
    62 views5 pages
    This document contains circuit diagrams and truth tables for basic logic gates - NOT, XOR, and EX-OR gates. It summarizes the theory of operation for each gate, showing how a NOT gate inverts the input signal, and how an XOR gate outputs 1 only when the two inputs are different. It also provides the procedure for connecting the gates in a circuit to verify their truth tables experimentally.

    Original Title

    820620121034-GE8251

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    This document contains circuit diagrams and truth tables for basic logic gates - NOT, XOR, and EX-OR gates. It summarizes the theory of operation for each gate, showing how a NOT gate inverts the input signal, and how an XOR gate outputs 1 only when the two inputs are different. It also provides the procedure for connecting the gates in a circuit to verify their truth tables experimentally.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    62 views5 pages

    Ane-Vaushali. V: Suject Code E 3261

    Uploaded by

    Varatha Raj
    This document contains circuit diagrams and truth tables for basic logic gates - NOT, XOR, and EX-OR gates. It summarizes the theory of operation for each gate, showing how a NOT gate inverts the input signal, and how an XOR gate outputs 1 only when the two inputs are different. It also provides the procedure for connecting the gates in a circuit to verify their truth tables experimentally.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

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    DBEEEEET UIND

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    A B
    YAOB

    2
    3
    the tou th foble of BXOR gol and yot gaui
    3Vont
    e poi'nentculy.

    Afm
    TO Veif the Houth toble of boslc legfe geut of
    AD , NO, PAJD.. ExOR and NOT gate.

    APPARATUS REQUIRED

    Name off tho


    S N O

    APParat Us Rorge uanfit


    1. Dgted Te faine bit

    Ex -0P godu TC 74 86

    NOT 9 a Icuol 4

    Conneting wines AS vIequlored

    THEOPy
    A) NOT 9ala

    A NOT 9ati s the phusiccl Ocali zeion 0 the


    Complement fon opeciatHon. Tt fs an electronle cfncuit whfh

    3eneaan outpt Signal Wheih s the oieverise of the


    input Stgnol. A NOT gal fs also Known os an mveote

    be.ccuuse fnvevz he inptut


    NOT O1ATE

    LCUIC DICAm

    YA

    Pt DIA01eAm oF 1C 4ol4-
    CIRCorT DIAURAm

    Lo
    5V

    LED

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    TRUTH TPBLE
    S N INPUT OUT PUT
    A
    Y:A
    O
    2
    B) EX-OR gode:

    An Ev-0R geti pofovms he follouing Boolean funtlon-A


    B(AB)+CAB) TH is msîmil oR get excluods The
    Combinotion of tha A and b be
    fng cqual 1o one Tho
    exclusive OR Is a
    functlon thatt give an out pou Slgred b
    when te tuwo nput Senals aue equal oi fhen ooY .

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    ) Foei cll th
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    th
    S
    Pin
    giver 5V Supplay
    9 PPPl he nputs on venify the Yath table
    fo cul qeua

    Result
    Tho foru th Hable of all tho basic loqic
    qal wee Vo Pfie d

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