J LT1524/1T3524 Un C} \R $G1524/8G3524 TECHNOLOGY Regulating Pulse Width Modulator NOT RECOMMENDED FOR NEW DESIGNS DESCRIPTION Contact Linear Technology for Potential Replacement ~The LT1524 PWM switching regulator contro circuit con- tains all the essential circuitry to implement single-ended FEATURES or push-pull switching regulators. Included on the circuit ™ Guaranteed + 2% Reference Tolerance Guaranteed + 6% Oscillator Tolerance ™ Guaranteed 10mV/ 1000 Hrs Long Term Stability = Interchangeable with all SG1524 or LM1524 Devices = Operates Above 100kHz APPLICATIONS = Switching Power Supplies = Motor Speed Control = Off-Line Power Converters are oscilator, voltage reference, a pulse width modulator, error amplifier, overload protection circuitry and output drivers. Although pinfor-pin and functionally compatible with industry standard 1524 and 3524 devices, Linear Technology has incorporated several improvements in the design of the LT1524, A subsurface zener reference has been used to provide excellent stability with time and the reference is trimmed at the wafer level to provide an initial accuracy of 2%, Additionally, the osciator is trimmed to provide a maximum tolerance of 6%. LUnear Technology Corporation's advanced processing, design and passivation techniques make the LT1524 and T3524 a superior and more reliable choice over previous devices. 5, 1 Amp Regulator Distribution of Reference Output Vottage t 5 Agr ass so) 50) 808 ‘ur ce 6 5-851T1524/LT3524 $G1524/SG3524 ABSOLUTE MAXIMUM RATINGS Input Voltage Reference Output Current . 50mA Output Current (Each Output) 400mA Oscillator Charging Current (Pin 6 0r7) . 5mA Internal Power Dissipation (Note 1) . Ww Operating Temperature Range LT1524/SG1524 ...... —55°Cto +125°C 173524/S63524 222... O°Cto +70°C Storage Temperature Range. ..... —65°Cto +150°C Lead Temperature (Soldering, 10sec.)........ 300°C PACKAGE/ORDER INFORMATION roe vew Tg ww wer [ver mest vw osc ovreur 3] Fajeurrer2 sot sense] f}couecron2 ~c.sese [2] Fe couscron + nB [Fenrir af] Fi swurocwn oof] [3 conrenssnon aoe sPnnemenc Nerouse spn nastc ORDER PART NUMBER U1524) 173524) L73524N, SG1524) SG3524) ‘SG3524N ELECTRICAL CHARACTERISTICS (note 2) manameTER conomions wars Fa ata Tapa ‘ The pao at Load Regulation mv Ripple Rejection 4B Sa Cal Gaal at Tapes Say : ia Tam Sy ai ean ‘Maximum Frequency Cy =0.001pF, Ry= 2k 300 300 kHz Initial Accuracy Rrand Cy Constant 5 % Votan Sy We=Vb0o i + Tepe Sy z 3 % Output Amplitude 35 a5 v hip Paka a rm 0 = ErcknpiorSacton pu Oe Voape oss av Input Bias Current 2 10 oA pronouns ae Coronildsakae if % 7 Connor tin al 7 Seal Spal anh aa 3 ite aaa E zs 7 5-86 AT WELT1524/LT3524 $G1524/SG3524 ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS a ee eee | a Comparator Sct ‘Minimum Duty Cych ° o 0 % ‘Maximum Duty Cycle . 5 ao 45 4 % Input Threshold Zero Duty Cycle * 1 1 v rapt Tesi ax Duty Gye ° 35 ss v Input Bias Current ° 50) 1 a arent Lining Seen: “sense Votage ] _Pin9=2VwihEnor Api m am 20 1 am 20 ow Setforax Out Sense Vorage TE . @ @ avr Conon Mode Voge ofa i =7 7 v ach Output) er Votage | «0 « y Collector Leakage Current . or oa wa Satutonotage : leas 12 v Emir Out Votage ei anerrie Tw v Fise Tie 02 02 S FalTine a1 a1 8 Tal Sony Coren Wat aie . ¢ 0 aan mA ELECTRICAL CHARACTERISTICS (wots 2) PARAMETER CONDITIONS un ay | UMTS ‘Relerence Section: ua Vatage te 5064 v ine Relation Wo=evio«T 0% a oad Feguaton TnAIo nA 2s ou Ripple Rejection 120Hz 6 8 Shor Gel Coren Lin = o mA Teper Ssity 034 % Long Tem tabiy 2 wr ecilatr Section: arin Fegan C12 000%F, 22 . ~ wiz al acercy Fyand; Constant 5 % Votane Sabi Wa=8V 0407 i % Temperate aby noted . z z % Output Anois Find rg 3 v Out Pus Wah r= 00 TO 05 as = Vou =25¥ e te 2 10 mv ‘Input Bias Current Vou=2.5V e 05 2 10 A (Open Loop Votupe Gan Oa) a # e Conan Mode Votage 1 8 ut v Common-Mode Rejection Ratio Oe 70 eB Smal Signal arcwith a 3 a Whe OuiutVotane a | as a v AT WERLT1524/LT3524 $G1524/SG3524 ELECTRICAL CHARACTERISTICS PARAMETER ‘coNomONS oom wan ae ay | UNITS Comparator Section: Minimum Duty Gyle . 0 o % Maximum Duty Oyle ° a) % Input Tveshold Zero Duty Ove ° 1 v Input Threshold MaxDuty Oye ° 35 v Input Bias Curent ° 1 ny Pin = 2¥ with Error Amplifier a e) aw SetforMax Out Sense VortageT.G. . a ave Common Mode Voiage ° =i 7 v Output Section: (Each Cutpu) Collector miter Volage «| « “ v Collector Leakage Curent ° er) a A Saturation Vliage ° fiemene 12 v miter Output Votage Ca) 7 6 v Rise Time 02 02 a FalTime a a 8 {otal Standby Curent Wu=40V (Noted) . 30 30 mA The @ denotes specications that apply over the fll operating Note 3: Athough many manufacturers specty a maximum specication temperature range. of 2%, Linear Technology's experience i tha ths specification is not ‘The shaded eecical specications indicate those parameters which bring prsenty mat by ther manufacturers. Liner Technoogy’s basle have been improved or quaanteed test its provided forthe fist time. sign although improved, is essentially identical to other manufac Nata 1: For operating at elevated temperatures, the device inthe J turers” devices. Linear Technology is, however, unwling to place a package must be derated at 100°C/W toa maximum junction maximum specication on ts datasheet which cannat be met or temperature ot 150°C, while the device inthe N packages derated at guaraioed. 180°6/W toa maximum junction temperature of 115°C. Note 4: Standby curent does nat ince the estar charging current, Nata 2: These specieatons app or Vy =20, '=20kKe.T4=es°o TOC and cureniit cers, andthe cups ar open ecu unless otherwise noted, TEST CIRCUIT ‘ 5-88 OT weeLT1524/LT3524 $G1524/SG3524 TYPICAL PERFORMANCE CHARACTERISTICS Error Amplifier Gain Output Dead Time 0 Oscillator Period Tree aT 4 1 o] LCs =0 002uFy a eran z ao z Eo e cb Ermacearil erm tote 4 0100 koe oor won “Seor moe og om 0 v2 $ 9a 0 wa m & Feuer or CreCACTANCE GF) ‘SCLLATO FERED Ya) Output Transistor Saturation Output Transistor Emittor Oscillator Frequency vs Timing Voltage Voltage Resistance 2s 0 w om 520 5 F 5 Eom 3g Ens FS Zis 2 Bam : g Em Bo | Bre 5 « zg a 5 i i) i an Bos log, g TTT TT | “CE 7 ° L 0 cn mm 0 wT wo ws “5-9-0 sos ws 2 4 70» © wm "AMET TWPHRTURE *-AMBEKT TEMPERATURE CO) Ar-HESSINE 0) Current Limit Sense Voltage Standby Current Duty Cycle (Ve 4—Vewn 5) s0-——+ © = Taare A (Van eV = 7 Tout ner = Oma ce fo Vain 9m 2.00 . © i =m z = 2 Za Bm Boob + z : zm Bmlo 5 s + ” 1 a0 | Q 1 ss » sw sw 1 us 2 as 3354 “0-0 2S oo 1S Ww US Ve INPUT VOLTAGE (1) VOLTA om 9 (¥) TEMPERATURE (0) LI WEAR 5-89LT1524/LT3524 $G1524/SG3524 APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION AND PIN FUNCTIONS Voltage Regulator The internal SV regulator (input pin 15, output pin 16) supplies a regulated 5V to all internal circutry, as well as up to 50mA for external circuitry, For operation below 8V input, pins 15 and 16 may be tied together and 5V to 6V externally applied. Oscillator The internal oscillator circuitry sets the frequency of ‘operation forthe switching regulator. The oscillator wave form is a ramp from about 1V to 3.5V (pin 7). Frequency is set by a timing resistor from pin 6 to ground and a capacitor from pin 7 to ground. The oscillator period is ap- proximately RC for the recommended range of 1.8k to 100k for R and 0.001pF to 0. 1nF for C. The fal time of the ramp sets the blanking or dead time where both outputs are off in push-pull regulators. This is Controlled by the value of the capacitor alone. Output Transistors ~ The two output transistors have both the emitters (pins 11 and 14) and the collectors availabe (pins 12 and 13). Inter- ral current limiting for both of these transistors is about 100mA. The two transistors are driven 180° out of phase by the flip-flop. For single-ended operation they should be con- nected in parallel. Error Amplifier The differential input (pins 1 and 2) single-ended output (pin 9) transconductance ampifier provides about 80dB af gain, as well as providing a point for oop frequency compensation or electronic shutdown. DC gain of the loop can be controlled by resistive loading, while AC compensation is usually accomplished with a series R-C connected from pin 9 to ground. The output impedance at pin 9 is about 5MQ and current is about 200yA, so external op-amps or voltage sources can easily drive the comparator input. Normally, the 5V reference is divided down to generate a voltage within the common- ‘mode range of the error amplifier. Synchronous Operation When an external clock is desired, a clock pulse of ap- proximately 3V can be applied directly to the oscillator output, pin 3. The impedance to ground at this point is approximately 2kQ. In this configuration, Rr Cr must be selected fora clock period slightly greater than that of the external clock, If two or more LT1524 regulators are to be operated syn- chronously all oscillator output terminals should be tied together. The oscilator programmed for the minimum clock petiod will be the master from which all the other LT1524s operate. In this application, the Cr Rr values of the slaved regulators must be set for a period approx- imately 10% longer than that of the master regulator. In addition, Cr (master) =2 Cr (slave) to ensure that the master output pulse, which occurs first, has a wider pulse width and will subsequently reset the slave regulators. A logic high at pin 10 will shut down the regulator and cause both output transistors to turn off. Current Limit Current limiting is activated when the voltage between pins 4 and 5 exceeds 200m. The output of the current limit amplifier internally sums with the error amplifier to shorten the output pulse width, The gain of the current limit circuitry is relatively low, so current control inlimitis typically about 5%. Two areas of caution should be observed with current limiting. First, the response time of the current limit is set by the loop roll-off on pin 9. Fast current limiting requires external circuitry. Second, the common-mode range of the current limit amplifier is im- ited. Even fast spikes outside this range can disrupt operation. 5-90 DO WereLT1§24/LT3524 $G1524/SG3524 SCHEMATIC DIAGRAMLT1524/LT3524 $G1524/SG3524 BLOCK DIAGRAM PACKAGE DESCRIPTION J Package 16 Lead Ceramic DIP Tw [On] 8x0 THT Tgp. . ‘i guise T isoxc | soorcrw | aorcrw uae ase Tso | soorcrw | aorcrw N Packago 16 Lead Plastic DIP Tum | en | ox Tatar essen siseo | swoccrw | soecrw 5-92