DC-AC Converter

Chapter 6
DC to AC Converter
Inverter
2 Introduction
 DC-to-AC converters are known as inverters. Thefunction

of an inverter is to change a dc input voltage to a
symmetric ac output voltage of desired magnitude and
frequency.
The output voltage could be fixed or variable at a fixed or
variable frequency.
Abraham LOMI, Dr. Eng., Prof

3 Introduction
 A variable output voltage can be obtained by varying the

input dc voltage and maintaining the gain of the inverter
constant.
 On the other hand, if the dc input voltage is fixed and
and it is not controllable, a variable output voltage can be
obtained by varying the gain of the inverter, which is
normally accomplished by pulse-width-modulation
(PWM) control within the inverter.

4 Introduction
 The inverter gain may be defined as the ratio of the ac

output voltage to dc input voltage.
The output voltage waveforms of ideal inverters should be
sinusoidal. However, the waveforms of practical inverters
are non-sinusoidal and contain certain harmonics.

5 Introduction
 For low- and medium-power applications, square-wave

or quasi-square-wave voltages may be acceptable; for
high-power applications, low distorted sinusoidal
waveforms are required.
With the availability of high-speed power semiconductor
devices, the harmonic contents of output voltage can be
minimized or reduced significantly by switching
techniques.

6 Introduction
 Inverters are widely used in industrial applications (e.g.,

variable-speed ac motor drives, renewable energy,
transportation, induction heating, standby power
supplies, and uninterruptible power supplies).
 The input may be a battery, fuel cell, solar cell, or other
dc source. The typical single-phase outputs are (1) 120 V
at 60 Hz, (2) 220 V at 50 Hz, and (3) 115 V at 400 Hz.

7 Introduction
 For high-power three-phase systems, typical outputs are

(1) 220 to 380 V at 50 Hz, (2) 120 to 208 V at 60 Hz, and
(3) 115 to 200 V at 400 Hz.

8 Introduction
 Inverters can be broadly classified into two types:

(1) single-phase inverters and
(2) three-phase inverters.
Each type can use controlled turn-on and turn-off devices
(e.g., bipolar junction transistors [BJTs], metal oxide
semiconductor field-effect transistors[MOSFETs], insulated-
gate bipolar transistors [IGBTs], metal oxide semiconductor-
controlled thyristors [MCTs], static induction transistors,
[SITs], and gate-turn-off thyristors[GTOs]).
9 Introduction
 Inverters can be broadly classified into two types: (1)

single-phase inverters and (2) three-phase inverters.
Each type can use controlled turn-on and turn-off devices
(e.g., bipolar junction transistors [BJTs], metal oxide
semiconductor field-effecttransistors [MOSFETs], insulated-
gate bipolar transistors [IGBTs],metaloxide semiconductor-
controlled thyristors [MCTs], static induction transistors,
[SITs], and gate-turn-off thyristors [GTOs]).

10 Introduction
 These inverters generally use PWM control signals for

producing an ac output voltage. An inverter is called
a voltage-fed inverter (VFI) if the input voltage remains
constant, a current-fed inverter (CFI) if the input current
is maintained constant, and a variable dc linked inverter
if the input voltage is controllable.

11 Introduction
 If the output voltage orcurrent of the inverter is forced to

pass through zero by creating an LC resonant circuit,
this type of inverter is called resonant-pulse inverter, and
it has wide applications in power electronics.

12 Performance Parameters
 The input voltage toan inverter is dc and the output

voltage (or current) is ac as shown in Fig. 6.1a. The
output should ideally be an ac of pure sine wave, but the
output voltage of a practical inverter contains harmonics
or ripples as shown in Fig. 6.1b.
 The inverter draws current from the dc input source only
when the inverter connects the load to the supply source
and the input current is not pure dc, but it contain
harmonics as shown in Fig. 6.1c.
 The quality of an inverter is normally evaluated in terms

of thefollowing performance parameters.
The output power is given by
where Vo and Io are the rms load voltage and load current,
 is the angle of the load impedance, and R is the load
resistance.
The ac input power of the inverter is
where VS and IS are the average input voltage and input current.
The rms ripple content of the input current is
where Ii and Is are the rms and average values of the dc supply
current.
The ripple factor of the input current is
The power efficiency, which is the ratio of the output power to the
input power, will depend on the switching losses, which in turn
depends on the switching frequency of the inverter.


Harmonic factor of nth harmonic (HFn). The harmonic factor

(of the nth harmonic), which is a measure of individual
harmonic contribution, is defined as
where Vo1 is the rms value of the fundamental component

and Von is the rms value of the nth harmonic component.

Total harmonic distortion (THD). The total harmonic

distortion, which is a measure of closeness in shape between
a waveform and its fundamental component, is defined as

Distortion factor (DF). THD gives the total harmonic content,

but it does not indicate the level of each harmonic component.
If a filter is used at the output of inverters, the higher order
harmonics would be attenuated more effectively.
Therefore, a knowledge of both the frequency and magnitude
of each harmonic is important. The DF indicates the amount of
HD that remains in a particular waveform after the harmonics
of that waveform have been subjected to a second-order
attenuation (i.e., divided by n2).
Thus, DF is a measure of effectiveness in reducing unwanted

harmonics without having to specify the values of a second-
order load filter and is defined as,

The DF of an individual (or nth) harmonic component is

defined as,
Lowest order harmonic (LOH). The LOH is that harmonic

component whose frequencyis closest to the fundamental
one, and its amplitude is greater than or equal to 3% of the
fundamental component.
22 Principle of Operation
 The principle of single-phase inverters can

be explained with Fig. 6.2a. The inverter
circuit consists of two choppers. When only
transistor Q1 is turned on for a time T0/2,
the instantaneous voltage across the load
v0 isVs/2. If only transistor Q2 is turned on
for a time T0/2, - Vs/2 appears across the
load. The logic circuit should be designed
such that Q1 and Q2 are not turned on at the
same time.
Figure 6.2. Single-phase half-bridge
inverter
 Figure 6.2b shows the waveforms

for the output voltage and
transistor currents with a resistive
load. It should be noted that the
phase shift is 1 = 0 for a resistive
load. This inverter requires a three-
wire dcsource, and when a
transistor is off, its reverse voltage
is Vs instead of Vs/2. This inverter
is known as a half-bridge inverter.
The root-mean-square (rms) output voltage can be found from,
The instantaneous output voltage can be expressed in Fourier series

as,

Due to the quarter-wave symmetry along the x-axis, both a0 and an

are zero.We get bn as
Which gives the instantaneous output voltage vo as

Where  = 2f0 is the frequency of output voltage in rads per second.

Due to the quarter-wave symmetry of the output voltage along the
x-axis, the even harmonics voltages are absent. For n = 1, Eq. (6.10)
gives the rms value of fundamental component as,
For an inductive load, the load current cannot change immediately

with the out-put voltage. If Q1 is turned off at t = T0/2, the load
current would continue to flow through D2, load, and the lower half
of the dc source until the current falls to zero. Similary, when Q2 is
turned off at t = T0, the load current flows through D1, load, and
the upper half of the dc source.
When diode D1 or D2 conducts, energy is

fed back to the dc source and these
diodes are known as feedback diodes.
Figure 6.2c shows the load current and
conduction intervals of devices for a
purely inductive load. It can be noticed
that for a purely inductive load, a
transistor conducts only for T0/4 (or
90°). Depending on the load impedance
angle, the conduction period of a
transistor would vary from 90° to 180°.
Any switching devices can replace the transistors. If to is the turn-off

time of a device, there must be a minimum delay time of td (= to)
between the outgoing device and triggering of the next incoming
device. Otherwise, short-circuit condition would resultthrough the
two devices. Therefore, the maximum conduction time of a device
would be tn(max) = To/2 - td. All practical devices require a certain
turn-on and turn-off time. For successful operation of inverters, the
logic circuit should take these into account.

For an RL load, the instantaneous load current i0 can be found by

dividingthe instantaneous output voltage by the load impedance Z
= R + jnL. Thus, we get
where n = tan-1(nL/R2). If I01 is the rms fundamental load

current, the fundamental output power (for n = 1) is
Note: In most applications (e.g., electric motor drives) the output

power due to the fundamental current is generally the useful
power, and the power due to harmonic currents is dissipated
as heat and increases the load temperature.
Dc supply current. Assuming a lossless inverter, the average

power absorbed by the load must be equal to the average
power supplied by the dc source. Thus, we can write

where T is the period of the ac output voltage. For an

inductive load and a relatively high switching frequency, the
load current io is nearly sinusoidal; therefore, only the
fundamental component of the ac output voltage provides
power to the load. Because the dc supply voltage remains
constant vs(t) = Vs, we can write,

where,
Vo1 is the fundamental rms output voltage;
Io is the rms load current;
1 is the load angle at the fundamental frequency.
Thus, the dc supply current Is can be simplified to

Gating sequence. The gating sequence for the switching

devices is as follows:
1. Generate a square-wave gating signal vg1 at an output
frequency fo1 and a 50% duty cycle. The gating signal vg2
should be a logic invert of vg1 .
2. Signal vg1 will drive switch Q1 through a gate-isolating
circuit, and vg2 can drive Q2 without any isolating circuit.

36 Example 6.1
Example 6.1 Finding the parameters of the single-phase half-Bridge Inverter

The single-phase half-bridge inverter in Fig. 6.2a has a resistive load of R = 2.4  and
the dc inputvoltage is Vs = 48 V. Determine
(a) the rms output voltage at the fundamental frequency Vo1
(b) the output power Po
(c) the average and peak currents of each transistor
(d) the peak reverse blocking voltage VBR of each transistor
(e) the average supply current Is
(f) the THD
(g) the DF, and
(h) the HF and LOH.

37
Solution Example 6.1

38 Single-Phase Bridge Inverters
A single-phase bridge voltage-source

inverter (VSI) is shown in Fig. 6.3a. It
consists of four choppers. When
transistors Q1 and Q2 are turned on
simultaneously, the input voltage Vs
appears across the load. If transistors
Q3 and Q4 are turned on at the same
time, the voltage across the load is
reversed and is -Vs.
Figure 6.3
Single-phase full-bridge inverter
The waveform for the output voltage

is shown in Fig. 6.3b. Table 6.1 shows
the five switch states. Transistors Q1,
Q4 in Fig. 6.3a act as the switching
devices S1 and S4, respectively. If two
switches: one upper and one lower
conduct at the same time such that
the output voltage is {Vs, the switch
state is 1, whereas if these switches
areoff at the same time, the switch
state is 0. Abraham LOMI, Dr. Eng., Prof

The rms output voltage can be found from,
Equation (6.10) can be extendedto express the instantaneous

output voltage ina Fourier series as,

And for n = 1, Eq. (6.16) gives the rms value of fundamental

component as,
Using Eq. (6.12), the instantaneous load current i0 for an RL load

becomes,

where n = tan-1(nL/R).
When diodes D1 and D2
conduct, the energy is fed back
to the dc source; thus, they are
known as feedback diodes.
Figure 6.3c shows the
waveform of load current for
an inductive load.

Dc supply current. Neglecting any losses, the instantaneous

power balance gives,
For inductive load and relatively high-switching frequencies,

the load current io and the output voltage may be assumed
sinusoidal. Because the dc supply voltage remains constant
vs(t) = Vs, we get
which can be simplified to find the dc supply current as,
where Vo1 is the fundamental rms output voltage

Io is the rms load current
1 is the load impedance angle at the fundamental
frequency.
Equation (6.19) indicates the presence of a second-order

harmonic of the same order of magnitude as the dc supply
current. This harmonicis injected back into the dc voltage
source. Thus, the design should consider this to guarantee a
nearly constant dc-link voltage.
A large capacitor is normally connected across the dc voltage
source and such a capacitor is costly and demands space;
both features are undesirable, especially in medium to high
power supplies.
47 Example 6-2
Example 6.2 Finding the parameters of the single-phase full-Bridge Inverter.

Repeat Example 6.1 for a single-phase bridge inverter in Fig. 6.3a.

48 Example 6-3
Example 6.3 Finding the Output Voltage and Current of a single-phase full-Bridge
Inverter with an RLC load.
The bridge inverter in Fig. 6.3a has an RLC load with R = 10 , L = 31.5 mH, and C =
112 F. The inverter frequency is f0 = 60 Hz and dc input voltage is Vs = 220 V.
(a) express the instantaneous load current in Fourier series. Calculate
(b) the rms load current at the fundamental frequency Io1
(c) the THD of the load current
(d) the power absorbed by the load P0 and the fundamental power P01
(e) the average current of dc supply Is, and
(f) the rms and peak current of each transistor
(g) Draw the waveform of fundamental load current and show the conduction
intervals of transistors and diodes. Calculate the conduction time of
(h) the transistors
(i) the diodes,
Abraham LOMI,and
Dr. Eng., Prof
(j) the effective load angle .

49 Solution of Example 6-3





Notes:
 To calculate the exactvalues of the peak current, the conduction time of transistors
and diodes, the instantaneous load current io(t) should be plotted as shown in Fig.
6.4. The conduction time of a transistor must satisfy the condition io (t = t0) = 0, and
a plot of io(t) by a computer program gives Ip = 21.14 A, t0 = 5694 s, and td = 2639
s.
 This example can be repeated to evaluate theperformance of an inverter with R,
RL, or RLC load with an appropriate change in load impedance ZL and load angle
n.

Notes:
 Gating sequence. The gating sequence for the switching devices is as follows:
1. Generatetwosquare-wave gating signals vg1 and vg2 at an output frequency fo
and a 50% duty cycle. The gating signals vg3 and vg4 should be the logic invert
of vg1 and vg2, respectively.
2. Signals vg1 and vg3 drive Q1 and Q3, respectively, through gate isolation circuits.
Signals vg2 and vg4 can drive Q2 and Q4, respectively, without any isolation
circuits.

56 Three-Phase Inverters
Three-phase inverters are normally used

for high-power applications. Three single-
phase half (or full)-bridge inverters can be
connected in parallel as shown in Fig. 6.5a
to form the configuration of a three-phase
inverter. The gating signals of single-phase
inverters should be advanced or delayed
by 120° with respect to each other to obtain
three-phase balanced (fundamental)
voltages.
Abraham LOMI, Dr. Eng., Prof Figure 6.5
Three-phase inverter formed by three single-phase inverters.
The transformer primary windings mustbe isolated from each

other, whereas the secondary windings may be connected in Y or
delta. The transformer secondary is normally connected in delta to
eliminate triplen harmonics (n = 3, 6, 9, …) appearing on the
output voltages and the circuit arrangement is shown in Fig. 6.5b.
This arrangement requires three single-phase transformers, 12
transistors, and 12 diodes. If the output voltages of single-phase
inverters are not perfectly balanced in magnitudes and phases, the
three-phase output voltages are unbalanced.

Figure 6.5b
Three-phase inverter formed by
three single-phase inverters.

A three-phase output can be obtained from a configuration of

six transistors and six diodes as shown in Fig. 6.6a. Two types
of control signals can be applied to the transistors: 180°
conduction or 120° conduction. The 180° conduction has
better utilization of the switches and is the preferred method.
This circuit topology is often known as a three-phase bridge
inverter and isused in many applications, including
renewable energy systems as shown in Fig. 6.6c.

Figure 6.6. Three-Phase Brigde Inverter

The rectifier converts the ac voltage of the wind generator to

a dc voltage and the voltage source inverter (VSI)converts the
dc voltage into three-phase ac voltages to match with ac grid
voltage and frequency.

62 180-Degree Conduction
Each transistor conducts for 180°. Three transistors remain on

at any instant of time. When transistor Q1 is switched on,
terminal a is connectedto the positive terminal of the dc input
voltage. When transistor Q4 is switched on, terminal a is
brought to the negative terminal of the dc source.There are
six modes of operation in a cycle and the duration of each
mode is 60°. The transistors are numbered in the sequence of
gating the transistors (e.g., 123, 234, 345, 456, 561, and 612).

The gating signals shown in Fig. 6.6b are shifted from each
other by 60° to obtain three-phase balanced (fundamental)
voltages.
The load may be connected in Y- or delta as shown in Fig.
6.7. The switches of any leg of the inverter (S1 and S4, S3 and
S6, or S5 and S2) cannot be switched on simultaneously; this
would result in a short circuit across the dc-link voltage
supply.

Similarly, to avoid
undefined states and thus
undefined ac output line
voltages, the switches of
any leg of the inverter
cannot be switched off
simultaneously; this can
result in voltages that
depend on the respective
line current polarity. Figure 6.7 Delta- and Y-connected load
Table 6.2 shows eight valid switch states. Transistors Q1, Q6 in

Fig. 6.5a act as the switching devices S1, S6, respectively. If
two switches: one upper and one lower conduct at the same
time such that the output voltage is {Vs, the switch state is 1,
whereas if these switches are off at the same time, the switch
state is 0. States 1 to 6 produce nonzero output voltages.
States 7 and 8 produce zero line voltages and the line
currents freewheel through either the upper or the lower
freewheeling diodes.

To generate a given voltage waveform, the inverter moves

from one state to another. Thus,the resulting ac output line
voltages are built up of discrete values of voltages of Vs, 0,
and -Vs. To generate the given waveform, the selection of the
states is usually done by a modulating technique that should
assure the use of only the valid states.

 For a delta-connected load, the phase

currents can be obtained directly
from the line-to-line voltages. Once
the phase currents are known, the
line currents can be determined
 For a Y-connected load, the line-to-
neutral voltages must be determined
to find the line (or phase) currents.
There are three modes of operation in
a half-cycle and the equivalent
circuits are shown in Fig. 6.8a for a Y-
connected load
Figure 6.8 Equivalent circuits for Y-connected resistive load.

During mode 2 for /3  t  2/3, transistors Q1, Q2 and Q6

conduct

During mode 3 for 2/3  t  , transistors Q1, Q2 and Q3

conduct

The line-to-neutral voltages are shown in Fig. 6.8b. The

instantaneous line-to-line voltage vab in Fig. 6.6b can be
expressed in a Fourier series,
Due to the quarter-wave symmetry along the x-axis, both a0

and an are zero. Assuming symmetry along the y-axis at t =
/6, we can write bn as
which, recognizing that vab is phase shifted by /6 and the

even harmonics are zero, gives the instantaneous line-to-line
voltage vab (for a Y-connected load) as

Both vbc and vca can be found from Eq.(6.20a) by phase

shifting vab by 120° and 240°, respectively,
We can notice from Eqs. (6.20a) to (6.20c) that the triplen

harmonics (n = 3, 9, 15, …) would be zero in the line-to-line
voltages.
The line-to-line rms voltage can be found from
From Eq. (6.20a), the rms nth component of the line voltage is

which, for n = 1, gives the rms fundamental line voltage.
The rms value of line-to-neutral voltages can be found from

the line voltage,

Figure 6.9 Three-phase

inverter with RL load

With resistive loads, the diodes across the transistors have no

functions. If the load is inductive, the current in each arm of
the inverter would be delayed to its voltage as shown in Fig.
6.9. When transistor Q4 in Fig. 6.6a is off, the only path for the
negative line current ia is through D1. Hence, the load
terminal a is connected to the dc source through D1 until the
load current reverses its polarity at t = t1. During the period
for 0  t  t1, transistor Q1 cannot conduct.

Similarly, transistor Q4 only starts to conduct at t = t2. The

transistors must be continuously gated, because the
conduction time of transistors and diodes depends on the
load power factor.
For a Y-connected load, the phase voltage is van = vab /3 with
a delay of 300 for a positive sequence, n = 1, 7, 13, 19, … , and a
phase advance of 300 for a negative sequence, n = 5, 11,17, 23,
… with respect to vab. This phase shift is independent of the
harmonic order.
Therefore, the instantaneous phase voltages (for a Y-

connected load) are

Dividing the instantaneous phase voltage vaN by the load

impedance,
Using Eq. (6.25a), the line current ia for an RL load is given by
where n = tan-1(nL/R).
Note:
For a delta-connected load, the phase voltages (vaN, vbN, and
vcN) are the same as theline-to-line voltages (vab, vbc, and
vca) as shown in Fig. 6.7a and as described by Eq. (6.20).
Dc supply current. Neglecting losses,the instantaneous

power balance gives

where ia(t), ib(t), and ic(t) are the phase currents in a delta-
connected load. Assuming that the ac output voltages are
sinusoidal and the dc supply voltage is constant vs(t) = Vs, we
get the dc supplycurrent for a positive sequence

The dc supply current can be simplified to
where IL = 3 Io is the rms load line current

Vo1 is the fundamental rms output line voltage
Io is the rms load phase current
1 is the load impedance angle at the fundamental
frequency.
Thus, if the load voltages are harmonic free, the dc supply

current becomes harmonic free. However, because the load
line voltages contain harmonics, the dc supplycurrent also
contains harmonics.
Gating sequence. The gating sequence for switching devices is as
follows:
1. Generate three square-wave gating signals vg1, vg3, and vg5 at an
output frequency f0 and a 50% duty cycle. Signals vg4, vg6, and vg2
should be logic invert signals of vg1, vg3, and vg5, respectively. Each
signal is shifted from the other by 60°.
2. Signals vg1, vg3, and vg5 drive Q1, Q3, and Q5, respectively, through
gate-isolating circuits. Signals vg2, vg4, and vg6 can drive Q2, Q4, and
Q6, respectively, without any isolating circuits.

86 Example 6-4
Example 6.4 Finding the Output Voltage and Current of a three-phase full-Bridge
Inverter with an RL load
The three-phase inverterin Figure 6.6a has a Y-connected load of R = 5  and L = 23

mH. The inverter frequency is f0 = 60 Hz and the dc input voltage is Vs = 220 V.
(a) express the instantaneous line-to-line voltage vab(t) and line current ia(t) in a
Fourier series. Determine
(b) the rms line voltage VL
(c) the rms phase voltage Vp
(d) the rms line voltage VL1 at the fundamental frequency
(e) the rms phase voltage at the fundamental frequency Vp1
(f) the THD
87 Example 6-4
Example 6.4 Finding the Output Voltage and Current of a three-phase full-Bridge
Inverter with an RL load
(g) the DF
(h) the HF and DF of the LOH
(i) the load power Po
(j) the average transistor current IQ(av), and
(k) the rms transistor current IQ(rms).

Vs = 220 V, R = 5 , L = 23 mH, f0 = 60 Hz, and  = 2 * 60 = 377 rad/s.

a. Using Eq. (6.20a), the instantaneous line-to-line voltage vab(t) can be written for a
positive sequence as
Using Eq. (6.26), the instantaneous line (or phase) current for a positive sequence
is given by
b. From Eq. (6.21), VL = 0.8165 * 220 = 179.63 V.

c. From Eq. (6.24), VP = 0.4714 * 220 = 103.7 V.
d. From Eq. (6.23), VL1 = 0.7797 * 220 = 171.53 V.
e. Vp1 = VL1/13 = 99.03 V.
f. From Eq. (6.23), VL1 = 0.7797Vs

From Eq. (6.6), THD = 0.24236Vs/(0.7797Vs) = 31.08%.

The rms harmonic line voltage is
g.
From Eq. (6.7), DF = 0.00941Vs/(0.7797Vs) = 1.211%

h. The LOH is the fifth, VL5 = VL1/5. From Eq. (6.5), HF5 = VL5 /VL1 = 1/5 = 20%, and
from Eq. (6.8), DF5 = (VL5 /52)/VL1 = 1/125 = 0.8 %.

i. For Y-connected loads, the line current is the same as the phase current and the
rms line current,
The load power P0 = 3IL2 R = 3 * 9.912 * 5 = 1473 W.

i. From Eq. (6.23), VL1 = 0.7797 * 220 = 171.53 V.
j. The average supply current Is = Po/220 = 1473/220 = 6.7 A and the average
transistor current IQ(av) = 6.7/3 = 2.23 A.
k. Because the line current is shared by three transistors, the rms value of a transistor
current is IQ(rms) = IL/3 = 9.91/3 = 5.72 A.
In this type of control, each transistor conducts for 120°.

Only two transistors remain on at any instant of time. The
gating signals are shown in Fig. 6.10. The conduction
sequence of transistors is 61, 12, 23, 34, 45, 56, 61. There are
three modes of operation in one half-cycle and the
equivalent circuits for a Y-connected load are shown in Fig.
6.11.

93 120-Degree
Conduction
Figure 6.10
Gating signals for 120° conduction.
During mode 1 for 0  t  /3, transistors 1 and 6

conduct.
During mode 2 for /3  t  2/3, transistors 1 and 2

conduct.

Figure 6.11 Equivalent circuits for Y-connected resistive load.

During mode 3 for 2/3  t  3/3, transistors 2 and 3

conduct.

The line-to-neutral voltages that are shown in Fig. 6.10 can

be expressed in Fourier series as

The line a-to-b voltage is vab = 3 van with a phase advance

of 300 for a positive sequence, n = 1, 7, 13,19, …, and a
phase delay of 300 for a negative sequence, n = 5, 11, 17, 23,
… This phase shift is independent of the harmonic order.
Therefore, the instantaneous line-to-line voltages (for a Y-
connected load) are

There is a delay of /6 between turning off Q1 and turning

on Q4.
Thus, there should be no short circuit of the dc supply

through one upper and one lower transistors. At any time,
two load terminals are connected to the dc supply and he
third one remains open. The potential of this open terminal
depends on the load characteristics and would be
unpredictable. Because one transistor conducts for 120°, the
transistors are less utilized as compared with those of 180°
conduction for the same load condition. Thus, the 180°
conduction is preferred and it is generally used in three-
phase inverters.
The Key points

 The three-phase bridge inverter requires six switching devices and
six diodes. The rms fundamental component VL1 of the output line
voltage is 0.7798Vs and that for phase voltage is Vp1 = VL1 /3 =
0.45Vs for 180° conduction. For 120° conduction, Vp1 = 0.3898Vs and
VL1 = 3 Vp1 = 0.6753Vs . The 180° conduction is the preferred control
method.
 The design of an inverter requires the determination of the average,
rms, and peak currents of the switching devices and diodes.

102 Voltage Control of Single-Phase Inverter
In many industrial applications,the control of the output

voltage of inverters is often necessary
1. to cope with the variations of dc input voltage,
2. to regulatevoltage of inverters, and
3. to satisfy the constant volts and frequency control
requirement.
There arevarious techniques to vary the inverter gain. The most
efficient method of controlling the gain (and output voltage) is to
incorporate PWM control within the inverters.
The commonly used techniques are:

1. Single-pulse-width modulation
2. Multiple-pulse-width modulation
3. Sinusoidal pulse-width modulation
4. Modified sinusoidal pulse-width modulation
5. Phase-displacement control

Among all these techniques, the sinusoidal pulse-width

modulation (SPWM) is commonly used for a voltage
control. However, the multiple-pulse-width modulation
provides a foundation for better understanding of the
PWM modulation techniques. The modified SPWM gives
limited ac output voltage control.
The phase-displacement control is normally used for high-
voltage applications, especially phase displacement by
transformer connections.
105 Multiple-Pulse-Width Modulation
Several pulses in each half-cycle of the output voltage are

generally produced to reduce the harmonic contents and to
increase harmonic frequencies for reducing the size and
costs of filtering.

106 Multiple-Pulse-
Width Modulation
 The generation of gating signals
(in Fig. 6.12b) for turning on and
off transistors is shown in Fig.
6.12a by comparing a reference
signal with a triangular carrier
wave. The gate signals are
shown in Fig. 6.12b.
Figure 6.12
Multiple-pulse-width modulation
The frequency of reference signal sets the output frequency

fo, and the carrier frequency fc determines the number of
pulses per half-cycle p. The modulation index controls the
output voltage. This type of modulation is also known as
uniform pulse-width modulation (UPWM). The number of
pulses per half-cycle is found from
where mf = fc/fo is defined as the frequency modulation ratio.

The instantaneous output voltage is vo = Vs(g1 - g4). The

output voltage for single-phase bridge inverters is shown
in Fig. 6.12c for UPWM.
If  is the width of each pulse, the rms output voltage can
be found from

The variation of the modulation index M = Ar/Acr from 0 to

1 varies the pulse widthd from 0 to T/2p (0 to /p) and the
rms output voltage Vo from 0 to Vs. The general form of a
Fourier series for the instantaneous output voltage is

The coefficient Bn in Eq.(6.32) can be determined by

considering a pair of pulses such that the positive pulse of
duration  starts at t =  and the negative one of the same
width starts at t =  + . This is shown in Fig. 6.12c.
The effects of all pulses can be combined together to obtain
the effective output voltage.

If the positive pulse of mth pair starts at t = m and ends

at t = m + , the Fourier coefficient for a pair of pulses is

The coefficient Bn of Eq. (6.32) can be found by adding the

effects of all pulses,
 A computer program is used to evaluate the performance of

multiple-pulse modulation. Figure 6.13 shows the harmonic
profile against the variation of modulation index for five pulses
per half-cycle.
 The order of harmonics is the same

as that of single-pulse modulation.
The distortion factor is reduced
significantly compared with that of
single-pulse modulation. However,
due to larger number of switching
on and off processes of power
transistors, the switching losses
would increase.
Figure 6.13 Abraham LOMI, Dr. Eng., Prof
Harmonic profile of multiple-pulse-width modulation
 With larger values of p, the amplitudes of LOH would be lower,

but the amplitudes of some higher order harmonics would
increase. However, such higher order harmonics produce
negligible ripple or can easily be filtered out.
 Because all widths are the same, we get the pulse width d (or
pulse angle ) as
where Ts = T/2p.
Gating sequence. The algorithm for generating the gating

signals is as follows:
1. Generate a triangular carrier signal vcr of switching
period TS = T/12p. Compare vcr with a dc reference
signal vr to produce the difference ve = vcr - vr, which
must pass through a gain-limiter to produce a square
wave of width d at a switching period TS.

2. To produce the gating signal g1, multiply the resultant

square wave by a unity signal vz, which must be a unity
pulse of 50% duty cycle at a period of T.
3. To produce the gating signal g2, multiply the square
wave by a logic-invert signal of vz.

117 Sinusoidal Pulse-Width Modulation
Since the desired output voltage is a sine wave, a reference

sinusoidal signal is used as the reference signal. Instead of
maintainingthe width of all pulses the same as in the case
of multiple-pulse modulation, the width of each pulse is
varied in proportion to the amplitude of a sine wave
evaluated at the center of the same pulse. The DF and
LOH are reduced significantly.

The gating signals as shown in Fig. 6.14a are generated by

comparing a sinusoidal reference signal with a triangular
carrier wave of frequency fc. This sinusoidal pulse-width
modulation (SPWM) is commonly used in industrial
applications.
The frequency of reference signal fr determines the inverter
output frequency fo; and its peakamplitude Ar controls the
modulation index M, and then in turn the rms output
voltage Vo.
119 Sinusoidal Pulse-
Width Modulation
 Comparing the bidirectional carrier
signal vcr with two sinusoidal
reference signals vr and -vr shown
in Fig. 6.14a produces gating
signals g1 and g4, respectively, as
shown in Fig. 6.14b. The output
voltage is vo = Vs(g1 - g4) . However,
g1 and g4 cannot be released at the
same time. The number of pulses
per half-cycle depends on the
carrier frequency.
Figure 6.14 Sinusoidal Pulse-Width Modulation
Within the constraint that two transistors of the same arm

(Q1 and Q4) cannot conduct at the same time, the
instantaneous output voltage is shown in Fig. 6.14c. The
same gating signals can be generated by using
unidirectional triangular carrier wave as shown in Fig.
6.14d. It is easier to implement this method and is
preferable. The gating signal g1, which is the same as g2, is
generated by determining the intersections of the triangular
carrier signal Vcr with the sinusoidal reference signal vr = Vr
sin t.
Similarly, the gating signals g4, which is the same as g3, is

generated by determining the intersections of the triangular
carrier signal vcr with the negative sinusoidal reference
signal vr = - Vr sin t. The algorithm for generating the
gating signals is similar to that for the uniform PWM in
Section 6.6.1, except the reference signal is a sine wave vr =
Vr sin t, instead of a dc signal. The output voltage is vo =
Vs(g1 - g4) .

The rms output voltage can be varied by varying the

modulation index M, defined by M = Ar/Ac. It can be
observed that the area of each pulse corresponds
approximately to the area under the sine wave between the
adjacent midpoints of off periods on the gating signals.
If m is the width of mth pulse, Eq. (6.31) can be extended to
find the rms output voltage by summing the average areas
under each pulse as

Equation (6.34) can also be applied to determine the Fourier

coefficient of output voltage as

 A computer program is developed to

determine the width of pulses and to
evaluate the harmonic profile of
sinusoidal modulation. The harmonic
profile is shown in Fig. 6.15 for five
pulses per half-cycle. The DF is
significantly reduced compared with that
of multiple-pulse modulation. This type
of modulation eliminates all harmonics
less than or equal to 2p - 1. For p = 5, the
LOH is ninth. Figure 6.15 Harmonic profile of sinusoidal pulse-width modulation.
The mth time tm and angle m of intersection can be

determined from
where tx can be solved from

Where Ts = T/2(p + 1). The width of the mth pulse dm (or

pulse angle m) can be found from
The output voltage of an inverter contains harmonics. The

PWM pushes the harmonics into a high-frequency range
around the switching frequency fc and its multiples, that is,
around harmonics mf, 2 mf, 3 mf, and so on. The frequencies at
which the voltage harmonics occur can be related by
where the nth harmonic equals the kth sideband of jth times
the frequency to modulation ratio mf.

The peak fundamental output voltage for PWM and SPWM

control can be found approximately from
For d = 1, Eq. (6.41) gives the maximum peak amplitude of

the fundamental output voltage as Vm1(max) = Vs. According to
Eq. (6.6), Vm1(max) could be as high as 4Vs / = 1.273 Vs for a
square-wave output. To increase the fundamental output
voltage, d must be increased beyond 1.0.
The operation beyond d = 1.0 is called

overmodulation. The value of d at which
Vm1(max) equals 1.273 Vs is dependent on
the number of pulses per half-cycle p and
is approximately 3 for p = 7, as shown in
Fig. 6.16. Overmodulation basically leads
to a square-wave operation and adds more
harmonics as compared with operation in
the linear range (with d  1.0).
Figure 6.16 Peak fundamental output voltage
versus modulation index M.
Overmodulation is normally avoided in applications

requiring low distortion (e.g., uninterruptible power supplies
[UPSs]).

131 Phase-Displacement Control
Voltage control can be obtained by using multipleinverters

and summing the output voltages of individual inverters. A
single-phase full-bridge inverter in Fig. 6.3a can be perceived
as the sum of two half-bridge inverters in Fig. 6.2a. A 180°
phase displacement produces an output voltage as shown in
Fig. 6.19c, whereas a delay (or displacement) angle of 
produces an output as shown in Fig. 6.19e. For example, the
gate signal g1 for thehalf-bridge inverter can be delayed by
angle  to produce the gate signal g2.
If
then

The instantaneous output voltage,
which, after using sin A - sin B = 2sin[(A – B)/2] cos[(A +

B)/2], can be simplified to

The rms value of the fundamental output voltage is
Equation (6.46) indicates that the output voltage can be

varied by changing the delay angle. This type of control is
especially useful for high-power applications, requiring a
large number of switching devices in parallel.

If the gate signals g1 and g2 are delayed by angles 1 =  and

2 (=  - ), the output voltage vab has a quarter-wave
symmetry at /2 as shown in Fig. 6.19f. Thus, we get

136 Voltage Control of Three-Phase Inverter
A three-phase inverter may be considered as three single-

phase inverters and the output of each single-phase inverter
is shifted by 120°. The voltage control techniques discussed in
Section 6.6 are applicable to three-phase inverters. However,
the following techniques are most commonly used for three-
phase inverters.
1) Sinusoidal PWM, 2) Third-harmonic, 3) PWM 60°, and 4)
PWM Space vector modulation

137 Voltage Control of Three-Phase Inverter
The sinusoidal PWM is commonly used for a voltage control,

but the peak amplitude of the output voltage cannot exceed
the dc supply voltage VS without operation in the
overmodulation region. The modified (or 60°) SPWM gives
limited ac output voltage control. The third-harmonic PWM
gives the fundamental component, which is higher than the
available supply VS. The space vector modulation is more
flexible and it can be programmed to synthesize the output
voltage with a digital implementation.
138 Sinusoidal PWM
The generations of gating signals with sinusoidal PWM are

shown in Fig. 6.20a. There are three sinusoidal reference
waves (vra, vrb, and vrc) each shifted by 120°. A carrier wave is
compared with the reference signal corresponding to a phase
to generate the gating signals for that phase. Comparing the
carrier signal vcr with the reference phases vra, vrb, and vrc
produces g1, g3, and g5, respectively, as shown in Fig. 6.20b.
The operation of switches Q1 to Q6 in Fig. 6.6a is determined
by comparing the modulating (or reference) sine waves with
the triangular carrier wave.
139 Sinusoidal PWM
When vra > vcr , the upper switch Q1 in inverter leg ‘a’ is
turned on. The lower switch Q4 operates in a complementary
manner and thus it is switched off. Thus, the gate signals g2,
g4, and g6 are complements of g1, g3, and g5, respectively, as
shown in Fig. 6.20b. The phase voltages as shown in Fig. 6.20c
for lines a and b are van = VSg1 and vbn = VSg3. The
instantaneous line-to-line output voltage is vab = Vs(g1 - g3). The
output voltage, as shown in Fig. 6.20c, is generated by
eliminating the condition that two switching devices in the
same arm cannot conduct at the same time.
140 Sinusoidal PWM
Figure 6.20
Sinusoidal pulse-
width modulation
for three-phase
inverter

141 Sinusoidal PWM

142 Sinusoidal PWM
The fundamental component of the line–line voltage vab as

shown in Fig. 6.20d is denoted as vab1.

143 Sinusoidal PWM
The fundamental component of the line–line voltage vab as

shown in Fig. 6.20d is denoted as vab1.
The normalized carrier frequency mf should be an odd
multiple of three. Thus, all phase voltages (vaN, vbN, and vcN)
are identical, but 120° out of phase without even harmonics;
moreover, harmonics at frequencies of multiples of three are
identical in amplitude and phase in all phases. For instance, if
the ninth harmonic voltage in phase a is

144 Sinusoidal PWM
The corresponding ninth harmonic in phase b will be,
Thus, the ac output line voltage vab = vbN does not contain the
ninth harmonic. Therefore, for odd multiples of three times
the normalized carrier frequency mf, the harmonics in the ac
output voltage appear at normalized frequencies fh centered
around mf and its multiples, specifically, at
145 Sinusoidal PWM
where j = 1, 3, 5, …for k = 2, 4, 6, …; and j = 2, 4, … for k = 1,

5, 7, …, such that n is not a multiple of three. Therefore, the
harmonics are at mf ± 2, mf ± 4, …, 2mf ± 1, 2mf ± 5, …, 3mf ±
2, 3mf ± 4, …, 4mf ± 1, 4mf ± 5, …. For nearly sinusoidal ac load
current, the harmonics in the dc-link current are at
frequencies given by

146 Sinusoidal PWM
where j = 0, 2, 4, …for k = 1, 5, 7, …; and j = 1, 3, 5, … for k =

2, 4, 6, …, such that n = jmf ± k is positive and not a multiple
of three.
Because the maximum amplitude of the fundamental phase
voltage in the linear region (M  1) is Vs/2, the maximum
amplitude of the fundamental ac output line voltage is
vab1 = 3Vs/2. Therefore, one can write the peak amplitude as

147 Sinusoidal PWM
Overmodulation. To further increase the amplitude of the

load voltage, the amplitude of the modulating signal vcr can
be made higher than the amplitude of the carrier signal vcr,
which leads to overmodulation. The relationship between the
amplitude of the fundamental ac output line voltage and the
dc-link voltage becomes nonlinear. Thus, in the
overmodulation region, the line voltages range in,
148 Sinusoidal PWM
Large values of M in the SPWM technique lead to full

overmodulation. This case is known as square-wave
operation as illustrated in Fig. 6.21, where the power devices
are on for 180°. In this mode, the inverter cannot vary the
load voltage except by varying the dc supply voltage Vs. The
fundamental ac line voltage is given by
149 Sinusoidal PWM
The ac line output voltage contains the harmonics fn, where n

= 6k ± 1 (k = 1, 2, 3, …) and their amplitudes are inversely
proportional to their harmonic order n. That is,

150 Sinusoidal PWM
Figure 6.21 Square-wave Operation

151 Example 6-5
Example 6.5 Finding the Allowable Limit of the Dc Input Source

A single-phase full-bridge inverter controls the power in a resistive load. The nominal
value of input dc voltage is Vs = 220 V and a uniform pulse-width modulation with
five pulses per half-cycle is used. For the required control, the width of each pulse is
300.
(a) Determine the rms voltage of the load.
(b) If the dc supply increases by10%, determine the pulse width to maintain the same
load power. If the maximum possible pulse width is 35°, determine the minimum
allowable limit of the dc input source.

a. Vs = 220 V, p = 5, and  = 300. From Eq. (6.31), Vo = 22025 * 30/180 = 200.8 V.

b. Vs = 1.1 * 220 = 242 V. By using Eq. (6.31), 2425/180 = 200.8 and this gives the
required value of pulse width,  = 24.750.
To maintain the output voltage of 200.8 V at the maximum possible pulse
width of  = 350, the input voltage can be found from 200.8 = Vs (5 * 35/180),
and this yields the minimum allowable input voltage, Vs = 203.64 V.

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Chapter 6

 DC-to-AC converters are known as inverters. Thefunction

Abraham LOMI, Dr. Eng., Prof

 A variable output voltage can be obtained by varying the

Abraham LOMI, Dr. Eng., Prof

 The inverter gain may be defined as the ratio of the ac

Abraham LOMI, Dr. Eng., Prof

 For low- and medium-power applications, square-wave

Abraham LOMI, Dr. Eng., Prof

 Inverters are widely used in industrial applications (e.g.,

Abraham LOMI, Dr. Eng., Prof

 For high-power three-phase systems, typical outputs are

Abraham LOMI, Dr. Eng., Prof

 Inverters can be broadly classified into two types:

 Inverters can be broadly classified into two types: (1)

Abraham LOMI, Dr. Eng., Prof

 These inverters generally use PWM control signals for

Abraham LOMI, Dr. Eng., Prof

 If the output voltage orcurrent of the inverter is forced to

Abraham LOMI, Dr. Eng., Prof

 The input voltage toan inverter is dc and the output

 The quality of an inverter is normally evaluated in terms

The ac input power of the inverter is

The ripple factor of the input current is

Abraham LOMI, Dr. Eng., Prof

Abraham LOMI, Dr. Eng., Prof

Harmonic factor of nth harmonic (HFn). The harmonic factor

where Vo1 is the rms value of the fundamental component

Abraham LOMI, Dr. Eng., Prof

Total harmonic distortion (THD). The total harmonic

Abraham LOMI, Dr. Eng., Prof

Distortion factor (DF). THD gives the total harmonic content,

Thus, DF is a measure of effectiveness in reducing unwanted

Abraham LOMI, Dr. Eng., Prof

The DF of an individual (or nth) harmonic component is

Lowest order harmonic (LOH). The LOH is that harmonic

 The principle of single-phase inverters can

 Figure 6.2b shows the waveforms

The root-mean-square (rms) output voltage can be found from,

The instantaneous output voltage can be expressed in Fourier series

Abraham LOMI, Dr. Eng., Prof

Due to the quarter-wave symmetry along the x-axis, both a0 and an

Which gives the instantaneous output voltage vo as

Abraham LOMI, Dr. Eng., Prof

Which gives the instantaneous output voltage vo as

Where  = 2f0 is the frequency of output voltage in rads per second.

Which gives the instantaneous output voltage vo as

For an inductive load, the load current cannot change immediately

When diode D1 or D2 conducts, energy is

Any switching devices can replace the transistors. If to is the turn-off

Abraham LOMI, Dr. Eng., Prof

For an RL load, the instantaneous load current i0 can be found by

where n = tan-1(nL/R2). If I01 is the rms fundamental load

Note: In most applications (e.g., electric motor drives) the output

Dc supply current. Assuming a lossless inverter, the average

Abraham LOMI, Dr. Eng., Prof

where T is the period of the ac output voltage. For an

Abraham LOMI, Dr. Eng., Prof

Abraham LOMI, Dr. Eng., Prof