MSI - Model MS 7231 30 PDF

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1

COVER SHEET
BLOCK DIAGRAM
1
2
MS-7231 (0908)

CLOCK MAP 3 Version 3.0

m
CPU:
POWER MAP 4

co
Intel LGA775 Conroe
GPIO & JUMPER SETTING 5
Intel LGA775-CPU 6-8

a.
VRM11 Intersil 6326 4Phase 9 System Chipset:

si
Intel Lakeport -GMCH 10-13 Intel Lakeport - GMCH (North Bridge)
DDR II DIMM 1and DIMM2 1 & 2 14-16 Intel ICH7(South Bridge)

ne
PCI-E X1 + PCI Slot 17
On Board Chipset:
VGA CONNECTOR 18
BIOS -- FWH FLASH 4Mb

do
Clock Generator - ICS954119 19
HD AUDIO CODEC(ALC888)
ICH7 20-22 LPC Super I/O -- W83627EHF

in
A
CH7021 & TV-OUT CONNECTORS 23 LAN -- 82541PI/GI or 82562EZ A

1394 -- VIA VT-6307


FWH 24
Clock Generator - ICS954119

i-
VIA VT-6307 25 DVI Transmitter -- Chrontel CH7307
USB CONNECTORS 26 SDTV/HDTV ENCODER -- Chrontel CH7021
is
HD AUDIO CODEC(ALC 888) 27 Main Memory:
SIO-W83627EHF & KB/MS 28 DDR II * 2 (Max 2GB)
kn

ATX,F_ PANEL 29 Expansion Slots:


te

IDE, SATA & FAN CONTROL 30 PCI EXPRESS X1 + PCI 2.3 SLOT * 1
MS7 ACPI Controller 31 Intersil PWM:
w.

CH7307 & DVI CONNECTOR 32 Controller: ISL6326CR


82541PI/GI & RJ45 CONNECTOR 33
ww

Auto BOM manual 34


PWOK MAP 35 MSI
<OrgAddr1> MICRO-STAR INt'L CO., LTD.
Title
COVER SHEET
History 36 Size Document Number Rev
MS-7231 3.0

Date: Wednesday, September 05, 2007 Sheet 1 of 36


1
1 2 3 4 5

VRM 11
Intel LGA775 Processor Block Diagram

m
A
Intersil 6326 A

4-Phase PWM

co
FSB
533/800/1066

SDVOC 2 DDR

a.
S-VEDIO &
CH7021 64bit II
TV-OUT DDRII
SDVOB Lakeport 533/667

945GC DIMM
DVII OUT CH7307

si
Modules
RGB
Analog CO-LAYOUT
Video Out
82541PI/GI(PCI BUS)

ne
82562EZ(LCI BUS)

DMI
B
LCI BUS B

UltraDMA
33/66/100
PCI BUS

do
IDE Primary VT6307
SATA
IEEE-1394
SATA 0~1
ICH7

in
USB
PCI Express x1
USB Port 0~7
PCI-E X1 + PCI Slot

i-
AC'97 / Azalia

Azalia Codec
[email protected]/s

LPC Bus

ALC888
is
C C

LPC SIO
Winbond
kn

83627EHF
te

Flash Keyboard Serial port *2


w.

Mouse
ww

D D

MICRO-START INT'L CO.,LTD.


Title
BLOCK DIAGRAM
Size Document Number Rev
A3 MS-7231 3.0
Date: Wednesday, September 05, 2007 Sheet 2 of 36
1 2 3 4 5
5 4 3 2 1
N_DDR2_B

HCLK LGA775

CLOCK MAP P_DDR0_A


N_DDR0_A
200MHz/266MHz/333MHz
200MHz/266MHz/333MHz
DDRII
DIMM1

m
D MCHCLK P_DDR1_A
N_DDR1_A
200MHz/266MHz/333MHz
200MHz/266MHz/333MHz
D

P_DDR2_A 200MHz/266MHz/333MHz
Lakeport

co
N_DDR2_A 200MHz/266MHz/333MHz
PE_100M P_DDR0_B 200MHz/266MHz/333MHz
MCH N_DDR0_B 200MHz/266MHz/333MHz
P_DDR1_B 200MHz/266MHz/333MHz
DDRII
N_DDR1_B 200MHz/266MHz/333MHz DIMM2
DOTCLK

a.
P_DDR2_B 200MHz/266MHz/333MHz
N_DDR2_B 200MHz/266MHz/333MHz
ICS954119
ICHCLK
SATACLK

si
Clock 24MHz
USB48MHz ALC888 Azalia
Generator ICH7
ICH14.318MHz
32.768MHz

ne
C C

SIO48MHz W83627EHF

do
LPC IO
SIO_PCLK 33MHz

in
i-
1394_PCLK VT6307
33MHz 1394 is
B B

LAN_PCLK LAN -
33MHz 82541/82562
kn

SIO_PCLK
33MHz
te

FWH
FWH_PCLK
33MHz
w.

PCICLK
A
0/1 A

33MHz PCI &


ww

Express MICRO-STAR INt'L CO., LTD.


PCIE 0/1 MSI
Title
100MHz CLOCK MAP
Size Document Number Rev
3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 3 of 36
5 4 3 2 1
5 4 3 2 1

POWER MAP

m
D
ATX POWER VCC3_SB 0.375A
D

PCI_E1

PCI1

co
3.3V 3.8A
+12V +5V +3.3V +5VSB VCC3_SB 0.375A 5V
12V 2.5A
0.5A 12V
5V 0A 0.25A

a.
3.3V 3A -12V 0.1A

125A 5.3A
VRM 11 LGA775

si
1.2A
MSI

ne
ACPI 8.7+1.2 = 9.9A
C
Controller
9.9*1.8/5/0.8 = 4.45A
Lakeport C

5VDIMM VCC_DDR 4A
MSI
MS6 + MCH
0.9A

MS - 7

do
8.7A
13.8A + 1.5A
25.8*1.5/5/0.8 = 9.52A
V_1P5_CORE = 15.3A
VCC5 25.38A 17.87A
MSI
MS6 + 4.7A

in
6.2A 1.31A
1.2A
DDR2 X 2
V_1P05_CORE
MSI
LINEAR

i-
TBD (2.57A)

1.31A
1.31A 14mA
ICH7
V_FSB_VTT 0.7A
is
6.2A VLAN25
B
MSI
LINEAR B

INTEL
3.775A VLAN12
82562/82541
kn

VCC3_SB VTT_DDR 1.2A


W83310DS
te

5VDUAL 4A
4.0A
USB
w.
ww

A A

MSI MICRO-STAR INt'L CO., LTD.


Title
POWER MAP
Size Document Number Rev
3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 4 of 36
5 4 3 2 1
8 7 6 5 4 3 2 1

ICH7
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Signal Name or status FWH Note: FWH GPs should only be used for static options,
GPIO[0] BM_BUSY# AB18 I/O Vcc3p3 N Y 5 Input pull high VCC3 do not put dynamic nets on these
GPIO[1] PCIREQ[5]# C8 I/O V5REF N Y 5 Input PREQ#5 GPIO Pin# Power Tol Signal Name
GPIO[2] PIRQE# G8 I/OD V5REF N Y 5 Input PIRQ#E FPGI[0] 6 Main 3.3 pull-down
GPIO[3] PIRQF# F7 I/OD V5REF N Y 5 Input PIRQ#F FPGI[1] 5 Main 3.3 pull-down
GPIO[4] PIRQG# F8 I/OD V5REF N Y 5 Input PIRQ#G FPGI[2] 4 Main 3.3 pull-down

m
D GPIO[5] PIRQH# G7 I/OD V5REF N Y 5 Input PIRQ#H FPGI[3] 3 Main 3.3 pull-down D

GPIO[6] ATADET0 AC21 I/O Vcc3p3 N Y 3.3 Input ATADET0 FPGI[4] 30 Main 3.3 pull-down
GPIO[7] GPI7 AC18 I/O Vcc3p3 N Y 3.3 Input pull high VCC3

co
GPIO[8] SIO_PME# E21 I/O VccSus3p3 N Y 3.3 Input SIO_PME# pull high VCC3_SB PCI Config.
GPIO[9] unmuxed E20 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB
GPIO[10] unmuxed A20 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
GPIO[11] SMBALERT# B23 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB

a.
GPIO[12] unmuxed F19 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB
1394 PIRQ#E PREQ#3 AD19 1394_PCLK
GPIO[13] unmuxed E19 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB
PGNT#3
GPIO[14] ADT7467_ALERT R4 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB
GPIO[15] unmuxed E22 I/O VccSus3p3 N Y 3.3 Input pull high VCC3_SB
PIRQ#B
GPIO[16] unmuxed AC22 I/O Vcc3p3 N N 3.3 0 NC PREQ#0

si
PIRQ#C PCI_CLK0
GPIO[17] PCIGNT[5]# D8 I/O Vcc3p3 N N 3.3 N/A NC PCI-SLOT1 PGNT#0 AD16
PIRQ#D
GPIO[18] unmuxed AC20 I/O Vcc3p3 N N 3.3 1 NC
PIRQ#A
GPIO[19] SATA1GP AH18 I/O Vcc3p3 N N 3.3 Input pull high VCC3
GPIO[20] unmuxed AF21 I/O Vcc3p3 N N 3.3 1 NC PIRQ#C PREQ#4

ne
GPIO[21] SATA0GP AF19 I/O Vcc3p3 N N 3.3 Input pull high VCC3 PIRQ#D PGNT#4
PCI-SLOT2 AD20 PCI_CLK1
PIRQ#A
C C
GPIO[22] PCIREQ[4]# A13 I/O Vcc3p3 N N 3.3 Input PREQ#4
GPIO[23] LDRQ1# AA5 I/O Vcc3p3 N N 3.3 Input pull high VCC3 PIRQ#B
GPIO[24] unmuxed R3 I/O VccSus3p3 N N 3.3 No Change NC
GPIO[25] unmuxed D20 I/O VccSus3p3 Y N 3.3 1 NC
82541GI PREQ#2

do
GPIO[26] unmuxed A21 I/O VccSus3p3 N N 3.3 0 NC PIRQ#C AD18 LAN_PCLK
82562EZ PGNT#2
GPIO[27] unmuxed B21 I/O VccSus3p3 N N 3.3 0 NC
GPIO[28] unmuxed E23 I/O VccSus3p3 N N 3.3 0 NC
GPIO[29] OC#2 C3 I/O VccSus3p3 N N 3.3 Input OC#5

in
GPIO[30] OC#2 A2 I/O VccSus3p3 N N 3.3 Input OC#6
GPIO[31] OC#2 B3 I/O VccSus3p3 N N 3.3 Input OC#7
GPIO[32] CLEAR_CMOS# AG18 I/O Vcc3p3 N N 3.3 1 CLEAR_CMOS#, ONLY pull high VCC3
SIGNAL DEVICE
GPIO[33] BIOS_WP# AC19 I/O Vcc3p3 N N 3.3 1 BIOS_WP#
PCIRST_SLT# PCIE SLOT,CH7307,CH7021
GPIO[34] unmuxed U2 I/O Vcc3p3 N N 3.3 0 NC
PCIRST#1 LAN-82541PI/GI,VT6307

i-
GPIO[35] unmuxed AD21 I/O Vcc3p3 N N 3.3 1 NC
PLTRST# MCH, FWH, SIO
GPIO[36] SATA2GP AH19 I/O Vcc3p3 N N 3.3 Input pull high VCC3
PCIRST_ICH6# MS-7,PCI-SLOT
GPIO[37] SATA3GP AE19 I/O Vcc3p3 N N 3.3 Input pull high VCC3
HD_RST# IDE1
GPIO[38] unmuxed AD20 I/O Vcc3p3 N N 3.3 Input pull high VCC3
H_CPURST# CPU
B B

GPIO[39] unmuxed AE20 I/O Vcc3p3 N N 3.3 Input pull high VCC3
is
GPIO[48] GNT4# A14 I/O Vcc3p3 N N 3.3 N/A GNT4#
SMBCLK, SMBDATA DDR2, PCIEX1, CLKGEN, ICH7, PCI SLOT, GIGA LAN, ADT7464, MS-7
GPIO[49] CPUPWRGD AG24 I/O V_CPU_IO N N CPU N/A H_PWRGD
GPI[15..0] can configured to cause a SMI# or SCI. DDRII DIMM Config.
DEVICE ADDRESS CLOCK
kn

Following are the GPIOs that need to be terminated properly if not used: MCLK_A0/MCLK_A#0
GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused. DIMM 1 A0H MCLK_A1/MCLK_A#1
MCLK_A2/MCLK_A#2
MCLK_B0/MCLK_B#0
te

DIMM 2 A4H MCLK_B1/MCLK_B#1


SIO W83627EHF MCLK_B2/MCLK_B#2

PIN NAME PIN# USAGE Input/Output NOTES JUMPER SETTING


GPIO43 71 unused OUTPUT OD
w.

GPIO33 89 unused OUTPUT OD JBAT1 (1-2)NORMAL (2-3)CLEAR


GPIO45 69 unused OUTPUT OD
A A
GPIO35 86 unused OUTPUT OD
GPIO50 110 unused OUTPUT
ww

MSI MICRO-STAR INt'L CO., LTD.


Title
GPIO MAP
Size Document Number Rev
3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 5 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

R347 X_1KR
CPU SIGNAL BLOCK FP_RST# 21,29
VCC_VRM_SENSE VCC_VRM_SENSE 9
C412

X_C10U16Y1206 VSS_VRM_SENSE VSS_VRM_SENSE 9

m
D 10 H_A#[3..31] VID[0..6] 9 D
TP35

H_A#10

co
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17
H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11

VID6
VID5
VID4
VID3
VID2
VID1
VID0
TP36

H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3
H_A#9

AM5

AM3

AM2
AG5
AG4
AG6
AH5
AH4

AC5

AD6

AC2

AN3
AN4
AN5
AN6
AB4

AB5
AA5

AA4

AB6

AK3

AK4
AF4
AF5

AL4

AL6

AL5
AJ6
AJ5

AJ3
W6

W5

M4

M5
U4
U5

U6

R4
Y4
Y6

V4
V5

P6
T4

T5

L4

L5
U10A

A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

DBR#

ITP_CLK1
ITP_CLK0

VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VCC_SENSE
VSS_SENSE
VCC_MB_REGULATION
VSS_MB_REGULATION

a.
H_DBI#0 A8
10 H_DBI#[0..3] DBI0#
H_DBI#1 G11
H_DBI#2 DBI1#
D19 DBI2#
H_DBI#3 C20 H1 CPU_GTLREF0 CPU_GTLREF0 7
DBI3# GTLREF0 CPU_GTLREF1
GTLREF1 H2 CPU_GTLREF1 7
7 7 CPU_GTLREF2 CPU_GTLREF2 F2 H29
EDRDY# GTLREF_SEL TP16
7 7 H_IERR# H_IERR# AB2 E24 MCH_GTLREF_CPU BSEL TABLE
IERR# CS_GTLREF MCH_GTLREF_CPU 10
AB3 AG3 H_BPM#5
MCERR# BPM5#

si
R3 AF2 H_BPM#4
7,20 H_FERR# FERR#/PBE# BPM4# H_BPM#3
2 1 0 FSB FREQUENCY
20 H_STPCLK# M3 STPCLK# BPM3# AG2
TP17 AD3 AD2 H_BPM#2
BINIT# BPM2# H_BPM#1
0 0 0 267 MHZ (1067)
20 H_INIT# P3 INIT# BPM1# AJ1
TP37 H4 AJ2 H_BPM#0
RSP# BPM0# 0 1 0 200 MHZ (800)
10 H_DBSY# B2 DBSY# PCREQ# G5 0 0 1 133 MHZ (533)
C1 J6 H_REQ#4 H_REQ#[0..4] 10
10 H_DRDY# DRDY# REQ4#
E3 K6 H_REQ#3

ne
10 H_TRDY# TRDY# REQ3#
M6 H_REQ#2
REQ2# H_REQ#1
10 H_ADS# D2 ADS# REQ1# J5
C C3 K4 H_REQ#0 C
10 H_LOCK# LOCK# REQ0#
10 H_BNR# C2 BNR#
D4 W2 H_TESTHI12 R359 51R0402
10 H_HIT# HIT# TESTHI12
E4 P1 H_TESTHI11 R358 51R0402
10 H_HITM# HITM# TESTHI11
G8 H5 H_TESTHI10 R360 51R0402
10 H_BPRI# BPRI# TESTHI10
G7 G4 H_TESTHI9 R345 51R0402 Prescott / Cedar Mill

do
10 H_DEFER# DEFER# TESTHI9
G3 H_TESTHI8 R317 51R0402 VTT_OUT_LEFT
H_TDI TESTHI8
AD1 TDI TESTHI7 F24 LL_ID[1:0] = 00
H_TDO AF1 G24
TDO TESTHI6 CPU_W2_U1 86 V_FSB_VTT
H_TMS AC1 G26 GTLREF_SEL = 0
H_TRST# TMS TESTHI5
AG1 TRST# TESTHI4 G27
H_TCK AE1 G25 VTT_SEL = 1
TCK TESTHI3 H_TESTHI2_7 R167 51R0402
30 CPU_TMPA AL1 THERMDA TESTHI2 F25
AK1 W3 H_TESTHI1 R344 51R0402
30 VTIN_GND THERMDC TESTHI1

in
M2 F26 H_TESTHI0 R166 51R0402
20 TRMTRIP# THERMTRIP# TESTHI0
TP18 AE8 AK6 RSVD_AK6 VTT_OUT_RIGHT 7,8
GND/SKTOCC# FORCEPH R368 120N_R0402MS
7 H_PROCHOT# AL2 PROCHOT# RSVD G6
N2 RN30
20 H_IGNNE# IGNNE#
P2 G28 CK_H_CPU# 19 8P4R-680R
20 ICH_H_SMI# SMI# BCLK1#
K3 F28 CK_H_CPU 19 VID3 1 2 VTT_OUT_RIGHT
20 H_A20M# A20M# BCLK0#
H_TESTHI13 L2 VID1 3 4
R320 51R0402 TESTI_13 H_RS#2 VID2
V_FSB_VTT RS2# A3 H_RS#[0..2] 10 5 6
H_RS#1 VID4

i-
AH2 RSVD RS1# F5 7 8
TP26 N5 B3 H_RS#0 VID0 R364 680R
TP31 RESERVED0 RS0# VID5 R370 680R
AE6 RESERVED1
TP33 C9 U3 TP2 VID6 R496 _680R0402-1
CPU_GTLREF3 RESERVED2 AP1# TP3
77 CPU_GTLREF3 G10 RESERVED3 AP0# U2
TP38 D16 F3 H_BR#0 7,10
RESERVED4 BR0# H_COMP5 R337 _49.9R1%-1
A20 RESERVED5 COMP5 T2
J2 H_COMP4 R319 _49.9R1%-1 VTT_OUT_LEFT 7
COMP4 H_COMP3 R318 _49.9R1%-1
Y1 R1
B
TP34
V2
AA2
BOOTSELECT
LL_ID0
is COMP3
COMP2 G2
T1
H_COMP2
H_COMP1
R316
R321
_49.9R1%-1
_49.9R1%-1 C384
B

LL_ID1 COMP1 H_COMP0 R236 _49.9R1%-1 C0.1U25Y


A13
X_N-3904 X_1KR R373 7,12,19 H_FSBSEL0 G29 BSEL0
COMP0 H_BPM#[0:5] change 62 ohm
H30 J17 TP19
7,12,19 H_FSBSEL1 BSEL1 DP3#
R375 0N_R0402MS
G30 H16 TP20 RN29 8P4R-62R
7,12,19 H_FSBSEL2 BSEL2 DP2#
H15 TP21 1 2 H_BPM#3
Q19 DP1# TP22 H_BPM#5
7,20 H_PWRGD N1 PWRGOOD DP0# J16 3 4
kn

5 6 H_BPM#1
H_BPM#0
H_FSBSEL1

7,10 H_CPURST# G23 RESET# ADSTB1# AD5 H_ADSTB#1 10 7 8


10 H_D#[0..63] ADSTB0# R6 H_ADSTB#0 10
H_D#63 B22 C17
D63# DSTBP3# H_DSTBP#3 10
H_D#62 A22 G19 VTT_OUT_RIGHT R325 62R H_BPM#2
D62# DSTBP2# H_DSTBP#2 10
H_D#61 A19 E12 R348 62R H_BPM#4
D61# DSTBP1# H_DSTBP#1 10
H_D#60 B19 B9
D60# DSTBP0# H_DSTBP#0 10
H_D#59 B21 A16 C388 C0.1U25Y R349 X_49.9R1% H_TDO
D59# DSTBN3# H_DSTBN#3 10
te

H_D#58 C21 G20


D58# DSTBN2# H_DSTBN#2 10
H_D#57 B18 G12 C382 C0.1U25Y R350 49.9R1% H_TRST#
D57# DSTBN1# H_DSTBN#1 10
H_D#56 A17 C8
D56# DSTBN0# H_DSTBN#0 10
H_D#55 B16 L1
D55# LINT1/NMI H_NMI 20
H_D#54 C18 K1
D54# LINT0/INTR H_INTR 20
R382 49.9R1% H_TMS
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#

R326 49.9R1% H_TDI


w.
H_D#53 B15
H_D#52 C14
H_D#51 C15
H_D#50 A14
H_D#49 D17
H_D#48 D20
H_D#47 G22
H_D#46 D22
H_D#45 E22
H_D#44 G21
H_D#43 F21
H_D#42 E21
H_D#41 F20
H_D#40 E19
H_D#39 E18
H_D#38 F18
H_D#37 F17
H_D#36 G17
H_D#35 G18
H_D#34 E16
H_D#33 E15
H_D#32 G16
H_D#31 G15
H_D#30 F15
H_D#29 G14
H_D#28 F14
H_D#27 G13
H_D#26 E13
H_D#25 D13
H_D#24 F12
H_D#23 F11
H_D#22 D10
H_D#21 E10
H_D#20 D7
H_D#19 E9
H_D#18 F9
H_D#17 F8
H_D#16 G9
H_D#15 D11
H_D#14 C12
H_D#13 B12
H_D#12 D8
H_D#11 C11
H_D#10 B10
H_D#9 A11
H_D#8 A10
H_D#7 A7
H_D#6 B7
H_D#5 B6
H_D#4 A5
H_D#3 C6
H_D#2 A4
H_D#1 C5
H_D#0 B4

VCCP ZIF-SOCK775-15u
R327 49.9R1% H_TCK

A
R384 A
X_4.7KR PLACE BPM TERMINATION NEAR CPU
ww

21,28 THERM#
THERM# H_PROCHOT#
MSI MICRO-STAR INt'L CO., LTD.
Q44 Title
X_N-PMBS3904_SOT23-RH Intel LGA775 - Signals
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 6 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCCP

AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AG11
AG12
AG14
AG15
AG18
AG19
AG21
AG22
AG25
AG26
AG27
AG28
AG29
AG30

AH11
AH12
AH14
AH15
AH18
AH19
AH21
AH22
AH25
AH26
AH27
AH28
AH29
AH30

AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AF21
AF22

AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26

AM8
AM9
AG8
AG9

AH8
AH9

AK8
AK9
AF8
AF9

AL8
AL9
AJ8
AJ9
U10B V_1P5_CORE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP R188 0R
A23 H_VCCA R479
VCCA H_VSSA
AF19 B23

m
VCC VSSA 0R
D AF18 D23 H_VCCPLL D
VCC VCCPLL H_VCCABB H_VCCPLL
AF15 VCC VCC-IOPLL C23
AF14 VCC
AF12 V_FSB_VTT

co
VCC C1759 C98
AF11 VCC VTT A25
AE9 A26 C10U10Y1206 C0.01U50X
VCC VTT
AE23 VCC VTT A27
AE22 VCC VTT A28
AE21 VCC VTT A29
AE19 VCC VTT A30
AE18 B25
AE15
VCC
VCC
VTT
VTT B26 short NEAR THE PROCESS SOCKET

a.
AE14 VCC VTT B27
AE12 VCC VTT B28
AE11 VCC VTT B29
AD8 VCC VTT B30
AD30 VCC VTT C25
AD29 VCC VTT C26
AD28 VCC VTT C27
AD27 VCC VTT C28

si
AD26 VCC VTT C29
AD25 VCC VTT C30
AD24 D25 V_FSB_VTT
VCC VTT
AD23 VCC VTT D26
AC8 VCC VTT D27
AC30 D28 C160 C10U10Y0805
VCC VTT
AC29 VCC VTT D29
AC28 D30 C162 C10U10Y0805
VCC VTT
AC27 AM6 VTT_PWG

ne
VCC VTTPWRGD C166 C10U10Y0805
AC26 VCC
AC25 VCC VTT_OUT_RIGHT AA1 VTT_OUT_RIGHT
C AC24 J1 VTT_OUT_LEFT C161 C0.1U25Y C
VCC VTT_OUT_LEFT
AC23 VCC VTT_SEL F27 VCC3
AB8 R197 C386 C0.1U25Y
VCC X_1KN_R0402MS
AA8 VCC RSVD F29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
do
HS1
HS2
HS3
HS4
ZIF-SOCK775-15u
Y8
Y30
Y29
Y28
Y27
Y26
Y25
Y24
Y23
W8
W30
W29
W28
W27
W26
W25
W24
W23
V8
U8
U30
U29
U28
U27
U26
U25
U24
U23
T8
T30
T29
T28
T27
T26
T25
T24
T23
R8
P8
N8
N30
N29
N28
N27
N26
N25
N24
N23
M8
M30
M29
M28
M27
M26
M25
M24
M23
L8
K8
K30
K29
K28
K27
K26
K25
K24
K23
J9
J8
J30
J29
J28
J27
J26
J25
J24
J23
J22
J21
J20
J19
J18
J15
J14
J13
J12
J11
J10
AN9
AN8

1
2
3
4
AN30
AN29
AN26
AN25
VCCP
CAPS FOR FSB GENERIC

in
VTT_OUT_LEFT R330 124R1% R313 10R
CPU_GTLREF0 6
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
R341 C358 C354

i-
GTLREF VOLTAGE SHOULD BE C1U16Y
0.63*VTT = 0.756V 210R1% C220P50N
V_FSB_VTT

V_FSB_VTT L6 10U125m_0805-1 H_VCCA


VTT_OUT_LEFT R329 124R1% R335 10R
CPU_GTLREF1 6
L7 10U125m_0805-1 H_VCCABB
C189 C188 C181
B R315 C361
C1U16Y
C360
is X_C1U16Y C10U10Y0805 C10U10Y0805 B

210R1% C220P50N H_VSSA

VTT_PWG SPEC :
VTT_OUT_LEFT R343 124R1% R333 10R VTT_OUT_RIGHT R369 680R
CPU_GTLREF2 6 High > 0.9V
kn

VCC5_SB Low < 0.3V


R357 C383 C381
C1U16Y Trise < 150ns
210R1% C220P50N
R351
1KR VTT_PWG

VTT_OUT_LEFT R334 124R1% R338 10R Q43


CPU_GTLREF3 6 9,31 VID_GD#
te

R352 5.6KR
N-PMBS3904_SOT23-RH C376
R339 C374 C371
C1U16Y X_C1U16Y
210R1% C220P50N

PLACE AT CPU END OF ROUTE


w.

R332 130R1% FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS


VTT_OUT_RIGHT H_PROCHOT# AND CEDAR MILL ARE SUPPORTED
6,8 VTT_OUT_RIGHT H_PROCHOT# 6
R372 62R H_CPURST#
H_CPURST# 6,10
V_FSB_VTT
VTT_OUT_LEFT R367 X_100R H_PWRGD RN13
A 6 VTT_OUT_LEFT H_PWRGD 6,20 A
R314 62R H_BR#0 1 2 H_FSBSEL1
H_BR#0 6,10 H_FSBSEL1 6,12,19
3 4 H_FSBSEL0
ww

H_FSBSEL0 6,12,19
5 6 H_FSBSEL2
H_FSBSEL2 6,12,19
V_FSB_VTT 7 8

R346 62R H_IERR#


H_IERR# 6
8P4R-470R
MSI MICRO-STAR INt'L CO., LTD.
V_FSB_VTT Title
Intel LGA775 - Power
R366 62R H_FERR# Size Document Number Rev
H_FERR# 6,20 3.0
PLACE AT ICH END OF ROUTE
MS-7231
Date: Thursday, September 06, 2007 Sheet 7 of 36
8 7 6 5 4 3 2 1
A
B
C
D

8
8

R557
X_0N_R0402MS

AD7
AD4
AC7
AC6
AC3

AE28
AE27
AE26
AE25
AE24
AE20
AE2
AE17
AE16
AE13
AE10
AB7
AB30
AB29
AB28
AB27
AB26
AB25
AB24
AB23
AB1
AA7
AA6
AA30
AA3
AA29
AA28
AA27
AA26
AA25
AA24
AA23
A9
A6
A24
A21
A2
A18
A15
A12
6,7 VTT_OUT_RIGHT

R323
_49.9R1%-1

U10C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29 VSSVSS

7
7

AE30 Y3 H_COMP6
VSS COMP6
AE5 VSS COMP7 AE3 H_COMP7
AE7 VSS RSVD AE4
AF10 VSS RSVD D1
R324

AF13 VSS RSVD D14


AF16 VSS RSVD E23
TP25

AF17 VSS
_49.9R1%-1

AF20 VSS RSVD E5


AF23 VSS RSVD E6
TP23

AF24 VSS RSVD E7


AF25 VSS RSVD F23
TP24

AF26 VSS IMPSEL# F6


AF27 VSS RSVD B13
ww
AF28 VSS
AF29 VSS
R495

AF3 VSS RSVD J3


AF30 VSS RSVD N4
24.9R1%
R214

AF6 VSS RSVD P5


R322

AF7
0N_R0402MS

VSS
AG10 VSS MSID[1] V1
X_51R0402

AG13 VSS MSID[0] W1


w.
AG16 VSS RSVD AC4

6
6

AG17 VSS
R342

AG20 VSS
AG23 VSS VSS Y7
AG24 Y5
0N_R0402MS

VSS VSS
AG7 VSS VSS Y2
AH1 VSS VSS W7
AH10 VSS VSS W4
AH13 V7
te
VSS VSS
AH16 VSS VSS V6
AH17 VSS VSS V30
AH20 VSS VSS V3
AH23 VSS VSS V29
AH24 VSS VSS V28
AH3 VSS VSS V27
AH6 VSS VSS V26
AH7 VSS VSS V25
kn
AJ10 V24
2005 Perf FMB

VSS VSS
2005 Value FMB

AJ13 VSS VSS V23


AJ16 VSS VSS U7
AJ17 VSS VSS U1
AJ20 T7
0
0

VSS VSS
AJ23 VSS VSS T6
AJ24 T3

5
5

VSS VSS
MSID1

AJ27 VSS VSS R7


is
AJ28 VSS VSS R5
AJ29 VSS VSS R30
AJ30 VSS VSS R29
AJ4 VSS VSS R28
AJ7 R27
1
0

VSS VSS
CPU_W2_U1 66

AK10 R26
MSID0

VSS VSS
R556 X_0N_R0402MS

AK13 VSS VSS R25


AK16 VSS VSS R24
AK17 R23
i-
VSS VSS
AK2 VSS VSS R2
AK20 VSS VSS P7
AK23 VSS VSS P4
AK24 VSS VSS P30
AK27 VSS VSS P29
AK28 VSS VSS P28
AK29 P27

ZIF-SOCK775-15u
VSS VSS
AK30 P26
in
VSS VSS
AK5 VSS VSS P25
AK7 VSS VSS P24
AL10 P23

6,7 VTT_OUT_RIGHT
6,7 VTT_OUT_RIGHT
VSS VSS
AL13 N7

4
4

VSS VSS
AL16 VSS VSS N6
AL17 VSS VSS N3
R553

AL20 VSS VSS M7


AL23 VSS VSS M1
do
AL24 VSS VSS L7
X_0N_R0402MS

AL27 VSS VSS L6


AL28 L30
9

VSS VSS
AL3 VSS VSS L3
AL7 VSS VSS L29
AM1 L28
9

VSS VSS
AM10 VSS VSS L27
AM13 VSS VSS L26
ne
AM16 VSS VSS L25
VID7

AM17 VSS VSS L24


AM20 VSS VSS L23
R493

AM23 VSS VSS K7


VID_SEL

AM24 VSS VSS K5


R494

AM27 K2
_680R0402-1

VSS VSS
AM28 VSS VSS J7
AM4 J4
_680R0402-1

VSS VSS
AM7 H9
si
VSS VSS
AN1 VSS VSS H8
3
3

AN10 VSS VSS H7


AN13 VSS VSS H6
AN16 VSS VSS H3
AN17 VSS
AN2 VSS VSS H28
AN20 VSS VSS H27
AN23 VSS VSS H26
a.
AN24 VSS VSS H25
AN27 VSS VSS H24
AN28 VSS VSS H23
AN7 VID_SELECT VSS H22
B1 VSS VSS H21
B11 VSS VSS H20
B14 VSS VSS H19
VSS H18
co
VSS H17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

m
Title

Size
F4
F7

B5
B8
E2
E8

C4
C7
D3
D5
D6
D9
G1

Date:
F10
F13
F16
F19
F22

B17
B20
B24
E11
E14
E17
E20
E25
E26
E27
E28
E29

C10
C13
C16
C19
C22
C24
D12
D15
D18
D21
D24
H10
H11
H12
H13
H14

2
2

MSI
R559
R558

Document Number

Thursday, September 06, 2007


X_0N_R0402MS
X_0N_R0402MS

MS-7231
Intel LGA775 - GND

Sheet
1
1

8
of
MICRO-STAR INt'L CO., LTD.

36
Rev
3.0
A
B
C
D
8 7 6 5 4 3 2 1

+12VP_FET

+12VP_FET
VREG_12V_POWER CH-1.2U18ACOIL1
CH-1.2U18ACOIL1
VREG_12V_POWER
C567 C570 C568 EC67
R363 C0.1U25X C0.1U25X C0.1U25X C569 2 1
5.6KR C0.1U25X

+
C571 C4.7U35Y1206 CB8
ENVTT R362 1KR CD330U16OS-1 C573 C1U16X0805-1 X_C4.7U35Y1206
VREG_12V_POWER

D
Q42 R376 10KR U_G1 UG1
VID_GD# 7,31
R497 Q55
VCC5

m
N-PMBS3904_SOT23-RH R498 2.2R0805 R542 G N-IPD09N03LA_TO252 COIL2
BOOT1 10KR CH-0.25U40A

S
D 4.7R0805 D
U32 R499 C575
2 1 2.2R0805 C0.1U25X
BOOT UGATE PHASE1
7 8

co
PVCC PHASE VCCP
6 VCC REVERSE TYPE
VCCP 3
REVERSE TYPE
ENVTT C576 PWM R500
4 GND LGATE 5 S S
C577 D D 2.2R0805
R501 VREG_12V_POWER C1U16X0805-1 ISL6612A_SOIC8 L_G1 LG1 G G

1
X_1KR C1U16X0805-1
R502 0R0805 Q56 Q57 CP34
PWM1 N-IPF06N03LA_TO252-3 N-IPF06N03LA_TO252-3 C578
X_COPPER

a.
R503 C3.3N50X

2
C579 6.2KR0402
C580
C0.1U16X
R504 1KR +12VP_FET ISEN1
U20 EC68

19
33
ISL6306/6326CR PWM2 2 1 C581 C4.7U35Y1206
C1U16X0805-1 PWM2 R505 C582 C1U16X0805-1

+
32 PWM2 26

VCC
EN_VTT
EN_PWR ISEN2+ 430/0402 ISEN2
21,31 VRM_GD 36 VR_RDY ISEN2+ 27
VID7 40 C584 VREG_12V_POWER CD330U16OS-1
8 VID7 ISEN2- 28

D
VID7 C583

si
6 VID[0..6] VID6 1 C0.1U16X0402 U_G2 UG2
VID5 VID6 PHASE2 4.64KR1%0402 PWM3 R507 Q58
2 VID5
VID4 3 R506 2.2R0805 R549 G N-IPD09N03LA_TO252 COIL3
VID3 VID4 PWM1 R510 C0.1U16X0402 R508 BOOT2 CH-0.25U40A
4 20 10KR

S
VID2 VID3 PWM1 ISEN1+ 430/0402 ISEN1 4.7R0805 R509 C585
5 21 U34
VID1 VID2 ISEN1+ C587 2.2R0805 C0.1U25X
6 VID1 ISEN1- 22 2 BOOT UGATE 1
VID0 C586 C0.1U16X0402 PWM4 PHASE2
7 VID0 7 PVCC PHASE 8 VCCP
8 PHASE1 4.64KR1%0402 6
VRSEL R511 VCC REVERSE TYPE REVERSE TYPE
3

ne
8 VID_SEL R554 1KR PWM3 R513 C0.1U16X0402 PWM R514
PWM3 31 4 GND LGATE 5 S S
R512 20KR C588 C1500P50X
12 30 ISEN3+ 430/0402 ISEN3 D D 2.2R0805
R515 C591 COMP ISEN3+ C589 C590 ISL6612A_SOIC8 L_G2 LG2
ISEN3- 29 G G

1
2.15KR1%0402 C10P50N C592 C0.1U16X0402
13 FB
C VCCP 14 PHASE3 4.64KR1%0402 C1U16X0805-1 R516 0R0805 Q59 Q60 CP35 C
C593 R518 IDROOP R517 N-IPF06N03LA_TO252-3 N-IPF06N03LA_TO252-3 C594
C680P50X 750R PWM4 R521 C0.1U16X0402 C3.3N50X X_COPPER
25

2
R520 0R PWM4 ISEN4+ 430/0402 ISEN4
15 VDIFF ISEN4+ 24
100R R522 R523 C596

do
ISEN4- 23
R519 X_R X_R C595 C0.1U16X0402 +12VP_FET ISEN2
PHASE4 4.64KR1%0402 EC69
6 VCC_VRM_SENSE 17 37 R524 2 1 C597 C4.7U35Y1206
VSEN VR_FAN R525 C0.1U16X0402 C598 C1U16X0805-1

+
VR_HOT 38
C599 16 10KR VCC5 VREG_12V_POWER
R526 1KR RGND R527 CD330U16OS-1
10

D
DAC
X_C0.1U25X

X_C0.01U50X 11 39 10KR U_G3 UG3


REF TM R528 Q61
34 9
GND

6 VSS_VRM_SENSE FS OFS
X_C0.1U25X

in
35 18 R529 2.2R0805 R550 G N-IPD09N03LA_TO252 COIL4
SS TCOMP
C0.01U50X

C0.01U50X
C602

C603

BOOT3 10KR CH-0.25U40A

S
4.7R0805
120K-0603

100R VCC5 VCC5 VCC5 U35 R531 C604


41

R530 R533 2 1 2.2R0805 C0.1U25X


BOOT UGATE
R532

C600 240KRST 7 8 PHASE3


PVCC PHASE VCCP
6 VCC REVERSE TYPE REVERSE TYPE
C601 3
R536 C605 PWM R537
4 GND LGATE 5 S S
R535

R534 2KR1% D D 2.2R0805

i-
Bottom pad 10KR X_R C1U16X0805-1 ISL6612A_SOIC8 L_G3 LG3 G G

1
ISEN2+ ISEN3+
connect to R538 0R0805 Q62 Q63 CP36
ISEN1+ ISEN4+ GND N-IPF06N03LA_TO252-3 N-IPF06N03LA_TO252-3 C606
22KR0402

R539 C3.3N50X X_COPPER

2
0R

R540 +12VP_FET 0.8375~1.6V / 119A


2.74KR1%0402 EC70 ISEN3
10K/6/1/thermistor

is 2 1 C612 C4.7U35Y1206
R541

C613 C1U16X0805-1

+
RT2

B VREG_12V_POWER B
C607 C609 CD330U16OS-1

D
C68P50N0402 C68P50N0402 U_G4 UG4
C608 C610 R543 Q64
C68P50N0402 C68P50N0402 R544 2.2R0805 R551 G N-IPD09N03LA_TO252 COIL5
BOOT4 10KR CH-0.25U40A

S
4.7R0805
kn

U36 R545 C614


TDK 2 1 2.2R0805 C0.1U25X
BOOT UGATE PHASE4
NTCG104KF104FT 7 PVCC PHASE 8 VCCP
3 Phase Option: Remove all phase4 parts and pop on resistor 6 REVERSE TYPE REVERSE TYPE
VR FAN TRIP:1.69V ~ 80 degC VCC
3 PWM
C615 4 5 S S R546
VCC5 GND LGATE 2.2R0805
D D
C1U16X0805-1 ISL6612A_SOIC8 L_G4 LG4 G G

1
te

PWM4 R547 0R0805 Q65 Q66 C616 CP37


R548 N-IPF06N03LA_TO252-3 N-IPF06N03LA_TO252-3 C3.3N50X
X_2.2R0805 X_COPPER

2
VREG_12V_POWER JPW1
3 1 ISEN4
12V GND
0.8375~1.6V / 119A
C118 4 2
w.

C0.01U50X 12V GND


PWR-2X2M HS1 HS2
HS-MS7033-RH HS-MS7033-RH

VCCP

2
ww

EC73 C10U6.3X1206 EC74 C10U6.3X1206

2
A EC75 C10U6.3X1206 EC76 C10U6.3X1206 EC77 C10U6.3X1206 EC78 C10U6.3X1206 A
EC79 C10U6.3X1206 EC80 C10U6.3X1206 EC81 C10U6.3X1206 EC82 C10U6.3X1206
EC84 C10U6.3X1206 EC85 C10U6.3X1206
VCCP EC86 C10U6.3X1206 EC87 C10U6.3X1206

EC89 1+ 2 CD560U2.5FP VCCP


EC90 1+
EC91 1+
2 CD560U2.5FP
EC92 1+ <OrgAddr1> MICRO-STAR INt'L CO., LTD.
2 CD560U2.5FP 2 CD560U2.5FP
EC93 1+ 2 CD560U2.5FP EC94 1+ 2 CD560U2.5FP EC95 1+ 2 CD560U2.5FP
EC96 1+ EC97 1+ EC98 1+ Title
2 CD560U2.5FP 2 CD560U2.5FP 2 X_C220U2SP
EC100 1+ 2 C470U2SP VRM11 - INTERSIL 6326 4PHASE
EC101 1+ 2 CD560U2.5FP EC102 1+ 2 X_C470U2SP
EC103 1+ Size Document Number Rev
2 CD560U2.5FP 3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 9 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

V_1P5_CORE

AG10
AG11
AG12
AG13
AG14
AC22
AD14
AA22
AB21
AB22
AB23

AK14
AK15
AK20
AF10
AF11
AF12
AF13
AF14
AF30

AJ13
AJ14

W17
W18
W19
W20
W22
W24
W26
W27
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9

AH1
AH2
AH4

M17
AK2
AK3
AK4
N17

AF6
AF7
AF8
AF9

R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
P17
P18
P20
P21

V15
V17
V18
V19
V20
V21
V22
V23
V25
V27

Y15
AJ5
U15A
H_A#3 J39 P41 H_D#0

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
6 H_A#[3..31] HA3# HD0# H_D#[0..63] 6
H_A#4 K38 M39 H_D#1
H_A#5 J42 HA4# HD1# H_D#2
HA5# HD2# P42
H_A#6 K35 M42 H_D#3

m
H_A#7 J37 HA6# HD3# H_D#4
D
HA7# HD4# N41 D
H_A#8 M34 M40 H_D#5
H_A#9 N35 HA8# HD5# H_D#6
HA9# HD6# L40
H_A#10 R33 M41 H_D#7

co
H_A#11 N32 HA10# HD7# H_D#8
HA11# HD8# K42
H_A#12 N34 G39 H_D#9
H_A#13 M38 HA12# HD9# H_D#10
HA13# HD10# J41
H_A#14 N42 G42 H_D#11
H_A#15 N37 HA14# HD11# H_D#12
HA15# HD12# G40
H_A#16 N38 G41 H_D#13
H_A#17 R32 HA16# HD13# H_D#14
HA17# HD14# F40
H_A#18 R36 F43 H_D#15
HA18# HD15#

a.
H_A#19 U37 F37 H_D#16
H_A#20 R35 HA19# HD16# H_D#17
HA20# HD17# E37
H_A#21 R38 J35 H_D#18
H_A#22 V33 HA21# HD18# H_D#19
HA22# HD19# D39
H_A#23 U34 C41 H_D#20
H_A#24 U32 HA23# HD20# H_D#21
HA24# HD21# B39
H_A#25 V42 B40 H_D#22
H_A#26 U35 HA25# HD22# H_D#23
HA26# HD23# H34

si
H_A#27 Y36 C37 H_D#24
H_A#28 Y38 HA27# HD24# H_D#25
HA28# HD25# J32
H_A#29AA37 B35 H_D#26
H_A#30 V32 HA29# HD26# H_D#27
HA30# HD27# J34
H_A#31 Y34 B34 H_D#28
HA31# HD28# H_D#29
HD29# F32
M36 L32 H_D#30
6 H_ADSTB#0 HAD_STB0# HD30#
V35 J31 H_D#31
6 H_ADSTB#1 HAD_STB1# HD31#
F38 H31 H_D#32

ne
HPCREQ# HD32# H_D#33
HD33# M33
AA41 K31 H_D#34
6,7 H_BR#0 HBREQ0# HD34#
C D42 M27 H_D#35 C
6 H_BPRI# HBPRI# HD35#
K29 H_D#36
HD36# H_D#37
6 H_BNR# U39 HBNR# HD37# F31
H29 H_D#38
HD38# H_D#39
6 H_LOCK# U40 HLOCK# HD39# F29
L27 H_D#40

do
HD40# H_D#41
6 H_ADS# W42 HADS# HD41# M24
J26 H_D#42
H_REQ#0E41 HD42# H_D#43
6 H_REQ#[0..4] HREQ0# HD43# K26
H_REQ#1D41 G26 H_D#44
H_REQ#2K36 HREQ1# HD44# H_D#45
HREQ2# HD45# H24
H_REQ#3
G37 K24 H_D#46
H_REQ#4E42 HREQ3# HD46# H_D#47
HREQ4# HD47# F24
E31 H_D#48
HD48#

in
U41 A33 H_D#49
6 H_HIT# HHIT# HD49#
W41 E40 H_D#50
6 H_HITM# HHITM# HD50#
P40 D37 H_D#51
6 H_DEFER# HDEFER# HD51#
C39 H_D#52
HD52# H_D#53
6 H_TRDY# W40 HTRDY# HD53# D38
U42 D33 H_D#54
6 H_DBSY# HDBSY# HD54#
V41 C35 H_D#55
6 H_DRDY# HDRDY# HD55#
Y40 D34 H_D#56
HEDRDY# HD56# H_D#57

i-
6 H_RS#[0..2] HD57# C34
H_RS#0 T40 B31 H_D#58
H_RS#1 Y43 RS0# HD58# H_D#59
RS1# HD59# C31
H_RS#2 T43 C32 H_D#60
RS2# HD60# H_D#61
HD61# D32
M31 B30 H_D#62
19 CK_H_MCH HCLKP HD62#
M29 D30 H_D#63
19 CK_H_MCH# HCLKN HD63#
AJ9 K40 H_DBI#0
B 21,31 PWR_GD
6,7 H_CPURST# C30
PWROK
HCPURST#
is KDINV_0#
HDINV_1# A38
E29
H_DBI#1
H_DBI#2
H_DBI#[0..3] 6 B

HDINV_2# H_DBI#3
20,24,28 PLTRST# AJ12 RSTIN# HDINV_3# B32
ICH_SYNC# M18
21 ICH_SYNC# ICH_SYNC#
HD_STBP0# K41 H_DSTBP#0 6
HD_STBN0# L43 H_DSTBN#0 6
R207 16.9R1% HXRCOMP A28
HXSCOMP HRCOMP
C27 HSCOMP HD_STBP1# F35 H_DSTBP#1 6
kn

HXSWING B27 G34


HSWING HD_STBN1# H_DSTBN#1 6
MCH_GTLREF_CPU D27 J27
HDVREF HD_STBP2# H_DSTBP#2 6
D28 HACCVREF HD_STBN2# M26 H_DSTBN#2 6
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD

E34

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
HD_STBP3# H_DSTBP#3 6
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Rule: HD_STBN3# B37 H_DSTBN#3 6
te

(INTEL-QG82945G-A2)
AA35
AA42
AA34
AA38
L15
M15
U27
R27
A43
M11
AG25
AG26
AG27
AJ24
AJ27
AK40
AL39
AW17
AW18
AY14
BC16
AD30
AC34
Y30
Y33
AF31
AD31
U30
V31
AA30
AC30
AK21
AJ23
AJ26
AL29
AL20
AJ21
AL26
AK27
AJ29
AG29
V30

BC43
BC42
BC2
BC1
BB43
BB2
BB1
BA2
AW26
AW2
AV27
AV26
E35
C42
C2
B43
B42
B41
B3
B2
A42

Y17
Y18
Y19
Y21
Y23
Y25
Y27
AA15
AA17
AA18
AA19
AA20
HXRCOMP_N_10/7/7
HXSCOMP_N_5/8/8
V_1P5_CORE
HSWING_N_15/10/10
w.

GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V


V_FSB_VTT V_FSB_VTT 124 OHM OVER 210 RESISTORS
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%

A
PLACE DIVIDER RESISTOR NEAR VTT R189 A
124R1%
R194
ww

R195 10R MCH_GTLREF_CPU


MCH_GTLREF_CPU 6
R212 HXSCOMP 301R1%
V_FSB_VTT
R205 62R HXSWING R192 C200 C208 C156
_60.4R1%-1
C209 R198
210R1% C0.1U25Y X_C220P50N C0.1U25Y
MSI MICRO-STAR INt'L CO., LTD.
X_C2.2P50N 84.5R1% C205
C0.1U25Y Title
Intel Lakeport - CPU
CAPS SHOULD BE PLACED NEAR MCH PIN
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 10 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

14 DQM_A[0..7]

14,16 SCKE_A[0..1]

14 DATA_A[0..63]

BA7 DATA_A10
BB7 DATA_A11
AV1 DATA_A12
AW4 DATA_A13
BC6 DATA_A14
AY7 DATA_A15
AW12DATA_A16
AY10 DATA_A17
BA12 DATA_A18
BB12 DATA_A19
BA9 DATA_A20
BB9 DATA_A21
BC11 DATA_A22
AY12 DATA_A23
AM20 DATA_A24
AM18 DATA_A25
AV20 DATA_A26
AM21 DATA_A27
AP17 DATA_A28
AR17 DATA_A29
AP20 DATA_A30
AT20 DATA_A31
AP32 DATA_A32
AV34 DATA_A33
AV38 DATA_A34
AU39 DATA_A35
AV32 DATA_A36
AT32 DATA_A37
AR34 DATA_A38
AU37 DATA_A39
AR41 DATA_A40
AR42 DATA_A41
AN43 DATA_A42
AM40 DATA_A43
AU41 DATA_A44
AU42 DATA_A45
AP41 DATA_A46
AN40 DATA_A47
AL41 DATA_A48
AL42 DATA_A49
AF39 DATA_A50
AE40 DATA_A51
AM41 DATA_A52
AM42 DATA_A53
AF41 DATA_A54
AF42 DATA_A55
AD40 DATA_A56
AD43 DATA_A57
AA39 DATA_A58
AA40 DATA_A59
AE42 DATA_A60
AE41 DATA_A61
AB41 DATA_A62
AB42 DATA_A63

BB25 SCKE_A0
AY25 SCKE_A1
AP3 DATA_A0
AP2 DATA_A1
AU3 DATA_A2
AV4 DATA_A3
AN1 DATA_A4
AP4 DATA_A5
AU5 DATA_A6
AU2 DATA_A7
AW3 DATA_A8
AY3 DATA_A9

AY2 DQM_A1
BB10 DQM_A2
AP18 DQM_A3
AT34 DQM_A4
AP39 DQM_A5
AG40 DQM_A6
AC40 DQM_A7
AR3 DQM_A0

m
BC24
BA25
D D

U15B
14,16 SCS_A#[0..1] SCS_B#[0..1] 15,16
SCS_A#0 BB37 BA40 SCS_B#0

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9

SADM0
SADM1
SADM2
SADM3
SADM4
SADM5
SADM6
SADM7
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

SACKE0
SACKE1
SACKE2
SACKE3

co
SCS_A#1 SACS0# SBCS0# SCS_B#1
BA39 SACS1# SBCS1# AW41
BA35 SACS2# SBCS2# BA41
AY38 SACS3# SBCS3# AW40

RAS_A# BA34 BA23 RAS_B#


14,16 RAS_A# SARAS# SBRAS# RAS_B# 15,16
CAS_A# BA37 AY24 CAS_B#
14,16 CAS_A# SACAS# SBCAS# CAS_B# 15,16
WE_A# BB35 BB23 WE_B#
14,16 WE_A# SAWE# SBWE# WE_B# 15,16

a.
MAA_A0 BA32 BB22 MAA_B0
14,16 MAA_A[0..13] SAMA0 SBMA0 MAA_B[0..13] 15,16
MAA_A1 AW32 BB21 MAA_B1
MAA_A2 SAMA1 SBMA1 MAA_B2
BB30 SAMA2 SBMA2 BA21
MAA_A3 BA30 AY21 MAA_B3
MAA_A4 SAMA3 SBMA3 MAA_B4
AY30 SAMA4 SBMA4 BC20
MAA_A5 BA27 AY19 MAA_B5
MAA_A6 SAMA5 SBMA5 MAA_B6
BC28 SAMA6 SBMA6 AY20
MAA_A7 AY27 BA18 MAA_B7
SAMA7 SBMA7

si
MAA_A8 AY28 BA19 MAA_B8
MAA_A9 SAMA8 SBMA8 MAA_B9
BB27 SAMA9 SBMA9 BB18
MAA_A10 AY33 BA22 MAA_B10
MAA_A11 SAMA10 SBMA10 MAA_B11
AW27 SAMA11 SBMA11 BB17
MAA_A12 BB26 BA17 MAA_B12
MAA_A13 SAMA12 SBMA12 MAA_B13
BC38 SAMA13 SBMA13 AW42

ODT_A0 AW37 AY42 ODT_B0


ODT_A1 SAODT0 SBODT0 ODT_B1
AY39 AV40

ne
SAODT1 SBODT1
14,16 ODT_A[0..1] AY37 SAODT2 SBODT2 AV43 ODT_B[0..1] 15,16
BB40 SAODT3 SBODT3 AU40
C C
SBS_A0 BC33 AW23 SBS_B0
14,16 SBS_A[0..2] SABA0 SBBA0 SBS_B[0..2] 15,16
SBS_A1 AY34 AY23 SBS_B1
SBS_A2 SABA1 SBBA1 SBS_B2
BA26 SABA2 SBBA2 AY17

DQS_A0 AU4 AM8 DQS_B0

do
14 DQS_A0 SADQS0 SBDQS0 DQS_B0 15
DQS_A#0 AR2 AM6 DQS_B#0
14 DQS_A#0 SADQS0# SBDQS0# DQS_B#0 15
DQS_A1 BA3 AV7 DQS_B1
14 DQS_A1 SADQS1 SBDQS1 DQS_B1 15
DQS_A#1 BB4 AR9 DQS_B#1
14 DQS_A#1 SADQS1# SBDQS1# DQS_B#1 15
DQS_A2 AY11 AV13 DQS_B2
14 DQS_A2 SADQS2 SBDQS2 DQS_B2 15
DQS_A#2 BA10 AT13 DQS_B#2
14 DQS_A#2 SADQS2# SBDQS2# DQS_B#2 15
DQS_A3 AU18 AU23 DQS_B3
14 DQS_A3 SADQS3 SBDQS3 DQS_B3 15
DQS_A#3 AR18 AR23 DQS_B#3
14 DQS_A#3 SADQS3# SBDQS3# DQS_B#3 15
DQS_A4 AU35 AT29 DQS_B4
14 DQS_A4 SADQS4 SBDQS4 DQS_B4 15

in
DQS_A#4 AV35 AV29 DQS_B#4
14 DQS_A#4 SADQS4# SBDQS4# DQS_B#4 15
DQS_A5 AP42 AP36 DQS_B5
14 DQS_A5 SADQS5 SBDQS5 DQS_B5 15
DQS_A#5 AP40 AM35 DQS_B#5
14 DQS_A#5 SADQS5# SBDQS5# DQS_B#5 15
DQS_A6 AG42 AG34 DQS_B6
14 DQS_A6 SADQS6 SBDQS6 DQS_B6 15
DQS_A#6 AG41 AG32 DQS_B#6
14 DQS_A#6 SADQS6# SBDQS6# DQS_B#6 15
DQS_A7 AC42 AD36 DQS_B7
14 DQS_A7 SADQS7 SBDQS7 DQS_B7 15
DQS_A#7 AC41 AD38 DQS_B#7
14 DQS_A#7 SADQS7# SBDQS7# DQS_B#7 15
P_DDR0_A P_DDR0_B

i-
14 P_DDR0_A BB32 SACLK0 SBCLK0 AM29 P_DDR0_B 15
N_DDR0_A AY32 AM27 N_DDR0_B
14 N_DDR0_A SACLK0# SBCLK0# N_DDR0_B 15
P_DDR1_A AY5 AV9 P_DDR1_B
14 P_DDR1_A SACLK1 SBCLK1 P_DDR1_B 15
N_DDR1_A BB5 AW9 N_DDR1_B
14 N_DDR1_A SACLK1# SBCLK1# N_DDR1_B 15
P_DDR2_A AK42 AL38 P_DDR2_B
14 P_DDR2_A SACLK2 SBCLK2 P_DDR2_B 15
N_DDR2_A AK41 AL36 N_DDR2_B
14 N_DDR2_A SACLK2# SBCLK2# N_DDR2_B 15
BA31 SACLK3 SBCLK3 AP26
BB31 SACLK3# SBCLK3# AR26
AY6 AU10
B
BA5
AH40
SACLK4
SACLK4#
is SBCLK4
SBCLK4# AT10
AJ38
B

SACLK5 SBCLK5
AH43 SACLK5# SBCLK5# AJ36

SMPCOMP_N AL5 MCH_VREF_A


SMPCOMP_P MCH_SRCOMP0 MCH_VREF_B
AJ6 MCH_SRCOMP1 SMVREF1 AM2
AJ8 AM4 MCH_VREF_A C317
SMOCDCOMP0 SMVREF0
kn

AM3 C320 PLACE 0.1UF CAP CLOSE TO MCH C0.1U25Y


SMOCDCOMP1
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

SBCKE0
SBCKE1
SBCKE2
SBCKE3
C0.1U25Y

SBDM7
SBDM6
SBDM5
SBDM4
SBDM3
SBDM2
SBDM1
SBDM0
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9

Rule:
AL6
AL8
AP8
AP9
AJ11
AL9

AP6
AU7
AV6
AV12

AR5
AR7

AP21

AP24

AP37

BA14
AY16
BA13
BB13
AM10

AM11

AR12
AR10

AV15
AM15
AM13

AM17
AN12
AR13
AP15
AT15

AV24
AM24
AM23

AM26

AR21

AT24
AU27
AN29
AR31

AP27
AM31

AR27
AP31
AU31
AP35

AN32
AL35
AR35
AU38
AM38
AM34
AL34
AJ34
AF32
AF34
AL31
AJ32
AG35
AD32
AC32
AD34
Y32
AA32
AF35
AF37
AC33
AC35

AD39
AJ39
AR38
AR29
AP23
AP13
AW7
AL11
(INTEL-QG82945G-A2)
te

PLACE 0.1UF CAP CLOSE TO MCH


SMPCOMP_N_12mils
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9

SCKE_B0
SCKE_B1
CP8
SMPCOMP_P_12mils

DQM_B7
DQM_B6
DQM_B5
DQM_B4
DQM_B3
DQM_B2
DQM_B1
DQM_B0
X_COPPER
VCC_DDR
15 DATA_B[0..63]
R287 X_0R MCH_VREF_B
R290 1KR1%
w.

15,16 SCKE_B[0..1]
MCH_VREF_A

15 DQM_B[0..7]
R295

A
VCC_DDR 1KR1% A
ww

R288 80.6R1% R286 80.6R1%


SMPCOMP_N SMPCOMP_P

C325 MSI MICRO-STAR INt'L CO., LTD.


C0.1U25Y
Title
Intel Lakeport - Memory
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 11 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

V_1P5_CORE VCC_DDR
V_1P5_PCIEXPRESS

AW13
AW15
AW20
AW21
AW24
AW29
AW31
AW34
AW35
AC15
AC17
AC18
AC20
AC24
AC26
AC27
AD15
AD17
AD19
AD21
AD23
AD25
AD26

BC13
BC18
BC22
BC26
BC31
BC35
BC40
AA24
AA26
AB17
AB18
AB19
AB20
AB24
AB25
AB26
AB27

AE17
AE18
AE20
AE22
AE24
AE26
AE27

AY43
AV18
AV21
AV23
AV31
AV42

AY41
BB16
BB20
BB24
BB28
BB33
BB38
BB42
AF15
AF17
AF19
EXP_EN: PCI Express* SDVO MCH MEMORY DECOUPLING

N10
N11
N12

R10
R11
R13

U13
N5
N7
N9

R5

U6
U7
U8
Concurrent Select U15C

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
0: Only SDVO or PCI-E Operational G12 V_1P5_CORE
EXPARXP0
F12 EXPARXN0
1: SDVO and PCI-E operating D11 C312 C10U10Y0805
EXPARXP1
simultaneously via PCI Express-G D12 EXPARXN1 EXPATXP0 D14
J13 C13 C314

m
port EXPARXP2 EXPATXN0 C10U10Y0805
D H13 EXPARXN2 EXPATXP1 A13 D
E10 B12 C313 C0.1U16Y0402
EXPARXP3 EXPATXN1
F10 EXPARXN3 EXPATXP2 A11
J9 B10

co
EXPARXP4 EXPATXN2
H10 EXPARXN4 EXPATXP3 C10
F7 EXPARXP5 EXPATXN3 C9
F9 EXPARXN5 EXPATXP4 A9
C4 EXPARXP6 EXPATXN4 B7
D3 D7 VCC_DDR
EXPARXN6 EXPATXP5
G6 EXPARXP7 EXPATXN5 D6
J6 A6 CLOSE TO GMCH C343 C10U10Y0805
EXPARXN7 EXPATXP6
K9 EXPARXP8 EXPATXN6 B5

a.
K8 E2 C341 C10U10Y0805
EXPARXN8 EXPATXP7
F4 EXPARXP9 EXPATXN7 F1
G4 G2 C244 C0.1U25Y C346 C0.1U25Y
EXPARXN9 EXPATXP8 SDVOC_Clk+ 32
M6 J1 C255 C0.1U25Y
32 SDVOC_Int+ EXPARXP10 EXPATXN8 SDVOC_Clk- 32
M7 J3 C265 C0.1U25Y
32 SDVOC_Int- EXPARXN10 EXPATXP9 SDVOC_Blue+ 32
K2 K4 C269 C0.1U25Y
EXPARXP11 EXPATXN9 SDVOC_Blue- 32
L1 L4 C270 C0.1U25Y
VCC3 EXPARXN11 EXPATXP10 SDVOC_Green+ 32
U11 M4 C276 C0.1U25Y
EXPARXP12 EXPATXN10 SDVOC_Green- 32

si
U10 M2 C277 C0.1U25Y VCC_DDR
EXPARXN12 EXPATXP11 SDVOC_Red+ 32
R8 N1 C280 C0.1U25Y
EXPARXP13 EXPATXN11 SDVOC_Red- 32
R203 R7 P2 C282 C0.1U25Y C339 C10U10Y0805
EXPARXN13 EXPATXP12 SDVOB_Clk+ 23
1KR P4 T1 C289 C0.1U25Y
EXPARXP14 EXPATXN12 SDVOB_Clk- 23
N3 T4 C288 C0.1U25Y C337 C0.1U25Y
EXPARXN14 EXPATXP13 SDVOB_Blue+ 23
Y10 U4 C292 C0.1U25Y
23 SDVO_TVClk+ EXPARXP15 EXPATXN13 SDVOB_Blue- 23
Y11 U2 C295 C0.1U25Y C326 C10U10Y0805
23 SDVO_TVClk- EXPARXN15 EXPATXP14 SDVOB_Green+ 23
R202 X_0R F20 V1 C301 C0.1U25Y
EXP_EN EXPATXN14 SDVOB_Green- 23
V3 C299 C0.1U25Y

ne
EXPATXP15 SDVOB_Red+ 23
DMI_ITP_MRP_0 Y7 W4 C302 C0.1U25Y
20 DMI_ITP_MRP_0 DMI RXP0 EXPATXN15 SDVOB_Red- 23
DMI_ITN_MRN_0 Y8
20 DMI_ITN_MRN_0 DMI RXN0
C DMI_ITP_MRP_1 AA9 W2 DMI_MTP_IRP_0 C
20 DMI_ITP_MRP_1 DMI RXP1 DMI TXP0 DMI_MTP_IRP_0 20
DMI_ITN_MRN_1 AA10 Y1 DMI_MTN_IRN_0
20 DMI_ITN_MRN_1 DMI RXN1 DMI TXN0 DMI_MTN_IRN_0 20
DMI_ITP_MRP_2 AA6 AA2 DMI_MTP_IRP_1
20 DMI_ITP_MRP_2 DMI RXP2 DMI TXP1 DMI_MTP_IRP_1 20
DMI_ITN_MRN_2 AA7 AB1 DMI_MTN_IRN_1
20 DMI_ITN_MRN_2 DMI RXN2 DMI TXN1 DMI_MTN_IRN_1 20
DMI_ITP_MRP_3 AC9 Y4 DMI_MTP_IRP_2
20 DMI_ITP_MRP_3 DMI RXP3 DMI TXP2 DMI_MTP_IRP_2 20
DMI_ITN_MRN_3 AC8 AA4 DMI_MTN_IRN_2

do
20 DMI_ITN_MRN_3 DMI RXN3 DMI TXN2 DMI_MTN_IRN_2 20
AB3 DMI_MTP_IRP_3
DMI TXP3 DMI_MTP_IRP_3 20
CK_PE_100M_MCH DMI_MTN_IRN_3
19 CK_PE_100M_MCH B14
CK_PE_100M_MCH# B16 GCLKP DMI TXN3 AC4 DMI_MTN_IRN_3 20 Rule:15-mil
19 CK_PE_100M_MCH# GCLKN
AC12 GRCOMP R271 V_1P5_PCIEXPRESS
EXP_COMPO 24.9R1%
EXP_COMPI AC11
SDVO_CtrlData F15 close to GMCH 500MILS
23,32 SDVO_CtrlData SDVOCTRLDATA
SDVO_CtrlClk E15 D17 CRTHSYNC R216 39R
23,32 SDVO_CtrlClk SDVOCTRLCLK HSYNC HSYNC 18
C17 CRTVSYNC
VSYNC VSYNC 18

in
R208 39R
R179 10KR SEL0 F21 F17
6,7,19 H_FSBSEL0 BSEL0 RED VGA_RED 18
R193 10KR SEL1 H21 K17
6,7,19 H_FSBSEL1 BSEL1 GREEN VGA_GREEN 18
R190 X_10KR SEL2 L20 H18
6,7,19 H_FSBSEL2 BSEL2 BLUE VGA_BLUE 18
AK17 RSV_TP[0]
R184 X_1KR1% AL17 G17
V_1P5_CORE RSV_TP[1] RED#
R3000 J17
10KR R186 X_1KR1% NOA_6 GREENB
K21 EXP_SLR BLUE# J18

i-
AK23 RSV_TP[2]
AK18 N18 MCH_DDC_DATA
RSV_TP[3] DDC_DATA MCH_DDC_DATA 18
L21 N20 MCH_DDC_CLK
RSV_TP[4] DDC_CLK MCH_DDC_CLK 18
EXP_SLR: PCI Express L18 RSV_TP[5]
N21 J15 CK_96M_DREF
Static Lane Reversal RSV_TP[6] DREFCLKINP
H15 CK_96M_DREF#
CK_96M_DREF 19
DREFCLKINN CK_96M_DREF# 19
0: BTX 1: ATX VCCA_HPLL C21 A20 DACREFSET R201 255R1%
VCCA_MPLL VCCAHPLL IREF
B20
B

I = 70mA
VCCA_DPLLA
VCCA_DPLLB
C19
B19
VCCAMPLL
VCCADPLLA
is EXTTS# J20 EXTTS R225 10KR
V_2P5_MCH
B

VCCA_GPLL VCCADPLLB TP27


B17 VCCA_EXPPLL XORTEST H20

L10 180L1500m_90 D19 K18 TP28


V_2P5_MCH VCC2 ALLZTEST

VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
C18 VCCADAC
V_2P5_DAC_FILTERED B18
V_2P5_MCH VCCADAC
A18 C240
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSSA_DAC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
kn

C206 C237
+

EC24 X_C10P50N
.CD100U16EL11 C0.1U25Y (INTEL-QG82945G-A2)
A24
B23
B24
B25
B26
C23
C25
C26
D23
D24
D25
E23
E24
E26
E27
F23
F27
G23
H23
J23
K23
L23
M23
N23
P23

AF21
AF23
AF25
AF26
AF27
AF29
AG15
AG17
AG18
AG19
AG20
AG21
AG22
AG23
AG24
AJ15
AJ17
AJ18
AJ20

AE4
AE3
AE2
AD12
AD10
AD8
AD6
AD5
AD4
AD2
AD1
AC13
AC6
AC5
AA13
AA5
Y13
V13
V9
V10
V7
V6
V5
C0.01U50X V_1P5_PCIEXPRESS FSB GENERIC DECOUPLING
V_FSB_VTT
te

V_1P5_CORE
V_FSB_VTT

I = 60mA 10U125m_0805-1 I = 55mA I = 45mA


L12 600L250m_500 L11 _1U500m_0805-RH
VCCA_MPLL L5 VCCA_DPLLA R209 1R1% VCCA_GPLL
V_1P5_CORE V_1P5_CORE V_1P5_CORE
C195 R210 1R1% C236 C228 C201 C187 C179
+

C196 C224 EC20 C223 C232 C10U10Y0805 C0.1U25Y C0.1U25Y C0.1U25Y


w.

C1U16Y .CD100U16EL11 C0.1U25Y C10U10Y0805 C10U10Y0805 C1U16Y


C10U10Y0805

A A

I = 55mA I = 45mA I = 1.5A


ww

L8 10U125m_0805-1 L13 600L250m_500 L15 0R1206


VCCA_DPLLB VCCA_HPLL V_1P5_PCIEXPRESS
V_1P5_CORE V_1P5_CORE V_1P5_CORE

MICRO-STAR INt'L CO., LTD.


+

MSI
+

EC21 C186 C222 C197 C225 C316 C310 C10U10Y0805 C309


.CD100U16EL11 C0.1U25Y C0.1U25Y .CD220U10EL7 C0.1U25Y
C10U10Y0805 C311 C10U10Y0805 Title
Intel Lakeport - PCI EXPRESS
C10U10Y0805
Size Document Number Rev
MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 12 of 36
8 7 6 5 4 3 2 1
A
B
C
D

5
5

H32
H27
H26
H17
H12
G38
G35
G32
G31
G29
G27
G24
G21
G20
G18
G15
G13
G10
G9
G7
G5
G3
F42
F34
F26
F18
F13
F6
F2
E32
E21
E20
E18
E17
E13
E12
E9
E7
E4
E3
D21
D20
D16
D10
D5
D2
C40
C22
C14
C12
C7
C5
C3
B38
B33
B28
B22
B21
B13
B11
B9
B6
B4
A35
A31
A26
A22
A16

J10
J7
J5
J2
U15D

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J12 VSS VSS AL37


J21 VSS VSS AL43
J24 VSS VSS AM5
J29 VSS VSS AM7
J38 VSS VSS AM9
J43 VSS VSS AM33
K3 VSS VSS AM36
K5 VSS VSS AM37
K6 VSS VSS AM39
K7 VSS VSS AN2
K10 VSS VSS AN4
K12 VSS VSS AN13
K13 VSS VSS AN15
K15 VSS VSS AN17
K20 VSS VSS AN18
K27 VSS VSS AN20
K32 VSS VSS AN21
K34 VSS VSS AN23
K37 VSS VSS AN24
K39 VSS VSS AN26
L2 VSS VSS AN27
L12 VSS VSS AN31
L13 VSS VSS AN42
ww
L24 VSS VSS AP5
L26 VSS VSS AP7
L29 VSS VSS AP10
L31 VSS VSS AP12
L42 VSS VSS AP29
M3 VSS VSS AP34
M5 VSS VSS AP38

4
4

M8 VSS VSS AR1


w.
M9 VSS VSS AR6
M10 VSS VSS AR15
M13 VSS VSS AR20
M20 VSS VSS AR24
M21 VSS VSS AR32
M35 VSS VSS AR37
M37 VSS VSS AR39
N2 VSS VSS AR43
N6 AT12
te
VSS VSS
N8 VSS VSS AT17
N13 VSS VSS AT18
N15 VSS VSS AT21
N24 VSS VSS AT23
N26 VSS VSS AT26
N27 VSS VSS AT27
N29 VSS VSS AT31
N31 VSS VSS AU6
kn
N33 VSS VSS AU9
N36 VSS VSS AU12
N39 VSS VSS AU13
N43 VSS VSS AU15
P3 VSS VSS AU17
P14 VSS VSS AU20
P15 VSS VSS AU21
P24 VSS VSS AU24
is
P26 VSS VSS AU26
P27 VSS VSS AU29
P29 VSS VSS AU32
P30 VSS VSS AU34
R6 VSS VSS AV2
R9 VSS VSS AV10
R12 VSS VSS AV17
R14 VSS VSS AV37
R30 AW10
i-
VSS VSS
R31 BA4

3
3

VSS VSS
R34 VSS VSS BA42
R37 VSS VSS BB3
R39 VSS VSS BB6
T2 VSS VSS BB11
T42 VSS VSS BB14
U3 VSS VSS BB19
U5 BB34
in
VSS VSS
U9 VSS VSS BB39
U12 VSS VSS BB41
U14 VSS VSS BC9
U31 VSS VSS A4
U33 VSS VSS A40
U36 VSS VSS D1
U38 VSS VSS D43
V2 VSS VSS R26
do
V8 VSS VSS R29
V11 VSS VSS U29
V12 VSS VSS V24
V14 VSS VSS V26
V34 VSS VSS V29
V36 VSS VSS W21
V37 VSS VSS W23
V38 VSS VSS W25
ne
V39 VSS VSS Y20
V43 VSS VSS Y22
W3 VSS VSS Y24
Y2 VSS VSS Y26
Y5 VSS VSS Y29
Y6 VSS VSS AA25
Y9 VSS VSS AA27
Y12 VSS VSS AA29
Y14 AC19
si
VSS VSS
Y31 VSS VSS AC25
Y35 VSS VSS AC29
2 Y37 VSS VSS AD18
2

Y39 VSS VSS AD20


Y42 VSS VSS AD22
AA3 VSS VSS AD24
AA8 VSS VSS AD27
AF18 VSS VSS AD29
a.
AE21 VSS VSS AE19
AE23 VSS VSS AF20
AE25 VSS VSS AF22
L17 VSS VSS AF24
VSS AY1
VSS BC4
co
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AJ7
AL1
AL2
AL3
AL7

AF1
AF2
AF3
AF5

AB2
AC2
AC3
AC7
AD7
AD9
AJ10
AJ30
AJ31
AJ33
AJ35
AJ37
AL10
AL12
AL13
AL15
AL18
AL21
AL23
AL24
AL27
AL32
AL33

AF33
AF36
AF38
AF43

AA11
AA12
AA14
AA21
AA23
AA31
AA33
AA36
AB43
AK24
AK26
AK29
AK30

AC10
AC14
AC21
AC23
AC31
AC36
AC37
AC38
AC39
AD11
AD13
AD33
AD35
AD37
AD42
AH42

AG30
AG31
AG33
AG36
AG37
AG38
AG39

m
Title

Size

Date:
(INTEL-QG82945G-A2)

MSI

Document Number

Wednesday, September 05, 2007


1
1

MS-7231
Intel Lakeport - GND

Sheet
13
of
MICRO-STAR INt'L CO., LTD.

36
Rev
3.0
A
B
C
D
8 7 6 5 4 3 2 1

VCC_DDR VCC3

DIMM1

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
11 DATA_A[0..63]

RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
NC/TEST

VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC

NC

VDDSPD
DATA_A0 3
DATA_A1 DQ0 DQS_A0
4 DQ1 DQS0 7 DQS_A0 11
DATA_A2 9 6 DQS_A#0
DQ2 DQS0# DQS_A#0 11
DATA_A3 10 16 DQS_A1
DQ3 DQS1 DQS_A1 11
DATA_A4 122 15 DQS_A#1
DQ4 DQS1# DQS_A#1 11
DATA_A5 123 28 DQS_A2

m
DQ5 DQS2 DQS_A2 11
D DATA_A6 128 27 DQS_A#2 D
DQ6 DQS2# DQS_A#2 11
DATA_A7 129 37 DQS_A3
DQ7 DQS3 DQS_A3 11
DATA_A8 12 36 DQS_A#3
DQ8 DQS3# DQS_A#3 11
DATA_A9 13 84 DQS_A4

co
DQ9 DQS4 DQS_A4 11
DATA_A10 21 83 DQS_A#4
DQ10 DQS4# DQS_A#4 11
DATA_A11 22 93 DQS_A5
DQ11 DQS5 DQS_A5 11
DATA_A12 131 92 DQS_A#5
DQ12 DQS5# DQS_A#5 11
DATA_A13 132 105 DQS_A6
DQ13 DQS6 DQS_A6 11
DATA_A14 140 104 DQS_A#6
DQ14 DQS6# DQS_A#6 11
DATA_A15 141 114 DQS_A7
DQ15 DQS7 DQS_A7 11
DATA_A16 24 113 DQS_A#7
DQ16 DQS7# DQS_A#7 11
DATA_A17 25 46
DQ17 DQS8

a.
DATA_A18 30 45
DQ18 DQS8# MAA_A[0..13] 11,16
DATA_A19 31
DATA_A20 DQ19 MAA_A0
143 DQ20 A0 188
DATA_A21 144 183 MAA_A1
DATA_A22 DQ21 A1 MAA_A2
149 DQ22 A2 63
DATA_A23 150 182 MAA_A3
DATA_A24 DQ23 A3 MAA_A4
33 DQ24 A4 61
DATA_A25 34 60 MAA_A5
DQ25 A5

si
DATA_A26 39 180 MAA_A6
DATA_A27 DQ26 A6 MAA_A7
40 DQ27 A7 58
DATA_A28 152 179 MAA_A8
DATA_A29 DQ28 A8 MAA_A9
153 DQ29 A9 177
DATA_A30 158 70 MAA_A10
DATA_A31 DQ30 A10_AP MAA_A11
159 DQ31 A11 57
DATA_A32 80 176 MAA_A12
DATA_A33 DQ32 A12 MAA_A13
81 DQ33 A13 196
DATA_A34 86 174

ne
DATA_A35 DQ34 A14
87 DQ35 A15 173
DATA_A36 199
C DATA_A37 DQ36 SBS_A2 C
200 DQ37 A16/BA2 54 SBS_A2 11,16
DATA_A38 205 190 SBS_A1
DQ38 BA1 SBS_A1 11,16
DATA_A39 206 71 SBS_A0
DQ39 BA0 SBS_A0 11,16
DATA_A40 89
DATA_A41 DQ40 WE_A#
90 DQ41 WE# 73 WE_A# 11,16
DATA_A42 95 74 CAS_A#

do
DQ42 CAS# CAS_A# 11,16
DATA_A43 96 192 RAS_A#
DQ43 RAS# RAS_A# 11,16
DATA_A44 208 DQ44 DQM_A[0..7] 11
DATA_A45 209 125 DQM_A0
DATA_A46 DQ45 DM0/DQS9
214 DQ46 NC/DQS9# 126
DATA_A47 215 134 DQM_A1
DATA_A48 DQ47 DM1/DQS10
98 DQ48 NC/DQS10# 135
DATA_A49 99 146 DQM_A2
DATA_A50 DQ49 DM2/DQS11
107 DQ50 NC/DQS11# 147

in
DATA_A51 108 155 DQM_A3
DATA_A52 DQ51 DM3/DQS12
217 DQ52 NC/DQS12# 156
DATA_A53 218 202 DQM_A4
DATA_A54 DQ53 DM4/DQS13
226 DQ54 NC/DQS13# 203
DATA_A55 227 211 DQM_A5
DATA_A56 DQ55 DM5/DQS14
110 DQ56 NC/DQS14# 212
DATA_A57 111 223 DQM_A6
DATA_A58 DQ57 DM6/DQS15
116 DQ58 NC/DQS15# 224
DATA_A59 DQM_A7

i-
117 DQ59 DM7/DQS16 232
DATA_A60 229 233
DATA_A61 DQ60 NC/DQS16#
230 DQ61 DM8/DQS17 164
DATA_A62 235 165
DATA_A63 DQ62 NC/DQS17#
236 DQ63
195 ODT_A0
ODT0 ODT_A0 11,16
2 77 ODT_A1
VSS ODT1 ODT_A1 11,16
5 VSS
8 52 SCKE_A0
B
11
14
VSS
VSS
CKE0
CKE1 171
is
SCKE_A1
SCKE_A0
SCKE_A1
11,16
11,16
B

VSS SCS_A#0
17 VSS CS0# 193 SCS_A#0 11,16
20 76 SCS_A#1
VSS CS1# SCS_A#1 11,16
23 VSS
26 185 P_DDR0_A
VSS CK0(DU) P_DDR0_A 11
29 186 N_DDR0_A
VSS CK0#(DU) N_DDR0_A 11
32 137 P_DDR1_A
VSS CK1(CK0) P_DDR1_A 11
kn

35 138 N_DDR1_A
VSS CK1#(CK0#) N_DDR1_A 11
38 220 P_DDR2_A
VSS CK2(DU) P_DDR2_A 11
41 221 N_DDR2_A
VSS CK2#(DU) N_DDR2_A 11
44 VSS
47 120 SMBCLK_DDR
VSS SCL SMBCLK_DDR 15
50 119 SMBDATA_DDR
VSS SDA SMBDATA_DDR 15
65 VSS
66 1 DIMM_VREF_A
VSS VREF
te

79 VSS
82 VSS
85 239 C486
VSS SA0
88 VSS SA1 240 C0.1U25Y
91 VSS SA2 101
94 PLACE CLOSE TO DIMM PIN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
97 VSS
ADDRESS: 000
DDRII-240_green
w.
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

DDR2 DIMM1

A A

VCC_DDR
ww

R459 1KR1% DIMM_VREF_A

SMBCLK_DDR R426 33R


SMBCLK_MAIN 19,20,28,30,31
R451 SMBDATA_DDR R425 33R
SMBDATA_MAIN 19,20,28,30,31 MSI MICRO-STAR INt'L CO., LTD.
1KR1%
Title
DDR II DIMM 1
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 14 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
DIMM2

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
11 DATA_B[0..63]

RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC/TEST
NC

VDDSPD
DATA_B0 3
DATA_B1 DQ0 DQS_B0
4 DQ1 DQS0 7 DQS_B0 11
DATA_B2 9 6 DQS_B#0
DQ2 DQS0# DQS_B#0 11
DATA_B3 10 16 DQS_B1

m
DQ3 DQS1 DQS_B1 11
D DATA_B4 122 15 DQS_B#1 D
DQ4 DQS1# DQS_B#1 11
DATA_B5 123 28 DQS_B2
DQ5 DQS2 DQS_B2 11
DATA_B6 128 27 DQS_B#2
DQ6 DQS2# DQS_B#2 11
DATA_B7 129 37 DQS_B3

co
DQ7 DQS3 DQS_B3 11
DATA_B8 12 36 DQS_B#3
DQ8 DQS3# DQS_B#3 11
DATA_B9 13 84 DQS_B4
DQ9 DQS4 DQS_B4 11
DATA_B10 21 83 DQS_B#4
DQ10 DQS4# DQS_B#4 11
DATA_B11 22 93 DQS_B5
DQ11 DQS5 DQS_B5 11
DATA_B12 131 92 DQS_B#5
DQ12 DQS5# DQS_B#5 11
DATA_B13 132 105 DQS_B6
DQ13 DQS6 DQS_B6 11
DATA_B14 140 104 DQS_B#6
DQ14 DQS6# DQS_B#6 11
DATA_B15 141 114 DQS_B7
DQ15 DQS7 DQS_B7 11

a.
DATA_B16 24 113 DQS_B#7
DQ16 DQS7# DQS_B#7 11
DATA_B17 25 46
DATA_B18 DQ17 DQS8
30 DQ18 DQS8# 45 MAA_B[0..13] 11,16
DATA_B19 31
DATA_B20 DQ19 MAA_B0
143 DQ20 A0 188
DATA_B21 144 183 MAA_B1
DATA_B22 DQ21 A1 MAA_B2
149 DQ22 A2 63
DATA_B23 150 182 MAA_B3
DQ23 A3

si
DATA_B24 33 61 MAA_B4
DATA_B25 DQ24 A4 MAA_B5
34 DQ25 A5 60
DATA_B26 39 180 MAA_B6
DATA_B27 DQ26 A6 MAA_B7
40 DQ27 A7 58
DATA_B28 152 179 MAA_B8
DATA_B29 DQ28 A8 MAA_B9
153 DQ29 A9 177
DATA_B30 158 70 MAA_B10
DATA_B31 DQ30 A10_AP MAA_B11
159 DQ31 A11 57
DATA_B32 80 176 MAA_B12

ne
DATA_B33 DQ32 A12 MAA_B13
81 DQ33 A13 196
DATA_B34 86 174
C DATA_B35 DQ34 A14 C
87 DQ35 A15 173
DATA_B36 199
DATA_B37 DQ36 SBS_B2
200 DQ37 A16/BA2 54 SBS_B2 11,16
DATA_B38 205 190 SBS_B1
DQ38 BA1 SBS_B1 11,16
DATA_B39 206 71 SBS_B0
DQ39 BA0 SBS_B0 11,16
DATA_B40 89

do
DATA_B41 DQ40 WE_B#
90 DQ41 WE# 73 WE_B# 11,16
DATA_B42 95 74 CAS_B#
DQ42 CAS# CAS_B# 11,16
DATA_B43 96 192 RAS_B#
DQ43 RAS# RAS_B# 11,16
DATA_B44 208 DQ44 DQM_B[0..7] 11
DATA_B45 209 125 DQM_B0
DATA_B46 DQ45 DM0/DQS9
214 DQ46 NC/DQS9# 126
DATA_B47 215 134 DQM_B1
DATA_B48 DQ47 DM1/DQS10
98 DQ48 NC/DQS10# 135

in
DATA_B49 99 146 DQM_B2
DATA_B50 DQ49 DM2/DQS11
107 DQ50 NC/DQS11# 147
DATA_B51 108 155 DQM_B3
DATA_B52 DQ51 DM3/DQS12
217 DQ52 NC/DQS12# 156
DATA_B53 218 202 DQM_B4
DATA_B54 DQ53 DM4/DQS13
226 DQ54 NC/DQS13# 203
DATA_B55 227 211 DQM_B5
DATA_B56 DQ55 DM5/DQS14
110 DQ56 NC/DQS14# 212
DATA_B57 DQM_B6

i-
111 DQ57 DM6/DQS15 223
DATA_B58 116 224
DATA_B59 DQ58 NC/DQS15# DQM_B7
117 DQ59 DM7/DQS16 232
DATA_B60 229 233
DATA_B61 DQ60 NC/DQS16#
230 DQ61 DM8/DQS17 164
DATA_B62 235 165
DATA_B63 DQ62 NC/DQS17#
236 DQ63
195 ODT_B0
ODT0 ODT_B0 11,16
2 77 ODT_B1
B
5
8
VSS
VSS
ODT1
52
is
SCKE_B0
ODT_B1 11,16 B

VSS CKE0 SCKE_B0 11,16


11 171 SCKE_B1
VSS CKE1 SCKE_B1 11,16
14 VSS
17 193 SCS_B#0
VSS CS0# SCS_B#0 11,16
20 76 SCS_B#1
VSS CS1# SCS_B#1 11,16
23 VSS
26 185 P_DDR0_B
VSS CK0(DU) P_DDR0_B 11
kn

29 186 N_DDR0_B
VSS CK0#(DU) N_DDR0_B 11
32 137 P_DDR1_B
VSS CK1(CK0) P_DDR1_B 11
35 138 N_DDR1_B
VSS CK1#(CK0#) N_DDR1_B 11
38 220 P_DDR2_B
VSS CK2(DU) P_DDR2_B 11
41 221 N_DDR2_B
VSS CK2#(DU) N_DDR2_B 11
44 VSS
47 120 SMBCLK_DDR
VSS SCL SMBDATA_DDR
50 VSS SDA 119
te

65 VSS
66 1 DIMM_VREF_B
VSS VREF
79 VSS
82 VCC3
VSS C484
85 VSS SA0 239
88 VSS SA1 240 C0.1U25Y
91 VSS SA2 101
94 PLACE CLOSE TO DIMM PIN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
97
w.

VSS
ADDRESS: 010
DDRII-240_green 0xA4
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

DDR2 DIMM2
A A
ww

VCC_DDR
R449 1KR1% DIMM_VREF_B
SMBCLK_DDR
SMBDATA_DDR
SMBCLK_DDR 14 MSI MICRO-STAR INt'L CO., LTD.
SMBDATA_DDR 14
R458
Title
1KR1%
DDR II DIMM 2
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 15 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VTT_DDR VTT_DDR

MAA_A4 2 1 MAA_B4 2 1
CHANNEL A V_SM_VTT MAA_A3 4 3 RN36 MAA_B1 4 3 RN44
CHANNEL B V_SM_VTT MAA_A2 6 5 MAA_B3 6 5
DECOULPING CAPS MAA_A1 8 7 8P4R-33R0402 MAA_B2 8 7 8P4R-33R0402
DECOULPING CAPS MAA_A9 2 1 MAA_B9 2 1
MAA_A5 4 3 RN35 MAA_B8 4 3 RN43
MAA_A8 6 5 MAA_B5 6 5
MAA_A6 8 7 8P4R-33R0402 MAA_B6 8 7 8P4R-33R0402
VTT_DDR SBS_A2 2 1 SBS_B2 2 1

m
D MAA_A12 4 3 RN39 MAA_B12 4 3 RN42 D
C482 MAA_A11 6 5 MAA_B11 6 5
C0.1U25Y MAA_A7 8 7 8P4R-33R0402 MAA_B7 8 7 8P4R-33R0402
C483 MAA_A13 R455 33R0402 MAA_B0 2 1

co
C0.1U25Y VTT_DDR RAS_A# 2 1 SBS_B1 4 3 RN45
11,14 RAS_A#
WE_A# 4 3 MAA_B10 6 5
11,14 WE_A#
C539 6 5 RN37 SBS_B0 8 7 8P4R-33R0402
C4.7U35Y1206 CAS_A# 8 7 8P4R-33R0402
VTT_DDR 11,14 CAS_A#
C540 MAA_A0 2 1 RAS_B# 2 1
11,15 RAS_B#
X_C4.7U35Y1206 MAA_A10 4 3 4 3 RN46
C475 SBS_A0 6 5 RN40 WE_B# 6 5
11,15 WE_B#
C4.7U35Y1206 SBS_A1 8 7 8P4R-33R0402 CAS_B# 8 7 8P4R-33R0402
11,15 CAS_B#

a.
C541
X_C4.7U35Y1206 VTT_DDR SCS_A#0 R453 43R0402 MAA_B13 R482 33R0402
C535 SCS_A#0 change 43 ohm
C0.1U25Y ODT_A0 R454 43R0402 SCS_B#0 2 1
C525 ODT_B0 4 3 RN47
C0.1U25Y SCS_B#1 6 5
C520 2 1 8 7 8P4R-43R0402
C0.1U25Y SCKE_A1 4 3 RN38 2 1

si
C532 6 5 4 3 RN41
C0.1U25Y SCKE_A0 8 7 8P4R-43R0402 SCKE_B1 6 5
VTT_DDR C533 SCKE_B0 8 7 8P4R-43R0402
C0.1U25Y SCS_A#1 2 1
C478 C528 4 3 RN34
C0.1U25Y C0.1U25Y ODT_A1 6 5 ODT_B1 R483 43R0402
C479 8 7 8P4R-43R0402
C0.1U25Y
C480

ne
C0.1U25Y VTT_DDR
C481 C526
C C0.1U25Y C0.1U25Y C
11,14 MAA_A[0..13] 11,15 MAA_B[0..13]
C485 C529
C0.1U25Y C0.1U25Y
11,14 SBS_A[0..2] 11,15 SBS_B[0..2]

11,14 SCS_A#[0..1] 11,15 SCS_B#[0..1]

do
11,14 SCKE_A[0..1] 11,15 SCKE_B[0..1]

11,14 ODT_A[0..1] 11,15 ODT_B[0..1]

in
Grantsdale GMCH Power Sequencing
VCC_DDR
Requirement Between 1.5V Core and 2.5V DAC

i-
VCC3
V_2P5_MCH
C489 Q21 _N-NDS351AN_NL_SOT23-LF
C1U16Y
VCC_DDR D S
VCC_DDR C493
EC65 CD1800U6.3EL20-2 C1U16Y +12V

1
C536 EC25

+
B +
C1U16Y
C530
is C491
C1U16Y
C198
R211 .CD100U16EL11 C227
B

2
C1U16Y C10U16Y1206 C183 U7A 130R1% C0.1U25Y
C477 C474 C0.1U25Y

8
C1U16Y C1U16Y
C527 3
C1U16Y C494 + 1P2VREF 31
1
C473 C1U16Y 2
kn

C1U16Y LM358MX_SOIC8 -
C487

4
C1U16Y C172
C523 C210 R213 X_C1U16Y
C1U16Y VCC_DDR X_C100P50N 120R1%
C524
C1U16Y
te

VCC_DDR VCC_DDR C559 C1000P50N0402 V_1P5_CORE V_2P5_MCH


D8
C443
C518 X_C68P50X C1U16Y C560 C1000P50N0402
C438 1N4001_DO214AC
C1U16Y
C515 X_C68P50X C561 C1000P50N0402
w.

C437
C521 X_C68P50X C1U16Y C562 C1000P50N0402
C440
C1U16Y
C519 X_C68P50X C441 C563 C1000P50N0402
A
C1U16Y A
C531
C517 X_C68P50X C1U16Y C564 C1000P50N0402
ww

C534
C1U16Y
C516 X_C68P50X C565 C1000P50N0402
MSI MICRO-STAR INt'L CO., LTD.
C566 C1000P50N0402
Title
COVER SHEET
Size Document Number Rev
3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 16 of 36
8 7 6 5 4 3 2 1
1 2 3 4 5

PCI PULL-UP / DOWN RESISTORS


VCC3
VCC3_SB VCC5 -12V +12V VCC3
+12V VCC5 20,25,33 FRAME#
PREQ#3 2 1 VCC5
20,25 PREQ#3
FRAME# 8 7 VCC5 PREQ#1 4 3
20 PREQ#1
LOCK# 6 5 PREQ#2 6 5 RN10
20,33 SERR# 20,33 PREQ#2
PCIE_1 4 3 RN8 8 7 8P4R-2.7KR
SERR# 2 1 8P4R-2.7KR

m
B1 A1 PREQ#4 2 1
+12V1 PRSNT1- 20 PREQ#4
A B2 A2 PERR# 4 3 A
+12V2 12V3 RN20
B3 GND1 12V4 A3 6 5
B4 A4 R111 2.7KR PREQ#5 8 7 8P4R-2.7KR
20 PREQ#5

co
GND2 GND3
B5 VCC3_1 VCC3_2 A5
B6 A6 PREQ#0
VCC3AUX VCC3_3 20 PREQ#0
CK_PCIE0 B7 A7 CK_PCIE1
19 CK_PCIE0 CK_PCIE0 CK_PCIE1 CK_PCIE1 19
B8 A8 R112 2.7KR
CK_PCIE0# GND4 GND5 CK_PCIE1#
19 CK_PCIE0# B9 CK_PCIE0# CK_PCIE1# A9 CK_PCIE1# 19
PCI_CLK1 B10 A10 PCI_CLK0
19 PCI_CLK1 PCI_CLK1 PCI_CLK0 PCI_CLK0 19
B11 A11 C102 X_C0.1U25Y
GND6 GND7 VCC5 VCC3
C308 X_C0.1U25Y

a.
20,25,33 PREQ#[0..5]
HSI_P2 B12 A12
20 HSI_P2 HSI_P2 GND8 20,25,33 STOP#
HSI_N2 B13 A13 HSI_N1
20 HSI_N2 HSI_N2 HSI_N1 HSI_N1 20 20,25,33 DEVSEL#
B14 A14 HSI_P1 STOP# 8 7 VCC5
23,31,32 PCIRST_SLT# PERST- HSI_P1 HSI_P1 20 20,25,33 TRDY#
B15 A15 DEVSEL# 6 5
NC1 GND11 20,25,33 IRDY# RN9
HSO_P2 B16 A16 TRDY# 4 3
20 HSO_P2 HSO_P2 GND13
HSO_N2 B17 A17 HSO_N1 IRDY# 2 1 8P4R-2.7KR
20 HSO_N2 HSO_N2 HSO_N1 HSO_N1 20

si
WAKE# B18 A18 HSO_P1 PCIRST_SLT# R106 X_2.2KR
21 WAKE# WAKE- HSO_P1 HSO_P1 20

B19 GND14 GND15 A19


B20 A20 PIRQ#D 2 1 VCC3
GND16 GND17 20 PIRQ#D
B21 A21 PIRQ#B 4 3
NC2 NC9 20 PIRQ#B
B22 A22 PIRQ#A 6 5 RN7
NC3 NC4 20 PIRQ#A
B23 A23 8 7 8P4R-8.2KR

ne
GND18 GND19 PIRQ#G
B24 GND20 GND21 A24 20 PIRQ#G 2 1
B25 A25 PIRQ#F 4 3 RN21
NC5 NC7 20 PIRQ#F
B26 A26 PIRQ#H 6 5 8P4R-8.2KR
B NC6 NC8 20 PIRQ#H B
B27 A27 PIRQ#E 8 7
GND22 GND23 20,25 PIRQ#E
B28 -12V +12V5 A28
B29 A29 PIRQ#C
GND24 +12V6 20,33 PIRQ#C
B30 VCC5_2 REQ64# A30

do
B31 A31 R108 8.2KR
VCC5_3 GND47 R113
20 PREQ#0 B32 PREQ#0 VCC5_4 A32
2.7KR

20,25,33 PERR# B33 PERR# VCC5_5 A33


B34 GND25 GND26 A34
B35 VCC5_9 GND27 A35
B36 A36

in
VCC5_13 SB3V VCC3_SB
B37 GND29 AD0 A37 AD0 20,25,33
B38 A38
20,25,33 AD1
B39
AD1 VCC5_6
A39
DECOUPLING CAPACITORS
GND30 AD2 AD2 20,25,33
20,25,33 AD3 B40 AD3 GND31 A40
B41 VCC5_7 AD8 A41 AD8 20,25,33
B42 A42 +12V
20,25,33 AD6 AD6 AD5 AD5 20,25,33
20,25,33 AD4 B43 AD4 VCC3_4 A43

i-
B44 GND32 AD7 A44 AD7 20,25,33
20,25,33 C_BE#0 B45 C_BE#0 AD10 A45 AD10 20,25,33
20,25,33 AD9 B46 AD9 GND33 A46
B47 A47 C104 C109 C117
VCC3_5 AD11 AD11 20,25,33
B48 A48 C0.1U25Y C0.1U25Y C1000P50X
20,25,33 AD12 AD12 VCC5_11
20,25,33 AD13 B49 AD13 GND34 A49

R110 330R
AD16 B50
B51
IDSEL_1 AD14 A50
A51
is AD14 20,25,33
C 20,25,33 C_BE#1 C_BE#1 AD15 AD15 20,25,33 -12V VCC3_SB C
B52 A52 R109 330R AD20
20,25,33 AD16 AD16 IDSEL_2
B53 VCC3_6 PAR A53 PAR 20,25,33 PAR 20,25,33
B54 A54 PIRQ#C C65
20,25,33 STOP# STOP# PIRQ#C
B55 A55 X_C0.1U25Y C107
20,25,33 DEVSEL# DEVSEL# VCC3_7
B56 A56 C6 X_C0.1U25Y
GND37 TRDY# TRDY# 20,25,33
B57 A57 X_C0.1U25Y C74
kn

20,25,33 C_BE#2 C_BE#2 GND38


B58 A58 C0.1U25Y
VCC3_8 IRDY# IRDY# 20,25,33
20,25,33 FRAME# B59 FRAME# GND39 A59
B60 GND40 LOCK# A60 LOCK# 20 LOCK# 20
20,25,33 AD17 B61 AD17 VCC3_9 A61
B62 A62 VCC5 VCC3
20,25,33 AD18 AD18 AD20 AD20 20,25,33
B63 VCC3_10 AD19 A63 AD19 20,25,33
20,25,33 AD21 B64 AD21 GND41 A64
te

B65 A65 C108


VCC3_11 AD23 AD23 20,25,33
B66 A66 C1000P50X
20,25,33 C_BE#3 C_BE#3 SERR# SERR# 20,33
B67 A67 C13 C70
20,25,33 AD24 AD24 VCC3_12
B68 A68 C0.01U50X C0.1U25Y
GND42 AD26 AD26 20,25,33
B69 A69 C106 C113
20,25,33 AD25 AD25 AD27 AD27 20,25,33
B70 A70 X_C0.1U25Y C0.1U25Y
20,25,33 AD28 AD28 GND43
B71 A71 C238 C114
GND44 PCI_PME# PCI_PME# 20,33 PCI_PME# 20,33
B72 A72 X_C0.1U25Y C1000P50X
w.

20,25,33 AD31 AD31 AD29 AD29 20,25,33


B73 A73 C110 C111
20,25,33 AD30 AD30 VCC3_13
B74 A74 X_C0.1U25Y X_C0.1U25Y
VCC3_14 PGNT#0 PGNT#0 20
B75 A75 C76 C101
20,25,33 AD22 AD22 PREQ#1 PREQ#4 20
B76 A76 X_C0.1U25Y X_C0.1U25Y
20 PGNT#4 PGNT#1 GND45
B77 A77 PIRQ#B C62 C105
PIRQ#D GND46 PIRQ#B PIRQ#A X_C0.1U25Y X_C0.1U25Y
B78 PIRQ#D PIRQ#A A78
B79 VCC5_8 GND50 A79
ww

D B80 A80 SMBDATA_RESUME D


20,31 PCIRST_ICH6# PCIRST# SMBDATA SMBDATA_RESUME 20,21
B81 VCC5_10 GND51 A81
B82 A82 SMBCLK_RESUME
VCC5_12 SMBCLK SMBCLK_RESUME 20,21

SLOT-PCI164_black-1pitch
MICRO-START INT'L CO.,LTD.
Title
PCI-E X1 + PCI Slot
20,25,33 AD[0..31] 20,25,33 C_BE#[0..3] Size Document Number Rev
A3 3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 17 of 36
1 2 3 4 5
1 2 3 4 5

Power 20 mils
Video Connector
V_2P5_MCH D15
BAV99LT1_SOT23 VCC5
2 1 After 150 ohm

m
C176 D14 FS4

3
A C0.1U25Y BAV99LT1_SOT23 F-MICROSMD110 A
POLY SWITCH
2 1 5 mils

co
3
C324
PLACE CLOSE TO MCH, D16 PLACE CLOSE TO VGA CONNECTOR X_C0.1U25Y
WITHIN 500 MIL OF BAV99LT1_SOT23 JVGA1
PIN 2 1 16 N59-15F0361-K06
6

3
VGA_RED L21 0.12U300m-1 CON_R

a.
12 VGA_RED 1 11
7
VGA_GREEN L19 0.12U300m-1 CON_G 2 12 CON_DDCDA 22R R292 5VDDCDA
12 VGA_GREEN
8
VGA_BLUE L18 0.12U300m-1 CON_B 3 13
12 VGA_BLUE
9
C348 C330 C347 C329 4 14

X_C10P50N

X_C10P50N

C22P50N

C22P50N
befor 150 ohm 10

si
5 15 CON_DDCCL 22R R282 5VDDCCL
R224 R226

7
150R1%
12 mils 150R1%
7 mils R310 R299 C336
17
150R1% 150R1% X_C10P50N C335 CN5A CN5D

8
R223 R304 C22P50N CONN-D-SUB_blue-3.18mm 8P4C-47P50N 8P4C-47P50N
150R1% 150R1%

ne
VCC5
B B

14

do
U17A
1
3 VSYNC_5V VCC5
2 R280 33R CON_VSYNC
12 VSYNC
ACT08DR_SOIC14 R279 33R CON_HSYNC

5
in
CON_VSYNC 6 4 CON_DDCDA

5
3
VCC5 CN5C CN5B CON_HSYNC 1 3 CON_DDCCL
8P4C-47P50N 8P4C-47P50N

6
4
D18

2
ESD-IP4220
14

U17D

i-
13
11 HSYNC_5V
12 HSYNC 12 PLACE CLOSE TO VGA CONNECTOR
ACT08DR_SOIC14
7

is PLACE CLOSE TO MCH


C C
kn
te

V_2P5_MCH V_2P5_MCH VCC5 V_2P5_MCH V_2P5_MCH VCC5


w.

R294 R293 R289 R281


2.7KR 2.7KR 2.7KR 2.7KR
G

S D 5VDDCDA S D 5VDDCCL
12 MCH_DDC_DATA 12 MCH_DDC_CLK
ww

D Q37 N-2N7002_SOT23 Q34 N-2N7002_SOT23 D

MICRO-START INT'L CO.,LTD.


Title
VGA Connector
Size Document Number Rev
A3 MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 18 of 36
1 2 3 4 5
8 7 6 5 4 3 2 1

EMC HF filter capacitors, located close to PLL


Clock Generator - ICS954119 Trace length less than 0.5inchs CK_H_CPU R98 49.9R1%0402
CK_H_CPU# R102 49.9R1%0402
U4 CK_H_MCH R85 49.9R1%0402
FB3 80L3_40_0805 43 MCHCLK R86 33R0402 CK_H_MCH CK_H_MCH# R89 49.9R1%0402
CPUCLKT0 CK_H_MCH 10
VCC3V 41 42 MCHCLK# R91 33R0402 CK_H_MCH#
VCC3 VDD_CPU CPUCLKC0 CK_H_MCH# 10
SIO_48MCLK C94 X_C10P50N0402

+
C122 C48 40 CPUCLK R97 33R0402 CK_H_CPU CK_PCIE0 R96 49.9R1%0402
CPUCLKT1 CK_H_CPU 6
C123 C10U16Y1206 C0.1U25Y 38 39 CPUCLK# R101 33R0402 CK_H_CPU# CK_PCIE0# R100 49.9R1%0402
GND CPUCLKC1 CK_H_CPU# 6
C0.1U25Y CK_PE_100M_MCH R118 49.9R1%0402

m
CK_PE_100M_MCH# R125 49.9R1%0402 PCI_CLK1 C61 X_C10P50N0402
D 19 17 CK_PE_SRC1 R95 33R0402 CK_PCIE0 PCI_CLK0 C73 X_C10P50N0402 D
VDDPCIEX PCIEXT0 CK_PCIE0 17
18 CK_PE_SRC1# R99 33R0402 CK_PCIE0# CK_PE_100M_ICH R132 49.9R1%0402
PCIEXC0 CK_PCIE0# 17
34 21 CK_PE_SRC2 R105 33R0402 CK_PCIE1 CK_PE_100M_ICH# R136 49.9R1%0402

co
VDD_PCIEX PCIEXT1 CK_PCIE1 17
22 CK_PE_SRC2# R117 33R0402 CK_PCIE1# CK_ICHSATA R127 49.9R1%0402 ICH_PCLK C49 X_C10P50N0402
PCIEXC1 CK_PCIE1# 17
28 23 CK_PE_SRC3 R119 33R0402 CK_PE_100M_MCH CK_ICHSATA# R134 49.9R1%0402
VDDSRC PCIEXT2 CK_PE_100M_MCH 12
24 CK_PE_SRC3# R122 33R0402 CK_PE_100M_MCH# SIO_PCLK C57 X_C10P50N0402
PCIEXC2 CK_PE_100M_MCH# 12
31 CK_PE_SRC4 R131 33R0402 CK_PE_100M_ICH CK_PCIE1 R104 49.9R1%0402 1394_PCLK C53 X_C10P50N0402
PCIEXT3 CK_PE_100M_ICH 20
C85 C97 C116 29 30 CK_PE_SRC4# R135 33R0402 CK_PE_100M_ICH# CK_PCIE1# R116 49.9R1%0402
GND PCIEXC3 CK_PE_100M_ICH# 20
C0.1U25Y C0.1U25YC0.1U25Y 33 CK_PE_SRC5 R120 X_33R0402 CK_PE_100M_LAN
PCIEXT4 CK_PE_SRC5# R123 X_33R0402 CK_PE_100M_LAN#
25 GND PCIEXC4 32

a.
26 CK_PE_SRC6 R126 33R0402 CK_ICHSATA
SRCCLKT CK_ICHSATA 21
20 27 CK_PE_SRC6# R133 33R0402 CK_ICHSATA# CK_PE_100M_LAN R121 X_49.9R1%0402
GND SRCCLKC CK_ICHSATA# 21
FB2 80L3_40_0805 CK_PE_100M_LAN# R124 X_49.9R1%0402 CK_48M_USB_ICH C92 X_C10P50N0402
VCC3VA 35
VCC3 VDDA CK_DOT96 R90 33R0402 CK_96M_DREF FWH_PCLK C67 X_C10P50N0402
+

DOTT_96MHZ 14 CK_96M_DREF 12
CB2 C103 15 CK_DOT96# R94 33R0402 CK_96M_DREF#
DOTC_96MHZ CK_96M_DREF# 12
C0.1U25Y C112 C0.1U25Y 36 GNDA RN4 8P4R-33R0402 LAN_PCLK C81 X_C10P50N0402
ALE

si
6 7 LANPCLK PCICLK0 2 1 PCI_CLK0
VDDPCI PCICLK_F0 PCI_CLK0 17
8 FSA PCICLK1 4 3 PCI_CLK1
FSA/PCICLK_F1 PCI_CLK1 17
C10U16Y1206 C75 9 FSB 1394PCLK 6 5 1394_PCLK CK_96M_DREF R87 49.9R1%0402
FSB/PCICLK_F2 1394_PCLK 25
C0.1U25Y 5 53 PCICLK0 8 7 CK_96M_DREF# R93 49.9R1%0402 TPM_CLK C71 X_C10P50N0402
GND PCICLK0 PCICLK1
PCICLK1 54
56 55 1394PCLK
VDDPCI PCICLK2 ICHPCLK SIOPCLK R64 33R0402 SIO_PCLK
PCICLK3 2 SIO_PCLK 28

ne
C86 3 SIOPCLK
C0.1U25Y PCICLK4 FWHPCLK ICHPCLK R59 33R0402 ICH_PCLK
1 GND PCICLK5 4 ICH_PCLK 20
C 10 VDD48 C
11 SIO48 R81 33R0402 SIO_48MCLK
SEL24_48#/24_48MHZ SIO_48MCLK 28
C100 12 USB48 R84 33R0402 CK_48M_USB_ICH
USB_48MHZ CK_48M_USB_ICH 21
C0.1U25Y 13 GND

do
46 51 FSC CK_14M_ICH
VDDREF REF0/FSC CK_14M_ICH 21
50 ICH14M R77 33R0402
C121 REF1 PLL_XI C78 C22P50N
X1 48
C0.1U25Y 49 Y2 C79
GND 14.318MHZ16P_D
X2 47 X_C10P50N0402
PLL_XO C82 C22P50N R78 33R0402
R83 0R 45 LANPCLK LAN_PCLK
14,20,28,30,31 SMBCLK_MAIN SCLK LAN_PCLK 33

in
R88 0R 44 16 CK_VID_GD# EMI SUGGESTION 3/15
14,20,28,30,31 SMBDATA_MAIN SDATA VTT_PWRGD#/PD
VCC3V R68 8.2KR 52 RESET# IREF R103 475R1%
IREF 37

ICS954119DFLF_SSOP56

i-
33R R70 FWH_PCLK
BSEL[0..2] Level Shift FWHPCLK
FWH_PCLK 24

X_22R R73 TPM_CLK


TPM_CLK 24

B
is B
kn

SIO48 R79 4.7KR0402

SIO HI=24MHZ
SIO LOW=48MHZ
te

Clock Generator VTT Power Down Block

R107 10KR0402
8P4R-1KR0402 CK_VID_GD# VCC3V
w.

RN5
7 8 FSB
6,7,12 H_FSBSEL1
5 6
3 4 FSA Q14
6,7,12 H_FSBSEL0
1 2 N-PMBS3904_SOT23-RH
ww

A R3001 X_1KR FSC A


6,7,12 H_FSBSEL2
R3002 VIDGD
1KR
VCCP
R92 100KR
<OrgAddr1> MICRO-STAR INt'L CO., LTD.
MSI
Title
Clock Generator - ICS954101
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 19 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

U8A

A20M# AH28 H_A20M# 6


CPUSLP# AG27
FERR# AG26 H_FERR# 6,7
IGNNE# AG22 H_IGNNE# 6
AD0 E18 AF22
17,25,33 AD[0..31] AD0 INIT# H_INIT# 6
AD1 C18 AG21
AD1 INIT3_3V# FWH_INIT# 24
AD2 A16 AF25
AD2 INTR H_INTR 6
AD3 F18 AH24 SERIRQ R177 10KR0402

m
AD3 NMI H_NMI 6 VCC3
D AD4 E16 AF23 KBRST# R170 10KR D

CPU
AD4 SMI# ICH_H_SMI# 6
AD5 A18 AH22 A20GATE R172 10KR
AD5 STPCLK# H_STPCLK# 6
AD6 E17 AG23
AD6 RCIN# KBRST# 28
AD7 A17 AE22

co
AD7 A20GATE A20GATE 28
AD8 A15 AF26
AD8 THRMTRIP# TRMTRIP# 6
AD9 C14 AG24
AD9 GPO49/CPUPWRGD H_PWRGD 6,7
AD10 E14
AD11 AD10
D14 AD11
AD12 B12 C26 R158 33R
AD12 PLTRST# PLTRST# 10,24,28
AD13 C13 V_FSB_VTT
AD14 AD13
G15 AD14 PERN_1 F26 HSI_N1 17
AD15 G13 F25
AD15 PERP_1 HSI_P1 17

a.
AD16 E12 E28 C_HSO_N1 C144 C0.1U25Y R163 62R TRMTRIP#
AD16 PETN_1 HSO_N1 17
AD17 C11 E27 C_HSO_P1 C145 C0.1U25Y
AD17 PETP_1 HSO_P1 17
AD18 D11
AD19 AD18
A11 AD19 PERN_2 H26 HSI_N2 17

PCI
AD20 A10 H25
AD20 PERP_2 HSI_P2 17
AD21 F11 G28 C_HSO_N2 C146 C0.1U25Y
AD21 PETN_2 HSO_N2 17
AD22 F10 G27 C_HSO_P2 C147 C0.1U25Y
AD22 PETP_2 HSO_P2 17
AD23 E9 AD23

PCI EXPRESS

si
AD24 D9 K26
AD25 AD24 PERN_3
B9 AD25 PERP_3 K25
AD26 A8 J28

INTERFACE
AD27 AD26 PETN_3
A6 AD27 PETP_3 J27
AD28 C7
AD29 AD28
B6 AD29 PERN_4 M26
AD30
AD31
E6
D6
AD30 PERP_4 M25
L28
SM BUS ISOLATION
AD31 PETN_4
L27

ne
C_BE#0 PETP_4
17,25,33 C_BE#[0..3] B15 C/BE0#
C_BE#1 C12 P26 (To: PCI,PCI-Express,ICH7)
C C_BE#2 C/BE1# PERN_5 C
D12 C/BE2# PERP_5 P25 SMBDATA_RESUME 17,21
C_BE#3 C15 N28

17,25,33 DEVSEL# A12


F16
C/BE3#

DEVSEL#
ICH 7 PETN_5
PETP_5 N27

T25
+12V
R128

Q15
R141
0R
17,25,33 FRAME# FRAME# PERN_6
A7 T24 X_1KR

do
17,25,33 IRDY# IRDY# PERP_6
F14 R28 R129
17,25,33 TRDY# SMBDATA_MAIN 14,19,28,30,31
17,25,33
17,25,33
STOP#
PAR
F15
E10
E11
TRDY#
STOP#
PAR
PART 1/3 PETN_6
PETP_6 R27 X_4.7KR
X_N-2N7002_SOT23
17 LOCK# PLOCK# 31 SMB_PWROK
17,33 SERR# B10 SERR#
(To: PCI,PCI-Express,ICH7)
C9 C119
17,25,33 PERR# PERR# SMBCLK_RESUME 17,21
B19 V26 X_C0.1U25Y
17,33 PCI_PME# PME# DMI_0RXN DMI_MTN_IRN_0 12
V25 R137
DMI_0RXP DMI_MTP_IRP_0 12

in
A9 U28 Q16 R146
19 ICH_PCLK PCICLK DMI_0TXN DMI_ITN_MRN_0 12
R185 33R B18 U27 0R
17,31 PCIRST_ICH6# PCIRST# DMI_0TXP DMI_ITP_MRP_0 12
X_1KR
17,25,33 PREQ#[0..5]
? C190 X_C100P50N Y26 DMI_MTN_IRN_1 12 SMBCLK_MAIN 14,19,28,30,31

DIRECT MEDIA
PREQ#0 DMI_1RXN
D7 REQ0# DMI_1RXP Y25 DMI_MTP_IRP_1 12
PREQ#1 C16 W28 X_N-2N7002_SOT23
REQ1# DMI_1TXN DMI_ITN_MRN_1 12
PREQ#2 C17 W27
REQ2# DMI_1TXP DMI_ITP_MRP_1 12
PREQ#3 E13
PREQ#4 REQ3# SMBCLK_MAIN R142 2.2KR

i-
A13 GPIO22/REQ4# DMI_2RXN AB26 DMI_MTN_IRN_2 12 VCC3
PREQ#5 C8 AB25 SMBDATA_MAIN R140 2.2KR
GPIO1/REQ5# DMI_2RXP DMI_MTP_IRP_2 12
DMI_2TXN AA28 DMI_ITN_MRN_2 12
DMI_2TXP AA27 DMI_ITP_MRP_2 12
PGNT#0 E7 SMBCLK_RESUME R115 X_4.7KR
17 PGNT#0 GNT0#
D16 AD25 SMBDATA_RESUME R114 X_4.7KR VCC3_SB
GNT1# DMI_3RXN DMI_MTN_IRN_3 12
PGNT#2 D17 AD24
33 PGNT#2 GNT2# DMI_3RXP DMI_MTP_IRP_3 12
PGNT#3 F13 AC28
25 PGNT#3 GNT3# DMI_3TXN DMI_ITN_MRN_3 12
PGNT#4 A14 AC27
B 17 PGNT#4
PGNT#5 D8
GPIO48/GNT4#
GPIO17/GNT5#
is DMI_3TXP
AE28
DMI_ITP_MRP_3 12 B

DMI_CLKN CK_PE_100M_ICH# 19
INTERRUPT

17 PIRQ#A A3 PIRQA# DMI_CLKP AE27 CK_PE_100M_ICH 19


17 PIRQ#B B4 PIRQB#
C5 C25 R143 24.3R1%
17,33 PIRQ#C PIRQC# DMI_ZCOMP V_DMI 22
17 PIRQ#D B5 PIRQD# DMI_IRCOMP D25
17,25 PIRQ#E G8 GPIO2/PIRQE#
F7 V3 LCI_CLK
17 PIRQ#F GPIO3/PIRQF# LAN_CLK LCI_CLK 33
kn

F8 U3 LCI_SYNC
17 PIRQ#G GPIO4/PIRQG# LAN_RSTSYNC LCI_SYNC 33
Stuff if TEKOA not G7 U5 LCI_RXD0
17 PIRQ#H GPIO5/PIRQH# LAN_RXD0 LCI_RXD0 33
V4 LCI_RXD1
present or for AH21
LAN_RXD1
T5 LCI_RXD2
LCI_RXD1 33
24,28 SERIRQ SERIRQ LAN_RXD2 LCI_RXD2 33 VCC3_SB
Non-share SPI. 30 IDE_IRQ AH16 IDEIRQ
U7 LCI_TXD0
RN22 LAN_TXD0 LCI_TXD0 33
V6 LCI_TXD1
LAN

LAN_TXD1 LCI_TXD1 33
7 8 P5 V7 LCI_TXD2
VCC3_SB SPI_MOSI LAN_TXD2 LCI_TXD2 33
te SPI

5 6 P2 U14
SPI_MISO R255 C296
3 4 P6 SPI_CS# EE_CS W1 1 CS VCC 8
1 2 R2 W3 2 7 X_4.7KR X_C0.1U25Y
8P4R-10KR0402 SPI_CLK EE_DIN SK NC
P1 SPI_ARB EE_DOUT Y2 3 DI ORG 6
EE_SHCLK Y1 4 DO GND 5
R240
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40

X_10KR0402 R241 X_AT93C46-10SI-2.7-A


VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

X_1KR0402
w.

R234 (INTEL-NH82801GR-A1-LF)
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
D10
D13
D18
D21
D24
E1
E2
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5

X_1KR0402 PGNT#5

A A

R215
ww

X_200KR

MSI
<OrgAddr1> MICRO-STAR INt'L CO., LTD.
Removed when MP.
Title
ICH7 - PCI, DMI, CPU, IRQ
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 20 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

C261
VCC3
C0.1U25Y
C221 RN14 8P4R-10KR0402
C0.1U25Y LPCPD# 7 8 VCC3_SB
C192 LINK_ALERT# 5 6
C0.1U25Y SM_LINK0 3 4
C203 SM_LINK1 1 2
C0.1U25Y RN12 8P4R-10KR0402
C182 RI# 7 8
24,28 LPC_AD[0..3] VCC3
AF16 C0.1U16Y0402 WAKE# 5 6
DDACK# PD_DACK# 30
LPC_AD0 AA6 AE15 C284 3 4
LAD0 DDREQ PD_DREQ 30
LPC_AD1 AB5 AF15 C0.1U25Y SIO_PME# 1 2
LAD1 DIOR# PD_IOR# 30

LPC
LPC_AD2 AC4 AH15 C207 RN15 8P4R-10KR0402

m
LAD2 DIOW# PD_IOW# 30
D LPC_AD3 Y6 AG16 C0.1U16Y0402 GPI15 7 8 D
LAD3 IORDY PD_IORDY 30
AC3 AH17 C235 SMB_ALERT# 5 6
28 LPC_DRQ#0 LDRQ_0# DA0 PD_A0 30
GPI23 AA5 AE17 C0.1U25Y BATTLOW# 3 4
LDRQ_1#/GPI023 DA1 PD_A1 30
AB3 AF17 FP_RST# 1 2

co
24,28 LPC_FRAME# LFRAME# DA2 PD_A2 30
RN17 8P4R-10KR0402
RN23 8P4R-33R0402 DCS1# AE16
AD16
PD_CS#1 30 CLEAR CMOS JUMPER GPI12 7 8
DCS3# PD_CS#3 30

AC-LINK
8 7 ACBITCLK U1 GPI9 5 6
27 AC_RST# ACZ_BCLK
6 5 ACRST# R5 AB15 PDD0 GPI10 3 4
27 AC_SDOUT ACZ_RST# DD_0 PDD[0..15] 30
4 3 T2 AE14 PDD1 R187 4.7KR 1 2
27 AC_SYNC ACZ_SDIN_0 DD_1 VCC3
2 1 T3 AG13 PDD2
27 AC_BITCLK ACZ_SDIN_1 DD_2

P-ATA
T1 AF13 PDD3 CLEAR_CMOS#
27 AC_SDIN0 ACZ_SDIN_2 DD_3
ACSDOUT T4 AD14 PDD4 ADT7467_ALERT# R246 10KR0402
ACZ_SDOUT DD_4

a.
ACSYNC R6 AC13 PDD5
C273 ACZ_SYNC DD_5 PDD6 GPI13 R181 10KR0402
DD_6 AD12
X_C10P50N0402 AC12 PDD7
DD_7 PDD8 SIO_SMI#
DD_8 AE12 2 1 VCC3
C272 F1 AF12 PDD9 GPI7# 4 3
26 USB0- USBP_0N DD_9
F2 AB13 PDD10 GPI39 6 5 RN16
26 USB0+ USBP_0P DD_10
X_C10P50N0402 G4 AC14 PDD11 GPI38 8 7 8P4R-10KR
26 USB1- USBP_1N DD_11
G3 AF14 PDD12
26 USB1+ USBP_1P DD_12

si
H1 AH13 PDD13 GPI23 R242 10KR0402
26 USB2- USBP_2N DD_13
H2 AH14 PDD14
26 USB2+ USBP_2P DD_14
J4 AC15 PDD15 ATADET0 R183 X_10KR
26 USB3- USBP_3N DD_15
26 USB3+ J3 USBP_3P
26 USB4- K1 USBP_4N
26 USB4+ K2 USBP_4P SATA_0RXN AF3 SATA_RX#0 30
L4 AE3 THERM# R182 4.7KR
USBP_5N SATA_0RXP SATA_RX0 30 VCC3
L5 USBP_5P SATA_0TXN AG2 SATA_TX#0 30
M1 AH2

ne
26 USB6- USBP_6N SATA_0TXP SATA_TX0 30

USB
M2 INTRUDER# R239 1MR0402
26 USB6+ USBP_6P VBAT
26 USB7- N4 USBP_7N SATA_1RXN AE5 SATA_RX#1 30
C N3 AD5 C
26 USB7+ USBP_7P SATA_1RXP SATA_RX1 30
SATA_1TXN AG4 SATA_TX#1 30
SATA_1TXP AH4 SATA_TX1 30
26 OC#1 OC#1 D3 LPC_DRQ#0 R233 10KR0402
OC_0# VCC3
C239 C4 AF7
C0.1U16Y0402 OC_1# SATA_2RXN
D5 AE7

do
OC_2# SATA_2RXP
D4 OC_3# SATA_2TXN AG6
E5 OC_4# SATA_2TXP AH6
26 OC#2 C3 GPIO29/OC_5#
ICH 7

S-ATA
C257 A2 AD9
C0.1U16Y0402 GPIO30/OC_6# SATA_3RXN
B3 GPIO31/OC_7# SATA_3RXP AE9
SATA_3TXN AG8
_22.6R1%0402 R235 USB_BIAS D1 AH8
USBRBIAS SATA_3TXP
D2 USBRBIAS#
PART 2/3

in
AF1 AC_BITCLK R248 20KR1%0402
SATA_CLKN CK_ICHSATA# 19
SATA_CLKP AE1 CK_ICHSATA 19
SM BUS

R176 33R SMBCLK_ICH C22


17,20 SMBCLK_RESUME SMBCLK
R171 33R SMBDATA_ICH B22 AH10 SATA_BIAS R200 24.3R1%
17,20 SMBDATA_RESUME SMBDATA SATARBIASN
SMB_ALERT# B23 AG10 SATALED# R196 10KR
GPIO11/SMBALERT# SATARBIASP VCC3
AF18 SATALED#
SATALED# SATALED# 29
SM_LINK0 B25 AF19 2 1
SMLINK_0 GPIO21/SATA_0GP VCC3
SM_LINK1 A25 AH18 4 3
LINK_ALERT# SMLINK_1 GPIO19/SATA_1GP RN18

i-
A26 LINKALERT# GPIO36/SATA_2GP AH19 6 5
AE19 8 7 8P4R-10KR
GPIO37/SATA_3GP
RSMRST# Y4 AB18 SIO_SMI#
31 RSMRST# RSMRST# BMBUSY#/GPIO0
LAN_RST# C19 AC21 ATADET0 * Put a GND Plane under X'TAL
C23
LAN_RST# GPIO6
AC18 GPI7#
ATADET0 30
* Please put this block close ICH6 RTC BLOCK
28 PWRBTN# PWRBTN# GPIO7 GPI7# 28
POWER MGNT

AA4 E21 SIO_PME#


10,31 PWR_GD PWROK GPIO8 SIO_PME# 28
AD22 E20 GPI9 CLR_CMOS
9,31 VRM_GD VRMPWRGD GPIO9
A22 A20 GPI10 1-2 Normal *
B 6,29 FP_RST#
SLP_S3# B24
SYS_RESET#
is GPIO10
GPIO12 F19
E19
GPI12
GPI13
2-3 Clear CMOS B

28,31 SLP_S3# SLP_S3# GPIO13


SLP_S4# D23 R4 ADT7467_ALERT#
31 SLP_S4# SLP_S4# GPIO14 ADT7467_ALERT# 30
F22 E22 GPI15
GPIO

LPCPD# SLP_S5# GPIO15


24 LPCPD# A27 SUS_STAT# GPIO16/DPRSLPVR AC22
C20 SUSCLK GPIO18/STPPCI# AC20
AF21 VCC3_SB VBAT
INTRUDER# GPIO20/STPCPU#
Y5 INTRUDER# GPIO24 R3
kn

WAKE#
17 WAKE#
RI#
F20
A28
WAKE# GPIO25 D20
A21 TP29
close
28 RI# RI# EL_RSVD/GPIO26

2
6,28 THERM#
THERM# AF20 THRM# EL_STATE0/GPIO27 B21 SB PIN JBAT1
E23
EL_STATE1/GPIO28
GPIO32/CLKRUN# AG18 CLEAR_CMOS# W5 3 R80 _20KR
1
ICH_SYNC# AH20 AC19 RTC_RST#
10 ICH_SYNC# MCH_SYNC# GPIO33/AZ_DOCK_EN# BIOS_WP# 24,28 2
A19 U2 D4
27,29 SPKR SPKR GPIO34/AZ_DOCK_RST# 3
AD21 C283 S-BAT54C_SOT23 C83 C84

1
GPIO35/SATACLKREQ#
MISC

te

BATTLOW# C21 AD20 GPI38 C0.1U25Y C1U16Y0805


TP30 BATLOW#/TP_0 GPIO38 GPI39 C1U16Y N31-1030011+N33-1020031
AF24 DPRSTP#/TP_1 GPIO39 AE20
TP1 AH25
TP32 DPSLP#/TP_2 R66
F21 TP_3 VCCRTC W5 VBAT
W4 INTVRMEN R232 _330KR0402-1 1KR
INTVRMEN VBAT
RTC

AA3 RTC_RST#
RTCRST# RTCX1
19 CK_14M_ICH AC1 CLK14 RTCX1 AB1
B2 AB2 RTCX2
19 CK_48M_USB_ICH CLK48 RTCX2
w.
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85

RTCX1 C249 C15P50N0402


BAT1
Y4 R237
32.768KHZ12.5P_D 10MR1%0402
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3

A
(INTEL-NH82801GR-A1-LF) RTCX2 C248 C12P50N0402 A
U8B
ww

MSI
<OrgAddr1> MICRO-STAR INt'L CO., LTD.
Following are the GPIOs that need to be terminated properly if not used:
GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused. Title
GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused. ICH7 - LPC, ATA, USB, GPIO
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 21 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

AG14
AG17
AG20
AG25
AD11
AD15
AD19
AD23

AH23
AH27
AE11
AE13
AE18
AE21
AE24
AE25

AF11
AF27
AF28
(INTEL-NH82801GR-A1-LF)
5VREF Sequencing Circuit

AG1
AG3
AG7
AD4
AD7
AD8

AH1
AH3
AH7
AE2
AE4
AE8

AF2
AF4
AF8
V_1P5_CORE U8C
L3
X_80L4_30_1206 D9 R191 1KR

VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VCC3 VCC5
V_DMI D26 AD17 5VREF
VCC1_5_B V5REF1 S-1N5817_DO214AC
D27 VCC1_5_B V5REF2 G10
CP3 D28 A5
VCC1_5_B VCC3_3-1

+
1 2 EC9 E24 AA7 5VREF

m
VCC1_5_B VCC3_3-2 C204 C0.1U25Y
D E25 VCC1_5_B VCC3_3-3 AB12 VCC3 D
.CD1000U6.3EL15 E26 AB20
VCC1_5_B VCC3_3-4
F23 VCC1_5_B VCC3_3-5 AC16
F24 AD13 VCC3 VCC3 VCC3

co
VCC1_5_B VCC3_3-6
G22 VCC1_5_B VCC3_3-7 AD18
G23 VCC1_5_B VCC3_3-8 AG12
H22 VCC1_5_B VCC3_3-9 AG15
H23 VCC1_5_B VCC3_3-10 AG19
J22 AH11 C193 C258 C184 C20 C271 C275
VCC1_5_B VCC3_3-11

1.5V DMI POWER


J23 B13 C0.1U25Y C0.1U25Y X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y C10U10Y0805
VCC1_5_B VCC3_3-12
K22 VCC1_5_B VCC3_3-13 B16
K23 VCC1_5_B VCC3_3-14 B27

a.
L22 VCC1_5_B VCC3_3-15 B7
L23 VCC1_5_B VCC3_3-16 C10
M22 D15 V_FSB_VTT
C143 VCC1_5_B VCC3_3-17
20 V_DMI M23 VCC1_5_B VCC3_3-18 F9
C0.1U25Y N22 G11 C158
C150 VCC1_5_B VCC3_3-19 C0.1U25Y
N23 VCC1_5_B VCC3_3-20 G12
C0.1U25Y P22 G16 C159
C142 VCC1_5_B VCC3_3-21 X_C0.1U25Y
P23 U6

S0 POWER
VCC1_5_B VCC3_3-22

si
C0.1U25Y R22 VCC1_5_B
R23 VCC1_5_B VCC_CPU_IO-1 AE23
R24 VCC1_5_B VCC_CPU_IO-2 AE26
R25 AH26 L4 _1U500m_0805-RH
VCC1_5_B VCC_CPU_IO-3 R160 1R1%
R26 VCC1_5_B V_1P5_CORE
T22 AG28 C151 C0.01U50X L14 10U125m_0805-1
VCC1_5_B VCCDMIPLL
T23 VCC1_5_B VCCSATAPLL AD2 V_1P5_CORE
T26 C1 C260 C0.1U25Y
VCC1_5_B VCCUSBPLL
T27

ne
VCC1_5_B V_1P5_CORE
T28 L11 C274 C262

C
U22
U23
V22
VCC1_5_B
VCC1_5_B
VCC1_5_B
ICH 7 VCC1_05-1
VCC1_05-2
VCC1_05-3
L12
L14
L16
C0.1U16Y0402 C10U10Y0805
C

VCC1_5_B VCC1_05-4 C217


V23 VCC1_5_B VCC1_05-5 L17
W22 L18 C0.1U25Y
VCC1_5_B VCC1_05-6 C218
W23 M11
Y22
VCC1_5_B
PART 3/3 VCC1_05-7
M18 C0.1U25Y

do
VCC1_5_B VCC1_05-8 C219
Y23 VCC1_5_B VCC1_05-9 P11
AA22 P18 C0.01U50X
VCC1_5_B VCC1_05-10
AA23 VCC1_5_B VCC1_05-11 T11
AB22 T18 VCC3
VCC1_5_B VCC1_05-12 V_1P05_CORE
AB23 U11 C393
VCC1_5_B VCC1_05-13
AC23 VCC1_5_B VCC1_05-14 U18
AC24 VCC1_5_B VCC1_05-15 V11
AC25 V12 C0.1U25Y VCC3_SB
VCC1_5_B VCC1_05-16

in
AC26 VCC1_5_B VCC1_05-17 V14
AD26 VCC1_5_B VCC1_05-18 V16
AD27 VCC1_5_B VCC1_05-19 V17
AD28 VCC1_5_B VCC1_05-20 V18
C287
X_C10U10Y0805

V_1P5_CORE

i-
V5REF_SUS F6 VCC5_SB
C256
A1 A24 C0.1U16Y0402
VCC1_5-1 VCCSUS3_3-1
AB10 VCC1_5-2 VCCSUS3_3-2 C24 VCC3_SB
AB17 VCC1_5-3 VCCSUS3_3-3 D19
1.5V CORE WELL POWER

AB7 VCC1_5-4 VCCSUS3_3-4 D22


AB8 VCC1_5-5 VCCSUS3_3-5 E3
AB9 G19 C251
VCC1_5-6 VCCSUS3_3-6 C0.1U16Y0402
AC10 K3
is

S5 POWER
B VCC1_5-7 VCCSUS3_3-7 B
AC17 VCC1_5-8 VCCSUS3_3-8 K4
AC6 K5 C259
VCC1_5-9 VCCSUS3_3-9 C0.1U25Y
AC7 VCC1_5-10 VCCSUS3_3-10 K6
V_1P5_CORE AC8 L1
VCC1_5-11 VCCSUS3_3-11 C157
AD10 VCC1_5-12 VCCSUS3_3-12 L2
AD6 L3 C0.1U16Y0402
VCC1_5-13 VCCSUS3_3-13
AE10 VCC1_5-14 VCCSUS3_3-14 L6
C215 AE6 L7
VCC1_5-15 VCCSUS3_3-15
kn

C10U10Y0805 AF10 M6 V_1P05_CORE


C214 VCC1_5-16 VCCSUS3_3-16
AF5 VCC1_5-17 VCCSUS3_3-17 M7
C0.1U25Y AF6 N7
C231 VCC1_5-18 VCCSUS3_3-18
AF9 VCC1_5-19 VCCSUS3_3-19 P7
C10U10Y0805 AG5 R7 C298
C264 VCC1_5-20 VCCSUS3_3-20 X_C10U10Y0805
AG9 VCC1_5-21 VCCSUS3_3-21 V1
C0.1U25Y AH5 V5
C230 VCC1_5-22 VCCSUS3_3-22
AH9 VCC1_5-23 VCCSUS3_3-23 W2
te

C0.1U25Y F17 W7
VCC1_5-24 VCCSUS3_3-24
G17 VCC1_5-25
H6 VCC1_5-26
H7 VCC1_5-27 VCCSUS1_05-1 AA2
J6 VCC1_5-28 VCCSUS1_05-2 C28
J7 VCC1_5-29 VCCSUS1_05-3 G20
T7 VCC1_5-30 VCCSUS1_05-4 K7
VCCSUS1_05-5 Y7
w.
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
VSS_129
VSS_128
VSS_127
VSS_126
VSS_125
VSS_124
VSS_123
VSS_122
VSS_121
VSS_120
VSS_119
VSS_118
VSS_117
VSS_116
VSS_115
VSS_114
VSS_113
VSS_112
VSS_111
VSS_110
VSS_109
VSS_108
VSS_107
VSS_106
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100
VSS_99
VSS_98
VSS_97
VSS_96
A A
ww P12
P13
P14
P15
P16
P17
P24
P27
P4

P28
R1
R11
R12
R13
E4

AA24
AA25
AA26
AG11
C27
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1

AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3

MSI MICRO-STAR INt'L CO., LTD.


Title
ICH7 - POWER
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 22 of 36
8 7 6 5 4 3 2 1
1 2 3 4 5

VCC5

C433 C33P50N

C449
CVBS
L38 1.8U50m_1206
X_C0.1U25Y CVBS CVBS_OUT

C434 C432
J3

m
C100P50N C270P50N 1
A C_Pr ADD OP U24 2 A

1 6 _BH1X2B_black
OUT Vcc

co
2 5 R420 X_75R1%
Vee Disable# R422 X_200R C447 C6.8P50N
C_Pr 3 4 C_Pr_OP
IN+ IN-
X_MAX4389_SOT23-6
L39 0.68U150m_0805 GREEN

4
7
3
R416 Y_Y Y_Y_OUT J2
X_200R
C448 C446 4 7 3
8

a.
C100P50N C68P50N 9
2 6 5 1 10

2
6

5
1
R419 0R
C403 C6.8P50N _CONN-MiniDIN7P_black

si
L33 0.68U150m_0805 RED
C_Pr_OP C_Pr_OUT

C404 C402

C100P50N C68P50N
VCC3

ne
HDTV/S-Video

5
C416 C6.8P50N
CVBS_OUT 6 4 Y_Y_OUT
12 SDVOB_Red+ SDVOB_Red+
B Pb_OUT 1 3 C_Pr_OUT B
12 SDVOB_Red- SDVOB_Red- L34 0.68U150m_0805 BLUE
Pb_HDTV Pb_OUT D23

2
12 SDVOB_Green+ SDVOB_Green+ ESD-IP4220
C414 C415
SDVOB_Green-

do
12 SDVOB_Green-
C100P50N C68P50N
12 SDVOB_Blue+ SDVOB_Blue+

12 SDVOB_Blue- SDVOB_Blue-

12 SDVOB_Clk+ SDVOB_Clk+

12 SDVOB_Clk- SDVOB_Clk-

in
L29 80L3_40_0805 R408
C0.1U25Y C0.1U25Y C0.1U25Y 10KR
2.5V
C367 C395 C408

C375
C10U16Y1206

i-
64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49
U22
SDVO_CLK+

SDVO_B+

SDVO_G+

SDVO_R+
AVDD

SDVO_CLK-

AGND

SDVO_B-

AVDD

SDVO_G-

T2

RPLL
AGND

SDVO_R-

AVDD

AGND
1 T1 DL3 48
L36
32 CH7021_SD_DDC 2 47 80L3_40_0805
SD_DDC DL2 AVDD_TVPLL2 2.5V
32 CH7021_SC_DDC 3 46 C426
SC_DDC DL1 C418

2.5V
4 SD_PROM
is AGND_TVPLL2 45

C428
C0.1U25Y

SDVO_TVClk-
C10U16Y1206

C 5 SC_PROM TVCLK- 44 SDVO_TVClk- 12 C


C0.1U25Y
6 43 C427 SDVO_TVClk+ SDVO_TVClk+ 12
R353 DVDD TVCLK+ C0.1U25Y
X_10KR 17,31,32 PCIRST_SLT# 7 42
RESET* AVDD_TVPLL2 L37
80L3_40_0805
AVDD_TVPLL1
8 AS CH7021 AVDD_TVPLL1 41 2.5V
kn

R354 9 40 C425 C430


10KR DGND XO C10U16Y1206
10 DGND XI/FIN 39
C0.1U25Y
12,32 SDVO_CtrlData SDVO_CtrlData 11 38
SPD AGND_TVPLL1
Y6
L27 12,32 SDVO_CtrlClk SDVO_CtrlClk 12 37
80L3_40_0805 SPC DGND

2.5V 13 36 VSYNC-2 VSYNC-2 32 27MHZ20P_S


DVDD VSYNC
te

C363 14 35 C423 C424


BSCAN DVDD C27P50N C27P50N
C10U16Y1206 15 34 CHSYNC-2 CHSYNC-2 32
C422 C370 C369 RESERVED CHSYNC
DACC[2]

DACC[1]

DACC[0]
DACA[3]

DACA[2]

DACB[2]

DACA[1]

DACB[1]

DACA[0]

DACB[0]

C0.1U25YC0.1U25YC0.1U25Y 16 33
GDAC2

GDAC1

GDAC0
VDAC1

VDAC0

VDAC2 V5V VCC5


R356 R355
ISET

10KR 10KR 65 L35 80L3_40_0805


GND C421 C435
17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

C0.1U25Y C10U16Y1206
w.

L28
80L3_40_0805
VDAC VCC3
C366

C10U16Y1206
32 RED-2 RED-2 C368 C400 C391

32 GREEN-2 GREEN-2 C0.1U25Y C0.1U25Y C0.1U25Y


ww

D
32 BLUE-2 BLUE-2 R407 D
1.2KR1%

C_Pr

Y_Y

CVBS Pb_HDTV

R379 R390 R406 R394 R403 R414 MICRO-START INT'L CO.,LTD.


75R1% 75R1% 75R1% 75R1% 75R1% 75R1%
Title
CH7021 & TV-OUT CONNECTORS
R428 R423 Size Document Number Rev
75R1% 75R1% C MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 23 of 36
1 2 3 4 5
8 7 6 5 4 3 2 1

m
D D

FIRMWARE HUB (FWH)

co
VCC3 VCC3
CB7 BIOS1
X_C0.1U25Y 1 32
VPP VCC FWH_PCLK C333
10,20,28 PLTRST# 2 RST# CLK 31 FWH_PCLK 19
REV3 3 30 F_GPI4
REV2 FGPI3 FGPI4 C10U10Y0805
4 FGPI2 IC(VIL) 29
REV1

a.
5 FGPI1 GNDA 28
IO Address:0x02E REV0 6 27
R283 1KR FGPI0 VCCA
VCC3 7 WP# GND 26
BIOS_WP# 8 25
21,28 BIOS_WP# TBL# VCC
9 24 FWH_INIT#
U19 ID3 INIT# FWH_INIT# 20
10 ID2 FWH4 23 LPC_FRAME# 21,28
21,28 LPC_AD[0..3] 11 ID1 RFU 22
LPC_AD0 26 6 12 21
LPC_AD1 LAD0 GPIO ID0 RFU
23 13 20

si
LAD1 21,28 LPC_AD0 FWH0 RFU
LPC_AD2 20 19 14 19
LAD2 3V_1 VCC3 21,28 LPC_AD1 FWH1 RFU
LPC_AD3 17 24 15 18
LAD3 3V_2 21,28 LPC_AD2 FWH2 RFU
LPC_FRAME# 22 10 16 17
21,28 LPC_FRAME# LFRAME# 3V_3 GND FWH3 LPC_AD3 21,28
PLTRST# 16 5 VCC3_SB SST49LF004B-33-4C-NH
10,20,28 PLTRST# LRESET# 3VSB
21 LPCPD# 28 LPCPD#
TPM_CLKRUN# 15 18
SERIRQ CLKRUN# GND1
20,28 SERIRQ 27 SERIRQ GND2 25 VCC3

ne
GND3 11
TPM_CLK 21 4
19 TPM_CLK LCLK GND4 C120 CB3 C90 C115
TPM_ADDR 9 14 C359 X_12p-0402 C10U10Y0805 X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y
C R331 TESTBI/BADD XTALO C
8 TESTI XTALI/32KIN 13
R365 7 Y5
X_0R X_0R PP X_32K-12.5pf-CSA-309-D
R361 2 12 C362 X_12p-0402
NC3 NC1
1 3

do
X_0R NC4 NC2

R383 R374 X_SLB9635


X_0R
X_0R
VCC3 VCC5
FWH RESISTORS -12V VCC5

in
VCC3
REV3 2 1 C72 C229 C254 CB1
REV2 4 3 RN28 C0.1U25Y X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y
REV1 6 5 8P4R-10KR
REV0 8 7

F_GPI4 R336 10KR

i-
is
B B
kn
te
w.
ww

A A

MICRO-STAR INt'L CO., LTD.


Title
FWH
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 24 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Put closed to VT6307
PWRDET_VCC

1394a OHCI Link Layer


VDD
For 6307
VCC3 PVA
VCC3 VDD PVA R161
IDSEL = AD19
Controller
C153 R159 R162 4.99KR1%
R147 _0R0805 C270P50N 54.9R1% 54.9R1%
MASTER = PREQ#3
PIRQ#C L9

102
113
125

114
TPB0-

20
33

35

24

39
49

62
65
76
75
90
89
8

m
AD[0..31] U6 X_80L700m_150 TPB0+
17,20,33 AD[0..31]
D C199 TPA0- D

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

VDDC1
VDDC2

PVDD1
PVDD2

VDDATX0
VDDARX0
VDDATX1
VDDARX1
VDDATX2
VDDARX2
RAMVDD
AD31 97 74 TPBIAS0 C131 C211 1 2 CP6 TPA0+ GND shielding
AD30 AD31 XTPBIAS0 TPA0+ C0.1U25Y
98 AD30 XTPA0P 73

co
AD29 99 72 TPA0- 1 2 CP5
AD28 AD29 XTPA0M TPB0+ C10U10Y0805 C10U10Y0805 R165 R168
100 AD28 XTPB0P 71
AD27 101 70 TPB0- 54.9R1% 54.9R1%
AD26 AD27 XTPB0M
104 AD26
AD25 105 81 TPBIAS1 TPBIAS0 C163 C0.33U16Y
AD24 AD25 XTPBIAS1 TPA1+
106 AD24 XTPA1P 80
AD23 109 79 TPA1-
AD22 AD23 XTPA1M TPB1+
110 78

a.
AD21 AD22 XTPB1P TPB1-
112 AD21 XTPB1M 77
AD20 116 For 6308
AD19 AD20 REQ_OUT
117 AD19 XTPBIAS2 88
AD18 118 87 REQ_FB VCC3 R173
AD17 AD18 XTPA2P C168 R169 R174 4.99KR1%
119 AD17 XTPA2M 86
AD16 120 85 PWRDET_VCC R152 X_4.7KR For 6307 C270P50N 54.9R1% 54.9R1%
AD15 AD16 XTPB2P BJT_CTL
5 AD15 XTPB2M 84

si
AD14 6 R145 11KR1% BUS_PWR
AD13 AD14 R144
7 AD13
AD12 10 63 R153 1KR1% TPB1-
AD11 AD12 XCPS 0R TPB1+
11 AD11
AD10 12 TPA1-
AD9 AD10 R149 6.34KR1% I2C EEPROM TPA1+
GND shielding
13 AD9 XREXT 66
AD8 14 pull high
AD7 AD8 C133
17

ne
AD6 AD7 C130 VCC3 R175 R178
18 AD6 D6/CMCJMP 52
AD5 19 58 C47P50N R164 54.9R1% 54.9R1%
AD4 AD5 PHYRESET EECS X_4.7KR
21 AD4
C AD3 22 54 C0.1U25Y TPBIAS1 C175 C0.33U16Y C
AD2 AD3 CTL0/PC0JMP BJT_CTL
23 AD2 CTL1/PC1JMP 55
AD1 27 53
C_BE#[0..3] AD0 AD1 D7/PC2JMP R180 X_4.7KR
17,20,33 C_BE#[0..3] 28 AD0

do
LINKON/TSIJMP 57 For 6308
C_BE#3 107 56 1394_GND
C_BE#2 CBE3# LREQ/TSOJMP
122 CBE2# D5 51
C_BE#1 4 48 VCC3 C191 VCC3 C141
CBE1# D4

2
C_BE#0 15 47 C0.1U25Y
CBE0# D3 I2CEEN R151 4.7KR VDD CP2 CP1 R157 X_C0.1U25Y
D2 46
PAR 3 45 X__0R0805
17,20,33 PAR PAR D1
FRAME# 123 44 Q18 for EMI
17,20,33 FRAME#

1
in
IRDY# FRAME# D0 REQ_OUT X_P-2SB1197K(R)_SOT23-RH
17,20,33 IRDY# 124 IRDY# MODE0 43
TRDY# 126 42 For 6308
17,20,33 TRDY# TRDY# MODE1
STOP# 128 40
17,20,33 STOP# STOP# SCLK
AD19 R204 100R 108 38 REQ_FB
DEVSEL# IDSEL LPS/CMC
17,20,33 DEVSEL# 127 DEVSEL# NC 67
PREQ#3 96
17,20 PREQ#3 REQ#
PGNT#3 95 32 EECK
20 PGNT#3 GNT# SCL/EECK
PERR# EEDI

i-
17,20,33 PERR# 2 PERR# SDA/EEDI 31
17,20 PIRQ#E PIRQ#E 91 30
INTA# EEDO EECS
EECS 29
1394_PCLK 93
19 1394_PCLK PCICLK C129 C10P50N
PCIRST#1 J1
31,33 PCIRST#1 92 PCIRST# XI 60
5 SHLD
GNDARX0
GNDARX1

GNDARX2

4.7KR R148 Y3
GNDATX0

GNDATX1

GNDATX2

37
RAMVSS

VCC3 PME#
is PGND1
PGND2

24.576MHZ16P_D TPA0+ 4
VSSC1
VSSC2

R156 1MR TPA0- TPA+


VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

XO 61 3 TPA-
B C194 C127 TPB0+ B
2 TPB+
X_C10P50N TPB0- 1
_VT6307-CD C10P50N TPB-
94
103
111
121
1
9
16
26
34

59
64
68
69
82
83

25

115
36

41
50

PVA B07-0630724-V01 6 SHLD


kn

_1394-4M_black
C132 C185 C134 C135
C0.1U25Y

C0.1U25Y

C0.1U25Y

C0.1U25Y +12V
25V/CAP: EC80 NP: C93-1012511-G01 FP: 100U_16V
D6 I1394_USB1B
te

EC7 S-MBRS340T3G_CASE403-03 FS2 BUS_PWR


+

9 PWR
A C F-SMD1812P150TF/24-RH BUS_PWR
+12V
X__CD100U25EL11 BUS_PWR TPA1+ 14
C96 X_C0.1U25Y TPA1- TPA+
13 TPA-
VCC3 VCC3 TPB1+ 12
TPB1- TPB+
11 TPB-
C95
VDD X_C0.1U50Y
POWER Pin 10
w.

R139 R138 VCC3 GND


CONN-1394_USBX2
X_4.7KR X_4.7KR
VCC3 C167 C0.1U25Y
Pin VT6307 VT6308P VDD
U5 C152 C213 C233 C212
84 NC BJT_CTL
C0.1U25Y

EECK 6 8 C128
SCLK VCC
C0.1U25Y

EEDI C0.1U25Y
5 SDA 87 NC REG_FB
ww

A A0 1 A
C10U10Y0805 C10U10Y0805
A1 2
3
88 NC REQ_OUT C202 Lite==N53-08M0141-F02
R130 510R A2 C0.1U16Y0402
7 WP GND 4 35 VCC PWRDET_VCC
AT24C01A-10SI-2.7 MSI
MICRO-STAR INt'L CO., LTD.
M33-24C0153-A26
1394 CHIP VCC/PWRDET BJT_CTL VDD 39 PVD VCC <OrgAddr1>

CHECK WITH BIOS COST DOWN ISSUE VT6307 R2433 X R2431 49 PVD VDD placed near pin87 Title
VT6308P R2432 R2435 Q2060 24 VCC VDD IEEE 1394
Size Document Number Rev
114 VCC VDD
MS-7231 3.0
33 VCC VDD Date: Thursday, September 06, 2007 Sheet 25 of 36
8 7 6 5 4 3 2 1
1 2 3 4 5

POWER CIRCUIT FOR USB PORT 0,1,2,3 (REAR) POWER CIRCUIT FOR USB PORT 4,6,7 (FRONT)

FS1 SVCC1
F-SMD1812P260TF-RH

m
FS3 SVCC2
5VDUAL1
A SVCC1 A
5VDUAL2
F-SMD1812P260TF-RH R35 C323
R155 C32 2.7KR R296

co
2.7KR R154 OC#2 C0.1U25Y 1KR
21 OC#2
C0.1U25Y 1KR
21 OC#1
R36
R150 C34 5.1KR
C241 5.1KR X_C0.1U25Y
X_C0.1U25Y FOR USB DEVICE DISCHARGE ISSUE
FOR USB DEVICE DISCHARGE ISSUE

a.
SVCC2
REAR PANEL USB CONNECTOR FOR USB PORT 2,3 FRONT PANEL USB CONNECTOR FOR USB PORT 6,7

si
USB Interface SVCC1 USB Interface

5
Diff. Trace width 7.5 mils & 7.5 mils space. Diff. Trace width 7.5 mils & 7.5 mils space.
SBD6- 6 4 SBD4-
Diff. & other space 20 mils. Diff. & other space 20 mils.

5
Length matching: < 150 mils Length matching: < 150 mils SBD6+ 1 3 SBD4+
Ttrace length 0" to 17" SBD2- 6 4 SBD3+ Ttrace length 0" to 17"
D20

2
SBD2+ 1 3 SBD3- ESD-IP4220

ne
D7

2
ESD-IP4220
B B
.CD1000U10EL15
SVCC2

1+
do
EC4 .CD1000U10EL15 C349 C1000P50X
2 1 EC38

2
+
USB1
C149 1
L2 X_C0.1U25Y SBD6- 2 5
X_CMC_90ohm_0603 SBD6+ 3 6
SVCC1 5 15 L32 4 USBX1
8 1 SBD2- SBD2- 6 16 X_CMC_90ohm_0603

in
21 USB2-
7 2 SBD2+ SBD2+ 7 17 C387 CONN-USBX1_black-RH-2
21 USB2+
21 USB3- 6 3 SBD3- 8 UP 18 21 USB4- 8 1 SBD4-
5 4 SBD3+ SVCC1 1 19 7 2 SBD4+
21 USB3+ 21 USB4+
SBD3- 2 20 6 3 SBD6- X_C0.1U25Y
21 USB6-
SBD3+ 3 21 5 4 SBD6+ USB2
21 USB6+
4 DOWN 22 1
2 1 SBD4- 2 5
CONN-1394_USBX2 SBD4+ 3

i-
4 3 6
6 5 I1394_USB1A 2 1 4 USBX1
8 7 4 3
6 5 CONN-USBX1_black-RH-2
RN11 8 7
8P4R-0R
NEAR USB CONNECTOR LITE :USB*2 (N53-08M0011-F02) RN32
8P4R-0R NEAR USB CONNECTOR
is
C N53-04M0381-K06 C

REAR PANEL USB CONNECTOR FOR USB PORT 0,1 FRONT PANEL USB CONNECTOR FOR USB PORT 4
SVCC1
kn

USB Interface USB Interface


Diff. Trace width 7.5 mils & 7.5 mils space. Diff. Trace width 7.5 mils & 7.5 mils space.
5

Diff. & other space 20 mils. SBD0- SBD1- Diff. & other space 20 mils.
6 4
Length matching: < 150 mils Length matching: < 150 mils
Ttrace length 0" to 17" SBD0+ 1 3 SBD1+ Ttrace length 0" to 17"
te

D5
2

ESD-IP4220

EC16 .CD1000U10EL15 EC2


2 1 .CD470U10EL11
+
+
C148
X_C0.1U25Y C28 C0.1U25Y
w.

6
L1 LAN_USB1A
X_CMC_90ohm_0603 SVCC1 5 23 CR1
SBD0- 6 24 SVCC2 1
8 1 SBD0+ SBD0+ 7 25 2
21 USB0+ 21 USB7-
21 USB0- 7 2 SBD0- 8 UP 26 21 USB7+ 3
6 3 SBD1+ SVCC1 1 27 4 _BH1X5S_white-1.25pitch
21 USB1+
5 4 SBD1- SBD1- 2 28 5
21 USB1-
ww

D SBD1+ 3 29 D
4 DOWN 30

7
2 1
4 3 CONN-RJ45_USBX2_LEDX2_TX_black
6 5
8 7 MICRO-START INT'L CO.,LTD.
CARD READER CONNECTOR Title
RN6
8P4R-0R USB CONNECTORS
Size Document Number Rev
NEAR USB CONNECTOR
A3 MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 26 of 36
1 2 3 4 5
1 2 3 4 5

CEN_ EC104 .CD10U16EL11 CEN FRONT PHONE JACK


CP9
LFE_ EC105 .CD10U16EL11 LFE
AUDIO1
SURR_R EC108 .CD10U16EL11 SURR_R_
SIDESURR-L_ EC106 .CD10U16EL11 SIDESURR-L MIC2_L_ FB8 1
SURR_L EC109 .CD10U16EL11 SURR_L_ X_300L300m_350 MIC2-JD 1
2 2
SIDESURR-R_ EC107 .CD10U16EL11 SIDESURR-R 3
MIC2_R_ FB9 3
4 4
R488 20KR1% X_300L300m_350 5
CP10 5
AVDD5 C420 C444

m
1 2 5 3 4
A
B09-LC88804-R09 C0.1U25Y C10U16Y1206 C1000P50X C1000P50X A
JACK-PHONE5P_pink-10u-in

co
VCC3 C543 EC54 EC66 .CD100U16EL11 FRONT_R_
C0.1U25Y CP13

48
47
46
45
44
43
42
41
40
39
38
37
U28 AUDIO2
EC57 .CD100U16EL11 FRONT_L_

SPO
SPI/EAPD

SIDESURR_L/VROC2
LFE/VROA2
CEN/VROD2
AVSS2

SURR-L
AVDD2
SIDESURR_R/VROB2

SURR_R
JDREF/NC

LINE1-VREFO-R
C506 C514 R480 LINE2_L_ FB12 1
X_300L300m_350 LINE2-JD 1
2 2
C0.1U25Y 10KR 3
LINE2_R_ FB16 3

a.
4 4
1 36 FRONT_R R452 39.2KR1% LINE2-JD X_300L300m_350 5
DVDDCORE FRONT_R FRONT_L CP17 5
2 GPIO0 FRONT_L 35
AMP_EN 3 34 SENSE_B R424 20KR1% MIC2-JD C461 C499
GPIO1 SENSE B 1 2 5 3 4
4 DVSS NC 33
5 32 MIC1-VREFO-R R476 10KR1% CEN-JD C1000P50X C1000P50X
21 AC_SDOUT SDO MIC1-VREFO-R
6 31 LINE2-VREFO _JACK-PHONE5P_limegreen
21 AC_BITCLK BCLK LINE2-VREFO
R472 22R 7 30 MIC2-VREFO R475 5.1KR1% SIDESURR-JD
21 AC_SDIN0 DVSS MIC2-VREFO

si
21 AC_SYNC 8 SDI LINE1-VREFO-L 29
9 28 MIC1-VREFO-L
DVDDCORE MIC1-VREFO-L
10 SYNC VREF 27
R462 33R
21 AC_RST#
PCBEEP
11
12
RESET#
PCBEEP
ALC888 AVSS1
AVDD1
26
25
EC55 C508
C505 C502 6 IN 1 AUDIO JACK

SENSE A

CD_GND
LINE2_R

LINE1_R
LINE2_L

LINE1_L
MIC2_R

MIC1_R
C510 C1U16Y

MIC2_L

MIC1_L
C22P50N

ne
CD_R
CD_L
C0.1U25Y P/N:N54-26F0031-K06
C22P50N
AGND REAR PHONE JACK
Footprint:JA333L_G01
B ALC888-GR-A2-RH C10U16Y1206 B
13
14
15
16
17
18
19
20
21
22
23
24
LINE1_R EC110 .CD10U16EL11 LINE1_R_ CP11 CP20
AUDIO3A AUDIO4A

do
SURR-JD R471 39.2KR1% LINE1_L EC111 .CD10U16EL11 LINE1_L_ X_300L300m_350 (Upper) X_300L300m_350 (Upper)
LINE1_R_ FB10 10 SURR_R_ FB19 10
MIC1-JD R470 20KR1% LINE1-JD 11 SURR-JD 11
MIC1_R EC112 .CD10U16EL11 MIC1_R_ 12 12
LINE1-JD R445 10KR1% LINE1_L_ FB17 13 SURR_L_ FB18 13
MIC1_L EC113 .CD10U16EL11 MIC1_L_ X_300L300m_350 18 X_300L300m_350 18
FRONT-JD R446 5.1KR1% SENSE_A CP18 C500 C457 X_PHONE_JACK CP19 JACK-AUDIOX6-26P_L-blp_R-bog
JCD1 C513 C522

in
CD_R C466 C1U16Y CDR R437 47KR 4 C1000P50X C1000P50X Line in Back Surround
LINE2_L_ R396 100R1% EC52 LINE2_L 3 C1000P50X C1000P50X
.CD100U16EL11 CD_GND C467 C1U16Y CDGND R438 47KR 2 BLUE BLACK
LINE2_R_ R397 100R1% EC51 LINE2_R 1
.CD100U16EL11 CD_L C468 C1U16Y CDL R439 47KR
MIC2_L_ R398 100R1% EC114 MIC2_L CP12 CP22
.CD10U16EL11 BH1X4_red AUDIO3B AUDIO4B
MIC2_R_ R401 100R1% EC115 MIC2_R X_300L300m_350 (Middle) (Middle)

i-
2
4
6
.CD10U16EL11 8 FRONT_R_ FB11 6 LFE_ FB21 6
RN33 FRONT-JD 7 X_300L300m_350
CEN-JD 7
8P4R-47KR 8 8
FRONT_L_ FB15 9 CEN_ FB20 9
1
3
5
7

X_300L300m_350 17 X_300L300m_350 17
CP16 X_PHONE_JACK CP21 JACK-AUDIOX6-26P_L-blp_R-bog
R560 22.1KR1% R430 4.7KR 1 MIC1-VREFO-L C496 C460 C542 C551

R561 22.1KR1% R427 4.7KR 2


3 MIC2-VREFO
D26
is MIC1-VREFO-R C1000P50X C1000P50X Front out C1000P50X C1000P50X
Center/Bass
C C
S-BAT54A_SOT23 ORANGE
GREEN
R562 22.1KR1% R444 4.7KR 1 R442 R457
3 LINE2-VREFO 4.7KR 4.7KR CP14 CP24
R563 22.1KR1% R447 4.7KR 2 D27 AUDIO3C AUDIO4C
S-BAT54A_SOT23 C452 X_C0.1U25Y X_300L300m_350 (Down) X_300L300m_350 (Down)
kn

MIC1_R_ FB13 1 SIDESURR-R_ FB23 1


MIC1-JD 2 14 SIDESURR-JD 2 14
4 15 4 15
MIC1_L_ FB14 5 16 SIDESURR-L_ FB22 5 16
R448 X_10KR C497 PCBEEP CP33 X_300L300m_350 3 X_300L300m_350 3
21,29 SPKR
CP15 X_PHONE_JACK CP23 C553 C558 JACK-AUDIOX6-26P_L-blp_R-bog
R463 C498 X_C1U16Y C488 C465
te

X_1KR X_C100P50N CP32 Mic in C1000P50X Side Surround


FOR POP-NOISE ISSUE C1000P50X C1000P50X C1000P50X
Channel Barebone PINK GRAY
VCC5_SB
Internal Speaker
amplifier
AUDIO CODE REGULATORS AVDD5
Internal Speaker
w.

+12V AVDD5
U30 D24 R490 100KR 2 1 FRONT_R_
LT1087S_SOT89 D32 BAS32L_LL34 C556 C1U16Y
3 VIN VOUT 2
SD pin: HIGH- Disable R491 100KR 2 1 FRONT_L_
C550 S-1N5817_DO214AC R492 C557 C1U16Y
ADJ

+ EC56 + EC58 10KR LOW- Enable AVDD5


C538
ww

D R486 C0.1U25Y U29 D


100R 1 8
1

C0.1U25Y X_C10U16Y1206 C555 C0.1U25Y 2 SD VOUT_B CON1


7
D

BYPASS -V PC_R
3 +IN +V 6 1
AMP_EN G Q54 4 5 PC_N
R487 -IN VOUT_A 2
R485 C10U16Y1206 N-2N7002_SOT23 X_0R SSM2211SZ_SOIC8-LF BH1X2_white-2pitch MICRO-START INT'L CO.,LTD.
S

324R1% C554
Title
R489 100KR
Aliza Audio - ALC888 FOR VISTA
1W-RMS/8 Ohm OR C0.1U25Y
Size Document Number Rev
A3 MS-7231 3.0
1.5W-RMS/4 Ohm
Date: Wednesday, September 05, 2007 Sheet 27 of 36
1 2 3 4 5
5 4 3 2 1

PS2 KEYBOARD & MOUSE CONNECTOR


LPC SUPER I/O W83627EHF Chasiss Intrusion

2
4
6
8
RN19
U12 8P4R-4.7KR SVCC1
PLTRST# 30 1

1
3
5
7
10,20,24 PLTRST# SIO_PCLK LRESET# DRVDEN0 INDEX# CHASSIS JKBMS1
19 SIO_PCLK 21 PCICLK INDEX# 3
SERIRQ 23 4 CASE_OPEN1 MSDAT# FB6 120L600m_250 MS_DT 7 10
20,24 SERIRQ SERIRQ MOA#
21 LPC_DRQ#0 LPC_DRQ#0 22 6 8
LDRQ# DSA#

1
2
3
LPC_FRAME# 29 8 MSCLK# FB7 120L600m_250 MS_CK 11
21,24 LPC_FRAME# LFRAME# DIR#
SIO_PME# 86 9 7 1 2 3 12 9 C140
VCC5 21 SIO_PME# PME# STEP# MS
10 C0.1U25Y

m
LPC_AD0 WD# KBDAT# FB4 120L600m_250 KB_DT
D 27 LAD0 WE# 11 1 4 D
LPC_AD1 26 13 TRACK0# 8 2
LPC_AD2 LAD1 TRAK0# FDD_WP# 4 5 6 KBCLK# FB5 120L600m_250 KB_CK
25 LAD2 WP# 14 5
LPC_AD3 24 15 RDATA# 6 3

co
21,24 LPC_AD[0..3]

4
5
6
LAD3 RDATA# KB
HEAD# 16
1 2 1 2 125 17 DSKCHG# C180 CONN-KB_MS
GP13/GPX2 DSKCHG# R254 C180P50N C178
123 GP15/GPY1 GP23/SCK 2
R250 R253 128 X_0R GPI7# 21
22KR0402 10KR1% GP10/GPSA1 THERM#1 R257 SW-PUSH6P_natural-RH CP4 C177
121 GP17/GPSA2 OVT#/HM_SMI# 5
126 0R THERM# 6,21 C173
GP12/GPX1 C180P50N
124 GP14/GPY2 PD0 42 MOS over temp can produce SMI#
X_COPPER C180P50N
127 GP11/GPSB1 PD1 41 N72-0100161-D02

a.
R256 122 40 C180P50N
VCC5IN 10KR1% GP16/GPSB2 PD2
PD3 39
1 TMP_VREF101
2 38
VREF PD4
102 AUXTIN PD5 37
103 CPUTIN PD6 36
SYS_TMP 104 35
SYSTIN PD7
93 RSTOUT1# SLCT 31
W : 10 94 RSTOUT0# PE 32

si
R252 95 33
VIN4 BUSY
-12V 1 2 232KR1% -12VIN 96 VIN3 ACK# 34
97 VIN2 SLIN# 43
R265 56KR1% +12VIN 98 44
+12V VIN1 INIT#
99 VIN0 ERR# 45
R266 10KR
VCCP 100 CPUVCORE AFD# 46
47
SUPER I/O STRAPPING RESISTOR
STB#
1 2 105 VID5
R258 10KR1% BIOS_WP#
106 88
FLOPPY CONNECTOR

ne
VID4 GP34/RSTOUT4# BIOS_WP# 21,24
107 69 RTSA# L: CFAD=2E H: CFAD=4E I/O CONFIGURATION ADDRESS
VID3 GP36 GP50 L: TTL LEVEL H: VRM10 LEVEL
108 VID2 GP35 87 VID LEVEL SELECTION
C 109 70 SOUTA L: KBC DISABLE H: KBC ENABLE KBC FUNCTION ENABLE C
VID1 GP55/SUSLED DTRA# L: DISABLE SPI H: ENABLE SPI VCC5
110 VID0 ENABLE SPI
56 DCDA#
GP61/DCDA# DSRA# R230 R229 INDEX# R264 1KR0402
112 CPUFANIN0 GP66/DSRA# 50
115 53 SINA 10KR VCC3
CPUFANOUT0 GP63/SINA RTSA# 10KR RN26
119 51

do
CPUFANIN1/GP21/MSI GP65/HEFRAS/RTSA# SOUTA R222 X_1KR RTSA# R221 1KR VCC5 DSKCHG#
120 CPUFANOUT1/GP20/MSO GP62/PENKBC/SOUTA 54 1 2
113 49 CTSA# RDATA# 3 4
SYSFANIN GP67/CTSA# DTRA# R244 X_1KR GP50 R247 X_1KR FDD_WP#
116 SYSFANOUT GP64/PENROM/DTRA# 52 5 6
111 57 RIA# TRACK0# 7 8
AUXFANIN0 GP60/RIA# R217 1KR SOUTA R218 X_1KR C297
58 AUXFANIN1/SO
7 84 DCDB# C0.1U25Y 8P4R-1KR0402
AUXFANOUT GP41/DCDB# DSRB# R220 X_1KR DTRA# R219 1KR
GP46/DSRB# 79
VBAT R238 2MR CHASSIS 76 82 SINB
CASEOPEN# GP43/IRRX/SINB

in
SMBDATA_MAIN 89 80 RTSB#
14,19,20,30,31 SMBDATA_MAIN RSTOUT3#/GP33/SDA GP45/RTSB#
SMBCLK_MAIN 90 83 SOUTB
14,19,20,30,31 SMBCLK_MAIN RSTOUT2#/GP32/SCL GP42/IRTX/SOUTB
91 78 CTSB#
GP31 GP47/CTSB# DTRB#
92 GP30 GP44/DTRB# 81
64 85 RIB#
GP37 GP40/RIB#
PWRBTN# 67 59 A20GATE
21 PWRBTN# PSOUT#/GP57 GA20M A20GATE 20
PWRBTIN 68 60 KBRST#
29 PWRBTIN PSIN/GP56 KBRST KBRST# 20
PS_ON# KBDAT#

i-
29 PS_ON# 72 PSON#/GP53 GP26/KDAT 63
SLP_S3# 73 62 KBCLK#
21,31 SLP_S3# SUSB#/GP52 GP27/KCLK
SIO_48MCLK 18 66 MSDAT#
19 SIO_48MCLK IOCLK GP24/MDAT
VCC3_SB 65 MSCLK#
GP25/MCLK BEEP
61 3VSB SI/BEEP 118 BEEP 29
Trace Width 10 mils
VBAT CB4 X_C0.1U25Y
74 VBAT
75
SERIAL PORT 1 SERIAL PORT 2 CN4
GP51/RSMRST# NDTRB
VCC3 28 3VCC GP54/PWROK 71 2 1
C234 12 D10 BAS32L_LL34 NSINB 4 3
B C0.1U25Y 48
3VCC
3VCC GND 20
55
is 20
U9
1 +12VC C226 C0.1U25Y
+12V
20
U11
1 +12VC C252 C0.1U25Y
NSOUTB
NDCDB#
6
8
5
7
B

GND VCC5 VCC V+ VCC5 VCC V+


GP5077 19 NRIA# 2 19 RIA# NRIB# 2 19 RIB#
CB5 EN_VRM10/WDTO#/GP50 GP22/SCE# THERMDC_CPU NDCDA# RIN1 ROUT1 DCDA# NCTSB# RIN1 ROUT1 CTSB# 8P4C-180P50N
114 AVCC AGND 117 3 RIN2 ROUT2 18 3 RIN2 ROUT2 18
C0.1U25Y NDSRA# 4 17 DSRA# NDSRB# 4 17 DSRB#
CB6 W83627EHF-C NSINA RIN3 ROUT3 SINA NSINB RIN3 ROUT3 SINB CN3
7 RIN4 ROUT4 14 7 RIN4 ROUT4 14
C0.1U25Y NCTSA# 9 12 CTSA# NDCDB# 9 12 DCDB# NRIB# 2 1
RIN5 ROUT5 RIN5 ROUT5 NCTSB# 4 3
kn

SYS_TMP RTSA# 16 5 NRTSA RTSB# 16 5 NRTSB NDSRB# 6 5


SOUTA DIN1 DOUT1 NSOUTA DTRB# DIN1 DOUT1 NDTRB NRTSB
15 DIN2 DOUT2 6 15 DIN2 DOUT2 6 8 7
TMP_VREF R272 10KR1% RT1 10KRT1% THERMDC_CPU DTRA# 13 8 NDTRA SOUTB 13 8 NSOUTB
DIN3 DOUT3 DIN3 DOUT3
11 GND V- 10 -12VC D11 BAS32L_LL34
-12V 11 GND V- 10 -12VC C300 C0.1U25Y 8P4C-180P50N
Place adjacent to PWM MOS Q9 or Q23 GD75232_SSOP20 C253 C0.1U25Y GD75232_SSOP20
EMI NCTSA# 1 2
te

NDTRA 3 4 CN2
NSINA 5 6 8P4C-180P50N
RI# 21
NSOUTA DUAL_COM1A D12 DUAL_COM1B

19

21
7 8

C
BAS32L_LL34 R199
NRTSA 1 2 NDCDA# 1 6 NDSRA# NRIA# B Q22 NDCDB# 10 15 NDSRB#
NDSRA# 3 4 CN1 NSINA 2 7 NRTSA N-PMBS3904_SOT23-RH NSINB 11 16 NRTSB
NDCDA# 5 6 8P4C-180P50N NSOUTA 3 8 NCTSA# NRIB# 10KR NSOUTB 12 17 NCTSB#

E
NRIA# 7 8 NDTRA 4 9 NRIA# R206 NDTRB 13 18 NRIB#
5 D13 10KR 14
w.

CONN-COMX2_teal-20u-in-RH BAS32L_LL34

20

22
CONN-COMX2_teal-20u-in-RH

A A

N51-18M0031-S42
ww

CP7 MICRO-STAR INt'L CO., LTD.


Title
X_COPPER LPC-83627EHF & KB/MS
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 28 of 36
5 4 3 2 1
1 2 3 4 5

ATX Connector 20pins


VCC5_SB
VCC5_SB VCC5_SB ATX1

11 1 VCC3_SB
VCC3 3.3V 3.3V VCC3 VCC5

m
R29
A X_4.7KR 12 2 C3 A
-12V -12V 3.3V
D2 C4 C0.1U25Y
R15 C5 13 3 X_C0.1U25Y

co
4.7KR BAS32L_LL34 C0.1U25Y GND GND VCC5
14 4 C303 C50
PSON 5V VCC5
R17 X_0R R18 0R
15 5 C0.1U25Y C0.1U25Y
R16 33R C12 GND GND C10 R5
S D S D C1000P50X 16 6 C0.1U25Y 1KR
28 PS_ON# GND 5V
Q3 Q1

a.
17 7 PWR_OK 31

G
GND GND
N-2N7002_SOT23 X_N-2N7002_SOT23 18 8 C8 C0.1U25Y
C7 C0.1U25Y -5V POK
19 5V 5VSB 9 VCC5_SB
31 AGP_PTECT
VCC5 20 5V 12V 10 +12V

si
POWER
C417 C11 C9
C0.1U25Y C0.1U25Y C0.1U25Y
Letch circuit.
VCC5_SB

R39

ne
VCC3_SB 1KR
R48 4.7KR BAV99LT1_SOT23
1 2

D
B B
D

D3 G Q11
3

G N-2N7002_SOT23
C30 Q2
D

do
C10U16Y1206
S

G Q7
N-2N7002_SOT23 N-2N7002_SOT23 R57
1KR
S

R46
T_CRIT_A# 180KR
30 T_CRIT_A# SPEAKER BLOCK

in
New version 83627EHF is
NPN, old one is PNP.
Intel Front Panel

i-
JFP1
VCC5
HDD+ 1 2 PWR_LED
VCC5 HDD+ PLED PWR_LED 31
R71 330R
HDDLED 3 4 SUS_LED R275 RN27
HDD- SLED SUS_LED 31 VCC5
8P4R-470R
5 6 PWRSW+ R76 1KR 10KR 1 2
RESET- PWSW+ VCC5_SB
is 3 4

C
7 8 PWRBTIN R274 4.7KR 5 6 D17 1
C 6,21 FP_RST# RESET+ PWSW- PWRBTIN 28 C
BEEP B Q32 7 8 2
28 BEEP
9 BZ1
C46 NC R56 X_BAS32L_LL34 BUZZER-LF

E
C0.1U25Y 10KR C47 N-PMBS3904_SOT23-RH
H2X5(10)_bron C1U16Y
C318
kn

C0.1U25Y

C
R259 B Q31
21,27 SPKR
2.2KR N-PMBS3904_SOT23-RH

E
30 IDEACTP# D1
te
1

S-BAT54A_SOT23

3 HDDLED

21 SATALED#
2
w.
ww

D D

MICRO-START INT'L CO.,LTD.


Title
ATX ,Front Panel
Size Document Number Rev
A3 MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 29 of 36
1 2 3 4 5
1 2 3 4 5

SERIAL ATA CONNECTOR BLOCK


ATA 33/66/100 IDE Connectors

IDE1
BH2X20(20)_blue-1

m
SATA2 SATA1 R25 33R HDRST#P 1 2
31 HD_RST#
A 1 1 PDD7 3 4 PDD8 A
GND GND 21 PDD[0..15] PDD[0..15] 21
C170 C0.01U50X SATA_CTX0 2 C139 C0.01U50X SATA_CTX1 2 PDD6 5 6 PDD9
21 SATA_TX0 HT+ 21 SATA_TX1 HT+
C165 C0.01U50X SATA_CTX#0 3 C138 C0.01U50X SATA_CTX#1 3 PDD5 7 8 PDD10
21 SATA_TX#0 21 SATA_TX#1

co
HT- HT- PDD4 PDD11
4 GND 4 GND 9 10
C169 C0.01U50X SATA_CRX#0 5 C137 C0.01U50X SATA_CRX#1 5 PDD3 11 12 PDD12
21 SATA_RX#0 HR- 21 SATA_RX#1 HR-
C164 C0.01U50X SATA_CRX0 6 C136 C0.01U50X SATA_CRX1 6 PDD2 13 14 PDD13
21 SATA_RX0 HR+ 21 SATA_RX1 HR+
7 7 PDD1 15 16 PDD14
GND GND PDD0 PDD15
17 18
CONN-SATA1P_orange CONN-SATA1P_orange 19
21 PD_DREQ 21 22

a.
21 PD_IOW# 23 24
21 PD_IOR# 25 26
21 PD_IORDY 27 28
21 PD_DACK# 29 30
20 IDE_IRQ 31 32
21 PD_A1 33 34 ATADET0 21
21 PD_A0 35 36 PD_A2 21
21 PD_CS#1 37 38 PD_CS#3 21

si
29 IDEACTP# 39 40

R3 R24 R26 C27 R42


_20KR 8.2KR 4.7KR X_C4700P50X 15KR

VCC5 VCC3

ne
B B

do
+12V
CPU FAN
U23 D30 BAS32L_LL34

+1
14,19,20,28,31 SMBCLK_MAIN 1 SCL SDA 16 SMBDATA_MAIN 14,19,20,28,31 EC49
2 15 CPUFANPWM R465 4.7KR R405 27KR TACH1
GND PWM1 .CD1000U6.3EL15
14 VCCP

in
2
VCCP Q52 P-SI2303BDS-T1-E3_SOT23-3-RH CPU_F1
VCC3 3 VCC
TACH3 4 13 D+ R386 1KR R399
C419 C431 TACH3 D1+ 3 10KR
S D 2
C0.1U25Y C10U16Y1206 5 12 D-
21 ADT7467_ALERT# PWM2/SMBALERT# D1- C552 C537 1
TACH1 6 11 VCC3 R466 FAN1X3_white

G
TACH1 D2+ S-1N5817_DO214AC
7 TACH2 D2- 10
VCC3_SB 2.2KR R481 D31 C10U16Y1206

i-
SYSFANPWM 8 9 R393 1KR
PWM3 THERM# X_C10U16Y1206
10KR

D
VCC5
_ADT7467ARQ CPUFANPWM G Q53
R50 N-2N7002_SOT23
10KR

S
GUARD GND TRACE
is
C C

T_CRIT_A#
D+ T_CRIT_A# 29
CPU_TMPA 6
R380 0R
C390
D-
FAN CONTROL
kn
C1000P50X VTIN_GND 6
R381 0R

GUARD GND TRACE

PLACE ADT7467 AS CLOSE AS POSSIBLE TO CPU


te

GUARD TRACE & D+/D- WIDTH:SPACE= 10:10 MIL(MIN) SYSTEM FAN


+12V

D28 BAS32L_LL34

R460 4.7KR R418 27KR TACH3


w.

SYS_F1
R417
3 10KR
C476 2
1
C10U16Y1206 BH1X3B_white-2

VCC3
ww

D D

R484
10KR

MICRO-START INT'L CO.,LTD.

D
SYSFANPWM G Q51
Title
N-P3055LDG_TO252-RH SATA1,2 , IDE1& Fan control
S Size Document Number Rev
A3 MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 30 of 36
1 2 3 4 5
5 4 3 2 1

L04-33A7211-T15 Cap ripp=10.48A

CHOKE2 _CH-3.3U15A_D
1.5V POWER C451 S-1N5817_DO214AC 8.58A EC45 .CD1000U6.3EL15
X_C1U16Y
3VSB MODE SELECT VDIMM LINEAR OR PWM SELECT X_C0.1U25Y
VCC5
C410
1
EC47
+ 2
.CD1000U6.3EL15
3VSB MODE 3VDLDEC# VDIMM MODE EXTRAM R434 +12V R436 X_0R C450 1 2
+
R433 C453 R432 D29 C407 C442 X_C0.1U25Y EC46 .CD1000U6.3EL15
SINGLE MOSFET PULL HIGH LINEAR REGULATOR PULL LOW 5.11KR1% 49.9KR1% C454 C22U10Y1206 1 2 22.87A OCP 40A
+
X_33R1% X_C0.22U16Y
DUAL MOSFET PULL LOW PWM REGULATOR PULL HIGH U25 X_C22U10Y1206 X_C10U16Y1206

D
V_1P5_VREF 7 8 C462 C0.22U16X Q46
ISET BOOT R566 N-P75N02LDG_TO252 V_1P5_CORE
6 VREF_IN H_DRV 9 G
5 10 0R0805 CH-2.2U25A-RH
R441 R440 51KR1% C463 C2200P16X FB PGND R443 8.2KR
4 11

S
COMP ISEN

ACPI
X_33R1% CHOKE1

m
3 SS L_DRV 12
C459 X_C0.01U50X 2 13

D
D GND VDD R340 D
1 PWROK VDDA 14 R567

+1

+1

+1
R450 100R G Q45 X_2.2R EC33

Controller
MS-6+G_SOP14-LF C501 EC37
0R0805

co
C472 C492 C4.7U10Y0805 N-P75N02LDG_TO252 C373 CD1800U6.3EL20-2

2
C4.7U10Y0805 CD1800U6.3EL20-2
C0.1U25Y X_C1000P50X
VCC5
R461 EC36
VCC5_SB CLOSE TO CHIP CD1800U6.3EL20-2
10R0805
L04-22A7211-T15

a.
R37 R49 VCC5 VCC5
158R1%
158R1%
Iocp=72uA*RISEN/RdsON
R55 40A=72uA*RISEN/8.6m ohm RISEN=4.7k ohm VCC3
330R X_C1U16Y
29 PWR_LED
9VSB V_1P5_CORE
Q8 C250

D
SLP_S4# 21

si
R47 4.7KR 3VDLDEC# SLP_S3#
PCIRST#
SLP_S3# 21,28
PCIRST_ICH6# 17,20
V1P2_DRV G Q25 1.05V POWER
N-PMBS3904_SOT23-RH R58 33R0402 N-2N7002_SOT23
HD_RST# 30

8
R63 33R

D
29 SUS_LED PCIRST_SLT# 17,23,32

S
R75 33R V1P2_SEN R243 150R1% V1P05_REF 3 N-P3055LDG_TO252-RH
PCIRST#1 25,33 +
Q4 C54 1 G Q28
R43 4.7KR EXTRAM C69 X_C20P50N VCC3_SB C266 C281 2 V_1P05_CORE
X_C20P50N -

S
N-PMBS3904_SOT23-RH R38 R51 RSMRST# C1U16Y R245 C1U16Y 1.31 A
RSMRST# 21

4
U13A

ne
C68 VCC3 R74 1.05KR1% LM358MX_SOIC8
1KR 1KR 4.7KR0402 C220

1
C0.1U25Y VCC5_SB C1U16Y EC30

+
EC6 .CD1000U10EL15 RSMRST# .CD1000U6.3EL15
C VCC5_SB 1+ 2 C

2
VCC3 U3
VCC5_SB
48
47
46
45
44
43
42
41
40
39
38
37 MS-7-RBC C89 C1U16Y
PLED1/EXTRAM
PLED0/3VDLDEC#
S5#
S3#
PCI_RST#
HDD_RST#
DEV_RST#
SLOT_RST#
VCC3
PCIRST_BUF#
RSMRST#
AGND
CHARGE PUMP VOLTAGE

do
R32 R20 R31 9VSB OUTPUT
VCC5_SB 1KR 4.7KR 1KR

R34 33R 1 36 C91 C1U16Y0805


14,19,20,28,30 SMBCLK_MAIN SCL CHARPMP
R33 33R 2 35
14,19,20,28,30 SMBDATA_MAIN SDA C2
R19 3 34 C93 C1U16Y0805
9,21 VRM_GD FP_RST# C1 VCC5_SB
1KR PWR_GD 4 33 C305
10,21 PWR_GD CHIP_PWGD 5VSB
5 32 V1P2_DRV
SMB_PWROK CPU_PWGD VLR1_DRV V1P2_SEN C88 C1000P50X C2200P16X Q33
20 SMB_PWROK 6 POK1 VLR2_SEN 31
PWR_OK 5VUSB_DRV 5VDUAL1

in
29 PWR_OK 7 PWROK 5VUSB_DRV 30 4 5
29 AGP_PTECT 8 29 3 6
PSOUT# 5V_DRV 5V_DRV
X7R 9 DDRTYPE VLR2_DRV 28 2 7 2A
SVRAM_DRV/DMSB

DDR AND DDR II VOLT SELECT C26 C0.22U16X R82 10KR


10 SS VLR2_SEN 27 1P2VREF 16 1 8
5V DUAL Power
RAM_HDRV/DMV

11 26 C306
GND GND C87 _NN-P07D03LV_SO8-RH
DDRTYPE VDIMM VCC5 12 VCC5 VAGP_DRV 25
C99 C2200P16X
RAM_HSEN

VAGP_SEN
3VSB_DRV
RAM_DRV
RAM_SEN

PULL LOW 2.5V C25 C1000P50X VCC5 FRONT USB


VID_DRV
VID_SEN

C4.7U10Y0805
VIDGD#

C0.1U25Y
5VSB

3VSB

PULL HIGH 1.8V

i-
VCC5_SB VCC5 VCC3
13
14
15
16
17
18
19
20
21
22
23
24

V_FSB_VTT THIS PIN IS OPEN DRAIN OUTPUT Q9


R72

1
VID_GD# 33R V_1P5_VREF 5VUSB_DRV 5VDUAL2 EC8

+
7,9 VID_GD# 4 5
3 6 EC43
EC14 Q17 5V_DRV 2 7 2A

2
S

.CD1000U10EL15
1

Wide Trace

C155 C60 C80 CD470U10EL11.5


RAM_DRV

RAM_SBDRV
+
+

N-P3055LDG_TO252-RH 1 8
.CD1000U10EL15 EC22 G
X_C10U16Y1206 C1000P50X
is
X_C0.1U25Y _NN-P07D03LV_SO8-RH
2

VCC5 Rear USB


B B
VCC5_SB Close to MS6+ VCC5_SB SWITCH:
.CD100U16EL11 C39 C35 Q48
V_1P5_CORE
2 3
D03-40N030B-A36
Q5 D S
C1U16Y C2200P16X D03-20N030B-I14
+1

+1

EC23 4 5 4
VCC5_SB D
EC15 Wide Trace 3 6 D03-45N030B-P03
kn

X_CD470U6.3EL11 CD1800U6.3EL20-2 R54 33R RAM_VREF 5V_DRV 2 RAM_SBDRV


7 1 Regulator(TO-252)
2

G
1

VCC3_SB 10 A
+

VCC3 1 8
C45 C38 EC1 C436 N-APM2054NDC-TRL_SOT89-LF
_NN-P07D03LV_SO8-RH
D03-45N020B-N03
L04-33A7191-T15 5VDIMM
2

DDR VTT Power C1000P50X C1000P50X C2200P16X D03-40N030B-A36

1
Ripple current 4A EC42

+
CD470U10EL11.5 L04-33A7191-T15 D03-6530A0B-F01
.CD1000U6.3EL15
Regulator(TO-263)

2
CHOKE3 RAM_DRV G
CH-3.3U4A-RH Q47
D03-50N034B-N03
te

VCC_DDR C512 X_C1U16Y


5VDIMM 1+ 2 N-P0903BD_TO252

S
EC64
R478 X_C0.1U25Y R431 X_0R C429 EC53 .CD1500U16EL20
D03-50N031B-P03
CD1800U6.3EL20-2 VCC_DDR R467
+12V
D25 C4.7U10Y0805 VCC5
Dual NMOS
5.11KR1% R469 C507 56.2KR1%0402 C445 C439 C1U16Y0805
VCC3_SB
+
X_C0.22U16Y S-1N5817_DO214AC Q50
D03-07D0303-N03
5
6
7
8

U26
U27
W83310DG_SOP8-RH
X_33R1%
RAM_VREF C458 C0.22U16X _N-FDS6680AS_SO8-RH
D03-0731303-A30
7 ISET BOOT 8
8 1 VTT_DDR R473 R464 5.11KR1% 6 9 4 VCC_DDR
VREF2 VIN VREF_IN H_DRV CHOK1 CH-4.2U10A 9.9A
w.

5 FB PGND 10
7 2 1KR1% R477 51KR1% C511 C2200P16X 4 11 R435 2.7KR OCP 15A VCC5
ENABLE GND2 COMP ISEN
3 12 1 2
6 1
7 2
8 3

C504 X_C0.01U50X SS L_DRV


6 VCTRL VREF1 3 2 GND VDD 13
5

Q49 R456 EC61 EC59 EC60 EC48


+

+
1 PWROK VDDA 14
5 4 X_4.7R
BOOT_SEL VOUT
GND9

C509 R474 MS-6+G_SOP14-LF C455 C456 4 CD1800U6.3EL20-2 CD1800U6.3EL20-2


1

EC63 EC62 C503 C4.7U10Y0805 CD1800U6.3EL20-2


+

C0.1U25Y 1KR1% R468 C0.1U25Y C2.2U10X0805 C495


100R X_C1000P50X
9

1
2
3
ww

C464 R429 CLOSE TO CHIP CD1800U6.3EL20-2


A A
C0.1U25Y 10R0805
5VDIMM
_N-FDS6680AS_SO8-RH
.CD1000U6.3EL15 5VDIMM
.CD1000U6.3EL15

Iocp=72uA*RISEN/RdsON
20A=72uA*RISEN/8.6m ohm RISEN=2.38k ohm MSI MICRO-STAR INt'L CO., LTD.
Title
MS7 ACPI CONTROLLER
Size Document Number Rev
3.0
MS-7231
Date: Thursday, September 06, 2007 Sheet 31 of 36
5 4 3 2 1
1 2 3 4 5

TDC2 TDC1
AS pin setting : N5B-24F0141-K06 R263 R262
Pull HIGH = Device Address Byte SDVOC_Red+ X_0R X_0R
70h(Write),71h(Read)
12 SDVOC_Red+
SDVOC_Red-
N5B-24F0111-C67 TDC2# TDC1#
12 SDVOC_Red-
Pull LOW = Device Address Byte 12 SDVOC_Green+ SDVOC_Green+ _CONN-DVI(D)24P_white-RH
72h(Write),73h(Read) 12 SDVOC_Green- SDVOC_Green- TDC0 TLC
VCC5 VCC5
SDVOC_Blue+ DVI1 R261 R260

25
26
12 SDVOC_Blue+
12 SDVOC_Blue- SDVOC_Blue- X_0R X_0R
TDC0# TLC#
SDVOC_Clk+

m
12 SDVOC_Clk+
L24 12 SDVOC_Clk- SDVOC_Clk- FOR EMI

2
A A
80L3_40_0805 C10U16Y1206 R269 R270 TDC2# 1 13
2.5V TDC2 2 14

co
10KR 10KR 3 15
C372 C351 C353 C350 4 16 C344 C36

1
C0.1U25Y C0.1U25Y C0.1U25Y R267 0R 5 17 C0.1U25Y C10U16Y1206
SC_DDC DVI_SC_DDC 6 18
SD_DDC DVI_SD_DDC 7 19
L16 R276 0R 8 20
80L3_40_0805 C0.1U25Y TDC1# 9 21
2.5V TDC1 10 22 VCC3

a.
R268 R284

49
48
47
46
45
44
43
42
41
40
39
38
37
U16 11 23
C327 C332 C334 X_0R X_0R 12 24 R328
C10U16Y1206 C0.1U25Y 10KR R311

Thermal_GND
AVDD

AGND

AVDD

AGND
SDVOB_CLK-
SDVOB_CLK+

SDVOB_B-
SDVOB_B+

SDVOB_G-
SDVOB_G+

SDVOB_R-
SDVOB_R+
23 CH7021_SC_DDC 1KR
2.5V R312
2.5V 1KR
23 CH7021_SD_DDC
R303 R301 HPDET

C1
C2
C3
C4
C5
C6
5.6KR 5.6KR
R305 DVI_VSYNC Q41
10KR 1 36 N-PMBS3904_SOT23-RH

si
AVDD_PLL AVDD DVI_RED TLC#
17,23,31 PCIRST_SLT# 2 RESET* SDVOB_STAFF- 35
3 34 TLC HPDET_0
AS SDVOB_STAFF+ INT- DVI_GREEN
12,23 SDVO_CtrlClk 4 SPC SDVOB_INT- 33
R306 12,23 SDVO_CtrlData 5 32 INT+ TDC0 Q40
X_100KR1% SPD SDVOB_INT+ DVI_BLUE TDC0# N-PMBS3904_SOT23-RH
6 AGND_PLL AGND 31
7 DGND DGND 30
SD_PROM 8 29 HPDET DVI_HSYNC
SC_PROM SD_PROM HPDET
9 SC_PROM DVDD 28

ne
When using the INTEL driver SD_DDC 10 27
SC_DDC SD_DDC ATPG
for the Ch7307,AS pin must 11 SC_DDC SCEN 26
be pulled HIGH 12 25 VSWING
DVDD VSWING

TDC0*

TDC1*

TDC2*
TGND

TGND
B B

TVDD

TVDD
R297 R298

TDC0

TDC1

TDC2
R291

TLC*
TLC
L20
80L3_40_0805 1.2KR1% 10KR 10KR VCC5
VCC3 13 U21 2.5V
14
15
16
17
18
19
20
21
22
23
24
CH7307C-DE L17 LT1087S_SOT89

do
C352 C342 80L3_40_0805 VCC3 3 2
C10U16Y1206 C0.1U25Y TVDD VIN VOUT

ADJ
C322 C321 C319 C396 + EC44 + EC41
C0.1U25Y C0.1U25Y C10U16Y1206 C385
TDC2 R395 C0.1U25Y
TDC2# C0.1U25Y 100R1%

1
X_C10U16Y1206
VCC5 TDC1

in
TDC1#

TDC0 C10U16Y1206
2

TDC0# R400
R309 R302 100R1%
U18 TLC
1 8 5.6KR 5.6KR TLC#
A0 VCC
2 7
1

A1 WP SC_PROM

i-
3 A2 SCL 6
4 5 SD_PROM C345 C0.1U25Y
VSS SDA X_1KR INT-

X_24C16 SDVOC_Int- SDVOC_Int- 12


R307 SDVOC_Int+ SDVOC_Int+ 12 VCC3
R308 C338 C0.1U25Y
0R C340 INT+
C0.1U25Y VCC5
is

5
6 4 HPDET_0
C C
WP: PULL HIGH -Write Protect Enable
PULL LOW -Normal Operation 1 3
VCC5
D19

2
ESD-IP4220
14

U17B D21 D22


kn

4 BAV99LT1_SOT23 BAV99LT1_SOT23
23 CHSYNC-2 CHSYNC-2 6 R388 1 2 33R 2 1 2 1
5

3
ACT08DR_SOIC14
7

DVI_HSYNC
VCC5
te

DVI_VSYNC
14

U17C
23 VSYNC-2 VSYNC-2 10
8 R371 1 2 33R DVI_RED
9

ACT08DR_SOIC14 DVI_GREEN
7
w.

L23 L22
23 RED-2 RED-2 1 2 FRED 1 2 DVI_BLUE
1

0.082U300m 0.082U300m C355


C357 C22P50N
C22P50N C356
2

L31 C33P50N L30


GREEN-2 FGREEN 1
ww

23 GREEN-2 1 2 2
D D
1

0.082U300m 0.082U300m
C379 C378 C377
C22P50N C33P50N C22P50N
2

L26 L25
23 BLUE-2 BLUE-2 1 2 FBLUE 1 2

0.082U300m 0.082U300m MICRO-START INT'L CO.,LTD.


1

C364
C380 C22P50N Title
C22P50N C365 CH7307 & DVI CONNECTOR
2

C33P50N
Size Document Number Rev
Custom MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 32 of 36
1 2 3 4 5
1 2 3 4 5

N58-22F0031-S42 for Giga Lan


N58-22F0061-S42 for 10/100M
1G=Orange,100M=GREEN,LINK-UP=YELLOW
ACTIVE =Blinking
VCC3_SB VCCL1.8
VCC3_SB
LAN_1.2V FOR 82541PI/GI
CLOSE TO LAN CHIP FOR 82562EZ FB1
C2 C0.1U25Y 80L3_40_0805

m
C31 C56 C58 C23 C22 C43 C29 C33 MDI_3- R4 49.9R1% R2 R53
A C10U16Y1206 C0.1U25YC0.1U25Y C0.1U25YC0.1U25YC0.1U25YC0.1U25YC0.1U25Y MDI_3+ R6 49.9R1% X_330R X_330R A
C16 C0.1U25Y
MDI_2- R10 49.9R1% LAN_USB1B

co
MDI_2+ R14 49.9R1% ACTLED# 19 AMBER+
LINKLED# R8 330R 20 AMBER-
FOR 82562EZ VCCL1.2 MDI_1- R11 49.9R1%
C17 C0.1U25Y
C1 C19 MDI_0+
13
18
NC
TD1+
VCCL1.8 VCC3_SB MDI_1+ R12 49.9R1% MDI_0- 12 TD1-
RN1
FOR 82541PI/GI 7 8 MDI_0- R9 49.9R1%
C15 C0.1U25Y C1000P50X C1000P50X MDI_1+
MDI_1-
17
11
TD2+
TD2-

8
6
4
2
5 6 MDI_0+ R13 49.9R1% MDI_2+ 16 TD3+

a.
3 4 RN3 MDI_2- 10 TD3-
R41 1 2 8P4R-0R MDI_3+ 15 TD4+
C21 _0R0805 USE 54.9R/1% at TX/RX for 82562EZ FOR 82541PI/GI MDI_3- 9 TD4-

7
5
3
1
C0.1U25Y X_8P4R-0R 14 NC
LAN_1.2V 1000LED# R45 330R 21 GREEN+ ORG-
100LED# 22 GREEN- ORG+

G12

G13
D11

H11
A11

K13

P12

E11
E12

K10
K11

L10
J10
J11
AD[31:0]

G5
G6
D9

N6
N8

H5
H6
H7
H8
C51 C37

A3
A7

E1
K3
K4

P2

K5
K6
K7
K8
K9
U1

L8

L4
L5
L9
J5
J6
J7
J8
J9
17,20,25 AD[31..0]
R1 CONN-RJ45_USBX2_LEDX2_TX_black

si
AD0 N7 A12 LINKLED# C1000P50X C1000P50X 0R

3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V

1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
1.2V /3.3V
NC
1.8VCC /NC
1.8VCC /NC
NC
AD1 AD0 LINK_LED# ACTLED#
M7 AD1 ACTLED# C11
AD2 P6 B11 100LED#
AD3 AD2 LINK100# 1000LED#
P5 AD3 LINK1000# /TOUT B12
AD4 N5 AD4
FOR 82541PI/GI
AD5 M5 C13 MDI_0+
AD6 AD5 MDI[0]+ /TDP MDI_0-
P4 AD6 MDI[0]- /TDN C14
AD7 N4 E13 MDI_1+
AD7 MDI[1]+ /RDP

ne
AD8 P3 E14 MDI_1-
AD9 AD8 MDI[1]- /RDN MDI_2+ VCC3_SB
N3 AD9 MDI[2]+ /NC F13
AD10 N2 AD10 MDI[2]- /NC F14 MDI_2- FOR 82541PI/GI 4.7KR
AD11 M1 H13 MDI_3+
B AD12 AD11 MDI[3]+ /NC MDI_3- B
M2 AD12 MDI[3]- /NC H14
AD13 M3 U2
AD14 AD13 EE_EECS1 C66
L1 AD14 EESK /NC M10 1 CS VCC 8
AD15 L2 P10 EE_SHCLK1 2 7 R52 C0.1U25Y
AD16 AD15 EEDI /NC EE_DOUT1 SK NC
K1 N10 3 6

do
AD17 AD16 EEDO /NC EE_DIN1 DI ORG
E3 AD17 EECS /NC P7 4 DO GND 5
AD18 D1 J4 EEMODE
AD19 AD18 EEMODE /NC RN24 X_8P4R-0R AT93C46-10SI-2.7-A
D2 AD19
AD20 D3 P13 7 8 LCI_CLK
AD20 SDP[1] /JRXD[0] LCI_CLK 20
AD21 C1 N13 5 6 LCI_TXD0 EEMODE
AD21 SDP[2] /JRXD[1] LCI_TXD0 20
AD22 LCI_RXD0 Install if using
PCI INTERFACE FOR 82541GI ONLY

B1 AD22 SDP[3] /JRXD[2] M12 3 4 LCI_RXD0 20


AD23 B2 N14 1 2 LCI_RXD2 Microwire protocol
AD23 SDP[0] /JCLK LCI_RXD2 20 EEPROM devices. Do
AD24 B4 M13 JTAG_TCK7 8 LCI_TXD2 R60
AD24 JTAG_TDI /JRSTSYNC LCI_TXD2 20

in LCI
AD25 A5 M14 5 6 LCI_SYNC 100R not install if using
AD25 JJTAG_TDO /JTXD[0] LCI_SYNC 20 SPI EEPROM devices.
AD26 B5 L13 JTAG_TRST# 3 4 LCI_RXD1
AD26 JTAG_TRST# /JTXD[1] LCI_RXD1 20
AD27 B6 L14 JTAG_TCK JTAG_TRST#1 2 LCI_TXD1
AD28
AD29
AD30
C6
C7
A8
AD27
AD28
AD29
AD30
INTEL JTAG_TCK /JTXD[2]

JTAG_TMS /NC L12


RN25 X_8P4R-0R
LCI_TXD1 20

17,20,25 C_BE#[0..3]
C_BE#[0..3] AD31 B8 AD31
FOR 82541PI/GI Disable JTAG Interface R323,R345 VALUE
J13 JTAG_TRST# R251 100R
C_BE#0
82541PI/GI Gigabit XTAL_1.8V /NC VCCL1.8
100R

i-
M4 C/BE0# NC H12 82541PI
C_BE#1 L3 F12 R7 0R JTAG_TCK R273 1KR
C_BE#2 C/BE1# NC
F3 C5 82541GI 1K

17,20,25 FRAME#
FRAME#
C_BE#3 C4

F2
C/BE2#
C/BE3#

FRAME#
82562EZ 10/100M NC

FLSH_SO/LAN_DISABLE# /NC
FLSH_SI /NC
P9
M11
R28 2.7KR

IRDY#
17,20,25
17,20,25
IRDY#
TRDY#
TRDY#
DEVSEL#
F1
G3
H3
IRDY#
TRDY# BGA-196PIN FLSH_SCK /NC
FLSH_CE# /NC
N9
M9 VCC3_SB
17,20,25
17,20,25
17,20,25
DEVSEL#
STOP#
PAR
STOP#
PAR
H1
J1
DEVSEL#
STOP#
is
82541PI P/N: B06-8254125-I06
AUX_PWR /NC J12
M8
R21 2.7KR
C PAR NC VCC3_SB
17,20 PIRQ#C
PIRQ#C H2 INTA#
FOR 82541PI/GI C
PERR# J2 82541GI P/N: B06-541GI05-I06 C10U16Y1206
17,20,25 PERR# PERR#
SERR# A2 H4 R62 _0R0805 VCCL1.2
17,20 SERR# SERR# PLL_1.2V /NC
AD18 R61 100R A4 82562EZ P/N: B06-562EZ05-I06 G4
PREQ#2 IDSEL PLL_1.2V /NC C44 C0.1U25Y _P-BCP69T1G_SOT223
17,20 PREQ#2 C3 REQ#
PGNT#2 J3 C52 C59
20 PGNT#2 GNT#

3
kn

C2 B14 RBIAS10 C0.1U25Y


LAN_PCLK M66EN IEEE_TEST+ /RBIAS10 RBIAS100 Q12
19 LAN_PCLK G1 CLK CTRL18 /RBIAS100 B13 1
B9 VCCL1.8
25,31 PCIRST#1 RST#
TP13 C8

2
4
CLKRUN#
17,20 PCI_PME# A6 PME# CTRL12 /NC P11
NC N11
EC3
8 7 A10 SMBCLK /NC
+ C42 C40
6 5 C9 VCC3_SB
te

VCC3_SB SMBDATA /NC


4 3 B10 A13 R22 0R
SMB_ALERT#/LAN_PWR_GOOD /NC TEST
2 1
NC /ISOL_EXEC D10 TP12 FOR 82541PI/GI R65
RN2 8P4R-4.7KR D12 VCCL1.8 _1R1210 .CD470U10EL11 C0.01U50X C0.01U50X
CLKR_1.8V /ISOL_TI
IEEE_TEST- /ISOL_TCK D14 TP14
LAN_PWRGD R30 0R
A9 LAN_PWR_GOOD /NC
R69 100KR1% G2 C41
VCC5_SB VIO /NC
w.

C10U16Y1206 C63
C18

3
FOR 82541PI/GI C64 C0.1U25Y C0.1U25Y
XTAL1 K14 RBIAS10 1 Q13
XTAL2 XTAL1 VCCL1.2
J14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

XTAL2 RBIAS100 _P-BCP69T1G_SOT223


NC
NC
NC
NC
NC

2
4
C22P50N
Y1
B3
B7
C10
D5
D6
D7
D8
E2
E4
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
F11
G7
G8
G9
G10
G11
G14
H9
H10
K2
K12
L6
L11
M6
N1
N12
P8
D4
C12
D13

L7
A1
A14
P1
P14

VCC3_SB
25MHZ18P_D-1 R23 R27 EC5 C55
ww

C14 + C77
D D
R40 X_649R1% X__619R1%-1 .CD470U10EL11 C0.01U50X C0.01U50X
R44 10KR
C22P50N 10KR
LAN_PWRGD PIRQ#C IDSEL = AD18
MASTER = PREQ#2
Q6
FOR 82562EZ
VCCL1.2 R67 10KR
C24
MICRO-START INT'L CO.,LTD.
Q10 C0.1U25Y Title
82541PI/GI/82562EZ & RJ45 CONNECTOR
N-PMBS3904_SOT23-RH
N-PMBS3904_SOT23-RH Size Document Number Rev
Custom MS-7231 3.0
Date: Thursday, September 06, 2007 Sheet 33 of 36
1 2 3 4 5
8 7 6 5 4 3 2 1

Auto-BOM Manual Parts

m
D D

MANUAL PART

co
Mounting Holes

a.
BIOS1_X1 PCB1

MH2 MH5 MH3


1 5 1 5 1 5
2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6
3 7 3 7 3 7 PLCC-32 MS-7231 V3.0

si
4
9
8

4
9
8

4
9
8
battery JBAT1(1-2)1
BAT1_X1
MH4 MH1
1 5 1 5
2 6 2 6 + X_JUMPER-1X2A_green

ne
(NPTH) (NPTH)
3 7 3 7
C C
4
9
8

4
9
8

do
Simulation

in
X_J2 X_J1

VCC5
Optics Orientation Holes
60 Ohm±10﹪5/5(mil)
X_J3

i-
DIFF90-
FM7 FM8 FM3 FM4 FM5 DIFF90+

90 Ohm±10﹪7.5/7.5/20(mil) put in bottom layout


FM6 FM10 FM1 FM2 FM9
X_J4
B
is DIFF100-
DIFF100+
B

100 Ohm±10﹪5/7/20(mil) put in bottom layout


kn
te

NB HEAT SINK
SB HEAT SINK

U30_X1 N3
w.

N1

X5 MCH X1 _HS_HOOK _HS_HOOK HS7


X6 X2
X7 X3

A
X8 Heatsink X4
A

MCH_HS
ww

_HS-MS6285

MSI MICRO-STAR INt'L CO., LTD.


Title
Auto BOM manual
Size Document Number Rev
3.0
MS-7231
Date: Monday, September 10, 2007 Sheet 34 of 36
8 7 6 5 4 3 2 1
5 4 3 2 1

VRM_EN
PWROK MAP

m
D D

VRM 11 VTT_PWG

co
ISL6326 Intel LGA775 Processor
4-Phases PWM VTT_PWRGOOD signal must be
delayed 1-10ms after
VTT_FSB for proper

a.
clock/cpu function
H_PWRGD

si
VRM_GD LAKEPORT-G VID_GD#

ne
C C

do
PWRGD_3V
ICH_SYNC# MS7

in
i-
ICH7
SLP_S4#

SLP_S3#
B B
is
PWR_OK
PWRBTN#
kn

PS_ON#
Front Panel
te
w.

A
POWER CONN A

MICRO-STAR INt'L CO., LTD.


ww

MSI
Title
PWOK MAP
Size Document Number Rev
3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 35 of 36
5 4 3 2 1
8 7 6 5 4 3 2 1

1.增加Corontel
7231 Ver: 0ATVout MAX線路(BOM也要改,線路要改 Ver2.1
2.R420上75 ohm(R11-0750T13-W08),R406 改37.4 ohm(R11-3742T13-W08) 34.Add EC49 1000uF cap on fan control circuit +12v
3.X_Copper 要改CP1,CP2,CP5,CP6(線路要改) 35.Add two pcs mosfield heatsink
4.SYSTEM FAN 要改文字面(線路要改) 36.Add R542,549,550,551 10kOhm to VRM circuit.
5.DDR2-Memerysocket料號要換DIMM2(N13-2400301-K06) DIMM1(N13-2400351-K06) 37.Add CPU fequency control circuit to support

m
D
6.PWM Low Side MOS--Q19,Q24,Q26,Q29,Q35,Q38料號要換成(D03-06N032B-I14) Conroe 1066Mhz D

7.N2,N4 北橋heatsink旁固定3PIN--不用上(線路要改) 38.Vccp capacitor 22uF change to 10uF and

co
removed EC71,72,83,88,99 and move EC100 to top layer
8.U18 Corntel EEPROM不用上 inside LGA775 socket.
9.EC6,EC40電容高度會卡機構,要改矮,可改 39.change R515 value to 2.15k for power circuit
EC6改(C94-1021061-P01 ) 注意高度 40.change C607~C610 to 68P for power circuit.

a.
EC40改(C94-1021641-P01)-16mm注意高度 41.Removed C611,R542
10.Check加工注意事項!!=?Choke3有一AVL不能用!!(BOM注意) 42.change R499,509,531,545 to 2.2R
11.R140,R142 SMBCLK and SMBDATA pull up 電阻改成2.2K ohm(R11-0222013-W08) 43.change C578,594,606,616 to 3.3nF.

si
12.Dual com port 料號確認一下使用貿電的(N51-18M0051-K06)!! 44.Add R566,567 0R to VRM circuit.
13.申請ROHS料號請看report(N54-26F0111-K06)-6 port Audio Jack
14.DVI 料號確認(N5B-24F0141-K06)

ne
C 15.Front Audio Jack 料號check (N54-05F0601-S42 亮綠--Audio2)( N54-05F0611-S42-Audio1 粉紅) C

16.modify R409 ,R415,R421 24.3K ==>31.6K 1% 0603(R11-3162T23-W08) (Power team suggestion)


17.R352 10K=? 改為5.6K(R11-0562023-W08) 改善Rise-time不夠

do
18.改善AUDIO cross talk 問題R490,R491,R489 10K 改成100K(R11-0104043-W08)
19.Super I/O 要改HF版本Buzzer才會有聲音U12(B02-0627E34-W03) 45.change R92 from 220R to 100k
20.C205 改0.1UF/0603(C11-1043013-W08) 改善HXSWING問題

in
21. C228上10U(C11-1063034-W08) 改善HXSWING問題 Ver3.0
22.PCB 料號修改成(P60-072310B-E48) 1.stuff R375 and un-stuff R373, Q19, R190
23.R65轉 ROHS 料號 (R11-0010028-W08) 2.Add R3000,R3001,R3002 footpring in schematic and

i-
24.JVGA1 轉ROHS料號(N59-15F0361-K06) stuff R3000,R3002 un-stuff R3001.
B 25.VT6307 U6轉ROHS料號U6 (B07-0630724-V01) B
26.C119,C359,C362,R419,R128,R137不上
27.R489,R490,R491 10K改成100K(R11-0104043-W08)
is
28.V_1P5_CORE輸入電容(C94-1020651-T30)EC45,EC46,EC47
要改1000UF/10V(C94-1021061-P01)---改善ripple current不夠
kn

(與EC14料號相同)
te

Ver2.0
29.page 27 removed R479 10k,change ALC880 to ALC888,PIN33 is NC
30.page 9 change VRM10 to VRM11 MICRO-STAR INt'L CO., LTD.
w.

A A
31.page 6,7,8 change LGA775 to support Conroe-L Processor
32.page 35 change VRM10.1 to VRM 11 Title
33.page 1,2,3,4 change Function to match Conroe History
ww

Processor and ALC888 SPEC. Size Document Number Rev


3.0
MS-7231
Date: Wednesday, September 05, 2007 Sheet 36 of 36
8 7 6 5 4 3 2 1

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