Computer Engineering: MSC Programme
Computer Engineering: MSC Programme
Computer Engineering: MSC Programme
MSc Programme
1 Quarter
st
2 Quarter
nd
3rd Quarter 4th Quarter
Common core: Profile Orientation and Academic Skills (3 EC) Common core: System Engineering (3 EC)
Common core courses EE & CE CE Track core courses are: Modern Computer Architectures, Compiler Construction, Methods and
(at least 1 out of 7, i.e. 5 EC) Algorithms for System Design, Computer Arithmetic, Processor Design Project and Introduction to High
Performance Computing
CE Track core courses
(at least 4 out of 6, i.e. 20 EC)
Specialisation courses (29 EC), e.g. High-Performance Data Networking, Electronics for Quantum Computation, Supercomputing for Big Data,
Reconfigurable Computing Design, VLSI Systems on Chip, Digital IC Design, VLSI Test Technology & Reliability, Wireless Communications,
Embedded Computer Architectures 2, Ad-hoc Networks, Deep Learning and Security & Cryptography.
+ Free elective courses (15 EC), e.g. homologation, internship, or non-technical courses.
Computer Engineering programme will prepare Testability for 3D stacked ICs and emerging Career perspective
you for the engineering challenges that lie memories) 3. Hardware security (including PUF
ahead. technology, secure design, etc).
Companies
NXP, ASML, Philips, Apple,
Research Themes In-Memory Computing targets the
There are five different research themes that development, design and the demonstration Intel, Google, IBM, Erasmus
drive many of the courses and that provide of a new architecture paradigm for big data Medical Centre, China Telecom,
opportunities for a thesis project. problems. This research is based on the Academic careers
integration of the storage and computation in
Quantum Computing is part of the QuTech the same physical location (using a crossbar
research lab that aims to build a quantum gates topology) and the use of non-volatile resistive-
based computer. We are looking at the different switching technology, based on memristors,
architectural design choices that depend on instead of CMOS technology.
the underlying qubit technology, the encoding
scheme chosen and the kind of logical qubit Master’s Thesis
one wants to implement. The Master’s thesis project can be chosen
between the spectrum of hardware and
Big Data Architectures involves the design software and can be performed at a company,
of cutting-edge high performance computing in a research facility or at the university. Some
systems to address the current explosion of examples of recent graduation projects are:
dataset sizes in a wide range of application
domains. Examples of Master’s Theses
• Acceleration of Cancer Diagnosis
Liquid Architectures involves the design Algorithms on Super Computing
of innovative reconfigurable processor FPGA Platforms
architectures that change their characteristics • GPU-Based Simulation of Brain Neuron
dynamically based on the needs of the Models
programmes they run. • Porting Linux to the rVEX Reconfigurable
VLIW Softcore
Dependable Nano Computing is driven by • Hardware Acceleration of Shortread
technology scaling, globalization of IC supply Mapping with the Burrows-Wheeler Aligner
chain and Internet of things, focuses on three • Interconnect Test for 3D Stacked
topics: 1. Reliability (including modelling, Memories
monitoring, mitigation etc.) 2. Testability • A Quantum Emulation Platform
(including Fault Modeling and Design-for-