Functional Requirements:: Control of The Processors

Control Of The Processors
Functional Requirements:
The functional requirements for the control unit are those functions that the control unit
must perform. A definition of these functional requirements is the basis for the design
and implementation of the control unit. The following three-step process leads to a
characterization of the control unit:
1. Define the basic elements of the processor.

2. Describe the micro-operations that the processor performs.
3. Determine the functions that the control unit must perform to cause the micro-
operations to be performed.
The basic functional elements of the processor are the following:
•ALU
•Registers
•Internal data paths
• External data paths
• Control unit
The ALU is the functional essence of the computer. Registers are used to store data
internal to the processor. Some registers contain status information needed to manage
instruction sequencing (e.g., a program status word). Others contain data that go to or
come from the ALU, memory, and I/O modules. Internal data paths are used to move
data between registers and between register and ALU. External data paths link
registers to memory and I/O modules, often by means of a system bus. The control unit
causes operations to happen within the processor. The execution of a program consists
of operations involving these processor elements. These operations consist of a
sequence of micro-operations.
All micro-operations fall into one of the following categories:
• Transfer data from one register to another.

• Transfer data from a register to an external interface (e.g., system bus).
• Transfer data from an external interface to a register.
• Perform an arithmetic or logic operation, using registers for input and output.
All of the micro-operations needed to perform one instruction cycle, including all of the
micro-operations to execute every instruction in the instruction set, fall into one of these
categories.
The control unit performs two basic tasks:
• Sequencing: The control unit causes the processor to step through a series
of micro-operations in the proper sequence, based on the program being
executed.
• Execution: The control unit causes each micro-operation to be performed.
The preceding is a functional description of what the control unit does. The key to how
the control unit operates is the use of control signals.
Control Signals
The following figure shows a general model of the control unit, showing all of its inputs
and outputs.
The inputs are,
• Clock: This is how the control unit “keeps time.” The control unit causes one micro-
operation (or a set of simultaneous micro-operations) to be performed for each clock
pulse. This is sometimes referred to as the processor cycle time, or the clock cycle time.
• Instruction register: The opcode and addressing mode of the current instruction are
used to determine which micro-operations to perform during the execute cycle.
• Flags: These are needed by the control unit to determine the status of the processor
and the outcome of previous ALU operations. For example, for the increment-and-skip-
if-zero (ISZ) instruction, the control unit will increment the PC if the zero flag is set.
• Control signals from control bus: The control bus portion of the system bus provides
signals to the control unit.
The outputs are as follows:
• Control signals within the processor: These are two types: those that cause data to be
moved from one register to another, and those that activate specific ALU functions.
• Control signals to control bus: These are also of two types: control signals to memory,
and control signals to the I/O modules.
Three types of control signals are used: those that activate an ALU function, those that
activate a data path, and those that are signals on the external system bus or other
external interface. All of these signals are ultimately applied directly as binary inputs to
individual logic gates.
The control unit keeps track of where it is in the instruction cycle. At a given point, it
knows that the fetch cycle is to be performed next. The first step is to transfer the
contents of the PC to the MAR .The control unit does this by activating the control signal
that opens the gates between the bits of the PC and the bits of the MAR. The next step
is to read a word from memory into the MBR and increment the PC .The control unit
does this by sending the following control signals simultaneously:
• A control signal that opens gates, allowing the contents of the MAR onto the address
bus
• A memory read control signal on the control bus
• A control signal that opens the gates, allowing the contents of the data bus to be
stored in the MBR
• Control signals to logic that add 1 to the contents of the PC and store the result back
to the PC
Following this, the control unit sends a control signal that opens gates between
the MBR and the IR.
This completes the fetch cycle except for one thing: The control unit must decide
whether to perform an indirect cycle or an execute cycle next. To decide this,
it examines the IR to see if an indirect memory reference is made.
The indirect and interrupt cycles work similarly. For the execute cycle, the control unit
begins by examining the opcode and, on the basis of that, decides which sequence of
micro-operations to perform for the execute cycle.
A Control Signals Example

Figure below illustrates the example.
This is a simple processor with a single accumulator (AC). The data paths between
elements are indicated. The control paths for signals emanating from the control unit are
not shown, but the terminations of control signals are labeled C i and indicated by a
circle. The control unit receives inputs from the clock, the instruction register, and flags.
With each clock cycle, the control unit reads all of its inputs and emits a set of control
signals. Control signals go to three separate destinations:
• Data paths: The control unit controls the internal flow of data. For example, on
instruction fetch, the contents of the memory buffer register are transferred to the
instruction register. For each path to be controlled, there is a switch (indicated by a
circle in the figure). A control signal from the control unit temporarily opens the gate to
let data pass.
• ALU: The control unit controls the operation of the ALU by a set of control signals.
These signals activate various logic circuits and gates within the ALU.
• System bus: The control unit sends control signals out onto the control lines of the
system bus (e.g., memory READ).
The control unit must maintain knowledge of where it is in the instruction cycle. Using
this knowledge, and by reading all of its inputs, the control unit emits a sequence of
control signals that causes micro-operations to occur. It uses the clock pulses to time
the sequence of events, allowing time between events for signal levels to stabilize.
Table below indicates the control signals that are needed for some of the micro-
operation sequences described earlier. (For simplicity, the data and control paths for
incrementing the PC and for loading the fixed addresses into the PC and MAR are not
shown.)
It is worth pondering the minimal nature of the control unit. The control unit is the engine that
runs the entire computer. It does this based only on knowing the instructions to be executed and
the nature of the results of arithmetic and logical operations (e.g., positive, overflow, etc.). It
never gets to see the data being processed or the actual results produced. And it controls
everything with a few control signals to points within the processor and a few control signals to
the system bus.
Internal Processor Organization

The CPU with internal bus can be illustrated as below.
A single internal bus connects the ALU and all processor registers. Gates and control
signals are provided for movement of data onto and off the bus from each register.
Additional control signals control data transfer to and from the system (external) bus
and the operation of the ALU.
Two new registers, labeled Y and Z, have been added to the organization. These are
needed for the proper operation of the ALU. When an operation involving two operands
is performed, one can be obtained from the internal bus, but the other must be obtained
from another source. The AC could be used for this purpose, but this limits the flexibility
of the system and would not work with a processor with multiple general-purpose
registers. Register Y provides temporary storage for the other input. The ALU is a
combinatorial circuit with no internal storage. Thus, when control signals activate an
ALU function, the input to the ALU is transformed to the output. Thus, the output of the
ALU cannot be directly connected to the bus, because this output would feed back to
the input. Register Z provides temporary output storage. With this arrangement, an
operation to add a value from memory to the AC would have the following steps:
t1:MAR←(IR(address))
t2:MBR←Memory
t3:Y←(MBR)
t4:Z←(AC)+(Y)
t5: AC ← (Z)
The use of common data paths simplifies the interconnection layout and the control of
the processor. Another practical reason for the use of an internal bus is to save space.

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Control Of The Processors

1. Define the basic elements of the processor.

The basic functional elements of the processor are the following:

All micro-operations fall into one of the following categories:

• Transfer data from one register to another.

The inputs are,

The outputs are as follows:

A Control Signals Example

Internal Processor Organization

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