Sardar Patel Institute of Technology: BCD To 7-Segment Controller/Decoder

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Bharatiya Vidya Bhavan’s

Sardar Patel Institute of Technology


Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)
SE-ETRX Sub-ED Mini-project

TIRTH PATEL 2019110040 ABHISHEK RAO 2019110047 AROHI SHINDE 2019110054

BCD TO 7-SEGMENT CONTROLLER/DECODER


INTRODUCTION :
A BCD to 7-segment decoder is a device used to convert a 4-bit Binary Coded Decimal (BCD)
input to a 7-bit output capable of operating a 7-segment LED display which is used in various
applications requiring a simple display to show numbers or occasionally, letters.
Here we focus exclusively on numbers to be displayed.

AIM :
To design and implement a Binary Coded Decimal (BCD) to 7-Segment display decoder using
gates made of diodes and BJTs.

DESIGN :

Figure 1 : Internal schematics of a 7-Segment LED display

To design our decoder/ controller we must take our 4-bit BCD input and convert it into a 7bit
output to correspond to respective LEDs in the 7-Segment display.
To analyze relations between said input(s) and output(s), we must draw a truth table and
Kmaps.
Bharatiya Vidya Bhavan’s
Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)
SE-ETRX Sub-ED Mini-project

Figure 2: Truth Table for input and output bits

Figure 3: K-maps and results derived from truth table


Bharatiya Vidya Bhavan’s
Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)
SE-ETRX Sub-ED Mini-project

The gates required for this design are the AND, OR and NOT gates
Of these, the AND and OR gates can be constructed using diodes and resistors while the
NOT gate can be constructed using a BJT and resistors.

Figure 4: Rough Schematics for Logic Gates

While simulating the design, we first check whether the Logic model is working correctly by
simulation in multisim :

Figure 5: Logic model schematic and simulation of operation


Bharatiya Vidya Bhavan’s
Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)
SE-ETRX Sub-ED Mini-project

Considering the design is working as we want it to, we can now implement it using the
gates we designed/derived from diodes, BJT and resistors in Multisim.

Figure 6: Final implementation of the project in Multisim

OUTPUT -
Bharatiya Vidya Bhavan’s
Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)
SE-ETRX Sub-ED Mini-project

Figure 7: Input and output for binary value of 5

OBSERVATIONS :
On simulating our design, we find that it works as it was designed and required to work.
Our design takes a 4-bit BCD input and decodes it to a 7-bit output that controls the
7segment LED display.
We have successfully designed a BCD to 7-segment decoder.

LEARNING OUTCOMES :
• We learned how to design a BCD to 7segment decoder using logic gates.
• We designed individual Logic gates using components such as Diodes, Resistors and
BJTs.
• We understood working of said gates in detail.
• We implemented the decoder from the logic gates we made from said components.

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