Unit4 Memorytesting

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Memory Testing

RAM Organization
Test Time in Seconds
(Memory Cycle Time 60ns)

Size Number of Test Algorithm Operations


n bits n n × log2n n3/2 n2

1 Mb 0.06 1.26 64.5 18.3 hr


4 Mb 0.25 5.54 515.4 293.2 hr
16 Mb 1.01 24.16 1.2 hr 4691.3 hr
64 Mb 4.03 104.7 9.2 hr 75060.0 hr
256 Mb 16.11 451.0 73.3 hr 1200959.9 hr
1 Gb 64.43 1932.8 586.4 hr 19215358.4 hr
2 Gb 128.9 3994.4 1658.6 hr 76861433.7 hr
SRAM Fault Modeling Examples

SA0

AF+SAF
SAF

SCF SA0 TF TF
SCF
<0;0> SA0 <1;1> <↓/0> <↑/1>
DRAM Fault Modeling
SA1 SA1+SCF

AND ABF

Bridging
Fault (ABF) SCF
SA0

ABF
SRAM Only Fault Models

Faults found only in SRAM Model


Open-circuited pull-up device DRF
Excessive bit line coupling capacitance CF
DRAM Only Fault Models

Faults only in DRAM Model


Data retention fault (sleeping sickness) DRF
Refresh line stuck-at fault SAF
Bit-line voltage imbalance fault PSF
Coupling between word and bit line CF
Single-ended bit-line voltage shift PSF
Precharge and decoder clock overlap AF
Reduced Functional Faults
Fault

SAF Stuck-at fault


TF Transition fault
CF Coupling fault
NPSF Neighborhood Pattern Sensitive fault
Stuck-at Faults
• Test Condition: For each cell, read a 0 and a 1.
• <  / 0 > (<  / 1 >)
Transition Faults
• Cell fails to make a 0 → 1 or 1 → 0 transition.
• Test Condition: Each cell must have an ↑ transition
and a ↓ transition, and be read each time before
making any further transitions.
• < ↑ / 0 >, < ↓ / 1 >

< ↑ / 0 > transition fault


Coupling Faults
• Coupling Fault (CF): Transition in bit j
(aggressor) causes unwanted change
in bit i (victim)
• 2-Coupling Fault: Involves 2 cells,
special case of k-Coupling Fault
– Must restrict k cells for practicality
• Inversion (CFin) and Idempotent
(CFid) Coupling Faults – special
cases of 2-Coupling Faults
State Transition Diagram of Two Good
Cells, i and j
State Transition Diagram for CFin < ↑ ;
↕>
State Coupling Faults (SCF)
• Aggressor cell or line j is in a given state y
and that forces victim cell or line i into
state x
• < 0;0 >, < 0;1 >, < 1;0 >, < 1;1 >
March Test Elements
M0: { March element (w0) }
for cell := 0 to n - 1 (or any other order) do
write 0 to A [cell];
M1: { March element (r0, w1) }
for cell := 0 to n - 1 do
read A [cell]; { Expected value = 0}
write 1 to A [cell];
M2: { March element (r1, w0) }
for cell := n – 1 down to 0 do
read A [cell]; { Expected value = 1 }
write 0 to A [cell];
March Tests
Algorithm Description
MATS { (w0); (r0, w1); (r1) }
MATS+ { (w0); (r0, w1); (r1, w0) }
MATS++ { (w0); (r0, w1); (r1, w0, r0) }
MARCH X { (w0); (r0, w1); (r1, w0); (r0) }
{ (w0); (r0, w1); (r1, w0);
MARCH C- (r0, w1); (r1, w0); (r0) }
{ (w0); (r0, w1, w0, w1); (r1, w0, w1);
MARCH A (r1, w0, w1, w0); (r0, w1, w0) }
MARCH Y { (w0); (r0, w1, r1); (r1, w0, r0); (r0) }
{ (w0); (r0, w1, r1, w0, r0, w1);
MARCH B (r1, w0, w1); (r1, w0, w1, w0);
(r0, w1, w0) }
Address Decoder Faults (ADFs)
• Address decoding error assumptions:
– Decoder does not become sequential
– Same behavior during both read and write
• Multiple ADFs must be tested for
• Decoders can have CMOS stuck-open faults
Theorem
• A March test satisfying conditions 1 & 2
detects all address decoder faults.
• ... Means any # of read or write operations
• Before condition 1, must have wx element
– x can be 0 or 1, but must be consistent in test

Condition March element

1 (rx, …, w x )

2 (r x , …, wx)
March Test Fault Coverage

Algorithm SAF ADF TF CF CF CF SCF


in id dyn
MATS All Some
MATS+ All All
MATS++ All All All
MARCH X All All All All
MARCH C- All All All All All All All
MARCH A All All All All
MARCH Y All All All All
MARCH B All All All All
March Test Complexity

Algorithm Complexity
MATS 4n
MATS+ 5n
MATS++ 6n
MARCH X 6n
MARCH C- 10n
MARCH A 15n
MARCH Y 8n
MARCH B 17n
MATS+ Example
Cell (2,1) SA0 Fault

MATS+: { M0: (w0); M1: (r0, w1); M2: (r1, w0) }


MATS+ Example
Cell (2, 1) SA1 Fault

MATS+: { M0: (w0); M1: (r0, w1); M2: (r1, w0) }


MATS+ Example
Multiple AF: Addressed Cell Not Accessed; Data Written
to Wrong Cell
• Cell (2,1) is not addressable
• Address (2,1) maps onto (3,1), and vice versa
• Cannot write (2,1), read (2,1) gives random data

MATS+: { M0: (w0); M1: (r0, w1); M2: (r1), w0 }


Neighborhood Pattern Sensitive Faults
• Definitions:
– Neighborhood – Immediate cluster of k
cells whose operation makes a base cell
fail
– Base cell – A cell under test
– Deleted neighborhood – A neighborhood
without the base cell
• ANPSF – Active NPSF
• APNPSF – Active and Passive NPSF
• PNPSF – Passive NPSF
• SNPSF – Static NPSF
Type-1 Active NPSF
• Active: Base cell changes when any one deleted neighborhood
cell has a transition
• Condition for detection and location: Each base cell must be
read in state 0 and state 1, for all possible deleted neighborhood
pattern changes.

• Notation: C i,j < d0, d1, d3, d4 ; b >


• Examples:
– ANPSF: C i,j < 0, ↓ , 1, 1; 0 > 0
– ANPSF: C i,j < 0, ↓ , 1, 1; ↕ >
1 2 3
4
2 – base cell
0, 1, 3 and 4 – deleted neighborhood
cells k=5
Type-2 Active NPSF
• Used when diagonal couplings are
significant

4 – base cell 0 1 2
0, 1, 2, 3, 5, 6, 7 and 8 – deleted 3 4 5
neighborhood cells 6 7 8

k=9
Passive NPSF
• Passive NPSF: A certain neighborhood pattern
prevents the base cell from changing.
• Condition for detection and location: Each base
cell must be written and read in state 0 and in
state 1, for all deleted neighborhood pattern
changes.
• ↑ / 0 ( ↓ / 1 ) – Base cell fault effect indicating
that base cannot change
Static NPSF
• Static NPSF: Base cell forced into a particular state
when deleted neighborhood contains particular
pattern.
• Differs from active – need not have a transition to
sensitize an SNPSF
• Condition for detection and location: Apply all 0 and 1
combinations to k-cell neighborhood, and verify that
each base cell was written with a 1 and a 0.
• Examples:
– Ci,j < 0, 1, 0, 1; - / 0 > means that base cell forced to 0
– Ci,j < 0, 1, 0, 1; - / 1 > means that base cell forced to 1

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