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    CEG 2136 - Fall 2009 - Final PDF

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    Amin Dhouib
    This document contains the details of a final exam for a computer architecture course. It includes 5 problems testing various concepts: 1. Short questions about sequential circuits, overflow in arithmetic, and conversions between number systems. 2. Designing control logic for a JK flip-flop based on given microoperations. 3. Translating an assembly program to machine code and determining register/memory contents after execution. 4. Writing an assembly subroutine to increment memory based on another location's value. 5. Analyzing the control unit of a computer from lab 3, including deriving microoperations and control logic diagrams.

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    CEG 2136 - Fall 2009 - Final PDF

    Uploaded by

    Amin Dhouib
    363 views7 pages
    This document contains the details of a final exam for a computer architecture course. It includes 5 problems testing various concepts: 1. Short questions about sequential circuits, overflow in arithmetic, and conversions between number systems. 2. Designing control logic for a JK flip-flop based on given microoperations. 3. Translating an assembly program to machine code and determining register/memory contents after execution. 4. Writing an assembly subroutine to increment memory based on another location's value. 5. Analyzing the control unit of a computer from lab 3, including deriving microoperations and control logic diagrams.

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    This document contains the details of a final exam for a computer architecture course. It includes 5 problems testing various concepts: 1. Short questions about sequential circuits, overflow in arithmetic, and conversions between number systems. 2. Designing control logic for a JK flip-flop based on given microoperations. 3. Translating an assembly program to machine code and determining register/memory contents after execution. 4. Writing an assembly subroutine to increment memory based on another location's value. 5. Analyzing the control unit of a computer from lab 3, including deriving microoperations and control logic diagrams.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    363 views7 pages

    CEG 2136 - Fall 2009 - Final PDF

    Uploaded by

    Amin Dhouib
    This document contains the details of a final exam for a computer architecture course. It includes 5 problems testing various concepts: 1. Short questions about sequential circuits, overflow in arithmetic, and conversions between number systems. 2. Designing control logic for a JK flip-flop based on given microoperations. 3. Translating an assembly program to machine code and determining register/memory contents after execution. 4. Writing an assembly subroutine to increment memory based on another location's value. 5. Analyzing the control unit of a computer from lab 3, including deriving microoperations and control logic diagrams.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 7

    CEG2136/Final Exam

    CEG2136: COMPUTER ARCHITECTURE I


    CEG2536: ARCHITECTURE DES ORDINATEURS I

    FINAL EXAM

    Length of Examination: 3 hrs

    Problem 1. (22 points) Short questions.

    1. Which of the following choice(s) is/are correct? A penalty will be applied for every wrong answer.
    (a) (4 pts) All sequential circuits can be implemented using
    only JK flip-flops and NOT gates

    only T flip-flops and NAND gates

    only D flip-flops and AND gates


    only D flip-flops and NAND gates

    (b) (4 pts) An overflow can occur after

    the subtraction of two signed numbers

    the addition of two unsigned numbers

    a logic shift left

    an arithmetic shift right

    2. Perform the following conversions.


    (a) (2 pts) (AB.2AD)16 = ( 171.1672 )10
    (b) (2 pts) (10010.0)2 = ( 20 )9

    3. A digital computer represents its floating point numbers using a signed 6-bit exponent and a signed
    normalized 10-bit mantissa. Negative exponent and mantissa values are expressed in 2's
    complement. Show the binary values of the exponent and mantissa to represent (21.1)8.

    10-bit mantissa= - ---'0100010010-----


    6-bit exponent= _..00101___

    4. Using Table 6, translate the following machine codes to their equivalent assembly instructions.

    Machine code (in Hex.) Equivalent in assembly


    ecce BUN CCC I
    1234 ADD 234
    DCBA BSA CBA I
    7002 SZE
    CEG2136/Final Exam
    Problem 2. (20 points) A JK flip-flop A is used by a CPU to perform the following micro-operations
    (in RTL):

    xT1 :A 0 Reset A to 0
    yT2: A 1 Set A to 1
    vT3: A 1 Set A to 1

    Otherwise the content of A remains the same. The signals T1 , T2, ... are outputs of a decoder.

    1. Draw the logic diagram of the control circuit governing the flip-flop A.

    2. The above micro-operations are replaced by the following ones:

    Without using excitation tables and K-maps, draw the new logic diagram of the control circuit
    governing the flip-flop A.

    Problem 3. (26 points) Consider Program 1.

    1. Use Table 6 to translate Program 1 in its equivalent machine code by specifying the machine code of
    each instruction/operand (in hexadecimal), and its address in the memory (in hexadecimal)

    Program 1: Assembly program I Address in Hex I Content in Hex I


    ORG 0
    X, HEX 0 0000 0000
    0017 2100
    ORG 17 0018 7004
    Y, LDA A
    0019 2101
    SZA
    LDA B 001A 7020
    INC
    001B 3102
    STA C
    HLT 001C 7001
    0100 0000
    ORG 100
    A, 0 0101 OOOE
    B, DEC 14
    C, HEX 000A 0102 OOOA
    END

    2. After the execution of the program, what is the content (in hexadecimal) of the word with the symbolic
    address C? 0001

    3. After the execution of the program, what is the content (in hexadecimal) of the register AC?
    AC = 0001

    4. After the execution of the program, what is the content (in hexadecimal) of the word with address zero?
    M[0] = 0000
    CEG2136/Final Exam
    Problem 4. (20 points)
    1. Write an assembly subroutine (not a This part is independent of part 1.
    service routine) whose symbolic base Assume that 16 operands are stored in the memory
    address is SRT=200 (Hex.) to increment starting from address 100 (Hex.) Write an assembly
    the content of address 161 (Hex.) if program to count the number of even operands and store
    address 160 (Hex.) contains an even it at address 161 (Hex.) The program should start at
    number. Do not exceed 12 lines of address 50 (Hex.) and use the subroutine SRT (of part
    code. 1). Do not exceed 14 lines of code.
    Solution:
    SRT, 0
    IDA 160
    CIR ORG 50
    SZE CLA
    BUN EXT STA 161
    LDA 161 LOP, LDA PTR I
    INC STA 160
    STA 161 BSA SRT
    EXT, BUN SRT I ISZ PTR
    ISZ CTR
    BUN LOP
    HLT
    PTR, 100
    CTR, FFFO /DEC -16
    Problem 5. (36 points) Consider the computer of Lab 3, the architecture of which is described in Figure
    1 and Tables 1, 2, 3, 4, and 5.. The instruction type is determined by the 2 most significant bits of the 8-
    bit register IR, as follows:
    • Xo = IR’(7) IR’(6) denotes a memory-referenced instruction (MRI) in direct addressing mode;
    • X1 = IR’(7) IR(6) denotes a register-referenced instruction (RRI); and
    • X2 = IR(7) IR’(6) denotes a memory-referenced instruction (MRI) in indirect addressing mode.
    The flip-flop S is a STOP register which prevents PC from being incremented if S = 1.
    Assume that all registers are equipped with 3 control bits for loading the register, increment it by 1, and
    reset it to zero.

    1. Find the list of all the micro-operations which use the bus and group them according to the register to
    be placed on the bus (IR, AR, PC, etc.)

    Copy Table 5 of annex to columns S2 S1 S0, Register


    Inspect Tables 1, 2 and 3 of the annex and pick up the micro-operations that have
    corresponding registers on the right hand of RTL expressions
    S2 S1 S0 Register Control functions
    : IR [AR] : DR [AR]
    IR(6)’ : AR [AR] : DR [AR]
    0 0 0 Memory
    : AR [AR] : DR [AR]
    : DR [AR] : DR [AR]
    0 0 1 AR : PC AR
    : AR PC
    0 1 0 PC
    IR(6)’ : AR PC
    : AC DR
    0 1 1 DR
    : [AR] DR
    1 0 0 IR
    1 0 1 AC : [AR] AC
    1 1 0 OUTA
    1 1 1 None!
    CEG2136/Final Exam
    2. Draw the logic diagram of the control circuit which governs the bus.

    From the RTL of the last column of the above table derive
    M: x = x = T + T4 IR(6)’ + T5 X2 + T5 (Y0 + Y1 + Y4 + Y5 + Y6)
    M 0 1

    AR: x = x = T 6 Y3
    AR 1

    PC: x = x = T0 + T3 IR(6)’
    PC 2

    DR: x = x = T 7 Y1 + T 8 Y4
    DR 3

    IR : x =x = S0 = x1 + x3 +x5 +x7
    IR 4

    AC: x = x = T 7 Y2 S1 = x2 + x3 +x6 +x7


    AC 5

    OUTA: xOUTA = x6 = 0 S2 = x4 + x5 +x6 +x7

    3. Find the list of all the micro-operation which change the value of register PC.

    From Tables 1, 2, 3 select all RTL`s where PC is on the left side of the equations:
    T0 S : PC PC + 1
    T3 IR(6)’ S’: PC PC + 1
    T6 Y3 : PC AR ,
    T9 Y4 : if (DR = 0)S’ then (PC PC + 1)
    T10Y4 : if (DR = 0)S’ then (PC PC + 1)

    4. Draw the logic diagram of the control circuit of PC.

    LDPC = T6 Y3
    INCPC = T0 S + T3 IR(6)’ S’ + (T9 Y4 + T10Y4 ) (DR7 DR6 DR5 DR4 DR3 DR2 DR1 DR0)’ S’
    CEG2136/Final Exam

    Appendix

    Figure 1: 8-bit CPU architecture


    CEG2136/Final Exam
    CEG2136/Final Exam

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