Complement and R's Complement), Fixed Point Representation
Complement and R's Complement), Fixed Point Representation
Complement and R's Complement), Fixed Point Representation
Course Contents:
Unit Teaching Hour
Unit 1: Data Representation (4 Hrs.)
1.1 Data Representation: Binary Representation, BCD, 2 Hour
Alphanumeric Representation, Complements ((r-1)’s
Complement and r’s complement), Fixed Point representation,
Representing Negative Numbers, Floating Point Representation,
Arithmetic with Complements (Subtraction of Unsigned
Numbers, Addition and Subtraction of Signed Numbers)
Overflow, Detecting Overflow
1.2 Other Binary Codes: Gray Code, self Complementing Code, 1 Hour
Weighted Code (2421 and 8421 codes), Excess-3 Code,
EBCDIC
1.3 Error Detection Codes: Parity Bit, Odd Parity, Even parity, 1 Hour
Parity Generator & Checker
Unit 2: Register Transfer and Microoperations (5)
2.1 Register Transfer Language: Microoperation, Register 0.5 Hour
Transfer Language, Register Transfer, Control Function
2.2 Arithmetic Microoperations: List of Arithmetic 2 Hour
Microoperations, Binary Adder, Binary Adder-subtractor,
Binary Incrementer, Arithmetic Circuit
1.5 Hour
1 Hour
Unit 6: Pipelining (6)
6.1 Introduction: Parallel Processing, Multiple Functional Units, 0.5 Hour
Flynn’s Classification
6.2 Pipelining: Concept and Demonstration with Example, 1.5 Hour
Speedup Equation, Floating Point addition and Subtraction with
Pipelining
6.3 Instruction Level Pipelining: Review of Instruction Cycle, 3 Hour
Three & Four-Segment Instruction Pipeline, Pipeline Conflicts
and Solutions (Resource Hazards, Data Hazards, Branch
Hazards)
Text Book
M. Morris Mano, “Computer System Architecture”, Prentice-Hall of India, Pvt.
Ltd., Third edition, 2007
References
William Stallings, “Computer Organization and Architecture”, Prentice-Hall of
India, Pvt. Ltd., Seventh edition, 2005.
Vincent P. Heuring and Harry F. Jordan, “Computer System Design and
Architecture”, Prentice-Hall of India, Pvt. Ltd., Second edition, 2003.
Laboratory Work
Student should be able to implement and simulate the algorithms by using high level
languages like C/Matlab and/or VHDL/Verilog. Laboratory work must include following
exercises:
1 Laboratory work for familiarizing with the syntax, data types, and operators of
Verilog/VHDL
2 Design of n-bit 2’s complement adder/subtractor
3 Design of Overflow detector in signed number addition
4 Design of parity generator and parity checker
5 Design of encoder and decoders
6 Design of multiplexer
7 Design of registers and memory
8 Memory Mapping
9 Design of control unit
10 Design of ALU
11 Design of CPU
12 Simulation of 5 stage or 4 stage or 3 stage pipelining
13 Simulation of addition and subtraction of signed 2’s complement data
14 Simulation of multiplication and division algorithms
Model Questions
Long Answer Questions
1 What is meant by instruction set completeness? Is instruction set of basic
computer complete? Discuss instruction cycle of basic computer with suitable
flowchart.
2 What is the concept behind pipelining? Discuss different types of pipeline
conflicts and their possible solutions briefly
3 Multiply (-13) x (+40) using Booth multiplication algorithm.
Short Answer Questions
4 What is overflow? Explain overflow detection process with signed and unsigned
number addition with suitable example.
5 Write down different arithmetic Microoperations and design a 4-bit binary adder-
subtractor.
6 What is the purpose and advantage of common bus system? Explain common bust
system of basic computer.
7 What is meant by address sequencing? Draw diagram of address sequencer and
Explain in detail about mapping of instruction.
8 Consider that we are provided with following memory content. What will be the
value loaded in AC if addressing mode is direct, indirect, immediate, PC-relative
and index relative.
9 Define priority interrupt. Explain Daisy-chaining method of handling interrupt
priority.
10 What is cache mapping? Explain direct mapping with suitable example.
11 What is space-time diagram? Discuss pipeline speedup equation with suitable
example
12 Write short notes on
a) Excess-3 code
b) Input-output processor