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    Rajiv Gandhi College of Engineering and Technology

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    Kannan Alagumuthiah
    1. The document outlines a lesson plan for the subject Digital Circuits covering 5 units - Number System, Boolean Algebra, Combinational Logic Design, Sequential Circuits, and Memory. 2. It lists the topics to be covered in each class along with the relevant chapters from referenced textbooks. 3. The lesson plan covers a wide range of topics in digital circuits including binary numbers, logic gates, adders, multiplexers, flip-flops, counters, registers, and memory organization.

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    Rajiv Gandhi College of Engineering and Technology

    Uploaded by

    Kannan Alagumuthiah
    28 views2 pages
    1. The document outlines a lesson plan for the subject Digital Circuits covering 5 units - Number System, Boolean Algebra, Combinational Logic Design, Sequential Circuits, and Memory. 2. It lists the topics to be covered in each class along with the relevant chapters from referenced textbooks. 3. The lesson plan covers a wide range of topics in digital circuits including binary numbers, logic gates, adders, multiplexers, flip-flops, counters, registers, and memory organization.

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    Digital Circuits Lesson Plan

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    DC - LessonPlan

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    1. The document outlines a lesson plan for the subject Digital Circuits covering 5 units - Number System, Boolean Algebra, Combinational Logic Design, Sequential Circuits, and Memory. 2. It lists the topics to be covered in each class along with the relevant chapters from referenced textbooks. 3. The lesson plan covers a wide range of topics in digital circuits including binary numbers, logic gates, adders, multiplexers, flip-flops, counters, registers, and memory organization.

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    28 views2 pages

    Rajiv Gandhi College of Engineering and Technology

    Uploaded by

    Kannan Alagumuthiah
    1. The document outlines a lesson plan for the subject Digital Circuits covering 5 units - Number System, Boolean Algebra, Combinational Logic Design, Sequential Circuits, and Memory. 2. It lists the topics to be covered in each class along with the relevant chapters from referenced textbooks. 3. The lesson plan covers a wide range of topics in digital circuits including binary numbers, logic gates, adders, multiplexers, flip-flops, counters, registers, and memory organization.

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    of 2

    RAJIV GANDHI COLLEGE OF ENGINEERING AND TECHNOLOGY

    DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING


    LESSON PLAN
    SUBJECT : DIGITAL CIRCUIT SUB CODE: EC T45
    Staff In-charge : A.Kannan, Mr.B.Shanmugham
    CUMULATIVE TOPICS COVERED BOOKS
    PERIOD REFERRED
    UNIT I - Number System
    Binary Number Representations – Signed
    0 T2
    Numbers and Complements
    Unsigned, Fixed point, and Floating point
    1 T2
    numbers
    2 Addition T2, R2, R3
    3 subtraction with 1’s and 2’s complements T2, R2, R3
    4 Binary code for decimal numbers T2, R2, R3
    5 Gray code T2, R2, R3
    Codes for detecting and correcting errors:
    7 T2, R2, R3
    Even parity codes
    Codes for detecting and correcting errors: Odd
    9 T2, R2, R3
    parity codes
    Codes for detecting and correcting errors:
    11 T2, R2, R3
    Hamming Codes
    Codes for detecting and correcting errors:
    12 T2, R2, R3
    Checksum codes
    13 m-out–of-n-codes T2, R2, R3
    UNIT II - Boolean Algebra
    14 Basic theorems- Postulates T2
    15 Duality T2
    Boolean Function- Canonical form-Standard
    16 T2
    form
    Simplification of Boolean
    18 T2, R2, R3
    Function:Karnaugh map method
    20 Quine-McCluskey method T2, R2, R3
    22 Incompletely specified functions T2, R2, R3
    Realization of logic functions - NAND gate
    23 T2, R2, R3
    realization
    Realization of logic functions - NOR gate
    24 T2, R2, R3
    realization
    25 Multilevel synthesis T2, R2, R3
    UNIT III - Combinational Logic Design
    26 Half adder, Full adder T2, R2, R3
    27 Parallel Adder, Carry Look Ahead Adder T2, R2, R3
    28 BCD Adder T2, R2, R3
    29 Magnitude Comparator T2, R2, R3
    30 Encoders and Decoders T2, R2, R3
    31 Multiplexers T2, R2, R3
    32 Code converters T2, R2, R3
    33 Parity generator, Parity checker T2, R2, R3
    Combinational circuit implementation using
    34 T2, R2, R3
    multiplexers
    Combinational circuit implementation using
    35 T2, R2, R3
    decoders
    36 Programmable Logic Devices: PROM – T2, R2, R3
    EPROM – EEPROM
    37 Programmable Logic Array (PLA) T2, R2, R3
    38 Programmable Array Logic (PAL) T2, R2, R3
    Realization of combinational circuits using
    39 T2, R2, R3
    PROM,PLA and PAL
    UNIT IV - Sequential Circuits
    42 General model of sequential circuits T2, R2, R3
    43 latches – Master-slave Configuration T2, R2, R3
    44 Flip-Flops T2, R2, R3
    45 Concept of State – State diagram – State Table T2, R2, R3
    Synchronous Sequential Circuits – Binary
    48 T2, R2, R3
    ripple counters
    50 Design of Synchronous counters T2, R2, R3
    52 Binary counters T2, R2, R3
    54 Arbitrary sequence counter T2, R2, R3
    55 BCD counter T2, R2, R3
    56 Shift Registers T2, R2, R3
    57 Ring Counter T2, R2, R3
    58 Johnson Counter T2, R2, R3
    59 Timing diagram T2, R2, R3
    60 Serial Adder T2, R2, R3
    61 PN sequence generator T2, R2, R3
    Sequential PLDs – Block diagrams of CPLD
    62 T2, R2, R3
    and Field programmable Gate Array (FPGA)
    UNIT V – Memory
    64 Classification of Memories T2, R2, R3
    65 RAM Organization T2, R2, R3
    66 Write Operation – Read Operation T2, R2, R3
    67 Memory Cycle T2, R2, R3
    68 Timing Waveforms T2, R2, R3
    69 Memory Decoding T2, R2, R3
    70 Memory Expansion T2, R2, R3
    71 Static RAM Cell T2, R2, R3
    72 Dynamic RAM Cell T2, R2, R3
    Text Books:
    1. John F. Wakerly, “Digital Design Principles and Practices”, PHI Private Ltd., New Delhi,
    Fourth Edition, 2006
    2. Morris Mano, “Digital design”, PHI Learning, Fourth Edition, 2008.
    Reference Books:
    1. Donald P Leach, Albert Paul Malvino and GoutamSaha, “Digital Principles and Applications,”
    6 edition, Tata McGraw Hill Publishing Company Ltd.,New Delhi,2008.
    th

    2. Thomas L. Floyd, “Digital Fundamentals,” Dorling Kindersley (India) Pvt. Limited, 8th ed.,
    2008.
    3. Tocci R J, “Digital systems: Principles and Applications”, PHI learning, New Delhi, Tenth
    Edition 2006.
    Web References:
    1. www.technologystudent.com
    2. www.facstaff.bucknell.edu
    3. www.chegg.com

    Staff In-Charge

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