Semiconductor Technical Data: Ordering Information
Semiconductor Technical Data: Ordering Information
Semiconductor Technical Data: Ordering Information
CMOS
output goes high on the MC145028 when two addresses are consecutively
received (in one encoding sequence) which both match the local address. DW SUFFIX
16
• Operating Temperature Range: – 40 to + 85°C SOG PACKAGE
CASE 751G
• Very–Low Standby Current for the Encoder: 300 nA Maximum @ 25°C
1
• Interfaces with RF, Ultrasonic, or Infrared Modulators and Demodulators
• RC Oscillator, No Crystal Required
ORDERING INFORMATION
• High External Component Tolerance; Can Use ± 5% Components
MC145026P Plastic DIP
• Internal Power–On Reset Forces All Decoder Outputs Low MC145026D SOG Package
• Operating Voltage Range: MC145026 = 2.5 to 18 V* MC145027P, SC41343P Plastic DIP
MC145027, MC145028 = 4.5 to 18 V MC145027DW, SC41343DW SOG Package
• Low–Voltage Versions Available: MC145028P, SC41344P Plastic DIP
SC41343 = 2.8 to 10 V Version of the MC145027 MC145028DW, SC41344DW SOG Package
SC41344 = 2.8 to 10 V Version of the MC145028
• For Infrared Applications, See Application Note AN1016/D
PIN ASSIGNMENTS
MC145026 MC145027/SC41343 MC145028/SC41344
ENCODER DECODERS DECODERS
A1 1 16 VDD A1 1 16 VDD A1 1 16 VDD
A2 2 15 Dout A2 2 15 D6 A2 2 15 A6
A3 3 14 TE A3 3 14 D7 A3 3 14 A7
A4 4 13 RTC A4 4 13 D8 A4 4 13 A8
A5 5 12 CTC A5 5 12 D9 A5 5 12 A9
A6/D6 6 11 RS R1 6 11 VT R1 6 11 VT
A7/D7 7 10 A9/D9 C1 7 10 R2/C2 C1 7 10 R2/C2
VSS 8 9 A8/D8 VSS 8 9 Din VSS 8 9 Din
* All MC145026 devices manufactured after date code 9314 or 314 are guaranteed over this wider voltage range. All previous designs using the
low–voltage SC41342 should convert to the MC145026, which is a drop–in replacement. The SC41342 part number has been discontinued.
REV 2
1/98
CTC
TE 11 12 13
3–PIN DATA SELECT
14 ÷4 15 D
OSCILLATOR AND out
DIVIDER
AND BUFFER
ENABLE
1
A1
2
A2
3
A3
4
A4
5 TRINARY
A5
DETECTOR
6
A6/D6
7
A7/D7
9 VDD = PIN 16
A8/D8
VSS = PIN 8
10
A9/D9
11
VT
15
4–BIT SHIFT REGISTER
CONTROL D6
LOGIC 14
D7
LATCH
13
D8
12
D9
SEQUENCER CIRCUIT
5 4 3 2 1
1
A1
2
A2
3 DATA 9
A3 Din
EXTRACTOR
4
A4
C1 C2 VDD = PIN 16
5 7 6
A5 10 VSS = PIN 8
R1
R2
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
2
CONTROL 11
VT
LOGIC
SEQUENCER CIRCUIT
9 8 7 6 5 4 3 2 1
A1 1
9–BIT
A2 2 SHIFT
3 REGISTER
A3
A4 4
5 DATA 9
A5 Din
EXTRACTOR
A6 15 C1 C2
7 6
A7 14 10 VDD = PIN 16
R1 VSS = PIN 8
A8 13 R2
A9 12
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
3
ELECTRICAL CHARACTERISTICS — MC145026*, MC145027, and MC145028 (Voltage Referenced to VSS)
Guaranteed Limit
– 40°C 25°C 85°C
VDD
Symbol
S b l Characteristic
Ch i i V Min Max Min Max Min Max Unit
U i
VOL Low–Level Output Voltage (Vin = VDD or 0) 5.0 — 0.05 — 0.05 — 0.05 V
10 — 0.05 — 0.05 — 0.05
15 — 0.05 — 0.05 — 0.05
VOH High–Level Output Voltage (Vin = 0 or VDD) 5.0 4.95 — 4.95 — 4.95 — V
10 9.95 — 9.95 — 9.95 —
15 14.95 — 14.95 — 14.95 —
VIL Low–Level Input Voltage V
(Vout = 4.5 or 0.5 V) 5.0 — 1.5 — 1.5 — 1.5
(Vout = 9.0 or 1.0 V) 10 — 3.0 — 3.0 — 3.0
(Vout = 13.5 or 1.5 V) 15 — 4.0 — 4.0 — 4.0
VIH High–Level Input Voltage V
(Vout = 0.5 or 4.5 V) 5.0 3.5 — 3.5 — 3.5 —
(Vout = 1.0 or 9.0 V) 10 7.0 — 7.0 — 7.0 —
(Vout = 1.5 or 13.5 V) 15 11 — 11 — 11 —
IOH High–Level Output Current mA
(Vout = 2.5 V) 5.0 – 2.5 — – 2.1 — – 1.7 —
(Vout = 4.6 V) 5.0 – 0.52 — – 0.44 — – 0.36 —
(Vout = 9.5 V) 10 – 1.3 — – 1.1 — – 0.9 —
(Vout = 13.5 V) 15 – 3.6 — – 3.0 — – 2.4 —
IOL Low–Level Output Current mA
(Vout = 0.4 V) 5.0 0.52 — 0.44 — 0.36 —
(Vout = 0.5 V) 10 1.3 — 1.1 — 0.9 —
(Vout = 1.5 V) 15 3.6 — 3.0 — 2.4 —
Iin Input Current — TE 5.0 — — 3.0 11 — — µA
(MC145026, Pull–Up Device) 10 — — 16 60 — —
15 — — 35 120 — —
Iin Input Current 15 — ± 0.3 — ± 0.3 — ± 1.0 µA
RS (MC145026), Din (MC145027, MC145028)
Iin Input Current µA
A1 – A5, A6/D6 – A9/D9 (MC145026), 5.0 — — — ± 110 — —
A1 – A5 (MC145027), 10 — — — ± 500 — —
A1 – A9 (MC145028) 15 — — — ± 1000 — —
Cin Input Capacitance (Vin = 0) — — — — 7.5 — — pF
IDD Quiescent Current — MC145026 5.0 — — — 0.1 — — µA
10 — — — 0.2 — —
15 — — — 0.3 — —
IDD Quiescent Current — MC145027, MC145028 5.0 — — — 50 — — µA
10 — — — 100 — —
15 — — — 150 — —
Idd Dynamic Supply Current — MC145026 5.0 — — — 200 — — µA
(fc = 20 kHz) 10 — — — 400 — —
15 — — — 600 — —
Idd Dynamic Supply Current — MC145027, MC145028 5.0 — — — 400 — — µA
(fc = 20 kHz) 10 — — — 800 — —
15 — — — 1200 — —
* Also see next Electrical Characteristics table for 2.5 V specifications.
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
4
ELECTRICAL CHARACTERISTICS — MC145026 (Voltage Referenced to VSS)
Guaranteed Limit
– 40°C 25°C 85°C
VDD
Symbol
S b l Characteristic
Ch i i V Min Max Min Max Min Max Unit
U i
VOL Low–Level Output Voltage (Vin = 0 V or VDD) 2.5 — 0.05 — 0.05 — 0.05 V
VOH High–Level Output Voltage (Vin = 0 V or VDD) 2.5 2.45 — 2.45 — 2.45 — V
VIL Low–Level Input Voltage (Vout = 0.5 V or 2.0 V) 2.5 — 0.3 — 0.3 — 0.3 V
VIH High–Level Input Voltage (Vout = 0.5 V or 2.0 V) 2.5 2.2 — 2.2 — 2.2 — V
IOH High–Level Output Current (Vout = 1.25 V) 2.5 0.28 — 0.25 — 0.2 — mA
IOL Low–Level Output Current (Vout = 0.4 V) 2.5 0.22 — 0.2 — 0.16 — mA
Iin Input Current (TE — Pull–Up Device) 2.5 — — 0.09 1.8 — — µA
Iin Input Current (A1–A5, A6/D6–A9/D9) 2.5 — — — ± 25 — — µA
IDD Quiescent Current 2.5 — — — 0.05 — — µA
Idd Dynamic Supply Current (fc = 20 kHz) 2.5 — — — 40 — — µA
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
5
SWITCHING CHARACTERISTICS — MC145026*, MC145027, and MC145028 (CL = 50 pF, TA = 25°C)
Guaranteed Limit
Figure
S b l
Symbol Ch
Characteristic
i i No. VDD Min Max U i
Unit
tTLH, tTHL Output Transition Time 4,8 5.0 — 200 ns
10 — 100
15 — 80
tr Din Rise Time — Decoders 5 5.0 — 15 µs
10 — 15
15 — 15
tf Din Fall Time — Decoders 5 5.0 — 15 µs
10 — 5.0
15 — 4.0
fosc Encoder Clock Frequency 6 5.0 0.001 2.0 MHz
10 0.001 5.0
15 0.001 10
f Decoder Frequency — Referenced to Encoder Clock 12 5.0 1.0 240 kHz
10 1.0 410
15 1.0 450
tw TE Pulse Width — Encoders 7 5.0 65 — ns
10 30 —
15 20 —
* Also see next Switching Characteristics table for 2.5 V specifications.
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
6
90% tf tr
ANY OUTPUT
10% VDD
90%
tTLH tTHL Din
10% VSS
Figure 4. Figure 5.
1 / fosc
VDD
TE 50%
RTC 50%
VSS
tw
Figure 6. Figure 7.
TEST POINT
OUTPUT
DEVICE
UNDER
TEST CL*
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
7
OPERATING CHARACTERISTICS data output is available. The VT output is used to indicate that
a valid address has been received. For transmission security,
MC145026 two identical transmitted words must be consecutively re-
ceived before a VT output signal is issued.
The encoder serially transmits trinary data as defined by
The MC145028 allows 19,683 addresses when trinary lev-
the state of the A1 – A5 and A6/D6 – A9/D9 input pins. These
els are used. 512 addresses are possible when binary levels
pins may be in either of three states (low, high, or open) allow-
are used.
ing 19,683 possible codes. The transmit sequence is initiated
by a low level on the TE input pin. Upon power–up, the PIN DESCRIPTIONS
MC145026 can continuously transmit as long as TE remains
MC145026 ENCODER
low (also, the device can transmit two–word sequences by
pulsing TE low). However, no MC145026 application should A1 – A5, A6/D6 – A9/D9
be designed to rely upon the first data word transmitted im- Address, Address/Data Inputs (Pins 1 – 7, 9, and 10)
mediately after power–up because this word may be invalid. These address/data inputs are encoded and the data is
Between the two data words, no signal is sent for three data sent serially from the encoder via the Dout pin.
periods (see Figure 10).
Each transmitted trinary digit is encoded into pulses (see RS, CTC, RTC
Figure 11). A logic 0 (low) is encoded as two consecutive (Pins 11, 12, and 13)
short pulses, a logic 1 (high) as two consecutive long pulses, These pins are part of the oscillator section of the encoder
and an open (high impedance) as a long pulse followed by a (see Figure 9).
short pulse. The input state is determined by using a weak If an external signal source is used instead of the internal
“output” device to try to force each input high then low. If only oscillator, it should be connected to the RS input and the RTC
a high state results from the two tests, the input is assumed to and CTC pins should be left open.
be hardwired to VDD. If only a low state is obtained, the input TE
is assumed to be hardwired to VSS. If both a high and a low Transmit Enable (Pin 14)
can be forced at an input, an open is assumed and is encoded
This active–low transmit enable input initiates transmission
as such. The “high” and “low” levels are 70% and 30% of the
when forced low. An internal pull–up device keeps this input
supply voltage as shown in the Electrical Characteristics
normally high. The pull–up current is specified in the Electri-
table. The weak “output” device sinks/sources up to 110 µA at
cal Characteristics table.
a 5 V supply level, 500 µA at 10 V, and 1 mA at 15 V.
The TE input has an internal pull–up device so that a simple Dout
switch may be used to force the input low. While TE is high Data Out (Pin 15)
and the second–word transmission has timed out, the encod- This is the output of the encoder that serially presents the
er is completely disabled, the oscillator is inhibited, and the encoded data word.
current drain is reduced to quiescent current. When TE is
brought low, the oscillator is started and the transmit se- VSS
quence begins. The inputs are then sequentially selected, Negative Power Supply (Pin 8)
and determinations are made as to the input logic states. This The most–negative supply potential. This pin is usually
information is serially transmitted via the Dout pin. ground.
VDD
MC145027
Positive Power Supply (Pin 16)
This decoder receives the serial data from the encoder and The most–positive power supply pin.
outputs the data, if it is valid. The transmitted data, consisting
MC145027 AND MC145028 DECODERS
of two identical words, is examined bit by bit during reception.
The first five trinary digits are assumed to be the address. If A1 – A5, A1 – A9
the received address matches the local address, the next four Address Inputs (Pins 1 – 5) — MC145027,
(data) bits are internally stored, but are not transferred to the Address Inputs (Pins 1 – 5, 15, 14, 13, 12) — MC145028
output data latch. As the second encoded word is received, These are the local address inputs. The states of these
the address must again match. If a match occurs, the new pins must match the appropriate encoder inputs for the VT pin
data bits are checked against the previously stored data bits. to go high. The local address may be encoded with trinary or
If the two nibbles of data (four bits each) match, the data is binary data.
transferred to the output data latch by VT and remains until
D6 – D9
new data replaces it. At the same time, the VT output pin is
Data Outputs (Pins 15, 14, 13, 12) — MC145027 Only
brought high and remains high until an error is received or un-
til no input signal is received for four data periods (see Figure These outputs present the binary information that is on
10). encoder inputs A6/D6 through A9/D9. Only binary data is
Although the address information may be encoded in tri- acknowledged; a trinary open at the MC145026 encoder is
nary, the data information must be either a 1 or 0. A trinary decoded as a high level (logic 1).
(open) data line is decoded as a logic 1. Din
Data In (Pin 9)
MC145028
This pin is the serial data input to the decoder. The input
This decoder operates in the same manner as the voltage must be at CMOS logic levels. The signal source driv-
MC145027 except that nine address lines are used and no ing this pin must be dc coupled.
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
8
R1, C1 VT
Resistor 1, Capacitor 1 (Pins 6, 7) Valid Transmission Output (Pin 11)
As shown in Figures 2 and 3, these pins accept a resistor This valid transmission output goes high after the second
and capacitor that are used to determine whether a narrow word of an encoding sequence when the following conditions
pulse or wide pulse has been received. The time constant are satisfied:
R1 x C1 should be set to 1.72 encoder clock periods: 1. the received addresses of both words match the local de-
R1 C1 = 3.95 RTC CTC coder address, and
2. the received data bits of both words match.
R2/C2 VT remains high until either a mismatch is received or no
Resistor 2/Capacitor 2 (Pin 10) input signal is received for four data periods.
As shown in Figures 2 and 3, this pin accepts a resistor and
capacitor that are used to detect both the end of a received VSS
word and the end of a transmission. The time constant R2 x Negative Power Supply (Pin 8)
C2 should be 33.5 encoder clock periods (four data periods
The most–negative supply potential. This pin is usually
per Figure 11): R2 C2 = 77 RTC CTC. This time constant is
ground.
used to determine whether the Din pin has remained low for
four data periods (end of transmission). A separate on–chip
comparator looks at the voltage–equivalent two data periods VDD
(0.4 R2 C2) to detect the dead time between received words Positive Power Supply (Pin 16)
within a transmission. The most–positive power supply pin.
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
9
RS CTC RTC
11 12 13
INTERNAL
ENABLE
f≈ 1
(Hz) The value for RS should be chosen to be ≥ 2 times RTC. This range ensures
2.3 RTC CTC′ that current through RS is insignificant compared to current through RTC. The
for 1 kHz ≤ f ≤ 400 kHz upper limit for RS must ensure that RS x 5 pF (input capacitance) is small com-
pared to RTC x CTC.
where: CTC′ = CTC + Clayout + 12 pF For frequencies outside the indicated range, the formula is less accurate.
RS ≈ 2 RTC The minimum recommended oscillation frequency of this circuit is 1 kHz. Sus-
RS ≥ 20 k ceptibility to externally induced noise signals may occur for frequencies below
RTC ≥ 10 k 1 kHz and/or when resistors utilized are greater than 1 MΩ.
400 pF < CTC < 15 µF
ENCODER
PWmin
2 WORD TRANSMISSION
TE
CONTINUOUS TRANSMISSION
16
18
20
22
24
26
28
30
80
82
84
86
88
90
2
120
122
178
180
182
184
114
116
118
ENCODER
OSCILLATOR
(PIN 12)
1ST 9TH 1ST 9TH
DIGIT DIGIT DIGIT DIGIT
Dout
(PIN 15)
HIGH OPEN LOW
1ST WORD 2ND WORD
ENCODING SEQUENCE
VT
(PIN 11)
DATA OUTPUTS
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
10
ENCODER
OSCILLATOR
(PIN 12)
ENCODED
“ONE”
Dout ENCODED
(PIN 15) “ZERO”
ENCODED
“OPEN”
DATA PERIOD
500
400
(REF. TO ENCODER CLOCK)
VDD = 15 V
f max (kHz)
VDD = 10 V
300
200
VDD = 5 V
100
10 20 30 40 50
Clayout (pF) ON PINS 1 – 5 (MC145027); PINS 1 – 5 AND 12 – 15 (MC145028)
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
11
NO HAS
THE TRANSMISSION
BEGUN?
YES
DOES
THE 5–BIT DISABLE VT
NO ON THE 1ST
ADDRESS MATCH
THE ADDRESS ADDRESS MISMATCH
PINS?
YES
STORE
THE
4–BIT
DATA
DOES
THIS DATA NO DISABLE VT
MATCH THE PREVIOUSLY ON THE 1ST
STORED DATA MISMATCH
DATA?
YES
IS THIS
AT LEAST THE
2ND CONSECUTIVE NO
MATCH SINCE VT
DISABLE?
YES
LATCH DATA
ONTO OUTPUT
PINS AND
ACTIVATE VT
HAVE YES
4–BIT TIMES DISABLE
PASSED? VT
NO
HAS
NO A NEW
TRANSMISSION
BEGUN?
YES
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
12
NO HAS
THE TRANSMISSION
BEGUN?
YES
DOES
THE ADDRESS DISABLE VT ON THE 1ST
NO ADDRESS MISMATCH
MATCH THE
ADDRESS AND IGNORE THE REST
PINS? OF THIS WORD
YES
IS
THIS AT LEAST
NO
THE 2ND CONSECUTIVE
MATCH SINCE VT
DISABLE?
YES
ACTIVATE VT
HAVE YES
4–BIT TIMES DISABLE VT
PASSED?
NO
NO HAS A
NEW TRANSMISSION
BEGUN?
YES
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
13
MC145027 AND MC145028 TIMING VDD
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
14
VDD VDD
VDD TE
VDD
0.1 µF 0.1 µF
A1 A1
14 16 16
5 A2 15 Dout Din 9 A2
1 1
TRINARY 5
A3 2 6 2 A3
ADDRESSES TRINARY
3 3
A4 A4 ADDRESSES
4 R1 MC145027 4
A5 5 7 OR 5 A5
MC145026 RTC
6 13 C1 SC41343 15
D6 D6
7 CTC 14
4–BIT 12 D7
D7 9 13
BINARY 10 D8
10 11 12
DATA D8 D9
RS 11
VT
D9 8 R2 C2
8
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
15
APPLICATIONS INFORMATION detected and filtered by a diode/RC network to extract the
data envelope from the burst. Comparator A5 boosts the sig-
INFRARED TRANSMITTER nal to logic levels compatible with the MC145027/28 data
input. The Din pin of these decoders is a standard CMOS
In Figure 18, the MC145026 encoder is set to run at an os-
high–impedance input which must not be allowed to float.
cillator frequency of about 4 to 9 kHz. Thus, the time required
Therefore, direct coupling from A5 to the decoder input is
for a complete two–word encoding sequence is about 20 to
utilized.
40 ms. The data output from the encoder gates an RC oscilla-
Shielding should be used on at least A1 and A2, with good
tor running at 50 kHz; the oscillator shown starts rapidly
ground and high–sensitivity circuit layout techniques applied.
enough to be used in this application. When the “send” button
For operation with supplies higher than + 5 V, limiter A4’s
is not depressed, both the MC145026 and oscillator are in a
positive output swing needs to be limited to 3 to 5 V. This is
low–power standby state. The RC oscillator has to be
accomplished via adding a zener diode in the negative feed-
trimmed for 50 kHz and has some drawbacks for frequency
back path, thus avoiding excessive system noise. The bias-
stability. A superior system uses a ceramic resonator oscilla-
ing resistor stack should be adjusted such that V3 is 1.25 to
tor running at 400 kHz. This oscillator feeds a divider as
1.5 V.
shown in Figure 19. The unused inputs of the MC14011UB
This system works up to a range of about 10 meters. The
must be grounded.
gains of the system may be adjusted to suit the individual
The MLED81 IRED is driven with the 50 kHz square wave
at about 200 to 300 mA to generate the carrier. If desired, two design needs. The 100 Ω resistor in the emitter of the first
IREDs wired in series can be used (see Application Note 2N5088 and the 1 kΩ resistor feeding A2 may be altered if
AN1016 for more information). The bipolar IRED switch, different gain is required. In general, more gain does not nec-
shown in Figure 18, offers two advantages over a FET. First, essarily result in increased range. This is due to noise floor
a logic FET has too much gate capacitance for the limitations. The designer should increase transmitter power
MC14011UB to drive without waveform distortion. Second, and/or increase receiver aperature with Fresnal lensing to
the bipolar drive permits lower supply voltages, which are an greatly improve range. See Application Note AN1016 for
advantage in portable battery–powered applications. additional information.
The configuration shown in Figure 18 operates over a Information on the MC34074 is in data book DL128/D.
supply range of 4.5 to 18 V. A low–voltage system which
operates down to 2.5 V could be realized if the oscillator sec- TRINARY SWITCH MANUFACTURERS
tion of a MC74HC4060 is used in place of the MC14011UB.
The data output of the MC145026 is inverted and fed to the Midland Ross–Electronic Connector Div.
RESET pin of the MC74HC4060. Alternately, the Greyhill
MC74HCU04 could be used for the oscillator. Augat/Alcoswitch
Information on the MC14011UB is in book number Aries Electronics
DL131/D. The MC74HCU04 and MC74HC4060 are found in The above companies may not have the switches in a DIP.
book number DL129/D. For more information, call them or consult eem Electronic En-
gineers Master Catalog or the Gold Book. Ask for SPDT with
INFRARED RECEIVER
center OFF.
The receiver in Figure 20 couples an IR–sensitive diode to Alternative: An SPST can be placed in series between a
input preamp A1, followed by band–pass amplifier A2 with a SPDT and the Encoder or Decoder to achieve trinary action.
gain of about 10. Limiting stage A3 follows, with an output of Motorola cannot recommend one supplier over another
about 800 mV p–p. The limited 50 kHz burst is detected by and in no way suggests that this is a complete listing of trinary
comparator A4 that passes only positive pulses, and peak– switch manufacturers.
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
16
V+
SELECT FOR
200 mA TO 300 mA
USE OF 2 MLED81s
MLED81 IS OPTIONAL
MC14011UB
10 kΩ
SEND MPSA13
OR
MPSW13
MC14011UB
TE Dout
MC145026
RS CTC RTC
0.01 µF
220 kΩ
9 1000 pF
ADJUST/SELECT FOR
SWITCHES 220 kΩ 100 kΩ FOR APPROX. 4 kHz f = 50 kHz (APPROX. 100 kΩ)
47 kΩ FOR APPROX. 9 kHz
V+
MC14011UB
MC14024 50 kHZ TO
CLK Q3 DRIVER
RESET TRANSISTOR
1MΩ
X1 = 400 kHz CERAMIC RESONATOR
PANASONIC EFD–A400K04B
X1 V+ MC14011UB
OR EQUIVALENT
Dout
470 pF 470 pF FROM MC145026
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
17
+5 V
10 kΩ A1 1 mH — TOKO TYPE 7PA OR 10PA
OR EQUIVALENT
10 µF
10 µF 10 kΩ
22 kΩ
0.01 µF
2N5086 2N5088
2N5088
ÉÉ 10 kΩ 0.01 µF 1 kΩ
ÉÉ
–
A2
V1 +
100 Ω 6.8 kΩ 2.2 kΩ
OPTICAL 1/4 MC34074
FILTER
1 µF
1N914
4.7 kΩ 0.01 µF
1N914
1 MΩ
100 kΩ
1 MΩ
– 10 kΩ
A3 + 1N914 1 kΩ 22 kΩ
V1 + A4 +
V2 – A5
1/4 MC34074 V3 –
1/4 MC34074 1000 pF 47 kΩ
1/4 MC34074
V2 ≈ 2.7 V
C1 R1 R2/C2
390 Ω
VT V1 ≈ 2.5 V
Din MC145027/28
ADDRESS
SWITCHES
MC145026•MC145027•MC145028•SC41343•SC41344 MOTOROLA
18
PACKAGE DIMENSIONS
P SUFFIX
PLASTIC DIP (DUAL IN–LINE PACKAGE)
CASE 648–08
NOTES:
–A– 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
16 9 3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
B 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
1 8 5. ROUNDED CORNERS OPTIONAL.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
F C L A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
S C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
SEATING F 0.040 0.70 1.02 1.77
–T– PLANE G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
H K M J 0.008 0.015 0.21 0.38
J K 0.110 0.130 2.80 3.30
G L 0.295 0.305 7.50 7.74
D 16 PL
M 0_ 10 _ 0_ 10 _
0.25 (0.010) M T A M S 0.020 0.040 0.51 1.01
D SUFFIX
SOG (SMALL OUTLINE GULL–WING) PACKAGE
CASE 751B–05
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16 9 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
–B– MOLD PROTRUSION.
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
1 8
0.25 (0.010) M B S PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
F A 9.80 10.00 0.386 0.393
K R X 45 _ B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
C F 0.40 1.25 0.016 0.049
–T– SEATING G 1.27 BSC 0.050 BSC
PLANE
M J J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
D 16 PL M 0_ 7_ 0_ 7_
P 5.80 6.20 0.229 0.244
0.25 (0.010) M T B S A S R 0.25 0.50 0.010 0.019
MOTOROLA MC145026•MC145027•MC145028•SC41343•SC41344
19
DW SUFFIX
SOG (SMALL OUTLINE GULL–WING) PACKAGE
CASE 751G–02
–A–
16 9
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–B– 8X P 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
0.010 (0.25) M B M
PROTRUSION.
1 8 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
J PROTRUSION. ALLOWABLE DAMBAR
16X D PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
0.010 (0.25) M T A S B S MATERIAL CONDITION.
F MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 10.15 10.45 0.400 0.411
R X 45 _ B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
C F 0.50 0.90 0.020 0.035
–T– G 1.27 BSC 0.050 BSC
SEATING M J 0.25 0.32 0.010 0.012
14X G K PLANE K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
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◊
MC145026•MC145027•MC145028•SC41343•SC41344 MC145026/D
MOTOROLA
20