User's Guide: EXP430FR4133)
User's Guide: EXP430FR4133)
User's Guide: EXP430FR4133)
(MSP‑‑EXP430FR4133)
User's Guide
List of Figures
1 MSP-EXP430FR4133 ....................................................................................................... 4
2 MSP-EXP430FR4133 Overview ........................................................................................... 7
3 Block Diagram ................................................................................................................ 8
4 MSP430FR4133 Pinout ..................................................................................................... 9
5 eZ-FET Emulator ........................................................................................................... 10
6 eZ-FET Isolation Jumper Block Diagram................................................................................ 12
7 Application Backchannel UART in Device Manager ................................................................... 12
8 LCD Segment Layout ...................................................................................................... 13
9 MSP-EXP430FR4133 Power Block Diagram ........................................................................... 16
10 LaunchPad to BoosterPack Connector Pinout ......................................................................... 18
11 Programming the LaunchPad With Program Batch Files ............................................................. 20
12 Directing the Project>Import Function to the Demo Project .......................................................... 21
13 When CCS Has Found the Project ...................................................................................... 22
14 MSP-EXP430FR4133 Software Examples in TI Resource Explorer ................................................ 25
15 Schematics (1 of 6) ........................................................................................................ 27
16 Schematics (2 of 6) ........................................................................................................ 28
17 Schematics (3 of 6) ........................................................................................................ 29
18 Schematics (4 of 6) ........................................................................................................ 30
19 Schematics (5 of 6) ........................................................................................................ 31
20 Schematics (6 of 6) ........................................................................................................ 32
List of Tables
1 EnergyTrace Technology.................................................................................................. 10
2 Isolation Block Connections............................................................................................... 11
3 LCD FH-1138P Segment Mapping....................................................................................... 14
4 LCD to MSP430 Connections ............................................................................................ 15
5 Hardware Change Log..................................................................................................... 19
6 Software Examples ........................................................................................................ 19
7 IDE Minimum Requirements for MSP-EXP430FR4133 ............................................................... 20
8 List of Source Files and Folders.......................................................................................... 23
9 How MSP430 Device Documentation is Organized ................................................................... 24
1 Getting Started
1.1 Introduction
The MSP-EXP430FR4133 LaunchPad™ Development Kit is an easy-to-use Evaluation Module (EVM) for
the MSP430FR4133 microcontroller (see Figure 1). It contains everything needed to start developing on
the MSP430™ ultra-low-power (ULP) FRAM-based microcontroller (MCU) platform, including on-board
emulation for programming, debugging, and energy measurements. The board features on-board buttons
and LEDs for quick integration of a simple user interface and a liquid crystal display (LCD) that showcases
the integrated driver with flexible software-configurable pins. The MSP430FR4133 device features
embedded FRAM (ferroelectric random access memory), a nonvolatile memory known for its ultra-low
power, high endurance, and high-speed write access.
Figure 1. MSP-EXP430FR4133
LaunchPad, MSP430, BoosterPack, Code Composer Studio, EnergyTrace, E2E are trademarks of Texas Instruments.
IAR Embedded Workbench is a registered trademark of IAR Systems.
Rapid prototyping is simplified by the 20-pin BoosterPack™ Plug-in Module headers, which support a wide
range of available BoosterPacks. You can quickly add features like wireless connectivity, graphical
displays, environmental sensing, and much more. Design your own BoosterPack or choose among many
already available from TI and third-party developers.
Free software development tools are also available, including TI's Eclipse-based Code Composer
Studio™ (CCSTUDIO) and IAR Embedded Workbench® IAR-KICKSTART. Both of these integrated
development environments (IDEs) support EnergyTrace™ technology when paired with the
MSP430FR4133 LaunchPad. More information about the LaunchPad, the supported BoosterPacks, and
available resources can be found at TI's LaunchPad portal.
2 Hardware
Figure 2 shows an overview of the MSP-EXP430FR4133 hardware.
{
(RTS, CTS, RXD, TXD)
- Spy-Bi -Wire d ebug (SBWTDIO/SBWTCK)
20-pin BoosterPack - Power (5V, 3V3, and GND)
plug-in module connector
(J1 and J2)
MSP430FR4133 Microcontroller
MSP1 Segmented LCD Display
- 6 alphanumeric characters
- 6 symbols for various applicaions
- Ultra-lo w power display
Button/Switch Button/Switch
S1 S2
User LEDs
LED1, LED2
ESD Debug
EnergyTrace
Protection MCU
3.3-VLDO
Reset
button Segmented LCD
User Interface
2 Buttons and 2 LEDs
2.2.1 MSP430FR4133
The MSP430FR4133 is the next device in TI's new ULP FRAM technology platform. FRAM is a cutting
edge memory technology, combining the best features of flash and RAM into one nonvolatile memory.
Device features include:
• 1.8-V to 3.6-V operation
• Up to 16-MHz system clock and 8-MHz FRAM access
• 16KB of nonvolatile FRAM
• Industry's lowest-power LCD controller
• IR modulation logic
• Two timer blocks and up to three serial interfaces (SPI, UART, or I2C)
• Analog: 10-channel 10-bit differential ADC
• Digital: RTC, CRC
P3.2/L10
P3.4/L12
P3.5/L13
P3.6/L14
P3.7/L15
P3.3/L11
P7.0/L0
P7.1/L1
P7.2/L2
P7.3/L3
P7.4/L4
P7.5/L5
P7.6/L6
P7.7/L7
P3.0/L8
P3.1/L9
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
P4.7/R13 1 48 P6.0/L16
P4.6/R23 2 47 P6.1/L17
P4.5/R33 3 46 P6.2/L18
P4.4/LCDCAP1 4 45 P6.3/L19
P4.3/LCDCAP0 5 44 P6.4/L20
P4.2/XOUT 6 43 P6.5/L21
P4.1/XIN 7 42 P6.6/L22
DVSS 8 41 P6.7/L23
DVCC 9 40 P2.0/L24
RST/NMI/SBWTDIO 10 39 P2.1/L25
TEST/SBWTCK 11 38 P2.2/L26
P4.0/TA1.1 12 37 P2.3/L27
P8.3/TA1.2 13 36 P2.4/L28
P8.2/TA1CLK 14 35 P2.5/L29
P8.1/ACLK/A9 15 34 P2.6/L30
P8.0/SMCLK/A8 16 33 P2.7/L31
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
P1.7/TA0.1/TDO/A7
P1.6/TA0.2/TDI/TCLK/A6
P1.5/TA0CLK/TMS/A5
P1.4/MCLK/TCK/A4/VREF+
P1.3/UCA0STE/A3
P1.2/UCA0CLK/A2
P1.1/UCA0RXD/UCA0SOMI/A1/Veref+
P1.0/UCA0TXD/UCA0SIMO/A0/Veref–
P5.7/L39
P5.6/L38
P5.5/L37
P5.4/L36
P5.3/UCB0SOMI/UCB0SCL/L35
P5.2/UCB0SIMO/UCB0SDA/L34
P5.1/UCB0CLK/L33
P5.0/UCB0STE/L32
The MSP-EXP430FR4133 LaunchPad features EnergyTrace technology but does not have support for
EnergyTrace++™ technology. The EnergyTrace functionality varies across the MSP portfolio (see
Table 1).
The eZ-FET also provides a "backchannel" UART-over-USB connection with the host, which can be very
useful during debugging and for easy communication with a PC. The provided UART supports hardware
flow control (RTS and CTS), although by default these signals are not connected to the target.
The dotted line through J101 shown in Figure 5 divides the eZ-FET emulator from the target area. The
signals that cross this line can be disconnected by jumpers on J101, the isolation jumper block. More
details on the isolation jumper block are in Section 2.2.3.
The eZ-FET hardware can be found in the schematics in Section 6 and in the accompanying hardware
design files (SLAR102). The software and more information about the debugger can be found on the eZ-
FET lite wiki.
USB Connector
USB
eZ-FET
eZ-FET
in out Emulator
LDO
MCU
EnergyTrace
Isolation
Jumper Block
Spy-Bi-Wire (SBW)
5V Power
Application UART
3.3V Power
Emulation
MSP430 Target
BoosterPack Header
BoosterPack Header
Target MSP430
MCU
The backchannel UART is the "MSP Application UART1" port. In this case, Figure 7 shows COM13, but
this port can vary from one host PC to the next. After you identify the correct COM port, configure it in
your host application according to its documentation. You can then open the port and begin
communication to it from the host.
On the target MSP430FR4133 side, the backchannel is connected to the eUSCI_A0 module. The eZ-FET
has a configurable baud rate; therefore, it is important that the PC application configures the baud rate to
be the same as what is configured on the eUSCI_A0.
The eZ-FET also supports hardware flow control, if desired. Hardware flow control (CTS and RTS
handshaking) allows the target MSP430FR4133 and the emulator to tell each other to wait before sending
more data. At low baud rates and with simple target applications, flow control may not be necessary.
Applications with higher baud rates and more interrupts to service have a higher likelihood that the will not
be able to read the eUSCI_A0 RXBUF register in time, before the next byte arrives. If this happens, the
eUSCI_A0 UCA0STATW register reports an overrun error.
There are many available LCD segments, including six full alpha-numeric numbers and letters in addition
to several symbols at the top for various modes or applications. Table 3 shows the mapping of these
segments.
The MSP430FR4133 device has flexible LCD pins allowing any pin to be a SEG or a COM. This simplifies
layout for the user. The LCD connections are typically a tradeoff between easy layout and optimal memory
settings for cleaner user software, among other considerations. The flexibility of the MSP430FR4133
allowed an optimal memory setting for easy software, along with a simple layout on the PCB (see
Table 4).
Each LCDMEM register is eight bits, controlling up to eight segments. The FH-1138P is a 4-mux LCD, so
four COM pins are needed from the MSP430FR4133. With four COM pins, each segment pin controls four
bits or segments. This means that each LCDMEM register controls two segment pins, as shown in
Table 4. Note that LCDMEM14 to LCDMEM17 and LCDMEM20 and higher are not used due to layout
considerations.
Each alphanumeric character A1 to A6 is controlled by two adjacent LCDMEM registers for efficiency and
ease of use in software. This allows for a single 16-bit memory access to control the whole character, as
opposed to split memory regions requiring separate memory accesses.
FR4133 Pin
LCDMEM
LCD Pin
LCD Pin
Port Pin
Port Pin
COM3
COM2
COM1
COM0
COM3
COM2
COM1
COM0
LCDM19 P5.7 L39 38 A6H A6J A6K A6P P5.6 L38 37 A6Q TX A6N RX
LCDM18 P5.5 L37 36 A6A A6B A6C A6D P5.4 L36 35 A6E A6F A6G A6M
LCDM17 P5.3 L35 P5.2 L34
LCDM16 P5.1 L33 P5.0 L32
LCDM15 P2.7 L31 P2.6 L30
LCDM14 P2.5 L29 P2.4 L28
LCDM13 P2.3 L27 P2.2 L26 34 B5 B3 B1 []
LCDM12 P2.1 L25 33 B6 B4 B2 BATT P2.0 L24 32 TMR HRT REC !
LCDM11 P6.7 L23 16 A4H A4J A4K A4P P6.6 L22 15 A4Q A4COL A4N A4DP
LCDM10 P6.5 L21 14 A4A A4B A4C A4D P6.4 L20 13 A4R A4F A4G A4M
LCDM9 P6.3 L19 12 A3H A3J A3K A3P P6.2 L18 11 A3Q ANT A3N A3DP
LCDM8 P6.1 L17 10 A3A A3B A3C A3D P6.0 L16 9 A3R A3F A3G A3M
LCDM7 P3.7 L15 8 A2H A2J A2K A2P P3.6 L14 7 A2Q A2COL A2N A2DP
LCDM6 P3.5 L13 6 A2A A2B A2C A2D P3.4 L12 5 A2E A2F A2G A2M
LCDM5 P3.3 L11 4 A1H A1J A1K A1P P3.2 L10 3 A1Q NEG A1N A1DP
LCDM4 P3.1 L9 2 A1A A1B A1C A1D P3.0 L8 1 A1E A1F A1G A1M
LCDM3 P7.7 L7 20 A5H A5J A5K A5P P7.6 L6 19 A5Q DEG A5N A5DP
LCDM2 P7.5 L5 18 A5A A5B A5C A5D P7.4 L4 17 A5E A5F A5G A5M
LCDM1 P7.3 L3 21 COM3 - - - P7.2 L2 22 - COM2 - -
LCDM0 P7.1 L1 23 - - COM1 - P7.0 L0 24 - - - COM0
2.3 Power
The board was designed to accommodate various powering methods, including through the on-board eZ-
FET and from external or BoosterPack power (see Figure 9).
eZ-FET eZ-FET
Legend
Jumper
Jumper
J101 J101
Place
3V3
3V3
No
J1 J2 Debug J1 J2
Power
Target
Domain Target
MSP430FR4133 MSP430FR4133
Device Device
MSP430FR4133 MSP430FR4133
Target and
target and target and
BoosterPack
BoosterPack Power BoosterPack
Domain
LCD LCD
GND GND
J6 GND J6 GND
VCC VCC
2.5 Clocking
The MSP-EXP430FR4133 provides an external clock in addition to the internal clocks in the device.
• Y1: a 32-kHz crystal
The 32-kHz crystal allows for lower LPM3 sleep currents than do the other low-frequency clock sources.
Therefore, the presence of the crystal allows the full range of low-power modes to be used.
The internal clocks in the device default to the following configuration:
• MCLK: DCO, 2 MHz
• SMCLK: DCO, 2 MHz
• ACLK: REFO, 32.768 kHz
For more information about configuring internal clocks and using the external oscillators, see the
MSP430FR4xx and MSP430FR2xx Family User's Guide (SLAU445).
BoosterPack
MSP-EXP430FR4133 Pin Map
Standard
+3.3V +3.3V
Analog In A C LK A9 P8.1
RX UCA0SOMI UCA0RXD A1 (!) P1.1
UART
TX UCA0SIMO UCA0TXD A0 (!) P1.0
GPIO (!) L31 (!) P2.7
Analog In SMCLK A8 P8.0
SPI CLK UCB0CLK L33 P5.1
GPIO (!) L29 (!) P2.5
SCL TA1CLK P8.2
I2C*
SDA TA1.2 P8.3
GND GND
P1.7 (!) TA0.1 TDO A7 PWM Out GPIO (!)
P1.6 (!) TA0.2 TDI A6 TCLK SPI CS Wireless GPIO (!)
P5.0 L32 UCB0STE GPIO**
RST RST
P5.2 L34 UCB0SIMO UCB0SDA MOSI
SPI
P5.3 L35 UCB0SOMI UCB0SCL MISO
P1.3 (!) A3 UCA0STE SPI CS Display GPIO (!)
P1.4 (!) MCLK TCK A4 SPI CS Other GPIO (!)
P1.5 (!) TMS TA0CLK A5 GPIO (!)
2.8.1 Hardware
Schematics can be found in Section 6. All design files including schematics, layout, bill of materials
(BOM), Gerber files, and documentation are available in a zip folder (SLAR102).
2.8.2 Software
All design files including TI-TXT object-code firmware images, software example projects, and
documentation are available in a zip folder (SLAC682).
3 Software Examples
The software examples included with the MSP430FR4133 LaunchPad can be found in the zip source
folder (SLAC682).
If desired, the "Program <Example>.bat" file can be modified to point to your own projects' binary file.
NOTE: After importing and compiling the software source code in an IDE such as CCS or IAR, the
TI-TXT binary files located in the /Binary/ folder are not updated automatically. Copy the
newly compiled binary from your IDE's /Workspace/Project/ directory and replace the
"<Example>.txt" in /Binary/ for the batch file to program your own binary file.
3.3.1 CCS
CCS v6.0 or later is required. When CCS has been launched, and a workspace directory chosen, use
Project>Import Existing CCS Eclipse Project. Direct it to the desired demo project directory that contains
main.c (see Figure 12). Selecting the \CCS subdirectory also works. The CCS-specific files are located
there.
When you click OK, CCS should recognize the project and allow you to import it. The indication that CCS
has found the project is that it appears in "Discovered projects" and is checked (see Figure 13).
Sometimes CCS finds the project but does not show a checkmark; this might mean that your workspace
already has a project by that name. You can resolve this by renaming or deleting that project. (Even if you
do not see it in the CCS workspace, be sure to check the workspace directory on the file system.)
3.3.2 IAR
IAR 6.10 or higher is required. To open the demo in IAR, click File>Open>Workspace…, and browse to
the *.eww workspace file inside the \IAR subdirectory of the desired demo. All workspace information is
contained within this file.
The subdirectory also has an *.ewp project file. This file can be opened into an existing workspace by
clicking Project>Add-Existing-Project….
Although the software examples have all of the code required to run them, IAR users may download and
install MSP430Ware, which contains MSP430 libraries and the TI Resource Explorer. These are already
included in a CCS installation (unless the user selected otherwise).
4 Additional Resources
Inside TI Resource Explorer, these examples and many more can be found, and easily imported into CCS
with one click.
5 FAQ
Q: I can't get the backchannel UART to connect. What's wrong?
A:Check the following:
• Do the baud rate in the host's terminal application and the USCI settings match?
• Are the appropriate jumpers in place, on the isolation jumper block?
• Probe on RXD and send data from the host. If you don't see data, it might be a problem on the host
side.
• Probe on TXD while sending data from the MSP430. If you don't see data, it might be a configuration
problem with the eUSCI module.
• Consider the use of the hardware flow control lines (especially for higher baud rates).
Q: So the onboard emulator is really open source? And I can build my own onboard emulator?
A: Yes! We encourage you to do so. The design files are on ti.com.
Q: The MSP430 G2 LaunchPad had a socket, allowing me change the target device. Why doesn't
this LaunchPad use one?
A: This LaunchPad provides more functionality, and this means using a device with more pins. Sockets for
devices with this many pins are too expensive for the LaunchPad's target price.
Q: With the female headers on the bottom, the board doesn't sit flat on the table, and I can't
unsolder them. Why did TI do this?
A: For several reasons. A major feedback item on previous LaunchPads was the desire for female
headers instead of male ones. But simply using female instead is problematic, because compatibility with
existing BoosterPacks would be lost, and some people prefer male headers. So, adding female headers
without removing male ones satisfies both preferences. It also allows more flexibility in stacking
BoosterPacks and other LaunchPads.
6 Schematics
The following figures show the schematics for the MSP-EXP430FR4133.
D
A
B
6
6
5
5
4
4
3
3
2
2
1
1
C
D
A
D
C
1
1
9
8
7
6
5
4
3
2
1
11
16
15
14
13
12
10
2
2
DVSS
DVCC
P4.1/XIN
P4.5/R33
P4.6/R23
P4.7/R13
P8.3/TA1.2
P4.0/TA1.1
P4.2/XOUT
P8.2/TA1CLK
P8.1/ACLK/A9
P4.3/LCDCAP0
P4.4/LCDCAP1
TEST/SBWTCK
P8.0/SMCLK/A8
17 P1.7/TA0.1/TDO/A7 P7.0/L0 64
18 P1.6/TA0.2/TDI/TCLK/A6 P7.1/L1 63
RST/NMI/SBWTDIO
19 P1.5/TA0CLK/TMS/A5 P7.2/L2 62
20 P1.4/MCLK/TCK/A4 P7.3/L3 61
21 P1.3/UCA0STE/A3 P7.4/L4 60
22 P1.2/UCA0CLK/A2 P7.5/L5 59
23 P1.1/UCA0RXD/UCA0SOMI/A1/VEREF+ P7.6/L6 58
24 P1.0/UCA0TXD/UCA0SIMO/A0/VEREF- P7.7/L7 57
25 P5.7/L39 P3.0/L8 56
26 P5.6/L38 P3.1/L9 55
27 P5.5/L37 P3.2/L10 54
28 53
3
3
P5.4/L36 P3.3/L11
29 P5.3/UCB0SOMI/UCB0SCL/L35 P3.4/L12 52
30 P5.2/UCB0SIMO/UCB0SDA/L34 P3.5/L13 51
31 P5.1/UCB0CLK/L33 P3.6/L14 50
32 P5.0/UCB0STE/L32 P3.7/L15 49
P2.7/L31
P2.6/L30
P2.5/L29
P2.4/L28
P2.3/L27
P2.2/L26
P2.1/L25
P2.0/L24
P6.7/L23
P6.6/L22
P6.5/L21
P6.4/L20
P6.3/L19
P6.2/L18
P6.1/L17
P6.0/L16
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
4
4
20
19 21
18 22
17 23
5
5
16 24
15 25
14 26
13 27
12 28
11 29
10 30
9 31
8 32
7 33
6 34
5 35
4 36
3 37
2 38
1
6
6
B
A
D
C
www.ti.com Schematics
www.ti.com Schematics
D
A
B
6
6
5
5
3
4
3
4
3
4
2
1
2
1
2
1
2
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10
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3
1
1
2
3
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2
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1
2
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9
1
1
C
D
A
D
A
B
6
6
8
4
COM1
COM2
V+ 2 GND 6
NO1
NO2
IN1
IN2
5
5
1
7
4
4
TP
16
15
14
13
12
10
11
9
3
3
1
2
3
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B
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10
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20
2
4
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8
13
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1
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7
9
5
5
4
4
48
47
46
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41
40
39
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37
36
35
34
33
49 32
50 31
51 30
52 29
53 28
3
3
54 27
1
55 26
56 25
2 57 24
58 23
3
59 22
60 21
61 20
62 19
63 18
64 17
TP
2
2
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
1
1
C
D
A
D
A
B
6
6
5
5
3OUT
GND 2
EN
1IN
6
4
4
3
3
IO1 VCC 6
IO2 IO4 5
GND IO3 4
1
2
3
2
2
1
1
S1*6
1
1
S
5
4
3
2
1
D
A
3 Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by
TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4 EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated
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IMPORTANT NOTICE
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
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Copyright © 2014, Texas Instruments Incorporated