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    Interface VGA80x40: VHDL Macro

    Uploaded by

    Swan Ravindra
    This VHDL macro is a simple monochrome text-mode VGA Video Display Adapter. It's intended to be used as a Pico / microblaze (or other CPU peripheral) peripheral. Resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz.

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    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd

    Interface VGA80x40: VHDL Macro

    Uploaded by

    Swan Ravindra
    144 views4 pages
    This VHDL macro is a simple monochrome text-mode VGA Video Display Adapter. It's intended to be used as a Pico / microblaze (or other CPU peripheral) peripheral. Resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz.

    Original Title

    VGA80x40 Documentation

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    © Attribution Non-Commercial (BY-NC)

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    This VHDL macro is a simple monochrome text-mode VGA Video Display Adapter. It's intended to be used as a Pico / microblaze (or other CPU peripheral) peripheral. Resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    144 views4 pages

    Interface VGA80x40: VHDL Macro

    Uploaded by

    Swan Ravindra
    This VHDL macro is a simple monochrome text-mode VGA Video Display Adapter. It's intended to be used as a Pico / microblaze (or other CPU peripheral) peripheral. Resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    Interface VGA80x40 - HKLAB.

    NET Página 1 de 4

    Interface VGA80x40

    Summary
    This VHDL macro is a simple monochrome text-mode VGA Video Display Adapter (also referred to as video
    card). This kind of IP core, apart from to let you put text to the screen in your Pico/MicroBlaze SoC designs,
    may be useful to debug internals of another circuit.

    VHDL Macro

    component vga80x40 xc3s400-4ft256 utilization


    port ( Element Used
    reset : in std_logic; Slices 100
    clk25MHz : in std_logic;
    R : out std_logic;
    Flip-Flops 76
    G : out std_logic; LUTs 190
    B : out std_logic; Bonded IOBs 67
    TEXT_A : out std_logic_vector(11 downto 0);
    Global CLKs 2
    TEXT_D : in std_logic_vector(07 downto 0);
    FONT_A : out std_logic_vector(11 downto 0); Max Freq. 141.965MHz
    FONT_D : in std_logic_vector(07 downto 0);
    hsync : out std_logic;
    vsync : out std_logic;
    ocrx : in std_logic_vector(07 downto 0);
    ocry : in std_logic_vector(07 downto 0);
    octl : in std_logic_vector(07 downto 0)
    );
    end component;

    This VHDL macro is a Text Mode Monochrome Video Display Adapter intended to be used as a PicoBlaze (or other
    CPU) peripheral. It's not much better than the original IBM MDA card appeared in 1981 ;-)

    „ resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz so the core needs a clock signal of
    25MHz. I prefer 80x40 instead the classical 80x25, in my opinion, the latter is an annoyance.
    „ monochrome, it hasn't "attribute" memory to store the colour of each character. The unique output color is
    selectable among 8 different colours
    „ 8-bit ASCII codes (iso-latin-0 or other that you prefer)
    „ the video text buffer is an external memory of 80×40 = 3200 bytes. The character at (column, row) = (0, 0) is at
    the RAM address 0, the character at (79, 39) is at 3199.
    „ the ROM that store fixed-width bitmap font is also external, the bitmap can be changed modifying the COE
    file. The COE file provided is iso-8859-15 (also called iso-latin-0), is very similar to the iso-8859-1 but with the
    Euro (€) symbol added.
    „ hardware cursor, with two different shapes; with enable/disable control.
    „ simple IO interface. Three registers
    „ CRX. Position (column) for HW cursor
    „ CRY. Position (row) for HW cursor
    „ CTL. Control register for de/activate the HW cursor, change its shape, de/activate VGA signal, output
    colour, etc.
    „ uses 100 slices in a Xilinx Spartan-3.
    „ the design is vendor-agnostic. You can use it in Xilinx/PicoBlaze, Altera/NIOSII or other non-programmable
    hardware.

    http://hklab.net/wiki/Interface_VGA80x40 06/02/2008
    Interface VGA80x40 - HKLAB.NET Página 2 de 4

    Monocrome Video Display Adapter Console Font 8x12 iso-8859-15

    Ports And Usage

    The macro has the following ports:

    Port DIR Type Description


    reset Input signal Asynchronous reset
    clk25MHz Input signal Clock signal. 25MHz is the pixel clock for the resolution used
    R Output signal Red color component
    G Output signal Green color component
    B Output signal Blue color component
    hsync Output signal Horizontal sync signal for the VGA monitor
    vsync Output signal Vertical sync signal for the VGA monitor
    12-bit
    TEXT_A Output Address bus for RAM Video Text Buffer
    bus
    08-bit
    TEXT_D Input Data incoming from RAM Video Text Buffer
    bus
    12-bit
    FONT_A Output Address bus for ROM font buffer
    bus
    08-bit
    FONT_D Input Data incoming from ROM font buffer
    bus
    08-bit
    CRX Input X (column) position of HW cursor.
    bus
    08-bit
    CRY Input Y (row) position of HW cursor.
    bus
    Control of the peripheral. Bit 7 (MSB) is VGA enable signal. Bit 6 is HW
    08-bit
    CTL Input cursor enable bit. Bit 5 is Blink HW cursor enable bit. Bit 4 is HW cursor
    bus
    mode (0 = big; 1 = small). Bits(2:0) is the output color.

    Interface with a VGA monitor

    The electrical interface between FPGA and the VGA monitor es very simple, only 3 resistors of 270Ω are needed.
    The following figure is extracted from S3-Board manual from Xilinx (S3-Board is the development FPGA board that I
    use)

    http://hklab.net/wiki/Interface_VGA80x40 06/02/2008
    Interface VGA80x40 - HKLAB.NET Página 3 de 4

    The input impedance of every signal (R, G B, HS and VS) line is 75Ω (like TV). The analog video signal is obtained
    simply thought a 270Ω resistor (1-bit DAC) for R, G and B signals. With a digital output of 3.3V (I assume a
    LVCMOS33 IO STANDARD for your FPGA) the analog voltage outputs are

    „ with logic "0" at FPGA pin the analog voltage is 0V, that represents black for that colour
    „ with logic "1" at FPGA pin the analog voltage is 3.3V * 75Ω / (75Ω + 270Ω) = 0.71V that represents maximum
    bright for that primarily colour (R, G or B)

    The FPGA (or CPLD) normally can drive the VGA signals directly, there's no need of voltage buffer nor other special
    hardware. The maximum bright in a R, G or B signal is represented by 0.7V. If you use other IO standard like
    LVCMOS 2.5V, obviously you need to use smaller resistors. With this 3 resistors only 8 colours can be obtained, you
    can select the output colour among the 8 possible ones with the CTL(2:0) register as I already said.

    For VGA signal format information, see VGA Video Signal Format and Timing Specifications.

    Cheat: One Unique Output Colour

    If you can't afford to use 3 FPGA pins for R, G, B signals then connect only one output pin (R, G or B) to the 3
    resistors to obtain a nice white output colour, it will be the only possible output color. This saves 2 FPGA pins.

    By other hand, to achieve a less brilliant colour, put bigger resistors so that the analog video signal level is below
    0.7V.

    Interface with PicoBlaze

    The interconnection with PicoBlaze is as usual, like any other peripheral:

    „ Define output (for OUTPUT instruction) registers for CTL, CRX and CRY, decode port_id and write_strobe
    signal to assert register's Chip Enable control signal.
    „ Add TEXT and FONT RAM memories. The RAM addresses generated by this macro are ready at least 6
    clock cycles (f=25MHz) prior the data is transferred, so the timing shouldn't be a problem, simply assert
    memory's enable pin forever.

    http://hklab.net/wiki/Interface_VGA80x40 06/02/2008
    Interface VGA80x40 - HKLAB.NET Página 4 de 4

    View a complete example of how to use this macro in The Game Of Life for PicoBlaze.

    Download

    The VHDL source package contains all the design files plus scripts and font.
    It is at OPENCORES.ORG. This website will have always the latest version of
    the package.

    There is also a local copy here: if_vga80x40.zip

    Obtain A Fixed-Width Console Font

    VGA80x40 part stores in a ROM (for example a read-only Xilinx BRAM) the bitmap of each character associated with
    each ISO-LATIN-1 code (8-bits). You can choose other coding scheme if you want.

    Where can we obtain a console font?

    Using a font editor you can draw your own characters but it's easy to take an already made one. Linux kbd package
    comes with many console fonts (fixed-width bitmap fonts) in the folder /data. The PSF (Poscript Font) format is easy
    to understand and it's documented in de /doc directory of the package.

    The Ruby script psf2coe.rb provided translates PSF1 format file into Xilinx COE file to store the console fixed-width
    bitmap font in a BRAM inside the FPGA. If you want to render the *.psf file in a text file or to do the opposite operation
    (font editor) use NAFE.

    Some files inside the package vga80x40.zip


    lat0-12.psfu Font file iso-8859-15 with 12 pixels heigh
    psf2coe.rb Ruby script that translates PSFU to COE file format suitable to use with Xilinx ISE Webpack tools.
    lat0-12.coe COE file suitable for XilinX ISE
    lat0-12.txt Rendered as text thought NAFE.

    Possible Enhances For The Macro

    „ Optional use of an "attribute" memory to display characters in different colours.


    „ TV out (monochrome composite signal or colour with SCART input).
    „ Different resolutions (800x600px modes)

    References

    „ PSF file format


    „ VGA Timings
    „ "Conceptos básicos de arquitectura y sistemas operativos. Curso de ordenadores", Gregorio Fernández, 3º
    edición, ISBN 84-605-0522-7
    „ VGA pinouts

    Category: Hardware

    This page was last modified 15:13, 6 February 2008.


    Copyright (c) 2007 Javier Valcarce García. Content is available under GNU Free Documentation License 1.2.

    http://hklab.net/wiki/Interface_VGA80x40 06/02/2008

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