Control Systems Lab STM32F4
Control Systems Lab STM32F4
Control Systems Lab STM32F4
Even though one of my research areas is in control engineering, I cannot call myself
aMATLAB/SIMULINK expert, and this line of Aimagin products is new to me as well.
Actually, I am among those who heard about Waijung, bought
the STM32F4DISCOVERY board for some time and left it on the shelf, simply because I
did not know how to get started. Recently, Techsource andAimagin organized a workshop
that included embedded software development session with a nice introduction to this
product combination. Figure 1 captured the atmosphere of this workshop on April 3, 2014,
at King Mongkut’s University of Technology, North Bangkok.
In this event, the instructor used a basic experiment setup in Figure 2 for introductory
purpose. The plant was simply a resistor and capacitor connected as a
low-pass filter. An op-amp onaMG SIGCON-A signal conditioning board was formed as
voltage follower to prevent voltage drop from impedance loading. The communication
between the host PC and STM32F4DISCOVERY target was carried out via the aMG USB
converter N2 board. The aMG F4 connect 2 board was used to provide a convenient
connection between the processor and USB converter board.
Figure 2 experiment setup using Aimagin products
Now, I want to mimic this setup at home. I don’t have all the products in Figure 2, but only
the STM32F4DISCOVERY, a standard USB to serial module, and electronic components
on my shelf. In this article I will show you how it can be done.
First we need to draw a circuit diagram of the plant as shown in Figure 3. I search my
drawers and find a capacitor and resistor (different value from the one
used in workshop so I need to recomputed the plant transfer function. That’s the topic of
Part II).
The electrolytic capacitor is quite aged (like myself) but for demonstration purpose this
should work fine. The voltage follower circuit is not mandatory, but a good idea to protect
the DAC output of STM32F4DISCOVERY board. So I use 1/4 of MCP604 from
Microchip for such purpose. This op-amp works with low-voltage, single-rail power supply
(2.7 – 6V, according to Microchip datasheet). Here I connect to +5 V from the board.
Another modification form the original setup used in Aimagin workshop is the A/D input
pin. There they used pin C0 (AN10). First I followed that pin assignment and found the
voltage was off from expected reading. It took me a while to figure out from the board
schematics that the pin C0 was connected some other circuit on-board with a pull-up
resistor, hence the voltage reading error. So I guess the STM32F4DISCOVERY board used
in the workshop, if not modified, is somehow different from the one I have. Anyway, for
our project we change the analog input to pin C1 (AN11). Some blocks in
the SIMULINK files then have to be adjusted accordingly.
Figure 4 and 5 show the top and bottom of the prototype board
with STM32F4DISCOVERY mounted. The RC plant is soldered on the board and wired to
the connector pins, which is labeled by handwriting. The surface-mounted MCP 604 is also
soldered and glued to one rim of the board.
*From the above figures, the used prototype board has a couple of old components
unrelated to this experiment. Sorry if this amateur illustration irritates you. I’m really out
of budget. LOL.
That’s all for the plant. Now we shift our attention to the USB connection between the host
and target. Not knowing the schematics of the aMG USB converter N2 board, I can only
check the SIMULINK diagram to see that the Txd and Rxd of USB-to-serial are connected
to pin D9 and D8 ofSTM32F4DISCOVERY, respectively; i.e., USART3 is used. So
regardless of what USB-to-serial hardware you are using, that’s all required to make it
work. Of course, you can use other USART such as wiring Txd to B7 and Rxd to B6 (use
USART1), but then you need to setup the SIMULINK blocks accordingly. For simplicity, I
follow the original setup from the workshop by connecting Txd to D9 and Rxd to D8 of
the STM32F4DISCOVERY board. Don’t forget to wire the ground between the USB
converter and prototype board. Signals for hardware flow control (CTS and RTS) are not
needed.
In my case, I find on my shelf an UM232R module from FDTI. I set up the module for
3.3V logic level and it works just fine. Another convenient choice is the USB-to-serial
cable made by FDTI or some other vendors. Make sure you select a 3.3V signal model.
From my experience, the driver from some cheap product does not work with Windows 8. I
don’t know whether that problem is fixed. Nevertheless, I recommend FDTI products.
Never have problem with them.
Figure 6 shows the UM232R connected to the prototype. Install the VCP driver and check
which COM port it consumes. On my computer it’s COM5. We need to setup
the SIMULINK blocks to match.
This is quite enough material for the hardware setup part of our Hello Waijung. Next time
we will continue the discussion by performing some open-loop experiment and see whether
our hardware works.
Part II: Open-Loop Test
Before you read on, make sure you at least glimpse on our previous artile in the Hello
Waijung series.
Part I: Hardware Setup
From part I, with the required hardware set up properly, we are now ready to run our first
experiment. To make sure that all the connections and communication work, we will start
with a simple model consisting of only the plant; i.e., our RC network.
If you have not done so, install the ST-Link utility and WaiJung. Consult the developer’s
website for details. On my computer, I experienced during WaiJung installation that the
setup file complained it couldn’t find ST-Link, but after I continued by ignoring that
warning, the tool worked fine.
The SIMULINK setup for this experiment (as well as later ones) comes in pair: the target
and host models are separated to two files. Figure 1 and 2
show OpenLoop_Target.mdl andOpenLoop_Host.mdl, the target and host model files for
our open loop test, respectively.
Figure 1 SIMULINK file for target OpenLoop_Target.mdl
Figure 2 SIMULINK file for host OpenLoop_Host.mdl
The configuration and execution process for these models is listed as follows
Signal routing
(target) configure the ADC and DAC modules
Communication
(target) select the USART channel and configure
(host) select the right COM port and configure its parameters to match the
target setup
(host) compute the plant transfer function, discretize, and put data into model
(target) update, build and load
(host) run the simulation to observe real-time signal plots
Now we provide more details for each step.
(1)
substituting and
(2)
Create this transfer function in MATLAB to verify
>> Gd = c2d(G,0.01)
Gd =
0.006427
----------
z - 0.9936
Sample time: 0.01 seconds
Discrete-time transfer function.
PID Links →
Part III : Feedback Control
*In the workshop they called this “hardware-in-the-loop” and included HIL abbreviation
here and there. I choose to honor the developer by retaining such name, though I make a
caution that it might not quite be consistent with HIL definition in a general sense.
For this part, we need to design a controller and put it in a feedback loop.. It is quite
customary to do the design in continuous-time domain and discretize the controller
later. MATLAB as a powerful control design tool for single-input-single-output system
called sisotool. Figure 1 shows the feedback configuration used by sisotool. In this case we
need to design and implement only the feedback controller C (the red block). The
feedforward controller F and sensor H are set to 1.
Figure 1 general feedback configuration
From part II, our plant transfer function in the s-domain is
(1)
Figure 2 shows the sisotool graphical display during control design process. If you’re good
at root locus method, use the upper-left subplot. I’m more comfortable with loopshaping
method at right.
So, after playing around with sisotool for some time, I eventually settle with this controller
(2)
It is left as an exercise to the reader that, using ZOH method and sampling time 0.01 sec,
we can derive a discrete-time transfer function of this controller as
(3)
Instead of doing the conversion by hand, we export the controller
from sisotool to MATLABworkspace, and discretize it with c2d function, with sampling
time 0.01 sec as its argument
>> Cd = c2d(C,0.01)
Cd =
0.09352 z - 0.09292
---------------------
z^2 - 1.97 z + 0.9705
Sample time: 0.01 seconds
Discrete-time transfer function.
then put the variable names into the block. I choose to hard-code the controller into the
models so that I could run it without doing this computation each time.
Update, build, and load the target. Then run the host simulation. Clicking on any scope icon
on signal route yields the plot shown in Figure 6. It turns out that the discrepancy between
the theoretical and actual response is significant. Can you explain what happens?
Figure 6 real-time simulation result from HIL_AinH_Host.mdl
For those who have some experience with PID control, you’d see similar effect in a
situation known as “integrator windup.” The undesirable large overshoot happens when an
integrator is present and there is some saturation at the plant input. This is also the case for
our feedback system. Notice from the controller output in Figure 3 that it has
maximum variation of nearly 2.5 volts, while the DAC output is limited to 0 – 3 volts, and
we generate input command signal that switches between 1 and 2 volts. So during
transition, the computed controller output could exceed the DAC range, causing worse
response than it should behave in a pure linear system.
To verify whether our explanation above is correct, we lower the control bandwidth a bit by
reducing the controller gain to 55% of its original value. This can be done easily by
multiplying the data in numerator field of the two blocks by 0.55. Figure 7 shows the step
and controller output response after the gain reduction. The controller output variation now
decreases to 1.6.
Figure 7 step and controller output responses after gain reduction of 0.55
Running the new simulation results in the closed-loop response in Figure 8. Now we see
that the comparison matches much better.
Figure 8 simulation result from HIL_AinH_Host.mdl after gain reduction
Standalone Implementation
Suppose that, after a series of simulation and redesign, we are satisfied with a controller
and decide to implement it on the target processor. This can be done easily
with Waijung by moving the discrete controller transfer function block from the host to the
target model file as shown in Figure 9 – 10. Now the host model contains only theoretical
simulation for response comparison.
Figure 9 target standalone model Standalone_Target.mdl
Figure 10 host standalone model Standalone_Host.mdl
First we experiment with the original controller without gain reduction to see the effect
from saturation. The responses are shown in Figure 11. The detrimental effect from DAC
output limit is less than the case when the controller is in SIMULINK, but is still
noticeable.