Chapter 2
Chapter 2
Chapter 2
2.1 Introduction
It has been assumed that power semiconductor devices, which has nearly ideal characteristics
include following properties:
Such trade-off means that we cannot use a particular device for all applications. The requirement
of specific application must be matched to the capabilities of the available devices. This requires
a intelligent and innovative design approaches. For example, sometimes several devices may
have to be connected in parallel or in series in order to control larger amount of power. So far, it
is important for the user to have a very good understanding of power devices and how they are
fabricated and packaged. A superficial knowledge of low power solid state- devices is
insufficient for the effective use of high power devices.
2.2.1 n-type material: an n-type material is created by introducing impurity elements that
have five valence electrons (pentavalent), such as antimony, arsenic, and phosphorous in silicon
material. This impurity forms covalent bond with silicon material. The four electrons of impurity
atoms form four covalent bonds within silicon lattice. There is, however, an additional fifth
electron due to the impurity atom, which is unassociated any particular covalent bond shown in
fig. 2.1. This remaining electron, loosely bound to its parent atom, and take part in the
conduction process. Diffused impurities with five valence electrons are called donor atoms.
When the silicon is lightly doped with an impurity, the doping is denoted as n-doping and
resulting material is referred to as n-type semiconductor. When it is heavily doped, it is denoted
as n+ doping and material is referred to as n+ type semiconductor.
Fig 2.1 n-type material
2.2.2 p-type material: The p-type material is created by introducing impurity elements that
have three valence electrons. The most frequently used element for this purpose is boron,
gallium, and indium. The effect of these elements, there is an insufficient number of electrons to
complete the covalent bonds with silicon materials. The resulting vacancy is called holes and is
representing by a small circle or plus sign, shown in Fig. 2.2. The diffused impurities with three
valence electrons are called acceptor atoms. These holes greatly increase the conductivity of the
material. When silicon is lightly doped with an impurity such as boron, the doping is denoted as
p-doping and resultant material is referred as p-type semiconductor. When it is heavily doped, it
is denoted as p+ doping and material is referred to as p+-type semiconductor.
2.3 pn junction
A pn junction is formed when n-type semiconductor material is brought in metallurgical or
physical contact with p-type semiconductor. The process of mixing a p-type material with n-type
material, namely, allowing, diffusion, and epitaxial growth. In the p-region, holes are called
majority carriers. In n-region electrons are called majority carriers whereas holes are called
minority carriers. A p-n junction shown in Fig. 2.3.
Fig. 2.3 A schematic diagram of p-n junction
he donor ion is represented by a plus sign because, after this impurity atom “donates” an
electron, it becomes a positive ion. The acceptor ion is indicated by minus sign because after this
impurity atom “accepts” an electron, it becomes a negative ion
2.3.1 Space charge region: Initially there is a density gradient across the junction; holes
diffuse to the right across the junction, and electron to the left. Diffusion of holes from p to n,
leaves a negative charge behind in the p-region near the junction. Similarly diffusion of each
electron from n to p leaves a positive charge behind n region near the junction. As result of this
diffusion process p-region near the junction becomes negatively charged, and n-region near the
junction becomes positively charged, shown in Fig 2.3.These charges near the junction known as
uncovered charges or immobile charges (or ion).These charges establish an electric field across
the junction. When this field become strong enough. It prevents further diffusion of mobile
charges or free charges. The immobile charges or uncovered charges extended in both side of the
junction form depletion layer or space –charge region. The width of depletion region or depletion
layer, is order of 5x10-4 mm.In steady state, there is a potential difference across the depletion
region, 0.7V for silicon and 0.3 V for the germanium this potential difference across the
depletion layer is called barrier potential.
Fig. 2.4 (a) pn junction under unbias condition (b) effect of forward bias and (c) effect of
reverse bias
Fig 2.4 (c), show the reverse bias condition of pn junction and this polarity of battery causes both
the holes on p-side as well as the electron on the n-side to move away from the junction. As
result of this, negatively charge accepter ions shifts to left and positively charged doner ions to
the right. In other words, the depletion layer gets widened. In this condition the holes that are
supplied from n-side move across the junction to the left and get attracted to negative terminal of
the battery .Likewise the electrons from p-side move to positive terminal of the battery. These
two charge carriers movement across the junction cause flow of reverse saturation current of the
pn junction.
2.4 Construction of power diode
Power diode much differs from signal diodes. A signal diode made from simple pn junction as
shown in Fig. 2.3.The practical realization of the power diodes shown in Fig.2.5 (a).A lightly
doped n- epitaxial layer of specified width (depending on the required break down voltage) is
grown on a heavily doped n+ substrate. Which act as cathode. Finally p-n junction is formed by
defusing a heavily doped p+ layer into the epitaxial layer. This p+ type region act as anode. The
cross sectional area of the diode will vary according to the amount of current for which device is
designed to carry. The n- layer in the figure 2.5, which is often termed as drift region is the
essential structural feature not found in low power diodes. The n- layer relatively long lightly
doped region would appears to add significant ohmic resistance to the diode when it is forward
biased, and this lead to large power dissipation in the diode when it is conducting.
Fig.2.5(a) Schematic cross sectional diagram of power diode; (b) circuit symbol.
2.4.1. I-V characteristics of power diode: A power diode is two terminal pn junction
device. The two terminals of the diode are called anode and cathode Shown in figure 2.6 (a)
When anode potential is positive with respect to the cathode, the diode is said to be forward
biased and diode conducts.Intially diode current is zero, from V=0 to cut-in voltage. Cut in
voltage also known as threshold voltage or turn-on voltage. Beyond cut-in voltage diode gets
tuned-on and current through diode rises rapidly. In the conduction or on state of the diode, there
is a forward voltage drop of the order of .8 to 1V.
Fig. 2.6 (a) pn junction; (b) i-v characteristics of signal diode (c) power diode (d) ideal diode
In low power diode forward current increases first exponentially with voltage and then becomes
linear in Fig 2.6 (b).For power diodes, forward current increases almost linearly with voltage,
Fig2.6 (c).
When cathode potential is positive with respect to the anode, the diode is said to be reverse
biased. Under the reverse biased conditions, a small reverse current (also known as leakage
current), in the order of micro amperes or mill amperes, flows and this leakage current increases
slowly with reverse voltage until the avalanche or zener voltage is reached.
The i-v characteristics shown in fig 2.6(b) and (c) can be expressed by an equation known as
Shockley diode equation, and it is given under dc condition by
V
I D I s e VT 1 (2.1)
kT
VT = , called thermal voltage.
q
At a temperature of 26 C
Example 2.1 A pn junction diode has a reverse saturation current rating of 50nA at 32 . What
should be the value of forward current for forward voltage drop of 0.5V. Assume VT =
26mV at 32 and =1.
Solution:
From Eq. (2.1)
V
I D I s e VT 1
Then ID = 11.24A.
Examples 2.2 For the example 2.1 calculate the dynamic resistance at 32 and a forward
voltage drop of 0.5 V.
Solution:
V
I D I s e VT 1
dV VT V VT
Dynamic resistance of diode e-
di d Is
The current in forward- biased junction of diode is due to the both majority and minority carriers.
Once forward current decays to zero, the diode continues to conduct due to minority carriers that
remains stored in the depletion region and bulk of semiconductor material. The minority carriers
require a certain time to recombine with opposite charges and to be neutralized. This time is
called reverse recovery time of the diode. In Fig. 2.7 shows two reverse recovery characteristics
of diode. The soft recovery type of diode is much more common than abrupt recovery type
diode. The reverse recovery time is composed of two segments of time ta and tb and denoted by
trr = ta+ tb.This time measured from initial zero crossing of the diode to 25% of peak reverse
current IRR . The first segment of trr, i.e. ta, charge stored in depletion region is removed. During
tb, charge stored in semiconductor layer (or bulk) is removed and it is measured from the instant
of reverse peak value of IRR to 25% of IRR, i.e. .25IRR. The ratio of tb/ ta is called as softness factor
(SF).A diode with SF-factor equal to unity is called soft recovery diode and diode whose softness
factor is less than unity is called snappy recovery diode or fast recovery diode.
Fig 2.7 Reverse recovery characteristics (a) soft recovery and (b) abrupt recovery or
snappy recovery
The softness or snappiness factor (SF) depends on mainly construction of diode (e.g. Drift region
width, doping level, carriers life time etc.).The diode reverse recovery time can be reduced by
increasing the rate of decrease of the forward current ( i.e., by reducing stray circuit inductance )
and by using snappy recovery (SF<<1). The problem arises with this approach are:
ii) The current and voltage oscillation in the diode due to the resonant circuit formed by
stray inductance and the diode depletion layer capacitance.
The total recovery time trr and peak reverse current IRR are:
trr ta tb (2.2)
di
I RR ta (2.3)
dt
di
Where is rate of change of reverse current. The storage charge, which is the area enclosed by path
dt
of reverse recovery current, is approximately
1 1 1
QRR I RRta I RRtb I RRtrr (2.4)
2 2 2
2QRR
or I RR (2.5)
trr
2QRR
trr ta (2.6)
di
dt
2QRR
trr (2.7)
di
dt
di
and I RR 2QRR (2.8)
dt
It is seen from Eq.(2.7) and (2.8) that reverse recovery time trr and peak reverse current IRR depends on
the storage charge QRR and rate of change of di/dt.The storage charge depends on the forward diode
current iF. The peak reverse current IRR and reverse charge QRR, and SF are all interest to the circuit
designer, and these parameters are generally included in the specification sheets of diodes.
3. Schottky diodes
The fast recovery diode have low reverse recovery time of about 6μs hey are widely used in
dc-dc and dc-ac converter circuits. These diodes have current rating from 1A to several
thousands of amperes and voltage rating from 50V to around 3kV.
For voltage rating above 400V, fast recovery diodes are generally made by diffusion and
recovery time controlled by platinum or gold. For voltage ratings below 400V, epitaxial diodes
have faster switching speed than diffused diodes.
This diode minimizes the charge storage problem of pn junction by using metal to semiconductor
junction. When a layer of metal is deposited on thin epitaxial layer of n-type semiconductor the
forward current is due to the movement of electrons only. As metal has no holes (minority
carries), there is no storage charge and no reverse recovery time. The recovery time is due to the
solely to self-capacitance of the semiconductor junction.
The recovery charge of a schottky diode is much less than of an equivalent pn junction diode.
Because, it is only due to the junction capacitance, it is independent of the reverse di/dt. As
compared to pn junction diode, a schottky diode has (a) higher leakage current, (b) lower
forward voltage drop and (c) higher operating frequency. The maximum allowable voltage of
this diode of this diode limited to 100V.The current ratings of schottky diodes is most suitable
for low-voltage high current dc power supplies.
Example 2.3 he reverse recovery time of a diode is 3μs and rate of decrease of the diode
current is 3 A/μs Determine (a) the storage charge and,(b) the peak reverse current
1 di 2
(a) Storage charge, QRR trr
2 dt
.5 30 A / s 3 106 =135μc
2
(b) Peak reverse current, I RR 2QRR di
dt
Power BJT differs from its signal level counterpart in respect to large blocking voltage in off
state and high current carrying capacity in the on state means that a power BJT must have a
substantially different structure than its signal level counterpart. This modified structure leads to
significant different i-v characteristics and switching behavior.
The doping levels in each of the layers and thickness of the layers have a significant effect on the
characteristics of the device. The doping in emitter layer is quite large, where as the base the
base doping is moderate. The n- region usually termed as collector drift region has a light doping
level. The collector n+ region has a doping level similar to found in emitter. The thickness of the
drift region determines the breakdown voltage of the transistor and can range from tens to
hundreds of micrometers in extent. The thickness of the base region made as small as possible,
however, if the base thickness is too small, breakdown capability of transistor is compromised.
Thus, base thickness in power transistors are compromise between these two, a large current gain
“β” and breakdown voltage capability
Fig.2.8 (a) Vertical structure of power BJT and (b) circuit symbol for the transistor.
Practical power transistors have their emitters and base interleaved as narrow shown in Fig.
2.8(a).The purpose of this arrangement is reduce to the effects of current crowding and
consequent second breakdown. This multiple emitter structure also reduces parasitic ohmic
resistance in base current path, which helps to reduce power dissipation in the transistor.
There are operating regions of transistor, active, cut off and saturation. In active region, the
transistor works as an is amplifier. The CB junction is reversed biased, and the BE junction is
forward biased he base current is amplified by current gain “β” and collector –emitter voltage
voltage decrease with base current. In cut-off region transistor is off or base current is not
enough to turn it on and both junctions are reverse biased. In saturation region, the base current
is sufficient high so that collector-emitter voltage is low, and transistor act as switch. Both
junctions are forwards biased. The transfer characteristics, which is shown in Fig. 2.10.
I E IC I B (2.9)
The ratio of the collector current I C , to base current I B is known as the forward current gain β.
IC
hFE (2.10)
IB
The collector current has two components, one due to base current other is the leakage current of the
CB junction.
IC I B ICEO (2.11)
Where I CEO the collector to emitter leakage current with base open is circuited and can be neglected
compared to I B .
I E I B 1 ICEO (2.12)
1 1
I B 1 I C 1 I C (2.13)
IC IE (2.14)
(2.15)
1
Or (2.16)
1
VB RB I B VBE 0
VB VBE
Or IB (2.17)
RB
VCC VCE IC RC
RC
VCE VCC VB VBE
RB
From equation (2.19) s long as VCE VBE , The collector base junction is reversed biased and the
transistor is in active region. The maximum current in active region, which can be obtained by setting VCB
=0 and VBE=VCE, is
I CM
I BM (2.21)
If the base current is increased above I BM , collector current and VBE both increases and the VCE falls
below VBE.
This continues until the CB junction is forward biased. The transistor then goes into saturation. The
transistor saturation may be defined as the point above which increase in base current, there is no
significant change in collector current.
I CS
I BS (2.23)
Generally, the circuit is designed such that IB is higher than IBS. The ratio of IB to IBS is called the overdrive
factor (ODF):
IB
ODF ( 2.24)
I BS
IB
βforced < natural current gain β or hFE (2.25)
I BS
Example 2.5 A bipolar transistor shown in Fig 2 9 (a) is specified to have β in the range of 8 to
40. The load resistance RC = Ω he dc voltage supply is VCC = 130V and input voltage to the
base circuit is VB = 10V. If VBE(sat) = 1.5V and VCE(sat) = 1.0V, calculate.
11.7272
(b) From Eq.(2.25), βforced = = 1.6
7.3295
(c) Eq.(3.26) gives the total power loss:
Due to formation of internal capacitances, the transistor does not turn-on instantly. Figure 2.11
shows various switching waveforms of power transistor. When input voltage vB rises to V1 from
zero and base current rises to I B1 , the collector emitter voltage starts falling from its initial value
VCC. After some time td, called delay time, the collector current rises to 0.1 ICS, vCE from .9VCC.
this time required to charge up the capacitance of BE junction to forward bias voltage V BE =
0.7V.After this delay , the collector current rises from 0.1ICS to 0.9ICS and vCE falls from 0.9VCC
to 0.1VCC in time tr. this time tr is known as rise time which depends upon transistor junction
capacitances. Rise time tr is known as time during, collector current rises from 0.1ICS to 0.9ICS
and collector-emitter voltage falls from 0.9VCC to 0.1VCC.
Fig. 2.11 switching waveforms of power transistor
The base current is normally more than required to saturate the transistor. As result, excess
minority carriers charge is stored in the base region. The higher the ODF, the grater is the extra
charge stored in the base. This extra charge is called the saturating charge and corresponding
excess base current Ie:
I CS
Ie I B ODF .I BS I BS
or I e I BS ODF 1 (2.27)
When input base voltage vB is reversed from v1 to –v2 and base current also changed from- I B2 ,
the collector current does not change for a time ts, called storage time. The ts is required to
remove the extra charge stored in the base. Because vBE is still positive with approximately 0.7V
only, the base current reverses its direction due to the change in polarity of vB from v1 to –v2.The
reverse current - I B2 ,helps to discharge the base and remove extra charge from the base. Without
I B2 charge has to be removed entirely by recombination and this would increases the storage
time.
When extra charge is removed, The base emitter junction capacitance charges to the input voltage-v2,
and base current falls to zero. The fall time tf depend on the time t constant, which determined by the
capacitance of reverse biased BE junction. The fall time is defined as the time during which collector
current drops from 0.9ICS to 0.1ICS and collector emitter voltage rises from 0.1VCC to 0.9VCC.
The turn-on time ton is the sum of delay time td and rise time tr:
ton = td + tr
and turn-off time is the sum-off storage time ts and falls time tf:
toff = ts + tf
During turn-off process, a high current and high voltage with base emitter junction reversed
biased must be sustained by the transistor. Safe operating for transistor during turn-off is
specified as reverse blocking safe operating area (RBSOA).RBSOA specifies the limits of
collector current and collector emitter voltage at turn-off , when base current zero or emitter
junction reverse biased (i.e. base current is negative), shown in Fig. 2.13.With increase of reverse
bias, size of RBSOA deceases.
Fig. 2.14. Different types of power MOSFET with their symbol and transfer characteristics.
Figure 2.14 shows circuit symbol of these four types of MOSFETs along with their drain verses
gate- source voltage characteristics. The depletion type MOSFETs are normally on type switches
i.e. with gate terminal open still a non-zero current can flow in these devices. This is not
convenient in many power electronics applications. Therefore, enhancements type MOSFETs
(particularly of the n-channel variety) is more popular for power electronics application.
2.7.1 Constructional Features of Power MOSFET
A power MOSFET has vertically oriented four-layer structure of alternating p-type and n-type
layer, Fig. 2.15 shows a single cell structure of power MOSFET.A large number of such cells are
connected in parallel to form a complete device. The two n+ end layers labeled source and drain
are heavily doped approximately same level. The p-type middle layer is usually termed as body
(or substrate) has moderate doping level (2 to 3 orders of lower than n+ regions on both sides).
The n- region has the lowest doping density. Thickness of this region determines break down
voltage of the device. The gate terminal is placed over the n- and p-type region of cell structure
and is insulated from the semiconductor body by a thin layer of silicon dioxide. The source and
drain region of all cells are connected to the same metallic terminals of the complete device.
Similarly all gate terminals are also connected together.
The interesting feature of the MOSFET cell is that the alternating n+ n- p n+ structure forms a
parasitic BJT( with base-emitter shorted by source metallization) into each MOSFET cell shown
in Fig. 2.15 the non-zero resistance between base and the emitter of the parasitic BJT arises due
to body spreading resistance of p-type substrate. In design of MOSFET cells a special care is
taken so that this resistance can be minimized. With effective short between body and source
BJT always in cut-off and its collector –base is represented as an anti-parallel diode (called body
diode) shown in Fig. 2.16.
When VGS is increased beyond ( VGS(th) ) drain current start flowing. For small value of vDS, iD is
almost linear. Consequently this mode of operation is called “ohmic mode” of operation. In
power electronics applications a MOSFET is operated either in cut-off or in ohmic mode. The
slope of the vDS-iDS characteristics in ohmic mode is known as the on state resistance of
MOSFET ( rDS(on) ) . rDS(on) is reduces with increase in vGS. This is due to reduction of the channel
resistance at higher value of vGS. Hence, it desirable in power electronic applications, to use as
large a gate – source voltage as possible, before the dielectric breakdown limit.
At higher value of vDS the iD-vDS characteristics deviates from the ohmic region and for a given
vGS, iD tends to saturates with increase in vDS. At large value of electric field, produced by the
large drain- source voltage, drift velocity of free electron in channel tends to saturate as result of
this drain current becomes independent of vDS and determined solely by the gate source voltage
vGS This is active mode of operation of a MOSFET shown in Fig.2.18 (b).
(iii) A MOSFET has lower switching losses but it has higher conduction losses on state
resistance. A BJT has higher switching losses but lower conduction losses. For high frequency
application Power MOSFET is better than BJT. But at lower operating frequency BJT is
superior.
(iv) MOSFET is voltage controlled device while BJT is current controlled device.
(v) The MOSFET has positive temperature coefficient in ohmic region which allows paralleling
of MOSFET without any special arrangement for current sharing. Other hand, BJT has negative
temperature coefficient making parallel connection of BJT more complicated.
The typical switching waveforms are shown in Figure 2.20. The turn-on delay t d(on) is time that
required charging the input capacitance to threshold level, till VGS reaches VGS(th) no drain current flows.
Beyond t d(on) iD increases linearly with VGS and in further time tr reaches I0. The rise time tr is gate
charging time from threshold level to the full gate voltage VGsp, which is required to operate the
transistor into ohmic region. The turn –off delay t d is the time required for the input capacitance to
(off)
discharge from the gate voltage V1 to the pinch-off region. The fall time tf is the time required for the
input capacitance to discharge from pinch-off region to the threshold voltage. If VGS ≤ VGS(th) , transistor
turn-off.
Fig.2.20 Switching waveforms of MOSFET
MOSFET is the addition of a p+ injecting layer. This layer forms a p-n junction within layer and injects
minority carriers into it. The n type layer has two different doping levels. The lightly doped n - region is
called the drift region. Doping level and width of this layer determines the forward blocking (determined
by the reverse break down voltage of J2) of the device. The n+ buffer layer between the p+ and n- layer is
not essential for the operation of the IGBT, and some IGBTs are made without it ( sometimes termed as
non-punch-through, NPT-IGBTs, whereas those with this buffer layer are termed as punch through, PT,
IGBTs).
The PT construction does offer lower on a state voltage drop compared to the NPT construction
particularly for lower voltage rated devices. But, PT construction reduces the reverse break down of the
device.
It is shown in fig. 2.21 that the IGBT structure has a parasitic thyristor. Turn-on of this thyristor is
undesirable. The IGBT has source metallization over the body region that is also used in power
MOSFETs shown in fig 2.15. The body source short in IGBT helps to minimize the possible turn-on off
the parasitic thyristor, as we explain later.
Fig.2.22 (a) parasitic thyristor in IGBT, (b) exact equivalent circuit and approximate
equivalent circuit
Figure 2.22(b) shows exact equivalent circuit of the IGBT-cell structure. The upper p-n-p
transistor is formed by the P+ injecting layer as the emitter, the n-type layer as the base and the
p-type body layer as the collector. The lower n-p-n transistor has the n+-type source, the p-type
body and the n-type layer (Drift layer, Buffer layer) as the emitter, base and collector
respectively. The base of lower n-p-n transistor is shorted to the emitter by the emitter
metallization. However, due to the imperfect shorting, the exact equivalent circuit of the IGBT
includes the body spreading resistance between the base and the emitter of the lower n-p-n
transistor. If the output current is large enough, the voltage drop across this resistance may
forward bias the lower n-p-n transistor and initiate the latch-up process of the p-n-p-n thyristor.
Once this thyristor latches up the gate control of IGBT is lost and the device is destroyed due to
excessive power loss. The latch-up process of IGBT can prevent by modifying the doping level
and physical geometry of the body region. The figure 2.23 shows the circuit symbol of an IGBT.
This in turns cause substantial hole injection from p+ type collector to the drift region. A portion
of these holes recombine with electron arriving at drift region through the channel. The rest of
holes cross the drift region to reach the p type body where they are collected by the source
metallization shown in figure 2.24.
When the gate emitter voltage is less than the threshold voltage no inversion layer is formed in
the p-type body region and device is in the off-state. The forward voltage applied between the
collector and emitter drops almost entirely across the junction J2. Very small leakage current
flows through the device under this condition.
From the above discussion it is clear that n-type drift region act as the base of the output p-n-p
transistor he doping level and thickness of this layer determines the current gain α of the p-n-p
transistor. This is intentionally kept low so that most of the device current flow through the
MOSFET and not the output p-n-p transistor collector. This helps to reduce the voltage drop
across the body spreading resistance shown in the fig 2.22(b) and eliminate the possibility of
latch up of IGBT.
The total on state voltage drop across a conducting IGBT has three components.
VCEon =voltage drop across J1 (p+ n+ junction) + voltage drop across drift region resistance
+voltage drop across the channel.
The voltage drop across drift region resistance considerably lower compared to a MOSFET due
to strong conductivity modulation by injected minority carries from the collector. This is main
region for reduced voltage drop across an IGBT compared to an equivalent MOSFET.
When the gate emitter voltage is below the threshold voltage only a very small leakage current
flow through the device while collector-emitter voltage almost equal the supply voltage. The
device, under this condition is said to be operating in the cut-off region. The maximum forward
voltage the device can withstand in this mode (marked VCES in figure 2.25(a)) is determined by
the avalanche breakdown voltage of the body- drift p-n junction. Unlike a BJT, however, this
breakdown voltage independent of the collector current as shown in figure 2.25(a)
As the gate emitter voltage increases beyond the threshold voltage the IGBT enters into the
active region of operation. In this mode, the collector current is determined by the transfer
characteristics of the device as shown in figure 2.25(b). This is characteristic is similar to that of
a power MOSFET iD -vGS characteristic and is reasonably linear over the most of the collector
current range. The collector emitter voltage, on the other hand, is determined by the external load
line ABC as shown in figure 2.25(a).
Another possible modification to the body layer shown in fig 2.26(b). Where one of the emitter
region is eliminated from the IGBT cell. This makes the hole current to be collected into the cell
where the emitter has been removed. This so called hole by pass structure and provide alternate
path for the hole current component that does not have to flow laterally beneath a emitter region.
This geometry is quite effective in raising the latch up threshold.
Figure 2.26(a) modification of body region by heavier doping greater depth to lower
spreading resistance, (b) Eliminated one of the emitter region from IGBT cell.
Two factors contribute to slowing down of voltage fall. First gate drain capacitance C GD will
increase in the MOSFET portion of the IGBT at low drain source voltages. Second, the p-n-p
transistor portion of the IGBT goes in the active region to its on state more slowly than the
MOSFET portion of the IGBT. Once the p-n-p transistor on after fv2, the on state voltage of the
device maintained at VCE(sat).
The turn off process of an IGBT fallows the increase process of turn on with one major
difference. Once VGE (Th) the drive MOSFET of the IGBT turns off. During this period (tfi1) the
device current falls rapidly. However, when the drive MOSFET turns off, some amount of
current still flow through the output p-n-p transistor due to store charge in its base region. Since
there is no reverse voltage applied to the IGBT terminals that could generate a negative drain
current, there is no possibility for removing the stored charge by carrier sweep out. The only way
these excess carriers can be removed is by recombination within the IGBT. During this
recombination period (tfi2) the remaining current in the IGBT decays slowly farming a current
tail. A long t fi2 is undesirable, because the power dissipation in this interval will large due to full
collector-emitter voltage. t fi2 Can be reduced by excess carrier life time in the pnp transistor base.
(i) With increase in temperature the on-state resistance of the channel in power
MOSFET is much pronounced than in IGBT.
(ii) Current sharing in multiple paralleled MOSFETs is comparatively poor than IGBTs.
(iii) The turn-on transients of power MOSFET are identical to IGBTs.
(iv) With rise in voltage rating, the increment in on-state voltage drop is more dominant in
power MOSFET than it is in IGBT. This means that IGBTs are designed for higher
voltage ratings than power MOSFET.
(v) Power MOSFET is suited for high operating frequency than IGBT.
A cross sectional view of of single cell of P-MCT is shown in Fig.2.28 (a). A complete P-MCT
is composed of many thousands of cells fabricated on the same silicon wafer and cells are
connected electrically parallel. Thyristor portion of the MCT has same structure as a
conventional thyristor. The MOSFET are located around the anode of the MCT, as shown in Fig.
2.28(a), in MCT structure there are two types of MOSFET formed, one is on- MOSFET and
other is off- MOSFET. In P-MCT, the on-FET is a p-channel MOSFET and off-FET is an n-
channel MOSFET. The equivalent circuit and circuit symbol is shown in Fig. 2.28(b), and
2.28(c) respectively.
Figure 2.28 The P-MCT: (a) cross sectional structure (b) equivalent circuit and (c) circuit
symbol
A cross sectional view of a single cell of N-MCT is shown in Fig. 2.29(a). Like the P-MCT, an
N-MCT is composed many thousands of these cells fabricated on the same silicon wafer, and all
these cells are connected in parallel. The thyristor portion of the device has same pnpn structure
as a conventional thyristor. The on-FET is an n-channel MOSFET and off-FET is a p-channel
MOSFET. These NOSFETs are located near the cathode. An equivalent circuit for the N-MCT is
shown in Fig.2.29 (b) and it includes not only two transistor model of thyristor but also the on-
FET and off-FET. The circuit symbol for the N-MCT is shown in Fig. 2.29(c).
Fig. 2.29 The N-MCT (a) cross sectional view (b) equivalent circuit (c) circuit symbol
The static i-v characteristic of both of MCTs is essentially the same as for the GTO. Presently
available MCTs are designed for asymmetrical blocking and little reverse blocking capability,
typically about 25V.
The p-MCT is turned off by applying a positive voltage between the gate and anode. This turned-
off the on- MOSFET and an n-channel is created and n-channel off MOSFET turns-on. This
MOSFET is in shunt with the base emitter junction of the pnp transistor. This diverts the base
drive of the transistor though off- MOSFET and breaks the regenerative process. For this
purpose, pnp transistor was chosen since the gain of transistor is higher. Once the base drive is
diverted, the regenerative process causes the turn-off of MCT.
The turned-on and turned off an N-MCT can be understood in similar way of p-MCT turned-on
and turned –off. In turning –off either type of MCT, it is essential that the drain- source voltage
of conducting off-FET be kept well below 0.7, the value of base- emitter voltage that causes the
BJT to be in the active region. This requirement means there is maximum by means of gate
control. When off-FET activated to turn-off the MCT, the on- state current must go through the –
off the off-FET. When this current is larger than a specific value, the voltage drop across off-
FET exceeds 0.7V, and BJT will not-off.
The mobility of electrons is three times larger than the mobility of the holes hence, the on-state
resistance of n-channel MOSFET will be three times smaller than the on-state resistance of a
similar p- channel MOSFET. this means that for the same voltage drop of 0.7V, the current in p-
channel MOSFET. Since a p- channel MOSFET is used for turn-off in an N-MCT and an n-
channel MOSFET is used for turned-off is in a P-MCT, the P-MCT will be able to turned-off a
current approximately three times larger than an N-MCT.
2.10 Summary
This chapter has mainly covered, power diode and types of power transistor. The power BJT has
vertically oriented structure with highly interdigitated B-E structure and light doped collector
drift region. BJTs suffer from second break down and requires reverse base current during
turn-off to reduced storage time but they have low on-state voltage drop also, BJTs are current
controlled device and their parameter are sensitive to junction temperature.
MOSFETs have also a vertically oriented structure with a lightly doped drain drift region highly
interdigitated gate-source structure. MOFETs are voltage controlled device and require very low
gating power and their parameter are less sensitive to junction temperature. There is no second
breakdown problems and no need for negative voltage during turn-off. IGBTs, which combine
the advantages of BJTs and MOSFETs, are voltage controlled device and low on state voltage
drop similar to BJTs. IGBTs structure contains a parasitic thyristor that must not be allowed to
turn-on or else the gate will lose the ability to turn-off the device.
2.11 Problems
( Ans 5 A,292 5μ )
2.10 What is bipolar junction transistor?
2.11 What are the three regions of operation for BJTs?
2.12 What is the difference between, beta, β and forced beta,βforced of BJTs?
2.13 What are the conditions under which a transistor operates as switch?
2.14 Why is it necessary to reverse bias BJTs during turn-off?
2.15 What is second breakdown of BJTs?
2.16 What is cause of delay, rise, and storage and fall time in BJTs?
2 7 he β of bipolar transistor shown in Fig 2 9 (a) varies from to 6 he load resistance RC
= 5Ω he dc supply voltage is VCC = 100V and input voltage to the base circuit is VB = 8V. if
VCE(sat) = 2.5V and VBE(sat) = 1.75V, find (a) the value of RB = that will result in saturation with
an overdrive factor of 2 ; (b) the forced β, and (c) the power loss in the transistor
2.19. Explain the switching performance of BJT with waveforms. Explain clearly turn-on and
turn-off times and their components.
2.20 What is FBSOA and RBSOA of BJTs?
2.21 What is an MOSFET? What are differences between enhancement type MOSFETs and
depletion-type MOSFETs?
2.22 Why do the MOSFETs not require negative voltage at gate during turn-off?
2.23 What are the problems of parallel operation of BJTs?
2.24 What is IGBT? What are its other names? Describes its constructional features and principle
of working.
2.25 What are the main differences between MOFETs and IGBTs?
2.27 Describe the basic structure of MOS Controlled thyristor (MCT)
2.28 What is N-MCT and P-MCT? Explain the working of both types of MCTs.