IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 6, NO. I .

JANUARY 1991 151

Switching Converters with Wide DC Conversion

Range
Dragan MaksimoviC, Member, IEEE, and Slobodan Cuk , M i w l w . IEEE

Abstract-In dc-to-dc conversion applications that require a large s4 s2

range of input andlor output voltages, conventional PWM converter
topologies must operate at extremely low duty ratios, which limits the
operation to lower switching frequencies because of the minimum ON-
time of the transistor switch. This is eliminated in a new class of single-
transistor PWM converters featuring voltage conversion ratios with
quadratic dependence on duty ratio. Practical circuit examples oper-
ating at 0.5 MHz are described.

I. INTRODUCTION

I N PWM (square-wave) dc-to-dc converter topologies, dc

conversion ratio M ( M = V,,,/ V i , ) is a function of duty ratio
D of the active (transistor) switch. Both minimum and maxi-
mum attainable conversion ratios are limited in practical con-
verters. The maximum conversion ratio M,,, of the buck
converter (M( D ) = D ) cannot be greater than 1, while in boost
( M (D ) = 1/( 1 - D )), buck-boost or Cuk converters ( M (D )
= - D / ( 1 - D )), M,,, is limited by the degradation in effi-
ciency as duty ratio D approaches 1. On the lower end, mini-
mum ON-time of the transistor switch results in a minimum
attainable duty ratio and, consequently, in a minimum conver-
sion ratio Mmin.
Evidently, the limit on Mmi, becomes more restrictive as the
switching frequency is increased. It is possible that in practical
applications a lower operating frequency has to be selected only
because of the low-end limitation in D.One typical application
is a low-voltage, on-board regulator (V,,, = 5 V or less), sup-
plied from an unregulated mid-voltage bus ( Vi, = 50 V ) . If
isolation is not required, a converter without transformer is
preferable but then, the converter itself has to provide a large Fig. 1. (a) Cascade of two buck converters has M(D ) = D z , but requires
two transistor switches. (b) If short T and switch S , interchange their po-
step-down. One such converter, in which a capacitive voltage sitions, only single transistor is necessary to obtain converter with same dc
divider is embedded in the Cuk topology, was suggested in [ 11. conversion ratio.
Other possible applications that require an extremely large con-
version range include laboratory power supplies, where wide the same minimum owtime. Other advantageous conversion-
range of adjustable output voltages is required, or universal ratio functions include M ( D ) = D 2 / ( 1 - D ) and M ( D ) =
110/220 V off-line power supplies, where the converter is ex- D 2 / ( 1 - D )’. Of course, converters with such conversion ra-
posed to extremely wide range of input voltages. tios can be readily constructed by cascading two basic convert-
Conversion range can be extended significantly if conversion ers, as in [2]. Such realizations, however, require two transistor
ratio M ( D ) has a quadratic dependence on duty-cycle. For ex- switches and additional complexity of the converter network
ample, two buck converters in a cascade (Fig. l(a)) provide a may compromise potential advantages of the extended conver-
conversion ratio M(D ) = D 2 and a significantly lower Mmi,for
sion range. It can be shown that M ( D )with quadratic depen-
Manuscript received September 20, 1989. This paper was presented at dence on d cannot be realized with less than two capacitors,
the 1989 High Frequency Power Conversion Conference, Naples FL, May two inductors, and four switches [3], but the number of tran-
14-18. This work was conducted under the Power Electronics Program sistor switches can be reduced to one. Indeed, a slight modifi-
supported by grants from Boeing Electronics Company, GTE Communi- cation in the position of the SI-switch in the buck-buck cascade
cation Systems Corporation, Rockwell Inc., and EG&G Almond Instm-
rnents Inc.
results in a single-transistor converter with M ( D ) = D z , as
D. MaksimoviC is with the Faculty of Electrical Engineering, University shown in Fig. l(b). Note that the two topologies with ideal
of BeLgrade, Belgrade, Yugoslavia. switches are electrically equivalent-the two switched net-
S . Cuk is with the Power Electronics Group, California Institute of Tech- works,
nology, Pasadena, CA 91125.
IEEE Log Number 9040464.

0885-8993191/O 100-0 15 1$0 1.OO 0 199 1 IEEE

152 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 6 , NO. I , JANUARY 1991

and

are identical in the converter of Fig. l(a) and in the converter

of Fig. l(b). The difference between the topologies becomes
apparent only after the ideal (four-quadrant) switches are re-
placed by the single-quadrant semiconductor switches.
In Section 11, new single-transistor converter topologies with
quadratic conversion ratios are introduced. Operation and basic
properties of the converters are discussed in Section 111. Design
considerations and experimental results for two practical
examples operating at 0.5 MHz are presented in Sections IV
and V.

11. QUADRATIC
PWM CONVERTERS
A systematic procedure for construction of complete classes
of PWM converters with a given number of reactive elements,
a given number of switches and a required dc conversion ratio
is described in [3]. The procedure is used to extract fourth-
order, single-ended PWM converters with quadratic conversion
ratios and a single active (transistor) switch. Parameters given
at the input of the procedure are as follows.
Required dc conversion ratio: 1 M ( D ) I = D 2 , D 2 / (1 -
D ), or D 2 / ( 1 - D ),;
Number of capacitors, inductors: n, = n, = 2 ; Fig. 2. Converter a, with dc conversion ratio M ( D ) = D z (a); and its
Number of switches: n, = 4; version with an isolation transformer (b).
Number of transistor switches; n, = 1.
Implemented in a computer program, the synthesis procedure
searches through all possible configurations and extracts those
that satisfy the' input specifications. As a result, quadratic con-
verter topolagies in Figs. 2-7 are uncovered.
The conversion ratio of converters a, and a, is M(D ) =
D 2 ,converters W,,W2aud 63,M ( D ) = - D 2 / ( 1 - D ) , while
convertef e, features M ( D ) = D 2 / ( 1 - D ) a . Versions with
an isolation transformer are indicated where applicable. None
of the above converter configurations were disclosed before,
with the exception of the @,-converter, which was indepen-
dently amved at by Lambda Electronics.
It is interesting to note that some of the quGdratic topologies
( a2and W3 in phrticular) bear little resemblance to a cascade Fig. 3. Converter Bz with dc conversion ratio M ( D ) = Dz.
or some othef combination of two basic converters. Thus, it is
not likely that some intuitive circuit-manipulation technique transistor. In the following discussion, for simplicity, we as-
(such as the one used to derive the @.,-converterin the intro- sume that ac ripples in capacitor voltages and inductor currents
ductory section) would uncover all Converter topologies intro- are entirely negligible. Voltages are normalized to Vg,while
duced in this section. On the other hand, the systematic currents are normalized to IOut.
synthesis procedure guarantees that all topologies with a spec- In converter a,,when the transistor switch is turned ON, diode
ified set of properties are found. D, is turned ON simultaneously, conducting the current i,, =
IL2 - ZL, . The average transistor current is equal to DIL2.Since
111. OPERATION
OF THE QUADRATIC
CONVERTER the average transistor current must also be equal to I L 1 ,we have
TOPOLOGIES
(3)
In this section, we discuss operation and basic properties of
the quadratic converters introduced in Section 11. which confirms that diode D , is indeed ON. During the transistor
owtime, diodes D, and D, are OFF. When the transistor is turned
OFF, diode D, provides a path for current I L 1 , while diode D,
A . Continuous Conduction Mode
provides a path for current IL2. Diode D , is OFF. Since the two
Conversion ratio M(D ) of the quadratic converters in Figs. switched networks in a, are electrically identical to the switched
2-7 is derived assuming that the converters operate in the con- networks in a cascade of two buck converters, converter @., has
tinuous conduction mode (CCM). In CCM, all capacitor volt- the same dc conversion ratio, M(D ) = D 2 .
ages and inductor currents are dc quantities with a relatively Converter a, can be viewed as a cascade of a passive buck
small superimposed ac ripple. Turn-ON and turn-OFF transitions stage (L,,C , , D , , D 2 ) and an active buck stage ( L , , C , , T ,
of all diodes are synchronous with switching transitions of the 0,). Switching of the diodes inside the passive buck is a result
MAKSIMOVIC AND CUK: SWITCHING CONVERTERS WITH WIDE DC CONVERSION RANGE 153

T rout

Fig. 6. Converter (B3 with dc conversion ratio M ( D ) = - D 2 / ( 1 - D ) .

Fig. 4. Converter 63,with dc conversion ratio M ( D ) = - D 2 / ( 1 - D

(a); and its version with an isolation transformer (b).

Fig. 7 . Converter e , with dc conversion ratio M ( D ) = D 2 / ( 1 - D)*

(a); and its version with an isolation transformer (b).

Elementary dc analysis is easily carried out for the remaining

five quadratic converters. In all cases, diode D,is the diode that
is ON during the transistor ON-time. For reference and compar-
ison, average inductor currents, average capacitor voltages and
stresses on switching devices are summarized in Table I. Ideal
voltage and current stresses (computed under the assumption
that ac ripples in capacitor voltages and inductor currents are
Fig. 5 . Converter CB2 with dc conversion ratio M ( D ) = - D 2 / ( 1 - D) negligible) should be taken as lower bounds for the actual
(a); and its version with an isolation transformer (b). stresses in practical circuits where the ac ripples may have sig-
nificant values.
of the pulsating input current of the active buck. Thus, if any With respect to the parameters in Table I, the two @-con-
other PWM converter with a pulsating input current is preceded verters with M ( D ) = D 2 differ only in current I L , , and the more
by the passive buck stage, its dc conversion ratio gets multi- favorable choice (the one with lower inductor current) depends
plied by D . For example, converter a2is a cascade connection on the steady-state duty ratio D.Among the @-converters with
of the passive buck and the buck-boost converter. One may also M ( D ) = - D 2 / ( 1 - D),converter @, has the lowest average
note that the passive buck itself has a pulsating input current. inductor currents and switch currents. Consequently, if the same
Thus, n - 1 passive buck stages can be cascaded in a row with components were used to design the three converters, converter
a single active buck, resulting in a single-transistor PWM con- @, would have the lowest conduction losses and the lowest
verter with M ( D ) = D". stored energy for the same amount of processed power.
I54 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 6, NO. I. JANUARY 1991

TABLE I

D I D
1- D
D

D 1-D 2 D
IL1 1-D 1- D

IL2 1 1 1
-
1- D 1 - 1
1-D

I l+D I -
1
1-D I &
IT 1 - 1
1-D 0"
1

VD 1 1 1

ID1 1-D 1 - 1
1-D

- vD2 1 1
-
1-D 1 - 1
1-D

ID2 D A D
1-D

D D
vD3 D 1-D (1-or

1
- 1
-
103 1 1 1-D 1-D

Capacitor dc voltages, inductor dc currents, and voltage/current stresses on switches in the quadratic converters operating in
the continuous conduction mode. The stresses are computed assuming that ac ripples in inductor currents and capacitor voltages
are negligible. Voltages are normalized to V8, while currents are normalized to I,,,.

B. Discontinuous Conduction Modes mine the conditions for operation in the continuous conduction
mode.
In this section, we remove the asumption that ac ripples in Define parameters k , and k 2 by
inductor currents are negligible, while the assumption that ac
ripples in capacitor voltages are relatively small is retained.
(4)
In basic single-transis!or, single-diode PWM converters
(buck, boost, buck-boost Cuk, etc.), the discontinuous inductor
where R is the load resistance at dc,
current mode (DICM) occurs when the diode current drops to
zero before the end of the transistor ow-time. In a cascade of R = ~O"I/~OlJI. (5)
basic PWM converters, a DICM can be associated with each
diode 151, but the same qualitative description holds-the diode andf, is the switching frequency. Consider, as an example, con-
turns OFF before the transistor is turned ON. In the quadratic verter @, in Fig. 2(a). Familiar discontinuous modes can be
converters, there exists a diode that conducts during the tran- associated with diodes D, and D,. When the transistor is O F F ,
sistor on-time, so that the notion of DICM needs a slight gen- diode D, constructs current iL2. The diode current decays lin-
eralization. An operating mode of a PWM converter will be early and reaches its minimum at the end of the transistor-om
called discontinuous if switching (turn-ON or turn-OFF) of a time. For operation in CCM, the minimum should be positive,
diode is not synchronous with switching (turn-ON or turn-OFF) i.e.,
of the transistor. A IL.2
IL2 -- > 0, (6)
In every DICM, the conversion ratio is a function of duty 2
ratio D and load current rout.For the same duty ratio D , the
conversion ratio in DICM is higher than the conversion ratio in where IL2 and AI,, denote the average and the peak-to-peak
CCM. Thus, a transition from CCM to DICM tends to increase ripple of the inductor L , current. After evaluating the average
the minimum attainable conversion ratio and therefore, to de- current and the ripple current in terms of Vg,R , L 2 andf,, we
obtain
crease the attainable range of conversion ratios. Hence, for a
proper design of quadratic converters, it is important to deter- k2> 1 -D. (7)
MAKSIMOVIC AND CUK: SWITCHING CONVERTERS WITH WIDE DC CONVERSION RANGE 1.55

TABLE I1

Conditions for operation in the continuous conduction mode for the six
quadratic converters. For each boundary condition, the diode responsible
for the condition is indicated in brackets.

In fact, this is the CCM/DICM boundary condition for the buck

converter [4]. A similar analysis for diode D2 yields

1-D
kl > -
D2

Again, this condition can be interpreted as the well-known con-

id ;I
- c 1.

dition for the simple buck converter, except that load R is re- The minimum energy storage or, equivalently, the minimum
flected to the input stage by the square of the output-stage +
inductances are required if the sum k , k , is minimized under
conversion ratio D. the boundary conditions. The solution kl = 2, k , = 2 yields
Let us now examine the discontinuous mode associated with
diode D,. When the diode is ON, its current iDl is equal to min ( k , + k 2 ) = 4, for a,. (16)
i,, - i,,, and the condition for operation in CCM is that For a,, the boundary conditions become
ki > 2, (17)
throughout the transistor owtime. Since both iL2 and i,, are lin- 2 3
early increasing during the transistor owtime, this condition is -+-<1,
ki k2
equivalent to the following two inequalities:
and the solution k , = 4.45, k 2 = 5.45, results in
A IL2 AIL,
IL2 - ->
2
IL, - -,
2
min ( k , + k 2 ) = 9.9, for a,. (19)
Thus, in this example, more than two times larger inductances
are necessary in converter a2than in converter Using the a,.
L L results of Tables I and 11, a similar comparative analysis can be
camed out for any particular design example.
The first inequality requires that the diode current is positive at
the transistor owtime, while the second inequality imposes the IV. AN EXPERIMENTAL@,-CONVERTER
same condition at the end of the transistor owtime. In terms of
Topology a, in Fig. 2(a) is used to design a practical 500-
parameters k , and k , , conditions (10) and (1 1) become
kHz converter according to the following specifications:

;I - Zl
1
l.
Input voltage: 10 V c V, < 100 V;
Output voltage: V,,, = 5 V;
Load: 1 A c IOutc 4 A.
Analysis of boundary conditions for operation in CCM is car-
ried out for all six quadratic converters. The results are sum- The power stage of the converter is shown in Fig. 8. Inductor
marized in Table 11. Note that the conditions can be vastly values are chosen so that the converter operates in the contin-
different even for the converters that share the same conversion uous conduction mode under all operating conditions. For the
ratio in CCM. minimum output current, R = 5 Q,k , = 20 and k , = 1.2. It is
Consider, for example, converters a, and a2.Assume that easy to verify that all CCM/DICM boundary conditions are sat-
operating conditions are the same and that the duty ratio is set isfied for the worst-case operating condition
to D = 0.5, so that all average inductor currents are the same. I

We want to examine in which converter lower conductances are

necessary for operation in CCM. For a,, the boundary condi-
156 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 6, NO. I , JANUARY 1991

25T #2OAWG I O T II6AWG

POT 2213 POT 1811

60 --

70 --

60 --

Fig. 8. An experimental @,-converter. 50

0 50 100
v, rvi
Fig. 10. Efficiency of experimental @,-converter as a function of input
voltage V8, with output current I,,,, as varying parameter.

# I 8 AWG # I 8 AWG -
RMB H7C1 RM6 H7CI

-- "0 -
ECG6240

Fig. 9. Waveforms in experimental @,-converter: (a) for the minimum in-

put voltage ( V , = 10 V ) and the maximum output current (I,,, = 4 A);
(b) for maximum input voltage ( V, = 100 V ) and minimum output current
(Io", = 1 A).

Waveforms recorded for extreme values of the input voltage

and the load current are shown in Fig. 9. In spite of the ex-
tremely large variations in the input voltage, duty ratio of the
transistor switch varies from D,,, = 0.2 to D,,, = 0.8, safely
within the limits imposed by the speed of the transistor and its
drive circuitry. There is also enough room left for dynamic vari-
ations of the duty ratio during the input-voltage or the output-
current transients. Measured efficiency as a function of the in-
put voltage with the output current as a varying parameter is
shown in Fig. 10. For the low-end input voltage the efficiency
exceeds 80% for all loads and it gradually decays as the input
voltage is increased. Switching losses that result from the switch
voltage/current overlaps during the switching transitions are
MAKSIMOVIC AND CUK: SWITCHING CONVERTERS WITH WIDE DC CONVERSION RANGE 157

proposed and intended for applications where conventional,

single-stage converters are inadequate-for high-frequency ap-
plications where the specified range of input voltages and the
specified range of output voltages call for an extremely large
range of conversion ratios.
Following a discussion of basic properties of the quadratic
converters in the continuous and the discontinuous modes, two
60 illustrative experimental examples are included: a 20-W,
5-V-output converter supplied from a highly unregulated line
voltage ( 10 V < Vg < 100 V), and a 60-W 1-V-to-60-V-output
50 converter for a laboratory power supply. Although in both cases
the step-down of more than 20 to 1 is required, the quadratic
40 converters can operate at a relatively high switching frequency
( 500 kHz) because the minimum ow-time limitation is much
less restrictive.
30 I 4
0 10 20 30 40 50 60 ACKNOWLEDGMENT
The assistance is gratefully acknowledged of Tiger Tejpal
Fig. 12. Efficiency of experimental @,-converter as function of output Singh and Branislav Kecman, graduate students at California
voltage. Institute of Technology and members of the Power Electronics
Group, for the help in constructing the experimental circuits
and producing the experimental results in Sections IV and V.
For the maximum output current, ZOut = 1 A, and the nominal
input voltage, Vg = 50 V, measured efficiency as a function of
the output voltage is shown in Fig. 12. The efficiency exceeds REFERENCES
80% for output voltages greater than 18 V. As expected, the [ 11 R. D. Middlebrook, “Transformerless dc-to-dc converters with
efficiency collapses for very low output voltages because of the large conversion ratios,” in Proc. IEEE/INTELEC Conf , 1984.
conduction losses caused by the inevitable voltage drop of the [2] H. Matsuo and K. Harada, “The cascade connection of switching
semiconductor switches. regulators,” IEEE Trans. Ind. Appl., vol. IA-3, no. 2, MarJApr.
1976.
[3] D. MaksimoviC and S. Cuk, “General properties and synthesis of
VI. CONCLUSION PWM dc-to-dc converters,” in IEEE Power Electronics Special-
isrs Conf Rec., 1989, pp. 515-525.
Compared to basic converter topologies (buck, boost, buck- [4] S. Cuk and R. D. Middlebrook, “A general unified approach to
boost, Cuk etc.), PWM converters with quadratic dc conversion modelling switching dc-to-dc converters in discontinuous conduc-
ratios, M ( D ) = D 2 , M ( D ) = D z / ( l - D ) o r M ( D ) = D 2 / tion mode,” in IEEE Power Electronics Specialists Conf Rec.,
( 1 - D ) 2 , offer a significantly wider conversion range. For a 1977, pp. 36-57.
[5] S. Cuk, “Discontinuous inductor current mode in the optimum
given minimum olu-time and, consequently, for a given mini- topology switching converter,” in IEEE Power Electronics Spe-
mum duty ratio Dmin,D 2 in the numerator of M(D ) yields a cialists Con$ Rec., pp. 105-123.
much lower limit on the minimum attainable conversion ratio.
By applying a systematic synthesis procedure, six novel sin-
gle-transistor converter configurations with quadratic dc con-
version ratios are found. The simpler, single-transistor Dragan Maksimovid (M’89). For a photograph and biography please
realization is the most important advantage over the straight- turn to page 140 of this issue.
forward cascade of two basic converters.
As far as conversion efficiency is concerned, it is quite clear
that a single-stage converter is always a better choice than a Slobodan Cuk (M’74). For a photograph and biography please turn to
two-stage converter. Therefore, the quadratic converters are page 140 of this issue.