LM4766 Overture™ Audio Power Amplifier Series Dual 40W Audio Power Amplifier With Mute
LM4766 Overture™ Audio Power Amplifier Series Dual 40W Audio Power Amplifier With Mute
LM4766 Overture™ Audio Power Amplifier Series Dual 40W Audio Power Amplifier With Mute
1FEATURES DESCRIPTION
•
23 SPiKe Protection The LM4766 is a stereo audio amplifier capable of
delivering typically 40W per channel with the non-
• Minimal Amount of External Components isolated "NDL" package and 30W per channel with
Necessary the isolated "NDB" package of continuous average
• Quiet Fade-In/Out Mute Mode output power into an 8Ω load with less than 0.1%
• Non-Isolated 15-Lead TO-220 Package (THD+N).
• Wide Supply Range 20V - 78V The performance of the LM4766, utilizing its Self
Peak Instantaneous Temperature (°Ke) (SPiKe)
APPLICATIONS Protection Circuitry, places it in a class above
discrete and hybrid amplifiers by providing an
• High-End Stereo TVs inherently, dynamically protected Safe Operating
• Component Stereo Area (SOA). SPiKe Protection means that these parts
• Compact Stereo are safeguarded at the output against overvoltage,
undervoltage, overloads, including thermal runaway
and instantaneous temperature peaks.
KEY SPECIFICATIONS
• THD+N at 1kHz at 2 x 30W Continuous Each amplifier within the LM4766 has an independent
smooth transition fade-in/out mute that minimizes
Average Output Power Into 8Ω 0.1% (Max)
output pops. The IC's extremely low noise floor at
• THD+N at 1kHz at Continuous Average Output 2µV and its extremely low THD+N value of 0.06% at
Power of 2 x 30W Into 8Ω 0.009% (Typ) the rated power make the LM4766 optimum for high-
end stereo TVs or minicomponent systems.
Connection Diagram
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 Overture is a trademark of Texas Instruments.
3 All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM4766
SNAS031F – SEPTEMBER 1998 – REVISED MARCH 2013 www.ti.com
Typical Application
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.
(4) For operating at case temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and a
thermal resistance of θJC = 1°C/W (junction to case) for the NDL package. Refer to the section DETERMINING THE CORRECT HEAT
SINK in the APPLICATION INFORMATION section.
(5) Human body model, 100pF discharged through a 1.5kΩ resistor.
(6) The operating junction temperature maximum is 150°C, however, the instantaneous Safe Operating Area temperature is 250°C.
(1) (2)
OPERATING RATINGS
Temperature Range TMIN ≤ TA ≤ TMAX −20°C ≤ TA ≤ +85°C
(3)
Supply Voltage |VCC| + |VEE| 20V to 60V
(1) All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Operation is ensured up to 60V, however, distortion may be introduced from SPiKe Protection Circuitry if proper thermal considerations
are not taken into account. Refer to the APPLICATION INFORMATION section for a complete explanation.
(1) (2)
ELECTRICAL CHARACTERISTICS
The following specifications apply for VCC = +30V, VEE = −30V, IMUTE = −0.5mA with RL = 8Ω unless otherwise specified.
Limits apply for TA = 25°C.
Symbol Parameter Conditions LM4766 Units
(Limits)
Typical (3) Limit (4)
(5)
20 V (min)
|VCC| + |VEE| Power Supply Voltage GND − VEE ≥ 9V 18
60 V (max)
NDL Package, VCC = ±30V,THD+N = 0.1% 40 30 W/ch (min)
(max),
(6) (7) Output Power (Continuous f = 1kHz, f = 20kHz
PO
Average)
NDB Package, VCC = ±26V (7), 30 25 W/ch (min)
THD+N = 0.1% (max), f = 1kHz, f = 20kHz
NDL Package, 30W/ch, RL = 8Ω, 0.06 %
Total Harmonic Distortion 20Hz ≤ f ≤ 20kHz, AV = 26dB
THD+N
Plus Noise NDB Package, 25W/ch, RL = 8Ω, 0.06 %
20Hz ≤ f ≤ 20kHz, AV = 26dB
Xtalk Channel Separation f = 1kHz, VO = 10.9Vrms 60 dB
SR (6) Slew Rate VIN = 1.2Vrms, trise = 2ns 9 5 V/μs (min)
(8)
Itotal Total Quiescent Power Supply Both Amplifiers VCM = 0V, VO = 0V, IO = 0mA 48 100 mA (max)
Current
VOS (8) Input Offset Voltage VCM = 0V, IO = 0mA 1 10 mV (max)
IB Input Bias Current VCM = 0V, IO = 0mA 0.2 1 μA (max)
IOS Input Offset Current VCM = 0V, IO = 0mA 0.01 0.2 μA (max)
IO Output Current Limit |VCC| = |VEE| = 10V, tON = 10ms, VO = 0V 4 3 Apk (min)
(8) (9)
|VCC–VO|, VCC = 20V, IO = +100mA 1.5 4 V (max)
VOD Output Dropout Voltage
|VO–VEE|, VEE = −20V, IO = −100mA 2.5 4 V (max)
VCC = 30V to 10V, VEE = −30V, VCM = 0V, IO 125 85 dB (min)
(8)
= 0mA
PSRR Power Supply Rejection Ratio
VCC = 30V, VEE = −30V to −10V VCM = 0V, IO 110 85 dB (min)
= 0mA
(8)
CMRR Common Mode Rejection Ratio VCC = 50V to 10V, VEE = −10V to −50V, VCM
110 75 dB (min)
= 20V to −20V, IO = 0mA
(8)
AVOL Open Loop Voltage Gain RL = 2kΩ, ΔVO = 40V 115 80 dB (min)
GBWP Gain Bandwidth Product fO = 100kHz, VIN = 50mVrms 8 2 MHz (min)
(6)
eIN IHF–A Weighting Filter, RIN = 600Ω (Input
Input Noise 2.0 8 μV (max)
Referred)
PO = 1W, A–Weighted, Measured at 1kHz, 98 dB
RS = 25Ω
SNR Signal-to-Noise Ratio
PO = 25W, A–Weighted Measured at 1kHz, 112 dB
RS = 25Ω
AM Mute Attenuation Pin 6,11 at 2.5V 115 80 dB (min)
(1) All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specifications that all parts are tested in production to meet the stated values.
(5) VEE must have at least −9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled. In
addition, the voltage differential between VCC and VEE must be greater than 14V.
(6) AC Electrical Test; Refer to Test Circuit #2 .
(7) When using the isolated package (NDB), the θJC is 2°C/W verses 1°C/W for the non-isolated package (NDL). This increased thermal
resistance from junction to case requires a lower supply voltage for decreased power dissipation within the package. Voltages higher
than ±26V maybe used but will require a heat sink with less than 1°C/W thermal resistance to avoid activating thermal shutdown during
normal operation.
(8) DC Electrical Test; Refer to Test Circuit #1 .
(9) The output dropout voltage, VOD, is the supply voltage minus the clipping voltage. Refer to the Clipping Voltage vs. Supply Voltage
graph in the TYPICAL PERFORMANCE CHARACTERISTICS section.
4 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Test Circuit #1
(DC Electrical Test Circuit)
Figure 3.
Test Circuit #2
(AC Electrical Test Circuit)
Figure 4.
Equivalent Schematic
(excluding active protection circuitry)
Note: The maximum heatsink thermal resistance values, θSA, in the table above were calculated using a θCS = 0.2°C/W due to thermal
compound.
Figure 21.
APPLICATION INFORMATION
MUTE MODE
The muting function of the LM4766 allows the user to mute the music going into the amplifier by drawing more
than 0.5mA out of each mute pin on the device. This is accomplished as shown in the Typical Application Circuit
where the resistor RM is chosen with reference to your negative supply voltage and is used in conjunction with a
switch. The switch when opened cuts off the current flow from pin 6 or 11 to −VEE, thus placing the LM4766 into
mute mode. Refer to the Mute Attenuation vs Mute Current curves in the TYPICAL PERFORMANCE
CHARACTERISTICS section for values of attenuation per current out of pins 6 or 11. The resistance RM is
calculated by the following equation:
RM ≤ (|−VEE| − 2.6V)/Ipin6
where
• Ipin6 = Ipin11 ≥ 0.5mA. (1)
Both pins 6 and 11 can be tied together so that only one resistor and capacitor are required for the mute
function. The mute resistance must be chosen such that greater than 1mA is pulled through the resistor RM so
that each amplifier is fully pulled out of mute mode. Taking into account supply line fluctuations, it is a good idea
to pull out 1mA per mute pin or 2 mA total if both pins are tied together.
UNDER-VOLTAGE PROTECTION
Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning on the LM4766 such that no DC output spikes
occur. Upon turn-off, the output of the LM4766 is brought to ground before the power supplies such that no
transients occur at power-down.
OVER-VOLTAGE PROTECTION
The LM4766 contains over-voltage protection circuitry that limits the output current to approximately 4.0APK while
also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite the
same, however, the output transistors are designed to work alternately by sinking large current spikes.
SPiKe PROTECTION
The LM4766 is protected from instantaneous peak-temperature stressing of the power transistor array. The Safe
Operating graph in the TYPICAL PERFORMANCE CHARACTERISTICS section shows the area of device
operation where SPiKe Protection Circuitry is not enabled. The waveform to the right of the SOA graph
exemplifies how the dynamic protection will cause waveform distortion when enabled. Please refer to AN-898 for
more detailed information.
THERMAL PROTECTION
The LM4766 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device.
When the temperature on the die reaches 165°C, the LM4766 shuts down. It starts operating again when the die
temperature drops to about 155°C, but if the temperature again begins to rise, shutdown will occur again at
165°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal
shutdown temperature limits of 165°C and 155°C. This greatly reduces the stress imposed on the IC by thermal
cycling, which in turn improves its reliability under sustained fault conditions.
Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such
that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the
cost and space constraints of the system will improve the long-term reliability of any power semiconductor
device, as discussed in the DETERMINING THE CORRECT HEAT SINK section.
Equation 2 exemplifies the theoretical maximum power dissipation point of each amplifier where VCC is the total
supply voltage.
PDMAX = VCC2/2π2RL (2)
Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be
calculated. The package dissipation is twice the number which results from Equation 2 since there are two
amplifiers in each LM4766. Refer to the graphs of Power Dissipation versus Output Power in the TYPICAL
PERFORMANCE CHARACTERISTICS section which show the actual full range of power dissipation not just the
maximum theoretical point that results from Equation 2.
Once the maximum package power dissipation has been calculated using Equation 2, the maximum thermal
resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using
Equation 4 which is derived by solving for θSA in Equation 3.
θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)]/PDMAX (4)
Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If
the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal
resistance for the heat sink, given all other things are equal, will need to be smaller.
SUPPLY BYPASSING
The LM4766 has excellent power supply rejection and does not require a regulated supply. However, to improve
system performance as well as eliminate possible oscillations, the LM4766 should have its supply leads
bypassed with low-inductance capacitors having short leads that are located close to the package terminals.
Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or
by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large
tantalum or electrolytic capacitor (10μF or larger) which is used to absorb low frequency variations and a small
ceramic capacitor (0.1μF) to prevent any high frequency feedback through the power supply lines.
If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load
current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the
supplies be bypassed at the package terminals with an electrolytic capacitor of 470μF or more.
A designer must first determine the power supply requirements in terms of both voltage and current needed to
obtain the specified output power. VOPEAK can be determined from Equation 5 and IOPEAK from Equation 6.
(5)
(6)
To determine the maximum supply voltage the following conditions must be considered. Add the dropout voltage
to the peak output swing VOPEAK, to get the supply rail at a current of IOPEAK. The regulation of the supply
determines the unloaded voltage which is usually about 15% higher. The supply voltage will also rise 10% during
high line conditions. Therefore the maximum supply voltage is obtained from the following equation.
Max supplies ≈ ± (VOPEAK + VOD) (1 + regulation) (1.1) (7)
For 30W of output power into an 8Ω load, the required VOPEAK is 21.91V. A minimum supply rail of 25.4V results
from adding VOPEAK and VOD. With regulation, the maximum supplies are ±32V and the required IOPEAK is 2.74A
from Equation 6. It should be noted that for a dual 30W amplifier into an 8Ω load the IOPEAK drawn from the
supplies is twice 2.74APK or 5.48APK. At this point it is a good idea to check the Power Output vs Supply Voltage
to ensure that the required output power is obtainable from the device while maintaining low THD+N. In addition,
the designer should verify that with the required power supply voltage and load impedance, that the required
heatsink value θSA is feasible given system cost and size constraints. Once the heatsink issues have been
addressed, the required gain can be determined from Equation 8.
(8)
From Equation 8, the minimum AV is: AV ≥ 15.5.
By selecting a gain of 21, and with a feedback resistor, Rf = 20kΩ, the value of Ri follows from Equation 9.
Ri = Rf (AV − 1) (9)
Thus with Ri = 1kΩ a non-inverting gain of 21 will result. Since the desired input impedance was 47kΩ, a value of
47kΩ was selected for RIN. The final design step is to address the bandwidth requirements which must be stated
as a pair of −3dB frequency points. Five times away from a −3dB point is 0.17dB down from passband response
which is better than the required ±0.25dB specified. This fact results in a low and high frequency pole of 4Hz and
100kHz respectively. As stated in the External Components Description section, Ri in conjunction with Ci create a
high-pass filter.
Ci ≥ 1/(2π * 1kΩ * 4Hz) = 39.8μF; use 39μF. (10)
The high frequency pole is determined by the product of the desired high frequency pole, fH, and the gain, AV.
With a AV = 21 and fH = 100kHz, the resulting GBWP is 2.1MHz, which is less than the ensured minimum GBWP
of the LM4766 of 8MHz. This will ensure that the high frequency response of the amplifier will be no worse than
0.17dB down at 20kHz which is well within the bandwidth requirements of the design.
REVISION HISTORY
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PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
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Addendum-Page 1
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
MECHANICAL DATA
NDL0015A
TA15A (Rev B)
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