EE40 Lec 18

Diode Circuits

Reading: Chap
Reading Chap. 10 of Hamble
Hambley
Supplement Reading on Diode Circuits
http://www inst eecs berkeley edu/~ee40/fa09/handouts/EE40
http://www.inst.eecs.berkeley.edu/ ee40/fa09/handouts/EE40_MOS_Circuit.pdf
MOS Circuit pdf

EE40 Fall 2009 Slide 1 Prof. Cheung

 Diodes Circuits

–Load Line Analysis

y
–Analysis of Diode Circuits by
assumed states
–Diode Logic Circuits
–Wave Shaping Circuits
–Rectifying
Rectifying Circuits

EE40 Fall 2009 Slide 2 Prof. Cheung

 SOLVING CIRCUITS WITH NONLINEAR ELEMENTS

Look at circuits with a nonlinear element like this:

IL INL
+ + Nonlinear
Linear circuit VL VNL element
- -
A nonlinear element with its own I-V relationship, attached
to a linear circuit with its own I-V relationship.
1. IL = fL(VL) (linear circuit I-V relationship)
2. INL = gNL(VNL) (nonlinear element I-V relationship)
3. INL = -IL
4. VNL = VL

EE40 Fall 2009 Slide 3 Prof. Cheung

 SOLVING CIRCUITS WITH NONLINEAR ELEMENTS

The 4 equations can be reduced to 2 equations in INL and VNL

INL = -fL(VNL) - the linear “loadline”

INL = gNL(VNL)

which we can equate and solve for VNL,

or…
graph the two equations and solve for the intersection.

EE40 Fall 2009 Slide 4 Prof. Cheung

 EXAMPLE
1 kΩ
INL
IL
+
+ Given : I0 = 10-15 A.
2V +
VL V_NL Find VNL
- _

1. IL = (VL- 2) / 1000
2. INL = 10 −15 (
e
VNL / 0.026
−1 )
3 INL = -IIL
3. Substitute 1 and 2 in 3

4. VNL = VL (
10 −15 e
VNL / 0.026
)
− 1 = −[( VNL − 2) / 1000 ]

Solve by iteration, VNL ~ 0.725V

EE40 Fall 2009 Slide 5 Prof. Cheung
 0.004
Graphical Solution
linear
0.0035 nonlinear

0.003

0.0025 Loadline: I= - (V-2)/1000

0.002
I_NL

0.0015

0.001

0.0005
Diode I-V
0 0.725V
-0.0005

-0.001
-1 -0.5 0 0.5 1
V_NL
EE40 Fall 2009 Slide 6 Prof. Cheung
 Piecewise–linear Model of Nonlinear Devices

-5.5V
intercept

+1.5V
intercept

Segment A : i = v / 400
Segment
g B : i = ( v − 1.5) / 100
Segment C : i = ( v + 5.5) / 800
EE40 Fall 2009 Slide 7 Prof. Cheung
 Ideal Diode Model of PN Diode
Circuit symbol I-V characteristic Switch model
ID ID (A) ID
+
+
VD VD
forward bias
–
reverse bias
– VD (V)

Diode behaves like a switch:

• closed in forward bias mode
• open in reverse bias mode
•used when voltage of interest >> 0.6V
EE40 Fall 2009 Slide 8 Prof. Cheung
 Piecewise Linear Model
Circuit symbol I-V characteristic Switch model
ID ID (A) ID
+ +
+ VDon
−
VD VD
forward bias
reverse bias
– VD (V) –
VDon

For a Si pn diode, VDon ≅ 0.6 V

Diode behaves like a voltage source in series with a switch:

• closed in forward bias mode
• open iin reverse bias
bi moded
EE40 Fall 2009 Slide 9 Prof. Cheung
 Zener Diode
A Zener diode is designed to operate in the breakdown mode.

reverse (leakage)
(l k ) currentt ID (A)
forward
current
breakdown voltage VBD
VD (V)

vs(t) >15V for all t t

R

+ +
integrated
vs(t) vo(t) circuit
i it
– VBD = 15V –
EE40 Fall 2009 Slide 10 Prof. Cheung
 Piecewise-linear Model of a Zener Diode

EE40 Fall 2009 Slide 11 Prof. Cheung

 Diode Circuit Analysis by Assumed Diode States

•1) Specify Ideal Diode Model or Piecewise-Linear

Diode Model
ID (A) ID (A)

forward bias forward bias

reverse bias reverse bias
VD (V)
VDon

•2) Each diode can be ON or OFF

•3) Circuit containing n diodes will have 2n states
•4) The combination of states that works for ALL
di d ((consistent
diodes i t t with
ith KVL andd KCL) willill be
b the
th
solution
EE40 Fall 2009 Slide 12 Prof. Cheung
 Example Analysis by assumed Diode States

D1=on D2=on
1.75mA ×

0.5mA

D1=off D2=on
+10 +3

D1=off D2=off
+10
0 +3
×
×
D1=on D2=off
+6 +3
√

EE40 Fall 2009 Slide 13 Prof. Cheung

 Transfer Function of Diode Circuits
Piecewise-Linear Model with 0.6V voltage drop

EE40 Fall 2009 Slide 14 Prof. Cheung

 Diode Logic: AND Gate
• AND gate Piecewise-Linear Model with 0.6V voltage drop

Vcc Inputs A and B vary between 0

Volts (“low”) and Vcc (“high”)
Between what voltage levels
RAND VOUT does C vary with VCC=5V
5
A C

B EOC

Slope =1
Output
O t t voltage
lt C is
i hi
high
h Shift 0.7V Up

only if
both A and B are high 0

5 VIN
0

EE40 Fall 2009 Slide 15 Prof. Cheung

 Diode Logic: OR Gate
• OR gate Piecewise-Linear Model with 0.6V voltage drop
Inputs A and B vary between 0
V lt (“low”)
Volts (“l ”) and
d Vcc (“high”)
(“hi h”)
A Between what voltage levels
does C vary with VCC=5V?
B C VOUT

ROR 5

EOC

Output voltage C is high if Slope =1

either (or both) A and B are high Shift 0.7V Down

0.7V 5 VIN
0

EE40 Fall 2009 Slide 16 Prof. Cheung

 Diode Logic: Incompatibility and Decay
Signal Decays with each stage (Not regenerative)
AND gate OR gate
output voltage is high only if output voltage is high if
both A and B are high either (or both) A and B are high
Vcc
A
RAND
B COR
A CAND ROR

B
0.6V drop

EE40 Fall 2009 Slide 17 Prof. Cheung

 Clipper Circuits

Assume forward diode

has 0 voltage drop

EE40 Fall 2009 Slide 18 Prof. Cheung

 Peak Detector Circuit
Assume the ideal (perfect rectifier) model.
Vi(t)

+
+ Vi
+ C
Vi((t)) − VC(t)
−
−
t

Idea: VC(t) VC
The capacitor
charges
h d
due tto one
way current behavior
of the diode.

EE40 Fall 2009 Slide 19 Prof. Cheung

 Peak Detector with Load Resister

EE40 Fall 2009 Slide 20 Prof. Cheung

 Level Shift Circuit
+ - VC + VIN VC

+
C t
VIN VOUT

- -
VOUT 1 3
VOUT = VC+ VIN
t
2
1) Diode =open, VC=0, VOUT = VIN
2) Diode =short, VC= -VIN , VOUT=0
, 3) Diode =open
=open, VC= -VVIN (min) , VOUT= VIN+VC

EE40 Fall 2009 Slide 21 Prof. Cheung

 Clamp Circuit (level shifter)

Max of vin(t)=5 sin(ωt)

is shifted by -5V
b the
by h didiode-voltage
d l
source combination

EE40 Fall 2009 Slide 22 Prof. Cheung

 Voltage Doubler Circuit
- VC1 +

+
+

+
+
C1
VIN VIN C2 VOUT

+ VC21 -
R1 VOUT R2

- -
- -

Level Shift Peak Detect

See Homework problem

Output is the peak to peak voltage of the input
input.

EE40 Fall 2009 Slide 23 Prof. Cheung

 Half Wave Rectifier Equivalent circuit

V >0.6V, diode = short circuit

Æ Vo= VI - 0.6
06

V < 0.6V, diode = open

p circuit
Æ Vo =0

EE40 Fall 2009 Slide 24 Prof. Cheung

 Adding a capacitor: what does it do?

Vm sin (ωt)
C R V0

EE40 Fall 2009 Slide 25 Prof. Cheung

 Half-Wave Rectifier

Current
charging
up
capacitor

EE40 Fall 2009 Slide 26 Prof. Cheung

 Full Wave Rectifier

EE40 Fall 2009 Slide 27 Prof. Cheung

 Small –Signal Linear Equivalent Circuit
Suppose the nonlinear device has the functional
dependence I = i(v) is biased with a DC voltage vG at the Q-
point). A small differential voltage ∆v is
point (quiescent point)
added on top of vG. Using Taylor series expansion
di
i( v Q + ∆v ) = i( v Q ) + • ∆v + .........
dv vQ

We can define a dynamic resistance r at the Q point

Tangent line
i
1
r≡
di
dv v Q
∆i
∆v
∆i ≅ ∆v
r vG v
EE40 Fall 2009 Slide 28 Prof. Cheung
 Small –Signal Model of Diode

Q2
∆v ∆i
∆i ≅
r Q1
∆i

∆v ∆v
EE40 Fall 2009 Slide 29 Prof. Cheung
 Small –Signal Model Example

VC and RC
Determines rd at
Q point of diode

EE40 Fall 2009 Slide 30 Prof. Cheung

 Small –Signal Model Example

The large capacitors and DC bias source are effective shorts

for the ac signal in small-signal
small signal circuits
* See Hambley for an application of voltage controlled Attenuator

EE40 Fall 2009 Slide 31 Prof. Cheung