ZLNB101: Dual Polarisation Switch Twin LNB Multiplex Controller

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DUAL POLARISATION SWITCH TWIN LNB

MULTIPLEX CONTROLLER ZLNB101


ISSUE 1- JANUARY 2001

DEVICE DESCRIPTION
The ZLNB101 operates from a single supply
The ZLNB101 dual polarisation switch of between 5-12V. Its quiescent current is
controller is one of a wide range of satellite typically only 4mA and this does not change
receiver LNB support circuits. It features two significantly with load or logic state. It is
completely independent channels, each available in either the standard SO8 or space
providing two logic outputs under the saving MSOP8 surface mount packages.
control of a voltage sensitive input. It is Device operating temperature is -40°C to
intended for use in Twin LNB designs, +85°C to suit a wide range of environmental
replacing many dIscrete components to save conditions.
both manufacturing cost and PCB size whilst
improving reliability.
The two inputs of the ZLNB101 have a
nominal threshold of 14.5V. Their threshold
is temperature compensated to minimise
drift. Each features a low and stable input
current that enables transient protection to
be achieved with the addition of only a single
resistor per channel.
Normal and an inverted outputs are
provided for each input. All outputs can
source 15mA and sink 10mA making them
suitable to drive TTL and CMOS logic, pin
diodes and for IF-amp supply switching.

FEATURES APPLICATIONS
• provides polarity detection and control • twin LNBs
• transient resistant • IF switch box
• low input current • LNB switch boxes
• low supply current
• temperature compensated input
threshold
• standard and inverted output available
simultaneously wide supply operating
range
• dual polarisation switch
• eliminates external components
• simplifies design

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ZLNB101
ABSOLUTE MAXIMUM RATINGS Power Dissipation (Tamb= 25°C)
Supply Voltage -0.6V to 15V SO8 500mW
MSOP8 500mW
Supply Current 50mA
VPOL1 and VPOL2
Input Voltage 25V Continuous
Operating Temperature -40 to 85°C
Storage Temperature -40 to 85°

ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise stated):


Tamb= 25°C,VCC=5V,ID=10mA (RCAL1 =33kΩ)
SYMBOL PARAMETER CONDITIONS LIMITS UNITS
Min Typ Max
VCC Supply Voltage 5 12 V
ICC Supply Current All inputs and outputs open circuit 10 mA
IVERT1 = IVERT2 = 10mA, VPOL1 =
VPOL2 = 14V 30 mA
IHOR1 = IHOR2 = 10mA, VPOL1 =
VPOL2 = 15.0V 30 mA
VPOL1 and VPOL2 Inputs
IPOL Current VPOL1 = VPOL2 = 25V (Note 4) 10 20 40 µA
VTPOL Threshold (Note 1) (Note 4) 14.0 14.5 15.0
Voltage
TSPOL Switching Speed 100 µs
Vert 1/2 Outputs
VVHIGH Voltage High I VERT1 =I VERT2 =10mA,
V POL1 = V POL2 = 14V VCC-1.0 VCC-0.8 VCC V
VVHIGH Voltage High I VERT1 =I VERT2 =15mA,
V POL1 = V POL2 = 14V VCC-1.2 VCC-0.9 VCC V
VVHIGH Voltage High I VERT1 =I VERT2 =10µA,
V POL1 = V POL2 = 14V VCC-0.2 VCC-0.1 VCC V
VVLOW Voltage Low I VERT1 =I VERT2=-10mA,
V POL1 = V POL2 = 15.0V 0 0.25 0.5 V
Hor 1/2 Outputs
VVHIGH Voltage High I HOR1 =I HOR2=10mA,
V POL1 = V POL2 = 15.0V VCC-1.0 VCC-0.8 VCC V
VVHIGH Voltage High I HOR1=I HOR2=15mA,
V POL1 = V POL2 = 15.0V VCC-1.2 VCC-0.9 VCC V
VVHIGH Voltage High I HOR1=I HOR2=10µA,
V POL1 = V POL2 = 15.0V VCC-0.2 VCC-0.1 VCC V
VVLOW Voltage Low I HOR1=I HOR2=-10mA,
V POL1 = V POL2 = 14V 0 0.25 0.5 V

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ZLNB101
Note:-
1) VPOL1 and VPOL2 switching thresholds apply over the whole operating temperature range
specified above.
2) Inputs VPOL1 and VPOL2 are designed to be wired to the power input of an LNB via high value
(10k) resistors. Input VPOL1 controls outputs Vert1 and Hor1. Input VPOL2 controls outputs Vert2
and Hor2. With either input voltage set at or below 14V, the corresponding Vert pin will be high
and Hor pin low. With either input voltage at or above 15.0V, the corresponding Vert pin will be
low and Hor pin high. Any input or output not required may be left open-circuit.
3) All outputs are designed to be compatible with TTL, CMOS, pin diode and IF Amp loads.
4) Applied via 10k resistors

The following block diagram shows a typical block diagram twin LNB design. The ZLNB101
provides the two polarity switches required to decode the two independent receiver feeds.
Additionally the front end bias requirements of the LNB are provided by the ZNBG4000 or
ZNBG6000 offering a very efficient and cost effective solution.

Control Input
<=14V-Horizontal DC Input
Horizontal Gain Stage
>=15V-Vertical 13-25V
Antenna GaAs/HEMTFET Mixer

1 3
+ Horizontal H/V Output 1

PIN
IF down feed
Diode
950-1750 MHz
Bias Generator ZLNB101 Series Control MUX
- Standard Band
ZNBG40XX Dual H/V Switch 950-2050 MHz
Series
- Enhanced Band

2 4
+ Vertical H/V Output 2

Vertical Gain Stage


Antenna GaAs/HEMTFET Mixer

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ZLNB101
CONNECTION DIAGRAMS ORDERING INFORMATION

Part Number Package Part Mark


Vert2 1 8 Hor1 ZLNB101X8 MSOP8 ZLNB101
Hor2 2 7 Vert1
ZLNB101N8 SO8 ZLNB101
Gnd 3 6 Vcc
Vp2 4 5 Vp1

MSOP8

Vert1 1 8 Vcc
Hor1 2 7 Vp1
Vert2 3 6 Vp2
Hor2 4 5 Gnd
SO8

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ZLNB101

PACKAGE DIMENSIONS

MSOP8
D
DIM Millimetres Inches
MIN MAX MIN MAX
8 7 6 5
A 0.91 1.11 0.036 0.044

H
E
A1 0.10 0.20 0.004 0.008 1 2 3 4

B 0.25 0.36 0.010 0.014 eX6


θ°
C 0.13 0.18 0.005 0.007
D 2.95 3.05 0.116 0.120
L
e 0.65 NOM 0.0256 NOM B C

A1
A

e1 0.33 NOM 0.0128 NOM


E 2.95 3.05 0.116 0.120
H 4.78 5.03 0.188 0.198
L 0.41 0.66 0.016 0.026
θ° 0° 6° 0° 6°

SO8

DIM Millimetres Inches


Min Max Min Max
A 4.80 4.98 0.189 0.196
B 1.27 BSC 0.05 BSC
C 0.53 REF 0.02 REF
D 0.36 0.46 0.014 0.018
E 3.81 3.99 0.15 0.157
F 1.35 1.75 0.05 0.07
G 0.10 0.25 0.004 0.010
J 5.80 6.20 0.23 0.24
K 0° 8° 0° 8°
L 0.41 1.27 0.016 0.050

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