Jahan Mahin 2012

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Improved Configurations for Dc to Dc

Buck and Boost Converters


M.Jahanmahin, A.Hajihossein1u, E.Afjei, M.mesbah
Department of Electrical Engineering Shahid Beheshti University, Tehran, Iran
Jahan [email protected]
_ [email protected] [email protected] m [email protected]
_

Abstract- dc to dc converters are used to change the input configuration of Buck converter and a novel configuration of
voltage level to a desired output voltage level less Boost converter are introduced which operate under current
(Buck converter) or more (Boost converter) than the input
voltage magnitude. This paper proposes a novel method for continuous mode of operation (CCM) [16]. In this
increasing output power by utilizing two storage elements as configuration by utilizing two storage devices will have less
well as reducing the output ripple voltage for Buck and Boost damaging effects on circuit parameters. these novel
converters. In this improved converters, two inductors are used
converters has two inductors two switches which can
for feeding the load by two independent switches. One inductor
charges up by the source voltage while another inductor is improve several factors over conventional converters by
discharging its energy into the load during this time. The considering a delay time between these two switches which
output power production is almost doubled while the ripple will be explained in the next section. These factors are
voltage is reduced by a factor of two when compared to a
namely; output voltage ripple, maximum input current,
conventional dc to dc converter. This paper provides the
analysis, simulation, experimental results as well as the transient time, and maximum of transferable power.
comparison with conventional Buck and Boost converters.
II. OPERATIONAL PRINCIPLE OF THE CONVERTERS
Keywords-component; dc-dc Buck converter; Boost
converter; ripple voltage. Figs. 1 and 2 show the topologies of the new Buck and
Boost converters respectively.
I. INTRODUCTION
In several power conversion applications, it is required to
0,

convert a constant dc voltage source to a variable output dc +


voltage. This is performed by dc-dc converters [1]-[3]. In Iood

other words, the dc-dc converter is similar to transformer in


r
L,
0,

L-______�________
c
2-____L-.
the ac systems. These converters are used in several
Fig. I. The novel Buck converter
applications such as regulated DC power supplies, renewable
energy systems, electrical vehicles, cranes, distributed 0,

generation systems, and power factor Correction process


+
[4]-[8]. In past decade, several studies have been done about
v.
""d
reducing the output voltage ripple of dc-dc converters
"

[9]-[15]. Changing structure of the converter using new L-______L-________-L__�__•

topology can improve the operation of the converter. A good Fig. 2. The novel Boost converter

design requires special attentions to many circuit parameters


such as voltage ripple, maximum current of each element, Each topology composed of two inductors (i.e. Ll , L2),
power losses, voltage stress, and etc. These parameters two diodes (i.e. Dl , D2) and two switches (i.e. Sl , S2). In
usually have tradeoff in such way that improving of one experimental cases these ideal switches can be replaced by
parameter might have a big effect on another parameter. For power transistors. These switches have the same switching
example, in a Buck converter with one switch, reduce voltage frequency (f) and duty cycle (D) in PWM applications [1].
ripple reduction is accomplished by select a bigger capacitor The only difference between these switches is that one
at the output but the transient time, as well as cost will switch has a delay time; this delay time is half of the
increase. In order to decrease power losses in the power switching period (T/2) as shown in Fig. 3 when D is smaller
switches, one can decrease the switching frequency but this than 0.5 and is shown in Fig. 4 when D is larger than 0.5.
process will increase ripple voltage and can adverse effect on
the output voltage waveform. In this paper, a novel

IEEE Catalog Number: CFP121IJ-ART


372
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
VB' Every state for each new converter is explained in following
manner;

, ,
State 1: In this state, S1, S2 are turned on. Both inductors
(Ll , L2) are charging up. D1, D2 are in reversed bias mode.
L ... L ...
+-
This condition only can happen when D > 0.5.
State 2: In this state, S1 is switched off and Ll is discharging
into the load by forward biasing of diode Ol . S2 is turned on,
L2 is charging up and 02 is in reversed bias mode.

'l
Fig. 3. The gate pulses of S 1 and S2
when D < 0. 5 State 3: In this state, S1 is turned on; L1 is charging up and
01 is in reversed bias mode. S2 is switched off and L2 is
V
discharging in the path that contains L2, load and 02.

-I f -I
...
DT DT
State 4: In this state, SI, S2 are turned off. Both inductors
(Ll , L2) are discharging into the load by forward biasing of
I I two diodes 01 and 02. This condition can only occur
VB' -- I + 1--
I
I : +- I + 1-- I +
when 0 <0.5.
I
All these states for each three novel converters can be
summarized in table I.

Fig. 4. The gate pulses of S 1 and S2


when D > 0.5 TABLE I. Different States for each new converter

Novel Elements which


states 51 52 D1 D2 L1 L2
converter feeding load
III. ANALYSIS OF THE NOVEL CONVERTERS State 1 on on off off Charging Charging L1, L2 & C
State 2 off on on off Discharging Charging L1, L2 & C
The new Buck and novel Boost converters undergo four buck
State 3 on off off on Charging Discharging L1, L2 & C
different topological states as shown in Figs. 5 and 6 State 4 off off on on Discharging Discharging L1, L2 & C
respectively. State 1 on on off off Charging Charging C
State 2 off on on off Discharging Charging L1&C
boost
State 3 on off off on Charging Discharging L2& C
State 4 off off on on Discharging Discharging L1, L2 & C

+ +

v� v�
As mentioned in the above, at any moment, the load is
being fed by two independent paths. Hence, for a given voltage
State 2 level it can transfer more power in comparison with
� �

v.k2fcf - 6""· -Ll


10,. :�
Lz
:�
conventional converters.

A. The new Buck Converter


State 3 State 4

Fig. 5. Four variety conditions of the While S1 is switched on, the voltage drops on L 1 which is
Novel Buck Converter
Vin-YOU! will take OT seconds. When S1 is switched off, the
voltage drops on Ll during this time is -yOU! and it will take

· tillI- "BE-
(l -D)T seconds. So:
(Vin - VallJ DT + VallI (J - D)T = 0 (1)
Therefore the expression for the input voltage (Vin) and the
Stale 1 Siale 2 average of output voltage (VOU!) can be summarized as:
LJ
(2)
L, + +

V.
LJ
C 10,. �� V.
L, C Io,d � While Ll is charging up, its current increases from ILl.min to

lli' eR' State3

Fig. 6. Four variety conditions of the


State 4
ILl,max . Thus current variation for Ll can be expressed as:
LJILI = ILl,max -ILl,min (3)

Novel Boost Converter

IEEE Catalog Number: CFP121IJ-ART


373
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
The duration of this condition is: This circuit simulated by MATLAB. The inductors currents
Vin Vout = L1 ( .!JIu I D7)
� (4) for the each novel topology are shown in Figs. 6 and 7.

Similarly, for L2:

.!JI12 = Ir2,max -I[2,min (5) ---�


'r---�
And: �, "l--', /\
/' \\ ,/
(6) � >'. / // \ / '\
8'
/"!
r ;./'" /\
S 05
It is assumed that this novel Buck converter is operating in .g
,V
..

\/
1

continuous current mode and Ll =L2=L, therefore the


.5 V "v/
equations for minimum and maximum inductors current with
'u 'u ,� .... ,� W 'M '" U

the load Rare: Time (sec)


Fig. 6. Inductors Current for the
Iu,max = ( D�nl 2RL)( L + (l,5-D)RT) (7)
Novel Buck Converter
Iu,min = ( D�nl 2RL)( L + ( D-0'5)RT) (8)
Iu,max = ( DVinl 2RL)( L + ( O,5-D)RT) (9) iu(t)
il2mj
$17.8
-

IU,min = ( DVinI2RL)( L ( D-1.5)RT) (10)


,
+ '\
j' ,1\

� '"
� H. .

, \
.....
,
/ \ /\ , .......

15 11.1. V \/ \' / \'


.g
tJ
,
17.1 /\ (\ 1\ \
.1\
B. Analysis a/the New Boost Converter .s
I
\ / I
\ /
\i
\716

\
5 ./ \/ \
Time (sec)

x 10

While S1 is switched on, the voltage drops on L1 is


Fig. 7. Inductors Current for the
Vin and it takes DT seconds. When S1 is switched off, the Novel Boost Converter
voltage drops on Ll is Vin-Vout and it takes (1-D)T seconds.
So:
IV. ADVANTAGES AND SIMULATION RESULTS
Vin DT + ( Vin � VOl,J (l � D)T = 0 (11)
In this section some of the benefits that can be obtained
Therefore the expression for the input voltage (Vin) and the
from the novel configurations in comparison to the
average of output voltage (Vout) can be summarized as:
conventional converters are presented.
(12) The conventional Buck and Boost are shown in Figs. 8
While Ll is charging up, its current increases from ILl,min to and 9 respectively. The maximum and minimum of inductor
ILl,max ' Thus current variation for Ll can be expressed as: current equations are presented in (21) and (22) for
conventional Buck converter and also in (23) and (24) for
.!JILl = ILl,max -ILl,min (13)
conventional Boost converter, respectively.
The duration for this condition is:
(14)
Similarly, for L2:

.!JI12 = Iu,max -I12,min (15)


And:
(16) Fig. 8. The Conventional Buck Converter

It is assumed that this novel Boost converter is operating in


D
continuous current mode and also L1=L2=L. The equations for
minimum and maximum of inductors current with R as the +

load are: R"",

ILl,max = (Vinl [4RL(l-D/J )( 2L + RTD (l-D/) (17)


ILl,min = (Vinl [4RL( I-D/J )( 2L -RTD(l-D/) (18)
Fig. 9. The Conventional Boost Converter
I[2,max = IU,max (19)
I12,min = Iu,min (20)

IEEE Catalog Number: CFP121IJ-ART


374
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
h.max = ( DVinl 2RL)( 2L + (l-D)RT) (21)
h,min = ( DVinl 2RL)( 2L - (l-D)RT) (22)
! : :
EG.,
--- ----------- ----- -- -- -

h.max = (Vin I [2RL( I-D/J )( 2L + RTD( I-D/) (23)



h,min = �n I [2RL(l-D/ J )( 2L -RTD( I-D/) (24) G
�5.9
<55.8
The first advantage of these novel converters is that their �n �n �n �n �n �n �n

maximum ripples voltage which is almost half as much as Time (sec)


Fig. 12. Ripple Voltage for Buck converter
the conventional converters. This is summarized in table II,
with 0 = 0.5
and shown in Figs. 10 and II respectively for Buck and
Boost converters.
The second advantage is the ratio of the maxImum
inductor current in the novel converters presented by
TABLE II. Voltage ripple of converters equations (7) and (17) respectively to the maximum of
inductor current equations in conventional converters
Type of Voltage ripple of Voltage ripple of
presented in (21) and (23) respectively which show higher
Converter conventional converter Novel Converter
attainable current magnitude almost doubled for the new
Buck (RTVinl L)O(I-O) (RTVinl L)O(l-20) converter circuits. Hence, for a given voltage level, the
maximum of transferable power increases by a factor of two,
Boost
The third advantage is the maximum current out of
voltage source in the novel converters when D < 0.5, is
almost half of the maximum input current in a conventional
.
- - - �:�:���'l converters. Of course only novel Buck converters have this
advantage; in the novel Boost converter, the input current is
, -.... j\ /\
, I .\ . /\ I \ continues. This issue is simulated by MATLAB and is
. h \
1/'
I/''I \ ,�. r '\ \\
'_�,

_/ 1- 1/
/�
'/
shown in Figs. 13 and 14.
\ '?
V
,
, . \j \/
- Conventional
- - - Novel cODverter
buck�-
2
r- ---- ----
3:

1

Time (sec) .10�


08

Fig. 10. Voltage Ripple of -- - --


Buck Converter 8 0•

I
--,
I
--
"I
-
-
'1
o.• I
.-
-= I I I I
0. I I I
o. 2 I
..!l
0
I
I
I
I
I
I
I
I : I
'. 56 9.57 '.5O 9.59 .. . 9.61 '.62 '.63

Time (sec) x 10

Fig. 13. Input Currents of


Buck converter

" 2O.58 1 L----'-:c:.::..c:.:...:..:=-:::.:::::..----.J·


Time (sec) .10

$ 20.56
Fig. 1 1. Voltage Ripple of � �
20.54
Boost Converter .:: 20.52

� 20.5 -

20.48
Novel Buck converter has a special trait. The ripple
voltage of this converter is almost zero when duty cycle is
0.5. This is driven from table 2 and is obtained at Fig. 12.
Fig. 14. Input Currents of
Boost converter

IEEE Catalog Number: CFP1211J-ART


375
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
The fourth advantage is related to power losses regarding
the power switches. In these novel converters the power
losses are almost half of the power losses in conventional
converters. This issue has been achieved for two reasons.
first is the maximum of inductors current in novel converter
is almost half of the maximum of inductors current in
conventional converters and the second one is the power
Fig. 17. The circuit structures
losses in each switch is proportion to square of current, I,
flowing through them where I is the switch current.
The currents of the two inductors for the novel converters
Finally, the last advantage obtained is related to the are obtained shown as Figs. 18 and 19.
transient response time. It is smaller than the response time
of the conventional dc to dc converters. This fact is shown in

/
Figs 15 and 16 for these novel converters. I • .(t)

Time

Fig. 18. ILl and IL2 Currents in time division=5us


for Buck Converter
Time (sec)
Fig. 15. The response time of
Buck converter

110,----;====-=:;,-----,---n

Time

Fig. 19. ILl and IL2 Currents in time division=5us


Time (sec) for Boost Converter
Fig. 16. The response time of
Boost converter
Figs. 20 and 21 show the comparison between the output
voltages of converters with a conventional one having the
v. EXPERIMENTAL RESULTS same load value.

These novel converters are built in the laboratory and their


circuits are shown in Fig. 17.

IEEE Catalog Number: CFP121IJ-ART


376
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
� E

� �'"

u

:;
0-
� -=
.5

Fig. 20. Output Voltage of: A) Conventional Buck Fig. 23. Input Current of: A) Conventional Boost
B) The novel Buck B) The novel Boost

All Figs. have been obtained by laboratory experiment


which shows the same results as the ones obtained through

..
- '-, /;'
-
!
/ (/ \. 1(/·
I
' \ ., /
I
.
\
simulations.

. I VI. CONCLUSION
. ,'
.. / This paper presents successfully the analysis, simulation,
. !
experimental results of new configurations of two novel dc
Time(s�) to dc converters. It then continues with the comparison with
Fig. 2 1. Output Voltage of: A) Conventional Boost conventional converters. The novel converters show higher
B) The novel Boost output power (almost twice as much) as well as lower ripple
factor (halt) when compared to the conventional converters.

Figs. 22 and 23 show the comparison between the input


currents of the novel converters with conventional ones. In
these Figs., the input current of conventional converters is
placed on top while the input current of novel converters is REFERENCES
shown in the bottom part of these Figs.
[I] Rashid M. H. "Power Electronics: Circuits, Devices andApplications"
Second edition, Prentice-Hall, USA, 1993.
[2] Mohan N., Undeland T. M. and Robbins W. P. "PowerElectronics:
Converters, Applications and Design" JohnWiley & Sons, New York,
1995.
[3] R. Erickson, Fundamentals of Power Electronics. New York:
Chapman & Hall, 1997, ch. 9 & I I.
3: [4] S.D. Mitchell, S.M. Ncube, T.G. Owen, and M.H. Rashid,

"
g "Applications and market analysis of dc-dc converters," in Proc.
u ICECE, 2008, pp. 887-891.
E
[5] M.B. Camara, H. Gualous, F. Gustin, A Berthon, and B.
.=
0-

Dakyo, "DC/DC converter design for super capacitor and battery


power management in hybrid vehicle applications-polynomial
control strategy," IEEE Trans. Ind. Electron., vol. 57, no. 2, pp.
587-597, Feb. 2010.
Time (sec)
[6] 1. chen, D. Masimovic, and R.W. Erickson, "Analysis and
Fig. 22. Input Current of: A) Conventional Buck design allow stress Buck-Boost converter in universal-input PFC
B) The novel Buck application," IEEE Trans. Power Electron., vol. 2 1, no. 2, March
2006.
[7] Boni, A; Carboni, A; Facen, A," Design of fuel-cell powered DC­
DC converter for portable applications in digital CMOS technology"
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE
International Conference on 10. 1 109/ICECS. 2006.379763.
[8] Choon-Keat Chew; Rama Rao Kondapalli, S. ; " Modeling, Analysis,
Simulation and Design Optimization (Genetic Algorithm) of dc-dc
Converter for Uninterruptible Power Supply Applications "

IEEE Catalog Number: CFP121IJ-ART


377
ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE
[9] G. W. Wester, "Describing-function analysis of a ripple regulator with
slew-rate limits and time delays," in Proc. IEEE Power Electronic
Spe-cialists Conf., 1990, pp. 341-346.
[ 10] "Designing Fast Response Synchronous Buck Regulators Using the
TPS5210," Texas Instruments, Dallas, TX, Mar. 1999.
[II] Y.J. Lee , A. Khaligh, A. Chakraborty, and A. Emadi, "Digital
combination of Buck and Boost converters to control a positive
Buck-Boost converter and improve the output transients," IEEE
Trans. Power Electron., vol. 24, no. 5, pp. 1267-1279, May 2009.
[ 12] C. Zhang, Z. Liao, and M. Yang, "Research on soft start
method for Buck-Boost bi-directional dc-dc converter of fuel cell
power system," in Proc. PACCS, 2009, pp. 326-329.
[ 13] 1. A. Abu-Qahouq, N. Pongratananukul, I. Batarseh, and T.
Kasparis,"Multiphase voltage-mode hysteretic controlled VRM with
DSP control and novel current sharing," in Proc. Fourth IEEE Int.
Conf. Devices, Circuits, and Systems, Apr. 2002, pp. POI7.I-POI7.7.
[ 14] K. Stisumrit and K. Tripech, "Analysis continuous conduction
mode of Buck-Boost converter using bridge rectifier control," in
Proc. ICIEA, 2006, pp. 1-4.
[IS] 1. Xu, and M. Qin, "Multi-pulse train control technique for
Buck converter in discontinuous conduction mode," lET Power
Electron., vol. 3, no. 3, pp. 391-399, May 2010.
[ 16] A. Reatti, M. K. Kazimierczuk "Small-Signal Model of PWM
Converters for Discontinuous Conduction Mode and Its Application
for Boost Converter," IEEE Transactions of Circuits and Systems-I:
Fundamental Theory and Applications, vol. 50, no. I, pp. 65-73,
January 2003.

IEEE Catalog Number: CFP121lJ-ART


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ISBN: 978-1-4673-0113-8/12/$31.00 ©2012 IEEE

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