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    Homework 05 (Nand2Tetris)

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    Hunter Haggard
    This document provides instructions for Homework 5 which requires students to build logic gates for a computer architecture as described in Chapter 5 and submit the .hdl files and documentation. The submission will be graded based on whether the chip passes tests (60%), how well built it is with fewest chips (30%), and quality of documentation (10%). Students must use the ROM32K, Keyboard and Screen chips and documentation should follow the provided guidelines.

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    Homework 05 (Nand2Tetris)

    Uploaded by

    Hunter Haggard
    197 views1 page
    This document provides instructions for Homework 5 which requires students to build logic gates for a computer architecture as described in Chapter 5 and submit the .hdl files and documentation. The submission will be graded based on whether the chip passes tests (60%), how well built it is with fewest chips (30%), and quality of documentation (10%). Students must use the ROM32K, Keyboard and Screen chips and documentation should follow the provided guidelines.

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    Recommended with Nand2Tetris https://www.nand2tetris.org

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    This document provides instructions for Homework 5 which requires students to build logic gates for a computer architecture as described in Chapter 5 and submit the .hdl files and documentation. The submission will be graded based on whether the chip passes tests (60%), how well built it is with fewest chips (30%), and quality of documentation (10%). Students must use the ROM32K, Keyboard and Screen chips and documentation should follow the provided guidelines.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    197 views1 page

    Homework 05 (Nand2Tetris)

    Uploaded by

    Hunter Haggard
    This document provides instructions for Homework 5 which requires students to build logic gates for a computer architecture as described in Chapter 5 and submit the .hdl files and documentation. The submission will be graded based on whether the chip passes tests (60%), how well built it is with fewest chips (30%), and quality of documentation (10%). Students must use the ROM32K, Keyboard and Screen chips and documentation should follow the provided guidelines.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 1

    CS220

    HW5

    Homework 5: Computer Architecture

    Objective:
    Build all gates described in Chapter 5 (see table below), which will test your
    understanding of our HACK computer architecture.

    Grading method:
    If the chip passes all the tests specified in the supplied test script, it receives 60%
    of the grade. 30% goes to it being well built (the lowest number of chips to implement),
    with the remaining 10% going towards documentation provided for each chip. Generally
    speaking, we prefer implementations that use as few chip parts as possible, even if it
    implies a less efficient chip design (in term of # of AND/OR/NOT chips). Higher-level
    chips are considered as one chip part (ex. Mux, DMux, Or8Way, etc.)

    What do you turn in?


    The .hdl files (there are 3 of them) and the documentation.pdf file ONLY (see
    Documentation Instructions for guidelines on how to do this), in a ZIP file per Project
    Submission Guidelines (see document on Blackboard).

    Reminder: Make sure you use the ROM32K, Keyboard and Screen chips!

    Chip Working? Well built?


    5 of these
    well-built
    points are for
    Memory / 15 / 15
    handling
    KBD
    addressing
    CPU / 30 / 10

    Computer / 15 / 5

    Subtotal / 60 / 30

    Documentation / 10

    See http://nand2tetris.org/05.php for some tips/resources/tools (note that the assignment


    on the website may be substantially different from the assignment that is described above,
    if you need clarification email your instructor. You will be graded based on this
    documents requirements).

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